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authorPeter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>2012-06-13 14:46:43 +1000
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>2012-06-15 13:08:13 +0200
commitabe098e4f93a80b0756c0e8e728bc78c47a91127 (patch)
tree3f2145d259d793c7a9b8678b854c304acd8356a6 /hw/xilinx_timer.c
parent8d4eb373f7e32305af2a0e04bbc24fa3494ffe6f (diff)
downloadfocaccia-qemu-abe098e4f93a80b0756c0e8e728bc78c47a91127.tar.gz
focaccia-qemu-abe098e4f93a80b0756c0e8e728bc78c47a91127.zip
xilinx_timer: changed nr_timers to one_timer_only
The configurable property for this IP in the Xilinx tools is a boolean switch
"one-timer-only" that flicks this timer from being dual channel to single.
Updated QEMU to work the same way for better match with the IP core and its TRM.

Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'hw/xilinx_timer.c')
-rw-r--r--hw/xilinx_timer.c17
1 files changed, 11 insertions, 6 deletions
diff --git a/hw/xilinx_timer.c b/hw/xilinx_timer.c
index e9fde2870d..72f7c0d421 100644
--- a/hw/xilinx_timer.c
+++ b/hw/xilinx_timer.c
@@ -62,11 +62,16 @@ struct timerblock
     SysBusDevice busdev;
     MemoryRegion mmio;
     qemu_irq irq;
-    uint32_t nr_timers;
+    uint8_t one_timer_only;
     uint32_t freq_hz;
     struct xlx_timer *timers;
 };
 
+static inline unsigned int num_timers(struct timerblock *t)
+{
+    return 2 - t->one_timer_only;
+}
+
 static inline unsigned int timer_from_addr(target_phys_addr_t addr)
 {
     /* Timers get a 4x32bit control reg area each.  */
@@ -78,7 +83,7 @@ static void timer_update_irq(struct timerblock *t)
     unsigned int i, irq = 0;
     uint32_t csr;
 
-    for (i = 0; i < t->nr_timers; i++) {
+    for (i = 0; i < num_timers(t); i++) {
         csr = t->timers[i].regs[R_TCSR];
         irq |= (csr & TCSR_TINT) && (csr & TCSR_ENIT);
     }
@@ -202,8 +207,8 @@ static int xilinx_timer_init(SysBusDevice *dev)
     sysbus_init_irq(dev, &t->irq);
 
     /* Init all the ptimers.  */
-    t->timers = g_malloc0(sizeof t->timers[0] * t->nr_timers);
-    for (i = 0; i < t->nr_timers; i++) {
+    t->timers = g_malloc0(sizeof t->timers[0] * num_timers(t));
+    for (i = 0; i < num_timers(t); i++) {
         struct xlx_timer *xt = &t->timers[i];
 
         xt->parent = t;
@@ -214,14 +219,14 @@ static int xilinx_timer_init(SysBusDevice *dev)
     }
 
     memory_region_init_io(&t->mmio, &timer_ops, t, "xilinx-timer",
-                          R_MAX * 4 * t->nr_timers);
+                          R_MAX * 4 * num_timers(t));
     sysbus_init_mmio(dev, &t->mmio);
     return 0;
 }
 
 static Property xilinx_timer_properties[] = {
     DEFINE_PROP_UINT32("frequency", struct timerblock, freq_hz,   62 * 1000000),
-    DEFINE_PROP_UINT32("nr-timers", struct timerblock, nr_timers, 0),
+    DEFINE_PROP_UINT8("one-timer-only", struct timerblock, one_timer_only, 0),
     DEFINE_PROP_END_OF_LIST(),
 };