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| author | Peter Maydell <peter.maydell@linaro.org> | 2018-10-19 16:17:32 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-10-19 16:17:32 +0100 |
| commit | 31e213e30617b986a6e8ab4d9a0646eb4e6a4227 (patch) | |
| tree | 24369d1b7d7f420feaa3d5d73524f58571d374f4 /include/exec/cpu-defs.h | |
| parent | 784c2e4f232adf5ef47a84a262ec72a07d068d6a (diff) | |
| parent | 403f290c0603f35f2d09c982bf5549b6d0803ec1 (diff) | |
| download | focaccia-qemu-31e213e30617b986a6e8ab4d9a0646eb4e6a4227.tar.gz focaccia-qemu-31e213e30617b986a6e8ab4d9a0646eb4e6a4227.zip | |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20181018' into staging
Queued tcg patches. # gpg: Signature made Fri 19 Oct 2018 07:03:20 BST # gpg: using RSA key 64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20181018: (21 commits) cputlb: read CPUTLBEntry.addr_write atomically target/s390x: Check HAVE_ATOMIC128 and HAVE_CMPXCHG128 at translate target/s390x: Skip wout, cout helpers if op helper does not return target/s390x: Split do_cdsg, do_lpq, do_stpq target/s390x: Convert to HAVE_CMPXCHG128 and HAVE_ATOMIC128 target/ppc: Convert to HAVE_CMPXCHG128 and HAVE_ATOMIC128 target/arm: Check HAVE_CMPXCHG128 at translate time target/arm: Convert to HAVE_CMPXCHG128 target/i386: Convert to HAVE_CMPXCHG128 tcg: Split CONFIG_ATOMIC128 tcg: Add tlb_index and tlb_entry helpers cputlb: serialize tlb updates with env->tlb_lock cputlb: fix assert_cpu_is_self macro exec: introduce tlb_init target/unicore32: remove tlb_flush from uc32_init_fn target/alpha: remove tlb_flush from alpha_cpu_initfn tcg: distribute tcg_time into TCG contexts tcg: plug holes in struct TCGProfile tcg: fix use of uninitialized variable under CONFIG_PROFILER tcg: access cpu->icount_decr.u16.high with atomics ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/exec/cpu-defs.h')
| -rw-r--r-- | include/exec/cpu-defs.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index a171ffc1a4..4ff62f32bf 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -24,6 +24,7 @@ #endif #include "qemu/host-utils.h" +#include "qemu/thread.h" #include "qemu/queue.h" #ifdef CONFIG_TCG #include "tcg-target.h" @@ -142,6 +143,8 @@ typedef struct CPUIOTLBEntry { #define CPU_COMMON_TLB \ /* The meaning of the MMU modes is defined in the target code. */ \ + /* tlb_lock serializes updates to tlb_table and tlb_v_table */ \ + QemuSpin tlb_lock; \ CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \ CPUTLBEntry tlb_v_table[NB_MMU_MODES][CPU_VTLB_SIZE]; \ CPUIOTLBEntry iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \ |