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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2023-11-17 08:17:04 +0100
committerPeter Maydell <peter.maydell@linaro.org>2023-11-20 15:30:59 +0000
commitd652866007fc6fae718b0bcfdaf757231b378dd7 (patch)
treef7838468a188231eee0e85f6a4a5442793746a3a /include/hw/arm
parentff6cda35f143082a2c24e9fe74ea0ce4bf3167c1 (diff)
downloadfocaccia-qemu-d652866007fc6fae718b0bcfdaf757231b378dd7.tar.gz
focaccia-qemu-d652866007fc6fae718b0bcfdaf757231b378dd7.zip
hw/arm/stm32f100: Report error when incorrect CPU is used
The 'stm32vldiscovery' machine ignores the CPU type requested by
the command line. This might confuse users, since the following
will create a machine with a Cortex-M3 CPU:

  $ qemu-system-aarch64 -M stm32vldiscovery -cpu neoverse-n1

Set the MachineClass::valid_cpu_types field (introduced in commit
c9cf636d48 "machine: Add a valid_cpu_types property").
Remove the now unused MachineClass::default_cpu_type field.

We now get:

  $ qemu-system-aarch64 -M stm32vldiscovery -cpu neoverse-n1
  qemu-system-aarch64: Invalid CPU type: neoverse-n1-arm-cpu
  The valid types are: cortex-m3-arm-cpu

Since the SoC family can only use Cortex-M3 CPUs, hard-code the
CPU type name at the SoC level, removing the QOM property
entirely.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Message-id: 20231117071704.35040-5-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm')
-rw-r--r--include/hw/arm/stm32f100_soc.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/include/hw/arm/stm32f100_soc.h b/include/hw/arm/stm32f100_soc.h
index 40cd415b28..a74d7b369c 100644
--- a/include/hw/arm/stm32f100_soc.h
+++ b/include/hw/arm/stm32f100_soc.h
@@ -43,12 +43,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(STM32F100State, STM32F100_SOC)
 #define SRAM_SIZE (8 * 1024)
 
 struct STM32F100State {
-    /*< private >*/
     SysBusDevice parent_obj;
 
-    /*< public >*/
-    char *cpu_type;
-
     ARMv7MState armv7m;
 
     STM32F2XXUsartState usart[STM_NUM_USARTS];