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authorRichard Henderson <richard.henderson@linaro.org>2023-02-22 19:17:52 -1000
committerRichard Henderson <richard.henderson@linaro.org>2023-06-26 17:33:00 +0200
commit58e8f1f616d117aed6283690419dc16f53b7a202 (patch)
tree51c033440c2b72c4ca9d72fc868371257909063c /include/hw/core/cpu.h
parent97e1576957c28a5fbcc810f92643e52069cc49b7 (diff)
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accel/tcg: Store some tlb flags in CPUTLBEntryFull
We have run out of bits we can use within the CPUTLBEntry comparators,
as TLB_FLAGS_MASK cannot overlap alignment.

Store slow_flags[] in CPUTLBEntryFull, and merge with the flags from
the comparator.  A new TLB_FORCE_SLOW bit is set within the comparator
as an indication that the slow path must be used.

Move TLB_BSWAP to TLB_SLOW_FLAGS_MASK.  Since we are out of bits,
we cannot create a new bit without moving an old one.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/hw/core/cpu.h')
-rw-r--r--include/hw/core/cpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 3b765beb9b..eda0230a02 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -84,6 +84,7 @@ typedef enum MMUAccessType {
     MMU_DATA_LOAD  = 0,
     MMU_DATA_STORE = 1,
     MMU_INST_FETCH = 2
+#define MMU_ACCESS_COUNT 3
 } MMUAccessType;
 
 typedef struct CPUWatchpoint CPUWatchpoint;