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| author | Richard Henderson <richard.henderson@linaro.org> | 2024-12-21 16:50:26 +0000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-12-24 08:32:15 -0800 |
| commit | e4a8e093dc74be049f4829831dce76e5edab0003 (patch) | |
| tree | 20354b9913086ac3a535e06e4d28057f88710d14 /include/hw/core/tcg-cpu-ops.h | |
| parent | 59abfb444e1d9654e15f85c50d09a3366e4c1c1e (diff) | |
| download | focaccia-qemu-e4a8e093dc74be049f4829831dce76e5edab0003.tar.gz focaccia-qemu-e4a8e093dc74be049f4829831dce76e5edab0003.zip | |
accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core
Convert all targets simultaneously, as the gen_intermediate_code function disappears from the target. While there are possible workarounds, they're larger than simply performing the conversion. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/hw/core/tcg-cpu-ops.h')
| -rw-r--r-- | include/hw/core/tcg-cpu-ops.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index 663efb9133..2e3f1690f1 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -25,6 +25,19 @@ struct TCGCPUOps { */ void (*initialize)(void); /** + * @translate_code: Translate guest instructions to TCGOps + * @cpu: cpu context + * @tb: translation block + * @max_insns: max number of instructions to translate + * @pc: guest virtual program counter address + * @host_pc: host physical program counter address + * + * This function must be provided by the target, which should create + * the target-specific DisasContext, and then invoke translator_loop. + */ + void (*translate_code)(CPUState *cpu, TranslationBlock *tb, + int *max_insns, vaddr pc, void *host_pc); + /** * @synchronize_from_tb: Synchronize state from a TCG #TranslationBlock * * This is called when we abandon execution of a TB before starting it, |