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| author | Francisco Iglesias <francisco.iglesias@xilinx.com> | 2025-09-26 09:07:41 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-10-07 10:35:36 +0100 |
| commit | 27493e5e687e65829f548bf0145dd44bc223fbe5 (patch) | |
| tree | 37ff7fd47fb3cca4376507383eea1f8aa0cf0652 /include/hw/intc | |
| parent | 6926b0b26071ce740f026212f5c437a694117645 (diff) | |
| download | focaccia-qemu-27493e5e687e65829f548bf0145dd44bc223fbe5.tar.gz focaccia-qemu-27493e5e687e65829f548bf0145dd44bc223fbe5.zip | |
hw/intc/arm_gicv3: Introduce a 'first-cpu-index' property
Introduce a 'first-cpu-index' property for specifying the first QEMU CPU connected to the GICv3. This makes it possible to have multiple instances of the GICv3 connected to different CPU clusters. For KVM, mark this property has unsupported. It probably does not make much sense as it is intented to be used to model non-SMP systems. Signed-off-by: Luc Michel <luc.michel@amd.com> Signed-off-by: Francisco Iglesias <francisco.iglesias@amd.com> Reviewed-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250926070806.292065-24-luc.michel@amd.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/intc')
| -rw-r--r-- | include/hw/intc/arm_gicv3_common.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h index 572d971d22..38aa1961c5 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -229,6 +229,7 @@ struct GICv3State { uint32_t *redist_region_count; /* redistributor count within each region */ uint32_t nb_redist_regions; /* number of redist regions */ + uint32_t first_cpu_idx; uint32_t num_cpu; uint32_t num_irq; uint32_t revision; |