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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-01 12:26:09 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-13 19:58:54 +0100 |
| commit | 1ab3a0de2f40f70bdfbd1a319a9734089bddcf72 (patch) | |
| tree | 0ffaa723ed03ba9a90704efda5767f254b1af039 /include/hw/mips/cpudevs.h | |
| parent | 7d6f01a12be534ce2ffaf0aa8741e5f5efca2362 (diff) | |
| download | focaccia-qemu-1ab3a0de2f40f70bdfbd1a319a9734089bddcf72.tar.gz focaccia-qemu-1ab3a0de2f40f70bdfbd1a319a9734089bddcf72.zip | |
target/mips: Explicit Release 6 MMU types
As of Release 6, MMU type 4 is assigned to "Dual Variable-Page-Size and Fixed-Page-Size TLBs" and type 2 to "Block Address Translation. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201201132817.2863301-4-f4bug@amsat.org>
Diffstat (limited to 'include/hw/mips/cpudevs.h')
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