summary refs log tree commit diff stats
path: root/include/hw/riscv/boot.h
diff options
context:
space:
mode:
authorJim Shu <jim.shu@sifive.com>2024-11-20 23:39:35 +0800
committerAlistair Francis <alistair.francis@wdc.com>2024-12-20 11:22:47 +1000
commit1a65064c1f4dc701370c1d59ac1b85afa198b3b0 (patch)
tree07f1180cca99b7dbf08586d25640991e07f20ef6 /include/hw/riscv/boot.h
parentd3592955af2a015be1d7138643b4a010eee0ff0c (diff)
downloadfocaccia-qemu-1a65064c1f4dc701370c1d59ac1b85afa198b3b0.tar.gz
focaccia-qemu-1a65064c1f4dc701370c1d59ac1b85afa198b3b0.zip
hw/riscv: Add the checking if DTB overlaps to kernel or initrd
DTB is placed to the end of memory, so we will check if the start
address of DTB overlaps to the address of kernel/initrd.

Signed-off-by: Jim Shu <jim.shu@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20241120153935.24706-4-jim.shu@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include/hw/riscv/boot.h')
-rw-r--r--include/hw/riscv/boot.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h
index 06b51ed086..7d59b2e6c6 100644
--- a/include/hw/riscv/boot.h
+++ b/include/hw/riscv/boot.h
@@ -32,6 +32,9 @@ typedef struct RISCVBootInfo {
     hwaddr image_low_addr;
     hwaddr image_high_addr;
 
+    hwaddr initrd_start;
+    ssize_t initrd_size;
+
     bool is_32bit;
 } RISCVBootInfo;