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| author | Richard Henderson <richard.henderson@linaro.org> | 2024-08-01 20:52:39 +1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-08-01 20:52:39 +1000 |
| commit | 5e25c93ccb8ddc8dda6845d6c09334ca44cbef17 (patch) | |
| tree | 2f20939ebbee03136e82a75ab2e6e8b6484411b4 /include | |
| parent | e9d2db818ff934afb366aea566d0b33acf7bced1 (diff) | |
| parent | 515457757ff8540c524ff39ea1d9564b251c6532 (diff) | |
| download | focaccia-qemu-5e25c93ccb8ddc8dda6845d6c09334ca44cbef17.tar.gz focaccia-qemu-5e25c93ccb8ddc8dda6845d6c09334ca44cbef17.zip | |
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pci,pc: fixes revert virtio pci/SR-IOV emulation at author's request a couple of fixes in virtio,vtd Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmarSFUPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRp7fwH/3wNCGhgHhF5dhKRKRn8hqhxYl2rXnv0LKYI # Rgsoxh3kw6oKBXxLG/B4V2GkqDSU8q8NuHnvGmmAUQ/uHmwTWbBbrZ+HwMMmaRhT # Ox8kIXiVYAtw24yLKDvyoKbMLjLKb9/QqTT4rbsQ9yl5PLxwoGGJEu/ifM1MbZZY # f5CDtj3hRArIZEjMt0Q3h+G7///BRVZxQ/0de57whGXcr349qgMpiIThvlCOj7Yf # rQ68AGS4yk1Jk0oxiYyWjo43o8JbB5bMnCrkzDy4ZdY5Sw9zGb48CmcrBUl4J9lv # NVDYK63dsvRS0ew7PxaEwu32MIQLJcn5s521m81/ZAhbdyzLnlI= # =/2+K # -----END PGP SIGNATURE----- # gpg: Signature made Thu 01 Aug 2024 06:33:25 PM AEST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [undefined] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [undefined] # gpg: WARNING: The key's User ID is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: intel_iommu: Fix for IQA reg read dropped DW field hw/i386/amd_iommu: Don't leak memory in amdvi_update_iotlb() Revert "hw/pci: Rename has_power to enabled" Revert "hw/ppc/spapr_pci: Do not create DT for disabled PCI device" Revert "hw/ppc/spapr_pci: Do not reject VFs created after a PF" Revert "pcie_sriov: Do not manually unrealize" Revert "pcie_sriov: Ensure VF function number does not overflow" Revert "pcie_sriov: Reuse SR-IOV VF device instances" Revert "pcie_sriov: Release VFs failed to realize" Revert "pcie_sriov: Remove num_vfs from PCIESriovPF" Revert "pcie_sriov: Register VFs after migration" Revert "hw/pci: Fix SR-IOV VF number calculation" Revert "pcie_sriov: Ensure PF and VF are mutually exclusive" Revert "pcie_sriov: Check PCI Express for SR-IOV PF" Revert "pcie_sriov: Allow user to create SR-IOV device" Revert "virtio-pci: Implement SR-IOV PF" Revert "virtio-net: Implement SR-IOV VF" Revert "docs: Document composable SR-IOV device" virtio-rng: block max-bytes=0 Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/pci/pci.h | 2 | ||||
| -rw-r--r-- | include/hw/pci/pci_device.h | 23 | ||||
| -rw-r--r-- | include/hw/pci/pcie_sriov.h | 27 | ||||
| -rw-r--r-- | include/hw/virtio/virtio-pci.h | 1 |
4 files changed, 7 insertions, 46 deletions
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 14a869eeaa..eb26cac810 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -678,6 +678,6 @@ static inline void pci_irq_pulse(PCIDevice *pci_dev) } MSIMessage pci_get_msi_message(PCIDevice *dev, int vector); -void pci_set_enabled(PCIDevice *pci_dev, bool state); +void pci_set_power(PCIDevice *pci_dev, bool state); #endif diff --git a/include/hw/pci/pci_device.h b/include/hw/pci/pci_device.h index e7e41cb939..15694f2489 100644 --- a/include/hw/pci/pci_device.h +++ b/include/hw/pci/pci_device.h @@ -38,8 +38,6 @@ struct PCIDeviceClass { uint16_t subsystem_id; /* only for header type = 0 */ const char *romfile; /* rom bar */ - - bool sriov_vf_user_creatable; }; enum PCIReqIDType { @@ -59,7 +57,7 @@ typedef struct PCIReqIDCache PCIReqIDCache; struct PCIDevice { DeviceState qdev; bool partially_hotplugged; - bool enabled; + bool has_power; /* PCI config space */ uint8_t *config; @@ -169,8 +167,6 @@ struct PCIDevice { /* ID of standby device in net_failover pair */ char *failover_pair_id; uint32_t acpi_index; - - char *sriov_pf; }; static inline int pci_intx(PCIDevice *pci_dev) @@ -203,7 +199,7 @@ static inline int pci_is_express_downstream_port(const PCIDevice *d) static inline int pci_is_vf(const PCIDevice *d) { - return d->sriov_pf || d->exp.sriov_vf.pf != NULL; + return d->exp.sriov_vf.pf != NULL; } static inline uint32_t pci_config_size(const PCIDevice *d) @@ -216,21 +212,6 @@ static inline uint16_t pci_get_bdf(PCIDevice *dev) return PCI_BUILD_BDF(pci_bus_num(pci_get_bus(dev)), dev->devfn); } -static inline void pci_set_power(PCIDevice *pci_dev, bool state) -{ - /* - * Don't change the enabled state of VFs when powering on/off the device. - * - * When powering on, VFs must not be enabled immediately but they must - * wait until the guest configures SR-IOV. - * When powering off, their corresponding PFs will be reset and disable - * VFs. - */ - if (!pci_is_vf(pci_dev)) { - pci_set_enabled(pci_dev, state); - } -} - uint16_t pci_requester_id(PCIDevice *dev); /* DMA access functions */ diff --git a/include/hw/pci/pcie_sriov.h b/include/hw/pci/pcie_sriov.h index f75b8f22ee..450cbef6c2 100644 --- a/include/hw/pci/pcie_sriov.h +++ b/include/hw/pci/pcie_sriov.h @@ -16,9 +16,10 @@ #include "hw/pci/pci.h" typedef struct PCIESriovPF { + uint16_t num_vfs; /* Number of virtual functions created */ uint8_t vf_bar_type[PCI_NUM_REGIONS]; /* Store type for each VF bar */ + const char *vfname; /* Reference to the device type used for the VFs */ PCIDevice **vf; /* Pointer to an array of num_vfs VF devices */ - bool vf_user_created; /* If VFs are created by user */ } PCIESriovPF; typedef struct PCIESriovVF { @@ -26,11 +27,10 @@ typedef struct PCIESriovVF { uint16_t vf_number; /* Logical VF number of this function */ } PCIESriovVF; -bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, +void pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, const char *vfname, uint16_t vf_dev_id, uint16_t init_vfs, uint16_t total_vfs, - uint16_t vf_offset, uint16_t vf_stride, - Error **errp); + uint16_t vf_offset, uint16_t vf_stride); void pcie_sriov_pf_exit(PCIDevice *dev); /* Set up a VF bar in the SR/IOV bar area */ @@ -41,23 +41,6 @@ void pcie_sriov_pf_init_vf_bar(PCIDevice *dev, int region_num, void pcie_sriov_vf_register_bar(PCIDevice *dev, int region_num, MemoryRegion *memory); -/** - * pcie_sriov_pf_init_from_user_created_vfs() - Initialize PF with user-created - * VFs. - * @dev: A PCIe device being realized. - * @offset: The offset of the SR-IOV capability. - * @errp: pointer to Error*, to store an error if it happens. - * - * Return: The size of added capability. 0 if the user did not create VFs. - * -1 if failed. - */ -int16_t pcie_sriov_pf_init_from_user_created_vfs(PCIDevice *dev, - uint16_t offset, - Error **errp); - -bool pcie_sriov_register_device(PCIDevice *dev, Error **errp); -void pcie_sriov_unregister_device(PCIDevice *dev); - /* * Default (minimal) page size support values * as required by the SR/IOV standard: @@ -75,8 +58,6 @@ void pcie_sriov_pf_add_sup_pgsize(PCIDevice *dev, uint16_t opt_sup_pgsize); void pcie_sriov_config_write(PCIDevice *dev, uint32_t address, uint32_t val, int len); -void pcie_sriov_pf_post_load(PCIDevice *dev); - /* Reset SR/IOV */ void pcie_sriov_pf_reset(PCIDevice *dev); diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h index 34539f2f67..9e67ba38c7 100644 --- a/include/hw/virtio/virtio-pci.h +++ b/include/hw/virtio/virtio-pci.h @@ -152,7 +152,6 @@ struct VirtIOPCIProxy { uint32_t modern_io_bar_idx; uint32_t modern_mem_bar_idx; int config_cap; - uint16_t last_pcie_cap_offset; uint32_t flags; bool disable_modern; bool ignore_backend_features; |