diff options
| author | Stefan Hajnoczi <stefanha@redhat.com> | 2023-09-13 07:52:43 -0400 |
|---|---|---|
| committer | Stefan Hajnoczi <stefanha@redhat.com> | 2023-09-13 07:52:43 -0400 |
| commit | 9a8af699677cdf58e92ff43f38ea74bbe9d37ab0 (patch) | |
| tree | 8a4c57b097425bc1f17956fecc098914d5267a71 /linux-headers/asm-riscv/kvm.h | |
| parent | 7754c97179a40c563935b7610aa3146291abefcc (diff) | |
| parent | 82fdcd3e140c8d4c63f177ece554f90f2bccdf68 (diff) | |
| download | focaccia-qemu-9a8af699677cdf58e92ff43f38ea74bbe9d37ab0.tar.gz focaccia-qemu-9a8af699677cdf58e92ff43f38ea74bbe9d37ab0.zip | |
Merge tag 'pull-request-2023-09-12' of https://gitlab.com/thuth/qemu into staging
* Enable AP (crypto adapter) instructions for s390x PV-guests * Allow NVME for s390x machines * Update Linux headers to v6.6-rc1 # -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmUATY8RHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbVjBhAAlfXhQuxFdSRkPLyPgSuAInGTZfsW7A56 # 6vunyzP3ZyY5G0WtbgKZ5ovDIfjzlNYvkxWmQ4m4PWEY2JaBKOqeS9+lFkdZmGD9 # Sj1u+EereQS5MsJ31Vg2LHDKv5QbtNbVOq4KIm30qpzj1OfhfZzzqU0tGnaDlz/T # PW2bSQl4cGHExcYpprWx02cXsMnodWwGV2FTgtc9D42YyE1q5IDX8phjFFzUHfcQ # p3cjM0S2M8KOGJ5+0w2/0C4DEKgLH0OuA/JY3W+f94O+jdqoYUJpom4m6FywIKrr # 38c7UqQESh7r/te1UkgvxfVCbTlptsS21xQNbsa+TS/apP6IMU7VJI3N14Qshtba # cqcP54aGC+9v5FRz7E5njCJWJQv9JWInrKYTEEtSTFCguGCQO2owulba70MNrQc8 # hQkBXOzqnqYVxdktcHkbnq6QZoKLfsGAxfarQPPJySNUyGgoaM0JFlzp3z0hjAHY # aGRZdN4kU+hF7/0RQygYDN4AzTQhn3EMZ6q6o81xVeKzfbziA3fCLXX5J1bd+rO8 # 3LKPrmOuk3dadRVlVTyFrtlG9SEMRen8dh12oru28ebW2WTeYm71zQf7SCPGzaKE # hJMtlN7B9ogGxDpLJvTDLHbKNbwyIcW00GjyWiUwBg88ACg63tulD2kpUxBs2PwF # bVk/lIWMqL0= # =zeRZ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 12 Sep 2023 07:37:51 EDT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2023-09-12' of https://gitlab.com/thuth/qemu: tests/qtest/pflash: Clean up local variable shadowing kconfig: Add NVME to s390x machines target/s390x: AP-passthrough for PV guests target/s390x/kvm: Refactor AP functionalities linux-headers: Update to Linux v6.6-rc1 s390x: do a subsystem reset before the unprotect on reboot s390x/ap: fix missing subsystem reset registration Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'linux-headers/asm-riscv/kvm.h')
| -rw-r--r-- | linux-headers/asm-riscv/kvm.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/linux-headers/asm-riscv/kvm.h b/linux-headers/asm-riscv/kvm.h index 930fdc4101..992c5e4071 100644 --- a/linux-headers/asm-riscv/kvm.h +++ b/linux-headers/asm-riscv/kvm.h @@ -55,6 +55,7 @@ struct kvm_riscv_config { unsigned long marchid; unsigned long mimpid; unsigned long zicboz_block_size; + unsigned long satp_mode; }; /* CORE registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */ @@ -124,6 +125,12 @@ enum KVM_RISCV_ISA_EXT_ID { KVM_RISCV_ISA_EXT_SSAIA, KVM_RISCV_ISA_EXT_V, KVM_RISCV_ISA_EXT_SVNAPOT, + KVM_RISCV_ISA_EXT_ZBA, + KVM_RISCV_ISA_EXT_ZBS, + KVM_RISCV_ISA_EXT_ZICNTR, + KVM_RISCV_ISA_EXT_ZICSR, + KVM_RISCV_ISA_EXT_ZIFENCEI, + KVM_RISCV_ISA_EXT_ZIHPM, KVM_RISCV_ISA_EXT_MAX, }; @@ -193,6 +200,15 @@ enum KVM_RISCV_SBI_EXT_ID { /* ISA Extension registers are mapped as type 7 */ #define KVM_REG_RISCV_ISA_EXT (0x07 << KVM_REG_RISCV_TYPE_SHIFT) +#define KVM_REG_RISCV_ISA_SINGLE (0x0 << KVM_REG_RISCV_SUBTYPE_SHIFT) +#define KVM_REG_RISCV_ISA_MULTI_EN (0x1 << KVM_REG_RISCV_SUBTYPE_SHIFT) +#define KVM_REG_RISCV_ISA_MULTI_DIS (0x2 << KVM_REG_RISCV_SUBTYPE_SHIFT) +#define KVM_REG_RISCV_ISA_MULTI_REG(__ext_id) \ + ((__ext_id) / __BITS_PER_LONG) +#define KVM_REG_RISCV_ISA_MULTI_MASK(__ext_id) \ + (1UL << ((__ext_id) % __BITS_PER_LONG)) +#define KVM_REG_RISCV_ISA_MULTI_REG_LAST \ + KVM_REG_RISCV_ISA_MULTI_REG(KVM_RISCV_ISA_EXT_MAX - 1) /* SBI extension registers are mapped as type 8 */ #define KVM_REG_RISCV_SBI_EXT (0x08 << KVM_REG_RISCV_TYPE_SHIFT) |