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authorRichard Henderson <richard.henderson@linaro.org>2025-07-28 13:33:18 -1000
committerRichard Henderson <richard.henderson@linaro.org>2025-08-28 06:39:25 +1000
commite17cc00f7195f387720cd839dcb83fd17c2147c9 (patch)
treea1fb9e78a1ee7867244b7e89e9f79e703891aa08 /linux-user/mips/cpu_loop.c
parenta2c83f5156324b88cf5c92ed777648fc1aaccf7f (diff)
downloadfocaccia-qemu-e17cc00f7195f387720cd839dcb83fd17c2147c9.tar.gz
focaccia-qemu-e17cc00f7195f387720cd839dcb83fd17c2147c9.zip
linux-user/mips: Create init_main_thread
Merge init_thread and target_cpu_copy_regs.
There's no point going through a target_pt_regs intermediate.

Note that init_thread had set cp0_status in target_pt_regs, but
target_cpu_copy_regs did not copy to env.  This turns out to be
ok because mips_cpu_reset_hold initializes CP0_Status properly.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to '')
-rw-r--r--linux-user/mips/cpu_loop.c16
1 files changed, 6 insertions, 10 deletions
diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c
index 6405806eb0..e67b8a2e46 100644
--- a/linux-user/mips/cpu_loop.c
+++ b/linux-user/mips/cpu_loop.c
@@ -211,12 +211,9 @@ done_syscall:
     }
 }
 
-void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs)
+void init_main_thread(CPUState *cs, struct image_info *info)
 {
-    CPUState *cpu = env_cpu(env);
-    TaskState *ts = get_task_state(cpu);
-    struct image_info *info = ts->info;
-    int i;
+    CPUArchState *env = cpu_env(cs);
 
     struct mode_req {
         bool single;
@@ -245,12 +242,11 @@ void target_cpu_copy_regs(CPUArchState *env, target_pt_regs *regs)
 
     struct mode_req prog_req;
     struct mode_req interp_req;
+    target_ulong entry = info->entry;
 
-    for(i = 0; i < 32; i++) {
-        env->active_tc.gpr[i] = regs->regs[i];
-    }
-    env->active_tc.PC = regs->cp0_epc & ~(target_ulong)1;
-    if (regs->cp0_epc & 1) {
+    env->active_tc.gpr[29] = info->start_stack;
+    env->active_tc.PC = entry & ~(target_ulong)1;
+    if (entry & 1) {
         env->hflags |= MIPS_HFLAG_M16;
     }