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| author | Richard Henderson <richard.henderson@linaro.org> | 2021-09-14 20:33:23 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-11-02 07:00:52 -0400 |
| commit | 12f0bc55791bd6e0864a430a0c3c9518ae7622e8 (patch) | |
| tree | 23a824020ae543fe3ced41313a90ed5376ce725f /linux-user/openrisc/cpu_loop.c | |
| parent | d315712b69fa34c27d09d425ca5951a08b07ade8 (diff) | |
| download | focaccia-qemu-12f0bc55791bd6e0864a430a0c3c9518ae7622e8.tar.gz focaccia-qemu-12f0bc55791bd6e0864a430a0c3c9518ae7622e8.zip | |
target/openrisc: Make openrisc_cpu_tlb_fill sysemu only
The fallback code in cpu_loop_exit_sigsegv is sufficient for openrisc linux-user. This makes all of the code in mmu.c sysemu only, so remove the ifdefs and move the file to openrisc_softmmu_ss. Remove the code from cpu_loop that handled EXCP_DPF. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'linux-user/openrisc/cpu_loop.c')
| -rw-r--r-- | linux-user/openrisc/cpu_loop.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/linux-user/openrisc/cpu_loop.c b/linux-user/openrisc/cpu_loop.c index 10b7147f68..3cfdbbf037 100644 --- a/linux-user/openrisc/cpu_loop.c +++ b/linux-user/openrisc/cpu_loop.c @@ -54,14 +54,6 @@ void cpu_loop(CPUOpenRISCState *env) cpu_set_gpr(env, 11, ret); } break; - case EXCP_DPF: - case EXCP_IPF: - info.si_signo = TARGET_SIGSEGV; - info.si_errno = 0; - info.si_code = TARGET_SEGV_MAPERR; - info._sifields._sigfault._addr = env->pc; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - break; case EXCP_ALIGN: info.si_signo = TARGET_SIGBUS; info.si_errno = 0; |