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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-04-28 01:10:55 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2022-06-28 04:35:07 +0530 |
| commit | ed3a06b10a6abb53589d794ed23accf21be05633 (patch) | |
| tree | 78e7bb0e6c8432afd1e985f3e8a156402f2821df /linux-user/riscv/cpu_loop.c | |
| parent | 4cfeff4ac16bf5e3e1df44d5561b83e3bd3aab6c (diff) | |
| download | focaccia-qemu-ed3a06b10a6abb53589d794ed23accf21be05633.tar.gz focaccia-qemu-ed3a06b10a6abb53589d794ed23accf21be05633.zip | |
semihosting: Return void from do_common_semihosting
Perform the cleanup in the FIXME comment in common_semi_gdb_syscall. Do not modify guest registers until the syscall is complete, which in the gdbstub case is asynchronous. In the synchronous non-gdbstub case, use common_semi_set_ret to set the result. Merge set_swi_errno into common_semi_cb. Rely on the latter for combined return value / errno setting. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'linux-user/riscv/cpu_loop.c')
| -rw-r--r-- | linux-user/riscv/cpu_loop.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index 29084c1421..bffca7db12 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -81,7 +81,7 @@ void cpu_loop(CPURISCVState *env) force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->pc); break; case RISCV_EXCP_SEMIHOST: - env->gpr[xA0] = do_common_semihosting(cs); + do_common_semihosting(cs); env->pc += 4; break; default: |