Merge tag 'pull-lu-20250828' of https://gitlab.com/rth7680/qemu into staging

linux-user: do not print IP socket options by default
linux-user: Add strace for rseq
linux-user: Move get_elf_cpu_model to target/elfload.c
linux-user: Move get_elf_hwcap to target/elfload.c
linux-user: Move get_elf_hwcap2 to target/elfload.c
linux-user: Move get_elf_platform to target/elfload.c
linux-user: Move get_elf_base_platform to target/elfload.c
linux-user: Create init_main_thread in target/cpu_loop.c
semihosting: Retrieve stack top from image_info
semihosting: Initialize heap once per process

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* tag 'pull-lu-20250828' of https://gitlab.com/rth7680/qemu: (46 commits)
  linux-user: do not print IP socket options by default
  linux-user: Add strace for rseq
  linux-user: Remove do_init_main_thread
  linux-user/hexagon: Create init_main_thread
  linux-user/xtensa: Create init_main_thread
  linux-user/hppa: Create init_main_thread
  linux-user/riscv: Create init_main_thread
  linux-user/s390x: Create init_main_thread
  linux-user/alpha: Create init_main_thread
  linux-user/m68k: Create init_main_thread
  linux-user/sh4: Create init_main_thread
  linux-user/openrisc: Create init_main_thread
  linux-user/microblaze: Create init_main_thread
  linux-user/mips: Create init_main_thread
  linux-user/loongarch64: Create init_main_thread
  linux-user/ppc: Create init_main_thread
  linux-user/sparc: Create init_main_thread
  linux-user/aarch64: Create init_main_thread
  linux-user/arm: Remove a.out startup remenents
  linux-user/arm: Create init_main_thread
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

1 files changed, 42 insertions, 0 deletions

diff --git a/linux-user/sparc/elfload.c b/linux-user/sparc/elfload.c
new file mode 100644
index 0000000000..32ca1b05b1
--- /dev/null
+++ b/linux-user/sparc/elfload.c
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include "qemu/osdep.h"
+#include "qemu.h"
+#include "loader.h"
+#include "elf.h"
+
+
+const char *get_elf_cpu_model(uint32_t eflags)
+{
+#ifdef TARGET_SPARC64
+    return "TI UltraSparc II";
+#else
+    return "Fujitsu MB86904";
+#endif
+}
+
+abi_ulong get_elf_hwcap(CPUState *cs)
+{
+    /* There are not many sparc32 hwcap bits -- we have all of them. */
+    uint32_t r = HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR |
+                 HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV;
+
+#ifdef TARGET_SPARC64
+    CPUSPARCState *env = cpu_env(cs);
+    uint32_t features = env->def.features;
+
+    r |= HWCAP_SPARC_V9 | HWCAP_SPARC_V8PLUS;
+    /* 32x32 multiply and divide are efficient. */
+    r |= HWCAP_SPARC_MUL32 | HWCAP_SPARC_DIV32;
+    /* We don't have an internal feature bit for this. */
+    r |= HWCAP_SPARC_POPC;
+    r |= features & CPU_FEATURE_FSMULD ? HWCAP_SPARC_FSMULD : 0;
+    r |= features & CPU_FEATURE_VIS1 ? HWCAP_SPARC_VIS : 0;
+    r |= features & CPU_FEATURE_VIS2 ? HWCAP_SPARC_VIS2 : 0;
+    r |= features & CPU_FEATURE_FMAF ? HWCAP_SPARC_FMAF : 0;
+    r |= features & CPU_FEATURE_VIS3 ? HWCAP_SPARC_VIS3 : 0;
+    r |= features & CPU_FEATURE_IMA ? HWCAP_SPARC_IMA : 0;
+#endif
+
+    return r;
+}