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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-08-16 19:03:04 +0100 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-08-26 17:02:01 +0100 |
| commit | cc7613bfaa1f653a6eb6ff50ac45d5c5fd717052 (patch) | |
| tree | 542ec7f1f8e56ec4555ecd4c8fa3c4a173b6632e /python/qemu/machine/qtest.py | |
| parent | 665cddbe15fdc5f5c66caac62472bd5af1e23e10 (diff) | |
| download | focaccia-qemu-cc7613bfaa1f653a6eb6ff50ac45d5c5fd717052.tar.gz focaccia-qemu-cc7613bfaa1f653a6eb6ff50ac45d5c5fd717052.zip | |
target/arm: Implement HSTR.TTEE
In v7, the HSTR register has a TTEE bit which allows EL0/EL1 accesses to the Thumb2EE TEECR and TEEHBR registers to be trapped to the hypervisor. Implement these traps. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210816180305.20137-2-peter.maydell@linaro.org
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