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| author | Peter Maydell <peter.maydell@linaro.org> | 2019-05-24 13:48:29 +0100 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-06-13 15:14:03 +0100 |
| commit | 97fb318d37be4d21125e89c96e4e92ea33beac51 (patch) | |
| tree | 68e4701de052865806211c25c3cc2a443e39aaae /scripts/decodetree.py | |
| parent | fc1120a7f5f2d4b601003205c598077d3eb11ad2 (diff) | |
| download | focaccia-qemu-97fb318d37be4d21125e89c96e4e92ea33beac51.tar.gz focaccia-qemu-97fb318d37be4d21125e89c96e4e92ea33beac51.zip | |
hw/arm/smmuv3: Fix decoding of ID register range
The SMMUv3 ID registers cover an area 0x30 bytes in size (12 registers, 4 bytes each). We were incorrectly decoding only the first 0x20 bytes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20190524124829.2589-1-peter.maydell@linaro.org
Diffstat (limited to 'scripts/decodetree.py')
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