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authorFredrik Noring <noring@nocrew.org>2019-01-17 18:44:05 +0100
committerAleksandar Markovic <amarkovic@wavecomp.com>2019-01-18 16:53:28 +0100
commita168a796e1c251787fcdf2d9ca1e9e69cb86ffcd (patch)
tree3ce5635f8ee58d3e45ee71d21c1c325d62a7020b /scripts/qapi/events.py
parent294fc2ea7f8af913523bf004433704377d9ee7a8 (diff)
downloadfocaccia-qemu-a168a796e1c251787fcdf2d9ca1e9e69cb86ffcd.tar.gz
focaccia-qemu-a168a796e1c251787fcdf2d9ca1e9e69cb86ffcd.zip
target/mips: Introduce 32 R5900 multimedia registers
The 32 R5900 128-bit registers are split into two 64-bit halves:
the lower halves are the GPRs and the upper halves are accessible
by the R5900-specific multimedia instructions.

Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
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