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authorRichard Henderson <richard.henderson@linaro.org>2024-05-03 08:13:51 -0700
committerRichard Henderson <richard.henderson@linaro.org>2024-05-03 08:13:51 -0700
commit909aff7eaf6335aeeb4962fb0ac2a6c571c96af2 (patch)
tree6da740ce80908710c400399e25b784660d59386c /scripts/qapi/visit.py
parent4977ce198d2390bff8c71ad5cb1a5f6aa24b56fb (diff)
parenta06d9eddb015a9f5895161b0a3958a2e4be21579 (diff)
downloadfocaccia-qemu-909aff7eaf6335aeeb4962fb0ac2a6c571c96af2.tar.gz
focaccia-qemu-909aff7eaf6335aeeb4962fb0ac2a6c571c96af2.zip
Merge tag 'pull-misc-20240503' of https://gitlab.com/rth7680/qemu into staging
util/bufferiszero:
  - Remove sse4.1 and avx512 variants
  - Reorganize for early test for acceleration
  - Remove useless prefetches
  - Optimize sse2, avx2 and integer variants
  - Add simd acceleration for aarch64
  - Add bufferiszero-bench

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* tag 'pull-misc-20240503' of https://gitlab.com/rth7680/qemu:
  tests/bench: Add bufferiszero-bench
  util/bufferiszero: Add simd acceleration for aarch64
  util/bufferiszero: Simplify test_buffer_is_zero_next_accel
  util/bufferiszero: Introduce biz_accel_fn typedef
  util/bufferiszero: Improve scalar variant
  util/bufferiszero: Optimize SSE2 and AVX2 variants
  util/bufferiszero: Remove useless prefetches
  util/bufferiszero: Reorganize for early test for acceleration
  util/bufferiszero: Remove AVX512 variant
  util/bufferiszero: Remove SSE4.1 variant

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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