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| author | Peter Maydell <peter.maydell@linaro.org> | 2016-09-16 16:54:50 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-09-16 16:54:50 +0100 |
| commit | e3571ae30cd26d19efd4554c25e32ef64d6a36b3 (patch) | |
| tree | b753d7c12df7c6c955bc93e3947c97cd7428125b /target-arm/helper.c | |
| parent | ebc231d7daf1f41b23d8b6a6d1234800b86e5fe2 (diff) | |
| parent | 34f939218ce78163171addd63750e1e0300376ab (diff) | |
| download | focaccia-qemu-e3571ae30cd26d19efd4554c25e32ef64d6a36b3.tar.gz focaccia-qemu-e3571ae30cd26d19efd4554c25e32ef64d6a36b3.zip | |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20160916' into staging
tcg queued patches # gpg: Signature made Fri 16 Sep 2016 16:14:20 BST # gpg: using RSA key 0xAD1270CC4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" # Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B * remotes/rth/tags/pull-tcg-20160916: tcg: Optimize fence instructions target-i386: Generate fences for x86 target-aarch64: Generate fences for aarch64 target-arm: Generate fences in ARMv7 frontend target-alpha: Generate fence op tcg/tci: Add support for fence tcg/sparc: Add support for fence tcg/s390: Add support for fence tcg/ppc: Add support for fence tcg/mips: Add support for fence tcg/ia64: Add support for fence tcg/arm: Add support for fence tcg/aarch64: Add support for fence tcg/i386: Add support for fence Introduce TCGOpcode for memory barrier cpu-exec: Check -dfilter for -d cpu tcg: Merge GETPC and GETRA tcg: Support arbitrary size + alignment Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/helper.c')
| -rw-r--r-- | target-arm/helper.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index 5484c15d1a..25f612d493 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -8310,12 +8310,12 @@ void HELPER(dc_zva)(CPUARMState *env, uint64_t vaddr_in) * this purpose use the actual register value passed to us * so that we get the fault address right. */ - helper_ret_stb_mmu(env, vaddr_in, 0, oi, GETRA()); + helper_ret_stb_mmu(env, vaddr_in, 0, oi, GETPC()); /* Now we can populate the other TLB entries, if any */ for (i = 0; i < maxidx; i++) { uint64_t va = vaddr + TARGET_PAGE_SIZE * i; if (va != (vaddr_in & TARGET_PAGE_MASK)) { - helper_ret_stb_mmu(env, va, 0, oi, GETRA()); + helper_ret_stb_mmu(env, va, 0, oi, GETPC()); } } } @@ -8332,7 +8332,7 @@ void HELPER(dc_zva)(CPUARMState *env, uint64_t vaddr_in) * bounce buffer was in use */ for (i = 0; i < blocklen; i++) { - helper_ret_stb_mmu(env, vaddr + i, 0, oi, GETRA()); + helper_ret_stb_mmu(env, vaddr + i, 0, oi, GETPC()); } } #else |