summary refs log tree commit diff stats
path: root/target/arm/cpu-features.h
diff options
context:
space:
mode:
authorRichard Henderson <richard.henderson@linaro.org>2025-08-30 15:40:16 +1000
committerPeter Maydell <peter.maydell@linaro.org>2025-09-16 17:31:53 +0100
commit2b5daf79c32656264a23104c0693aa89c528cff8 (patch)
tree185cc2ecbd394beb379054571b268704d4681eb1 /target/arm/cpu-features.h
parent171a302a041ed5532d997d40bb50f39b2b9435a3 (diff)
downloadfocaccia-qemu-2b5daf79c32656264a23104c0693aa89c528cff8.tar.gz
focaccia-qemu-2b5daf79c32656264a23104c0693aa89c528cff8.zip
target/arm: Implement FEAT_ATS1A
Implement FEAT_ATS1A and enable for -cpu max.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250830054128.448363-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu-features.h')
-rw-r--r--target/arm/cpu-features.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h
index e49e0ae3af..512eeaf551 100644
--- a/target/arm/cpu-features.h
+++ b/target/arm/cpu-features.h
@@ -619,6 +619,11 @@ static inline bool isar_feature_aa64_lut(const ARMISARegisters *id)
     return FIELD_EX64_IDREG(id, ID_AA64ISAR2, LUT);
 }
 
+static inline bool isar_feature_aa64_ats1a(const ARMISARegisters *id)
+{
+    return FIELD_EX64_IDREG(id, ID_AA64ISAR2, ATS1A);
+}
+
 static inline bool isar_feature_aa64_fp_simd(const ARMISARegisters *id)
 {
     /* We always set the AdvSIMD and FP fields identically.  */