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authorPeter Maydell <peter.maydell@linaro.org>2017-06-02 11:51:48 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-06-02 11:51:48 +0100
commit790a11503cfb5e1dcd031ea2212bbebae4ca3cec (patch)
tree5f72294b16a958db8c428a243f74f4d809386554 /target/arm/cpu.c
parent3a00d560bcfca7ad04327062c1986a016c104b1f (diff)
downloadfocaccia-qemu-790a11503cfb5e1dcd031ea2212bbebae4ca3cec.tar.gz
focaccia-qemu-790a11503cfb5e1dcd031ea2212bbebae4ca3cec.zip
arm: All M profile cores are PMSA
All M profile CPUs are PMSA, so set the feature bit.
(We haven't actually implemented the M profile MPU register
interface yet, but setting this feature bit gives us closer
to correct behaviour for the MPU-disabled case.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1493122030-32191-11-git-send-email-peter.maydell@linaro.org
Diffstat (limited to '')
-rw-r--r--target/arm/cpu.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 76a5e20111..e748097860 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -550,6 +550,14 @@ static void arm_cpu_post_init(Object *obj)
 {
     ARMCPU *cpu = ARM_CPU(obj);
 
+    /* M profile implies PMSA. We have to do this here rather than
+     * in realize with the other feature-implication checks because
+     * we look at the PMSA bit to see if we should add some properties.
+     */
+    if (arm_feature(&cpu->env, ARM_FEATURE_M)) {
+        set_feature(&cpu->env, ARM_FEATURE_PMSA);
+    }
+
     if (arm_feature(&cpu->env, ARM_FEATURE_CBAR) ||
         arm_feature(&cpu->env, ARM_FEATURE_CBAR_RO)) {
         qdev_property_add_static(DEVICE(obj), &arm_cpu_reset_cbar_property,