diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2022-04-26 21:23:12 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-05-05 09:35:50 +0100 |
| commit | cda86e2b46de857e8b6e16ecd13bb85d81e07899 (patch) | |
| tree | bf6320cd591e079db6260b53488740dd79040376 /target/arm/cpu.c | |
| parent | 1fba9dc71a170b3a05b9d3272dd8ecfe7f26e215 (diff) | |
| download | focaccia-qemu-cda86e2b46de857e8b6e16ecd13bb85d81e07899.tar.gz focaccia-qemu-cda86e2b46de857e8b6e16ecd13bb85d81e07899.zip | |
target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user
This controls whether the PACI{A,B}SP instructions trap with BTYPE=3
(indirect branch from register other than x16/x17). The linux kernel
sets this in bti_enable().
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/998
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20220427042312.294300-1-richard.henderson@linaro.org
[PMM: remove stray change to makefile comment]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.c')
| -rw-r--r-- | target/arm/cpu.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index e46a766d77..2b81b18351 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -197,6 +197,8 @@ static void arm_cpu_reset(DeviceState *dev) /* Enable all PAC keys. */ env->cp15.sctlr_el[1] |= (SCTLR_EnIA | SCTLR_EnIB | SCTLR_EnDA | SCTLR_EnDB); + /* Trap on btype=3 for PACIxSP. */ + env->cp15.sctlr_el[1] |= SCTLR_BT0; /* and to the FP/Neon instructions */ env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 20, 2, 3); /* and to the SVE instructions */ |