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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-03-01 11:59:50 -1000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-03-02 19:27:37 +0000 |
| commit | 7a928f43d8724bdf0777d7fc67a5ad973a0bf4bf (patch) | |
| tree | bda1102a1e105baa0947a7fb761fba733834e7af /target/arm/helper.c | |
| parent | 0af312b6edd231e1c8d0dec12494a80bc39ac761 (diff) | |
| download | focaccia-qemu-7a928f43d8724bdf0777d7fc67a5ad973a0bf4bf.tar.gz focaccia-qemu-7a928f43d8724bdf0777d7fc67a5ad973a0bf4bf.zip | |
target/arm: Implement FEAT_LPA
This feature widens physical addresses (and intermediate physical addresses for 2-stage translation) from 48 to 52 bits, when using 64k pages. The only thing left at this point is to handle the extra bits in the TTBR and in the table descriptors. Note that PAR_EL1 and HPFAR_EL2 are nominally extended, but we don't mask out the high bits when writing to those registers, so no changes are required there. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220301215958.157011-11-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to '')
| -rw-r--r-- | target/arm/helper.c | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 28b4347213..950f56599e 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11173,6 +11173,7 @@ static const uint8_t pamax_map[] = { [3] = 42, [4] = 44, [5] = 48, + [6] = 52, }; /* The cpu-specific constant value of PAMax; also used by hw/arm/virt. */ @@ -11564,11 +11565,15 @@ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address, descaddr = extract64(ttbr, 0, 48); /* - * If the base address is out of range, raise AddressSizeFault. + * For FEAT_LPA and PS=6, bits [51:48] of descaddr are in [5:2] of TTBR. + * + * Otherwise, if the base address is out of range, raise AddressSizeFault. * In the pseudocode, this is !IsZero(baseregister<47:outputsize>), * but we've just cleared the bits above 47, so simplify the test. */ - if (descaddr >> outputsize) { + if (outputsize > 48) { + descaddr |= extract64(ttbr, 2, 4) << 48; + } else if (descaddr >> outputsize) { level = 0; fault_type = ARMFault_AddressSize; goto do_fault; @@ -11620,7 +11625,15 @@ static bool get_phys_addr_lpae(CPUARMState *env, uint64_t address, } descaddr = descriptor & descaddrmask; - if (descaddr >> outputsize) { + + /* + * For FEAT_LPA and PS=6, bits [51:48] of descaddr are in [15:12] + * of descriptor. Otherwise, if descaddr is out of range, raise + * AddressSizeFault. + */ + if (outputsize > 48) { + descaddr |= extract64(descriptor, 12, 4) << 48; + } else if (descaddr >> outputsize) { fault_type = ARMFault_AddressSize; goto do_fault; } |