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authorAlex Bennée <alex.bennee@linaro.org>2019-02-15 09:56:38 +0000
committerPeter Maydell <peter.maydell@linaro.org>2019-02-15 09:56:38 +0000
commitb5bd7440422bb66deaceb812bb9287a6a3cdf10c (patch)
tree91210051e97d3019452d27365229de29dd73195a /target/arm/helper.c
parentabd5abc58c5d4c9bd23427b0998a44eb87ed47a2 (diff)
downloadfocaccia-qemu-b5bd7440422bb66deaceb812bb9287a6a3cdf10c.tar.gz
focaccia-qemu-b5bd7440422bb66deaceb812bb9287a6a3cdf10c.zip
target/arm: relax permission checks for HWCAP_CPUID registers
Although technically not visible to userspace the kernel does make
them visible via a trap and emulate ABI. We provide a new permission
mask (PL0U_R) which maps to PL0_R for CONFIG_USER builds and adjust
the minimum permission check accordingly.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20190205190224.2198-2-alex.bennee@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to '')
-rw-r--r--target/arm/helper.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c
index e1ef2f3523..88cf497603 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6857,7 +6857,11 @@ void define_one_arm_cp_reg_with_opaque(ARMCPU *cpu,
     if (r->state != ARM_CP_STATE_AA32) {
         int mask = 0;
         switch (r->opc1) {
-        case 0: case 1: case 2:
+        case 0:
+            /* min_EL EL1, but some accessible to EL0 via kernel ABI */
+            mask = PL0U_R | PL1_RW;
+            break;
+        case 1: case 2:
             /* min_EL EL1 */
             mask = PL1_RW;
             break;