diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2024-12-21 16:50:26 +0000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-12-24 08:32:15 -0800 |
| commit | e4a8e093dc74be049f4829831dce76e5edab0003 (patch) | |
| tree | 20354b9913086ac3a535e06e4d28057f88710d14 /target/avr/cpu.c | |
| parent | 59abfb444e1d9654e15f85c50d09a3366e4c1c1e (diff) | |
| download | focaccia-qemu-e4a8e093dc74be049f4829831dce76e5edab0003.tar.gz focaccia-qemu-e4a8e093dc74be049f4829831dce76e5edab0003.zip | |
accel/tcg: Move gen_intermediate_code to TCGCPUOps.translate_core
Convert all targets simultaneously, as the gen_intermediate_code function disappears from the target. While there are possible workarounds, they're larger than simply performing the conversion. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/avr/cpu.c')
| -rw-r--r-- | target/avr/cpu.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 2dccb09c5e..8a126ff322 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -207,6 +207,7 @@ static const struct SysemuCPUOps avr_sysemu_ops = { static const TCGCPUOps avr_tcg_ops = { .initialize = avr_cpu_tcg_init, + .translate_code = avr_cpu_translate_code, .synchronize_from_tb = avr_cpu_synchronize_from_tb, .restore_state_to_opc = avr_restore_state_to_opc, .cpu_exec_interrupt = avr_cpu_exec_interrupt, |