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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-01-29 17:45:00 +0100 |
|---|---|---|
| committer | Thomas Huth <thuth@redhat.com> | 2024-03-12 12:04:24 +0100 |
| commit | 4c44a9805127d8f6f065d40fd9f9c65fcf75bcc2 (patch) | |
| tree | 2248f4de779c6e3bc2186cf6f4021191eb7d69a1 /target/mips/cpu.c | |
| parent | da9536433fe9d35363fea26cee7f2de93c007ec2 (diff) | |
| download | focaccia-qemu-4c44a9805127d8f6f065d40fd9f9c65fcf75bcc2.tar.gz focaccia-qemu-4c44a9805127d8f6f065d40fd9f9c65fcf75bcc2.zip | |
target/mips: Prefer fast cpu_env() over slower CPU QOM cast macro
Mechanical patch produced running the command documented in scripts/coccinelle/cpu_env.cocci_template header. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240129164514.73104-19-philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
Diffstat (limited to 'target/mips/cpu.c')
| -rw-r--r-- | target/mips/cpu.c | 15 |
1 files changed, 4 insertions, 11 deletions
diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 98ef073631..8d8f690a53 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -80,8 +80,7 @@ static void fpu_dump_state(CPUMIPSState *env, FILE *f, int flags) static void mips_cpu_dump_state(CPUState *cs, FILE *f, int flags) { - MIPSCPU *cpu = MIPS_CPU(cs); - CPUMIPSState *env = &cpu->env; + CPUMIPSState *env = cpu_env(cs); int i; qemu_fprintf(f, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx @@ -123,9 +122,7 @@ void cpu_set_exception_base(int vp_index, target_ulong address) static void mips_cpu_set_pc(CPUState *cs, vaddr value) { - MIPSCPU *cpu = MIPS_CPU(cs); - - mips_env_set_pc(&cpu->env, value); + mips_env_set_pc(cpu_env(cs), value); } static vaddr mips_cpu_get_pc(CPUState *cs) @@ -137,8 +134,7 @@ static vaddr mips_cpu_get_pc(CPUState *cs) static bool mips_cpu_has_work(CPUState *cs) { - MIPSCPU *cpu = MIPS_CPU(cs); - CPUMIPSState *env = &cpu->env; + CPUMIPSState *env = cpu_env(cs); bool has_work = false; /* @@ -433,10 +429,7 @@ static void mips_cpu_reset_hold(Object *obj) static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) { - MIPSCPU *cpu = MIPS_CPU(s); - CPUMIPSState *env = &cpu->env; - - if (!(env->insn_flags & ISA_NANOMIPS32)) { + if (!(cpu_env(s)->insn_flags & ISA_NANOMIPS32)) { #if TARGET_BIG_ENDIAN info->print_insn = print_insn_big_mips; #else |