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authorLeon Alrae <leon.alrae@imgtec.com>2019-02-11 16:09:23 +0100
committerAleksandar Markovic <amarkovic@wavecomp.com>2019-02-14 17:47:28 +0100
commit33a07fa2db66376e6ee780d4a8b064dc5118cf34 (patch)
tree67abf3dfc5fb163e7437f697480eeccb489cf536 /target/mips/helper.c
parentc7c7e1e9a5e3f0a8a1dbff6e4ccfd21c2dc9f845 (diff)
downloadfocaccia-qemu-33a07fa2db66376e6ee780d4a8b064dc5118cf34.tar.gz
focaccia-qemu-33a07fa2db66376e6ee780d4a8b064dc5118cf34.zip
target/mips: reimplement SC instruction emulation and use cmpxchg
Completely rewrite conditional stores handling. Use cmpxchg.

This eliminates need for separate implementations of SC instruction
emulation for user and system emulation.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/mips/helper.c')
-rw-r--r--target/mips/helper.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/target/mips/helper.c b/target/mips/helper.c
index 8988452dbd..944f094566 100644
--- a/target/mips/helper.c
+++ b/target/mips/helper.c
@@ -1463,10 +1463,8 @@ void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env,
 {
     CPUState *cs = CPU(mips_env_get_cpu(env));
 
-    if (exception < EXCP_SC) {
-        qemu_log_mask(CPU_LOG_INT, "%s: %d %d\n",
-                      __func__, exception, error_code);
-    }
+    qemu_log_mask(CPU_LOG_INT, "%s: %d %d\n",
+                  __func__, exception, error_code);
     cs->exception_index = exception;
     env->error_code = error_code;