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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-03-21 19:02:35 +0100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-04-23 15:07:32 -0700 |
| commit | 8201f1a29c95bca095bdd6e6c6eba42d8d06499b (patch) | |
| tree | 83a0f55f45c3e5b29f68d0e0f0d2d337a3e7dac2 /target/openrisc/cpu.c | |
| parent | 0eca13c29a0823850cf3308528b0de0ed4608c02 (diff) | |
| download | focaccia-qemu-8201f1a29c95bca095bdd6e6c6eba42d8d06499b.tar.gz focaccia-qemu-8201f1a29c95bca095bdd6e6c6eba42d8d06499b.zip | |
tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally
By directly using TCGCPUOps::guest_default_memory_order, we don't need the TCG_GUEST_DEFAULT_MO definition anymore. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Anton Johansson <anjo@rev.ng> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/openrisc/cpu.c')
| -rw-r--r-- | target/openrisc/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index e62c698a40..87fe779042 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -243,7 +243,7 @@ static const struct SysemuCPUOps openrisc_sysemu_ops = { #include "accel/tcg/cpu-ops.h" static const TCGCPUOps openrisc_tcg_ops = { - .guest_default_memory_order = TCG_GUEST_DEFAULT_MO, + .guest_default_memory_order = 0, .initialize = openrisc_translate_init, .translate_code = openrisc_translate_code, |