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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2025-04-24 22:24:10 +0200
committerRichard Henderson <richard.henderson@linaro.org>2025-04-30 12:45:05 -0700
commitf12b717717c45627d667b609326fda54f0ad0394 (patch)
treee8c0da545c1cbe8def98b7a7c4ffa1e00f377fee /target/openrisc/exception_helper.c
parent1381ea53a84234a0aac212baeae922137ad4bbda (diff)
downloadfocaccia-qemu-f12b717717c45627d667b609326fda54f0ad0394.tar.gz
focaccia-qemu-f12b717717c45627d667b609326fda54f0ad0394.zip
physmem: Restrict TCG IOTLB code to TCG accel
Restrict iotlb_to_section(), address_space_translate_for_iotlb()
and memory_region_section_get_iotlb() to TCG. Declare them in
the new "accel/tcg/iommu.h" header. Declare iotlb_to_section()
using the MemoryRegionSection typedef.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20250424202412.91612-12-philmd@linaro.org>
Diffstat (limited to 'target/openrisc/exception_helper.c')
0 files changed, 0 insertions, 0 deletions