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authorPhilippe Mathieu-Daudé <philmd@linaro.org>2025-02-09 23:47:35 +0100
committerPhilippe Mathieu-Daudé <philmd@linaro.org>2025-04-25 17:00:41 +0200
commit12d1a768bdfea6e27a3a829228840d72507613a1 (patch)
tree1293456896e507c4dcb859197ccafa0719aa7f65 /target/riscv/cpu.c
parentf1fa787b92c52d1034de164d2a26771ff969454e (diff)
downloadfocaccia-qemu-12d1a768bdfea6e27a3a829228840d72507613a1.tar.gz
focaccia-qemu-12d1a768bdfea6e27a3a829228840d72507613a1.zip
qom: Have class_init() take a const data argument
Mechanical change using gsed, then style manually adapted
to pass checkpatch.pl script.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250424194905.82506-4-philmd@linaro.org>
Diffstat (limited to 'target/riscv/cpu.c')
-rw-r--r--target/riscv/cpu.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 2b830b3317..e0604f4c78 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -3028,7 +3028,7 @@ static const struct SysemuCPUOps riscv_sysemu_ops = {
 };
 #endif
 
-static void riscv_cpu_common_class_init(ObjectClass *c, void *data)
+static void riscv_cpu_common_class_init(ObjectClass *c, const void *data)
 {
     RISCVCPUClass *mcc = RISCV_CPU_CLASS(c);
     CPUClass *cc = CPU_CLASS(c);
@@ -3061,7 +3061,7 @@ static void riscv_cpu_common_class_init(ObjectClass *c, void *data)
     device_class_set_props(dc, riscv_cpu_properties);
 }
 
-static void riscv_cpu_class_init(ObjectClass *c, void *data)
+static void riscv_cpu_class_init(ObjectClass *c, const void *data)
 {
     RISCVCPUClass *mcc = RISCV_CPU_CLASS(c);