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authorPaolo Bonzini <pbonzini@redhat.com>2025-02-06 13:13:23 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2025-05-20 08:18:53 +0200
commit5fd23f20e12a56e7ac2dabbe9570fb2f10d7c5b4 (patch)
tree36f5337db1d440bde02e71f98abac5bfc452925f /target/riscv/kvm/kvm-cpu.c
parent71fb3aa5ebba5ba822371f864a12dbcded08147d (diff)
downloadfocaccia-qemu-5fd23f20e12a56e7ac2dabbe9570fb2f10d7c5b4.tar.gz
focaccia-qemu-5fd23f20e12a56e7ac2dabbe9570fb2f10d7c5b4.zip
target/riscv: store RISCVCPUDef struct directly in the class
Prepare for adding more fields to RISCVCPUDef and reading them in
riscv_cpu_init: instead of storing the misa_mxl_max field in
RISCVCPUClass, ensure that there's always a valid RISCVCPUDef struct
and go through it.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'target/riscv/kvm/kvm-cpu.c')
-rw-r--r--target/riscv/kvm/kvm-cpu.c21
1 files changed, 9 insertions, 12 deletions
diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
index 82f9728636..e77f612af3 100644
--- a/target/riscv/kvm/kvm-cpu.c
+++ b/target/riscv/kvm/kvm-cpu.c
@@ -2086,22 +2086,19 @@ static void kvm_cpu_accel_register_types(void)
 }
 type_init(kvm_cpu_accel_register_types);
 
-static void riscv_host_cpu_class_init(ObjectClass *c, const void *data)
-{
-    RISCVCPUClass *mcc = RISCV_CPU_CLASS(c);
-
-#if defined(TARGET_RISCV32)
-    mcc->misa_mxl_max = MXL_RV32;
-#elif defined(TARGET_RISCV64)
-    mcc->misa_mxl_max = MXL_RV64;
-#endif
-}
-
 static const TypeInfo riscv_kvm_cpu_type_infos[] = {
     {
         .name = TYPE_RISCV_CPU_HOST,
         .parent = TYPE_RISCV_CPU,
-        .class_init = riscv_host_cpu_class_init,
+#if defined(TARGET_RISCV32)
+        .class_data = &(const RISCVCPUDef) {
+            .misa_mxl_max = MXL_RV32,
+        },
+#elif defined(TARGET_RISCV64)
+        .class_data = &(const RISCVCPUDef) {
+            .misa_mxl_max = MXL_RV64,
+        },
+#endif
     }
 };