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| author | TANG Tiancheng <lyndra@linux.alibaba.com> | 2025-09-11 17:56:16 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2025-10-03 13:15:14 +1000 |
| commit | b0daaa172a1cd7e8bc8320bfd6612edbebef157f (patch) | |
| tree | 72c8ba3d78b3d137195fb4c9de1ce488ce36e001 /target/riscv/kvm/kvm-cpu.c | |
| parent | 09f89ccc9763a20c0cf9030661af2c04647c1eec (diff) | |
| download | focaccia-qemu-b0daaa172a1cd7e8bc8320bfd6612edbebef157f.tar.gz focaccia-qemu-b0daaa172a1cd7e8bc8320bfd6612edbebef157f.zip | |
target/riscv: Save stimer and vstimer in CPU vmstate
vmstate_riscv_cpu was missing env.stimer and env.vstimer. Without migrating these QEMUTimer fields, active S/VS-mode timer events are lost after snapshot or migration. Add VMSTATE_TIMER_PTR() entries to save and restore them. Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: TANG Tiancheng <lyndra@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20250911-timers-v3-4-60508f640050@linux.alibaba.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/kvm/kvm-cpu.c')
0 files changed, 0 insertions, 0 deletions