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| author | LIU Zhiwei <zhiwei_liu@c-sky.com> | 2022-01-20 20:20:40 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2022-01-21 15:52:57 +1000 |
| commit | 4302bef9e17831902a7e7c8082cac1c8ed151759 (patch) | |
| tree | 55e7b2a908d1bb67389d51649a16d06046f61e42 /target/riscv/translate.c | |
| parent | 0cff460de9e3417d248a5756b1cfbd9211657f94 (diff) | |
| download | focaccia-qemu-4302bef9e17831902a7e7c8082cac1c8ed151759.tar.gz focaccia-qemu-4302bef9e17831902a7e7c8082cac1c8ed151759.zip | |
target/riscv: Calculate address according to XLEN
Define one common function to compute a canonical address from a register plus offset. Merge gen_pm_adjust_address into this function. Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20220120122050.41546-14-zhiwei_liu@c-sky.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to '')
| -rw-r--r-- | target/riscv/translate.c | 25 |
1 files changed, 12 insertions, 13 deletions
diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 43e2ec6dce..33564d059d 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -390,21 +390,20 @@ static void gen_jal(DisasContext *ctx, int rd, target_ulong imm) ctx->base.is_jmp = DISAS_NORETURN; } -/* - * Generates address adjustment for PointerMasking - */ -static TCGv gen_pm_adjust_address(DisasContext *s, TCGv src) +/* Compute a canonical address from a register plus offset. */ +static TCGv get_address(DisasContext *ctx, int rs1, int imm) { - TCGv temp; - if (!s->pm_enabled) { - /* Load unmodified address */ - return src; - } else { - temp = temp_new(s); - tcg_gen_andc_tl(temp, src, pm_mask); - tcg_gen_or_tl(temp, temp, pm_base); - return temp; + TCGv addr = temp_new(ctx); + TCGv src1 = get_gpr(ctx, rs1, EXT_NONE); + + tcg_gen_addi_tl(addr, src1, imm); + if (ctx->pm_enabled) { + tcg_gen_and_tl(addr, addr, pm_mask); + tcg_gen_or_tl(addr, addr, pm_base); + } else if (get_xl(ctx) == MXL_RV32) { + tcg_gen_ext32u_tl(addr, addr); } + return addr; } #ifndef CONFIG_USER_ONLY |