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| author | Richard Henderson <richard.henderson@linaro.org> | 2025-01-12 20:48:57 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-04-28 13:40:17 -0700 |
| commit | 4d137ff819bae33d045f13bb9186e3a2c71cb7e4 (patch) | |
| tree | b5b0ed15a309f71b8bc22c2e031216bf65417dcd /tcg/tcg-op.c | |
| parent | a5a8dd33aad1ada9b05968e8b93033bdbdfdbca2 (diff) | |
| download | focaccia-qemu-4d137ff819bae33d045f13bb9186e3a2c71cb7e4.tar.gz focaccia-qemu-4d137ff819bae33d045f13bb9186e3a2c71cb7e4.zip | |
tcg: Merge INDEX_op_deposit_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tcg-op.c')
| -rw-r--r-- | tcg/tcg-op.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index b88f411ece..961a39f446 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -915,7 +915,7 @@ void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2, return; } if (TCG_TARGET_deposit_valid(TCG_TYPE_I32, ofs, len)) { - tcg_gen_op5ii_i32(INDEX_op_deposit_i32, ret, arg1, arg2, ofs, len); + tcg_gen_op5ii_i32(INDEX_op_deposit, ret, arg1, arg2, ofs, len); return; } @@ -961,7 +961,7 @@ void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg, tcg_gen_andi_i32(ret, arg, (1u << len) - 1); } else if (TCG_TARGET_deposit_valid(TCG_TYPE_I32, ofs, len)) { TCGv_i32 zero = tcg_constant_i32(0); - tcg_gen_op5ii_i32(INDEX_op_deposit_i32, ret, zero, arg, ofs, len); + tcg_gen_op5ii_i32(INDEX_op_deposit, ret, zero, arg, ofs, len); } else { /* * To help two-operand hosts we prefer to zero-extend first, @@ -2533,7 +2533,7 @@ void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2, if (TCG_TARGET_REG_BITS == 64) { if (TCG_TARGET_deposit_valid(TCG_TYPE_I64, ofs, len)) { - tcg_gen_op5ii_i64(INDEX_op_deposit_i64, ret, arg1, arg2, ofs, len); + tcg_gen_op5ii_i64(INDEX_op_deposit, ret, arg1, arg2, ofs, len); return; } } else { @@ -2594,7 +2594,7 @@ void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg, } else if (TCG_TARGET_REG_BITS == 64 && TCG_TARGET_deposit_valid(TCG_TYPE_I64, ofs, len)) { TCGv_i64 zero = tcg_constant_i64(0); - tcg_gen_op5ii_i64(INDEX_op_deposit_i64, ret, zero, arg, ofs, len); + tcg_gen_op5ii_i64(INDEX_op_deposit, ret, zero, arg, ofs, len); } else { if (TCG_TARGET_REG_BITS == 32) { if (ofs >= 32) { |