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authorRichard Henderson <richard.henderson@linaro.org>2025-01-07 09:15:09 -0800
committerRichard Henderson <richard.henderson@linaro.org>2025-04-28 13:40:16 -0700
commit1e4ac0ea5dc86c54e97bbc4db9638f2febdfde8b (patch)
tree05f3dffc60b147c1c45a3916ced102e182e18287 /tcg/tcg.c
parent5c62d3779b8b1075782672751165c0e4f716762f (diff)
downloadfocaccia-qemu-1e4ac0ea5dc86c54e97bbc4db9638f2febdfde8b.tar.gz
focaccia-qemu-1e4ac0ea5dc86c54e97bbc4db9638f2febdfde8b.zip
tcg: Convert mul to TCGOutOpBinary
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tcg.c')
-rw-r--r--tcg/tcg.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 5e43a304c0..4d221cea6f 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1021,6 +1021,8 @@ static const TCGOutOp * const all_outop[NB_OPS] = {
     OUTOP(INDEX_op_and, TCGOutOpBinary, outop_and),
     OUTOP(INDEX_op_andc, TCGOutOpBinary, outop_andc),
     OUTOP(INDEX_op_eqv, TCGOutOpBinary, outop_eqv),
+    OUTOP(INDEX_op_mul_i32, TCGOutOpBinary, outop_mul),
+    OUTOP(INDEX_op_mul_i64, TCGOutOpBinary, outop_mul),
     OUTOP(INDEX_op_nand, TCGOutOpBinary, outop_nand),
     OUTOP(INDEX_op_neg, TCGOutOpUnary, outop_neg),
     OUTOP(INDEX_op_nor, TCGOutOpBinary, outop_nor),
@@ -2247,7 +2249,6 @@ bool tcg_op_supported(TCGOpcode op, TCGType type, unsigned flags)
     case INDEX_op_st8_i32:
     case INDEX_op_st16_i32:
     case INDEX_op_st_i32:
-    case INDEX_op_mul_i32:
     case INDEX_op_shl_i32:
     case INDEX_op_shr_i32:
     case INDEX_op_sar_i32:
@@ -2313,7 +2314,6 @@ bool tcg_op_supported(TCGOpcode op, TCGType type, unsigned flags)
     case INDEX_op_st16_i64:
     case INDEX_op_st32_i64:
     case INDEX_op_st_i64:
-    case INDEX_op_mul_i64:
     case INDEX_op_shl_i64:
     case INDEX_op_shr_i64:
     case INDEX_op_sar_i64:
@@ -5436,6 +5436,8 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
     case INDEX_op_and:
     case INDEX_op_andc:
     case INDEX_op_eqv:
+    case INDEX_op_mul_i32:
+    case INDEX_op_mul_i64:
     case INDEX_op_nand:
     case INDEX_op_nor:
     case INDEX_op_or: