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| author | Richard Henderson <richard.henderson@linaro.org> | 2025-01-06 22:48:57 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-04-28 13:40:16 -0700 |
| commit | 6971358747d8998a5770d1bf997495d3061d6c6a (patch) | |
| tree | 93864a87ec151bc180a134f2fe331bc49dbf79a2 /tcg/tci.c | |
| parent | e126a91c38f85750d84cabf27f44c055e17ef6df (diff) | |
| download | focaccia-qemu-6971358747d8998a5770d1bf997495d3061d6c6a.tar.gz focaccia-qemu-6971358747d8998a5770d1bf997495d3061d6c6a.zip | |
tcg: Merge INDEX_op_neg_{i32,i64}
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tci.c')
| -rw-r--r-- | tcg/tci.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/tcg/tci.c b/tcg/tci.c index 508d1405cd..c736691e9f 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -567,6 +567,10 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, tci_args_rrr(insn, &r0, &r1, &r2); regs[r0] = ~(regs[r1] | regs[r2]); break; + case INDEX_op_neg: + tci_args_rr(insn, &r0, &r1); + regs[r0] = -regs[r1]; + break; /* Arithmetic operations (32 bit). */ @@ -697,10 +701,6 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env, regs[r0] = ~regs[r1]; break; #endif - CASE_32_64(neg) - tci_args_rr(insn, &r0, &r1); - regs[r0] = -regs[r1]; - break; #if TCG_TARGET_REG_BITS == 64 /* Load/store operations (64 bit). */ @@ -1054,6 +1054,7 @@ int print_insn_tci(bfd_vma addr, disassemble_info *info) break; case INDEX_op_mov: + case INDEX_op_neg: case INDEX_op_ext_i32_i64: case INDEX_op_extu_i32_i64: case INDEX_op_bswap16_i32: @@ -1063,8 +1064,6 @@ int print_insn_tci(bfd_vma addr, disassemble_info *info) case INDEX_op_bswap64_i64: case INDEX_op_not_i32: case INDEX_op_not_i64: - case INDEX_op_neg_i32: - case INDEX_op_neg_i64: case INDEX_op_ctpop_i32: case INDEX_op_ctpop_i64: tci_args_rr(insn, &r0, &r1); |