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authorBabu Moger <babu.moger@amd.com>2021-03-03 09:45:30 -0600
committerEduardo Habkost <ehabkost@redhat.com>2021-04-09 16:02:18 -0400
commitcdeaed27782835a875df7365d56d69dbe7250481 (patch)
tree0a907d98f3a319b6708a0ea10b69b0e6079f6660 /util/qemu-timer.c
parent471387aa1446e2583f372f79327cc0a8c802b4b4 (diff)
downloadfocaccia-qemu-cdeaed27782835a875df7365d56d69dbe7250481.tar.gz
focaccia-qemu-cdeaed27782835a875df7365d56d69dbe7250481.zip
i386: Add missing cpu feature bits in EPYC-Rome model
Found the following cpu feature bits missing from EPYC-Rome model.
ibrs    : Indirect Branch Restricted Speculation
ssbd    : Speculative Store Bypass Disable

These new features will be added in EPYC-Rome-v2. The -cpu help output
after the change.

x86 EPYC-Rome             (alias configured by machine type)
x86 EPYC-Rome-v1          AMD EPYC-Rome Processor
x86 EPYC-Rome-v2          AMD EPYC-Rome Processor

Reported-by: Pankaj Gupta <pankaj.gupta@cloud.ionos.com>
Signed-off-by: Babu Moger <babu.moger@amd.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@cloud.ionos.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: David Edmondson <david.edmondson@oracle.com>
Message-Id: <161478622280.16275.6399866734509127420.stgit@bmoger-ubuntu>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'util/qemu-timer.c')
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