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Diffstat (limited to '')
| -rw-r--r-- | target/riscv/common-semi-target.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target/riscv/common-semi-target.h b/target/riscv/common-semi-target.h index ba40e794dc..7e6ea8da02 100644 --- a/target/riscv/common-semi-target.h +++ b/target/riscv/common-semi-target.h @@ -25,14 +25,14 @@ static inline void common_semi_set_ret(CPUState *cs, target_ulong ret) env->gpr[xA0] = ret; } -static inline bool common_semi_sys_exit_is_extended(CPUState *cs) +static inline bool is_64bit_semihosting(CPUArchState *env) { - return sizeof(target_ulong) == 8; + return riscv_cpu_mxl(env) != MXL_RV32; } -static inline bool is_64bit_semihosting(CPUArchState *env) +static inline bool common_semi_sys_exit_is_extended(CPUState *cs) { - return riscv_cpu_mxl(env) != MXL_RV32; + return is_64bit_semihosting(cpu_env(cs)); } static inline target_ulong common_semi_stack_bottom(CPUState *cs) |