diff options
46 files changed, 2335 insertions, 14095 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 5ec945c9af..caf7e8aca8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1647,12 +1647,6 @@ S: Maintained F: tcg/i386/ F: disas/i386.c -IA64 target -M: Aurelien Jarno <aurelien@aurel32.net> -S: Maintained -F: tcg/ia64/ -F: disas/ia64.c - MIPS target M: Aurelien Jarno <aurelien@aurel32.net> S: Maintained diff --git a/block.c b/block.c index b749bd6404..6dd47e414e 100644 --- a/block.c +++ b/block.c @@ -496,6 +496,8 @@ int bdrv_probe_blocksizes(BlockDriverState *bs, BlockSizes *bsz) if (drv && drv->bdrv_probe_blocksizes) { return drv->bdrv_probe_blocksizes(bs, bsz); + } else if (drv && drv->is_filter && bs->file) { + return bdrv_probe_blocksizes(bs->file->bs, bsz); } return -ENOTSUP; @@ -513,6 +515,8 @@ int bdrv_probe_geometry(BlockDriverState *bs, HDGeometry *geo) if (drv && drv->bdrv_probe_geometry) { return drv->bdrv_probe_geometry(bs, geo); + } else if (drv && drv->is_filter && bs->file) { + return bdrv_probe_geometry(bs->file->bs, geo); } return -ENOTSUP; @@ -3426,11 +3430,15 @@ int bdrv_truncate(BdrvChild *child, int64_t offset, PreallocMode prealloc, assert(child->perm & BLK_PERM_RESIZE); + /* if bs->drv == NULL, bs is closed, so there's nothing to do here */ if (!drv) { error_setg(errp, "No medium inserted"); return -ENOMEDIUM; } if (!drv->bdrv_truncate) { + if (bs->file && drv->is_filter) { + return bdrv_truncate(bs->file, offset, prealloc, errp); + } error_setg(errp, "Image format driver does not support resize"); return -ENOTSUP; } @@ -3767,6 +3775,9 @@ int bdrv_has_zero_init(BlockDriverState *bs) if (bs->drv->bdrv_has_zero_init) { return bs->drv->bdrv_has_zero_init(bs); } + if (bs->file && bs->drv->is_filter) { + return bdrv_has_zero_init(bs->file->bs); + } /* safe default */ return 0; @@ -3821,10 +3832,16 @@ void bdrv_get_backing_filename(BlockDriverState *bs, int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi) { BlockDriver *drv = bs->drv; - if (!drv) + /* if bs->drv == NULL, bs is closed, so there's nothing to do here */ + if (!drv) { return -ENOMEDIUM; - if (!drv->bdrv_get_info) + } + if (!drv->bdrv_get_info) { + if (bs->file && drv->is_filter) { + return bdrv_get_info(bs->file->bs, bdi); + } return -ENOTSUP; + } memset(bdi, 0, sizeof(*bdi)); return drv->bdrv_get_info(bs, bdi); } @@ -4175,20 +4192,6 @@ bool bdrv_is_inserted(BlockDriverState *bs) } /** - * Return whether the media changed since the last call to this - * function, or -ENOTSUP if we don't know. Most drivers don't know. - */ -int bdrv_media_changed(BlockDriverState *bs) -{ - BlockDriver *drv = bs->drv; - - if (drv && drv->bdrv_media_changed) { - return drv->bdrv_media_changed(bs); - } - return -ENOTSUP; -} - -/** * If eject_flag is TRUE, eject the media. Otherwise, close the tray */ void bdrv_eject(BlockDriverState *bs, bool eject_flag) diff --git a/block/Makefile.objs b/block/Makefile.objs index 2aaede4ae1..6eaf78a046 100644 --- a/block/Makefile.objs +++ b/block/Makefile.objs @@ -25,6 +25,7 @@ block-obj-y += accounting.o dirty-bitmap.o block-obj-y += write-threshold.o block-obj-y += backup.o block-obj-$(CONFIG_REPLICATION) += replication.o +block-obj-y += throttle.o block-obj-y += crypto.o diff --git a/block/blkdebug.c b/block/blkdebug.c index 8e385acf54..46e53f2f09 100644 --- a/block/blkdebug.c +++ b/block/blkdebug.c @@ -628,16 +628,6 @@ static int coroutine_fn blkdebug_co_pdiscard(BlockDriverState *bs, return bdrv_co_pdiscard(bs->file->bs, offset, bytes); } -static int64_t coroutine_fn blkdebug_co_get_block_status( - BlockDriverState *bs, int64_t sector_num, int nb_sectors, int *pnum, - BlockDriverState **file) -{ - *pnum = nb_sectors; - *file = bs->file->bs; - return BDRV_BLOCK_RAW | BDRV_BLOCK_OFFSET_VALID | - (sector_num << BDRV_SECTOR_BITS); -} - static void blkdebug_close(BlockDriverState *bs) { BDRVBlkdebugState *s = bs->opaque; @@ -808,12 +798,6 @@ static int64_t blkdebug_getlength(BlockDriverState *bs) return bdrv_getlength(bs->file->bs); } -static int blkdebug_truncate(BlockDriverState *bs, int64_t offset, - PreallocMode prealloc, Error **errp) -{ - return bdrv_truncate(bs->file, offset, prealloc, errp); -} - static void blkdebug_refresh_filename(BlockDriverState *bs, QDict *options) { BDRVBlkdebugState *s = bs->opaque; @@ -896,6 +880,7 @@ static BlockDriver bdrv_blkdebug = { .format_name = "blkdebug", .protocol_name = "blkdebug", .instance_size = sizeof(BDRVBlkdebugState), + .is_filter = true, .bdrv_parse_filename = blkdebug_parse_filename, .bdrv_file_open = blkdebug_open, @@ -904,7 +889,6 @@ static BlockDriver bdrv_blkdebug = { .bdrv_child_perm = bdrv_filter_default_perms, .bdrv_getlength = blkdebug_getlength, - .bdrv_truncate = blkdebug_truncate, .bdrv_refresh_filename = blkdebug_refresh_filename, .bdrv_refresh_limits = blkdebug_refresh_limits, @@ -913,7 +897,7 @@ static BlockDriver bdrv_blkdebug = { .bdrv_co_flush_to_disk = blkdebug_co_flush, .bdrv_co_pwrite_zeroes = blkdebug_co_pwrite_zeroes, .bdrv_co_pdiscard = blkdebug_co_pdiscard, - .bdrv_co_get_block_status = blkdebug_co_get_block_status, + .bdrv_co_get_block_status = bdrv_co_get_block_status_from_file, .bdrv_debug_event = blkdebug_debug_event, .bdrv_debug_breakpoint = blkdebug_debug_breakpoint, diff --git a/block/block-backend.c b/block/block-backend.c index 1031742401..45d9101be3 100644 --- a/block/block-backend.c +++ b/block/block-backend.c @@ -273,9 +273,6 @@ BlockBackend *blk_new(uint64_t perm, uint64_t shared_perm) blk->shared_perm = shared_perm; blk_set_enable_write_cache(blk, true); - qemu_co_mutex_init(&blk->public.throttled_reqs_lock); - qemu_co_queue_init(&blk->public.throttled_reqs[0]); - qemu_co_queue_init(&blk->public.throttled_reqs[1]); block_acct_init(&blk->stats); notifier_list_init(&blk->remove_bs_notifiers); @@ -343,7 +340,7 @@ static void blk_delete(BlockBackend *blk) assert(!blk->refcnt); assert(!blk->name); assert(!blk->dev); - if (blk->public.throttle_state) { + if (blk->public.throttle_group_member.throttle_state) { blk_io_limits_disable(blk); } if (blk->root) { @@ -658,9 +655,12 @@ BlockBackend *blk_by_public(BlockBackendPublic *public) */ void blk_remove_bs(BlockBackend *blk) { + ThrottleTimers *tt; + notifier_list_notify(&blk->remove_bs_notifiers, blk); - if (blk->public.throttle_state) { - throttle_timers_detach_aio_context(&blk->public.throttle_timers); + if (blk->public.throttle_group_member.throttle_state) { + tt = &blk->public.throttle_group_member.throttle_timers; + throttle_timers_detach_aio_context(tt); } blk_update_root_state(blk); @@ -682,9 +682,10 @@ int blk_insert_bs(BlockBackend *blk, BlockDriverState *bs, Error **errp) bdrv_ref(bs); notifier_list_notify(&blk->insert_bs_notifiers, blk); - if (blk->public.throttle_state) { + if (blk->public.throttle_group_member.throttle_state) { throttle_timers_attach_aio_context( - &blk->public.throttle_timers, bdrv_get_aio_context(bs)); + &blk->public.throttle_group_member.throttle_timers, + bdrv_get_aio_context(bs)); } return 0; @@ -1046,8 +1047,9 @@ int coroutine_fn blk_co_preadv(BlockBackend *blk, int64_t offset, bdrv_inc_in_flight(bs); /* throttling disk I/O */ - if (blk->public.throttle_state) { - throttle_group_co_io_limits_intercept(blk, bytes, false); + if (blk->public.throttle_group_member.throttle_state) { + throttle_group_co_io_limits_intercept(&blk->public.throttle_group_member, + bytes, false); } ret = bdrv_co_preadv(blk->root, offset, bytes, qiov, flags); @@ -1070,10 +1072,10 @@ int coroutine_fn blk_co_pwritev(BlockBackend *blk, int64_t offset, } bdrv_inc_in_flight(bs); - /* throttling disk I/O */ - if (blk->public.throttle_state) { - throttle_group_co_io_limits_intercept(blk, bytes, true); + if (blk->public.throttle_group_member.throttle_state) { + throttle_group_co_io_limits_intercept(&blk->public.throttle_group_member, + bytes, true); } if (!blk->enable_write_cache) { @@ -1742,16 +1744,14 @@ static AioContext *blk_aiocb_get_aio_context(BlockAIOCB *acb) void blk_set_aio_context(BlockBackend *blk, AioContext *new_context) { BlockDriverState *bs = blk_bs(blk); + ThrottleGroupMember *tgm = &blk->public.throttle_group_member; if (bs) { - if (blk->public.throttle_state) { - throttle_timers_detach_aio_context(&blk->public.throttle_timers); + if (tgm->throttle_state) { + throttle_group_detach_aio_context(tgm); + throttle_group_attach_aio_context(tgm, new_context); } bdrv_set_aio_context(bs, new_context); - if (blk->public.throttle_state) { - throttle_timers_attach_aio_context(&blk->public.throttle_timers, - new_context); - } } } @@ -1969,33 +1969,35 @@ int blk_commit_all(void) /* throttling disk I/O limits */ void blk_set_io_limits(BlockBackend *blk, ThrottleConfig *cfg) { - throttle_group_config(blk, cfg); + throttle_group_config(&blk->public.throttle_group_member, cfg); } void blk_io_limits_disable(BlockBackend *blk) { - assert(blk->public.throttle_state); + assert(blk->public.throttle_group_member.throttle_state); bdrv_drained_begin(blk_bs(blk)); - throttle_group_unregister_blk(blk); + throttle_group_unregister_tgm(&blk->public.throttle_group_member); bdrv_drained_end(blk_bs(blk)); } /* should be called before blk_set_io_limits if a limit is set */ void blk_io_limits_enable(BlockBackend *blk, const char *group) { - assert(!blk->public.throttle_state); - throttle_group_register_blk(blk, group); + assert(!blk->public.throttle_group_member.throttle_state); + throttle_group_register_tgm(&blk->public.throttle_group_member, + group, blk_get_aio_context(blk)); } void blk_io_limits_update_group(BlockBackend *blk, const char *group) { /* this BB is not part of any group */ - if (!blk->public.throttle_state) { + if (!blk->public.throttle_group_member.throttle_state) { return; } /* this BB is a part of the same group than the one we want */ - if (!g_strcmp0(throttle_group_get_name(blk), group)) { + if (!g_strcmp0(throttle_group_get_name(&blk->public.throttle_group_member), + group)) { return; } @@ -2017,8 +2019,8 @@ static void blk_root_drained_begin(BdrvChild *child) /* Note that blk->root may not be accessible here yet if we are just * attaching to a BlockDriverState that is drained. Use child instead. */ - if (atomic_fetch_inc(&blk->public.io_limits_disabled) == 0) { - throttle_group_restart_blk(blk); + if (atomic_fetch_inc(&blk->public.throttle_group_member.io_limits_disabled) == 0) { + throttle_group_restart_tgm(&blk->public.throttle_group_member); } } @@ -2027,8 +2029,8 @@ static void blk_root_drained_end(BdrvChild *child) BlockBackend *blk = child->opaque; assert(blk->quiesce_counter); - assert(blk->public.io_limits_disabled); - atomic_dec(&blk->public.io_limits_disabled); + assert(blk->public.throttle_group_member.io_limits_disabled); + atomic_dec(&blk->public.throttle_group_member.io_limits_disabled); if (--blk->quiesce_counter == 0) { if (blk->dev_ops && blk->dev_ops->drained_end) { diff --git a/block/commit.c b/block/commit.c index c7857c3321..898d91f653 100644 --- a/block/commit.c +++ b/block/commit.c @@ -244,16 +244,6 @@ static int coroutine_fn bdrv_commit_top_preadv(BlockDriverState *bs, return bdrv_co_preadv(bs->backing, offset, bytes, qiov, flags); } -static int64_t coroutine_fn bdrv_commit_top_get_block_status( - BlockDriverState *bs, int64_t sector_num, int nb_sectors, int *pnum, - BlockDriverState **file) -{ - *pnum = nb_sectors; - *file = bs->backing->bs; - return BDRV_BLOCK_RAW | BDRV_BLOCK_OFFSET_VALID | - (sector_num << BDRV_SECTOR_BITS); -} - static void bdrv_commit_top_refresh_filename(BlockDriverState *bs, QDict *opts) { bdrv_refresh_filename(bs->backing->bs); @@ -279,7 +269,7 @@ static void bdrv_commit_top_child_perm(BlockDriverState *bs, BdrvChild *c, static BlockDriver bdrv_commit_top = { .format_name = "commit_top", .bdrv_co_preadv = bdrv_commit_top_preadv, - .bdrv_co_get_block_status = bdrv_commit_top_get_block_status, + .bdrv_co_get_block_status = bdrv_co_get_block_status_from_backing, .bdrv_refresh_filename = bdrv_commit_top_refresh_filename, .bdrv_close = bdrv_commit_top_close, .bdrv_child_perm = bdrv_commit_top_child_perm, diff --git a/block/io.c b/block/io.c index 26003814eb..4378ae4c7d 100644 --- a/block/io.c +++ b/block/io.c @@ -1714,6 +1714,32 @@ typedef struct BdrvCoGetBlockStatusData { bool done; } BdrvCoGetBlockStatusData; +int64_t coroutine_fn bdrv_co_get_block_status_from_file(BlockDriverState *bs, + int64_t sector_num, + int nb_sectors, + int *pnum, + BlockDriverState **file) +{ + assert(bs->file && bs->file->bs); + *pnum = nb_sectors; + *file = bs->file->bs; + return BDRV_BLOCK_RAW | BDRV_BLOCK_OFFSET_VALID | + (sector_num << BDRV_SECTOR_BITS); +} + +int64_t coroutine_fn bdrv_co_get_block_status_from_backing(BlockDriverState *bs, + int64_t sector_num, + int nb_sectors, + int *pnum, + BlockDriverState **file) +{ + assert(bs->backing && bs->backing->bs); + *pnum = nb_sectors; + *file = bs->backing->bs; + return BDRV_BLOCK_RAW | BDRV_BLOCK_OFFSET_VALID | + (sector_num << BDRV_SECTOR_BITS); +} + /* * Returns the allocation status of the specified sectors. * Drivers not implementing the functionality are assumed to not support diff --git a/block/mirror.c b/block/mirror.c index 429751b9fe..6531652d73 100644 --- a/block/mirror.c +++ b/block/mirror.c @@ -1059,16 +1059,6 @@ static int coroutine_fn bdrv_mirror_top_flush(BlockDriverState *bs) return bdrv_co_flush(bs->backing->bs); } -static int64_t coroutine_fn bdrv_mirror_top_get_block_status( - BlockDriverState *bs, int64_t sector_num, int nb_sectors, int *pnum, - BlockDriverState **file) -{ - *pnum = nb_sectors; - *file = bs->backing->bs; - return BDRV_BLOCK_RAW | BDRV_BLOCK_OFFSET_VALID | - (sector_num << BDRV_SECTOR_BITS); -} - static int coroutine_fn bdrv_mirror_top_pwrite_zeroes(BlockDriverState *bs, int64_t offset, int bytes, BdrvRequestFlags flags) { @@ -1115,7 +1105,7 @@ static BlockDriver bdrv_mirror_top = { .bdrv_co_pwrite_zeroes = bdrv_mirror_top_pwrite_zeroes, .bdrv_co_pdiscard = bdrv_mirror_top_pdiscard, .bdrv_co_flush = bdrv_mirror_top_flush, - .bdrv_co_get_block_status = bdrv_mirror_top_get_block_status, + .bdrv_co_get_block_status = bdrv_co_get_block_status_from_backing, .bdrv_refresh_filename = bdrv_mirror_top_refresh_filename, .bdrv_close = bdrv_mirror_top_close, .bdrv_child_perm = bdrv_mirror_top_child_perm, diff --git a/block/qapi.c b/block/qapi.c index 5f1a71f5d2..7fa2437923 100644 --- a/block/qapi.c +++ b/block/qapi.c @@ -66,10 +66,11 @@ BlockDeviceInfo *bdrv_block_device_info(BlockBackend *blk, info->detect_zeroes = bs->detect_zeroes; - if (blk && blk_get_public(blk)->throttle_state) { + if (blk && blk_get_public(blk)->throttle_group_member.throttle_state) { ThrottleConfig cfg; + BlockBackendPublic *blkp = blk_get_public(blk); - throttle_group_get_config(blk, &cfg); + throttle_group_get_config(&blkp->throttle_group_member, &cfg); info->bps = cfg.buckets[THROTTLE_BPS_TOTAL].avg; info->bps_rd = cfg.buckets[THROTTLE_BPS_READ].avg; @@ -117,7 +118,8 @@ BlockDeviceInfo *bdrv_block_device_info(BlockBackend *blk, info->iops_size = cfg.op_size; info->has_group = true; - info->group = g_strdup(throttle_group_get_name(blk)); + info->group = + g_strdup(throttle_group_get_name(&blkp->throttle_group_member)); } info->write_threshold = bdrv_write_threshold_get(bs); diff --git a/block/qcow.c b/block/qcow.c index 63904a26ee..f450b00cfc 100644 --- a/block/qcow.c +++ b/block/qcow.c @@ -347,19 +347,22 @@ static int qcow_reopen_prepare(BDRVReopenState *state, * 'compressed_size'. 'compressed_size' must be > 0 and < * cluster_size * - * return 0 if not allocated. + * return 0 if not allocated, 1 if *result is assigned, and negative + * errno on failure. */ -static uint64_t get_cluster_offset(BlockDriverState *bs, - uint64_t offset, int allocate, - int compressed_size, - int n_start, int n_end) +static int get_cluster_offset(BlockDriverState *bs, + uint64_t offset, int allocate, + int compressed_size, + int n_start, int n_end, uint64_t *result) { BDRVQcowState *s = bs->opaque; - int min_index, i, j, l1_index, l2_index; - uint64_t l2_offset, *l2_table, cluster_offset, tmp; + int min_index, i, j, l1_index, l2_index, ret; + int64_t l2_offset; + uint64_t *l2_table, cluster_offset, tmp; uint32_t min_count; int new_l2_table; + *result = 0; l1_index = offset >> (s->l2_bits + s->cluster_bits); l2_offset = s->l1_table[l1_index]; new_l2_table = 0; @@ -368,15 +371,20 @@ static uint64_t get_cluster_offset(BlockDriverState *bs, return 0; /* allocate a new l2 entry */ l2_offset = bdrv_getlength(bs->file->bs); + if (l2_offset < 0) { + return l2_offset; + } /* round to cluster size */ - l2_offset = (l2_offset + s->cluster_size - 1) & ~(s->cluster_size - 1); + l2_offset = QEMU_ALIGN_UP(l2_offset, s->cluster_size); /* update the L1 entry */ s->l1_table[l1_index] = l2_offset; tmp = cpu_to_be64(l2_offset); - if (bdrv_pwrite_sync(bs->file, - s->l1_table_offset + l1_index * sizeof(tmp), - &tmp, sizeof(tmp)) < 0) - return 0; + ret = bdrv_pwrite_sync(bs->file, + s->l1_table_offset + l1_index * sizeof(tmp), + &tmp, sizeof(tmp)); + if (ret < 0) { + return ret; + } new_l2_table = 1; } for(i = 0; i < L2_CACHE_SIZE; i++) { @@ -403,14 +411,17 @@ static uint64_t get_cluster_offset(BlockDriverState *bs, l2_table = s->l2_cache + (min_index << s->l2_bits); if (new_l2_table) { memset(l2_table, 0, s->l2_size * sizeof(uint64_t)); - if (bdrv_pwrite_sync(bs->file, l2_offset, l2_table, - s->l2_size * sizeof(uint64_t)) < 0) - return 0; + ret = bdrv_pwrite_sync(bs->file, l2_offset, l2_table, + s->l2_size * sizeof(uint64_t)); + if (ret < 0) { + return ret; + } } else { - if (bdrv_pread(bs->file, l2_offset, l2_table, - s->l2_size * sizeof(uint64_t)) != - s->l2_size * sizeof(uint64_t)) - return 0; + ret = bdrv_pread(bs->file, l2_offset, l2_table, + s->l2_size * sizeof(uint64_t)); + if (ret < 0) { + return ret; + } } s->l2_cache_offsets[min_index] = l2_offset; s->l2_cache_counts[min_index] = 1; @@ -427,24 +438,36 @@ static uint64_t get_cluster_offset(BlockDriverState *bs, /* if the cluster is already compressed, we must decompress it in the case it is not completely overwritten */ - if (decompress_cluster(bs, cluster_offset) < 0) - return 0; + if (decompress_cluster(bs, cluster_offset) < 0) { + return -EIO; + } cluster_offset = bdrv_getlength(bs->file->bs); - cluster_offset = (cluster_offset + s->cluster_size - 1) & - ~(s->cluster_size - 1); + if ((int64_t) cluster_offset < 0) { + return cluster_offset; + } + cluster_offset = QEMU_ALIGN_UP(cluster_offset, s->cluster_size); /* write the cluster content */ - if (bdrv_pwrite(bs->file, cluster_offset, s->cluster_cache, - s->cluster_size) != - s->cluster_size) - return -1; + ret = bdrv_pwrite(bs->file, cluster_offset, s->cluster_cache, + s->cluster_size); + if (ret < 0) { + return ret; + } } else { cluster_offset = bdrv_getlength(bs->file->bs); + if ((int64_t) cluster_offset < 0) { + return cluster_offset; + } if (allocate == 1) { /* round to cluster size */ - cluster_offset = (cluster_offset + s->cluster_size - 1) & - ~(s->cluster_size - 1); - bdrv_truncate(bs->file, cluster_offset + s->cluster_size, - PREALLOC_MODE_OFF, NULL); + cluster_offset = QEMU_ALIGN_UP(cluster_offset, s->cluster_size); + if (cluster_offset + s->cluster_size > INT64_MAX) { + return -E2BIG; + } + ret = bdrv_truncate(bs->file, cluster_offset + s->cluster_size, + PREALLOC_MODE_OFF, NULL); + if (ret < 0) { + return ret; + } /* if encrypted, we must initialize the cluster content which won't be written */ if (bs->encrypted && @@ -459,13 +482,14 @@ static uint64_t get_cluster_offset(BlockDriverState *bs, s->cluster_data, BDRV_SECTOR_SIZE, NULL) < 0) { - errno = EIO; - return -1; + return -EIO; + } + ret = bdrv_pwrite(bs->file, + cluster_offset + i * 512, + s->cluster_data, 512); + if (ret < 0) { + return ret; } - if (bdrv_pwrite(bs->file, - cluster_offset + i * 512, - s->cluster_data, 512) != 512) - return -1; } } } @@ -477,23 +501,29 @@ static uint64_t get_cluster_offset(BlockDriverState *bs, /* update L2 table */ tmp = cpu_to_be64(cluster_offset); l2_table[l2_index] = tmp; - if (bdrv_pwrite_sync(bs->file, l2_offset + l2_index * sizeof(tmp), - &tmp, sizeof(tmp)) < 0) - return 0; + ret = bdrv_pwrite_sync(bs->file, l2_offset + l2_index * sizeof(tmp), + &tmp, sizeof(tmp)); + if (ret < 0) { + return ret; + } } - return cluster_offset; + *result = cluster_offset; + return 1; } static int64_t coroutine_fn qcow_co_get_block_status(BlockDriverState *bs, int64_t sector_num, int nb_sectors, int *pnum, BlockDriverState **file) { BDRVQcowState *s = bs->opaque; - int index_in_cluster, n; + int index_in_cluster, n, ret; uint64_t cluster_offset; qemu_co_mutex_lock(&s->lock); - cluster_offset = get_cluster_offset(bs, sector_num << 9, 0, 0, 0, 0); + ret = get_cluster_offset(bs, sector_num << 9, 0, 0, 0, 0, &cluster_offset); qemu_co_mutex_unlock(&s->lock); + if (ret < 0) { + return ret; + } index_in_cluster = sector_num & (s->cluster_sectors - 1); n = s->cluster_sectors - index_in_cluster; if (n > nb_sectors) @@ -585,8 +615,11 @@ static coroutine_fn int qcow_co_readv(BlockDriverState *bs, int64_t sector_num, while (nb_sectors != 0) { /* prepare next request */ - cluster_offset = get_cluster_offset(bs, sector_num << 9, - 0, 0, 0, 0); + ret = get_cluster_offset(bs, sector_num << 9, + 0, 0, 0, 0, &cluster_offset); + if (ret < 0) { + break; + } index_in_cluster = sector_num & (s->cluster_sectors - 1); n = s->cluster_sectors - index_in_cluster; if (n > nb_sectors) { @@ -603,7 +636,7 @@ static coroutine_fn int qcow_co_readv(BlockDriverState *bs, int64_t sector_num, ret = bdrv_co_readv(bs->backing, sector_num, n, &hd_qiov); qemu_co_mutex_lock(&s->lock); if (ret < 0) { - goto fail; + break; } } else { /* Note: in this case, no need to wait */ @@ -612,13 +645,15 @@ static coroutine_fn int qcow_co_readv(BlockDriverState *bs, int64_t sector_num, } else if (cluster_offset & QCOW_OFLAG_COMPRESSED) { /* add AIO support for compressed blocks ? */ if (decompress_cluster(bs, cluster_offset) < 0) { - goto fail; + ret = -EIO; + break; } memcpy(buf, s->cluster_cache + index_in_cluster * 512, 512 * n); } else { if ((cluster_offset & 511) != 0) { - goto fail; + ret = -EIO; + break; } hd_iov.iov_base = (void *)buf; hd_iov.iov_len = n * 512; @@ -635,7 +670,8 @@ static coroutine_fn int qcow_co_readv(BlockDriverState *bs, int64_t sector_num, assert(s->crypto); if (qcrypto_block_decrypt(s->crypto, sector_num, buf, n * BDRV_SECTOR_SIZE, NULL) < 0) { - goto fail; + ret = -EIO; + break; } } } @@ -646,7 +682,6 @@ static coroutine_fn int qcow_co_readv(BlockDriverState *bs, int64_t sector_num, buf += n * 512; } -done: qemu_co_mutex_unlock(&s->lock); if (qiov->niov > 1) { @@ -655,10 +690,6 @@ done: } return ret; - -fail: - ret = -EIO; - goto done; } static coroutine_fn int qcow_co_writev(BlockDriverState *bs, int64_t sector_num, @@ -697,9 +728,12 @@ static coroutine_fn int qcow_co_writev(BlockDriverState *bs, int64_t sector_num, if (n > nb_sectors) { n = nb_sectors; } - cluster_offset = get_cluster_offset(bs, sector_num << 9, 1, 0, - index_in_cluster, - index_in_cluster + n); + ret = get_cluster_offset(bs, sector_num << 9, 1, 0, + index_in_cluster, + index_in_cluster + n, &cluster_offset); + if (ret < 0) { + break; + } if (!cluster_offset || (cluster_offset & 511) != 0) { ret = -EIO; break; @@ -995,8 +1029,11 @@ qcow_co_pwritev_compressed(BlockDriverState *bs, uint64_t offset, goto success; } qemu_co_mutex_lock(&s->lock); - cluster_offset = get_cluster_offset(bs, offset, 2, out_len, 0, 0); + ret = get_cluster_offset(bs, offset, 2, out_len, 0, 0, &cluster_offset); qemu_co_mutex_unlock(&s->lock); + if (ret < 0) { + goto fail; + } if (cluster_offset == 0) { ret = -EIO; goto fail; diff --git a/block/qcow2.c b/block/qcow2.c index 2ec399663e..bae5893327 100644 --- a/block/qcow2.c +++ b/block/qcow2.c @@ -2036,6 +2036,14 @@ static int qcow2_inactivate(BlockDriverState *bs) int ret, result = 0; Error *local_err = NULL; + qcow2_store_persistent_dirty_bitmaps(bs, &local_err); + if (local_err != NULL) { + result = -EINVAL; + error_report_err(local_err); + error_report("Persistent bitmaps are lost for node '%s'", + bdrv_get_device_or_node_name(bs)); + } + ret = qcow2_cache_flush(bs, s->l2_table_cache); if (ret) { result = ret; @@ -2050,14 +2058,6 @@ static int qcow2_inactivate(BlockDriverState *bs) strerror(-ret)); } - qcow2_store_persistent_dirty_bitmaps(bs, &local_err); - if (local_err != NULL) { - result = -EINVAL; - error_report_err(local_err); - error_report("Persistent bitmaps are lost for node '%s'", - bdrv_get_device_or_node_name(bs)); - } - if (result == 0) { qcow2_mark_clean(bs); } diff --git a/block/raw-format.c b/block/raw-format.c index 142649ed56..ab552c0954 100644 --- a/block/raw-format.c +++ b/block/raw-format.c @@ -372,11 +372,6 @@ static int raw_truncate(BlockDriverState *bs, int64_t offset, return bdrv_truncate(bs->file, offset, prealloc, errp); } -static int raw_media_changed(BlockDriverState *bs) -{ - return bdrv_media_changed(bs->file->bs); -} - static void raw_eject(BlockDriverState *bs, bool eject_flag) { bdrv_eject(bs->file->bs, eject_flag); @@ -510,7 +505,6 @@ BlockDriver bdrv_raw = { .bdrv_refresh_limits = &raw_refresh_limits, .bdrv_probe_blocksizes = &raw_probe_blocksizes, .bdrv_probe_geometry = &raw_probe_geometry, - .bdrv_media_changed = &raw_media_changed, .bdrv_eject = &raw_eject, .bdrv_lock_medium = &raw_lock_medium, .bdrv_co_ioctl = &raw_co_ioctl, diff --git a/block/throttle-groups.c b/block/throttle-groups.c index 890bfded3f..6ba992c8d7 100644 --- a/block/throttle-groups.c +++ b/block/throttle-groups.c @@ -25,12 +25,20 @@ #include "qemu/osdep.h" #include "sysemu/block-backend.h" #include "block/throttle-groups.h" +#include "qemu/throttle-options.h" #include "qemu/queue.h" #include "qemu/thread.h" #include "sysemu/qtest.h" +#include "qapi/error.h" +#include "qapi-visit.h" +#include "qom/object.h" +#include "qom/object_interfaces.h" + +static void throttle_group_obj_init(Object *obj); +static void throttle_group_obj_complete(UserCreatable *obj, Error **errp); /* The ThrottleGroup structure (with its ThrottleState) is shared - * among different BlockBackends and it's independent from + * among different ThrottleGroupMembers and it's independent from * AioContext, so in order to use it from different threads it needs * its own locking. * @@ -40,82 +48,95 @@ * The whole ThrottleGroup structure is private and invisible to * outside users, that only use it through its ThrottleState. * - * In addition to the ThrottleGroup structure, BlockBackendPublic has + * In addition to the ThrottleGroup structure, ThrottleGroupMember has * fields that need to be accessed by other members of the group and * therefore also need to be protected by this lock. Once a - * BlockBackend is registered in a group those fields can be accessed + * ThrottleGroupMember is registered in a group those fields can be accessed * by other threads any time. * * Again, all this is handled internally and is mostly transparent to * the outside. The 'throttle_timers' field however has an additional * constraint because it may be temporarily invalid (see for example * blk_set_aio_context()). Therefore in this file a thread will - * access some other BlockBackend's timers only after verifying that - * that BlockBackend has throttled requests in the queue. + * access some other ThrottleGroupMember's timers only after verifying that + * that ThrottleGroupMember has throttled requests in the queue. */ typedef struct ThrottleGroup { + Object parent_obj; + + /* refuse individual property change if initialization is complete */ + bool is_initialized; char *name; /* This is constant during the lifetime of the group */ QemuMutex lock; /* This lock protects the following four fields */ ThrottleState ts; - QLIST_HEAD(, BlockBackendPublic) head; - BlockBackend *tokens[2]; + QLIST_HEAD(, ThrottleGroupMember) head; + ThrottleGroupMember *tokens[2]; bool any_timer_armed[2]; QEMUClockType clock_type; - /* These two are protected by the global throttle_groups_lock */ - unsigned refcount; + /* This field is protected by the global QEMU mutex */ QTAILQ_ENTRY(ThrottleGroup) list; } ThrottleGroup; -static QemuMutex throttle_groups_lock; +/* This is protected by the global QEMU mutex */ static QTAILQ_HEAD(, ThrottleGroup) throttle_groups = QTAILQ_HEAD_INITIALIZER(throttle_groups); + +/* This function reads throttle_groups and must be called under the global + * mutex. + */ +static ThrottleGroup *throttle_group_by_name(const char *name) +{ + ThrottleGroup *iter; + + /* Look for an existing group with that name */ + QTAILQ_FOREACH(iter, &throttle_groups, list) { + if (!g_strcmp0(name, iter->name)) { + return iter; + } + } + + return NULL; +} + +/* This function reads throttle_groups and must be called under the global + * mutex. + */ +bool throttle_group_exists(const char *name) +{ + return throttle_group_by_name(name) != NULL; +} + /* Increments the reference count of a ThrottleGroup given its name. * * If no ThrottleGroup is found with the given name a new one is * created. * + * This function edits throttle_groups and must be called under the global + * mutex. + * * @name: the name of the ThrottleGroup * @ret: the ThrottleState member of the ThrottleGroup */ ThrottleState *throttle_group_incref(const char *name) { ThrottleGroup *tg = NULL; - ThrottleGroup *iter; - - qemu_mutex_lock(&throttle_groups_lock); /* Look for an existing group with that name */ - QTAILQ_FOREACH(iter, &throttle_groups, list) { - if (!strcmp(name, iter->name)) { - tg = iter; - break; - } - } - - /* Create a new one if not found */ - if (!tg) { - tg = g_new0(ThrottleGroup, 1); + tg = throttle_group_by_name(name); + + if (tg) { + object_ref(OBJECT(tg)); + } else { + /* Create a new one if not found */ + /* new ThrottleGroup obj will have a refcnt = 1 */ + tg = THROTTLE_GROUP(object_new(TYPE_THROTTLE_GROUP)); tg->name = g_strdup(name); - tg->clock_type = QEMU_CLOCK_REALTIME; - - if (qtest_enabled()) { - /* For testing block IO throttling only */ - tg->clock_type = QEMU_CLOCK_VIRTUAL; - } - qemu_mutex_init(&tg->lock); - throttle_init(&tg->ts); - QLIST_INIT(&tg->head); - - QTAILQ_INSERT_TAIL(&throttle_groups, tg, list); + throttle_group_obj_complete(USER_CREATABLE(tg), &error_abort); } - tg->refcount++; - - qemu_mutex_unlock(&throttle_groups_lock); - return &tg->ts; } @@ -124,130 +145,123 @@ ThrottleState *throttle_group_incref(const char *name) * When the reference count reaches zero the ThrottleGroup is * destroyed. * + * This function edits throttle_groups and must be called under the global + * mutex. + * * @ts: The ThrottleGroup to unref, given by its ThrottleState member */ void throttle_group_unref(ThrottleState *ts) { ThrottleGroup *tg = container_of(ts, ThrottleGroup, ts); - - qemu_mutex_lock(&throttle_groups_lock); - if (--tg->refcount == 0) { - QTAILQ_REMOVE(&throttle_groups, tg, list); - qemu_mutex_destroy(&tg->lock); - g_free(tg->name); - g_free(tg); - } - qemu_mutex_unlock(&throttle_groups_lock); + object_unref(OBJECT(tg)); } -/* Get the name from a BlockBackend's ThrottleGroup. The name (and the pointer) +/* Get the name from a ThrottleGroupMember's group. The name (and the pointer) * is guaranteed to remain constant during the lifetime of the group. * - * @blk: a BlockBackend that is member of a throttling group + * @tgm: a ThrottleGroupMember * @ret: the name of the group. */ -const char *throttle_group_get_name(BlockBackend *blk) +const char *throttle_group_get_name(ThrottleGroupMember *tgm) { - BlockBackendPublic *blkp = blk_get_public(blk); - ThrottleGroup *tg = container_of(blkp->throttle_state, ThrottleGroup, ts); + ThrottleGroup *tg = container_of(tgm->throttle_state, ThrottleGroup, ts); return tg->name; } -/* Return the next BlockBackend in the round-robin sequence, simulating a - * circular list. +/* Return the next ThrottleGroupMember in the round-robin sequence, simulating + * a circular list. * * This assumes that tg->lock is held. * - * @blk: the current BlockBackend - * @ret: the next BlockBackend in the sequence + * @tgm: the current ThrottleGroupMember + * @ret: the next ThrottleGroupMember in the sequence */ -static BlockBackend *throttle_group_next_blk(BlockBackend *blk) +static ThrottleGroupMember *throttle_group_next_tgm(ThrottleGroupMember *tgm) { - BlockBackendPublic *blkp = blk_get_public(blk); - ThrottleState *ts = blkp->throttle_state; + ThrottleState *ts = tgm->throttle_state; ThrottleGroup *tg = container_of(ts, ThrottleGroup, ts); - BlockBackendPublic *next = QLIST_NEXT(blkp, round_robin); + ThrottleGroupMember *next = QLIST_NEXT(tgm, round_robin); if (!next) { next = QLIST_FIRST(&tg->head); } - return blk_by_public(next); + return next; } /* - * Return whether a BlockBackend has pending requests. + * Return whether a ThrottleGroupMember has pending requests. * * This assumes that tg->lock is held. * - * @blk: the BlockBackend - * @is_write: the type of operation (read/write) - * @ret: whether the BlockBackend has pending requests. + * @tgm: the ThrottleGroupMember + * @is_write: the type of operation (read/write) + * @ret: whether the ThrottleGroupMember has pending requests. */ -static inline bool blk_has_pending_reqs(BlockBackend *blk, +static inline bool tgm_has_pending_reqs(ThrottleGroupMember *tgm, bool is_write) { - const BlockBackendPublic *blkp = blk_get_public(blk); - return blkp->pending_reqs[is_write]; + return tgm->pending_reqs[is_write]; } -/* Return the next BlockBackend in the round-robin sequence with pending I/O - * requests. +/* Return the next ThrottleGroupMember in the round-robin sequence with pending + * I/O requests. * * This assumes that tg->lock is held. * - * @blk: the current BlockBackend + * @tgm: the current ThrottleGroupMember * @is_write: the type of operation (read/write) - * @ret: the next BlockBackend with pending requests, or blk if there is - * none. + * @ret: the next ThrottleGroupMember with pending requests, or tgm if + * there is none. */ -static BlockBackend *next_throttle_token(BlockBackend *blk, bool is_write) +static ThrottleGroupMember *next_throttle_token(ThrottleGroupMember *tgm, + bool is_write) { - BlockBackendPublic *blkp = blk_get_public(blk); - ThrottleGroup *tg = container_of(blkp->throttle_state, ThrottleGroup, ts); - BlockBackend *token, *start; + ThrottleState *ts = tgm->throttle_state; + ThrottleGroup *tg = container_of(ts, ThrottleGroup, ts); + ThrottleGroupMember *token, *start; start = token = tg->tokens[is_write]; /* get next bs round in round robin style */ - token = throttle_group_next_blk(token); - while (token != start && !blk_has_pending_reqs(token, is_write)) { - token = throttle_group_next_blk(token); + token = throttle_group_next_tgm(token); + while (token != start && !tgm_has_pending_reqs(token, is_write)) { + token = throttle_group_next_tgm(token); } /* If no IO are queued for scheduling on the next round robin token - * then decide the token is the current bs because chances are - * the current bs get the current request queued. + * then decide the token is the current tgm because chances are + * the current tgm got the current request queued. */ - if (token == start && !blk_has_pending_reqs(token, is_write)) { - token = blk; + if (token == start && !tgm_has_pending_reqs(token, is_write)) { + token = tgm; } - /* Either we return the original BB, or one with pending requests */ - assert(token == blk || blk_has_pending_reqs(token, is_write)); + /* Either we return the original TGM, or one with pending requests */ + assert(token == tgm || tgm_has_pending_reqs(token, is_write)); return token; } -/* Check if the next I/O request for a BlockBackend needs to be throttled or - * not. If there's no timer set in this group, set one and update the token - * accordingly. +/* Check if the next I/O request for a ThrottleGroupMember needs to be + * throttled or not. If there's no timer set in this group, set one and update + * the token accordingly. * * This assumes that tg->lock is held. * - * @blk: the current BlockBackend + * @tgm: the current ThrottleGroupMember * @is_write: the type of operation (read/write) * @ret: whether the I/O request needs to be throttled or not */ -static bool throttle_group_schedule_timer(BlockBackend *blk, bool is_write) +static bool throttle_group_schedule_timer(ThrottleGroupMember *tgm, + bool is_write) { - BlockBackendPublic *blkp = blk_get_public(blk); - ThrottleState *ts = blkp->throttle_state; - ThrottleTimers *tt = &blkp->throttle_timers; + ThrottleState *ts = tgm->throttle_state; ThrottleGroup *tg = container_of(ts, ThrottleGroup, ts); + ThrottleTimers *tt = &tgm->throttle_timers; bool must_wait; - if (atomic_read(&blkp->io_limits_disabled)) { + if (atomic_read(&tgm->io_limits_disabled)) { return false; } @@ -258,30 +272,29 @@ static bool throttle_group_schedule_timer(BlockBackend *blk, bool is_write) must_wait = throttle_schedule_timer(ts, tt, is_write); - /* If a timer just got armed, set blk as the current token */ + /* If a timer just got armed, set tgm as the current token */ if (must_wait) { - tg->tokens[is_write] = blk; + tg->tokens[is_write] = tgm; tg->any_timer_armed[is_write] = true; } return must_wait; } -/* Start the next pending I/O request for a BlockBackend. Return whether +/* Start the next pending I/O request for a ThrottleGroupMember. Return whether * any request was actually pending. * - * @blk: the current BlockBackend + * @tgm: the current ThrottleGroupMember * @is_write: the type of operation (read/write) */ -static bool coroutine_fn throttle_group_co_restart_queue(BlockBackend *blk, +static bool coroutine_fn throttle_group_co_restart_queue(ThrottleGroupMember *tgm, bool is_write) { - BlockBackendPublic *blkp = blk_get_public(blk); bool ret; - qemu_co_mutex_lock(&blkp->throttled_reqs_lock); - ret = qemu_co_queue_next(&blkp->throttled_reqs[is_write]); - qemu_co_mutex_unlock(&blkp->throttled_reqs_lock); + qemu_co_mutex_lock(&tgm->throttled_reqs_lock); + ret = qemu_co_queue_next(&tgm->throttled_reqs[is_write]); + qemu_co_mutex_unlock(&tgm->throttled_reqs_lock); return ret; } @@ -290,19 +303,19 @@ static bool coroutine_fn throttle_group_co_restart_queue(BlockBackend *blk, * * This assumes that tg->lock is held. * - * @blk: the current BlockBackend + * @tgm: the current ThrottleGroupMember * @is_write: the type of operation (read/write) */ -static void schedule_next_request(BlockBackend *blk, bool is_write) +static void schedule_next_request(ThrottleGroupMember *tgm, bool is_write) { - BlockBackendPublic *blkp = blk_get_public(blk); - ThrottleGroup *tg = container_of(blkp->throttle_state, ThrottleGroup, ts); + ThrottleState *ts = tgm->throttle_state; + ThrottleGroup *tg = container_of(ts, ThrottleGroup, ts); bool must_wait; - BlockBackend *token; + ThrottleGroupMember *token; /* Check if there's any pending request to schedule next */ - token = next_throttle_token(blk, is_write); - if (!blk_has_pending_reqs(token, is_write)) { + token = next_throttle_token(tgm, is_write); + if (!tgm_has_pending_reqs(token, is_write)) { return; } @@ -311,12 +324,12 @@ static void schedule_next_request(BlockBackend *blk, bool is_write) /* If it doesn't have to wait, queue it for immediate execution */ if (!must_wait) { - /* Give preference to requests from the current blk */ + /* Give preference to requests from the current tgm */ if (qemu_in_coroutine() && - throttle_group_co_restart_queue(blk, is_write)) { - token = blk; + throttle_group_co_restart_queue(tgm, is_write)) { + token = tgm; } else { - ThrottleTimers *tt = &blk_get_public(token)->throttle_timers; + ThrottleTimers *tt = &token->throttle_timers; int64_t now = qemu_clock_get_ns(tg->clock_type); timer_mod(tt->timers[is_write], now); tg->any_timer_armed[is_write] = true; @@ -329,90 +342,86 @@ static void schedule_next_request(BlockBackend *blk, bool is_write) * if necessary, and schedule the next request using a round robin * algorithm. * - * @blk: the current BlockBackend + * @tgm: the current ThrottleGroupMember * @bytes: the number of bytes for this I/O * @is_write: the type of operation (read/write) */ -void coroutine_fn throttle_group_co_io_limits_intercept(BlockBackend *blk, +void coroutine_fn throttle_group_co_io_limits_intercept(ThrottleGroupMember *tgm, unsigned int bytes, bool is_write) { bool must_wait; - BlockBackend *token; - - BlockBackendPublic *blkp = blk_get_public(blk); - ThrottleGroup *tg = container_of(blkp->throttle_state, ThrottleGroup, ts); + ThrottleGroupMember *token; + ThrottleGroup *tg = container_of(tgm->throttle_state, ThrottleGroup, ts); qemu_mutex_lock(&tg->lock); /* First we check if this I/O has to be throttled. */ - token = next_throttle_token(blk, is_write); + token = next_throttle_token(tgm, is_write); must_wait = throttle_group_schedule_timer(token, is_write); /* Wait if there's a timer set or queued requests of this type */ - if (must_wait || blkp->pending_reqs[is_write]) { - blkp->pending_reqs[is_write]++; + if (must_wait || tgm->pending_reqs[is_write]) { + tgm->pending_reqs[is_write]++; qemu_mutex_unlock(&tg->lock); - qemu_co_mutex_lock(&blkp->throttled_reqs_lock); - qemu_co_queue_wait(&blkp->throttled_reqs[is_write], - &blkp->throttled_reqs_lock); - qemu_co_mutex_unlock(&blkp->throttled_reqs_lock); + qemu_co_mutex_lock(&tgm->throttled_reqs_lock); + qemu_co_queue_wait(&tgm->throttled_reqs[is_write], + &tgm->throttled_reqs_lock); + qemu_co_mutex_unlock(&tgm->throttled_reqs_lock); qemu_mutex_lock(&tg->lock); - blkp->pending_reqs[is_write]--; + tgm->pending_reqs[is_write]--; } /* The I/O will be executed, so do the accounting */ - throttle_account(blkp->throttle_state, is_write, bytes); + throttle_account(tgm->throttle_state, is_write, bytes); /* Schedule the next request */ - schedule_next_request(blk, is_write); + schedule_next_request(tgm, is_write); qemu_mutex_unlock(&tg->lock); } typedef struct { - BlockBackend *blk; + ThrottleGroupMember *tgm; bool is_write; } RestartData; static void coroutine_fn throttle_group_restart_queue_entry(void *opaque) { RestartData *data = opaque; - BlockBackend *blk = data->blk; + ThrottleGroupMember *tgm = data->tgm; + ThrottleState *ts = tgm->throttle_state; + ThrottleGroup *tg = container_of(ts, ThrottleGroup, ts); bool is_write = data->is_write; - BlockBackendPublic *blkp = blk_get_public(blk); - ThrottleGroup *tg = container_of(blkp->throttle_state, ThrottleGroup, ts); bool empty_queue; - empty_queue = !throttle_group_co_restart_queue(blk, is_write); + empty_queue = !throttle_group_co_restart_queue(tgm, is_write); /* If the request queue was empty then we have to take care of * scheduling the next one */ if (empty_queue) { qemu_mutex_lock(&tg->lock); - schedule_next_request(blk, is_write); + schedule_next_request(tgm, is_write); qemu_mutex_unlock(&tg->lock); } } -static void throttle_group_restart_queue(BlockBackend *blk, bool is_write) +static void throttle_group_restart_queue(ThrottleGroupMember *tgm, bool is_write) { Coroutine *co; RestartData rd = { - .blk = blk, + .tgm = tgm, .is_write = is_write }; co = qemu_coroutine_create(throttle_group_restart_queue_entry, &rd); - aio_co_enter(blk_get_aio_context(blk), co); + aio_co_enter(tgm->aio_context, co); } -void throttle_group_restart_blk(BlockBackend *blk) +void throttle_group_restart_tgm(ThrottleGroupMember *tgm) { - BlockBackendPublic *blkp = blk_get_public(blk); - - if (blkp->throttle_state) { - throttle_group_restart_queue(blk, 0); - throttle_group_restart_queue(blk, 1); + if (tgm->throttle_state) { + throttle_group_restart_queue(tgm, 0); + throttle_group_restart_queue(tgm, 1); } } @@ -420,32 +429,30 @@ void throttle_group_restart_blk(BlockBackend *blk) * to throttle_config(), but guarantees atomicity within the * throttling group. * - * @blk: a BlockBackend that is a member of the group + * @tgm: a ThrottleGroupMember that is a member of the group * @cfg: the configuration to set */ -void throttle_group_config(BlockBackend *blk, ThrottleConfig *cfg) +void throttle_group_config(ThrottleGroupMember *tgm, ThrottleConfig *cfg) { - BlockBackendPublic *blkp = blk_get_public(blk); - ThrottleState *ts = blkp->throttle_state; + ThrottleState *ts = tgm->throttle_state; ThrottleGroup *tg = container_of(ts, ThrottleGroup, ts); qemu_mutex_lock(&tg->lock); throttle_config(ts, tg->clock_type, cfg); qemu_mutex_unlock(&tg->lock); - throttle_group_restart_blk(blk); + throttle_group_restart_tgm(tgm); } /* Get the throttle configuration from a particular group. Similar to * throttle_get_config(), but guarantees atomicity within the * throttling group. * - * @blk: a BlockBackend that is a member of the group + * @tgm: a ThrottleGroupMember that is a member of the group * @cfg: the configuration will be written here */ -void throttle_group_get_config(BlockBackend *blk, ThrottleConfig *cfg) +void throttle_group_get_config(ThrottleGroupMember *tgm, ThrottleConfig *cfg) { - BlockBackendPublic *blkp = blk_get_public(blk); - ThrottleState *ts = blkp->throttle_state; + ThrottleState *ts = tgm->throttle_state; ThrottleGroup *tg = container_of(ts, ThrottleGroup, ts); qemu_mutex_lock(&tg->lock); throttle_get_config(ts, cfg); @@ -455,13 +462,12 @@ void throttle_group_get_config(BlockBackend *blk, ThrottleConfig *cfg) /* ThrottleTimers callback. This wakes up a request that was waiting * because it had been throttled. * - * @blk: the BlockBackend whose request had been throttled + * @tgm: the ThrottleGroupMember whose request had been throttled * @is_write: the type of operation (read/write) */ -static void timer_cb(BlockBackend *blk, bool is_write) +static void timer_cb(ThrottleGroupMember *tgm, bool is_write) { - BlockBackendPublic *blkp = blk_get_public(blk); - ThrottleState *ts = blkp->throttle_state; + ThrottleState *ts = tgm->throttle_state; ThrottleGroup *tg = container_of(ts, ThrottleGroup, ts); /* The timer has just been fired, so we can update the flag */ @@ -470,7 +476,7 @@ static void timer_cb(BlockBackend *blk, bool is_write) qemu_mutex_unlock(&tg->lock); /* Run the request that was waiting for this timer */ - throttle_group_restart_queue(blk, is_write); + throttle_group_restart_queue(tgm, is_write); } static void read_timer_cb(void *opaque) @@ -483,85 +489,445 @@ static void write_timer_cb(void *opaque) timer_cb(opaque, true); } -/* Register a BlockBackend in the throttling group, also initializing its - * timers and updating its throttle_state pointer to point to it. If a +/* Register a ThrottleGroupMember from the throttling group, also initializing + * its timers and updating its throttle_state pointer to point to it. If a * throttling group with that name does not exist yet, it will be created. * - * @blk: the BlockBackend to insert + * This function edits throttle_groups and must be called under the global + * mutex. + * + * @tgm: the ThrottleGroupMember to insert * @groupname: the name of the group + * @ctx: the AioContext to use */ -void throttle_group_register_blk(BlockBackend *blk, const char *groupname) +void throttle_group_register_tgm(ThrottleGroupMember *tgm, + const char *groupname, + AioContext *ctx) { int i; - BlockBackendPublic *blkp = blk_get_public(blk); ThrottleState *ts = throttle_group_incref(groupname); ThrottleGroup *tg = container_of(ts, ThrottleGroup, ts); - blkp->throttle_state = ts; + + tgm->throttle_state = ts; + tgm->aio_context = ctx; qemu_mutex_lock(&tg->lock); - /* If the ThrottleGroup is new set this BlockBackend as the token */ + /* If the ThrottleGroup is new set this ThrottleGroupMember as the token */ for (i = 0; i < 2; i++) { if (!tg->tokens[i]) { - tg->tokens[i] = blk; + tg->tokens[i] = tgm; } } - QLIST_INSERT_HEAD(&tg->head, blkp, round_robin); + QLIST_INSERT_HEAD(&tg->head, tgm, round_robin); - throttle_timers_init(&blkp->throttle_timers, - blk_get_aio_context(blk), + throttle_timers_init(&tgm->throttle_timers, + tgm->aio_context, tg->clock_type, read_timer_cb, write_timer_cb, - blk); + tgm); + qemu_co_mutex_init(&tgm->throttled_reqs_lock); + qemu_co_queue_init(&tgm->throttled_reqs[0]); + qemu_co_queue_init(&tgm->throttled_reqs[1]); qemu_mutex_unlock(&tg->lock); } -/* Unregister a BlockBackend from its group, removing it from the list, +/* Unregister a ThrottleGroupMember from its group, removing it from the list, * destroying the timers and setting the throttle_state pointer to NULL. * - * The BlockBackend must not have pending throttled requests, so the caller has - * to drain them first. + * The ThrottleGroupMember must not have pending throttled requests, so the + * caller has to drain them first. * * The group will be destroyed if it's empty after this operation. * - * @blk: the BlockBackend to remove + * @tgm the ThrottleGroupMember to remove */ -void throttle_group_unregister_blk(BlockBackend *blk) +void throttle_group_unregister_tgm(ThrottleGroupMember *tgm) { - BlockBackendPublic *blkp = blk_get_public(blk); - ThrottleGroup *tg = container_of(blkp->throttle_state, ThrottleGroup, ts); + ThrottleState *ts = tgm->throttle_state; + ThrottleGroup *tg = container_of(ts, ThrottleGroup, ts); + ThrottleGroupMember *token; int i; - assert(blkp->pending_reqs[0] == 0 && blkp->pending_reqs[1] == 0); - assert(qemu_co_queue_empty(&blkp->throttled_reqs[0])); - assert(qemu_co_queue_empty(&blkp->throttled_reqs[1])); + if (!ts) { + /* Discard already unregistered tgm */ + return; + } + + assert(tgm->pending_reqs[0] == 0 && tgm->pending_reqs[1] == 0); + assert(qemu_co_queue_empty(&tgm->throttled_reqs[0])); + assert(qemu_co_queue_empty(&tgm->throttled_reqs[1])); qemu_mutex_lock(&tg->lock); for (i = 0; i < 2; i++) { - if (tg->tokens[i] == blk) { - BlockBackend *token = throttle_group_next_blk(blk); - /* Take care of the case where this is the last blk in the group */ - if (token == blk) { + if (tg->tokens[i] == tgm) { + token = throttle_group_next_tgm(tgm); + /* Take care of the case where this is the last tgm in the group */ + if (token == tgm) { token = NULL; } tg->tokens[i] = token; } } - /* remove the current blk from the list */ - QLIST_REMOVE(blkp, round_robin); - throttle_timers_destroy(&blkp->throttle_timers); + /* remove the current tgm from the list */ + QLIST_REMOVE(tgm, round_robin); + throttle_timers_destroy(&tgm->throttle_timers); qemu_mutex_unlock(&tg->lock); throttle_group_unref(&tg->ts); - blkp->throttle_state = NULL; + tgm->throttle_state = NULL; +} + +void throttle_group_attach_aio_context(ThrottleGroupMember *tgm, + AioContext *new_context) +{ + ThrottleTimers *tt = &tgm->throttle_timers; + throttle_timers_attach_aio_context(tt, new_context); + tgm->aio_context = new_context; +} + +void throttle_group_detach_aio_context(ThrottleGroupMember *tgm) +{ + ThrottleTimers *tt = &tgm->throttle_timers; + throttle_timers_detach_aio_context(tt); + tgm->aio_context = NULL; +} + +#undef THROTTLE_OPT_PREFIX +#define THROTTLE_OPT_PREFIX "x-" + +/* Helper struct and array for QOM property setter/getter */ +typedef struct { + const char *name; + BucketType type; + enum { + AVG, + MAX, + BURST_LENGTH, + IOPS_SIZE, + } category; +} ThrottleParamInfo; + +static ThrottleParamInfo properties[] = { + { + THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_TOTAL, + THROTTLE_OPS_TOTAL, AVG, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_TOTAL_MAX, + THROTTLE_OPS_TOTAL, MAX, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_TOTAL_MAX_LENGTH, + THROTTLE_OPS_TOTAL, BURST_LENGTH, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_READ, + THROTTLE_OPS_READ, AVG, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_READ_MAX, + THROTTLE_OPS_READ, MAX, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_READ_MAX_LENGTH, + THROTTLE_OPS_READ, BURST_LENGTH, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_WRITE, + THROTTLE_OPS_WRITE, AVG, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_WRITE_MAX, + THROTTLE_OPS_WRITE, MAX, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_WRITE_MAX_LENGTH, + THROTTLE_OPS_WRITE, BURST_LENGTH, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_BPS_TOTAL, + THROTTLE_BPS_TOTAL, AVG, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_BPS_TOTAL_MAX, + THROTTLE_BPS_TOTAL, MAX, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_BPS_TOTAL_MAX_LENGTH, + THROTTLE_BPS_TOTAL, BURST_LENGTH, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_BPS_READ, + THROTTLE_BPS_READ, AVG, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_BPS_READ_MAX, + THROTTLE_BPS_READ, MAX, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_BPS_READ_MAX_LENGTH, + THROTTLE_BPS_READ, BURST_LENGTH, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_BPS_WRITE, + THROTTLE_BPS_WRITE, AVG, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_BPS_WRITE_MAX, + THROTTLE_BPS_WRITE, MAX, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_BPS_WRITE_MAX_LENGTH, + THROTTLE_BPS_WRITE, BURST_LENGTH, + }, + { + THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_SIZE, + 0, IOPS_SIZE, + } +}; + +/* This function edits throttle_groups and must be called under the global + * mutex */ +static void throttle_group_obj_init(Object *obj) +{ + ThrottleGroup *tg = THROTTLE_GROUP(obj); + + tg->clock_type = QEMU_CLOCK_REALTIME; + if (qtest_enabled()) { + /* For testing block IO throttling only */ + tg->clock_type = QEMU_CLOCK_VIRTUAL; + } + tg->is_initialized = false; + qemu_mutex_init(&tg->lock); + throttle_init(&tg->ts); + QLIST_INIT(&tg->head); } +/* This function edits throttle_groups and must be called under the global + * mutex */ +static void throttle_group_obj_complete(UserCreatable *obj, Error **errp) +{ + ThrottleGroup *tg = THROTTLE_GROUP(obj); + ThrottleConfig cfg; + + /* set group name to object id if it exists */ + if (!tg->name && tg->parent_obj.parent) { + tg->name = object_get_canonical_path_component(OBJECT(obj)); + } + /* We must have a group name at this point */ + assert(tg->name); + + /* error if name is duplicate */ + if (throttle_group_exists(tg->name)) { + error_setg(errp, "A group with this name already exists"); + return; + } + + /* check validity */ + throttle_get_config(&tg->ts, &cfg); + if (!throttle_is_valid(&cfg, errp)) { + return; + } + throttle_config(&tg->ts, tg->clock_type, &cfg); + QTAILQ_INSERT_TAIL(&throttle_groups, tg, list); + tg->is_initialized = true; +} + +/* This function edits throttle_groups and must be called under the global + * mutex */ +static void throttle_group_obj_finalize(Object *obj) +{ + ThrottleGroup *tg = THROTTLE_GROUP(obj); + if (tg->is_initialized) { + QTAILQ_REMOVE(&throttle_groups, tg, list); + } + qemu_mutex_destroy(&tg->lock); + g_free(tg->name); +} + +static void throttle_group_set(Object *obj, Visitor *v, const char * name, + void *opaque, Error **errp) + +{ + ThrottleGroup *tg = THROTTLE_GROUP(obj); + ThrottleConfig *cfg; + ThrottleParamInfo *info = opaque; + Error *local_err = NULL; + int64_t value; + + /* If we have finished initialization, don't accept individual property + * changes through QOM. Throttle configuration limits must be set in one + * transaction, as certain combinations are invalid. + */ + if (tg->is_initialized) { + error_setg(&local_err, "Property cannot be set after initialization"); + goto ret; + } + + visit_type_int64(v, name, &value, &local_err); + if (local_err) { + goto ret; + } + if (value < 0) { + error_setg(&local_err, "Property values cannot be negative"); + goto ret; + } + + cfg = &tg->ts.cfg; + switch (info->category) { + case AVG: + cfg->buckets[info->type].avg = value; + break; + case MAX: + cfg->buckets[info->type].max = value; + break; + case BURST_LENGTH: + if (value > UINT_MAX) { + error_setg(&local_err, "%s value must be in the" + "range [0, %u]", info->name, UINT_MAX); + goto ret; + } + cfg->buckets[info->type].burst_length = value; + break; + case IOPS_SIZE: + cfg->op_size = value; + break; + } + +ret: + error_propagate(errp, local_err); + return; + +} + +static void throttle_group_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + ThrottleGroup *tg = THROTTLE_GROUP(obj); + ThrottleConfig cfg; + ThrottleParamInfo *info = opaque; + int64_t value; + + throttle_get_config(&tg->ts, &cfg); + switch (info->category) { + case AVG: + value = cfg.buckets[info->type].avg; + break; + case MAX: + value = cfg.buckets[info->type].max; + break; + case BURST_LENGTH: + value = cfg.buckets[info->type].burst_length; + break; + case IOPS_SIZE: + value = cfg.op_size; + break; + } + + visit_type_int64(v, name, &value, errp); +} + +static void throttle_group_set_limits(Object *obj, Visitor *v, + const char *name, void *opaque, + Error **errp) + +{ + ThrottleGroup *tg = THROTTLE_GROUP(obj); + ThrottleConfig cfg; + ThrottleLimits arg = { 0 }; + ThrottleLimits *argp = &arg; + Error *local_err = NULL; + + visit_type_ThrottleLimits(v, name, &argp, &local_err); + if (local_err) { + goto ret; + } + qemu_mutex_lock(&tg->lock); + throttle_get_config(&tg->ts, &cfg); + throttle_limits_to_config(argp, &cfg, &local_err); + if (local_err) { + goto unlock; + } + throttle_config(&tg->ts, tg->clock_type, &cfg); + +unlock: + qemu_mutex_unlock(&tg->lock); +ret: + error_propagate(errp, local_err); + return; +} + +static void throttle_group_get_limits(Object *obj, Visitor *v, + const char *name, void *opaque, + Error **errp) +{ + ThrottleGroup *tg = THROTTLE_GROUP(obj); + ThrottleConfig cfg; + ThrottleLimits arg = { 0 }; + ThrottleLimits *argp = &arg; + + qemu_mutex_lock(&tg->lock); + throttle_get_config(&tg->ts, &cfg); + qemu_mutex_unlock(&tg->lock); + + throttle_config_to_limits(&cfg, argp); + + visit_type_ThrottleLimits(v, name, &argp, errp); +} + +static bool throttle_group_can_be_deleted(UserCreatable *uc) +{ + return OBJECT(uc)->ref == 1; +} + +static void throttle_group_obj_class_init(ObjectClass *klass, void *class_data) +{ + size_t i = 0; + UserCreatableClass *ucc = USER_CREATABLE_CLASS(klass); + + ucc->complete = throttle_group_obj_complete; + ucc->can_be_deleted = throttle_group_can_be_deleted; + + /* individual properties */ + for (i = 0; i < sizeof(properties) / sizeof(ThrottleParamInfo); i++) { + object_class_property_add(klass, + properties[i].name, + "int", + throttle_group_get, + throttle_group_set, + NULL, &properties[i], + &error_abort); + } + + /* ThrottleLimits */ + object_class_property_add(klass, + "limits", "ThrottleLimits", + throttle_group_get_limits, + throttle_group_set_limits, + NULL, NULL, + &error_abort); +} + +static const TypeInfo throttle_group_info = { + .name = TYPE_THROTTLE_GROUP, + .parent = TYPE_OBJECT, + .class_init = throttle_group_obj_class_init, + .instance_size = sizeof(ThrottleGroup), + .instance_init = throttle_group_obj_init, + .instance_finalize = throttle_group_obj_finalize, + .interfaces = (InterfaceInfo[]) { + { TYPE_USER_CREATABLE }, + { } + }, +}; + static void throttle_groups_init(void) { - qemu_mutex_init(&throttle_groups_lock); + type_register_static(&throttle_group_info); } -block_init(throttle_groups_init); +type_init(throttle_groups_init); diff --git a/block/throttle.c b/block/throttle.c new file mode 100644 index 0000000000..5bca76300f --- /dev/null +++ b/block/throttle.c @@ -0,0 +1,237 @@ +/* + * QEMU block throttling filter driver infrastructure + * + * Copyright (c) 2017 Manos Pitsidianakis + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 or + * (at your option) version 3 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +#include "qemu/osdep.h" +#include "block/throttle-groups.h" +#include "qemu/throttle-options.h" +#include "qapi/error.h" + +static QemuOptsList throttle_opts = { + .name = "throttle", + .head = QTAILQ_HEAD_INITIALIZER(throttle_opts.head), + .desc = { + { + .name = QEMU_OPT_THROTTLE_GROUP_NAME, + .type = QEMU_OPT_STRING, + .help = "Name of the throttle group", + }, + { /* end of list */ } + }, +}; + +static int throttle_configure_tgm(BlockDriverState *bs, + ThrottleGroupMember *tgm, + QDict *options, Error **errp) +{ + int ret; + const char *group_name; + Error *local_err = NULL; + QemuOpts *opts = qemu_opts_create(&throttle_opts, NULL, 0, &error_abort); + + qemu_opts_absorb_qdict(opts, options, &local_err); + if (local_err) { + error_propagate(errp, local_err); + ret = -EINVAL; + goto fin; + } + + group_name = qemu_opt_get(opts, QEMU_OPT_THROTTLE_GROUP_NAME); + if (!group_name) { + error_setg(errp, "Please specify a throttle group"); + ret = -EINVAL; + goto fin; + } else if (!throttle_group_exists(group_name)) { + error_setg(errp, "Throttle group '%s' does not exist", group_name); + ret = -EINVAL; + goto fin; + } + + /* Register membership to group with name group_name */ + throttle_group_register_tgm(tgm, group_name, bdrv_get_aio_context(bs)); + ret = 0; +fin: + qemu_opts_del(opts); + return ret; +} + +static int throttle_open(BlockDriverState *bs, QDict *options, + int flags, Error **errp) +{ + ThrottleGroupMember *tgm = bs->opaque; + + bs->file = bdrv_open_child(NULL, options, "file", bs, + &child_file, false, errp); + if (!bs->file) { + return -EINVAL; + } + bs->supported_write_flags = bs->file->bs->supported_write_flags; + bs->supported_zero_flags = bs->file->bs->supported_zero_flags; + + return throttle_configure_tgm(bs, tgm, options, errp); +} + +static void throttle_close(BlockDriverState *bs) +{ + ThrottleGroupMember *tgm = bs->opaque; + throttle_group_unregister_tgm(tgm); +} + + +static int64_t throttle_getlength(BlockDriverState *bs) +{ + return bdrv_getlength(bs->file->bs); +} + +static int coroutine_fn throttle_co_preadv(BlockDriverState *bs, + uint64_t offset, uint64_t bytes, + QEMUIOVector *qiov, int flags) +{ + + ThrottleGroupMember *tgm = bs->opaque; + throttle_group_co_io_limits_intercept(tgm, bytes, false); + + return bdrv_co_preadv(bs->file, offset, bytes, qiov, flags); +} + +static int coroutine_fn throttle_co_pwritev(BlockDriverState *bs, + uint64_t offset, uint64_t bytes, + QEMUIOVector *qiov, int flags) +{ + ThrottleGroupMember *tgm = bs->opaque; + throttle_group_co_io_limits_intercept(tgm, bytes, true); + + return bdrv_co_pwritev(bs->file, offset, bytes, qiov, flags); +} + +static int coroutine_fn throttle_co_pwrite_zeroes(BlockDriverState *bs, + int64_t offset, int bytes, + BdrvRequestFlags flags) +{ + ThrottleGroupMember *tgm = bs->opaque; + throttle_group_co_io_limits_intercept(tgm, bytes, true); + + return bdrv_co_pwrite_zeroes(bs->file, offset, bytes, flags); +} + +static int coroutine_fn throttle_co_pdiscard(BlockDriverState *bs, + int64_t offset, int bytes) +{ + ThrottleGroupMember *tgm = bs->opaque; + throttle_group_co_io_limits_intercept(tgm, bytes, true); + + return bdrv_co_pdiscard(bs->file->bs, offset, bytes); +} + +static int throttle_co_flush(BlockDriverState *bs) +{ + return bdrv_co_flush(bs->file->bs); +} + +static void throttle_detach_aio_context(BlockDriverState *bs) +{ + ThrottleGroupMember *tgm = bs->opaque; + throttle_group_detach_aio_context(tgm); +} + +static void throttle_attach_aio_context(BlockDriverState *bs, + AioContext *new_context) +{ + ThrottleGroupMember *tgm = bs->opaque; + throttle_group_attach_aio_context(tgm, new_context); +} + +static int throttle_reopen_prepare(BDRVReopenState *reopen_state, + BlockReopenQueue *queue, Error **errp) +{ + ThrottleGroupMember *tgm; + + assert(reopen_state != NULL); + assert(reopen_state->bs != NULL); + + reopen_state->opaque = g_new0(ThrottleGroupMember, 1); + tgm = reopen_state->opaque; + + return throttle_configure_tgm(reopen_state->bs, tgm, reopen_state->options, + errp); +} + +static void throttle_reopen_commit(BDRVReopenState *reopen_state) +{ + ThrottleGroupMember *old_tgm = reopen_state->bs->opaque; + ThrottleGroupMember *new_tgm = reopen_state->opaque; + + throttle_group_unregister_tgm(old_tgm); + g_free(old_tgm); + reopen_state->bs->opaque = new_tgm; + reopen_state->opaque = NULL; +} + +static void throttle_reopen_abort(BDRVReopenState *reopen_state) +{ + ThrottleGroupMember *tgm = reopen_state->opaque; + + throttle_group_unregister_tgm(tgm); + g_free(tgm); + reopen_state->opaque = NULL; +} + +static bool throttle_recurse_is_first_non_filter(BlockDriverState *bs, + BlockDriverState *candidate) +{ + return bdrv_recurse_is_first_non_filter(bs->file->bs, candidate); +} + +static BlockDriver bdrv_throttle = { + .format_name = "throttle", + .protocol_name = "throttle", + .instance_size = sizeof(ThrottleGroupMember), + + .bdrv_file_open = throttle_open, + .bdrv_close = throttle_close, + .bdrv_co_flush = throttle_co_flush, + + .bdrv_child_perm = bdrv_filter_default_perms, + + .bdrv_getlength = throttle_getlength, + + .bdrv_co_preadv = throttle_co_preadv, + .bdrv_co_pwritev = throttle_co_pwritev, + + .bdrv_co_pwrite_zeroes = throttle_co_pwrite_zeroes, + .bdrv_co_pdiscard = throttle_co_pdiscard, + + .bdrv_recurse_is_first_non_filter = throttle_recurse_is_first_non_filter, + + .bdrv_attach_aio_context = throttle_attach_aio_context, + .bdrv_detach_aio_context = throttle_detach_aio_context, + + .bdrv_reopen_prepare = throttle_reopen_prepare, + .bdrv_reopen_commit = throttle_reopen_commit, + .bdrv_reopen_abort = throttle_reopen_abort, + .bdrv_co_get_block_status = bdrv_co_get_block_status_from_file, + + .is_filter = true, +}; + +static void bdrv_throttle_init(void) +{ + bdrv_register(&bdrv_throttle); +} + +block_init(bdrv_throttle_init); diff --git a/blockdev.c b/blockdev.c index 796beaed94..56a6b24a0b 100644 --- a/blockdev.c +++ b/blockdev.c @@ -2686,7 +2686,7 @@ void qmp_block_set_io_throttle(BlockIOThrottle *arg, Error **errp) if (throttle_enabled(&cfg)) { /* Enable I/O limits if they're not enabled yet, otherwise * just update the throttling group. */ - if (!blk_get_public(blk)->throttle_state) { + if (!blk_get_public(blk)->throttle_group_member.throttle_state) { blk_io_limits_enable(blk, arg->has_group ? arg->group : arg->has_device ? arg->device : @@ -2696,7 +2696,7 @@ void qmp_block_set_io_throttle(BlockIOThrottle *arg, Error **errp) } /* Set the new throttling configuration */ blk_set_io_limits(blk, &cfg); - } else if (blk_get_public(blk)->throttle_state) { + } else if (blk_get_public(blk)->throttle_group_member.throttle_state) { /* If all throttling settings are set to 0, disable I/O limits */ blk_io_limits_disable(blk); } diff --git a/configure b/configure index fb7e34a901..a541aadebc 100755 --- a/configure +++ b/configure @@ -634,9 +634,6 @@ case "$cpu" in cpu="$cpu" supported_cpu="yes" ;; - ia64) - cpu="$cpu" - ;; i386|i486|i586|i686|i86pc|BePC) cpu="i386" supported_cpu="yes" @@ -6459,9 +6456,6 @@ for i in $ARCH $TARGET_BASE_ARCH ; do i386|x86_64|x32) disas_config "I386" ;; - ia64*) - disas_config "IA64" - ;; lm32) disas_config "LM32" ;; diff --git a/disas.c b/disas.c index d335c55bbf..d6a1eb9c8e 100644 --- a/disas.c +++ b/disas.c @@ -313,8 +313,6 @@ void disas(FILE *out, void *code, unsigned long size) print_insn = print_insn_s390; #elif defined(__hppa__) print_insn = print_insn_hppa; -#elif defined(__ia64__) - print_insn = print_insn_ia64; #endif if (print_insn == NULL) { print_insn = print_insn_od_host; diff --git a/disas/Makefile.objs b/disas/Makefile.objs index 62632ef0dd..194648fb1a 100644 --- a/disas/Makefile.objs +++ b/disas/Makefile.objs @@ -11,7 +11,6 @@ arm-a64.o-cflags := -I$(libvixldir) -Wno-sign-compare common-obj-$(CONFIG_CRIS_DIS) += cris.o common-obj-$(CONFIG_HPPA_DIS) += hppa.o common-obj-$(CONFIG_I386_DIS) += i386.o -common-obj-$(CONFIG_IA64_DIS) += ia64.o common-obj-$(CONFIG_M68K_DIS) += m68k.o common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o common-obj-$(CONFIG_MIPS_DIS) += mips.o diff --git a/disas/i386.c b/disas/i386.c index f1e376ca4a..a557e678ec 100644 --- a/disas/i386.c +++ b/disas/i386.c @@ -683,6 +683,8 @@ fetch_data(struct disassemble_info *info, bfd_byte *addr) #define PREGRP105 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 105 } } #define PREGRP106 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 106 } } #define PREGRP107 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 107 } } +#define PREGRP108 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 108 } } +#define PREGRP109 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 109 } } #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } } #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } } @@ -1484,7 +1486,7 @@ static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = { /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ - /* f0 */ 1,1,0,0,0,0,0,1,0,0,0,0,0,0,0,0, /* ff */ + /* f0 */ 1,1,0,0,0,1,0,1,0,0,0,0,0,0,0,0, /* ff */ /* ------------------------------- */ /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ }; @@ -1508,7 +1510,7 @@ static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = { /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ - /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0, /* ff */ + /* f0 */ 0,0,0,0,0,1,0,1,0,0,0,0,0,0,0,0, /* ff */ /* ------------------------------- */ /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ }; @@ -1556,7 +1558,7 @@ static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = { /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ - /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ + /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ /* ------------------------------- */ /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ }; @@ -2808,6 +2810,22 @@ static const struct dis386 prefix_user_table[][4] = { { "bsfS", { Gv, Ev } }, { "(bad)", { XX } }, }, + + /* PREGRP108 */ + { + { "bzhi", { Gv, Ev, Bv } }, + { "pext", { Gv, Bv, Ev } }, + { "(bad)", { XX } }, + { "pdep", { Gv, Bv, Ev } }, + }, + + /* PREGRP109 */ + { + { "(bad)", { XX } }, + { "(bad)", { XX } }, + { "(bad)", { XX } }, + { "rorx", { Gv, Ev, Ib } }, + }, }; static const struct dis386 x86_64_table[][2] = { @@ -3108,7 +3126,7 @@ static const struct dis386 three_byte_table[][256] = { { PREGRP105 }, { "(bad)", { XX } }, { "(bad)", { XX } }, - { "(bad)", { XX } }, + { PREGRP108 }, { "(bad)", { XX } }, { PREGRP106 }, /* f8 */ @@ -3394,7 +3412,7 @@ static const struct dis386 three_byte_table[][256] = { { "(bad)", { XX } }, { "(bad)", { XX } }, /* f0 */ - { "(bad)", { XX } }, + { PREGRP109 }, { "(bad)", { XX } }, { "(bad)", { XX } }, { "(bad)", { XX } }, @@ -3559,6 +3577,7 @@ ckvexprefix (void) } else { /* Two byte VEX prefix. */ newrex |= (vex2 & 0x80 ? 0 : REX_R); + newpfx |= PREFIX_VEX_0F; codep += 2; } diff --git a/disas/ia64.c b/disas/ia64.c deleted file mode 100644 index 140754c944..0000000000 --- a/disas/ia64.c +++ /dev/null @@ -1,10600 +0,0 @@ -/* ia64-dis.c -- Disassemble ia64 instructions - Copyright 1998, 1999, 2000, 2002 Free Software Foundation, Inc. - Contributed by David Mosberger-Tang <davidm@hpl.hp.com> - - This file is part of GDB, GAS, and the GNU binutils. - - GDB, GAS, and the GNU binutils are free software; you can redistribute - them and/or modify them under the terms of the GNU General Public - License as published by the Free Software Foundation; either version - 2, or (at your option) any later version. - - GDB, GAS, and the GNU binutils are distributed in the hope that they - will be useful, but WITHOUT ANY WARRANTY; without even the implied - warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See - the GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this file; see the file COPYING. If not, see - <http://www.gnu.org/licenses/>. */ - -#include "qemu/osdep.h" - -#include "disas/bfd.h" - -/* ia64.h -- Header file for ia64 opcode table - Copyright (C) 1998, 1999, 2000, 2002, 2005, 2006 - Free Software Foundation, Inc. - Contributed by David Mosberger-Tang <davidm@hpl.hp.com> */ - - -typedef uint64_t ia64_insn; - -enum ia64_insn_type - { - IA64_TYPE_NIL = 0, /* illegal type */ - IA64_TYPE_A, /* integer alu (I- or M-unit) */ - IA64_TYPE_I, /* non-alu integer (I-unit) */ - IA64_TYPE_M, /* memory (M-unit) */ - IA64_TYPE_B, /* branch (B-unit) */ - IA64_TYPE_F, /* floating-point (F-unit) */ - IA64_TYPE_X, /* long encoding (X-unit) */ - IA64_TYPE_DYN, /* Dynamic opcode */ - IA64_NUM_TYPES - }; - -enum ia64_unit - { - IA64_UNIT_NIL = 0, /* illegal unit */ - IA64_UNIT_I, /* integer unit */ - IA64_UNIT_M, /* memory unit */ - IA64_UNIT_B, /* branching unit */ - IA64_UNIT_F, /* floating-point unit */ - IA64_UNIT_L, /* long "unit" */ - IA64_UNIT_X, /* may be integer or branch unit */ - IA64_NUM_UNITS - }; - -/* Changes to this enumeration must be propagated to the operand table in - bfd/cpu-ia64-opc.c - */ -enum ia64_opnd - { - IA64_OPND_NIL, /* no operand---MUST BE FIRST!*/ - - /* constants */ - IA64_OPND_AR_CSD, /* application register csd (ar.csd) */ - IA64_OPND_AR_CCV, /* application register ccv (ar.ccv) */ - IA64_OPND_AR_PFS, /* application register pfs (ar.pfs) */ - IA64_OPND_C1, /* the constant 1 */ - IA64_OPND_C8, /* the constant 8 */ - IA64_OPND_C16, /* the constant 16 */ - IA64_OPND_GR0, /* gr0 */ - IA64_OPND_IP, /* instruction pointer (ip) */ - IA64_OPND_PR, /* predicate register (pr) */ - IA64_OPND_PR_ROT, /* rotating predicate register (pr.rot) */ - IA64_OPND_PSR, /* processor status register (psr) */ - IA64_OPND_PSR_L, /* processor status register L (psr.l) */ - IA64_OPND_PSR_UM, /* processor status register UM (psr.um) */ - - /* register operands: */ - IA64_OPND_AR3, /* third application register # (bits 20-26) */ - IA64_OPND_B1, /* branch register # (bits 6-8) */ - IA64_OPND_B2, /* branch register # (bits 13-15) */ - IA64_OPND_CR3, /* third control register # (bits 20-26) */ - IA64_OPND_F1, /* first floating-point register # */ - IA64_OPND_F2, /* second floating-point register # */ - IA64_OPND_F3, /* third floating-point register # */ - IA64_OPND_F4, /* fourth floating-point register # */ - IA64_OPND_P1, /* first predicate # */ - IA64_OPND_P2, /* second predicate # */ - IA64_OPND_R1, /* first register # */ - IA64_OPND_R2, /* second register # */ - IA64_OPND_R3, /* third register # */ - IA64_OPND_R3_2, /* third register # (limited to gr0-gr3) */ - - /* memory operands: */ - IA64_OPND_MR3, /* memory at addr of third register # */ - - /* indirect operands: */ - IA64_OPND_CPUID_R3, /* cpuid[reg] */ - IA64_OPND_DBR_R3, /* dbr[reg] */ - IA64_OPND_DTR_R3, /* dtr[reg] */ - IA64_OPND_ITR_R3, /* itr[reg] */ - IA64_OPND_IBR_R3, /* ibr[reg] */ - IA64_OPND_MSR_R3, /* msr[reg] */ - IA64_OPND_PKR_R3, /* pkr[reg] */ - IA64_OPND_PMC_R3, /* pmc[reg] */ - IA64_OPND_PMD_R3, /* pmd[reg] */ - IA64_OPND_RR_R3, /* rr[reg] */ - - /* immediate operands: */ - IA64_OPND_CCNT5, /* 5-bit count (31 - bits 20-24) */ - IA64_OPND_CNT2a, /* 2-bit count (1 + bits 27-28) */ - IA64_OPND_CNT2b, /* 2-bit count (bits 27-28): 1, 2, 3 */ - IA64_OPND_CNT2c, /* 2-bit count (bits 30-31): 0, 7, 15, or 16 */ - IA64_OPND_CNT5, /* 5-bit count (bits 14-18) */ - IA64_OPND_CNT6, /* 6-bit count (bits 27-32) */ - IA64_OPND_CPOS6a, /* 6-bit count (63 - bits 20-25) */ - IA64_OPND_CPOS6b, /* 6-bit count (63 - bits 14-19) */ - IA64_OPND_CPOS6c, /* 6-bit count (63 - bits 31-36) */ - IA64_OPND_IMM1, /* signed 1-bit immediate (bit 36) */ - IA64_OPND_IMMU2, /* unsigned 2-bit immediate (bits 13-14) */ - IA64_OPND_IMMU5b, /* unsigned 5-bit immediate (32 + bits 14-18) */ - IA64_OPND_IMMU7a, /* unsigned 7-bit immediate (bits 13-19) */ - IA64_OPND_IMMU7b, /* unsigned 7-bit immediate (bits 20-26) */ - IA64_OPND_SOF, /* 8-bit stack frame size */ - IA64_OPND_SOL, /* 8-bit size of locals */ - IA64_OPND_SOR, /* 6-bit number of rotating registers (scaled by 8) */ - IA64_OPND_IMM8, /* signed 8-bit immediate (bits 13-19 & 36) */ - IA64_OPND_IMM8U4, /* cmp4*u signed 8-bit immediate (bits 13-19 & 36) */ - IA64_OPND_IMM8M1, /* signed 8-bit immediate -1 (bits 13-19 & 36) */ - IA64_OPND_IMM8M1U4, /* cmp4*u signed 8-bit immediate -1 (bits 13-19 & 36)*/ - IA64_OPND_IMM8M1U8, /* cmp*u signed 8-bit immediate -1 (bits 13-19 & 36) */ - IA64_OPND_IMMU9, /* unsigned 9-bit immediate (bits 33-34, 20-26) */ - IA64_OPND_IMM9a, /* signed 9-bit immediate (bits 6-12, 27, 36) */ - IA64_OPND_IMM9b, /* signed 9-bit immediate (bits 13-19, 27, 36) */ - IA64_OPND_IMM14, /* signed 14-bit immediate (bits 13-19, 27-32, 36) */ - IA64_OPND_IMM17, /* signed 17-bit immediate (2*bits 6-12, 24-31, 36) */ - IA64_OPND_IMMU21, /* unsigned 21-bit immediate (bits 6-25, 36) */ - IA64_OPND_IMM22, /* signed 22-bit immediate (bits 13-19, 22-36) */ - IA64_OPND_IMMU24, /* unsigned 24-bit immediate (bits 6-26, 31-32, 36) */ - IA64_OPND_IMM44, /* signed 44-bit immediate (2^16*bits 6-32, 36) */ - IA64_OPND_IMMU62, /* unsigned 62-bit immediate */ - IA64_OPND_IMMU64, /* unsigned 64-bit immediate (lotsa bits...) */ - IA64_OPND_INC3, /* signed 3-bit (bits 13-15): +/-1, 4, 8, 16 */ - IA64_OPND_LEN4, /* 4-bit count (bits 27-30 + 1) */ - IA64_OPND_LEN6, /* 6-bit count (bits 27-32 + 1) */ - IA64_OPND_MBTYPE4, /* 4-bit mux type (bits 20-23) */ - IA64_OPND_MHTYPE8, /* 8-bit mux type (bits 20-27) */ - IA64_OPND_POS6, /* 6-bit count (bits 14-19) */ - IA64_OPND_TAG13, /* signed 13-bit tag (ip + 16*bits 6-12, 33-34) */ - IA64_OPND_TAG13b, /* signed 13-bit tag (ip + 16*bits 24-32) */ - IA64_OPND_TGT25, /* signed 25-bit (ip + 16*bits 6-25, 36) */ - IA64_OPND_TGT25b, /* signed 25-bit (ip + 16*bits 6-12, 20-32, 36) */ - IA64_OPND_TGT25c, /* signed 25-bit (ip + 16*bits 13-32, 36) */ - IA64_OPND_TGT64, /* 64-bit (ip + 16*bits 13-32, 36, 2-40(L)) */ - IA64_OPND_LDXMOV, /* any symbol, generates R_IA64_LDXMOV. */ - - IA64_OPND_COUNT /* # of operand types (MUST BE LAST!) */ - }; - -enum ia64_dependency_mode -{ - IA64_DV_RAW, - IA64_DV_WAW, - IA64_DV_WAR, -}; - -enum ia64_dependency_semantics -{ - IA64_DVS_NONE, - IA64_DVS_IMPLIED, - IA64_DVS_IMPLIEDF, - IA64_DVS_DATA, - IA64_DVS_INSTR, - IA64_DVS_SPECIFIC, - IA64_DVS_STOP, - IA64_DVS_OTHER, -}; - -enum ia64_resource_specifier -{ - IA64_RS_ANY, - IA64_RS_AR_K, - IA64_RS_AR_UNAT, - IA64_RS_AR, /* 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 45-47, 67-111 */ - IA64_RS_ARb, /* 48-63, 112-127 */ - IA64_RS_BR, - IA64_RS_CFM, - IA64_RS_CPUID, - IA64_RS_CR_IRR, - IA64_RS_CR_LRR, - IA64_RS_CR, /* 3-7,10-15,18,26-63,75-79,82-127 */ - IA64_RS_DBR, - IA64_RS_FR, - IA64_RS_FRb, - IA64_RS_GR0, - IA64_RS_GR, - IA64_RS_IBR, - IA64_RS_INSERVICE, /* CR[EOI] or CR[IVR] */ - IA64_RS_MSR, - IA64_RS_PKR, - IA64_RS_PMC, - IA64_RS_PMD, - IA64_RS_PR, /* non-rotating, 1-15 */ - IA64_RS_PRr, /* rotating, 16-62 */ - IA64_RS_PR63, - IA64_RS_RR, - - IA64_RS_ARX, /* ARs not in RS_AR or RS_ARb */ - IA64_RS_CRX, /* CRs not in RS_CR */ - IA64_RS_PSR, /* PSR bits */ - IA64_RS_RSE, /* implementation-specific RSE resources */ - IA64_RS_AR_FPSR, -}; - -enum ia64_rse_resource -{ - IA64_RSE_N_STACKED_PHYS, - IA64_RSE_BOF, - IA64_RSE_STORE_REG, - IA64_RSE_LOAD_REG, - IA64_RSE_BSPLOAD, - IA64_RSE_RNATBITINDEX, - IA64_RSE_CFLE, - IA64_RSE_NDIRTY, -}; - -/* Information about a given resource dependency */ -struct ia64_dependency -{ - /* Name of the resource */ - const char *name; - /* Does this dependency need further specification? */ - enum ia64_resource_specifier specifier; - /* Mode of dependency */ - enum ia64_dependency_mode mode; - /* Dependency semantics */ - enum ia64_dependency_semantics semantics; - /* Register index, if applicable (distinguishes AR, CR, and PSR deps) */ -#define REG_NONE (-1) - int regindex; - /* Special info on semantics */ - const char *info; -}; - -/* Two arrays of indexes into the ia64_dependency table. - chks are dependencies to check for conflicts when an opcode is - encountered; regs are dependencies to register (mark as used) when an - opcode is used. chks correspond to readers (RAW) or writers (WAW or - WAR) of a resource, while regs correspond to writers (RAW or WAW) and - readers (WAR) of a resource. */ -struct ia64_opcode_dependency -{ - int nchks; - const unsigned short *chks; - int nregs; - const unsigned short *regs; -}; - -/* encode/extract the note/index for a dependency */ -#define RDEP(N,X) (((N)<<11)|(X)) -#define NOTE(X) (((X)>>11)&0x1F) -#define DEP(X) ((X)&0x7FF) - -/* A template descriptor describes the execution units that are active - for each of the three slots. It also specifies the location of - instruction group boundaries that may be present between two slots. */ -struct ia64_templ_desc - { - int group_boundary; /* 0=no boundary, 1=between slot 0 & 1, etc. */ - enum ia64_unit exec_unit[3]; - const char *name; - }; - -/* The opcode table is an array of struct ia64_opcode. */ - -struct ia64_opcode - { - /* The opcode name. */ - const char *name; - - /* The type of the instruction: */ - enum ia64_insn_type type; - - /* Number of output operands: */ - int num_outputs; - - /* The opcode itself. Those bits which will be filled in with - operands are zeroes. */ - ia64_insn opcode; - - /* The opcode mask. This is used by the disassembler. This is a - mask containing ones indicating those bits which must match the - opcode field, and zeroes indicating those bits which need not - match (and are presumably filled in by operands). */ - ia64_insn mask; - - /* An array of operand codes. Each code is an index into the - operand table. They appear in the order which the operands must - appear in assembly code, and are terminated by a zero. */ - enum ia64_opnd operands[5]; - - /* One bit flags for the opcode. These are primarily used to - indicate specific processors and environments support the - instructions. The defined values are listed below. */ - unsigned int flags; - - /* Used by ia64_find_next_opcode (). */ - short ent_index; - - /* Opcode dependencies. */ - const struct ia64_opcode_dependency *dependencies; - }; - -/* Values defined for the flags field of a struct ia64_opcode. */ - -#define IA64_OPCODE_FIRST (1<<0) /* must be first in an insn group */ -#define IA64_OPCODE_X_IN_MLX (1<<1) /* insn is allowed in X slot of MLX */ -#define IA64_OPCODE_LAST (1<<2) /* must be last in an insn group */ -#define IA64_OPCODE_PRIV (1<<3) /* privileged instruct */ -#define IA64_OPCODE_SLOT2 (1<<4) /* insn allowed in slot 2 only */ -#define IA64_OPCODE_NO_PRED (1<<5) /* insn cannot be predicated */ -#define IA64_OPCODE_PSEUDO (1<<6) /* insn is a pseudo-op */ -#define IA64_OPCODE_F2_EQ_F3 (1<<7) /* constraint: F2 == F3 */ -#define IA64_OPCODE_LEN_EQ_64MCNT (1<<8) /* constraint: LEN == 64-CNT */ -#define IA64_OPCODE_MOD_RRBS (1<<9) /* modifies all rrbs in CFM */ -#define IA64_OPCODE_POSTINC (1<<10) /* postincrement MR3 operand */ - -/* A macro to extract the major opcode from an instruction. */ -#define IA64_OP(i) (((i) >> 37) & 0xf) - -enum ia64_operand_class - { - IA64_OPND_CLASS_CST, /* constant */ - IA64_OPND_CLASS_REG, /* register */ - IA64_OPND_CLASS_IND, /* indirect register */ - IA64_OPND_CLASS_ABS, /* absolute value */ - IA64_OPND_CLASS_REL, /* IP-relative value */ - }; - -/* The operands table is an array of struct ia64_operand. */ - -struct ia64_operand -{ - enum ia64_operand_class class; - - /* Set VALUE as the operand bits for the operand of type SELF in the - instruction pointed to by CODE. If an error occurs, *CODE is not - modified and the returned string describes the cause of the - error. If no error occurs, NULL is returned. */ - const char *(*insert) (const struct ia64_operand *self, ia64_insn value, - ia64_insn *code); - - /* Extract the operand bits for an operand of type SELF from - instruction CODE store them in *VALUE. If an error occurs, the - cause of the error is described by the string returned. If no - error occurs, NULL is returned. */ - const char *(*extract) (const struct ia64_operand *self, ia64_insn code, - ia64_insn *value); - - /* A string whose meaning depends on the operand class. */ - - const char *str; - - struct bit_field - { - /* The number of bits in the operand. */ - int bits; - - /* How far the operand is left shifted in the instruction. */ - int shift; - } - field[4]; /* no operand has more than this many bit-fields */ - - unsigned int flags; - - const char *desc; /* brief description */ -}; - -/* Values defined for the flags field of a struct ia64_operand. */ - -/* Disassemble as signed decimal (instead of hex): */ -#define IA64_OPND_FLAG_DECIMAL_SIGNED (1<<0) -/* Disassemble as unsigned decimal (instead of hex): */ -#define IA64_OPND_FLAG_DECIMAL_UNSIGNED (1<<1) - -#define NELEMS(a) ((int) (sizeof (a) / sizeof (a[0]))) - -static const char* -ins_rsvd (const struct ia64_operand *self ATTRIBUTE_UNUSED, - ia64_insn value ATTRIBUTE_UNUSED, ia64_insn *code ATTRIBUTE_UNUSED) -{ - return "internal error---this shouldn't happen"; -} - -static const char* -ext_rsvd (const struct ia64_operand *self ATTRIBUTE_UNUSED, - ia64_insn code ATTRIBUTE_UNUSED, ia64_insn *valuep ATTRIBUTE_UNUSED) -{ - return "internal error---this shouldn't happen"; -} - -static const char* -ins_const (const struct ia64_operand *self ATTRIBUTE_UNUSED, - ia64_insn value ATTRIBUTE_UNUSED, ia64_insn *code ATTRIBUTE_UNUSED) -{ - return 0; -} - -static const char* -ext_const (const struct ia64_operand *self ATTRIBUTE_UNUSED, - ia64_insn code ATTRIBUTE_UNUSED, ia64_insn *valuep ATTRIBUTE_UNUSED) -{ - return 0; -} - -static const char* -ins_reg (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) -{ - if (value >= 1u << self->field[0].bits) - return "register number out of range"; - - *code |= value << self->field[0].shift; - return 0; -} - -static const char* -ext_reg (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) -{ - *valuep = ((code >> self->field[0].shift) - & ((1u << self->field[0].bits) - 1)); - return 0; -} - -static const char* -ins_immu (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) -{ - ia64_insn new = 0; - int i; - - for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i) - { - new |= ((value & ((((ia64_insn) 1) << self->field[i].bits) - 1)) - << self->field[i].shift); - value >>= self->field[i].bits; - } - if (value) - return "integer operand out of range"; - - *code |= new; - return 0; -} - -static const char* -ext_immu (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) -{ - uint64_t value = 0; - int i, bits = 0, total = 0; - - for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i) - { - bits = self->field[i].bits; - value |= ((code >> self->field[i].shift) - & ((((uint64_t) 1) << bits) - 1)) << total; - total += bits; - } - *valuep = value; - return 0; -} - -static const char* -ins_immu5b (const struct ia64_operand *self, ia64_insn value, - ia64_insn *code) -{ - if (value < 32 || value > 63) - return "value must be between 32 and 63"; - return ins_immu (self, value - 32, code); -} - -static const char* -ext_immu5b (const struct ia64_operand *self, ia64_insn code, - ia64_insn *valuep) -{ - const char *result; - - result = ext_immu (self, code, valuep); - if (result) - return result; - - *valuep = *valuep + 32; - return 0; -} - -static const char* -ins_immus8 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) -{ - if (value & 0x7) - return "value not an integer multiple of 8"; - return ins_immu (self, value >> 3, code); -} - -static const char* -ext_immus8 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) -{ - const char *result; - - result = ext_immu (self, code, valuep); - if (result) - return result; - - *valuep = *valuep << 3; - return 0; -} - -static const char* -ins_imms_scaled (const struct ia64_operand *self, ia64_insn value, - ia64_insn *code, int scale) -{ - int64_t svalue = value, sign_bit = 0; - ia64_insn new = 0; - int i; - - svalue >>= scale; - - for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i) - { - new |= ((svalue & ((((ia64_insn) 1) << self->field[i].bits) - 1)) - << self->field[i].shift); - sign_bit = (svalue >> (self->field[i].bits - 1)) & 1; - svalue >>= self->field[i].bits; - } - if ((!sign_bit && svalue != 0) || (sign_bit && svalue != -1)) - return "integer operand out of range"; - - *code |= new; - return 0; -} - -static const char* -ext_imms_scaled (const struct ia64_operand *self, ia64_insn code, - ia64_insn *valuep, int scale) -{ - int i, bits = 0, total = 0; - int64_t val = 0, sign; - - for (i = 0; i < NELEMS (self->field) && self->field[i].bits; ++i) - { - bits = self->field[i].bits; - val |= ((code >> self->field[i].shift) - & ((((uint64_t) 1) << bits) - 1)) << total; - total += bits; - } - /* sign extend: */ - sign = (int64_t) 1 << (total - 1); - val = (val ^ sign) - sign; - - *valuep = (val << scale); - return 0; -} - -static const char* -ins_imms (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) -{ - return ins_imms_scaled (self, value, code, 0); -} - -static const char* -ins_immsu4 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) -{ - value = ((value & 0xffffffff) ^ 0x80000000) - 0x80000000; - - return ins_imms_scaled (self, value, code, 0); -} - -static const char* -ext_imms (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) -{ - return ext_imms_scaled (self, code, valuep, 0); -} - -static const char* -ins_immsm1 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) -{ - --value; - return ins_imms_scaled (self, value, code, 0); -} - -static const char* -ins_immsm1u4 (const struct ia64_operand *self, ia64_insn value, - ia64_insn *code) -{ - value = ((value & 0xffffffff) ^ 0x80000000) - 0x80000000; - - --value; - return ins_imms_scaled (self, value, code, 0); -} - -static const char* -ext_immsm1 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) -{ - const char *res = ext_imms_scaled (self, code, valuep, 0); - - ++*valuep; - return res; -} - -static const char* -ins_imms1 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) -{ - return ins_imms_scaled (self, value, code, 1); -} - -static const char* -ext_imms1 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) -{ - return ext_imms_scaled (self, code, valuep, 1); -} - -static const char* -ins_imms4 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) -{ - return ins_imms_scaled (self, value, code, 4); -} - -static const char* -ext_imms4 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) -{ - return ext_imms_scaled (self, code, valuep, 4); -} - -static const char* -ins_imms16 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) -{ - return ins_imms_scaled (self, value, code, 16); -} - -static const char* -ext_imms16 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) -{ - return ext_imms_scaled (self, code, valuep, 16); -} - -static const char* -ins_cimmu (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) -{ - ia64_insn mask = (((ia64_insn) 1) << self->field[0].bits) - 1; - return ins_immu (self, value ^ mask, code); -} - -static const char* -ext_cimmu (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) -{ - const char *result; - ia64_insn mask; - - mask = (((ia64_insn) 1) << self->field[0].bits) - 1; - result = ext_immu (self, code, valuep); - if (!result) - { - mask = (((ia64_insn) 1) << self->field[0].bits) - 1; - *valuep ^= mask; - } - return result; -} - -static const char* -ins_cnt (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) -{ - --value; - if (value >= ((uint64_t) 1) << self->field[0].bits) - return "count out of range"; - - *code |= value << self->field[0].shift; - return 0; -} - -static const char* -ext_cnt (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) -{ - *valuep = ((code >> self->field[0].shift) - & ((((uint64_t) 1) << self->field[0].bits) - 1)) + 1; - return 0; -} - -static const char* -ins_cnt2b (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) -{ - --value; - - if (value > 2) - return "count must be in range 1..3"; - - *code |= value << self->field[0].shift; - return 0; -} - -static const char* -ext_cnt2b (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) -{ - *valuep = ((code >> self->field[0].shift) & 0x3) + 1; - return 0; -} - -static const char* -ins_cnt2c (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) -{ - switch (value) - { - case 0: value = 0; break; - case 7: value = 1; break; - case 15: value = 2; break; - case 16: value = 3; break; - default: return "count must be 0, 7, 15, or 16"; - } - *code |= value << self->field[0].shift; - return 0; -} - -static const char* -ext_cnt2c (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) -{ - ia64_insn value; - - value = (code >> self->field[0].shift) & 0x3; - switch (value) - { - case 0: value = 0; break; - case 1: value = 7; break; - case 2: value = 15; break; - case 3: value = 16; break; - } - *valuep = value; - return 0; -} - -static const char* -ins_inc3 (const struct ia64_operand *self, ia64_insn value, ia64_insn *code) -{ - int64_t val = value; - uint64_t sign = 0; - - if (val < 0) - { - sign = 0x4; - value = -value; - } - switch (value) - { - case 1: value = 3; break; - case 4: value = 2; break; - case 8: value = 1; break; - case 16: value = 0; break; - default: return "count must be +/- 1, 4, 8, or 16"; - } - *code |= (sign | value) << self->field[0].shift; - return 0; -} - -static const char* -ext_inc3 (const struct ia64_operand *self, ia64_insn code, ia64_insn *valuep) -{ - int64_t val; - int negate; - - val = (code >> self->field[0].shift) & 0x7; - negate = val & 0x4; - switch (val & 0x3) - { - case 0: val = 16; break; - case 1: val = 8; break; - case 2: val = 4; break; - case 3: val = 1; break; - } - if (negate) - val = -val; - - *valuep = val; - return 0; -} - -/* glib.h defines ABS so we must undefine it to avoid a clash */ -#undef ABS - -#define CST IA64_OPND_CLASS_CST -#define REG IA64_OPND_CLASS_REG -#define IND IA64_OPND_CLASS_IND -#define ABS IA64_OPND_CLASS_ABS -#define REL IA64_OPND_CLASS_REL - -#define SDEC IA64_OPND_FLAG_DECIMAL_SIGNED -#define UDEC IA64_OPND_FLAG_DECIMAL_UNSIGNED - -const struct ia64_operand elf64_ia64_operands[IA64_OPND_COUNT] = - { - /* constants: */ - { CST, ins_const, ext_const, "NIL", {{ 0, 0}}, 0, "<none>" }, - { CST, ins_const, ext_const, "ar.csd", {{ 0, 0}}, 0, "ar.csd" }, - { CST, ins_const, ext_const, "ar.ccv", {{ 0, 0}}, 0, "ar.ccv" }, - { CST, ins_const, ext_const, "ar.pfs", {{ 0, 0}}, 0, "ar.pfs" }, - { CST, ins_const, ext_const, "1", {{ 0, 0}}, 0, "1" }, - { CST, ins_const, ext_const, "8", {{ 0, 0}}, 0, "8" }, - { CST, ins_const, ext_const, "16", {{ 0, 0}}, 0, "16" }, - { CST, ins_const, ext_const, "r0", {{ 0, 0}}, 0, "r0" }, - { CST, ins_const, ext_const, "ip", {{ 0, 0}}, 0, "ip" }, - { CST, ins_const, ext_const, "pr", {{ 0, 0}}, 0, "pr" }, - { CST, ins_const, ext_const, "pr.rot", {{ 0, 0}}, 0, "pr.rot" }, - { CST, ins_const, ext_const, "psr", {{ 0, 0}}, 0, "psr" }, - { CST, ins_const, ext_const, "psr.l", {{ 0, 0}}, 0, "psr.l" }, - { CST, ins_const, ext_const, "psr.um", {{ 0, 0}}, 0, "psr.um" }, - - /* register operands: */ - { REG, ins_reg, ext_reg, "ar", {{ 7, 20}}, 0, /* AR3 */ - "an application register" }, - { REG, ins_reg, ext_reg, "b", {{ 3, 6}}, 0, /* B1 */ - "a branch register" }, - { REG, ins_reg, ext_reg, "b", {{ 3, 13}}, 0, /* B2 */ - "a branch register"}, - { REG, ins_reg, ext_reg, "cr", {{ 7, 20}}, 0, /* CR */ - "a control register"}, - { REG, ins_reg, ext_reg, "f", {{ 7, 6}}, 0, /* F1 */ - "a floating-point register" }, - { REG, ins_reg, ext_reg, "f", {{ 7, 13}}, 0, /* F2 */ - "a floating-point register" }, - { REG, ins_reg, ext_reg, "f", {{ 7, 20}}, 0, /* F3 */ - "a floating-point register" }, - { REG, ins_reg, ext_reg, "f", {{ 7, 27}}, 0, /* F4 */ - "a floating-point register" }, - { REG, ins_reg, ext_reg, "p", {{ 6, 6}}, 0, /* P1 */ - "a predicate register" }, - { REG, ins_reg, ext_reg, "p", {{ 6, 27}}, 0, /* P2 */ - "a predicate register" }, - { REG, ins_reg, ext_reg, "r", {{ 7, 6}}, 0, /* R1 */ - "a general register" }, - { REG, ins_reg, ext_reg, "r", {{ 7, 13}}, 0, /* R2 */ - "a general register" }, - { REG, ins_reg, ext_reg, "r", {{ 7, 20}}, 0, /* R3 */ - "a general register" }, - { REG, ins_reg, ext_reg, "r", {{ 2, 20}}, 0, /* R3_2 */ - "a general register r0-r3" }, - - /* memory operands: */ - { IND, ins_reg, ext_reg, "", {{7, 20}}, 0, /* MR3 */ - "a memory address" }, - - /* indirect operands: */ - { IND, ins_reg, ext_reg, "cpuid", {{7, 20}}, 0, /* CPUID_R3 */ - "a cpuid register" }, - { IND, ins_reg, ext_reg, "dbr", {{7, 20}}, 0, /* DBR_R3 */ - "a dbr register" }, - { IND, ins_reg, ext_reg, "dtr", {{7, 20}}, 0, /* DTR_R3 */ - "a dtr register" }, - { IND, ins_reg, ext_reg, "itr", {{7, 20}}, 0, /* ITR_R3 */ - "an itr register" }, - { IND, ins_reg, ext_reg, "ibr", {{7, 20}}, 0, /* IBR_R3 */ - "an ibr register" }, - { IND, ins_reg, ext_reg, "msr", {{7, 20}}, 0, /* MSR_R3 */ - "an msr register" }, - { IND, ins_reg, ext_reg, "pkr", {{7, 20}}, 0, /* PKR_R3 */ - "a pkr register" }, - { IND, ins_reg, ext_reg, "pmc", {{7, 20}}, 0, /* PMC_R3 */ - "a pmc register" }, - { IND, ins_reg, ext_reg, "pmd", {{7, 20}}, 0, /* PMD_R3 */ - "a pmd register" }, - { IND, ins_reg, ext_reg, "rr", {{7, 20}}, 0, /* RR_R3 */ - "an rr register" }, - - /* immediate operands: */ - { ABS, ins_cimmu, ext_cimmu, 0, {{ 5, 20 }}, UDEC, /* CCNT5 */ - "a 5-bit count (0-31)" }, - { ABS, ins_cnt, ext_cnt, 0, {{ 2, 27 }}, UDEC, /* CNT2a */ - "a 2-bit count (1-4)" }, - { ABS, ins_cnt2b, ext_cnt2b, 0, {{ 2, 27 }}, UDEC, /* CNT2b */ - "a 2-bit count (1-3)" }, - { ABS, ins_cnt2c, ext_cnt2c, 0, {{ 2, 30 }}, UDEC, /* CNT2c */ - "a count (0, 7, 15, or 16)" }, - { ABS, ins_immu, ext_immu, 0, {{ 5, 14}}, UDEC, /* CNT5 */ - "a 5-bit count (0-31)" }, - { ABS, ins_immu, ext_immu, 0, {{ 6, 27}}, UDEC, /* CNT6 */ - "a 6-bit count (0-63)" }, - { ABS, ins_cimmu, ext_cimmu, 0, {{ 6, 20}}, UDEC, /* CPOS6a */ - "a 6-bit bit pos (0-63)" }, - { ABS, ins_cimmu, ext_cimmu, 0, {{ 6, 14}}, UDEC, /* CPOS6b */ - "a 6-bit bit pos (0-63)" }, - { ABS, ins_cimmu, ext_cimmu, 0, {{ 6, 31}}, UDEC, /* CPOS6c */ - "a 6-bit bit pos (0-63)" }, - { ABS, ins_imms, ext_imms, 0, {{ 1, 36}}, SDEC, /* IMM1 */ - "a 1-bit integer (-1, 0)" }, - { ABS, ins_immu, ext_immu, 0, {{ 2, 13}}, UDEC, /* IMMU2 */ - "a 2-bit unsigned (0-3)" }, - { ABS, ins_immu5b, ext_immu5b, 0, {{ 5, 14}}, UDEC, /* IMMU5b */ - "a 5-bit unsigned (32 + (0-31))" }, - { ABS, ins_immu, ext_immu, 0, {{ 7, 13}}, 0, /* IMMU7a */ - "a 7-bit unsigned (0-127)" }, - { ABS, ins_immu, ext_immu, 0, {{ 7, 20}}, 0, /* IMMU7b */ - "a 7-bit unsigned (0-127)" }, - { ABS, ins_immu, ext_immu, 0, {{ 7, 13}}, UDEC, /* SOF */ - "a frame size (register count)" }, - { ABS, ins_immu, ext_immu, 0, {{ 7, 20}}, UDEC, /* SOL */ - "a local register count" }, - { ABS, ins_immus8,ext_immus8,0, {{ 4, 27}}, UDEC, /* SOR */ - "a rotating register count (integer multiple of 8)" }, - { ABS, ins_imms, ext_imms, 0, /* IMM8 */ - {{ 7, 13}, { 1, 36}}, SDEC, - "an 8-bit integer (-128-127)" }, - { ABS, ins_immsu4, ext_imms, 0, /* IMM8U4 */ - {{ 7, 13}, { 1, 36}}, SDEC, - "an 8-bit signed integer for 32-bit unsigned compare (-128-127)" }, - { ABS, ins_immsm1, ext_immsm1, 0, /* IMM8M1 */ - {{ 7, 13}, { 1, 36}}, SDEC, - "an 8-bit integer (-127-128)" }, - { ABS, ins_immsm1u4, ext_immsm1, 0, /* IMM8M1U4 */ - {{ 7, 13}, { 1, 36}}, SDEC, - "an 8-bit integer for 32-bit unsigned compare (-127-(-1),1-128,0x100000000)" }, - { ABS, ins_immsm1, ext_immsm1, 0, /* IMM8M1U8 */ - {{ 7, 13}, { 1, 36}}, SDEC, - "an 8-bit integer for 64-bit unsigned compare (-127-(-1),1-128,0x10000000000000000)" }, - { ABS, ins_immu, ext_immu, 0, {{ 2, 33}, { 7, 20}}, 0, /* IMMU9 */ - "a 9-bit unsigned (0-511)" }, - { ABS, ins_imms, ext_imms, 0, /* IMM9a */ - {{ 7, 6}, { 1, 27}, { 1, 36}}, SDEC, - "a 9-bit integer (-256-255)" }, - { ABS, ins_imms, ext_imms, 0, /* IMM9b */ - {{ 7, 13}, { 1, 27}, { 1, 36}}, SDEC, - "a 9-bit integer (-256-255)" }, - { ABS, ins_imms, ext_imms, 0, /* IMM14 */ - {{ 7, 13}, { 6, 27}, { 1, 36}}, SDEC, - "a 14-bit integer (-8192-8191)" }, - { ABS, ins_imms1, ext_imms1, 0, /* IMM17 */ - {{ 7, 6}, { 8, 24}, { 1, 36}}, 0, - "a 17-bit integer (-65536-65535)" }, - { ABS, ins_immu, ext_immu, 0, {{20, 6}, { 1, 36}}, 0, /* IMMU21 */ - "a 21-bit unsigned" }, - { ABS, ins_imms, ext_imms, 0, /* IMM22 */ - {{ 7, 13}, { 9, 27}, { 5, 22}, { 1, 36}}, SDEC, - "a 22-bit signed integer" }, - { ABS, ins_immu, ext_immu, 0, /* IMMU24 */ - {{21, 6}, { 2, 31}, { 1, 36}}, 0, - "a 24-bit unsigned" }, - { ABS, ins_imms16,ext_imms16,0, {{27, 6}, { 1, 36}}, 0, /* IMM44 */ - "a 44-bit unsigned (least 16 bits ignored/zeroes)" }, - { ABS, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0, /* IMMU62 */ - "a 62-bit unsigned" }, - { ABS, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0, /* IMMU64 */ - "a 64-bit unsigned" }, - { ABS, ins_inc3, ext_inc3, 0, {{ 3, 13}}, SDEC, /* INC3 */ - "an increment (+/- 1, 4, 8, or 16)" }, - { ABS, ins_cnt, ext_cnt, 0, {{ 4, 27}}, UDEC, /* LEN4 */ - "a 4-bit length (1-16)" }, - { ABS, ins_cnt, ext_cnt, 0, {{ 6, 27}}, UDEC, /* LEN6 */ - "a 6-bit length (1-64)" }, - { ABS, ins_immu, ext_immu, 0, {{ 4, 20}}, 0, /* MBTYPE4 */ - "a mix type (@rev, @mix, @shuf, @alt, or @brcst)" }, - { ABS, ins_immu, ext_immu, 0, {{ 8, 20}}, 0, /* MBTYPE8 */ - "an 8-bit mix type" }, - { ABS, ins_immu, ext_immu, 0, {{ 6, 14}}, UDEC, /* POS6 */ - "a 6-bit bit pos (0-63)" }, - { REL, ins_imms4, ext_imms4, 0, {{ 7, 6}, { 2, 33}}, 0, /* TAG13 */ - "a branch tag" }, - { REL, ins_imms4, ext_imms4, 0, {{ 9, 24}}, 0, /* TAG13b */ - "a branch tag" }, - { REL, ins_imms4, ext_imms4, 0, {{20, 6}, { 1, 36}}, 0, /* TGT25 */ - "a branch target" }, - { REL, ins_imms4, ext_imms4, 0, /* TGT25b */ - {{ 7, 6}, {13, 20}, { 1, 36}}, 0, - "a branch target" }, - { REL, ins_imms4, ext_imms4, 0, {{20, 13}, { 1, 36}}, 0, /* TGT25c */ - "a branch target" }, - { REL, ins_rsvd, ext_rsvd, 0, {{0, 0}}, 0, /* TGT64 */ - "a branch target" }, - - { ABS, ins_const, ext_const, 0, {{0, 0}}, 0, /* LDXMOV */ - "ldxmov target" }, - }; - - -/* ia64-asmtab.h -- Header for compacted IA-64 opcode tables. - Copyright 1999, 2000 Free Software Foundation, Inc. - Contributed by Bob Manson of Cygnus Support <manson@cygnus.com> - - This file is part of GDB, GAS, and the GNU binutils. - - GDB, GAS, and the GNU binutils are free software; you can redistribute - them and/or modify them under the terms of the GNU General Public - License as published by the Free Software Foundation; either version - 2, or (at your option) any later version. - - GDB, GAS, and the GNU binutils are distributed in the hope that they - will be useful, but WITHOUT ANY WARRANTY; without even the implied - warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See - the GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this file; see the file COPYING. If not, see - <http://www.gnu.org/licenses/>. */ - -/* The primary opcode table is made up of the following: */ -struct ia64_main_table -{ - /* The entry in the string table that corresponds to the name of this - opcode. */ - unsigned short name_index; - - /* The type of opcode; corresponds to the TYPE field in - struct ia64_opcode. */ - unsigned char opcode_type; - - /* The number of outputs for this opcode. */ - unsigned char num_outputs; - - /* The base insn value for this opcode. It may be modified by completers. */ - ia64_insn opcode; - - /* The mask of valid bits in OPCODE. Zeros indicate operand fields. */ - ia64_insn mask; - - /* The operands of this instruction. Corresponds to the OPERANDS field - in struct ia64_opcode. */ - unsigned char operands[5]; - - /* The flags for this instruction. Corresponds to the FLAGS field in - struct ia64_opcode. */ - short flags; - - /* The tree of completers for this instruction; this is an offset into - completer_table. */ - short completers; -}; - -/* Each instruction has a set of possible "completers", or additional - suffixes that can alter the instruction's behavior, and which has - potentially different dependencies. - - The completer entries modify certain bits in the instruction opcode. - Which bits are to be modified are marked by the BITS, MASK and - OFFSET fields. The completer entry may also note dependencies for the - opcode. - - These completers are arranged in a DAG; the pointers are indexes - into the completer_table array. The completer DAG is searched by - find_completer () and ia64_find_matching_opcode (). - - Note that each completer needs to be applied in turn, so that if we - have the instruction - cmp.lt.unc - the completer entries for both "lt" and "unc" would need to be applied - to the opcode's value. - - Some instructions do not require any completers; these contain an - empty completer entry. Instructions that require a completer do - not contain an empty entry. - - Terminal completers (those completers that validly complete an - instruction) are marked by having the TERMINAL_COMPLETER flag set. - - Only dependencies listed in the terminal completer for an opcode are - considered to apply to that opcode instance. */ - -struct ia64_completer_table -{ - /* The bit value that this completer sets. */ - unsigned int bits; - - /* And its mask. 1s are bits that are to be modified in the - instruction. */ - unsigned int mask; - - /* The entry in the string table that corresponds to the name of this - completer. */ - unsigned short name_index; - - /* An alternative completer, or -1 if this is the end of the chain. */ - short alternative; - - /* A pointer to the DAG of completers that can potentially follow - this one, or -1. */ - short subentries; - - /* The bit offset in the instruction where BITS and MASK should be - applied. */ - unsigned char offset : 7; - - unsigned char terminal_completer : 1; - - /* Index into the dependency list table */ - short dependencies; -}; - -/* This contains sufficient information for the disassembler to resolve - the complete name of the original instruction. */ -struct ia64_dis_names -{ - /* COMPLETER_INDEX represents the tree of completers that make up - the instruction. The LSB represents the top of the tree for the - specified instruction. - - A 0 bit indicates to go to the next alternate completer via the - alternative field; a 1 bit indicates that the current completer - is part of the instruction, and to go down the subentries index. - We know we've reached the final completer when we run out of 1 - bits. - - There is always at least one 1 bit. */ - unsigned int completer_index : 20; - - /* The index in the main_table[] array for the instruction. */ - unsigned short insn_index : 11; - - /* If set, the next entry in this table is an alternate possibility - for this instruction encoding. Which one to use is determined by - the instruction type and other factors (see opcode_verify ()). */ - unsigned int next_flag : 1; - - /* The disassembly priority of this entry among instructions. */ - unsigned short priority; -}; - -static const char * const ia64_strings[] = { - "", "0", "1", "a", "acq", "add", "addl", "addp4", "adds", "alloc", "and", - "andcm", "b", "bias", "br", "break", "brl", "brp", "bsw", "c", "call", - "cexit", "chk", "cloop", "clr", "clrrrb", "cmp", "cmp4", "cmp8xchg16", - "cmpxchg1", "cmpxchg2", "cmpxchg4", "cmpxchg8", "cond", "cover", "ctop", - "czx1", "czx2", "d", "dep", "dpnt", "dptk", "e", "epc", "eq", "excl", - "exit", "exp", "extr", "f", "fabs", "fadd", "famax", "famin", "fand", - "fandcm", "fault", "fc", "fchkf", "fclass", "fclrf", "fcmp", "fcvt", - "fetchadd4", "fetchadd8", "few", "fill", "flushrs", "fma", "fmax", - "fmerge", "fmin", "fmix", "fmpy", "fms", "fneg", "fnegabs", "fnma", - "fnmpy", "fnorm", "for", "fpabs", "fpack", "fpamax", "fpamin", "fpcmp", - "fpcvt", "fpma", "fpmax", "fpmerge", "fpmin", "fpmpy", "fpms", "fpneg", - "fpnegabs", "fpnma", "fpnmpy", "fprcpa", "fprsqrta", "frcpa", "frsqrta", - "fselect", "fsetc", "fsub", "fswap", "fsxt", "fwb", "fx", "fxor", "fxu", - "g", "ga", "ge", "getf", "geu", "gt", "gtu", "h", "hint", "hu", "i", "ia", - "imp", "invala", "itc", "itr", "l", "ld1", "ld16", "ld2", "ld4", "ld8", - "ldf", "ldf8", "ldfd", "ldfe", "ldfp8", "ldfpd", "ldfps", "ldfs", "le", - "leu", "lfetch", "loadrs", "loop", "lr", "lt", "ltu", "lu", "m", "many", - "mf", "mix1", "mix2", "mix4", "mov", "movl", "mux1", "mux2", "nc", "ne", - "neq", "nge", "ngt", "nl", "nle", "nlt", "nm", "nop", "nr", "ns", "nt1", - "nt2", "nta", "nz", "or", "orcm", "ord", "pack2", "pack4", "padd1", - "padd2", "padd4", "pavg1", "pavg2", "pavgsub1", "pavgsub2", "pcmp1", - "pcmp2", "pcmp4", "pmax1", "pmax2", "pmin1", "pmin2", "pmpy2", "pmpyshr2", - "popcnt", "pr", "probe", "psad1", "pshl2", "pshl4", "pshladd2", "pshr2", - "pshr4", "pshradd2", "psub1", "psub2", "psub4", "ptc", "ptr", "r", "raz", - "rel", "ret", "rfi", "rsm", "rum", "rw", "s", "s0", "s1", "s2", "s3", - "sa", "se", "setf", "shl", "shladd", "shladdp4", "shr", "shrp", "sig", - "spill", "spnt", "sptk", "srlz", "ssm", "sss", "st1", "st16", "st2", - "st4", "st8", "stf", "stf8", "stfd", "stfe", "stfs", "sub", "sum", "sxt1", - "sxt2", "sxt4", "sync", "tak", "tbit", "tf", "thash", "tnat", "tpa", - "trunc", "ttag", "u", "unc", "unord", "unpack1", "unpack2", "unpack4", - "uss", "uus", "uuu", "vmsw", "w", "wexit", "wtop", "x", "xchg1", "xchg2", - "xchg4", "xchg8", "xf", "xma", "xmpy", "xor", "xuf", "z", "zxt1", "zxt2", - "zxt4", -}; - -static const struct ia64_dependency -dependencies[] = { - { "ALAT", 0, 0, 0, -1, NULL, }, - { "AR[BSP]", 26, 0, 2, 17, NULL, }, - { "AR[BSPSTORE]", 26, 0, 2, 18, NULL, }, - { "AR[CCV]", 26, 0, 2, 32, NULL, }, - { "AR[CFLG]", 26, 0, 2, 27, NULL, }, - { "AR[CSD]", 26, 0, 2, 25, NULL, }, - { "AR[EC]", 26, 0, 2, 66, NULL, }, - { "AR[EFLAG]", 26, 0, 2, 24, NULL, }, - { "AR[FCR]", 26, 0, 2, 21, NULL, }, - { "AR[FDR]", 26, 0, 2, 30, NULL, }, - { "AR[FIR]", 26, 0, 2, 29, NULL, }, - { "AR[FPSR].sf0.controls", 30, 0, 2, -1, NULL, }, - { "AR[FPSR].sf1.controls", 30, 0, 2, -1, NULL, }, - { "AR[FPSR].sf2.controls", 30, 0, 2, -1, NULL, }, - { "AR[FPSR].sf3.controls", 30, 0, 2, -1, NULL, }, - { "AR[FPSR].sf0.flags", 30, 0, 2, -1, NULL, }, - { "AR[FPSR].sf1.flags", 30, 0, 2, -1, NULL, }, - { "AR[FPSR].sf2.flags", 30, 0, 2, -1, NULL, }, - { "AR[FPSR].sf3.flags", 30, 0, 2, -1, NULL, }, - { "AR[FPSR].traps", 30, 0, 2, -1, NULL, }, - { "AR[FPSR].rv", 30, 0, 2, -1, NULL, }, - { "AR[FSR]", 26, 0, 2, 28, NULL, }, - { "AR[ITC]", 26, 0, 2, 44, NULL, }, - { "AR[K%], % in 0 - 7", 1, 0, 2, -1, NULL, }, - { "AR[LC]", 26, 0, 2, 65, NULL, }, - { "AR[PFS]", 26, 0, 2, 64, NULL, }, - { "AR[PFS]", 26, 0, 2, 64, NULL, }, - { "AR[PFS]", 26, 0, 0, 64, NULL, }, - { "AR[RNAT]", 26, 0, 2, 19, NULL, }, - { "AR[RSC]", 26, 0, 2, 16, NULL, }, - { "AR[SSD]", 26, 0, 2, 26, NULL, }, - { "AR[UNAT]{%}, % in 0 - 63", 2, 0, 2, -1, NULL, }, - { "AR%, % in 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 45-47, 67-111", 3, 0, 0, -1, NULL, }, - { "AR%, % in 48-63, 112-127", 4, 0, 2, -1, NULL, }, - { "BR%, % in 0 - 7", 5, 0, 2, -1, NULL, }, - { "BR%, % in 0 - 7", 5, 0, 0, -1, NULL, }, - { "BR%, % in 0 - 7", 5, 0, 2, -1, NULL, }, - { "CFM", 6, 0, 2, -1, NULL, }, - { "CFM", 6, 0, 2, -1, NULL, }, - { "CFM", 6, 0, 2, -1, NULL, }, - { "CFM", 6, 0, 2, -1, NULL, }, - { "CFM", 6, 0, 0, -1, NULL, }, - { "CPUID#", 7, 0, 5, -1, NULL, }, - { "CR[CMCV]", 27, 0, 3, 74, NULL, }, - { "CR[DCR]", 27, 0, 3, 0, NULL, }, - { "CR[EOI]", 27, 0, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI Ð CR67)\" on page 2:119", }, - { "CR[GPTA]", 27, 0, 3, 9, NULL, }, - { "CR[IFA]", 27, 0, 1, 20, NULL, }, - { "CR[IFA]", 27, 0, 3, 20, NULL, }, - { "CR[IFS]", 27, 0, 3, 23, NULL, }, - { "CR[IFS]", 27, 0, 1, 23, NULL, }, - { "CR[IFS]", 27, 0, 1, 23, NULL, }, - { "CR[IHA]", 27, 0, 3, 25, NULL, }, - { "CR[IIM]", 27, 0, 3, 24, NULL, }, - { "CR[IIP]", 27, 0, 3, 19, NULL, }, - { "CR[IIP]", 27, 0, 1, 19, NULL, }, - { "CR[IIPA]", 27, 0, 3, 22, NULL, }, - { "CR[IPSR]", 27, 0, 3, 16, NULL, }, - { "CR[IPSR]", 27, 0, 1, 16, NULL, }, - { "CR[IRR%], % in 0 - 3", 8, 0, 3, -1, NULL, }, - { "CR[ISR]", 27, 0, 3, 17, NULL, }, - { "CR[ITIR]", 27, 0, 3, 21, NULL, }, - { "CR[ITIR]", 27, 0, 1, 21, NULL, }, - { "CR[ITM]", 27, 0, 3, 1, NULL, }, - { "CR[ITV]", 27, 0, 3, 72, NULL, }, - { "CR[IVA]", 27, 0, 4, 2, NULL, }, - { "CR[IVR]", 27, 0, 7, 65, "SC Section 5.8.3.2, \"External Interrupt Vector Register (IVR Ð CR65)\" on page 2:118", }, - { "CR[LID]", 27, 0, 7, 64, "SC Section 5.8.3.1, \"Local ID (LID Ð CR64)\" on page 2:117", }, - { "CR[LRR%], % in 0 - 1", 9, 0, 3, -1, NULL, }, - { "CR[PMV]", 27, 0, 3, 73, NULL, }, - { "CR[PTA]", 27, 0, 3, 8, NULL, }, - { "CR[TPR]", 27, 0, 3, 66, NULL, }, - { "CR[TPR]", 27, 0, 7, 66, "SC Section 5.8.3.3, \"Task Priority Register (TPR Ð CR66)\" on page 2:119", }, - { "CR[TPR]", 27, 0, 1, 66, NULL, }, - { "CR%, % in 3-7, 10-15, 18, 26-63, 75-79, 82-127", 10, 0, 0, -1, NULL, }, - { "DBR#", 11, 0, 2, -1, NULL, }, - { "DBR#", 11, 0, 3, -1, NULL, }, - { "DTC", 0, 0, 3, -1, NULL, }, - { "DTC", 0, 0, 2, -1, NULL, }, - { "DTC", 0, 0, 0, -1, NULL, }, - { "DTC", 0, 0, 2, -1, NULL, }, - { "DTC_LIMIT*", 0, 0, 2, -1, NULL, }, - { "DTR", 0, 0, 3, -1, NULL, }, - { "DTR", 0, 0, 2, -1, NULL, }, - { "DTR", 0, 0, 3, -1, NULL, }, - { "DTR", 0, 0, 0, -1, NULL, }, - { "DTR", 0, 0, 2, -1, NULL, }, - { "FR%, % in 0 - 1", 12, 0, 0, -1, NULL, }, - { "FR%, % in 2 - 127", 13, 0, 2, -1, NULL, }, - { "FR%, % in 2 - 127", 13, 0, 0, -1, NULL, }, - { "GR0", 14, 0, 0, -1, NULL, }, - { "GR%, % in 1 - 127", 15, 0, 0, -1, NULL, }, - { "GR%, % in 1 - 127", 15, 0, 2, -1, NULL, }, - { "IBR#", 16, 0, 2, -1, NULL, }, - { "InService*", 17, 0, 3, -1, NULL, }, - { "InService*", 17, 0, 2, -1, NULL, }, - { "InService*", 17, 0, 2, -1, NULL, }, - { "IP", 0, 0, 0, -1, NULL, }, - { "ITC", 0, 0, 4, -1, NULL, }, - { "ITC", 0, 0, 2, -1, NULL, }, - { "ITC", 0, 0, 0, -1, NULL, }, - { "ITC", 0, 0, 4, -1, NULL, }, - { "ITC", 0, 0, 2, -1, NULL, }, - { "ITC_LIMIT*", 0, 0, 2, -1, NULL, }, - { "ITR", 0, 0, 2, -1, NULL, }, - { "ITR", 0, 0, 4, -1, NULL, }, - { "ITR", 0, 0, 2, -1, NULL, }, - { "ITR", 0, 0, 0, -1, NULL, }, - { "ITR", 0, 0, 4, -1, NULL, }, - { "memory", 0, 0, 0, -1, NULL, }, - { "MSR#", 18, 0, 5, -1, NULL, }, - { "PKR#", 19, 0, 3, -1, NULL, }, - { "PKR#", 19, 0, 0, -1, NULL, }, - { "PKR#", 19, 0, 2, -1, NULL, }, - { "PKR#", 19, 0, 2, -1, NULL, }, - { "PMC#", 20, 0, 2, -1, NULL, }, - { "PMC#", 20, 0, 7, -1, "SC Section 7.2.1, \"Generic Performance Counter Registers\" for PMC[0].fr on page 2:150", }, - { "PMD#", 21, 0, 2, -1, NULL, }, - { "PR0", 0, 0, 0, -1, NULL, }, - { "PR%, % in 1 - 15", 22, 0, 2, -1, NULL, }, - { "PR%, % in 1 - 15", 22, 0, 2, -1, NULL, }, - { "PR%, % in 1 - 15", 22, 0, 0, -1, NULL, }, - { "PR%, % in 16 - 62", 23, 0, 2, -1, NULL, }, - { "PR%, % in 16 - 62", 23, 0, 2, -1, NULL, }, - { "PR%, % in 16 - 62", 23, 0, 0, -1, NULL, }, - { "PR63", 24, 0, 2, -1, NULL, }, - { "PR63", 24, 0, 2, -1, NULL, }, - { "PR63", 24, 0, 0, -1, NULL, }, - { "PSR.ac", 28, 0, 1, 3, NULL, }, - { "PSR.ac", 28, 0, 3, 3, NULL, }, - { "PSR.ac", 28, 0, 2, 3, NULL, }, - { "PSR.ac", 28, 0, 2, 3, NULL, }, - { "PSR.be", 28, 0, 1, 1, NULL, }, - { "PSR.be", 28, 0, 3, 1, NULL, }, - { "PSR.be", 28, 0, 2, 1, NULL, }, - { "PSR.be", 28, 0, 2, 1, NULL, }, - { "PSR.bn", 28, 0, 2, 44, NULL, }, - { "PSR.cpl", 28, 0, 1, 32, NULL, }, - { "PSR.cpl", 28, 0, 2, 32, NULL, }, - { "PSR.da", 28, 0, 2, 38, NULL, }, - { "PSR.db", 28, 0, 3, 24, NULL, }, - { "PSR.db", 28, 0, 2, 24, NULL, }, - { "PSR.db", 28, 0, 2, 24, NULL, }, - { "PSR.dd", 28, 0, 2, 39, NULL, }, - { "PSR.dfh", 28, 0, 3, 19, NULL, }, - { "PSR.dfh", 28, 0, 2, 19, NULL, }, - { "PSR.dfh", 28, 0, 2, 19, NULL, }, - { "PSR.dfl", 28, 0, 3, 18, NULL, }, - { "PSR.dfl", 28, 0, 2, 18, NULL, }, - { "PSR.dfl", 28, 0, 2, 18, NULL, }, - { "PSR.di", 28, 0, 3, 22, NULL, }, - { "PSR.di", 28, 0, 2, 22, NULL, }, - { "PSR.di", 28, 0, 2, 22, NULL, }, - { "PSR.dt", 28, 0, 3, 17, NULL, }, - { "PSR.dt", 28, 0, 2, 17, NULL, }, - { "PSR.dt", 28, 0, 2, 17, NULL, }, - { "PSR.ed", 28, 0, 2, 43, NULL, }, - { "PSR.i", 28, 0, 2, 14, NULL, }, - { "PSR.ia", 28, 0, 0, 14, NULL, }, - { "PSR.ic", 28, 0, 2, 13, NULL, }, - { "PSR.ic", 28, 0, 3, 13, NULL, }, - { "PSR.ic", 28, 0, 2, 13, NULL, }, - { "PSR.id", 28, 0, 0, 14, NULL, }, - { "PSR.is", 28, 0, 0, 14, NULL, }, - { "PSR.it", 28, 0, 2, 14, NULL, }, - { "PSR.lp", 28, 0, 2, 25, NULL, }, - { "PSR.lp", 28, 0, 3, 25, NULL, }, - { "PSR.lp", 28, 0, 2, 25, NULL, }, - { "PSR.mc", 28, 0, 2, 35, NULL, }, - { "PSR.mfh", 28, 0, 2, 5, NULL, }, - { "PSR.mfl", 28, 0, 2, 4, NULL, }, - { "PSR.pk", 28, 0, 3, 15, NULL, }, - { "PSR.pk", 28, 0, 2, 15, NULL, }, - { "PSR.pk", 28, 0, 2, 15, NULL, }, - { "PSR.pp", 28, 0, 2, 21, NULL, }, - { "PSR.ri", 28, 0, 0, 41, NULL, }, - { "PSR.rt", 28, 0, 2, 27, NULL, }, - { "PSR.rt", 28, 0, 3, 27, NULL, }, - { "PSR.rt", 28, 0, 2, 27, NULL, }, - { "PSR.si", 28, 0, 2, 23, NULL, }, - { "PSR.si", 28, 0, 3, 23, NULL, }, - { "PSR.si", 28, 0, 2, 23, NULL, }, - { "PSR.sp", 28, 0, 2, 20, NULL, }, - { "PSR.sp", 28, 0, 3, 20, NULL, }, - { "PSR.sp", 28, 0, 2, 20, NULL, }, - { "PSR.ss", 28, 0, 2, 40, NULL, }, - { "PSR.tb", 28, 0, 3, 26, NULL, }, - { "PSR.tb", 28, 0, 2, 26, NULL, }, - { "PSR.tb", 28, 0, 2, 26, NULL, }, - { "PSR.up", 28, 0, 2, 2, NULL, }, - { "PSR.vm", 28, 0, 1, 46, NULL, }, - { "PSR.vm", 28, 0, 2, 46, NULL, }, - { "RR#", 25, 0, 3, -1, NULL, }, - { "RR#", 25, 0, 2, -1, NULL, }, - { "RSE", 29, 0, 2, -1, NULL, }, - { "ALAT", 0, 1, 0, -1, NULL, }, - { "AR[BSP]", 26, 1, 2, 17, NULL, }, - { "AR[BSPSTORE]", 26, 1, 2, 18, NULL, }, - { "AR[CCV]", 26, 1, 2, 32, NULL, }, - { "AR[CFLG]", 26, 1, 2, 27, NULL, }, - { "AR[CSD]", 26, 1, 2, 25, NULL, }, - { "AR[EC]", 26, 1, 2, 66, NULL, }, - { "AR[EFLAG]", 26, 1, 2, 24, NULL, }, - { "AR[FCR]", 26, 1, 2, 21, NULL, }, - { "AR[FDR]", 26, 1, 2, 30, NULL, }, - { "AR[FIR]", 26, 1, 2, 29, NULL, }, - { "AR[FPSR].sf0.controls", 30, 1, 2, -1, NULL, }, - { "AR[FPSR].sf1.controls", 30, 1, 2, -1, NULL, }, - { "AR[FPSR].sf2.controls", 30, 1, 2, -1, NULL, }, - { "AR[FPSR].sf3.controls", 30, 1, 2, -1, NULL, }, - { "AR[FPSR].sf0.flags", 30, 1, 0, -1, NULL, }, - { "AR[FPSR].sf0.flags", 30, 1, 2, -1, NULL, }, - { "AR[FPSR].sf0.flags", 30, 1, 2, -1, NULL, }, - { "AR[FPSR].sf1.flags", 30, 1, 0, -1, NULL, }, - { "AR[FPSR].sf1.flags", 30, 1, 2, -1, NULL, }, - { "AR[FPSR].sf1.flags", 30, 1, 2, -1, NULL, }, - { "AR[FPSR].sf2.flags", 30, 1, 0, -1, NULL, }, - { "AR[FPSR].sf2.flags", 30, 1, 2, -1, NULL, }, - { "AR[FPSR].sf2.flags", 30, 1, 2, -1, NULL, }, - { "AR[FPSR].sf3.flags", 30, 1, 0, -1, NULL, }, - { "AR[FPSR].sf3.flags", 30, 1, 2, -1, NULL, }, - { "AR[FPSR].sf3.flags", 30, 1, 2, -1, NULL, }, - { "AR[FPSR].rv", 30, 1, 2, -1, NULL, }, - { "AR[FPSR].traps", 30, 1, 2, -1, NULL, }, - { "AR[FSR]", 26, 1, 2, 28, NULL, }, - { "AR[ITC]", 26, 1, 2, 44, NULL, }, - { "AR[K%], % in 0 - 7", 1, 1, 2, -1, NULL, }, - { "AR[LC]", 26, 1, 2, 65, NULL, }, - { "AR[PFS]", 26, 1, 0, 64, NULL, }, - { "AR[PFS]", 26, 1, 2, 64, NULL, }, - { "AR[PFS]", 26, 1, 2, 64, NULL, }, - { "AR[RNAT]", 26, 1, 2, 19, NULL, }, - { "AR[RSC]", 26, 1, 2, 16, NULL, }, - { "AR[SSD]", 26, 1, 2, 26, NULL, }, - { "AR[UNAT]{%}, % in 0 - 63", 2, 1, 2, -1, NULL, }, - { "AR%, % in 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 45-47, 67-111", 3, 1, 0, -1, NULL, }, - { "AR%, % in 48 - 63, 112-127", 4, 1, 2, -1, NULL, }, - { "BR%, % in 0 - 7", 5, 1, 2, -1, NULL, }, - { "BR%, % in 0 - 7", 5, 1, 2, -1, NULL, }, - { "BR%, % in 0 - 7", 5, 1, 2, -1, NULL, }, - { "BR%, % in 0 - 7", 5, 1, 0, -1, NULL, }, - { "CFM", 6, 1, 2, -1, NULL, }, - { "CPUID#", 7, 1, 0, -1, NULL, }, - { "CR[CMCV]", 27, 1, 2, 74, NULL, }, - { "CR[DCR]", 27, 1, 2, 0, NULL, }, - { "CR[EOI]", 27, 1, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI Ð CR67)\" on page 2:119", }, - { "CR[GPTA]", 27, 1, 2, 9, NULL, }, - { "CR[IFA]", 27, 1, 2, 20, NULL, }, - { "CR[IFS]", 27, 1, 2, 23, NULL, }, - { "CR[IHA]", 27, 1, 2, 25, NULL, }, - { "CR[IIM]", 27, 1, 2, 24, NULL, }, - { "CR[IIP]", 27, 1, 2, 19, NULL, }, - { "CR[IIPA]", 27, 1, 2, 22, NULL, }, - { "CR[IPSR]", 27, 1, 2, 16, NULL, }, - { "CR[IRR%], % in 0 - 3", 8, 1, 2, -1, NULL, }, - { "CR[ISR]", 27, 1, 2, 17, NULL, }, - { "CR[ITIR]", 27, 1, 2, 21, NULL, }, - { "CR[ITM]", 27, 1, 2, 1, NULL, }, - { "CR[ITV]", 27, 1, 2, 72, NULL, }, - { "CR[IVA]", 27, 1, 2, 2, NULL, }, - { "CR[IVR]", 27, 1, 7, 65, "SC", }, - { "CR[LID]", 27, 1, 7, 64, "SC", }, - { "CR[LRR%], % in 0 - 1", 9, 1, 2, -1, NULL, }, - { "CR[PMV]", 27, 1, 2, 73, NULL, }, - { "CR[PTA]", 27, 1, 2, 8, NULL, }, - { "CR[TPR]", 27, 1, 2, 66, NULL, }, - { "CR%, % in 3-7, 10-15, 18, 26-63, 75-79, 82-127", 10, 1, 0, -1, NULL, }, - { "DBR#", 11, 1, 2, -1, NULL, }, - { "DTC", 0, 1, 0, -1, NULL, }, - { "DTC", 0, 1, 2, -1, NULL, }, - { "DTC", 0, 1, 2, -1, NULL, }, - { "DTC_LIMIT*", 0, 1, 2, -1, NULL, }, - { "DTR", 0, 1, 2, -1, NULL, }, - { "DTR", 0, 1, 2, -1, NULL, }, - { "DTR", 0, 1, 2, -1, NULL, }, - { "DTR", 0, 1, 0, -1, NULL, }, - { "FR%, % in 0 - 1", 12, 1, 0, -1, NULL, }, - { "FR%, % in 2 - 127", 13, 1, 2, -1, NULL, }, - { "GR0", 14, 1, 0, -1, NULL, }, - { "GR%, % in 1 - 127", 15, 1, 2, -1, NULL, }, - { "IBR#", 16, 1, 2, -1, NULL, }, - { "InService*", 17, 1, 7, -1, "SC", }, - { "IP", 0, 1, 0, -1, NULL, }, - { "ITC", 0, 1, 0, -1, NULL, }, - { "ITC", 0, 1, 2, -1, NULL, }, - { "ITC", 0, 1, 2, -1, NULL, }, - { "ITR", 0, 1, 2, -1, NULL, }, - { "ITR", 0, 1, 2, -1, NULL, }, - { "ITR", 0, 1, 0, -1, NULL, }, - { "memory", 0, 1, 0, -1, NULL, }, - { "MSR#", 18, 1, 7, -1, "SC", }, - { "PKR#", 19, 1, 0, -1, NULL, }, - { "PKR#", 19, 1, 0, -1, NULL, }, - { "PKR#", 19, 1, 2, -1, NULL, }, - { "PMC#", 20, 1, 2, -1, NULL, }, - { "PMD#", 21, 1, 2, -1, NULL, }, - { "PR0", 0, 1, 0, -1, NULL, }, - { "PR%, % in 1 - 15", 22, 1, 0, -1, NULL, }, - { "PR%, % in 1 - 15", 22, 1, 0, -1, NULL, }, - { "PR%, % in 1 - 15", 22, 1, 2, -1, NULL, }, - { "PR%, % in 1 - 15", 22, 1, 2, -1, NULL, }, - { "PR%, % in 16 - 62", 23, 1, 0, -1, NULL, }, - { "PR%, % in 16 - 62", 23, 1, 0, -1, NULL, }, - { "PR%, % in 16 - 62", 23, 1, 2, -1, NULL, }, - { "PR%, % in 16 - 62", 23, 1, 2, -1, NULL, }, - { "PR63", 24, 1, 0, -1, NULL, }, - { "PR63", 24, 1, 0, -1, NULL, }, - { "PR63", 24, 1, 2, -1, NULL, }, - { "PR63", 24, 1, 2, -1, NULL, }, - { "PSR.ac", 28, 1, 2, 3, NULL, }, - { "PSR.be", 28, 1, 2, 1, NULL, }, - { "PSR.bn", 28, 1, 2, 44, NULL, }, - { "PSR.cpl", 28, 1, 2, 32, NULL, }, - { "PSR.da", 28, 1, 2, 38, NULL, }, - { "PSR.db", 28, 1, 2, 24, NULL, }, - { "PSR.dd", 28, 1, 2, 39, NULL, }, - { "PSR.dfh", 28, 1, 2, 19, NULL, }, - { "PSR.dfl", 28, 1, 2, 18, NULL, }, - { "PSR.di", 28, 1, 2, 22, NULL, }, - { "PSR.dt", 28, 1, 2, 17, NULL, }, - { "PSR.ed", 28, 1, 2, 43, NULL, }, - { "PSR.i", 28, 1, 2, 14, NULL, }, - { "PSR.ia", 28, 1, 2, 14, NULL, }, - { "PSR.ic", 28, 1, 2, 13, NULL, }, - { "PSR.id", 28, 1, 2, 14, NULL, }, - { "PSR.is", 28, 1, 2, 14, NULL, }, - { "PSR.it", 28, 1, 2, 14, NULL, }, - { "PSR.lp", 28, 1, 2, 25, NULL, }, - { "PSR.mc", 28, 1, 2, 35, NULL, }, - { "PSR.mfh", 28, 1, 0, 5, NULL, }, - { "PSR.mfh", 28, 1, 2, 5, NULL, }, - { "PSR.mfh", 28, 1, 2, 5, NULL, }, - { "PSR.mfl", 28, 1, 0, 4, NULL, }, - { "PSR.mfl", 28, 1, 2, 4, NULL, }, - { "PSR.mfl", 28, 1, 2, 4, NULL, }, - { "PSR.pk", 28, 1, 2, 15, NULL, }, - { "PSR.pp", 28, 1, 2, 21, NULL, }, - { "PSR.ri", 28, 1, 2, 41, NULL, }, - { "PSR.rt", 28, 1, 2, 27, NULL, }, - { "PSR.si", 28, 1, 2, 23, NULL, }, - { "PSR.sp", 28, 1, 2, 20, NULL, }, - { "PSR.ss", 28, 1, 2, 40, NULL, }, - { "PSR.tb", 28, 1, 2, 26, NULL, }, - { "PSR.up", 28, 1, 2, 2, NULL, }, - { "PSR.vm", 28, 1, 2, 46, NULL, }, - { "RR#", 25, 1, 2, -1, NULL, }, - { "RSE", 29, 1, 2, -1, NULL, }, - { "PR63", 24, 2, 6, -1, NULL, }, -}; - -static const unsigned short dep0[] = { - 97, 282, 2140, 2327, -}; - -static const unsigned short dep1[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, - 2327, 4135, 20616, -}; - -static const unsigned short dep2[] = { - 97, 282, 2166, 2167, 2169, 2170, 2172, 2173, 2175, 2344, 2347, 2348, 2351, - 2352, 2355, 2356, -}; - -static const unsigned short dep3[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, - 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 20616, -}; - -static const unsigned short dep4[] = { - 97, 282, 22646, 22647, 22649, 22650, 22652, 22653, 22655, 22824, 22827, 22828, - 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep5[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, - 4135, 20616, 22824, 22827, 22828, 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep6[] = { - 97, 282, 2166, 2167, 2169, 2170, 2172, 2173, 2175, 2344, 2345, 2347, 2349, - 2351, 2353, 2355, -}; - -static const unsigned short dep7[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, - 2344, 2345, 2348, 2349, 2352, 2353, 2356, 4135, 20616, -}; - -static const unsigned short dep8[] = { - 97, 282, 2166, 2167, 2169, 2170, 2172, 2173, 2175, 2344, 2346, 2348, 2350, - 2352, 2354, 2356, -}; - -static const unsigned short dep9[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, - 2344, 2346, 2347, 2350, 2351, 2354, 2355, 4135, 20616, -}; - -static const unsigned short dep10[] = { - 97, 282, 2166, 2167, 2169, 2170, 2172, 2173, 2175, 2344, 2345, 2346, 2347, - 2348, 2349, 2350, 2351, 2352, 2353, 2354, 2355, 2356, -}; - -static const unsigned short dep11[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, - 2344, 2345, 2346, 2347, 2348, 2349, 2350, 2351, 2352, 2353, 2354, 2355, 2356, - 4135, 20616, -}; - -static const unsigned short dep12[] = { - 97, 282, 2395, -}; - -static const unsigned short dep13[] = { - 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2082, 2083, 2166, 2168, - 2169, 2171, 2172, 2174, 2175, 4135, -}; - -static const unsigned short dep14[] = { - 97, 163, 282, 325, 2395, 28866, 29018, -}; - -static const unsigned short dep15[] = { - 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, - 22, 23, 24, 25, 26, 28, 29, 30, 31, 32, 33, 40, 41, 97, 150, 152, 158, 162, - 164, 175, 185, 186, 188, 282, 325, 2082, 2083, 2166, 2168, 2169, 2171, 2172, - 2174, 2175, 4135, 28866, 29018, -}; - -static const unsigned short dep16[] = { - 1, 6, 40, 97, 137, 196, 201, 241, 282, 312, 2395, 28866, 29018, -}; - -static const unsigned short dep17[] = { - 1, 25, 27, 38, 40, 41, 97, 158, 162, 164, 166, 167, 175, 185, 186, 188, 196, - 201, 241, 282, 312, 2082, 2083, 2166, 2168, 2169, 2171, 2172, 2174, 2175, - 4135, 28866, 29018, -}; - -static const unsigned short dep18[] = { - 1, 40, 51, 97, 196, 241, 248, 282, 28866, 29018, -}; - -static const unsigned short dep19[] = { - 1, 38, 40, 41, 97, 158, 160, 161, 162, 175, 185, 190, 191, 196, 241, 248, - 282, 4135, 28866, 29018, -}; - -static const unsigned short dep20[] = { - 40, 97, 241, 282, -}; - -static const unsigned short dep21[] = { - 97, 158, 162, 175, 185, 241, 282, -}; - -static const unsigned short dep22[] = { - 1, 40, 97, 131, 135, 136, 138, 139, 142, 143, 146, 149, 152, 155, 156, 157, - 158, 161, 162, 163, 164, 167, 168, 169, 170, 173, 174, 175, 178, 181, 184, - 185, 188, 189, 191, 196, 241, 282, 309, 310, 311, 312, 313, 314, 315, 316, - 317, 318, 319, 320, 321, 322, 323, 324, 325, 326, 327, 328, 330, 331, 333, - 334, 335, 336, 337, 338, 339, 340, 341, 342, 343, 344, 28866, 29018, -}; - -static const unsigned short dep23[] = { - 1, 38, 40, 41, 50, 51, 55, 58, 73, 97, 137, 138, 158, 162, 175, 185, 190, - 191, 196, 241, 282, 309, 310, 311, 312, 313, 314, 315, 316, 317, 318, 319, - 320, 321, 322, 323, 324, 325, 326, 327, 328, 330, 331, 333, 334, 335, 336, - 337, 338, 339, 340, 341, 342, 343, 344, 4135, 28866, 29018, -}; - -static const unsigned short dep24[] = { - 97, 136, 282, 311, -}; - -static const unsigned short dep25[] = { - 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 311, -}; - -static const unsigned short dep26[] = { - 97, 137, 282, 312, -}; - -static const unsigned short dep27[] = { - 25, 26, 97, 98, 101, 105, 108, 137, 138, 158, 162, 164, 175, 185, 282, 312, - -}; - -static const unsigned short dep28[] = { - 97, 190, 282, 344, -}; - -static const unsigned short dep29[] = { - 97, 98, 101, 105, 108, 137, 138, 158, 162, 164, 175, 185, 282, 344, -}; - -static const unsigned short dep30[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2168, 2169, 2171, 2172, 2174, 2175, - 4135, -}; - -static const unsigned short dep31[] = { - 1, 25, 40, 97, 196, 228, 229, 241, 282, 2082, 2285, 2288, 2395, 28866, 29018, - -}; - -static const unsigned short dep32[] = { - 1, 6, 38, 40, 41, 97, 137, 138, 158, 162, 164, 175, 185, 186, 188, 196, 228, - 230, 241, 282, 2082, 2083, 2166, 2168, 2169, 2171, 2172, 2174, 2175, 2286, - 2288, 4135, 28866, 29018, -}; - -static const unsigned short dep33[] = { - 97, 282, -}; - -static const unsigned short dep34[] = { - 97, 158, 162, 175, 185, 282, 2082, 2084, -}; - -static const unsigned short dep35[] = { - 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166, 2168, 2169, 2171, - 2172, 2174, 2175, 4135, -}; - -static const unsigned short dep36[] = { - 6, 37, 38, 39, 97, 125, 126, 201, 241, 282, 307, 308, 2395, -}; - -static const unsigned short dep37[] = { - 6, 37, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 201, 241, 282, 307, - 308, 347, 2166, 2168, 2169, 2171, 2172, 2174, 2175, 4135, -}; - -static const unsigned short dep38[] = { - 24, 97, 227, 282, 2395, -}; - -static const unsigned short dep39[] = { - 24, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 227, 282, 2166, 2168, 2169, - 2171, 2172, 2174, 2175, 4135, -}; - -static const unsigned short dep40[] = { - 6, 24, 37, 38, 39, 97, 125, 126, 201, 227, 241, 282, 307, 308, 2395, -}; - -static const unsigned short dep41[] = { - 6, 24, 37, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 201, 227, 241, 282, - 307, 308, 347, 2166, 2168, 2169, 2171, 2172, 2174, 2175, 4135, -}; - -static const unsigned short dep42[] = { - 1, 6, 38, 40, 41, 97, 137, 138, 158, 162, 164, 175, 185, 186, 188, 196, 228, - 230, 241, 282, 2166, 2168, 2169, 2171, 2172, 2174, 2175, 2286, 2288, 4135, - 28866, 29018, -}; - -static const unsigned short dep43[] = { - 97, 158, 162, 175, 185, 282, -}; - -static const unsigned short dep44[] = { - 15, 97, 210, 211, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765, - 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, 22831, - 22832, 22835, 22836, -}; - -static const unsigned short dep45[] = { - 11, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, - 18764, 18766, 22824, 22827, 22828, 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep46[] = { - 15, 16, 17, 18, 97, 210, 211, 213, 214, 216, 217, 219, 220, 282, 2136, 2325, - 18601, 18602, 18761, 18762, 18764, 18765, 22646, 22647, 22648, 22650, 22651, - 22653, 22654, 22824, 22827, 22828, 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep47[] = { - 11, 12, 13, 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 213, 215, - 216, 218, 219, 221, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, 2325, 4135, - 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 22824, 22827, 22828, - 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep48[] = { - 16, 97, 213, 214, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765, - 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, 22831, - 22832, 22835, 22836, -}; - -static const unsigned short dep49[] = { - 12, 19, 20, 40, 41, 97, 158, 162, 175, 185, 213, 215, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, - 18764, 18766, 22824, 22827, 22828, 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep50[] = { - 17, 97, 216, 217, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765, - 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, 22831, - 22832, 22835, 22836, -}; - -static const unsigned short dep51[] = { - 13, 19, 20, 40, 41, 97, 158, 162, 175, 185, 216, 218, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, - 18764, 18766, 22824, 22827, 22828, 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep52[] = { - 18, 97, 219, 220, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765, - 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, 22831, - 22832, 22835, 22836, -}; - -static const unsigned short dep53[] = { - 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 219, 221, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, - 18764, 18766, 22824, 22827, 22828, 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep54[] = { - 15, 97, 210, 211, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765, - -}; - -static const unsigned short dep55[] = { - 11, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, - 18764, 18766, -}; - -static const unsigned short dep56[] = { - 15, 16, 17, 18, 97, 210, 211, 213, 214, 216, 217, 219, 220, 282, 2136, 2325, - 18601, 18602, 18761, 18762, 18764, 18765, -}; - -static const unsigned short dep57[] = { - 11, 12, 13, 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 213, 215, - 216, 218, 219, 221, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, 2325, 4135, - 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, -}; - -static const unsigned short dep58[] = { - 16, 97, 213, 214, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765, - -}; - -static const unsigned short dep59[] = { - 12, 19, 20, 40, 41, 97, 158, 162, 175, 185, 213, 215, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, - 18764, 18766, -}; - -static const unsigned short dep60[] = { - 17, 97, 216, 217, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765, - -}; - -static const unsigned short dep61[] = { - 13, 19, 20, 40, 41, 97, 158, 162, 175, 185, 216, 218, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, - 18764, 18766, -}; - -static const unsigned short dep62[] = { - 18, 97, 219, 220, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765, - -}; - -static const unsigned short dep63[] = { - 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 219, 221, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, - 18764, 18766, -}; - -static const unsigned short dep64[] = { - 97, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765, -}; - -static const unsigned short dep65[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, - 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, -}; - -static const unsigned short dep66[] = { - 11, 97, 206, 282, -}; - -static const unsigned short dep67[] = { - 11, 40, 41, 97, 158, 162, 175, 185, 206, 282, 2166, 2167, 2170, 2173, 4135, - -}; - -static const unsigned short dep68[] = { - 11, 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 4135, -}; - -static const unsigned short dep69[] = { - 12, 97, 207, 282, -}; - -static const unsigned short dep70[] = { - 11, 40, 41, 97, 158, 162, 175, 185, 207, 282, 2166, 2167, 2170, 2173, 4135, - -}; - -static const unsigned short dep71[] = { - 13, 97, 208, 282, -}; - -static const unsigned short dep72[] = { - 11, 40, 41, 97, 158, 162, 175, 185, 208, 282, 2166, 2167, 2170, 2173, 4135, - -}; - -static const unsigned short dep73[] = { - 14, 97, 209, 282, -}; - -static const unsigned short dep74[] = { - 11, 40, 41, 97, 158, 162, 175, 185, 209, 282, 2166, 2167, 2170, 2173, 4135, - -}; - -static const unsigned short dep75[] = { - 15, 97, 211, 212, 282, -}; - -static const unsigned short dep76[] = { - 40, 41, 97, 158, 162, 175, 185, 211, 212, 282, 2166, 2167, 2170, 2173, 4135, - -}; - -static const unsigned short dep77[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 4135, -}; - -static const unsigned short dep78[] = { - 16, 97, 214, 215, 282, -}; - -static const unsigned short dep79[] = { - 40, 41, 97, 158, 162, 175, 185, 214, 215, 282, 2166, 2167, 2170, 2173, 4135, - -}; - -static const unsigned short dep80[] = { - 17, 97, 217, 218, 282, -}; - -static const unsigned short dep81[] = { - 40, 41, 97, 158, 162, 175, 185, 217, 218, 282, 2166, 2167, 2170, 2173, 4135, - -}; - -static const unsigned short dep82[] = { - 18, 97, 220, 221, 282, -}; - -static const unsigned short dep83[] = { - 40, 41, 97, 158, 162, 175, 185, 220, 221, 282, 2166, 2167, 2170, 2173, 4135, - -}; - -static const unsigned short dep84[] = { - 15, 19, 20, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166, 2167, - 2170, 2173, 4135, -}; - -static const unsigned short dep85[] = { - 15, 16, 19, 20, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166, - 2167, 2170, 2173, 4135, -}; - -static const unsigned short dep86[] = { - 15, 17, 19, 20, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166, - 2167, 2170, 2173, 4135, -}; - -static const unsigned short dep87[] = { - 15, 18, 19, 20, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166, - 2167, 2170, 2173, 4135, -}; - -static const unsigned short dep88[] = { - 15, 97, 210, 211, 282, -}; - -static const unsigned short dep89[] = { - 11, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 282, 2166, 2167, 2170, - 2173, 4135, -}; - -static const unsigned short dep90[] = { - 15, 16, 17, 18, 97, 210, 211, 213, 214, 216, 217, 219, 220, 282, -}; - -static const unsigned short dep91[] = { - 11, 12, 13, 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 213, 215, - 216, 218, 219, 221, 282, 2166, 2167, 2170, 2173, 4135, -}; - -static const unsigned short dep92[] = { - 16, 97, 213, 214, 282, -}; - -static const unsigned short dep93[] = { - 12, 19, 20, 40, 41, 97, 158, 162, 175, 185, 213, 215, 282, 2166, 2167, 2170, - 2173, 4135, -}; - -static const unsigned short dep94[] = { - 17, 97, 216, 217, 282, -}; - -static const unsigned short dep95[] = { - 13, 19, 20, 40, 41, 97, 158, 162, 175, 185, 216, 218, 282, 2166, 2167, 2170, - 2173, 4135, -}; - -static const unsigned short dep96[] = { - 18, 97, 219, 220, 282, -}; - -static const unsigned short dep97[] = { - 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 219, 221, 282, 2166, 2167, 2170, - 2173, 4135, -}; - -static const unsigned short dep98[] = { - 15, 97, 210, 211, 282, 2166, 2167, 2168, 2170, 2171, 2173, 2174, 2344, 2347, - 2348, 2351, 2352, 2355, 2356, -}; - -static const unsigned short dep99[] = { - 11, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 16528, - 16530, 16531, 16533, -}; - -static const unsigned short dep100[] = { - 15, 16, 17, 18, 97, 210, 211, 213, 214, 216, 217, 219, 220, 282, 2166, 2167, - 2168, 2170, 2171, 2173, 2174, 2344, 2347, 2348, 2351, 2352, 2355, 2356, -}; - -static const unsigned short dep101[] = { - 11, 12, 13, 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 213, 215, - 216, 218, 219, 221, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, 2344, 2347, - 2348, 2351, 2352, 2355, 2356, 4135, 16528, 16530, 16531, 16533, -}; - -static const unsigned short dep102[] = { - 16, 97, 213, 214, 282, 2166, 2167, 2168, 2170, 2171, 2173, 2174, 2344, 2347, - 2348, 2351, 2352, 2355, 2356, -}; - -static const unsigned short dep103[] = { - 12, 19, 20, 40, 41, 97, 158, 162, 175, 185, 213, 215, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 16528, - 16530, 16531, 16533, -}; - -static const unsigned short dep104[] = { - 17, 97, 216, 217, 282, 2166, 2167, 2168, 2170, 2171, 2173, 2174, 2344, 2347, - 2348, 2351, 2352, 2355, 2356, -}; - -static const unsigned short dep105[] = { - 13, 19, 20, 40, 41, 97, 158, 162, 175, 185, 216, 218, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 16528, - 16530, 16531, 16533, -}; - -static const unsigned short dep106[] = { - 18, 97, 219, 220, 282, 2166, 2167, 2168, 2170, 2171, 2173, 2174, 2344, 2347, - 2348, 2351, 2352, 2355, 2356, -}; - -static const unsigned short dep107[] = { - 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 219, 221, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 16528, - 16530, 16531, 16533, -}; - -static const unsigned short dep108[] = { - 15, 97, 210, 211, 282, 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, - 22827, 22828, 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep109[] = { - 11, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 4135, 16528, 16530, 16531, 16533, 22824, 22827, 22828, - 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep110[] = { - 15, 16, 17, 18, 97, 210, 211, 213, 214, 216, 217, 219, 220, 282, 22646, 22647, - 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, 22831, 22832, 22835, - 22836, -}; - -static const unsigned short dep111[] = { - 11, 12, 13, 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 210, 212, 213, 215, - 216, 218, 219, 221, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, 4135, 16528, - 16530, 16531, 16533, 22824, 22827, 22828, 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep112[] = { - 16, 97, 213, 214, 282, 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, - 22827, 22828, 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep113[] = { - 12, 19, 20, 40, 41, 97, 158, 162, 175, 185, 213, 215, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 4135, 16528, 16530, 16531, 16533, 22824, 22827, 22828, - 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep114[] = { - 17, 97, 216, 217, 282, 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, - 22827, 22828, 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep115[] = { - 13, 19, 20, 40, 41, 97, 158, 162, 175, 185, 216, 218, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 4135, 16528, 16530, 16531, 16533, 22824, 22827, 22828, - 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep116[] = { - 18, 97, 219, 220, 282, 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, - 22827, 22828, 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep117[] = { - 14, 19, 20, 40, 41, 97, 158, 162, 175, 185, 219, 221, 282, 2135, 2136, 2137, - 2166, 2167, 2170, 2173, 4135, 16528, 16530, 16531, 16533, 22824, 22827, 22828, - 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep118[] = { - 97, 282, 2166, 2167, 2168, 2170, 2171, 2173, 2174, 2344, 2347, 2348, 2351, - 2352, 2355, 2356, -}; - -static const unsigned short dep119[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, - 2344, 2347, 2348, 2351, 2352, 2355, 2356, 4135, 16528, 16530, 16531, 16533, - -}; - -static const unsigned short dep120[] = { - 97, 282, 22646, 22647, 22648, 22650, 22651, 22653, 22654, 22824, 22827, 22828, - 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep121[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, - 4135, 16528, 16530, 16531, 16533, 22824, 22827, 22828, 22831, 22832, 22835, - 22836, -}; - -static const unsigned short dep122[] = { - 19, 20, 40, 41, 97, 158, 162, 175, 185, 282, 2135, 2136, 2137, 2166, 2167, - 2170, 2173, 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, - -}; - -static const unsigned short dep123[] = { - 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2138, 2139, 2140, 2166, - 2167, 2170, 2173, 4135, 20616, -}; - -static const unsigned short dep124[] = { - 97, 282, 2083, 2084, 2286, 2287, -}; - -static const unsigned short dep125[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, - 2285, 2287, 4135, 20616, -}; - -static const unsigned short dep126[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2082, 2084, 2166, 2167, 2170, 2173, 2327, - 4135, 20616, -}; - -static const unsigned short dep127[] = { - 97, 282, 14455, 14457, 14458, 14460, 14461, 14463, 14635, 14636, 14639, 14640, - 14643, 14644, -}; - -static const unsigned short dep128[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 4135, 14635, 14636, - 14639, 14640, 14643, 14644, 20616, 24694, 24695, 24698, 24701, -}; - -static const unsigned short dep129[] = { - 97, 122, 124, 125, 127, 282, 303, 304, 307, 308, -}; - -static const unsigned short dep130[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 303, 304, 307, 308, 4135, 24694, 24695, - 24698, 24701, -}; - -static const unsigned short dep131[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 2327, 4135, 20616, - -}; - -static const unsigned short dep132[] = { - 40, 41, 97, 119, 122, 125, 158, 162, 175, 185, 282, 2327, 4135, 20616, 24694, - -}; - -static const unsigned short dep133[] = { - 6, 24, 26, 27, 97, 201, 227, 230, 282, 2081, 2284, -}; - -static const unsigned short dep134[] = { - 40, 41, 97, 158, 162, 175, 185, 201, 227, 229, 282, 2138, 2139, 2140, 2166, - 2167, 2170, 2173, 2284, 4135, 20616, -}; - -static const unsigned short dep135[] = { - 6, 24, 25, 26, 40, 41, 97, 158, 162, 175, 185, 282, 2081, 2166, 2167, 2170, - 2173, 2327, 4135, 20616, -}; - -static const unsigned short dep136[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 2344, 2347, 2348, - 2351, 2352, 2355, 2356, 4135, -}; - -static const unsigned short dep137[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 4135, 22824, - 22827, 22828, 22831, 22832, 22835, 22836, -}; - -static const unsigned short dep138[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 2344, 2345, 2348, - 2349, 2352, 2353, 2356, 4135, -}; - -static const unsigned short dep139[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 2344, 2346, 2347, - 2350, 2351, 2354, 2355, 4135, -}; - -static const unsigned short dep140[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2166, 2167, 2170, 2173, 2344, 2345, 2346, - 2347, 2348, 2349, 2350, 2351, 2352, 2353, 2354, 2355, 2356, 4135, -}; - -static const unsigned short dep141[] = { - 0, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2166, 2167, 2170, 2173, - 4135, -}; - -static const unsigned short dep142[] = { - 0, 97, 195, 282, -}; - -static const unsigned short dep143[] = { - 0, 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 195, 282, 2166, 2167, 2170, - 2173, 4135, -}; - -static const unsigned short dep144[] = { - 40, 41, 97, 158, 162, 175, 185, 195, 282, 2166, 2167, 2170, 2173, 4135, -}; - -static const unsigned short dep145[] = { - 2, 28, 97, 197, 231, 282, 28866, 29018, -}; - -static const unsigned short dep146[] = { - 1, 2, 28, 29, 97, 158, 162, 175, 177, 178, 185, 197, 231, 282, 28866, 29018, - -}; - -static const unsigned short dep147[] = { - 1, 28, 29, 38, 40, 41, 97, 158, 162, 175, 177, 178, 185, 197, 231, 282, 4135, - 28866, 29018, -}; - -static const unsigned short dep148[] = { - 0, 40, 41, 97, 158, 162, 175, 185, 195, 282, 2166, 2167, 2170, 2173, 4135, - -}; - -static const unsigned short dep149[] = { - 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, - 28, 29, 30, 31, 97, 196, 197, 198, 199, 200, 202, 203, 204, 205, 206, 207, - 208, 209, 211, 212, 214, 215, 217, 218, 220, 221, 222, 223, 224, 225, 231, - 232, 233, 234, 282, 2071, 2081, 2274, 2284, 28866, 29018, -}; - -static const unsigned short dep150[] = { - 29, 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 196, 197, 198, 199, - 200, 202, 203, 204, 205, 206, 207, 208, 209, 211, 212, 214, 215, 217, 218, - 220, 221, 222, 223, 224, 225, 231, 232, 233, 234, 282, 2138, 2139, 2140, 2166, - 2167, 2170, 2173, 2274, 2284, 4135, 20616, 28866, 29018, -}; - -static const unsigned short dep151[] = { - 97, 282, 14464, 14466, 14468, 14470, 14505, 14506, 14525, 14645, 14646, 14666, - 14667, 14669, 14670, 14679, -}; - -static const unsigned short dep152[] = { - 40, 41, 97, 158, 162, 175, 183, 184, 185, 282, 2166, 2167, 2170, 2173, 4135, - 14645, 14646, 14666, 14667, 14669, 14670, 14679, -}; - -static const unsigned short dep153[] = { - 14464, 14466, 14468, 14470, 14505, 14506, 14525, 14645, 14646, 14666, 14667, - 14669, 14670, 14679, -}; - -static const unsigned short dep154[] = { - 183, 184, 14645, 14646, 14666, 14667, 14669, 14670, 14679, -}; - -static const unsigned short dep155[] = { - 97, 282, 14465, 14466, 14469, 14470, 14480, 14481, 14483, 14484, 14486, 14487, - 14489, 14490, 14493, 14495, 14496, 14505, 14506, 14507, 14508, 14510, 14515, - 14516, 14518, 14519, 14525, 14645, 14646, 14652, 14653, 14654, 14655, 14657, - 14659, 14666, 14667, 14669, 14670, 14671, 14672, 14675, 14676, 14679, -}; - -static const unsigned short dep156[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2166, 2167, 2170, - 2173, 4135, 14645, 14646, 14652, 14653, 14654, 14655, 14657, 14659, 14666, - 14667, 14669, 14670, 14671, 14672, 14675, 14676, 14679, 34888, -}; - -static const unsigned short dep157[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2166, 2167, 2170, - 2173, 4135, 14645, 14646, 14652, 14653, 14654, 14655, 14657, 14659, 14666, - 14667, 14669, 14670, 14671, 14672, 14675, 14676, 14679, -}; - -static const unsigned short dep158[] = { - 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, - 28, 29, 30, 31, 40, 41, 97, 137, 138, 158, 162, 175, 180, 181, 185, 190, 191, - 282, 2071, 2081, 2166, 2167, 2170, 2173, 2327, 4135, 20616, 28866, -}; - -static const unsigned short dep159[] = { - 43, 44, 45, 46, 47, 48, 49, 50, 52, 53, 54, 55, 56, 57, 58, 60, 61, 62, 63, - 64, 65, 67, 69, 70, 71, 72, 73, 94, 96, 97, 243, 244, 245, 246, 247, 248, - 249, 250, 251, 252, 253, 255, 256, 257, 258, 259, 261, 263, 264, 265, 281, - 282, 2116, 2310, -}; - -static const unsigned short dep160[] = { - 40, 41, 96, 97, 137, 138, 158, 160, 161, 162, 175, 185, 190, 191, 243, 244, - 245, 246, 247, 248, 249, 250, 251, 252, 253, 255, 256, 257, 258, 259, 261, - 263, 264, 265, 281, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2310, 4135, - 20616, -}; - -static const unsigned short dep161[] = { - 59, 95, 97, 254, 281, 282, 2140, 2327, -}; - -static const unsigned short dep162[] = { - 40, 41, 43, 44, 46, 48, 49, 51, 52, 53, 54, 56, 57, 60, 61, 63, 64, 65, 66, - 67, 69, 70, 71, 94, 95, 97, 137, 138, 158, 160, 161, 162, 175, 185, 190, 191, - 254, 281, 282, 2107, 2116, 2166, 2167, 2170, 2173, 2327, 4135, 20616, -}; - -static const unsigned short dep163[] = { - 2, 28, 41, 97, 197, 231, 241, 282, 2140, 2327, 28866, 29018, -}; - -static const unsigned short dep164[] = { - 2, 25, 26, 28, 29, 38, 40, 41, 97, 158, 162, 175, 177, 178, 185, 197, 231, - 241, 282, 2327, 4135, 20616, 28866, 29018, -}; - -static const unsigned short dep165[] = { - 97, 129, 130, 133, 134, 140, 141, 144, 145, 147, 148, 150, 151, 153, 154, - 157, 159, 160, 165, 166, 169, 170, 171, 172, 174, 176, 177, 179, 180, 182, - 183, 186, 187, 189, 282, 309, 310, 314, 316, 317, 318, 319, 321, 323, 327, - 330, 331, 333, 334, 335, 336, 338, 339, 340, 342, 343, -}; - -static const unsigned short dep166[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 309, 310, 314, 316, - 317, 318, 319, 321, 323, 327, 330, 331, 333, 334, 335, 336, 338, 339, 340, - 342, 343, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616, 34888, -}; - -static const unsigned short dep167[] = { - 97, 128, 130, 132, 134, 169, 170, 189, 282, 309, 310, 330, 331, 333, 334, - 343, -}; - -static const unsigned short dep168[] = { - 40, 41, 97, 158, 162, 175, 183, 184, 185, 282, 309, 310, 330, 331, 333, 334, - 343, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616, -}; - -static const unsigned short dep169[] = { - 40, 41, 97, 130, 131, 134, 135, 137, 138, 141, 142, 145, 146, 148, 149, 151, - 152, 154, 155, 157, 158, 159, 161, 162, 164, 165, 167, 168, 169, 170, 172, - 173, 174, 175, 176, 178, 179, 181, 182, 184, 185, 187, 188, 189, 190, 191, - 282, 2166, 2167, 2170, 2173, 2327, 4135, 20616, -}; - -static const unsigned short dep170[] = { - 40, 41, 97, 130, 131, 134, 135, 158, 162, 169, 170, 175, 185, 189, 282, 2166, - 2167, 2170, 2173, 2327, 4135, 20616, -}; - -static const unsigned short dep171[] = { - 40, 41, 70, 76, 77, 82, 84, 97, 111, 137, 138, 153, 155, 158, 162, 171, 173, - 175, 185, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, - 20616, -}; - -static const unsigned short dep172[] = { - 40, 41, 70, 76, 77, 82, 84, 97, 111, 137, 138, 139, 140, 142, 143, 153, 155, - 158, 162, 171, 173, 175, 185, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, - 2173, 4135, 20616, -}; - -static const unsigned short dep173[] = { - 77, 78, 97, 101, 102, 269, 270, 282, 284, 285, -}; - -static const unsigned short dep174[] = { - 40, 41, 47, 62, 78, 80, 86, 97, 99, 102, 137, 138, 158, 160, 161, 162, 175, - 185, 190, 191, 192, 269, 270, 282, 284, 285, 2138, 2139, 2140, 2166, 2167, - 2170, 2173, 4135, 20616, -}; - -static const unsigned short dep175[] = { - 40, 41, 47, 62, 78, 80, 97, 99, 102, 104, 106, 137, 138, 158, 160, 161, 162, - 175, 185, 190, 191, 192, 269, 270, 282, 284, 285, 2138, 2139, 2140, 2166, - 2167, 2170, 2173, 4135, 20616, -}; - -static const unsigned short dep176[] = { - 97, 282, 12480, 12481, 12633, -}; - -static const unsigned short dep177[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 4135, 12633, 20616, -}; - -static const unsigned short dep178[] = { - 97, 282, 6219, 6220, 6411, -}; - -static const unsigned short dep179[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 4135, 6411, 20616, -}; - -static const unsigned short dep180[] = { - 97, 282, 6237, 6424, -}; - -static const unsigned short dep181[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 4135, 6424, 20616, -}; - -static const unsigned short dep182[] = { - 97, 282, 6255, 6256, 6257, 6258, 6435, 6437, 8484, -}; - -static const unsigned short dep183[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 4135, 6258, 6436, 6437, 8304, 8483, 20616, -}; - -static const unsigned short dep184[] = { - 97, 282, 6259, 6260, 6438, -}; - -static const unsigned short dep185[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 4135, 6438, 20616, -}; - -static const unsigned short dep186[] = { - 97, 282, 6261, 6439, -}; - -static const unsigned short dep187[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 4135, 6439, 20616, -}; - -static const unsigned short dep188[] = { - 97, 282, 10350, 10530, -}; - -static const unsigned short dep189[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 4135, 10530, 20616, -}; - -static const unsigned short dep190[] = { - 77, 78, 82, 83, 97, 101, 102, 269, 270, 272, 273, 282, 284, 285, -}; - -static const unsigned short dep191[] = { - 40, 41, 47, 62, 78, 80, 83, 86, 97, 99, 102, 137, 138, 158, 160, 161, 162, - 175, 185, 190, 191, 192, 269, 270, 272, 274, 282, 284, 285, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 4135, 20616, -}; - -static const unsigned short dep192[] = { - 77, 78, 97, 101, 102, 104, 105, 269, 270, 282, 284, 285, 286, 287, -}; - -static const unsigned short dep193[] = { - 40, 41, 47, 62, 78, 80, 97, 99, 102, 104, 106, 137, 138, 158, 160, 161, 162, - 175, 185, 190, 191, 192, 269, 270, 282, 284, 285, 286, 287, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 4135, 20616, -}; - -static const unsigned short dep194[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 2327, 4135, 12481, 20616, -}; - -static const unsigned short dep195[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 2327, 4135, 6219, 20616, -}; - -static const unsigned short dep196[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 2327, 4135, 6237, 20616, -}; - -static const unsigned short dep197[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 2327, 4135, 6257, 8303, 20616, -}; - -static const unsigned short dep198[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 2327, 4135, 6259, 20616, -}; - -static const unsigned short dep199[] = { - 40, 41, 97, 137, 138, 158, 162, 175, 183, 184, 185, 282, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 2327, 4135, 6260, 6261, 20616, -}; - -static const unsigned short dep200[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, - 2327, 4135, 10350, 20616, -}; - -static const unsigned short dep201[] = { - 40, 41, 97, 158, 162, 175, 185, 190, 191, 282, 2138, 2139, 2140, 2166, 2167, - 2170, 2173, 2327, 4135, 6186, 20616, -}; - -static const unsigned short dep202[] = { - 77, 79, 80, 97, 98, 99, 100, 268, 269, 282, 283, 284, -}; - -static const unsigned short dep203[] = { - 40, 41, 78, 79, 83, 85, 97, 100, 102, 104, 107, 137, 138, 158, 162, 175, 185, - 190, 191, 192, 268, 270, 282, 283, 285, 2138, 2139, 2140, 2166, 2167, 2170, - 2173, 4135, 20616, -}; - -static const unsigned short dep204[] = { - 77, 79, 80, 81, 97, 98, 99, 100, 103, 268, 269, 271, 282, 283, 284, -}; - -static const unsigned short dep205[] = { - 40, 41, 78, 79, 81, 83, 85, 97, 100, 102, 103, 104, 107, 137, 138, 158, 162, - 175, 185, 190, 191, 192, 268, 270, 271, 282, 283, 285, 2138, 2139, 2140, 2166, - 2167, 2170, 2173, 4135, 20616, -}; - -static const unsigned short dep206[] = { - 77, 79, 80, 84, 85, 86, 97, 98, 99, 100, 268, 269, 274, 275, 282, 283, 284, - -}; - -static const unsigned short dep207[] = { - 40, 41, 78, 79, 83, 85, 97, 100, 102, 137, 138, 158, 162, 175, 185, 190, 191, - 192, 268, 270, 273, 275, 282, 283, 285, 2138, 2139, 2140, 2166, 2167, 2170, - 2173, 4135, 20616, -}; - -static const unsigned short dep208[] = { - 77, 79, 80, 97, 98, 99, 100, 106, 107, 108, 268, 269, 282, 283, 284, 287, - 288, -}; - -static const unsigned short dep209[] = { - 40, 41, 78, 79, 97, 100, 102, 104, 107, 137, 138, 158, 162, 175, 185, 190, - 191, 192, 268, 270, 282, 283, 285, 286, 288, 2138, 2139, 2140, 2166, 2167, - 2170, 2173, 4135, 20616, -}; - -static const unsigned short dep210[] = { - 40, 41, 46, 70, 97, 158, 162, 175, 185, 190, 191, 192, 282, 2138, 2139, 2140, - 2166, 2167, 2170, 2173, 2327, 4135, 20616, -}; - -static const unsigned short dep211[] = { - 40, 41, 97, 158, 162, 175, 185, 190, 191, 192, 282, 2138, 2139, 2140, 2166, - 2167, 2170, 2173, 2327, 4135, 20616, -}; - -static const unsigned short dep212[] = { - 40, 41, 70, 77, 82, 84, 97, 137, 138, 153, 155, 158, 162, 175, 185, 190, 191, - 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, 20616, -}; - -static const unsigned short dep213[] = { - 40, 41, 97, 158, 162, 164, 175, 185, 186, 188, 282, 2135, 2136, 2137, 2138, - 2139, 2140, 2166, 2167, 2170, 2173, 4135, 16528, 16530, 16531, 16533, 20616, - -}; - -static const unsigned short dep214[] = { - 40, 41, 70, 77, 82, 84, 97, 153, 155, 158, 162, 175, 185, 192, 282, 2138, - 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616, -}; - -static const unsigned short dep215[] = { - 40, 41, 78, 79, 97, 100, 137, 138, 158, 162, 175, 185, 190, 191, 268, 270, - 282, 283, 285, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616, -}; - -static const unsigned short dep216[] = { - 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, 137, - 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191, - 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, 20616, -}; - -static const unsigned short dep217[] = { - 5, 97, 200, 282, 2140, 2327, -}; - -static const unsigned short dep218[] = { - 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, 137, - 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191, - 192, 200, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, 20616, - -}; - -static const unsigned short dep219[] = { - 40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, - 137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175, 185, - 190, 191, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, - 20616, -}; - -static const unsigned short dep220[] = { - 0, 97, 195, 282, 2140, 2327, -}; - -static const unsigned short dep221[] = { - 0, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, - 137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, - 191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, - 20616, -}; - -static const unsigned short dep222[] = { - 0, 40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, - 135, 137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175, - 185, 190, 191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, - 4135, 20616, -}; - -static const unsigned short dep223[] = { - 31, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, - 137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, - 191, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, 20616, - -}; - -static const unsigned short dep224[] = { - 0, 97, 195, 282, 2327, 26715, -}; - -static const unsigned short dep225[] = { - 0, 97, 109, 195, 282, 289, -}; - -static const unsigned short dep226[] = { - 0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137, - 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191, - 192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616, - -}; - -static const unsigned short dep227[] = { - 0, 5, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137, - 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191, - 192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616, - -}; - -static const unsigned short dep228[] = { - 0, 31, 97, 109, 195, 234, 282, 289, -}; - -static const unsigned short dep229[] = { - 0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137, - 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191, - 192, 195, 234, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 4135, 20616, - -}; - -static const unsigned short dep230[] = { - 0, 97, 109, 195, 282, 289, 2140, 2327, -}; - -static const unsigned short dep231[] = { - 0, 3, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, - 137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, - 191, 192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, - 20616, -}; - -static const unsigned short dep232[] = { - 0, 3, 5, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, - 135, 137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, - 190, 191, 192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, - 4135, 20616, -}; - -static const unsigned short dep233[] = { - 0, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, - 137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, - 191, 192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, - 20616, -}; - -static const unsigned short dep234[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2135, 2136, 2137, 2166, 2167, 2170, 2173, - 2327, 4135, 16528, 16530, 16531, 16533, 20616, -}; - -static const unsigned short dep235[] = { - 0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137, - 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191, - 192, 195, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, - 20616, -}; - -static const unsigned short dep236[] = { - 0, 31, 97, 109, 195, 234, 282, 289, 2140, 2327, -}; - -static const unsigned short dep237[] = { - 0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137, - 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191, - 192, 195, 234, 282, 289, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2327, 4135, - 20616, -}; - -static const unsigned short dep238[] = { - 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, 137, - 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191, - 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 4135, 16528, 16530, - 16531, 16533, 18761, 18763, 18764, 18766, 20616, -}; - -static const unsigned short dep239[] = { - 40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, - 137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175, 185, - 190, 191, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 4135, - 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616, -}; - -static const unsigned short dep240[] = { - 0, 97, 195, 282, 2136, 2325, 18601, 18602, 18761, 18762, 18764, 18765, -}; - -static const unsigned short dep241[] = { - 0, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, - 137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, - 191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 4135, - 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616, -}; - -static const unsigned short dep242[] = { - 0, 40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, - 135, 137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175, - 185, 190, 191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, - 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616, -}; - -static const unsigned short dep243[] = { - 0, 97, 195, 282, 2137, 2325, 18601, 18602, 18761, 18762, 18764, 18765, -}; - -static const unsigned short dep244[] = { - 97, 282, 2136, 2140, 2325, 2327, 18601, 18602, 18761, 18762, 18764, 18765, - -}; - -static const unsigned short dep245[] = { - 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, 137, - 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191, - 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 2327, 4135, 16528, - 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616, -}; - -static const unsigned short dep246[] = { - 40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, - 137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175, 185, - 190, 191, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 2327, - 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616, -}; - -static const unsigned short dep247[] = { - 0, 97, 195, 282, 2136, 2140, 2325, 2327, 18601, 18602, 18761, 18762, 18764, - 18765, -}; - -static const unsigned short dep248[] = { - 0, 40, 41, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, 135, - 137, 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, - 191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, 2327, - 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616, -}; - -static const unsigned short dep249[] = { - 0, 40, 41, 44, 70, 76, 77, 82, 84, 97, 109, 111, 128, 129, 131, 132, 133, - 135, 137, 138, 139, 140, 142, 143, 153, 155, 156, 158, 162, 171, 173, 175, - 185, 190, 191, 192, 195, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, 2325, - 2327, 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616, - -}; - -static const unsigned short dep250[] = { - 0, 97, 195, 282, 2137, 2140, 2325, 2327, 18601, 18602, 18761, 18762, 18764, - 18765, -}; - -static const unsigned short dep251[] = { - 0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137, - 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191, - 192, 195, 282, 289, 2135, 2136, 2137, 2138, 2139, 2140, 2166, 2167, 2170, - 2173, 4135, 16528, 16530, 16531, 16533, 20616, -}; - -static const unsigned short dep252[] = { - 40, 41, 70, 76, 77, 82, 84, 97, 137, 138, 139, 140, 142, 143, 153, 155, 156, - 158, 162, 171, 173, 175, 185, 192, 282, 2166, 2167, 2170, 2173, 4135, -}; - -static const unsigned short dep253[] = { - 40, 41, 70, 76, 77, 82, 84, 97, 137, 138, 139, 140, 142, 143, 153, 155, 156, - 158, 162, 171, 173, 175, 185, 192, 282, 2138, 2139, 2140, 2166, 2167, 2170, - 2173, 2327, 4135, 20616, -}; - -static const unsigned short dep254[] = { - 40, 41, 97, 158, 162, 175, 185, 282, 2138, 2139, 2140, 2166, 2167, 2170, 2173, - 2325, 4135, 16528, 16530, 16531, 16533, 18761, 18763, 18764, 18766, 20616, - -}; - -static const unsigned short dep255[] = { - 0, 40, 41, 70, 76, 77, 82, 84, 97, 111, 128, 129, 131, 132, 133, 135, 137, - 138, 139, 140, 142, 143, 153, 155, 158, 162, 171, 173, 175, 185, 190, 191, - 192, 195, 282, 289, 2135, 2136, 2137, 2138, 2139, 2140, 2166, 2167, 2170, - 2173, 2327, 4135, 16528, 16530, 16531, 16533, 20616, -}; - -static const unsigned short dep256[] = { - 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, - 22, 24, 26, 27, 28, 29, 30, 31, 97, 196, 197, 198, 199, 200, 201, 202, 203, - 204, 205, 206, 207, 208, 209, 211, 212, 214, 215, 217, 218, 220, 221, 222, - 223, 224, 225, 227, 230, 231, 232, 233, 234, 282, 2071, 2081, 2140, 2274, - 2284, 2327, 28866, 29018, -}; - -static const unsigned short dep257[] = { - 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, - 22, 24, 25, 26, 28, 29, 30, 31, 40, 41, 97, 137, 138, 158, 162, 175, 180, - 181, 185, 190, 191, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, - 207, 208, 209, 211, 212, 214, 215, 217, 218, 220, 221, 222, 223, 224, 225, - 227, 229, 231, 232, 233, 234, 282, 2071, 2081, 2138, 2139, 2140, 2166, 2167, - 2170, 2173, 2274, 2284, 2327, 4135, 20616, 28866, 29018, -}; - -#define NELS(X) (sizeof(X)/sizeof(X[0])) -static const struct ia64_opcode_dependency -op_dependencies[] = { - { NELS(dep1), dep1, NELS(dep0), dep0, }, - { NELS(dep3), dep3, NELS(dep2), dep2, }, - { NELS(dep5), dep5, NELS(dep4), dep4, }, - { NELS(dep7), dep7, NELS(dep6), dep6, }, - { NELS(dep9), dep9, NELS(dep8), dep8, }, - { NELS(dep11), dep11, NELS(dep10), dep10, }, - { NELS(dep13), dep13, NELS(dep12), dep12, }, - { NELS(dep15), dep15, NELS(dep14), dep14, }, - { NELS(dep17), dep17, NELS(dep16), dep16, }, - { NELS(dep19), dep19, NELS(dep18), dep18, }, - { NELS(dep21), dep21, NELS(dep20), dep20, }, - { NELS(dep23), dep23, NELS(dep22), dep22, }, - { NELS(dep25), dep25, NELS(dep24), dep24, }, - { NELS(dep27), dep27, NELS(dep26), dep26, }, - { NELS(dep29), dep29, NELS(dep28), dep28, }, - { NELS(dep30), dep30, NELS(dep12), dep12, }, - { NELS(dep32), dep32, NELS(dep31), dep31, }, - { NELS(dep34), dep34, NELS(dep33), dep33, }, - { NELS(dep35), dep35, NELS(dep12), dep12, }, - { NELS(dep37), dep37, NELS(dep36), dep36, }, - { NELS(dep39), dep39, NELS(dep38), dep38, }, - { NELS(dep41), dep41, NELS(dep40), dep40, }, - { NELS(dep42), dep42, NELS(dep31), dep31, }, - { NELS(dep43), dep43, NELS(dep33), dep33, }, - { NELS(dep45), dep45, NELS(dep44), dep44, }, - { NELS(dep47), dep47, NELS(dep46), dep46, }, - { NELS(dep49), dep49, NELS(dep48), dep48, }, - { NELS(dep51), dep51, NELS(dep50), dep50, }, - { NELS(dep53), dep53, NELS(dep52), dep52, }, - { NELS(dep55), dep55, NELS(dep54), dep54, }, - { NELS(dep57), dep57, NELS(dep56), dep56, }, - { NELS(dep59), dep59, NELS(dep58), dep58, }, - { NELS(dep61), dep61, NELS(dep60), dep60, }, - { NELS(dep63), dep63, NELS(dep62), dep62, }, - { NELS(dep65), dep65, NELS(dep64), dep64, }, - { NELS(dep67), dep67, NELS(dep66), dep66, }, - { NELS(dep68), dep68, NELS(dep33), dep33, }, - { NELS(dep70), dep70, NELS(dep69), dep69, }, - { NELS(dep72), dep72, NELS(dep71), dep71, }, - { NELS(dep74), dep74, NELS(dep73), dep73, }, - { NELS(dep76), dep76, NELS(dep75), dep75, }, - { NELS(dep77), dep77, NELS(dep33), dep33, }, - { NELS(dep79), dep79, NELS(dep78), dep78, }, - { NELS(dep81), dep81, NELS(dep80), dep80, }, - { NELS(dep83), dep83, NELS(dep82), dep82, }, - { NELS(dep84), dep84, NELS(dep33), dep33, }, - { NELS(dep85), dep85, NELS(dep33), dep33, }, - { NELS(dep86), dep86, NELS(dep33), dep33, }, - { NELS(dep87), dep87, NELS(dep33), dep33, }, - { NELS(dep89), dep89, NELS(dep88), dep88, }, - { NELS(dep91), dep91, NELS(dep90), dep90, }, - { NELS(dep93), dep93, NELS(dep92), dep92, }, - { NELS(dep95), dep95, NELS(dep94), dep94, }, - { NELS(dep97), dep97, NELS(dep96), dep96, }, - { NELS(dep99), dep99, NELS(dep98), dep98, }, - { NELS(dep101), dep101, NELS(dep100), dep100, }, - { NELS(dep103), dep103, NELS(dep102), dep102, }, - { NELS(dep105), dep105, NELS(dep104), dep104, }, - { NELS(dep107), dep107, NELS(dep106), dep106, }, - { NELS(dep109), dep109, NELS(dep108), dep108, }, - { NELS(dep111), dep111, NELS(dep110), dep110, }, - { NELS(dep113), dep113, NELS(dep112), dep112, }, - { NELS(dep115), dep115, NELS(dep114), dep114, }, - { NELS(dep117), dep117, NELS(dep116), dep116, }, - { NELS(dep119), dep119, NELS(dep118), dep118, }, - { NELS(dep121), dep121, NELS(dep120), dep120, }, - { NELS(dep122), dep122, NELS(dep64), dep64, }, - { NELS(dep123), dep123, NELS(dep33), dep33, }, - { NELS(dep125), dep125, NELS(dep124), dep124, }, - { NELS(dep126), dep126, NELS(dep0), dep0, }, - { NELS(dep128), dep128, NELS(dep127), dep127, }, - { NELS(dep130), dep130, NELS(dep129), dep129, }, - { NELS(dep131), dep131, NELS(dep0), dep0, }, - { NELS(dep132), dep132, NELS(dep0), dep0, }, - { NELS(dep134), dep134, NELS(dep133), dep133, }, - { NELS(dep135), dep135, NELS(dep0), dep0, }, - { NELS(dep136), dep136, NELS(dep2), dep2, }, - { NELS(dep137), dep137, NELS(dep4), dep4, }, - { NELS(dep138), dep138, NELS(dep6), dep6, }, - { NELS(dep139), dep139, NELS(dep8), dep8, }, - { NELS(dep140), dep140, NELS(dep10), dep10, }, - { NELS(dep141), dep141, NELS(dep33), dep33, }, - { NELS(dep143), dep143, NELS(dep142), dep142, }, - { NELS(dep144), dep144, NELS(dep142), dep142, }, - { NELS(dep146), dep146, NELS(dep145), dep145, }, - { NELS(dep147), dep147, NELS(dep145), dep145, }, - { NELS(dep148), dep148, NELS(dep142), dep142, }, - { NELS(dep150), dep150, NELS(dep149), dep149, }, - { NELS(dep152), dep152, NELS(dep151), dep151, }, - { NELS(dep154), dep154, NELS(dep153), dep153, }, - { NELS(dep156), dep156, NELS(dep155), dep155, }, - { NELS(dep157), dep157, NELS(dep155), dep155, }, - { NELS(dep158), dep158, NELS(dep0), dep0, }, - { NELS(dep160), dep160, NELS(dep159), dep159, }, - { NELS(dep162), dep162, NELS(dep161), dep161, }, - { NELS(dep164), dep164, NELS(dep163), dep163, }, - { NELS(dep166), dep166, NELS(dep165), dep165, }, - { NELS(dep168), dep168, NELS(dep167), dep167, }, - { NELS(dep169), dep169, NELS(dep0), dep0, }, - { NELS(dep170), dep170, NELS(dep0), dep0, }, - { NELS(dep171), dep171, NELS(dep0), dep0, }, - { NELS(dep172), dep172, NELS(dep33), dep33, }, - { NELS(dep174), dep174, NELS(dep173), dep173, }, - { NELS(dep175), dep175, NELS(dep173), dep173, }, - { NELS(dep177), dep177, NELS(dep176), dep176, }, - { NELS(dep179), dep179, NELS(dep178), dep178, }, - { NELS(dep181), dep181, NELS(dep180), dep180, }, - { NELS(dep183), dep183, NELS(dep182), dep182, }, - { NELS(dep185), dep185, NELS(dep184), dep184, }, - { NELS(dep187), dep187, NELS(dep186), dep186, }, - { NELS(dep189), dep189, NELS(dep188), dep188, }, - { NELS(dep191), dep191, NELS(dep190), dep190, }, - { NELS(dep193), dep193, NELS(dep192), dep192, }, - { NELS(dep194), dep194, NELS(dep0), dep0, }, - { NELS(dep195), dep195, NELS(dep0), dep0, }, - { NELS(dep196), dep196, NELS(dep0), dep0, }, - { NELS(dep197), dep197, NELS(dep0), dep0, }, - { NELS(dep198), dep198, NELS(dep0), dep0, }, - { NELS(dep199), dep199, NELS(dep0), dep0, }, - { NELS(dep200), dep200, NELS(dep0), dep0, }, - { NELS(dep201), dep201, NELS(dep0), dep0, }, - { NELS(dep203), dep203, NELS(dep202), dep202, }, - { NELS(dep205), dep205, NELS(dep204), dep204, }, - { NELS(dep207), dep207, NELS(dep206), dep206, }, - { NELS(dep209), dep209, NELS(dep208), dep208, }, - { NELS(dep210), dep210, NELS(dep0), dep0, }, - { NELS(dep211), dep211, NELS(dep0), dep0, }, - { NELS(dep212), dep212, NELS(dep0), dep0, }, - { NELS(dep213), dep213, NELS(dep33), dep33, }, - { NELS(dep214), dep214, NELS(dep33), dep33, }, - { NELS(dep215), dep215, NELS(dep202), dep202, }, - { NELS(dep216), dep216, NELS(dep0), dep0, }, - { NELS(dep218), dep218, NELS(dep217), dep217, }, - { NELS(dep219), dep219, NELS(dep0), dep0, }, - { NELS(dep221), dep221, NELS(dep220), dep220, }, - { NELS(dep222), dep222, NELS(dep220), dep220, }, - { NELS(dep223), dep223, NELS(dep0), dep0, }, - { NELS(dep221), dep221, NELS(dep224), dep224, }, - { NELS(dep226), dep226, NELS(dep225), dep225, }, - { NELS(dep227), dep227, NELS(dep225), dep225, }, - { NELS(dep229), dep229, NELS(dep228), dep228, }, - { NELS(dep231), dep231, NELS(dep230), dep230, }, - { NELS(dep232), dep232, NELS(dep230), dep230, }, - { NELS(dep233), dep233, NELS(dep230), dep230, }, - { NELS(dep234), dep234, NELS(dep0), dep0, }, - { NELS(dep235), dep235, NELS(dep230), dep230, }, - { NELS(dep237), dep237, NELS(dep236), dep236, }, - { NELS(dep238), dep238, NELS(dep64), dep64, }, - { NELS(dep239), dep239, NELS(dep64), dep64, }, - { NELS(dep241), dep241, NELS(dep240), dep240, }, - { NELS(dep242), dep242, NELS(dep240), dep240, }, - { NELS(dep241), dep241, NELS(dep243), dep243, }, - { NELS(dep245), dep245, NELS(dep244), dep244, }, - { NELS(dep246), dep246, NELS(dep244), dep244, }, - { NELS(dep248), dep248, NELS(dep247), dep247, }, - { NELS(dep249), dep249, NELS(dep247), dep247, }, - { NELS(dep248), dep248, NELS(dep250), dep250, }, - { NELS(dep251), dep251, NELS(dep225), dep225, }, - { NELS(dep252), dep252, NELS(dep33), dep33, }, - { NELS(dep253), dep253, NELS(dep0), dep0, }, - { NELS(dep254), dep254, NELS(dep64), dep64, }, - { NELS(dep255), dep255, NELS(dep230), dep230, }, - { 0, NULL, 0, NULL, }, - { NELS(dep257), dep257, NELS(dep256), dep256, }, -}; - -static const struct ia64_completer_table -completer_table[] = { - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 95 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 95 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 594, -1, 0, 1, 6 }, - { 0x0, 0x0, 0, 657, -1, 0, 1, 18 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 162 }, - { 0x0, 0x0, 0, 756, -1, 0, 1, 18 }, - { 0x0, 0x0, 0, 2198, -1, 0, 1, 10 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 9 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 13 }, - { 0x1, 0x1, 0, -1, -1, 13, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, 2406, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, 1140, -1, 0, 1, 129 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 45 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 41 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 84 }, - { 0x0, 0x0, 0, 2246, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, 2473, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, 2250, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, 2252, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, 2482, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, 2485, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, 2507, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, 2510, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 25 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 25 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 25 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 25 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 36 }, - { 0x0, 0x0, 0, 2518, -1, 0, 1, 30 }, - { 0x0, 0x0, 0, 1409, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 41 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 162 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 83 }, - { 0x0, 0x0, 0, 1457, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1466, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1475, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1477, -1, 0, 1, 132 }, - { 0x0, 0x0, 0, 1479, -1, 0, 1, 132 }, - { 0x0, 0x0, 0, 1488, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1497, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1506, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1515, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1524, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1533, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1543, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1553, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1563, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1572, -1, 0, 1, 147 }, - { 0x0, 0x0, 0, 1578, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1584, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1590, -1, 0, 1, 147 }, - { 0x0, 0x0, 0, 1596, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1602, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1608, -1, 0, 1, 147 }, - { 0x0, 0x0, 0, 1614, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1620, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1626, -1, 0, 1, 147 }, - { 0x0, 0x0, 0, 1632, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1638, -1, 0, 1, 147 }, - { 0x0, 0x0, 0, 1644, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1650, -1, 0, 1, 147 }, - { 0x0, 0x0, 0, 1656, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1662, -1, 0, 1, 147 }, - { 0x0, 0x0, 0, 1668, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1674, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, 1678, -1, 0, 1, 158 }, - { 0x0, 0x0, 0, 1682, -1, 0, 1, 159 }, - { 0x0, 0x0, 0, 1686, -1, 0, 1, 159 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 85 }, - { 0x0, 0x0, 0, 258, -1, 0, 1, 41 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 68 }, - { 0x1, 0x1, 0, 1166, -1, 20, 1, 68 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 69 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 70 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 70 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 71 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 72 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 73 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 93 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 94 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 96 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 97 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 98 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 99 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 104 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 105 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 106 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 107 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 108 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 109 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 110 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 113 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 114 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 115 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 116 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 117 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 118 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 119 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 120 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 163 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 163 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 163 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 72 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 162 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 2858, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 2859, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 2210, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 2211, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 2873, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 2874, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 2875, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 2876, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 2877, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 2860, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 2861, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 11 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 91 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 89 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x1, 0x1, 0, -1, -1, 13, 1, 0 }, - { 0x0, 0x0, 0, 2879, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 90 }, - { 0x0, 0x0, 0, 1966, -1, 0, 1, 138 }, - { 0x0, 0x0, 0, 1968, -1, 0, 1, 145 }, - { 0x0, 0x0, 0, 1970, -1, 0, 1, 139 }, - { 0x0, 0x0, 0, 1972, -1, 0, 1, 139 }, - { 0x0, 0x0, 0, 1974, -1, 0, 1, 138 }, - { 0x0, 0x0, 0, 1976, -1, 0, 1, 145 }, - { 0x0, 0x0, 0, 1978, -1, 0, 1, 138 }, - { 0x0, 0x0, 0, 1980, -1, 0, 1, 145 }, - { 0x0, 0x0, 0, 1983, -1, 0, 1, 138 }, - { 0x0, 0x0, 0, 1986, -1, 0, 1, 145 }, - { 0x0, 0x0, 0, 1989, -1, 0, 1, 157 }, - { 0x0, 0x0, 0, 1990, -1, 0, 1, 161 }, - { 0x0, 0x0, 0, 1991, -1, 0, 1, 157 }, - { 0x0, 0x0, 0, 1992, -1, 0, 1, 161 }, - { 0x0, 0x0, 0, 1993, -1, 0, 1, 157 }, - { 0x0, 0x0, 0, 1994, -1, 0, 1, 161 }, - { 0x0, 0x0, 0, 1995, -1, 0, 1, 157 }, - { 0x0, 0x0, 0, 1996, -1, 0, 1, 161 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 88 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 127 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 125 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 127 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 126 }, - { 0x0, 0x0, 0, 1687, -1, 0, 1, 143 }, - { 0x0, 0x0, 0, 1688, -1, 0, 1, 143 }, - { 0x0, 0x0, 0, 1689, -1, 0, 1, 143 }, - { 0x0, 0x0, 0, 1690, -1, 0, 1, 143 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 1, 224, -1, 0, 1, 12 }, - { 0x0, 0x0, 1, 225, -1, 0, 1, 14 }, - { 0x1, 0x1, 2, -1, -1, 27, 1, 12 }, - { 0x1, 0x1, 2, -1, -1, 27, 1, 14 }, - { 0x0, 0x0, 3, -1, 1340, 0, 0, -1 }, - { 0x0, 0x0, 3, -1, 1341, 0, 0, -1 }, - { 0x1, 0x1, 3, 2749, 1450, 33, 1, 134 }, - { 0x1, 0x1, 3, 2750, 1459, 33, 1, 134 }, - { 0x1, 0x1, 3, 2751, 1468, 33, 1, 134 }, - { 0x1, 0x1, 3, 2752, 1481, 33, 1, 134 }, - { 0x1, 0x1, 3, 2753, 1490, 33, 1, 134 }, - { 0x1, 0x1, 3, 2754, 1499, 33, 1, 134 }, - { 0x1, 0x1, 3, 2755, 1508, 33, 1, 134 }, - { 0x1, 0x1, 3, 2756, 1517, 33, 1, 134 }, - { 0x1, 0x1, 3, 2757, 1526, 33, 1, 134 }, - { 0x1, 0x1, 3, 2758, 1535, 33, 1, 134 }, - { 0x1, 0x1, 3, 2759, 1545, 33, 1, 134 }, - { 0x1, 0x1, 3, 2760, 1555, 33, 1, 134 }, - { 0x1, 0x1, 3, 2761, 1568, 33, 1, 149 }, - { 0x1, 0x1, 3, 2762, 1574, 33, 1, 154 }, - { 0x1, 0x1, 3, 2763, 1580, 33, 1, 154 }, - { 0x1, 0x1, 3, 2764, 1586, 33, 1, 149 }, - { 0x1, 0x1, 3, 2765, 1592, 33, 1, 154 }, - { 0x1, 0x1, 3, 2766, 1598, 33, 1, 154 }, - { 0x1, 0x1, 3, 2767, 1604, 33, 1, 149 }, - { 0x1, 0x1, 3, 2768, 1610, 33, 1, 154 }, - { 0x1, 0x1, 3, 2769, 1616, 33, 1, 154 }, - { 0x1, 0x1, 3, 2770, 1622, 33, 1, 149 }, - { 0x1, 0x1, 3, 2771, 1628, 33, 1, 154 }, - { 0x1, 0x1, 3, 2772, 1634, 33, 1, 149 }, - { 0x1, 0x1, 3, 2773, 1640, 33, 1, 154 }, - { 0x1, 0x1, 3, 2774, 1646, 33, 1, 149 }, - { 0x1, 0x1, 3, 2775, 1652, 33, 1, 154 }, - { 0x1, 0x1, 3, 2776, 1658, 33, 1, 149 }, - { 0x1, 0x1, 3, 2777, 1664, 33, 1, 154 }, - { 0x1, 0x1, 3, 2778, 1670, 33, 1, 154 }, - { 0x1, 0x1, 3, -1, -1, 27, 1, 41 }, - { 0x0, 0x0, 4, 2212, 1425, 0, 1, 142 }, - { 0x0, 0x0, 4, 2213, 1427, 0, 1, 142 }, - { 0x0, 0x0, 4, 2214, 1429, 0, 1, 141 }, - { 0x0, 0x0, 4, 2215, 1431, 0, 1, 141 }, - { 0x0, 0x0, 4, 2216, 1433, 0, 1, 141 }, - { 0x0, 0x0, 4, 2217, 1435, 0, 1, 141 }, - { 0x0, 0x0, 4, 2218, 1437, 0, 1, 141 }, - { 0x0, 0x0, 4, 2219, 1439, 0, 1, 141 }, - { 0x0, 0x0, 4, 2220, 1441, 0, 1, 141 }, - { 0x0, 0x0, 4, 2221, 1443, 0, 1, 141 }, - { 0x0, 0x0, 4, 2222, 1445, 0, 1, 143 }, - { 0x0, 0x0, 4, 2223, 1447, 0, 1, 143 }, - { 0x1, 0x1, 4, -1, 1454, 33, 1, 137 }, - { 0x5, 0x5, 4, 552, 1453, 32, 1, 131 }, - { 0x1, 0x1, 4, -1, 1463, 33, 1, 137 }, - { 0x5, 0x5, 4, 553, 1462, 32, 1, 131 }, - { 0x1, 0x1, 4, -1, 1472, 33, 1, 137 }, - { 0x5, 0x5, 4, 554, 1471, 32, 1, 131 }, - { 0x1, 0x1, 4, -1, 1476, 32, 1, 132 }, - { 0x1, 0x1, 4, -1, 1478, 32, 1, 132 }, - { 0x1, 0x1, 4, -1, 1485, 33, 1, 137 }, - { 0x5, 0x5, 4, 555, 1484, 32, 1, 131 }, - { 0x1, 0x1, 4, -1, 1494, 33, 1, 137 }, - { 0x5, 0x5, 4, 556, 1493, 32, 1, 131 }, - { 0x1, 0x1, 4, -1, 1503, 33, 1, 137 }, - { 0x5, 0x5, 4, 557, 1502, 32, 1, 131 }, - { 0x1, 0x1, 4, -1, 1512, 33, 1, 137 }, - { 0x5, 0x5, 4, 558, 1511, 32, 1, 131 }, - { 0x1, 0x1, 4, -1, 1521, 33, 1, 137 }, - { 0x5, 0x5, 4, 559, 1520, 32, 1, 131 }, - { 0x1, 0x1, 4, -1, 1530, 33, 1, 137 }, - { 0x5, 0x5, 4, 560, 1529, 32, 1, 131 }, - { 0x1, 0x1, 4, -1, 1540, 33, 1, 137 }, - { 0x5, 0x5, 4, 1036, 1538, 32, 1, 131 }, - { 0x1, 0x1, 4, -1, 1550, 33, 1, 137 }, - { 0x5, 0x5, 4, 1037, 1548, 32, 1, 131 }, - { 0x1, 0x1, 4, -1, 1560, 33, 1, 137 }, - { 0x5, 0x5, 4, 1038, 1558, 32, 1, 131 }, - { 0x1, 0x21, 10, 2013, -1, 33, 1, 3 }, - { 0x200001, 0x200001, 10, 2014, -1, 12, 1, 3 }, - { 0x1, 0x21, 10, 420, -1, 33, 1, 3 }, - { 0x200001, 0x200001, 10, 2074, -1, 12, 1, 3 }, - { 0x0, 0x0, 10, -1, 2075, 0, 0, -1 }, - { 0x0, 0x0, 10, -1, 2076, 0, 0, -1 }, - { 0x0, 0x0, 10, 2017, -1, 0, 1, 3 }, - { 0x1, 0x1, 10, 2018, -1, 12, 1, 3 }, - { 0x1, 0x1, 10, 2019, -1, 33, 1, 3 }, - { 0x200001, 0x200001, 10, 2020, -1, 12, 1, 3 }, - { 0x0, 0x0, 10, 430, -1, 0, 1, 3 }, - { 0x1, 0x1, 10, 2080, -1, 12, 1, 3 }, - { 0x1, 0x1, 10, 434, -1, 33, 1, 3 }, - { 0x200001, 0x200001, 10, 2082, -1, 12, 1, 3 }, - { 0x0, 0x0, 10, 438, -1, 0, 1, 3 }, - { 0x1, 0x1, 10, 2084, -1, 12, 1, 3 }, - { 0x1, 0x1, 10, 442, -1, 33, 1, 3 }, - { 0x200001, 0x200001, 10, 2086, -1, 12, 1, 3 }, - { 0x0, 0x0, 10, 446, -1, 0, 1, 3 }, - { 0x1, 0x1, 10, 2088, -1, 12, 1, 3 }, - { 0x1, 0x1, 10, 450, -1, 33, 1, 3 }, - { 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220, 2455, -1, 0, 1, 59 }, - { 0x0, 0x0, 220, 2456, -1, 0, 1, 54 }, - { 0x0, 0x0, 220, 2457, -1, 0, 1, 59 }, - { 0x0, 0x0, 220, 2458, -1, 0, 1, 54 }, - { 0x1, 0x1, 220, 2459, -1, 28, 1, 29 }, - { 0x0, 0x0, 220, 2460, -1, 0, 1, 29 }, - { 0x3, 0x3, 220, 2461, -1, 27, 1, 29 }, - { 0x1, 0x1, 220, 2462, -1, 27, 1, 29 }, - { 0x0, 0x0, 220, 2463, -1, 0, 1, 66 }, - { 0x0, 0x0, 220, 2464, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2465, -1, 0, 1, 29 }, - { 0x1, 0x1, 220, 2466, -1, 36, 1, 66 }, - { 0x1, 0x1, 220, 2467, -1, 37, 1, 29 }, - { 0x0, 0x0, 220, 2468, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2469, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2470, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2471, -1, 0, 1, 66 }, - { 0x0, 0x0, 220, 2472, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 37, -1, 0, 1, 29 }, - { 0x1, 0x1, 220, 2474, -1, 36, 1, 66 }, - { 0x1, 0x1, 220, 2475, -1, 37, 1, 29 }, - { 0x0, 0x0, 220, 2476, -1, 0, 1, 29 }, - { 0x1, 0x1, 220, 2477, -1, 36, 1, 66 }, - { 0x1, 0x1, 220, 2478, -1, 37, 1, 29 }, - { 0x0, 0x0, 220, 2479, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2480, -1, 0, 1, 66 }, - { 0x0, 0x0, 220, 2481, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 42, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2483, -1, 0, 1, 66 }, - { 0x0, 0x0, 220, 2484, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 43, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2486, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2487, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2488, -1, 0, 1, 49 }, - { 0x1, 0x1, 220, 2489, -1, 27, 1, 49 }, - { 0x1, 0x1, 220, 2490, -1, 28, 1, 49 }, - { 0x3, 0x3, 220, 2491, -1, 27, 1, 49 }, - { 0x1, 0x1, 220, 2492, -1, 29, 1, 49 }, - { 0x5, 0x5, 220, 2493, -1, 27, 1, 49 }, - { 0x3, 0x3, 220, 2494, -1, 28, 1, 49 }, - { 0x7, 0x7, 220, 2495, -1, 27, 1, 49 }, - { 0x0, 0x0, 220, 2496, -1, 0, 1, 49 }, - { 0x0, 0x0, 220, 2497, -1, 0, 1, 49 }, - { 0x0, 0x0, 220, 2498, -1, 0, 1, 49 }, - { 0x0, 0x0, 220, 2499, -1, 0, 1, 49 }, - { 0x1, 0x1, 220, 2500, -1, 28, 1, 29 }, - { 0x0, 0x0, 220, 2501, -1, 0, 1, 29 }, - { 0x3, 0x3, 220, 2502, -1, 27, 1, 29 }, - { 0x1, 0x1, 220, 2503, -1, 27, 1, 29 }, - { 0x0, 0x0, 220, 2504, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2505, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2506, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 52, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2508, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2509, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 57, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 2511, -1, 0, 1, 24 }, - { 0x0, 0x0, 220, 2512, -1, 0, 1, 24 }, - { 0x0, 0x0, 220, 2513, -1, 0, 1, 24 }, - { 0x0, 0x0, 220, 2514, -1, 0, 1, 24 }, - { 0x0, 0x0, 220, 2515, -1, 0, 1, 35 }, - { 0x0, 0x0, 220, 2516, -1, 0, 1, 66 }, - { 0x0, 0x0, 220, 2517, -1, 0, 1, 29 }, - { 0x0, 0x0, 220, 64, -1, 0, 1, 29 }, - { 0x1, 0x1, 221, 2519, -1, 34, 1, 66 }, - { 0x1, 0x1, 221, 2520, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2521, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2522, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2523, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2524, -1, 34, 1, 46 }, - { 0x1, 0x1, 221, 2525, -1, 34, 1, 42 }, - { 0x400001, 0x400001, 221, 2526, -1, 12, 1, 61 }, - { 0x1, 0x1, 221, 2527, -1, 34, 1, 56 }, - { 0x1400001, 0x1400001, 221, 2528, -1, 12, 1, 61 }, - { 0x5, 0x5, 221, 2529, -1, 34, 1, 56 }, - { 0x600001, 0x600001, 221, 2530, -1, 12, 1, 61 }, - { 0x3, 0x3, 221, 2531, -1, 33, 1, 56 }, - { 0x1600001, 0x1600001, 221, 2532, -1, 12, 1, 51 }, - { 0xb, 0xb, 221, 2533, -1, 33, 1, 51 }, - { 0x1, 0x1, 221, 2534, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2535, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2536, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2537, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2538, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2539, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2540, -1, 34, 1, 51 }, - { 0x1, 0x1, 221, 2541, -1, 34, 1, 51 }, - { 0x400001, 0x400001, 221, 2542, -1, 12, 1, 61 }, - { 0x1, 0x1, 221, 2543, -1, 34, 1, 56 }, - { 0x600001, 0x1600001, 221, 2544, -1, 12, 1, 61 }, - { 0x3, 0xb, 221, 2545, -1, 33, 1, 56 }, - { 0x1, 0x1, 221, 2546, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2547, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2548, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2549, -1, 34, 1, 56 }, - { 0x400001, 0x400001, 221, 2550, -1, 12, 1, 61 }, - { 0x1, 0x1, 221, 2551, -1, 34, 1, 56 }, - { 0x1400001, 0x1400001, 221, 2552, -1, 12, 1, 61 }, - { 0x5, 0x5, 221, 2553, -1, 34, 1, 56 }, - { 0x600001, 0x600001, 221, 2554, -1, 12, 1, 61 }, - { 0x3, 0x3, 221, 2555, -1, 33, 1, 56 }, - { 0x1600001, 0x1600001, 221, 2556, -1, 12, 1, 51 }, - { 0xb, 0xb, 221, 2557, -1, 33, 1, 51 }, - { 0x1, 0x1, 221, 2558, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2559, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2560, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2561, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2562, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2563, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2564, -1, 34, 1, 51 }, - { 0x1, 0x1, 221, 2565, -1, 34, 1, 51 }, - { 0x400001, 0x400001, 221, 2566, -1, 12, 1, 61 }, - { 0x1, 0x1, 221, 2567, -1, 34, 1, 56 }, - { 0x600001, 0x1600001, 221, 2568, -1, 12, 1, 61 }, - { 0x3, 0xb, 221, 2569, -1, 33, 1, 56 }, - { 0x1, 0x1, 221, 2570, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2571, -1, 34, 1, 56 }, - { 0x1, 0x1, 221, 2572, -1, 34, 1, 61 }, - { 0x1, 0x1, 221, 2573, -1, 34, 1, 56 }, - { 0x41, 0x41, 221, 2574, -1, 28, 1, 31 }, - { 0x1, 0x1, 221, 2575, -1, 34, 1, 31 }, - { 0x83, 0x83, 221, 2576, -1, 27, 1, 31 }, - { 0x81, 0x81, 221, 2577, -1, 27, 1, 31 }, - { 0x1, 0x1, 221, 2578, -1, 34, 1, 66 }, - { 0x1, 0x1, 221, 2579, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2580, -1, 34, 1, 31 }, - { 0x5, 0x5, 221, 2581, -1, 34, 1, 66 }, - { 0x9, 0x9, 221, 2582, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2583, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2584, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2585, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2586, -1, 34, 1, 66 }, - { 0x1, 0x1, 221, 2587, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2588, -1, 34, 1, 31 }, - { 0x5, 0x5, 221, 2589, -1, 34, 1, 66 }, - { 0x9, 0x9, 221, 2590, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2591, -1, 34, 1, 31 }, - { 0x5, 0x5, 221, 2592, -1, 34, 1, 66 }, - { 0x9, 0x9, 221, 2593, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2594, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2595, -1, 34, 1, 66 }, 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221, 2619, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2620, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2621, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2622, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2623, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2624, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2625, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2626, -1, 34, 1, 26 }, - { 0x1, 0x1, 221, 2627, -1, 34, 1, 26 }, - { 0x1, 0x1, 221, 2628, -1, 34, 1, 26 }, - { 0x1, 0x1, 221, 2629, -1, 34, 1, 26 }, - { 0x1, 0x1, 221, 2630, -1, 34, 1, 37 }, - { 0x1, 0x1, 221, 2631, -1, 34, 1, 66 }, - { 0x1, 0x1, 221, 2632, -1, 34, 1, 31 }, - { 0x1, 0x1, 221, 2633, -1, 34, 1, 31 }, - { 0x1, 0x1, 222, 2634, -1, 35, 1, 66 }, - { 0x1, 0x1, 222, 2635, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2636, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2637, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2638, -1, 35, 1, 32 }, - { 0x1, 0x1, 222, 2639, -1, 35, 1, 47 }, - { 0x1, 0x1, 222, 2640, -1, 35, 1, 43 }, - { 0x800001, 0x800001, 222, 2641, -1, 12, 1, 62 }, - { 0x1, 0x1, 222, 2642, -1, 35, 1, 57 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0x1, 0x1, 233, -1, 1985, 33, 1, 146 }, - { 0x0, 0x0, 233, -1, 1987, 0, 1, 157 }, - { 0x0, 0x0, 233, -1, 1988, 0, 1, 161 }, - { 0x0, 0x0, 234, 883, 971, 0, 0, -1 }, - { 0x0, 0x0, 234, 884, 979, 0, 0, -1 }, - { 0x0, 0x0, 234, 885, 975, 0, 0, -1 }, - { 0x1, 0x1, 234, 886, 620, 33, 1, 6 }, - { 0x8000001, 0x8000001, 234, 887, 628, 6, 1, 7 }, - { 0x1, 0x1, 234, 888, 624, 33, 1, 6 }, - { 0x0, 0x0, 234, 889, 983, 0, 0, -1 }, - { 0x1, 0x1, 234, 890, 640, 33, 1, 8 }, - { 0x0, 0x0, 234, 891, 987, 0, 0, -1 }, - { 0x1, 0x1, 234, 892, 652, 33, 1, 16 }, - { 0x0, 0x0, 234, 893, 992, 0, 0, -1 }, - { 0x0, 0x0, 234, 894, 996, 0, 0, -1 }, - { 0x1, 0x1, 234, 895, 675, 33, 1, 18 }, - { 0x1, 0x1, 234, 896, 679, 33, 1, 18 }, - { 0x0, 0x0, 234, 897, 1000, 0, 0, -1 }, - { 0x0, 0x0, 234, 898, 1004, 0, 0, -1 }, - { 0x1, 0x1, 234, 899, 699, 33, 1, 19 }, - { 0x8000001, 0x8000001, 234, 900, 703, 6, 1, 19 }, - { 0x0, 0x0, 234, 901, 1008, 0, 0, -1 }, - { 0x1, 0x1, 234, 902, 715, 33, 1, 20 }, - { 0x0, 0x0, 234, 903, 1012, 0, 0, -1 }, - { 0x0, 0x0, 234, 904, 1016, 0, 0, -1 }, - { 0x1, 0x1, 234, 905, 735, 33, 1, 21 }, - { 0x8000001, 0x8000001, 234, 906, 739, 6, 1, 21 }, - { 0x0, 0x0, 234, 907, 1020, 0, 0, -1 }, - { 0x1, 0x1, 234, 908, 751, 33, 1, 22 }, - { 0x0, 0x0, 234, 909, 1025, 0, 0, -1 }, - { 0x0, 0x0, 234, 910, 1029, 0, 0, -1 }, - { 0x1, 0x1, 234, 911, 774, 33, 1, 18 }, - { 0x1, 0x1, 234, 912, 778, 33, 1, 18 }, - { 0x0, 0x0, 234, 913, 1033, 0, 0, -1 }, - { 0x1, 0x1, 234, 914, 790, 33, 1, 22 }, - { 0x0, 0x0, 235, 2787, 970, 0, 0, -1 }, - { 0x0, 0x0, 235, 2788, 978, 0, 0, -1 }, - { 0x0, 0x0, 235, 2789, 974, 0, 0, -1 }, - { 0x0, 0x0, 235, 2790, 619, 0, 1, 6 }, - { 0x1, 0x1, 235, 2791, 627, 6, 1, 7 }, - { 0x0, 0x0, 235, 2792, 623, 0, 1, 6 }, - { 0x0, 0x0, 235, 2793, 982, 0, 0, -1 }, - { 0x0, 0x0, 235, 2794, 639, 0, 1, 8 }, - { 0x0, 0x0, 235, 2795, 986, 0, 0, -1 }, - { 0x0, 0x0, 235, 2796, 651, 0, 1, 16 }, - { 0x0, 0x0, 235, 2797, 991, 0, 0, -1 }, - { 0x0, 0x0, 235, 2798, 995, 0, 0, -1 }, - { 0x0, 0x0, 235, 2799, 674, 0, 1, 18 }, - { 0x0, 0x0, 235, 2800, 678, 0, 1, 18 }, - { 0x0, 0x0, 235, 2801, 999, 0, 0, -1 }, - { 0x0, 0x0, 235, 2802, 1003, 0, 0, -1 }, - { 0x0, 0x0, 235, 2803, 698, 0, 1, 19 }, - { 0x1, 0x1, 235, 2804, 702, 6, 1, 19 }, - { 0x0, 0x0, 235, 2805, 1007, 0, 0, -1 }, - { 0x0, 0x0, 235, 2806, 714, 0, 1, 20 }, - { 0x0, 0x0, 235, 2807, 1011, 0, 0, -1 }, - { 0x0, 0x0, 235, 2808, 1015, 0, 0, -1 }, - { 0x0, 0x0, 235, 2809, 734, 0, 1, 21 }, - { 0x1, 0x1, 235, 2810, 738, 6, 1, 21 }, - { 0x0, 0x0, 235, 2811, 1019, 0, 0, -1 }, - { 0x0, 0x0, 235, 2812, 750, 0, 1, 22 }, - { 0x0, 0x0, 235, 2813, 1024, 0, 0, -1 }, - { 0x0, 0x0, 235, 2814, 1028, 0, 0, -1 }, - { 0x0, 0x0, 235, 2815, 773, 0, 1, 18 }, - { 0x0, 0x0, 235, 2816, 777, 0, 1, 18 }, - { 0x0, 0x0, 235, 2817, 1032, 0, 0, -1 }, - { 0x0, 0x0, 235, 2818, 789, 0, 1, 22 }, - { 0x1, 0x1, 235, 915, 1155, 27, 1, 17 }, - { 0x0, 0x0, 235, 916, 1153, 0, 1, 17 }, - { 0x0, 0x0, 235, 1220, 1157, 0, 1, 23 }, - { 0x0, 0x1, 235, 1165, 1163, 20, 1, 68 }, - { 0x0, 0x0, 235, 111, 1161, 0, 1, 68 }, - { 0x1, 0x1, 238, -1, -1, 29, 1, 0 }, - { 0x0, 0x0, 238, -1, -1, 0, 1, 0 }, - { 0x1, 0x1, 238, 3022, -1, 27, 1, 0 }, - { 0x1, 0x1, 238, 3023, -1, 27, 1, 0 }, - { 0x1, 0x1, 238, 3024, -1, 27, 1, 0 }, - { 0x1, 0x1, 238, 3025, -1, 27, 1, 0 }, - { 0x0, 0x0, 261, -1, 2344, 0, 0, -1 }, - { 0x0, 0x0, 261, -1, 2346, 0, 0, -1 }, - { 0x1, 0x1, 261, -1, -1, 28, 1, 30 }, - { 0x1, 0x1, 261, -1, -1, 28, 1, 30 }, - { 0x0, 0x0, 261, -1, 2385, 0, 0, -1 }, - { 0x0, 0x0, 261, -1, 2387, 0, 0, -1 }, - { 0x1, 0x1, 261, -1, -1, 28, 1, 30 }, - { 0x1, 0x1, 261, -1, -1, 28, 1, 30 }, - { 0x0, 0x0, 263, 23, -1, 0, 1, 0 }, - { 0x0, 0x0, 263, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 263, -1, -1, 0, 1, 0 }, - { 0x0, 0x1, 263, -1, -1, 29, 1, 0 }, - { 0x0, 0x1, 263, -1, -1, 29, 1, 0 }, - { 0x0, 0x1, 263, -1, -1, 29, 1, 0 }, - { 0x0, 0x1, 263, -1, -1, 29, 1, 0 }, - { 0x0, 0x1, 263, -1, -1, 29, 1, 0 }, - { 0x0, 0x0, 263, 180, -1, 0, 1, 0 }, - { 0x0, 0x1, 263, -1, -1, 29, 1, 0 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, 301, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, 323, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, 349, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, 371, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 65 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 65 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 65 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 65 }, - { 0x0, 0x0, 264, -1, 2296, 0, 0, -1 }, - { 0x0, 0x0, 264, -1, 2298, 0, 0, -1 }, - { 0x0, 0x0, 264, -1, 2300, 0, 0, -1 }, - { 0x0, 0x0, 264, -1, 2302, 0, 0, -1 }, - { 0x1, 0x1, 264, -1, 2304, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, 2306, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, 2308, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, 2310, 12, 1, 50 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 50 }, - { 0x0, 0x0, 264, -1, 2312, 0, 0, -1 }, - { 0x0, 0x0, 264, -1, 2314, 0, 0, -1 }, - { 0x1, 0x1, 264, -1, 2316, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, 2318, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 60 }, - { 0x0, 0x0, 264, -1, 2320, 0, 0, -1 }, - { 0x0, 0x0, 264, -1, 2322, 0, 0, -1 }, - { 0x0, 0x0, 264, -1, 2324, 0, 0, -1 }, - { 0x0, 0x0, 264, -1, 2326, 0, 0, -1 }, - { 0x1, 0x1, 264, -1, 2328, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, 2330, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, 2332, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, 2334, 12, 1, 50 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 50 }, - { 0x0, 0x0, 264, -1, 2336, 0, 0, -1 }, - { 0x0, 0x0, 264, -1, 2338, 0, 0, -1 }, - { 0x1, 0x1, 264, -1, 2340, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, 2342, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 60 }, - { 0x1, 0x1, 264, -1, -1, 12, 1, 60 }, - { 0x1, 0x1, 264, 393, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, 395, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, 517, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, 519, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, 401, -1, 12, 1, 77 }, - { 0x1, 0x1, 264, 403, -1, 12, 1, 77 }, - { 0x1, 0x1, 264, 525, -1, 12, 1, 77 }, - { 0x1, 0x1, 264, 527, -1, 12, 1, 77 }, - { 0x1, 0x1, 264, 409, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, 411, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, 533, -1, 12, 1, 2 }, - { 0x1, 0x1, 264, 535, -1, 12, 1, 2 }, - { 0x0, 0x0, 265, -1, 2303, 0, 0, -1 }, - { 0x9, 0x9, 265, -1, 2311, 33, 1, 50 }, - { 0x9, 0x9, 265, -1, 2975, 33, 1, 50 }, - { 0x0, 0x0, 265, 1399, 2376, 0, 0, -1 }, - { 0x3, 0x3, 265, 1400, -1, 27, 1, 50 }, - { 0x0, 0x0, 269, 2856, -1, 0, 1, 0 }, - { 0x3, 0x3, 270, -1, -1, 27, 1, 0 }, - { 0x3, 0x3, 270, -1, -1, 27, 1, 0 }, - { 0x3, 0x3, 270, -1, -1, 27, 1, 0 }, - { 0x3, 0x3, 270, -1, -1, 27, 1, 0 }, - { 0x1, 0x1, 271, 3018, -1, 28, 1, 0 }, - { 0x1, 0x1, 271, 3019, -1, 28, 1, 0 }, - { 0x1, 0x1, 271, 3020, -1, 28, 1, 0 }, - { 0x1, 0x1, 271, 3021, -1, 28, 1, 0 }, - { 0x1, 0x1, 273, -1, -1, 27, 1, 100 }, - { 0x1, 0x1, 273, -1, -1, 27, 1, 100 }, - { 0x0, 0x0, 273, -1, 968, 0, 0, -1 }, - { 0x0, 0x0, 274, 3031, 2833, 0, 0, -1 }, - { 0x0, 0x0, 274, 3032, 2835, 0, 0, -1 }, - { 0x0, 0x0, 275, -1, 2834, 0, 0, -1 }, - { 0x0, 0x0, 275, -1, 2836, 0, 0, -1 }, - { 0x0, 0x0, 276, -1, -1, 0, 1, 41 }, - { 0x0, 0x0, 276, -1, -1, 0, 1, 41 }, - { 0x0, 0x0, 276, -1, -1, 0, 1, 41 }, - { 0x0, 0x0, 281, -1, -1, 0, 1, 34 }, - { 0x0, 0x0, 285, -1, 2350, 0, 1, 30 }, - { 0x0, 0x0, 286, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 286, -1, -1, 0, 1, 72 }, - { 0x0, 0x0, 286, 2001, 3000, 0, 1, 1 }, - { 0x0, 0x0, 286, 2002, 3001, 0, 1, 1 }, - { 0x0, 0x0, 286, -1, 518, 0, 0, -1 }, - { 0x0, 0x0, 286, -1, 520, 0, 0, -1 }, - { 0x0, 0x0, 286, 2005, 3004, 0, 1, 76 }, - { 0x0, 0x0, 286, 2006, 3005, 0, 1, 76 }, - { 0x0, 0x0, 286, -1, 526, 0, 0, -1 }, - { 0x0, 0x0, 286, -1, 528, 0, 0, -1 }, - { 0x0, 0x0, 286, 2009, 3008, 0, 1, 1 }, - { 0x0, 0x0, 286, 2010, 3009, 0, 1, 1 }, - { 0x0, 0x0, 286, -1, 534, 0, 0, -1 }, - { 0x0, 0x0, 286, -1, 536, 0, 0, -1 }, -}; - -static const struct ia64_main_table -main_table[] = { - { 5, 1, 1, 0x0000010000000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 0, }, - { 5, 1, 1, 0x0000010008000000ull, 0x000001eff8000000ull, { 24, 25, 26, 4, 0 }, 0x0, 1, }, - { 5, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 24, 67, 27, 0, 0 }, 0x0, 2, }, - { 5, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 24, 64, 26, 0, 0 }, 0x0, 3, }, - { 6, 1, 1, 0x0000012000000000ull, 0x000001e000000000ull, { 24, 67, 27, 0, 0 }, 0x0, 4, }, - { 7, 1, 1, 0x0000010040000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 5, }, - { 7, 1, 1, 0x0000010c00000000ull, 0x000001ee00000000ull, { 24, 64, 26, 0, 0 }, 0x0, 6, }, - { 8, 1, 1, 0x0000010800000000ull, 0x000001ee00000000ull, { 24, 64, 26, 0, 0 }, 0x0, 7, }, - { 9, 3, 1, 0x0000002c00000000ull, 0x000001ee00000000ull, { 24, 3, 53, 54, 55 }, 0x221, 8, }, - { 9, 3, 1, 0x0000002c00000000ull, 0x000001ee00000000ull, { 24, 53, 54, 55, 0 }, 0x261, 9, }, - { 10, 1, 1, 0x0000010060000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 10, }, - { 10, 1, 1, 0x0000010160000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 11, }, - { 11, 1, 1, 0x0000010068000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 12, }, - { 11, 1, 1, 0x0000010168000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 13, }, - { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011ffull, { 16, 0, 0, 0, 0 }, 0x40, 969, }, - { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x0, 825, }, - { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x40, 826, }, - { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x200, 2234, }, - { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x240, 2235, }, - { 14, 4, 1, 0x0000002100000000ull, 0x000001ef00001000ull, { 15, 16, 0, 0, 0 }, 0x0, 582, }, - { 14, 4, 1, 0x0000002100000000ull, 0x000001ef00001000ull, { 15, 16, 0, 0, 0 }, 0x40, 583, }, - { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011ffull, { 82, 0, 0, 0, 0 }, 0x40, 990, }, - { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x0, 827, }, - { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x40, 828, }, - { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x210, 3029, }, - { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x250, 3030, }, - { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x30, 590, }, - { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x70, 591, }, - { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x230, 588, }, - { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x270, 589, }, - { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 15, 82, 0, 0, 0 }, 0x0, 584, }, - { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 15, 82, 0, 0, 0 }, 0x40, 585, }, - { 15, 4, 0, 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0x000001ff30000000ull, { 24, 25, 26, 42, 0 }, 0x0, 157, }, - { 196, 2, 1, 0x000000e690000000ull, 0x000001fff0000000ull, { 24, 26, 0, 0, 0 }, 0x0, 158, }, - { 198, 3, 1, 0x00000021c0000000ull, 0x000001eff8000000ull, { 24, 26, 25, 0, 0 }, 0x0, 2207, }, - { 198, 3, 1, 0x00000020c0000000ull, 0x000001eff8000000ull, { 24, 26, 49, 0, 0 }, 0x0, 2208, }, - { 198, 3, 0, 0x0000002188000000ull, 0x000001eff8000000ull, { 26, 49, 0, 0, 0 }, 0x0, 2238, }, - { 199, 2, 1, 0x000000e8b0000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 159, }, - { 200, 2, 1, 0x000000e240000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 160, }, - { 200, 2, 1, 0x000000ee50000000ull, 0x000001fff0000000ull, { 24, 25, 39, 0, 0 }, 0x0, 161, }, - { 201, 2, 1, 0x000000f040000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 162, }, - { 201, 2, 1, 0x000000fc50000000ull, 0x000001fff0000000ull, { 24, 25, 39, 0, 0 }, 0x0, 163, }, - { 202, 1, 1, 0x0000010680000000ull, 0x000001ffe0000000ull, { 24, 25, 41, 26, 0 }, 0x0, 164, }, - { 203, 2, 1, 0x000000e220000000ull, 0x000001fff0000000ull, { 24, 26, 25, 0, 0 }, 0x0, 165, }, - { 203, 2, 1, 0x000000e630000000ull, 0x000001fff0000000ull, { 24, 26, 43, 0, 0 }, 0x0, 166, }, - { 204, 2, 1, 0x000000f020000000ull, 0x000001fff0000000ull, { 24, 26, 25, 0, 0 }, 0x0, 167, }, - { 204, 2, 1, 0x000000f430000000ull, 0x000001fff0000000ull, { 24, 26, 43, 0, 0 }, 0x0, 168, }, - { 205, 1, 1, 0x00000106c0000000ull, 0x000001ffe0000000ull, { 24, 25, 41, 26, 0 }, 0x0, 169, }, - { 206, 1, 1, 0x0000010420000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 170, }, - { 207, 1, 1, 0x0000010620000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 171, }, - { 208, 1, 1, 0x0000011420000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 172, }, - { 209, 3, 0, 0x0000002048000000ull, 0x000001eff8000000ull, { 26, 25, 0, 0, 0 }, 0x8, 1175, }, - { 209, 3, 0, 0x0000002050000000ull, 0x000001eff8000000ull, { 26, 25, 0, 0, 0 }, 0xc, 1050, }, - { 209, 3, 0, 0x00000021a0000000ull, 0x000001eff8000000ull, { 26, 0, 0, 0, 0 }, 0x8, 922, }, - { 210, 3, 0, 0x0000002060000000ull, 0x000001eff8000000ull, { 26, 25, 0, 0, 0 }, 0x8, 848, }, - { 215, 4, 0, 0x0000000040000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x22c, 173, }, - { 216, 3, 0, 0x0000000038000000ull, 0x000001ee78000000ull, { 68, 0, 0, 0, 0 }, 0x8, 174, }, - { 217, 3, 0, 0x0000000028000000ull, 0x000001ee78000000ull, { 68, 0, 0, 0, 0 }, 0x0, 175, }, - { 226, 3, 1, 0x000000c708000000ull, 0x000001ffc8000000ull, { 18, 25, 0, 0, 0 }, 0x0, 2782, }, - { 227, 2, 1, 0x000000a600000000ull, 0x000001ee04000000ull, { 24, 25, 45, 0, 0 }, 0x140, 176, }, - { 227, 2, 1, 0x000000f240000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 177, }, - { 228, 1, 1, 0x0000010080000000ull, 0x000001efe0000000ull, { 24, 25, 40, 26, 0 }, 0x0, 178, }, - { 229, 1, 1, 0x00000100c0000000ull, 0x000001efe0000000ull, { 24, 25, 40, 26, 0 }, 0x0, 179, }, - { 230, 2, 1, 0x000000a400000000ull, 0x000001ee00002000ull, { 24, 26, 77, 0, 0 }, 0x140, 2878, }, - { 230, 2, 1, 0x000000f220000000ull, 0x000001fff0000000ull, { 24, 26, 25, 0, 0 }, 0x0, 181, }, - { 231, 2, 1, 0x000000ac00000000ull, 0x000001ee00000000ull, { 24, 25, 26, 44, 0 }, 0x0, 182, }, - { 236, 3, 0, 0x0000000180000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 850, }, - { 237, 3, 0, 0x0000000030000000ull, 0x000001ee78000000ull, { 68, 0, 0, 0, 0 }, 0x8, 183, }, - { 239, 3, 1, 0x0000008c00000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x0, 184, }, - { 239, 3, 1, 0x000000ac00000000ull, 0x000001eff0000000ull, { 28, 25, 62, 0, 0 }, 0x400, 185, }, - { 240, 3, 1, 0x0000008c08000000ull, 0x000001fff8000000ull, { 28, 25, 1, 0, 0 }, 0x0, 186, }, - { 240, 3, 1, 0x0000008c08000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x40, 187, }, - { 241, 3, 1, 0x0000008c40000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x0, 188, }, - { 241, 3, 1, 0x000000ac40000000ull, 0x000001eff0000000ull, { 28, 25, 62, 0, 0 }, 0x400, 189, }, - { 242, 3, 1, 0x0000008c80000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x0, 190, }, - { 242, 3, 1, 0x000000ac80000000ull, 0x000001eff0000000ull, { 28, 25, 62, 0, 0 }, 0x400, 191, }, - { 243, 3, 1, 0x0000008cc0000000ull, 0x000001fff8000000ull, { 28, 25, 0, 0, 0 }, 0x0, 192, }, - { 243, 3, 1, 0x000000acc0000000ull, 0x000001eff0000000ull, { 28, 25, 62, 0, 0 }, 0x400, 193, }, - { 244, 3, 1, 0x000000cec0000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 2785, }, - { 244, 3, 1, 0x000000eec0000000ull, 0x000001eff0000000ull, { 28, 19, 62, 0, 0 }, 0x400, 2786, }, - { 245, 3, 1, 0x000000cc40000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 194, }, - { 245, 3, 1, 0x000000ec40000000ull, 0x000001eff0000000ull, { 28, 19, 62, 0, 0 }, 0x400, 195, }, - { 246, 3, 1, 0x000000ccc0000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 196, }, - { 246, 3, 1, 0x000000ecc0000000ull, 0x000001eff0000000ull, { 28, 19, 62, 0, 0 }, 0x400, 197, }, - { 247, 3, 1, 0x000000cc00000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 198, }, - { 247, 3, 1, 0x000000ec00000000ull, 0x000001eff0000000ull, { 28, 19, 62, 0, 0 }, 0x400, 199, }, - { 248, 3, 1, 0x000000cc80000000ull, 0x000001fff8000000ull, { 28, 19, 0, 0, 0 }, 0x0, 200, }, - { 248, 3, 1, 0x000000ec80000000ull, 0x000001eff0000000ull, { 28, 19, 62, 0, 0 }, 0x400, 201, }, - { 249, 1, 1, 0x0000010028000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 202, }, - { 249, 1, 1, 0x0000010020000000ull, 0x000001eff8000000ull, { 24, 25, 26, 4, 0 }, 0x0, 203, }, - { 249, 1, 1, 0x0000010128000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 204, }, - { 250, 3, 0, 0x0000000020000000ull, 0x000001ee78000000ull, { 68, 0, 0, 0, 0 }, 0x0, 205, }, - { 251, 2, 1, 0x00000000a0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 206, }, - { 252, 2, 1, 0x00000000a8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 207, }, - { 253, 2, 1, 0x00000000b0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 208, }, - { 254, 3, 0, 0x0000000198000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 1150, }, - { 255, 3, 1, 0x00000020f8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x8, 209, }, - { 256, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 22, 23, 26, 77, 0 }, 0x0, 3040, }, - { 256, 2, 1, 0x000000a000000000ull, 0x000001fe00003000ull, { 22, 26, 77, 0, 0 }, 0x40, 3041, }, - { 256, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 23, 22, 26, 77, 0 }, 0x40, 2003, }, - { 256, 2, 1, 0x000000a000000000ull, 0x000001fe00003000ull, { 23, 26, 77, 0, 0 }, 0x40, 2004, }, - { 257, 2, 2, 0x000000a000082000ull, 0x000001fe00083000ull, { 22, 23, 50, 0, 0 }, 0x0, 3044, }, - { 257, 2, 1, 0x000000a000082000ull, 0x000001fe00083000ull, { 22, 50, 0, 0, 0 }, 0x40, 3045, }, - { 257, 2, 2, 0x000000a000082000ull, 0x000001fe00083000ull, { 23, 22, 50, 0, 0 }, 0x40, 2007, }, - { 257, 2, 1, 0x000000a000082000ull, 0x000001fe00083000ull, { 23, 50, 0, 0, 0 }, 0x40, 2008, }, - { 258, 3, 1, 0x00000020d0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 210, }, - { 259, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 22, 23, 26, 0, 0 }, 0x0, 3048, }, - { 259, 2, 1, 0x000000a000002000ull, 0x000001fe00003000ull, { 22, 26, 0, 0, 0 }, 0x40, 3049, }, - { 259, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 23, 22, 26, 0, 0 }, 0x40, 2011, }, - { 259, 2, 1, 0x000000a000002000ull, 0x000001fe00003000ull, { 23, 26, 0, 0, 0 }, 0x40, 2012, }, - { 260, 3, 1, 0x00000020f0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x8, 211, }, - { 262, 3, 1, 0x00000020d8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 212, }, - { 266, 2, 1, 0x000000e840000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1131, }, - { 267, 2, 1, 0x000000ea40000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1132, }, - { 268, 2, 1, 0x000000f840000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1133, }, - { 272, 4, 0, 0x00000000c0000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x28, 223, }, - { 277, 3, 1, 0x0000008208000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 213, }, - { 278, 3, 1, 0x0000008248000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 214, }, - { 279, 3, 1, 0x0000008288000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 215, }, - { 280, 3, 1, 0x00000082c8000000ull, 0x000001fff8000000ull, { 24, 28, 25, 0, 0 }, 0x0, 216, }, - { 282, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 1179, }, - { 282, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x40, 1261, }, - { 283, 5, 1, 0x000001d000000000ull, 0x000001fc000fe000ull, { 18, 20, 21, 0, 0 }, 0x40, 1180, }, - { 284, 1, 1, 0x0000010078000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 217, }, - { 284, 1, 1, 0x0000010178000000ull, 0x000001eff8000000ull, { 24, 56, 26, 0, 0 }, 0x0, 218, }, - { 287, 2, 1, 0x0000000080000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 219, }, - { 288, 2, 1, 0x0000000088000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 220, }, - { 289, 2, 1, 0x0000000090000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 221, }, -}; - -static const char dis_table[] = { -0xa0, 0xc7, 0xc8, 0xa0, 0x2e, 0xd8, 0xa0, 0x2c, 0xc0, 0xa0, 0x1c, 0x00, -0x98, 0xb0, 0x02, 0x50, 0x90, 0x50, 0x90, 0x28, 0x24, 0x39, 0x28, 0x24, -0x39, 0x20, 0x90, 0x28, 0x24, 0x39, 0x18, 0x24, 0x39, 0x10, 0x91, 0x60, -0x90, 0x28, 0x24, 0x39, 0x00, 0x10, 0x10, 0x58, 0x41, 0x61, 0xc7, 0xc0, -0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, -0x10, 0x10, 0x52, 0xc0, 0xc0, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, -0x10, 0x10, 0x10, 0x24, 0x24, 0x70, 0x90, 0x28, 0x24, 0x38, 0xf0, 0x24, -0x38, 0xe8, 0xa8, 0x0b, 0x48, 0x15, 0x20, 0x97, 0x20, 0x95, 0xc8, 0x9a, -0xb8, 0x05, 0x38, 0x91, 0x18, 0x90, 0xa0, 0x90, 0x60, 0x80, 0x90, 0x20, -0x34, 0xa6, 0xa4, 0x25, 0x00, 0x34, 0xa3, 0x80, 0xa4, 0x36, 0xa0, 0x36, -0xd9, 0x90, 0x50, 0x90, 0x28, 0x80, 0x36, 0xcf, 0x80, 0x34, 0x86, 0x81, -0x33, 0xe2, 0x90, 0xe0, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x24, 0x10, 0x34, -0x83, 0xa4, 0x1f, 0x08, 0x34, 0x80, 0x90, 0x38, 0xa4, 0x38, 0xa0, 0x37, -0x1a, 0xa4, 0x38, 0x48, 0x37, 0x0e, 0x90, 0x70, 0x90, 0x38, 0xa4, 0x37, -0x20, 0x36, 0xef, 0xa4, 0x36, 0xf8, 0x36, 0xea, 0x80, 0xa4, 0x23, 0xf0, -0x34, 0x7f, 0x92, 0x18, 0x91, 0xc0, 0x80, 0x91, 0x80, 0x90, 0xf8, 0xdb, -0x84, 0x60, 0xf9, 0x40, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x68, 0x8c, 0x43, -0xc8, 0x84, 0x38, 0x83, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x58, 0x8c, 0x43, -0xa8, 0x84, 0x38, 0x81, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38, -0x35, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x33, 0xa4, 0x1f, 0x18, 0x33, 0xe4, -0x80, 0x90, 0x28, 0x80, 0x33, 0xe0, 0x80, 0x34, 0x88, 0x81, 0x90, 0x38, -0xa4, 0x24, 0x80, 0x34, 0x8b, 0xa4, 0x24, 0x48, 0x34, 0x85, 0xc0, 0x40, -0x10, 0x10, 0x90, 0x38, 0xa4, 0x1e, 0xf0, 0x33, 0xdf, 0xa4, 0x1e, 0xe0, -0x33, 0xdd, 0x18, 0x24, 0x24, 0xf8, 0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0, -0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x38, 0x38, 0x6d, 0xc0, 0xc0, 0x80, 0xa4, -0x42, 0x28, 0x38, 0x69, 0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38, -0x2f, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x2d, 0x92, 0xb8, 0x99, 0x84, 0x24, -0x68, 0x90, 0x78, 0x90, 0x50, 0x10, 0x10, 0x80, 0xa4, 0x36, 0x98, 0x36, -0xd8, 0x82, 0x36, 0xce, 0x90, 0x80, 0x10, 0x10, 0x90, 0x38, 0xa4, 0x38, -0x98, 0x37, 0x19, 0xa4, 0x38, 0x40, 0x37, 0x0d, 0x80, 0x90, 0x38, 0xa4, -0x37, 0x18, 0x36, 0xee, 0xa4, 0x36, 0xf0, 0x36, 0xe9, 0x83, 0x90, 0xa8, -0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, 0x42, 0x08, 0x38, 0x61, 0xc0, -0xc0, 0x80, 0xa4, 0x41, 0xf8, 0x38, 0x5d, 0xd3, 0x82, 0x40, 0x50, 0xc0, -0xc0, 0x81, 0x38, 0x29, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x27, 0x18, 0x24, -0x24, 0x78, 0x83, 0x90, 0xa8, 0xd3, 0x82, 0xc0, 0xc0, 0xc0, 0x80, 0xa4, -0x41, 0xd8, 0x38, 0x55, 0xc0, 0xc0, 0x80, 0xa4, 0x41, 0xc8, 0x38, 0x51, -0xd3, 0x82, 0x40, 0x50, 0xc0, 0xc0, 0x81, 0x38, 0x23, 0x50, 0xc0, 0xc0, -0x81, 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0x85, 0x34, 0xd2, 0x90, 0x48, 0xcb, 0xa1, -0x30, 0x80, 0x85, 0x34, 0xd1, 0xcb, 0xa1, 0x30, 0x40, 0x85, 0x34, 0xd0, -0x92, 0x20, 0x91, 0x30, 0x90, 0xb8, 0xd5, 0x03, 0x00, 0xc0, 0xc0, 0x81, -0x8c, 0x01, 0xa0, 0x84, 0x30, 0x3e, 0xc0, 0xc0, 0x81, 0x8c, 0x01, 0x80, -0x84, 0x30, 0x3c, 0xd5, 0x02, 0x00, 0xc0, 0xc0, 0x81, 0x30, 0x28, 0xc0, -0xc0, 0x81, 0x30, 0x24, 0x90, 0x78, 0xd5, 0x02, 0x00, 0xc0, 0xc0, 0x81, -0x30, 0x1c, 0xc0, 0xc0, 0x81, 0x30, 0x18, 0xd5, 0x02, 0x00, 0xc0, 0xc0, -0x81, 0x30, 0x10, 0xc0, 0xc0, 0x81, 0x30, 0x0c, 0x91, 0x70, 0x90, 0xd8, -0xd5, 0x03, 0x80, 0xc8, 0xe2, 0x40, 0xc0, 0x81, 0x8c, 0x01, 0xc0, 0x84, -0x30, 0x40, 0xc8, 0xe2, 0x42, 0xc0, 0x81, 0x8c, 0x01, 0x90, 0x84, 0x30, -0x3d, 0xd5, 0x02, 0x80, 0xc8, 0xe2, 0x3f, 0xc0, 0x81, 0x30, 0x2c, 0xc8, -0xe2, 0x3a, 0x40, 0x81, 0x30, 0x26, 0x90, 0x98, 0xd5, 0x02, 0x80, 0xc8, -0xe2, 0x2f, 0x40, 0x81, 0x30, 0x20, 0xc8, 0xe2, 0x31, 0x40, 0x81, 0x30, -0x1a, 0xd5, 0x02, 0x80, 0xc8, 0xe2, 0x2e, 0x40, 0x81, 0x30, 0x14, 0xc8, -0xe2, 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0xc0, 0x30, 0x04, -0xe5, 0x20, 0x00, 0x00, 0x30, 0x01, 0x90, 0x80, 0x90, 0x40, 0xe5, 0x22, -0x35, 0xc0, 0x38, 0xcd, 0xe5, 0x22, 0x38, 0x00, 0x38, 0xf5, 0x90, 0x40, -0xe5, 0x22, 0x24, 0x40, 0x38, 0x87, 0xe5, 0x22, 0x26, 0x80, 0x38, 0xaf, -0x80, 0x99, 0x28, 0x02, 0xf0, 0x8c, 0x25, 0x48, 0x90, 0x80, 0x90, 0x40, -0xe5, 0x22, 0x8c, 0xc0, 0x3a, 0x2f, 0xe5, 0x22, 0x89, 0xc0, 0x3a, 0x3b, -0x90, 0x40, 0xe5, 0x22, 0x7c, 0xc0, 0x39, 0xef, 0xe5, 0x22, 0x79, 0xc0, -0x39, 0xfb, 0x91, 0x48, 0x90, 0xc8, 0x98, 0x50, 0x00, 0x80, 0xe5, 0x22, -0x6a, 0xc0, 0x39, 0xc3, 0xe5, 0x22, 0x5e, 0xc0, 0x39, 0x93, 0xcb, 0x61, -0x2b, 0x00, 0x85, 0x34, 0xb0, 0x90, 0x40, 0xe5, 0x22, 0x52, 0xc0, 0x39, -0x63, 0xe5, 0x22, 0x46, 0xc0, 0x39, 0x33, 0x90, 0x48, 0xcb, 0xa1, 0x2a, -0x80, 0x85, 0x34, 0xae, 0xcb, 0xa1, 0x2a, 0xc0, 0x85, 0x34, 0xaf, 0x10, -0x10, 0x90, 0x80, 0x90, 0x40, 0xe5, 0x22, 0x3c, 0x40, 0x38, 0xed, 0xe5, -0x22, 0x39, 0x40, 0x38, 0xfb, 0x90, 0x40, 0xe5, 0x22, 0x2a, 0xc0, 0x38, -0xa7, 0xe5, 0x22, 0x27, 0xc0, 0x38, 0xb5, -}; - -static const struct ia64_dis_names ia64_dis_names[] = { -{ 0x51, 41, 0, 10 }, -{ 0x31, 41, 1, 20 }, -{ 0x11, 42, 0, 19 }, -{ 0x29, 41, 0, 12 }, -{ 0x19, 41, 1, 24 }, -{ 0x9, 42, 0, 23 }, -{ 0x15, 41, 0, 14 }, -{ 0xd, 41, 1, 28 }, -{ 0x5, 42, 0, 27 }, -{ 0xb, 41, 0, 16 }, -{ 0x7, 41, 1, 32 }, -{ 0x3, 42, 0, 31 }, -{ 0x51, 39, 1, 58 }, -{ 0x50, 39, 0, 34 }, -{ 0xd1, 39, 1, 57 }, -{ 0xd0, 39, 0, 33 }, -{ 0x31, 39, 1, 68 }, -{ 0x30, 39, 1, 44 }, -{ 0x11, 40, 1, 67 }, -{ 0x10, 40, 0, 43 }, -{ 0x71, 39, 1, 66 }, -{ 0x70, 39, 1, 42 }, -{ 0x31, 40, 1, 65 }, -{ 0x30, 40, 0, 41 }, -{ 0x29, 39, 1, 60 }, -{ 0x28, 39, 0, 36 }, -{ 0x69, 39, 1, 59 }, -{ 0x68, 39, 0, 35 }, -{ 0x19, 39, 1, 72 }, -{ 0x18, 39, 1, 48 }, -{ 0x9, 40, 1, 71 }, -{ 0x8, 40, 0, 47 }, -{ 0x39, 39, 1, 70 }, -{ 0x38, 39, 1, 46 }, -{ 0x19, 40, 1, 69 }, -{ 0x18, 40, 0, 45 }, -{ 0x15, 39, 1, 62 }, -{ 0x14, 39, 0, 38 }, -{ 0x35, 39, 1, 61 }, -{ 0x34, 39, 0, 37 }, -{ 0xd, 39, 1, 76 }, -{ 0xc, 39, 1, 52 }, -{ 0x5, 40, 1, 75 }, -{ 0x4, 40, 0, 51 }, -{ 0x1d, 39, 1, 74 }, -{ 0x1c, 39, 1, 50 }, -{ 0xd, 40, 1, 73 }, -{ 0xc, 40, 0, 49 }, -{ 0xb, 39, 1, 64 }, -{ 0xa, 39, 0, 40 }, -{ 0x1b, 39, 1, 63 }, -{ 0x1a, 39, 0, 39 }, -{ 0x7, 39, 1, 80 }, -{ 0x6, 39, 1, 56 }, -{ 0x3, 40, 1, 79 }, -{ 0x2, 40, 0, 55 }, -{ 0xf, 39, 1, 78 }, -{ 0xe, 39, 1, 54 }, -{ 0x7, 40, 1, 77 }, -{ 0x6, 40, 0, 53 }, -{ 0x8, 38, 0, 82 }, -{ 0x18, 38, 0, 81 }, -{ 0x1, 38, 1, 86 }, -{ 0x2, 38, 0, 85 }, -{ 0x3, 38, 1, 84 }, -{ 0x4, 38, 0, 83 }, -{ 0x1, 336, 0, 87 }, -{ 0x20, 289, 0, 98 }, -{ 0x220, 289, 0, 94 }, -{ 0x1220, 289, 0, 91 }, -{ 0xa20, 289, 0, 92 }, -{ 0x620, 289, 0, 93 }, -{ 0x120, 289, 0, 95 }, -{ 0xa0, 289, 0, 96 }, -{ 0x60, 289, 0, 97 }, -{ 0x10, 289, 0, 102 }, -{ 0x90, 289, 0, 99 }, -{ 0x50, 289, 0, 100 }, -{ 0x30, 289, 0, 101 }, -{ 0x8, 289, 0, 103 }, -{ 0x4, 289, 0, 104 }, -{ 0x2, 289, 0, 105 }, -{ 0x1, 289, 0, 106 }, -{ 0x1, 411, 0, 108 }, -{ 0x3, 411, 0, 107 }, -{ 0x2, 417, 0, 109 }, -{ 0x1, 417, 0, 110 }, -{ 0x2, 413, 0, 111 }, -{ 0x1, 413, 0, 112 }, -{ 0x2, 415, 0, 113 }, -{ 0x1, 415, 0, 114 }, -{ 0x2, 419, 0, 115 }, -{ 0x1, 419, 0, 116 }, -{ 0x1, 268, 0, 143 }, -{ 0x5, 268, 0, 141 }, -{ 0x3, 268, 0, 142 }, -{ 0x140, 277, 0, 119 }, -{ 0x540, 277, 0, 117 }, -{ 0x340, 277, 0, 118 }, -{ 0xc0, 277, 0, 131 }, -{ 0x2c0, 277, 0, 129 }, -{ 0x1c0, 277, 0, 130 }, -{ 0x20, 277, 0, 146 }, -{ 0xa0, 277, 0, 144 }, -{ 0x60, 277, 0, 145 }, -{ 0x10, 277, 0, 158 }, -{ 0x50, 277, 0, 156 }, -{ 0x30, 277, 0, 157 }, -{ 0x8, 277, 0, 170 }, -{ 0x28, 277, 0, 168 }, -{ 0x18, 277, 0, 169 }, -{ 0x4, 277, 0, 180 }, -{ 0x2, 277, 0, 181 }, -{ 0x1, 277, 0, 182 }, -{ 0x140, 271, 0, 122 }, -{ 0x540, 271, 0, 120 }, -{ 0x340, 271, 0, 121 }, -{ 0xc0, 271, 0, 134 }, -{ 0x2c0, 271, 0, 132 }, -{ 0x1c0, 271, 0, 133 }, -{ 0x20, 271, 0, 149 }, -{ 0xa0, 271, 0, 147 }, -{ 0x60, 271, 0, 148 }, -{ 0x10, 271, 0, 161 }, -{ 0x50, 271, 0, 159 }, -{ 0x30, 271, 0, 160 }, -{ 0x8, 271, 0, 173 }, -{ 0x28, 271, 0, 171 }, -{ 0x18, 271, 0, 172 }, -{ 0x4, 271, 0, 183 }, -{ 0x2, 271, 0, 184 }, -{ 0x1, 271, 0, 185 }, -{ 0x140, 274, 0, 125 }, -{ 0x540, 274, 0, 123 }, -{ 0x340, 274, 0, 124 }, -{ 0xc0, 274, 0, 137 }, -{ 0x2c0, 274, 0, 135 }, -{ 0x1c0, 274, 0, 136 }, -{ 0x20, 274, 0, 152 }, -{ 0xa0, 274, 0, 150 }, -{ 0x60, 274, 0, 151 }, -{ 0x10, 274, 0, 164 }, -{ 0x50, 274, 0, 162 }, -{ 0x30, 274, 0, 163 }, -{ 0x8, 274, 0, 176 }, -{ 0x28, 274, 0, 174 }, -{ 0x18, 274, 0, 175 }, -{ 0x4, 274, 0, 186 }, -{ 0x2, 274, 0, 187 }, -{ 0x1, 274, 0, 188 }, -{ 0x140, 286, 0, 128 }, -{ 0x540, 286, 0, 126 }, -{ 0x340, 286, 0, 127 }, -{ 0xc0, 286, 0, 140 }, -{ 0x2c0, 286, 0, 138 }, -{ 0x1c0, 286, 0, 139 }, -{ 0x20, 286, 0, 155 }, -{ 0xa0, 286, 0, 153 }, -{ 0x60, 286, 0, 154 }, -{ 0x10, 286, 0, 167 }, -{ 0x50, 286, 0, 165 }, -{ 0x30, 286, 0, 166 }, -{ 0x8, 286, 0, 179 }, -{ 0x28, 286, 0, 177 }, -{ 0x18, 286, 0, 178 }, -{ 0x4, 286, 0, 189 }, -{ 0x2, 286, 0, 190 }, -{ 0x1, 286, 0, 191 }, -{ 0x8, 390, 0, 192 }, -{ 0x4, 390, 0, 193 }, -{ 0x2, 390, 0, 194 }, -{ 0x1, 390, 0, 195 }, -{ 0x20, 288, 0, 203 }, -{ 0x220, 288, 0, 199 }, -{ 0x1220, 288, 0, 196 }, -{ 0xa20, 288, 0, 197 }, -{ 0x620, 288, 0, 198 }, -{ 0x120, 288, 0, 200 }, -{ 0xa0, 288, 0, 201 }, -{ 0x60, 288, 0, 202 }, -{ 0x10, 288, 0, 207 }, -{ 0x90, 288, 0, 204 }, -{ 0x50, 288, 0, 205 }, -{ 0x30, 288, 0, 206 }, -{ 0x8, 288, 0, 208 }, -{ 0x4, 288, 0, 209 }, -{ 0x2, 288, 0, 210 }, -{ 0x1, 288, 0, 211 }, -{ 0x20, 287, 0, 219 }, -{ 0x220, 287, 0, 215 }, -{ 0x1220, 287, 0, 212 }, -{ 0xa20, 287, 0, 213 }, -{ 0x620, 287, 0, 214 }, -{ 0x120, 287, 0, 216 }, -{ 0xa0, 287, 0, 217 }, -{ 0x60, 287, 0, 218 }, -{ 0x10, 287, 0, 223 }, -{ 0x90, 287, 0, 220 }, -{ 0x50, 287, 0, 221 }, -{ 0x30, 287, 0, 222 }, -{ 0x8, 287, 0, 224 }, -{ 0x4, 287, 0, 225 }, -{ 0x2, 287, 0, 226 }, -{ 0x1, 287, 0, 227 }, -{ 0x140, 279, 0, 230 }, -{ 0x540, 279, 0, 228 }, -{ 0x340, 279, 0, 229 }, -{ 0xc0, 279, 0, 239 }, -{ 0x2c0, 279, 0, 237 }, -{ 0x1c0, 279, 0, 238 }, -{ 0x20, 279, 0, 248 }, -{ 0xa0, 279, 0, 246 }, -{ 0x60, 279, 0, 247 }, -{ 0x10, 279, 0, 257 }, -{ 0x50, 279, 0, 255 }, -{ 0x30, 279, 0, 256 }, -{ 0x8, 279, 0, 266 }, -{ 0x28, 279, 0, 264 }, -{ 0x18, 279, 0, 265 }, -{ 0x4, 279, 0, 273 }, -{ 0x2, 279, 0, 274 }, -{ 0x1, 279, 0, 275 }, -{ 0x140, 281, 0, 233 }, -{ 0x540, 281, 0, 231 }, -{ 0x340, 281, 0, 232 }, -{ 0xc0, 281, 0, 242 }, -{ 0x2c0, 281, 0, 240 }, -{ 0x1c0, 281, 0, 241 }, -{ 0x20, 281, 0, 251 }, -{ 0xa0, 281, 0, 249 }, -{ 0x60, 281, 0, 250 }, -{ 0x10, 281, 0, 260 }, -{ 0x50, 281, 0, 258 }, -{ 0x30, 281, 0, 259 }, -{ 0x8, 281, 0, 269 }, -{ 0x28, 281, 0, 267 }, -{ 0x18, 281, 0, 268 }, -{ 0x4, 281, 0, 276 }, -{ 0x2, 281, 0, 277 }, -{ 0x1, 281, 0, 278 }, -{ 0x140, 283, 0, 236 }, -{ 0x540, 283, 0, 234 }, -{ 0x340, 283, 0, 235 }, -{ 0xc0, 283, 0, 245 }, -{ 0x2c0, 283, 0, 243 }, -{ 0x1c0, 283, 0, 244 }, -{ 0x20, 283, 0, 254 }, -{ 0xa0, 283, 0, 252 }, -{ 0x60, 283, 0, 253 }, -{ 0x10, 283, 0, 263 }, -{ 0x50, 283, 0, 261 }, -{ 0x30, 283, 0, 262 }, -{ 0x8, 283, 0, 272 }, -{ 0x28, 283, 0, 270 }, -{ 0x18, 283, 0, 271 }, -{ 0x4, 283, 0, 279 }, -{ 0x2, 283, 0, 280 }, -{ 0x1, 283, 0, 281 }, -{ 0x140, 278, 0, 284 }, -{ 0x540, 278, 0, 282 }, -{ 0x340, 278, 0, 283 }, -{ 0xc0, 278, 0, 293 }, -{ 0x2c0, 278, 0, 291 }, -{ 0x1c0, 278, 0, 292 }, -{ 0x20, 278, 0, 302 }, -{ 0xa0, 278, 0, 300 }, -{ 0x60, 278, 0, 301 }, -{ 0x10, 278, 0, 311 }, -{ 0x50, 278, 0, 309 }, -{ 0x30, 278, 0, 310 }, -{ 0x8, 278, 0, 320 }, -{ 0x28, 278, 0, 318 }, -{ 0x18, 278, 0, 319 }, -{ 0x4, 278, 0, 327 }, -{ 0x2, 278, 0, 328 }, -{ 0x1, 278, 0, 329 }, -{ 0x140, 280, 0, 287 }, -{ 0x540, 280, 0, 285 }, -{ 0x340, 280, 0, 286 }, -{ 0xc0, 280, 0, 296 }, -{ 0x2c0, 280, 0, 294 }, -{ 0x1c0, 280, 0, 295 }, -{ 0x20, 280, 0, 305 }, -{ 0xa0, 280, 0, 303 }, -{ 0x60, 280, 0, 304 }, -{ 0x10, 280, 0, 314 }, -{ 0x50, 280, 0, 312 }, -{ 0x30, 280, 0, 313 }, -{ 0x8, 280, 0, 323 }, -{ 0x28, 280, 0, 321 }, -{ 0x18, 280, 0, 322 }, -{ 0x4, 280, 0, 330 }, -{ 0x2, 280, 0, 331 }, -{ 0x1, 280, 0, 332 }, -{ 0x140, 282, 0, 290 }, -{ 0x540, 282, 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0, 2424 }, -{ 0x34, 62, 1, 2284 }, -{ 0x64, 63, 1, 2283 }, -{ 0x64, 64, 1, 2282 }, -{ 0x64, 65, 1, 2281 }, -{ 0x1c, 81, 1, 2280 }, -{ 0x1c, 82, 1, 2279 }, -{ 0x1c, 83, 1, 2278 }, -{ 0x1c, 84, 0, 2277 }, -{ 0xc, 62, 1, 2588 }, -{ 0xc, 63, 1, 2587 }, -{ 0x18, 63, 1, 2583 }, -{ 0xc, 64, 1, 2586 }, -{ 0x18, 64, 1, 2582 }, -{ 0xc, 65, 1, 2585 }, -{ 0x18, 65, 1, 2581 }, -{ 0xc, 66, 0, 2584 }, -{ 0xa, 62, 1, 2436 }, -{ 0x11, 63, 1, 2431 }, -{ 0x22, 63, 1, 2435 }, -{ 0x11, 64, 1, 2430 }, -{ 0x22, 64, 1, 2434 }, -{ 0x11, 65, 1, 2429 }, -{ 0x22, 65, 1, 2433 }, -{ 0xa, 66, 0, 2432 }, -{ 0x1a, 62, 1, 2292 }, -{ 0x62, 63, 1, 2291 }, -{ 0x62, 64, 1, 2290 }, -{ 0x62, 65, 1, 2289 }, -{ 0xe, 81, 1, 2288 }, -{ 0xe, 82, 1, 2287 }, -{ 0xe, 83, 1, 2286 }, -{ 0xe, 84, 0, 2285 }, -{ 0x6, 62, 1, 2596 }, -{ 0x5, 63, 1, 2591 }, -{ 0xa, 63, 1, 2595 }, -{ 0x5, 64, 1, 2590 }, -{ 0xa, 64, 1, 2594 }, -{ 0x5, 65, 1, 2589 }, -{ 0xa, 65, 1, 2593 }, -{ 0x6, 66, 0, 2592 }, -{ 0x5, 62, 1, 2444 }, -{ 0x9, 63, 1, 2443 }, -{ 0x12, 63, 1, 2439 }, -{ 0x9, 64, 1, 2442 }, -{ 0x12, 64, 1, 2438 }, -{ 0x9, 65, 1, 2441 }, -{ 0x12, 65, 1, 2437 }, -{ 0x5, 66, 0, 2440 }, -{ 0xd, 62, 1, 2300 }, -{ 0x19, 63, 1, 2299 }, -{ 0x19, 64, 1, 2298 }, -{ 0x19, 65, 1, 2297 }, -{ 0x7, 81, 1, 2296 }, -{ 0x7, 82, 1, 2295 }, -{ 0x7, 83, 1, 2294 }, -{ 0x7, 84, 0, 2293 }, -{ 0x3, 62, 1, 2604 }, -{ 0x3, 63, 1, 2603 }, -{ 0x6, 63, 1, 2599 }, -{ 0x3, 64, 1, 2602 }, -{ 0x6, 64, 1, 2598 }, -{ 0x3, 65, 1, 2601 }, -{ 0x6, 65, 1, 2597 }, -{ 0x3, 66, 0, 2600 }, -{ 0x8, 86, 1, 2468 }, -{ 0x8, 87, 1, 2467 }, -{ 0x2, 88, 1, 2466 }, -{ 0x2, 89, 1, 2465 }, -{ 0x2, 90, 1, 2464 }, -{ 0x2, 91, 1, 2463 }, -{ 0x2, 92, 1, 2462 }, -{ 0x2, 93, 0, 2461 }, -{ 0x18, 86, 1, 2460 }, -{ 0x18, 87, 1, 2459 }, -{ 0x6, 88, 1, 2458 }, -{ 0x6, 89, 1, 2457 }, -{ 0x6, 90, 1, 2456 }, -{ 0x6, 91, 1, 2455 }, -{ 0x6, 92, 1, 2454 }, -{ 0x6, 93, 0, 2453 }, -{ 0x14, 86, 1, 2448 }, -{ 0x22, 87, 1, 2445 }, -{ 0x44, 87, 1, 2447 }, -{ 0xa, 94, 0, 2446 }, -{ 0x34, 86, 1, 2304 }, -{ 0xc4, 87, 1, 2303 }, -{ 0x38, 93, 1, 2301 }, -{ 0xe, 117, 0, 2302 }, -{ 0xc, 86, 1, 2608 }, -{ 0xa, 87, 1, 2605 }, -{ 0x14, 87, 1, 2607 }, -{ 0x6, 94, 0, 2606 }, -{ 0x2, 86, 1, 2316 }, -{ 0x2, 87, 1, 2315 }, -{ 0x4, 92, 1, 2314 }, -{ 0x4, 93, 0, 2313 }, -{ 0x12, 86, 1, 2312 }, -{ 0x42, 87, 1, 2311 }, -{ 0xc, 92, 1, 2310 }, -{ 0xc, 93, 0, 2309 }, -{ 0xa, 86, 1, 2452 }, -{ 0x12, 87, 1, 2451 }, -{ 0x24, 87, 1, 2449 }, -{ 0x5, 94, 0, 2450 }, -{ 0x1a, 86, 1, 2308 }, -{ 0x32, 87, 1, 2307 }, -{ 0x34, 93, 1, 2305 }, -{ 0x7, 117, 0, 2306 }, -{ 0x6, 86, 1, 2612 }, -{ 0x6, 87, 1, 2611 }, -{ 0xc, 87, 1, 2609 }, -{ 0x3, 94, 0, 2610 }, -{ 0x1, 86, 1, 2628 }, -{ 0x1, 87, 1, 2627 }, -{ 0x1, 88, 1, 2626 }, -{ 0x1, 89, 1, 2625 }, -{ 0x1, 90, 1, 2624 }, -{ 0x1, 91, 1, 2623 }, -{ 0x1, 92, 1, 2622 }, -{ 0x1, 93, 0, 2621 }, -{ 0x3, 86, 1, 2620 }, -{ 0x3, 87, 1, 2619 }, -{ 0x3, 88, 1, 2618 }, -{ 0x3, 89, 1, 2617 }, -{ 0x3, 90, 1, 2616 }, -{ 0x3, 91, 1, 2615 }, -{ 0x3, 92, 1, 2614 }, -{ 0x3, 93, 0, 2613 }, -{ 0x8, 53, 1, 2492 }, -{ 0x8, 54, 1, 2491 }, -{ 0x2, 55, 1, 2490 }, -{ 0x2, 56, 1, 2489 }, -{ 0x2, 57, 1, 2488 }, -{ 0x2, 58, 1, 2487 }, -{ 0x2, 59, 1, 2486 }, -{ 0x2, 60, 0, 2485 }, -{ 0x18, 53, 1, 2484 }, -{ 0x18, 54, 1, 2483 }, -{ 0x6, 55, 1, 2482 }, -{ 0x6, 56, 1, 2481 }, -{ 0x6, 57, 1, 2480 }, -{ 0x6, 58, 1, 2479 }, -{ 0x6, 59, 1, 2478 }, -{ 0x6, 60, 0, 2477 }, -{ 0x14, 53, 1, 2472 }, -{ 0x22, 54, 1, 2469 }, -{ 0x44, 54, 1, 2471 }, -{ 0xa, 61, 0, 2470 }, -{ 0x34, 53, 1, 2320 }, -{ 0xc4, 54, 1, 2319 }, -{ 0x38, 60, 1, 2317 }, -{ 0xe, 80, 0, 2318 }, -{ 0xc, 53, 1, 2632 }, -{ 0xa, 54, 1, 2629 }, -{ 0x14, 54, 1, 2631 }, -{ 0x6, 61, 0, 2630 }, -{ 0x2, 53, 1, 2332 }, -{ 0x2, 54, 1, 2331 }, -{ 0x4, 59, 1, 2330 }, -{ 0x4, 60, 0, 2329 }, -{ 0x12, 53, 1, 2328 }, -{ 0x42, 54, 1, 2327 }, -{ 0xc, 59, 1, 2326 }, -{ 0xc, 60, 0, 2325 }, -{ 0xa, 53, 1, 2476 }, -{ 0x12, 54, 1, 2475 }, -{ 0x24, 54, 1, 2473 }, -{ 0x5, 61, 0, 2474 }, -{ 0x1a, 53, 1, 2324 }, -{ 0x32, 54, 1, 2323 }, -{ 0x34, 60, 1, 2321 }, -{ 0x7, 80, 0, 2322 }, -{ 0x6, 53, 1, 2636 }, -{ 0x6, 54, 1, 2635 }, -{ 0xc, 54, 1, 2633 }, -{ 0x3, 61, 0, 2634 }, -{ 0x1, 53, 1, 2652 }, -{ 0x1, 54, 1, 2651 }, -{ 0x1, 55, 1, 2650 }, -{ 0x1, 56, 1, 2649 }, -{ 0x1, 57, 1, 2648 }, -{ 0x1, 58, 1, 2647 }, -{ 0x1, 59, 1, 2646 }, -{ 0x1, 60, 0, 2645 }, -{ 0x3, 53, 1, 2644 }, -{ 0x3, 54, 1, 2643 }, -{ 0x3, 55, 1, 2642 }, -{ 0x3, 56, 1, 2641 }, -{ 0x3, 57, 1, 2640 }, -{ 0x3, 58, 1, 2639 }, -{ 0x3, 59, 1, 2638 }, -{ 0x3, 60, 0, 2637 }, -{ 0x1, 4, 0, 2653 }, -{ 0x1, 296, 0, 2654 }, -{ 0x1, 379, 0, 2655 }, -{ 0x1, 374, 0, 2656 }, -{ 0x2, 358, 0, 2657 }, -{ 0x1, 358, 0, 2660 }, -{ 0x2, 357, 0, 2658 }, -{ 0x1, 357, 0, 2661 }, -{ 0x2, 356, 0, 2659 }, -{ 0x1, 356, 0, 2662 }, -{ 0x1, 355, 0, 2663 }, -{ 0x1, 354, 0, 2664 }, -{ 0x2, 353, 0, 2665 }, -{ 0x1, 353, 0, 2667 }, -{ 0x2, 352, 0, 2666 }, -{ 0x1, 352, 0, 2668 }, -{ 0x1, 382, 0, 2675 }, -{ 0x8, 381, 0, 2669 }, -{ 0x4, 381, 0, 2671 }, -{ 0x2, 381, 0, 2673 }, -{ 0x1, 381, 0, 2676 }, -{ 0x8, 380, 0, 2670 }, -{ 0x4, 380, 0, 2672 }, -{ 0x2, 380, 0, 2674 }, -{ 0x1, 380, 0, 2677 }, -{ 0x1, 351, 0, 2684 }, -{ 0x8, 350, 0, 2678 }, -{ 0x4, 350, 0, 2680 }, -{ 0x2, 350, 0, 2682 }, -{ 0x1, 350, 0, 2685 }, -{ 0x8, 349, 0, 2679 }, -{ 0x4, 349, 0, 2681 }, -{ 0x2, 349, 1, 2683 }, -{ 0x4, 143, 0, 1377 }, -{ 0x1, 349, 0, 2686 }, -{ 0x1, 6, 0, 2687 }, -{ 0x1, 7, 0, 2688 }, -{ 0x1, 295, 0, 2689 }, -{ 0x1, 456, 0, 2690 }, -{ 0x1, 346, 0, 2691 }, -{ 0x1, 13, 0, 2692 }, -{ 0x1, 11, 0, 2693 }, -{ 0x1, 422, 0, 2694 }, -{ 0x1, 394, 0, 2695 }, -{ 0x1, 393, 0, 2696 }, -{ 0x1, 455, 0, 2697 }, -{ 0x1, 345, 0, 2698 }, -{ 0x1, 12, 0, 2699 }, -{ 0x1, 10, 0, 2700 }, -{ 0x1, 5, 0, 2701 }, -{ 0x1, 421, 0, 2702 }, -{ 0x1, 420, 0, 2703 }, -{ 0x1, 1, 0, 2704 }, -{ 0x1, 0, 0, 2705 }, -}; - - -/* ia64-opc.c -- Functions to access the compacted opcode table - Copyright 1999, 2000, 2001, 2003, 2005 Free Software Foundation, Inc. - Written by Bob Manson of Cygnus Solutions, <manson@cygnus.com> - - This file is part of GDB, GAS, and the GNU binutils. - - GDB, GAS, and the GNU binutils are free software; you can redistribute - them and/or modify them under the terms of the GNU General Public - License as published by the Free Software Foundation; either version - 2, or (at your option) any later version. - - GDB, GAS, and the GNU binutils are distributed in the hope that they - will be useful, but WITHOUT ANY WARRANTY; without even the implied - warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See - the GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this file; see the file COPYING. If not, see - <http://www.gnu.org/licenses/>. */ - -static const struct ia64_templ_desc ia64_templ_desc[16] = - { - { 0, { IA64_UNIT_M, IA64_UNIT_I, IA64_UNIT_I }, "MII" }, /* 0 */ - { 2, { IA64_UNIT_M, IA64_UNIT_I, IA64_UNIT_I }, "MII" }, - { 0, { IA64_UNIT_M, IA64_UNIT_L, IA64_UNIT_X }, "MLX" }, - { 0, { 0, }, "-3-" }, - { 0, { IA64_UNIT_M, IA64_UNIT_M, IA64_UNIT_I }, "MMI" }, /* 4 */ - { 1, { IA64_UNIT_M, IA64_UNIT_M, IA64_UNIT_I }, "MMI" }, - { 0, { IA64_UNIT_M, IA64_UNIT_F, IA64_UNIT_I }, "MFI" }, - { 0, { IA64_UNIT_M, IA64_UNIT_M, IA64_UNIT_F }, "MMF" }, - { 0, { IA64_UNIT_M, IA64_UNIT_I, IA64_UNIT_B }, "MIB" }, /* 8 */ - { 0, { IA64_UNIT_M, IA64_UNIT_B, IA64_UNIT_B }, "MBB" }, - { 0, { 0, }, "-a-" }, - { 0, { IA64_UNIT_B, IA64_UNIT_B, IA64_UNIT_B }, "BBB" }, - { 0, { IA64_UNIT_M, IA64_UNIT_M, IA64_UNIT_B }, "MMB" }, /* c */ - { 0, { 0, }, "-d-" }, - { 0, { IA64_UNIT_M, IA64_UNIT_F, IA64_UNIT_B }, "MFB" }, - { 0, { 0, }, "-f-" }, - }; - -/* Apply the completer referred to by COMPLETER_INDEX to OPCODE, and - return the result. */ - -static ia64_insn -apply_completer (ia64_insn opcode, int completer_index) -{ - ia64_insn mask = completer_table[completer_index].mask; - ia64_insn bits = completer_table[completer_index].bits; - int shiftamt = (completer_table[completer_index].offset & 63); - - mask = mask << shiftamt; - bits = bits << shiftamt; - opcode = (opcode & ~mask) | bits; - return opcode; -} - -/* Extract BITS number of bits starting from OP_POINTER + BITOFFSET in - the dis_table array, and return its value. (BITOFFSET is numbered - starting from MSB to LSB, so a BITOFFSET of 0 indicates the MSB of the - first byte in OP_POINTER.) */ - -static int -extract_op_bits (int op_pointer, int bitoffset, int bits) -{ - int res = 0; - - op_pointer += (bitoffset / 8); - - if (bitoffset % 8) - { - unsigned int op = dis_table[op_pointer++]; - int numb = 8 - (bitoffset % 8); - int mask = (1 << numb) - 1; - int bata = (bits < numb) ? bits : numb; - int delta = numb - bata; - - res = (res << bata) | ((op & mask) >> delta); - bitoffset += bata; - bits -= bata; - } - while (bits >= 8) - { - res = (res << 8) | (dis_table[op_pointer++] & 255); - bits -= 8; - } - if (bits > 0) - { - unsigned int op = (dis_table[op_pointer++] & 255); - res = (res << bits) | (op >> (8 - bits)); - } - return res; -} - -/* Examine the state machine entry at OP_POINTER in the dis_table - array, and extract its values into OPVAL and OP. The length of the - state entry in bits is returned. */ - -static int -extract_op (int op_pointer, int *opval, unsigned int *op) -{ - int oplen = 5; - - *op = dis_table[op_pointer]; - - if ((*op) & 0x40) - { - opval[0] = extract_op_bits (op_pointer, oplen, 5); - oplen += 5; - } - switch ((*op) & 0x30) - { - case 0x10: - { - opval[1] = extract_op_bits (op_pointer, oplen, 8); - oplen += 8; - opval[1] += op_pointer; - break; - } - case 0x20: - { - opval[1] = extract_op_bits (op_pointer, oplen, 16); - if (! (opval[1] & 32768)) - { - opval[1] += op_pointer; - } - oplen += 16; - break; - } - case 0x30: - { - oplen--; - opval[2] = extract_op_bits (op_pointer, oplen, 12); - oplen += 12; - opval[2] |= 32768; - break; - } - } - if (((*op) & 0x08) && (((*op) & 0x30) != 0x30)) - { - opval[2] = extract_op_bits (op_pointer, oplen, 16); - oplen += 16; - if (! (opval[2] & 32768)) - { - opval[2] += op_pointer; - } - } - return oplen; -} - -/* Returns a non-zero value if the opcode in the main_table list at - PLACE matches OPCODE and is of type TYPE. */ - -static int -opcode_verify (ia64_insn opcode, int place, enum ia64_insn_type type) -{ - if (main_table[place].opcode_type != type) - { - return 0; - } - if (main_table[place].flags - & (IA64_OPCODE_F2_EQ_F3 | IA64_OPCODE_LEN_EQ_64MCNT)) - { - const struct ia64_operand *o1, *o2; - ia64_insn f2, f3; - - if (main_table[place].flags & IA64_OPCODE_F2_EQ_F3) - { - o1 = elf64_ia64_operands + IA64_OPND_F2; - o2 = elf64_ia64_operands + IA64_OPND_F3; - (*o1->extract) (o1, opcode, &f2); - (*o2->extract) (o2, opcode, &f3); - if (f2 != f3) - return 0; - } - else - { - ia64_insn len, count; - - /* length must equal 64-count: */ - o1 = elf64_ia64_operands + IA64_OPND_LEN6; - o2 = elf64_ia64_operands + main_table[place].operands[2]; - (*o1->extract) (o1, opcode, &len); - (*o2->extract) (o2, opcode, &count); - if (len != 64 - count) - return 0; - } - } - return 1; -} - -/* Find an instruction entry in the ia64_dis_names array that matches - opcode OPCODE and is of type TYPE. Returns either a positive index - into the array, or a negative value if an entry for OPCODE could - not be found. Checks all matches and returns the one with the highest - priority. */ - -static int -locate_opcode_ent (ia64_insn opcode, enum ia64_insn_type type) -{ - int currtest[41]; - int bitpos[41]; - int op_ptr[41]; - int currstatenum = 0; - short found_disent = -1; - short found_priority = -1; - - currtest[currstatenum] = 0; - op_ptr[currstatenum] = 0; - bitpos[currstatenum] = 40; - - while (1) - { - int op_pointer = op_ptr[currstatenum]; - unsigned int op; - int currbitnum = bitpos[currstatenum]; - int oplen; - int opval[3] = {0}; - int next_op; - int currbit; - - oplen = extract_op (op_pointer, opval, &op); - - bitpos[currstatenum] = currbitnum; - - /* Skip opval[0] bits in the instruction. */ - if (op & 0x40) - { - currbitnum -= opval[0]; - } - - /* The value of the current bit being tested. */ - currbit = opcode & (((ia64_insn) 1) << currbitnum) ? 1 : 0; - next_op = -1; - - /* We always perform the tests specified in the current state in - a particular order, falling through to the next test if the - previous one failed. */ - switch (currtest[currstatenum]) - { - case 0: - currtest[currstatenum]++; - if (currbit == 0 && (op & 0x80)) - { - /* Check for a zero bit. If this test solely checks for - a zero bit, we can check for up to 8 consecutive zero - bits (the number to check is specified by the lower 3 - bits in the state code.) - - If the state instruction matches, we go to the very - next state instruction; otherwise, try the next test. */ - - if ((op & 0xf8) == 0x80) - { - int count = op & 0x7; - int x; - - for (x = 0; x <= count; x++) - { - int i = - opcode & (((ia64_insn) 1) << (currbitnum - x)) ? 1 : 0; - if (i) - { - break; - } - } - if (x > count) - { - next_op = op_pointer + ((oplen + 7) / 8); - currbitnum -= count; - break; - } - } - else if (! currbit) - { - next_op = op_pointer + ((oplen + 7) / 8); - break; - } - } - /* FALLTHROUGH */ - case 1: - /* If the bit in the instruction is one, go to the state - instruction specified by opval[1]. */ - currtest[currstatenum]++; - if (currbit && (op & 0x30) != 0 && ((op & 0x30) != 0x30)) - { - next_op = opval[1]; - break; - } - /* FALLTHROUGH */ - case 2: - /* Don't care. Skip the current bit and go to the state - instruction specified by opval[2]. - - An encoding of 0x30 is special; this means that a 12-bit - offset into the ia64_dis_names[] array is specified. */ - currtest[currstatenum]++; - if ((op & 0x08) || ((op & 0x30) == 0x30)) - { - next_op = opval[2]; - break; - } - } - - /* If bit 15 is set in the address of the next state, an offset - in the ia64_dis_names array was specified instead. We then - check to see if an entry in the list of opcodes matches the - opcode we were given; if so, we have succeeded. */ - - if ((next_op >= 0) && (next_op & 32768)) - { - short disent = next_op & 32767; - short priority = -1; - - if (next_op > 65535) - { - abort (); - } - - /* Run through the list of opcodes to check, trying to find - one that matches. */ - while (disent >= 0) - { - int place = ia64_dis_names[disent].insn_index; - - priority = ia64_dis_names[disent].priority; - - if (opcode_verify (opcode, place, type) - && priority > found_priority) - { - break; - } - if (ia64_dis_names[disent].next_flag) - { - disent++; - } - else - { - disent = -1; - } - } - - if (disent >= 0) - { - found_disent = disent; - found_priority = priority; - } - /* Try the next test in this state, regardless of whether a match - was found. */ - next_op = -2; - } - - /* next_op == -1 is "back up to the previous state". - next_op == -2 is "stay in this state and try the next test". - Otherwise, transition to the state indicated by next_op. */ - - if (next_op == -1) - { - currstatenum--; - if (currstatenum < 0) - { - return found_disent; - } - } - else if (next_op >= 0) - { - currstatenum++; - bitpos[currstatenum] = currbitnum - 1; - op_ptr[currstatenum] = next_op; - currtest[currstatenum] = 0; - } - } -} - -/* Construct an ia64_opcode entry based on OPCODE, NAME and PLACE. */ - -static struct ia64_opcode * -make_ia64_opcode (ia64_insn opcode, const char *name, int place, int depind) -{ - struct ia64_opcode *res = - (struct ia64_opcode *) malloc (sizeof (struct ia64_opcode)); - res->name = strdup (name); - res->type = main_table[place].opcode_type; - res->num_outputs = main_table[place].num_outputs; - res->opcode = opcode; - res->mask = main_table[place].mask; - res->operands[0] = main_table[place].operands[0]; - res->operands[1] = main_table[place].operands[1]; - res->operands[2] = main_table[place].operands[2]; - res->operands[3] = main_table[place].operands[3]; - res->operands[4] = main_table[place].operands[4]; - res->flags = main_table[place].flags; - res->ent_index = place; - res->dependencies = &op_dependencies[depind]; - return res; -} - -/* Determine the ia64_opcode entry for the opcode specified by INSN - and TYPE. If a valid entry is not found, return NULL. */ -static struct ia64_opcode * -ia64_dis_opcode (ia64_insn insn, enum ia64_insn_type type) -{ - int disent = locate_opcode_ent (insn, type); - - if (disent < 0) - { - return NULL; - } - else - { - unsigned int cb = ia64_dis_names[disent].completer_index; - static char name[128]; - int place = ia64_dis_names[disent].insn_index; - int ci = main_table[place].completers; - ia64_insn tinsn = main_table[place].opcode; - - strcpy (name, ia64_strings [main_table[place].name_index]); - - while (cb) - { - if (cb & 1) - { - int cname = completer_table[ci].name_index; - - tinsn = apply_completer (tinsn, ci); - - if (ia64_strings[cname][0] != '\0') - { - strcat (name, "."); - strcat (name, ia64_strings[cname]); - } - if (cb != 1) - { - ci = completer_table[ci].subentries; - } - } - else - { - ci = completer_table[ci].alternative; - } - if (ci < 0) - { - abort (); - } - cb = cb >> 1; - } - if (tinsn != (insn & main_table[place].mask)) - { - abort (); - } - return make_ia64_opcode (insn, name, place, - completer_table[ci].dependencies); - } -} - -/* Free any resources used by ENT. */ -static void -ia64_free_opcode (struct ia64_opcode *ent) -{ - free ((void *)ent->name); - free (ent); -} - -/* Disassemble ia64 instruction. */ - -/* Return the instruction type for OPCODE found in unit UNIT. */ - -static enum ia64_insn_type -unit_to_type (ia64_insn opcode, enum ia64_unit unit) -{ - enum ia64_insn_type type; - int op; - - op = IA64_OP (opcode); - - if (op >= 8 && (unit == IA64_UNIT_I || unit == IA64_UNIT_M)) - { - type = IA64_TYPE_A; - } - else - { - switch (unit) - { - case IA64_UNIT_I: - type = IA64_TYPE_I; break; - case IA64_UNIT_M: - type = IA64_TYPE_M; break; - case IA64_UNIT_B: - type = IA64_TYPE_B; break; - case IA64_UNIT_F: - type = IA64_TYPE_F; break; - case IA64_UNIT_L: - case IA64_UNIT_X: - type = IA64_TYPE_X; break; - default: - type = -1; - } - } - return type; -} - -int -print_insn_ia64 (bfd_vma memaddr, struct disassemble_info *info) -{ - ia64_insn t0, t1, slot[3], template, s_bit, insn; - int slotnum, j, status, need_comma, retval, slot_multiplier; - const struct ia64_operand *odesc; - const struct ia64_opcode *idesc; - const char *err, *str, *tname; - uint64_t value; - bfd_byte bundle[16]; - enum ia64_unit unit; - char regname[16]; - - if (info->bytes_per_line == 0) - info->bytes_per_line = 6; - info->display_endian = info->endian; - - slot_multiplier = info->bytes_per_line; - retval = slot_multiplier; - - slotnum = (((long) memaddr) & 0xf) / slot_multiplier; - if (slotnum > 2) - return -1; - - memaddr -= (memaddr & 0xf); - status = (*info->read_memory_func) (memaddr, bundle, sizeof (bundle), info); - if (status != 0) - { - (*info->memory_error_func) (status, memaddr, info); - return -1; - } - /* bundles are always in little-endian byte order */ - t0 = bfd_getl64 (bundle); - t1 = bfd_getl64 (bundle + 8); - s_bit = t0 & 1; - template = (t0 >> 1) & 0xf; - slot[0] = (t0 >> 5) & 0x1ffffffffffLL; - slot[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); - slot[2] = (t1 >> 23) & 0x1ffffffffffLL; - - tname = ia64_templ_desc[template].name; - if (slotnum == 0) - (*info->fprintf_func) (info->stream, "[%s] ", tname); - else - (*info->fprintf_func) (info->stream, " "); - - unit = ia64_templ_desc[template].exec_unit[slotnum]; - - if (template == 2 && slotnum == 1) - { - /* skip L slot in MLI template: */ - slotnum = 2; - retval += slot_multiplier; - } - - insn = slot[slotnum]; - - if (unit == IA64_UNIT_NIL) - goto decoding_failed; - - idesc = ia64_dis_opcode (insn, unit_to_type (insn, unit)); - if (idesc == NULL) - goto decoding_failed; - - /* print predicate, if any: */ - - if ((idesc->flags & IA64_OPCODE_NO_PRED) - || (insn & 0x3f) == 0) - (*info->fprintf_func) (info->stream, " "); - else - (*info->fprintf_func) (info->stream, "(p%02d) ", (int)(insn & 0x3f)); - - /* now the actual instruction: */ - - (*info->fprintf_func) (info->stream, "%s", idesc->name); - if (idesc->operands[0]) - (*info->fprintf_func) (info->stream, " "); - - need_comma = 0; - for (j = 0; j < NELEMS (idesc->operands) && idesc->operands[j]; ++j) - { - odesc = elf64_ia64_operands + idesc->operands[j]; - - if (need_comma) - (*info->fprintf_func) (info->stream, ","); - - if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64) - { - /* special case of 64 bit immediate load: */ - value = ((insn >> 13) & 0x7f) | (((insn >> 27) & 0x1ff) << 7) - | (((insn >> 22) & 0x1f) << 16) | (((insn >> 21) & 0x1) << 21) - | (slot[1] << 22) | (((insn >> 36) & 0x1) << 63); - } - else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62) - { - /* 62-bit immediate for nop.x/break.x */ - value = ((slot[1] & 0x1ffffffffffLL) << 21) - | (((insn >> 36) & 0x1) << 20) - | ((insn >> 6) & 0xfffff); - } - else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64) - { - /* 60-bit immediate for long branches. */ - value = (((insn >> 13) & 0xfffff) - | (((insn >> 36) & 1) << 59) - | (((slot[1] >> 2) & 0x7fffffffffLL) << 20)) << 4; - } - else - { - err = (*odesc->extract) (odesc, insn, &value); - if (err) - { - (*info->fprintf_func) (info->stream, "%s", err); - goto done; - } - } - - switch (odesc->class) - { - case IA64_OPND_CLASS_CST: - (*info->fprintf_func) (info->stream, "%s", odesc->str); - break; - - case IA64_OPND_CLASS_REG: - if (odesc->str[0] == 'a' && odesc->str[1] == 'r') - { - switch (value) - { - case 0: case 1: case 2: case 3: - case 4: case 5: case 6: case 7: - sprintf (regname, "ar.k%u", (unsigned int) value); - break; - case 16: strcpy (regname, "ar.rsc"); break; - case 17: strcpy (regname, "ar.bsp"); break; - case 18: strcpy (regname, "ar.bspstore"); break; - case 19: strcpy (regname, "ar.rnat"); break; - case 32: strcpy (regname, "ar.ccv"); break; - case 36: strcpy (regname, "ar.unat"); break; - case 40: strcpy (regname, "ar.fpsr"); break; - case 44: strcpy (regname, "ar.itc"); break; - case 64: strcpy (regname, "ar.pfs"); break; - case 65: strcpy (regname, "ar.lc"); break; - case 66: strcpy (regname, "ar.ec"); break; - default: - sprintf (regname, "ar%u", (unsigned int) value); - break; - } - (*info->fprintf_func) (info->stream, "%s", regname); - } - else - (*info->fprintf_func) (info->stream, "%s%d", odesc->str, (int)value); - break; - - case IA64_OPND_CLASS_IND: - (*info->fprintf_func) (info->stream, "%s[r%d]", odesc->str, (int)value); - break; - - case IA64_OPND_CLASS_ABS: - str = 0; - if (odesc - elf64_ia64_operands == IA64_OPND_MBTYPE4) - switch (value) - { - case 0x0: str = "@brcst"; break; - case 0x8: str = "@mix"; break; - case 0x9: str = "@shuf"; break; - case 0xa: str = "@alt"; break; - case 0xb: str = "@rev"; break; - } - - if (str) - (*info->fprintf_func) (info->stream, "%s", str); - else if (odesc->flags & IA64_OPND_FLAG_DECIMAL_SIGNED) - (*info->fprintf_func) (info->stream, "%" PRId64, - (int64_t) value); - else if (odesc->flags & IA64_OPND_FLAG_DECIMAL_UNSIGNED) - (*info->fprintf_func) (info->stream, "%" PRIu64, - (uint64_t) value); - else - (*info->fprintf_func) (info->stream, "0x%" PRIx64, - (uint64_t) value); - break; - - case IA64_OPND_CLASS_REL: - (*info->print_address_func) (memaddr + value, info); - break; - } - - need_comma = 1; - if (j + 1 == idesc->num_outputs) - { - (*info->fprintf_func) (info->stream, "="); - need_comma = 0; - } - } - if (slotnum + 1 == ia64_templ_desc[template].group_boundary - || ((slotnum == 2) && s_bit)) - (*info->fprintf_func) (info->stream, ";;"); - - done: - ia64_free_opcode ((struct ia64_opcode *)idesc); - failed: - if (slotnum == 2) - retval += 16 - 3*slot_multiplier; - return retval; - - decoding_failed: - (*info->fprintf_func) (info->stream, " data8 %#011llx", (long long) insn); - goto failed; -} diff --git a/include/block/block.h b/include/block/block.h index ab80195378..2ad18775af 100644 --- a/include/block/block.h +++ b/include/block/block.h @@ -441,7 +441,6 @@ int bdrv_can_set_read_only(BlockDriverState *bs, bool read_only, int bdrv_set_read_only(BlockDriverState *bs, bool read_only, Error **errp); bool bdrv_is_sg(BlockDriverState *bs); bool bdrv_is_inserted(BlockDriverState *bs); -int bdrv_media_changed(BlockDriverState *bs); void bdrv_lock_medium(BlockDriverState *bs, bool locked); void bdrv_eject(BlockDriverState *bs, bool eject_flag); const char *bdrv_get_format_name(BlockDriverState *bs); diff --git a/include/block/block_int.h b/include/block/block_int.h index 7816b43a27..ba4c383393 100644 --- a/include/block/block_int.h +++ b/include/block/block_int.h @@ -87,7 +87,11 @@ struct BlockDriver { const char *format_name; int instance_size; - /* set to true if the BlockDriver is a block filter */ + /* set to true if the BlockDriver is a block filter. Block filters pass + * certain callbacks that refer to data (see block.c) to their bs->file if + * the driver doesn't implement them. Drivers that do not wish to forward + * must implement them and return -ENOTSUP. + */ bool is_filter; /* for snapshots block filter like Quorum can implement the * following recursive callback. @@ -275,7 +279,6 @@ struct BlockDriver { /* removable device specific */ bool (*bdrv_is_inserted)(BlockDriverState *bs); - int (*bdrv_media_changed)(BlockDriverState *bs); void (*bdrv_eject)(BlockDriverState *bs, bool eject_flag); void (*bdrv_lock_medium)(BlockDriverState *bs, bool locked); @@ -992,6 +995,24 @@ void bdrv_format_default_perms(BlockDriverState *bs, BdrvChild *c, uint64_t perm, uint64_t shared, uint64_t *nperm, uint64_t *nshared); +/* + * Default implementation for drivers to pass bdrv_co_get_block_status() to + * their file. + */ +int64_t coroutine_fn bdrv_co_get_block_status_from_file(BlockDriverState *bs, + int64_t sector_num, + int nb_sectors, + int *pnum, + BlockDriverState **file); +/* + * Default implementation for drivers to pass bdrv_co_get_block_status() to + * their backing file. + */ +int64_t coroutine_fn bdrv_co_get_block_status_from_backing(BlockDriverState *bs, + int64_t sector_num, + int nb_sectors, + int *pnum, + BlockDriverState **file); const char *bdrv_get_parent_name(const BlockDriverState *bs); void blk_dev_change_media_cb(BlockBackend *blk, bool load, Error **errp); bool blk_dev_has_removable_media(BlockBackend *blk); diff --git a/include/block/throttle-groups.h b/include/block/throttle-groups.h index d983d34074..e2fd0513c4 100644 --- a/include/block/throttle-groups.h +++ b/include/block/throttle-groups.h @@ -28,20 +28,58 @@ #include "qemu/throttle.h" #include "block/block_int.h" -const char *throttle_group_get_name(BlockBackend *blk); +/* The ThrottleGroupMember structure indicates membership in a ThrottleGroup + * and holds related data. + */ + +typedef struct ThrottleGroupMember { + AioContext *aio_context; + /* throttled_reqs_lock protects the CoQueues for throttled requests. */ + CoMutex throttled_reqs_lock; + CoQueue throttled_reqs[2]; + + /* Nonzero if the I/O limits are currently being ignored; generally + * it is zero. Accessed with atomic operations. + */ + unsigned int io_limits_disabled; + + /* The following fields are protected by the ThrottleGroup lock. + * See the ThrottleGroup documentation for details. + * throttle_state tells us if I/O limits are configured. */ + ThrottleState *throttle_state; + ThrottleTimers throttle_timers; + unsigned pending_reqs[2]; + QLIST_ENTRY(ThrottleGroupMember) round_robin; + +} ThrottleGroupMember; + +#define TYPE_THROTTLE_GROUP "throttle-group" +#define THROTTLE_GROUP(obj) OBJECT_CHECK(ThrottleGroup, (obj), TYPE_THROTTLE_GROUP) + +const char *throttle_group_get_name(ThrottleGroupMember *tgm); ThrottleState *throttle_group_incref(const char *name); void throttle_group_unref(ThrottleState *ts); -void throttle_group_config(BlockBackend *blk, ThrottleConfig *cfg); -void throttle_group_get_config(BlockBackend *blk, ThrottleConfig *cfg); +void throttle_group_config(ThrottleGroupMember *tgm, ThrottleConfig *cfg); +void throttle_group_get_config(ThrottleGroupMember *tgm, ThrottleConfig *cfg); -void throttle_group_register_blk(BlockBackend *blk, const char *groupname); -void throttle_group_unregister_blk(BlockBackend *blk); -void throttle_group_restart_blk(BlockBackend *blk); +void throttle_group_register_tgm(ThrottleGroupMember *tgm, + const char *groupname, + AioContext *ctx); +void throttle_group_unregister_tgm(ThrottleGroupMember *tgm); +void throttle_group_restart_tgm(ThrottleGroupMember *tgm); -void coroutine_fn throttle_group_co_io_limits_intercept(BlockBackend *blk, +void coroutine_fn throttle_group_co_io_limits_intercept(ThrottleGroupMember *tgm, unsigned int bytes, bool is_write); +void throttle_group_attach_aio_context(ThrottleGroupMember *tgm, + AioContext *new_context); +void throttle_group_detach_aio_context(ThrottleGroupMember *tgm); +/* + * throttle_group_exists() must be called under the global + * mutex. + */ +bool throttle_group_exists(const char *name); #endif diff --git a/include/qemu/iov.h b/include/qemu/iov.h index bd9fd55b0a..72d4c559b4 100644 --- a/include/qemu/iov.h +++ b/include/qemu/iov.h @@ -31,11 +31,6 @@ size_t iov_size(const struct iovec *iov, const unsigned int iov_cnt); * Number of bytes actually copied will be returned, which is * min(bytes, iov_size(iov)-offset) * `Offset' must point to the inside of iovec. - * It is okay to use very large value for `bytes' since we're - * limited by the size of the iovec anyway, provided that the - * buffer pointed to by buf has enough space. One possible - * such "large" value is -1 (sinice size_t is unsigned), - * so specifying `-1' as `bytes' means 'up to the end of iovec'. */ size_t iov_from_buf_full(const struct iovec *iov, unsigned int iov_cnt, size_t offset, const void *buf, size_t bytes); @@ -76,7 +71,6 @@ iov_to_buf(const struct iovec *iov, const unsigned int iov_cnt, * up to the end of it, will be filled with the specified value. * Function return actual number of bytes processed, which is * min(size, iov_size(iov) - offset). - * Again, it is okay to use large value for `bytes' to mean "up to the end". */ size_t iov_memset(const struct iovec *iov, const unsigned int iov_cnt, size_t offset, int fillc, size_t bytes); diff --git a/include/qemu/throttle-options.h b/include/qemu/throttle-options.h index 3133d1ca40..3528a8f4a2 100644 --- a/include/qemu/throttle-options.h +++ b/include/qemu/throttle-options.h @@ -10,81 +10,103 @@ #ifndef THROTTLE_OPTIONS_H #define THROTTLE_OPTIONS_H +#define QEMU_OPT_IOPS_TOTAL "iops-total" +#define QEMU_OPT_IOPS_TOTAL_MAX "iops-total-max" +#define QEMU_OPT_IOPS_TOTAL_MAX_LENGTH "iops-total-max-length" +#define QEMU_OPT_IOPS_READ "iops-read" +#define QEMU_OPT_IOPS_READ_MAX "iops-read-max" +#define QEMU_OPT_IOPS_READ_MAX_LENGTH "iops-read-max-length" +#define QEMU_OPT_IOPS_WRITE "iops-write" +#define QEMU_OPT_IOPS_WRITE_MAX "iops-write-max" +#define QEMU_OPT_IOPS_WRITE_MAX_LENGTH "iops-write-max-length" +#define QEMU_OPT_BPS_TOTAL "bps-total" +#define QEMU_OPT_BPS_TOTAL_MAX "bps-total-max" +#define QEMU_OPT_BPS_TOTAL_MAX_LENGTH "bps-total-max-length" +#define QEMU_OPT_BPS_READ "bps-read" +#define QEMU_OPT_BPS_READ_MAX "bps-read-max" +#define QEMU_OPT_BPS_READ_MAX_LENGTH "bps-read-max-length" +#define QEMU_OPT_BPS_WRITE "bps-write" +#define QEMU_OPT_BPS_WRITE_MAX "bps-write-max" +#define QEMU_OPT_BPS_WRITE_MAX_LENGTH "bps-write-max-length" +#define QEMU_OPT_IOPS_SIZE "iops-size" +#define QEMU_OPT_THROTTLE_GROUP_NAME "throttle-group" + +#define THROTTLE_OPT_PREFIX "throttling." #define THROTTLE_OPTS \ { \ - .name = "throttling.iops-total",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_TOTAL,\ .type = QEMU_OPT_NUMBER,\ .help = "limit total I/O operations per second",\ },{ \ - .name = "throttling.iops-read",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_READ,\ .type = QEMU_OPT_NUMBER,\ .help = "limit read operations per second",\ },{ \ - .name = "throttling.iops-write",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_WRITE,\ .type = QEMU_OPT_NUMBER,\ .help = "limit write operations per second",\ },{ \ - .name = "throttling.bps-total",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_BPS_TOTAL,\ .type = QEMU_OPT_NUMBER,\ .help = "limit total bytes per second",\ },{ \ - .name = "throttling.bps-read",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_BPS_READ,\ .type = QEMU_OPT_NUMBER,\ .help = "limit read bytes per second",\ },{ \ - .name = "throttling.bps-write",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_BPS_WRITE,\ .type = QEMU_OPT_NUMBER,\ .help = "limit write bytes per second",\ },{ \ - .name = "throttling.iops-total-max",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_TOTAL_MAX,\ .type = QEMU_OPT_NUMBER,\ .help = "I/O operations burst",\ },{ \ - .name = "throttling.iops-read-max",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_READ_MAX,\ .type = QEMU_OPT_NUMBER,\ .help = "I/O operations read burst",\ },{ \ - .name = "throttling.iops-write-max",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_WRITE_MAX,\ .type = QEMU_OPT_NUMBER,\ .help = "I/O operations write burst",\ },{ \ - .name = "throttling.bps-total-max",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_BPS_TOTAL_MAX,\ .type = QEMU_OPT_NUMBER,\ .help = "total bytes burst",\ },{ \ - .name = "throttling.bps-read-max",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_BPS_READ_MAX,\ .type = QEMU_OPT_NUMBER,\ .help = "total bytes read burst",\ },{ \ - .name = "throttling.bps-write-max",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_BPS_WRITE_MAX,\ .type = QEMU_OPT_NUMBER,\ .help = "total bytes write burst",\ },{ \ - .name = "throttling.iops-total-max-length",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_TOTAL_MAX_LENGTH,\ .type = QEMU_OPT_NUMBER,\ .help = "length of the iops-total-max burst period, in seconds",\ },{ \ - .name = "throttling.iops-read-max-length",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_READ_MAX_LENGTH,\ .type = QEMU_OPT_NUMBER,\ .help = "length of the iops-read-max burst period, in seconds",\ },{ \ - .name = "throttling.iops-write-max-length",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_WRITE_MAX_LENGTH,\ .type = QEMU_OPT_NUMBER,\ .help = "length of the iops-write-max burst period, in seconds",\ },{ \ - .name = "throttling.bps-total-max-length",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_BPS_TOTAL_MAX_LENGTH,\ .type = QEMU_OPT_NUMBER,\ .help = "length of the bps-total-max burst period, in seconds",\ },{ \ - .name = "throttling.bps-read-max-length",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_BPS_READ_MAX_LENGTH,\ .type = QEMU_OPT_NUMBER,\ .help = "length of the bps-read-max burst period, in seconds",\ },{ \ - .name = "throttling.bps-write-max-length",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_BPS_WRITE_MAX_LENGTH,\ .type = QEMU_OPT_NUMBER,\ .help = "length of the bps-write-max burst period, in seconds",\ },{ \ - .name = "throttling.iops-size",\ + .name = THROTTLE_OPT_PREFIX QEMU_OPT_IOPS_SIZE,\ .type = QEMU_OPT_NUMBER,\ .help = "when limiting by iops max size of an I/O in bytes",\ } diff --git a/include/qemu/throttle.h b/include/qemu/throttle.h index 8e01885d29..8c93237866 100644 --- a/include/qemu/throttle.h +++ b/include/qemu/throttle.h @@ -152,5 +152,8 @@ bool throttle_schedule_timer(ThrottleState *ts, bool is_write); void throttle_account(ThrottleState *ts, bool is_write, uint64_t size); +void throttle_limits_to_config(ThrottleLimits *arg, ThrottleConfig *cfg, + Error **errp); +void throttle_config_to_limits(ThrottleConfig *cfg, ThrottleLimits *var); #endif diff --git a/include/sysemu/block-backend.h b/include/sysemu/block-backend.h index aadc733daf..c4e52a5fa3 100644 --- a/include/sysemu/block-backend.h +++ b/include/sysemu/block-backend.h @@ -70,24 +70,10 @@ typedef struct BlockDevOps { /* This struct is embedded in (the private) BlockBackend struct and contains * fields that must be public. This is in particular for QLIST_ENTRY() and - * friends so that BlockBackends can be kept in lists outside block-backend.c */ + * friends so that BlockBackends can be kept in lists outside block-backend.c + * */ typedef struct BlockBackendPublic { - /* throttled_reqs_lock protects the CoQueues for throttled requests. */ - CoMutex throttled_reqs_lock; - CoQueue throttled_reqs[2]; - - /* Nonzero if the I/O limits are currently being ignored; generally - * it is zero. Accessed with atomic operations. - */ - unsigned int io_limits_disabled; - - /* The following fields are protected by the ThrottleGroup lock. - * See the ThrottleGroup documentation for details. - * throttle_state tells us if I/O limits are configured. */ - ThrottleState *throttle_state; - ThrottleTimers throttle_timers; - unsigned pending_reqs[2]; - QLIST_ENTRY(BlockBackendPublic) round_robin; + ThrottleGroupMember throttle_group_member; } BlockBackendPublic; BlockBackend *blk_new(uint64_t perm, uint64_t shared_perm); diff --git a/qapi/block-core.json b/qapi/block-core.json index 28abb9e6cf..bb11815608 100644 --- a/qapi/block-core.json +++ b/qapi/block-core.json @@ -1906,6 +1906,54 @@ '*iops_size': 'int', '*group': 'str' } } ## +# @ThrottleLimits: +# +# Limit parameters for throttling. +# Since some limit combinations are illegal, limits should always be set in one +# transaction. All fields are optional. When setting limits, if a field is +# missing the current value is not changed. +# +# @iops-total: limit total I/O operations per second +# @iops-total-max: I/O operations burst +# @iops-total-max-length: length of the iops-total-max burst period, in seconds +# It must only be set if @iops-total-max is set as well. +# @iops-read: limit read operations per second +# @iops-read-max: I/O operations read burst +# @iops-read-max-length: length of the iops-read-max burst period, in seconds +# It must only be set if @iops-read-max is set as well. +# @iops-write: limit write operations per second +# @iops-write-max: I/O operations write burst +# @iops-write-max-length: length of the iops-write-max burst period, in seconds +# It must only be set if @iops-write-max is set as well. +# @bps-total: limit total bytes per second +# @bps-total-max: total bytes burst +# @bps-total-max-length: length of the bps-total-max burst period, in seconds. +# It must only be set if @bps-total-max is set as well. +# @bps-read: limit read bytes per second +# @bps-read-max: total bytes read burst +# @bps-read-max-length: length of the bps-read-max burst period, in seconds +# It must only be set if @bps-read-max is set as well. +# @bps-write: limit write bytes per second +# @bps-write-max: total bytes write burst +# @bps-write-max-length: length of the bps-write-max burst period, in seconds +# It must only be set if @bps-write-max is set as well. +# @iops-size: when limiting by iops max size of an I/O in bytes +# +# Since: 2.11 +## +{ 'struct': 'ThrottleLimits', + 'data': { '*iops-total' : 'int', '*iops-total-max' : 'int', + '*iops-total-max-length' : 'int', '*iops-read' : 'int', + '*iops-read-max' : 'int', '*iops-read-max-length' : 'int', + '*iops-write' : 'int', '*iops-write-max' : 'int', + '*iops-write-max-length' : 'int', '*bps-total' : 'int', + '*bps-total-max' : 'int', '*bps-total-max-length' : 'int', + '*bps-read' : 'int', '*bps-read-max' : 'int', + '*bps-read-max-length' : 'int', '*bps-write' : 'int', + '*bps-write-max' : 'int', '*bps-write-max-length' : 'int', + '*iops-size' : 'int' } } + +## # @block-stream: # # Copy data from a backing file into a block device. @@ -2175,6 +2223,7 @@ # Drivers that are supported in block device operations. # # @vxhs: Since 2.10 +# @throttle: Since 2.11 # # Since: 2.9 ## @@ -2184,7 +2233,7 @@ 'host_device', 'http', 'https', 'iscsi', 'luks', 'nbd', 'nfs', 'null-aio', 'null-co', 'parallels', 'qcow', 'qcow2', 'qed', 'quorum', 'raw', 'rbd', 'replication', 'sheepdog', 'ssh', - 'vdi', 'vhdx', 'vmdk', 'vpc', 'vvfat', 'vxhs' ] } + 'throttle', 'vdi', 'vhdx', 'vmdk', 'vpc', 'vvfat', 'vxhs' ] } ## # @BlockdevOptionsFile: @@ -3048,6 +3097,20 @@ '*tls-creds': 'str' } } ## +# @BlockdevOptionsThrottle: +# +# Driver specific block device options for the throttle driver +# +# @throttle-group: the name of the throttle-group object to use. It +# must already exist. +# @file: reference to or definition of the data source block device +# Since: 2.11 +## +{ 'struct': 'BlockdevOptionsThrottle', + 'data': { 'throttle-group': 'str', + 'file' : 'BlockdevRef' + } } +## # @BlockdevOptions: # # Options for creating a block device. Many options are available for all @@ -3108,6 +3171,7 @@ 'replication':'BlockdevOptionsReplication', 'sheepdog': 'BlockdevOptionsSheepdog', 'ssh': 'BlockdevOptionsSsh', + 'throttle': 'BlockdevOptionsThrottle', 'vdi': 'BlockdevOptionsGenericFormat', 'vhdx': 'BlockdevOptionsGenericFormat', 'vmdk': 'BlockdevOptionsGenericCOWFormat', diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index 55a46ac825..b41a248bee 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -117,4 +117,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop) __builtin___clear_cache((char *)start, (char *)stop); } +#define TCG_TARGET_DEFAULT_MO (0) + #endif /* AARCH64_TCG_TARGET_H */ diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 5ef1086710..a38be15a39 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -134,4 +134,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop) __builtin___clear_cache((char *) start, (char *) stop); } +#define TCG_TARGET_DEFAULT_MO (0) + #endif diff --git a/tcg/ia64/tcg-target.h b/tcg/ia64/tcg-target.h deleted file mode 100644 index 901bb7575d..0000000000 --- a/tcg/ia64/tcg-target.h +++ /dev/null @@ -1,198 +0,0 @@ -/* - * Tiny Code Generator for QEMU - * - * Copyright (c) 2009-2010 Aurelien Jarno <aurelien@aurel32.net> - * Based on i386/tcg-target.c - Copyright (c) 2008 Fabrice Bellard - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef IA64_TCG_TARGET_H -#define IA64_TCG_TARGET_H - -#define TCG_TARGET_INSN_UNIT_SIZE 16 -#define TCG_TARGET_TLB_DISPLACEMENT_BITS 21 - -typedef struct { - uint64_t lo __attribute__((aligned(16))); - uint64_t hi; -} tcg_insn_unit; - -/* We only map the first 64 registers */ -#define TCG_TARGET_NB_REGS 64 -typedef enum { - TCG_REG_R0 = 0, - TCG_REG_R1, - TCG_REG_R2, - TCG_REG_R3, - TCG_REG_R4, - TCG_REG_R5, - TCG_REG_R6, - TCG_REG_R7, - TCG_REG_R8, - TCG_REG_R9, - TCG_REG_R10, - TCG_REG_R11, - TCG_REG_R12, - TCG_REG_R13, - TCG_REG_R14, - TCG_REG_R15, - TCG_REG_R16, - TCG_REG_R17, - TCG_REG_R18, - TCG_REG_R19, - TCG_REG_R20, - TCG_REG_R21, - TCG_REG_R22, - TCG_REG_R23, - TCG_REG_R24, - TCG_REG_R25, - TCG_REG_R26, - TCG_REG_R27, - TCG_REG_R28, - TCG_REG_R29, - TCG_REG_R30, - TCG_REG_R31, - TCG_REG_R32, - TCG_REG_R33, - TCG_REG_R34, - TCG_REG_R35, - TCG_REG_R36, - TCG_REG_R37, - TCG_REG_R38, - TCG_REG_R39, - TCG_REG_R40, - TCG_REG_R41, - TCG_REG_R42, - TCG_REG_R43, - TCG_REG_R44, - TCG_REG_R45, - TCG_REG_R46, - TCG_REG_R47, - TCG_REG_R48, - TCG_REG_R49, - TCG_REG_R50, - TCG_REG_R51, - TCG_REG_R52, - TCG_REG_R53, - TCG_REG_R54, - TCG_REG_R55, - TCG_REG_R56, - TCG_REG_R57, - TCG_REG_R58, - TCG_REG_R59, - TCG_REG_R60, - TCG_REG_R61, - TCG_REG_R62, - TCG_REG_R63, - - TCG_AREG0 = TCG_REG_R32, -} TCGReg; - -#define TCG_CT_CONST_ZERO 0x100 -#define TCG_CT_CONST_S22 0x200 - -/* used for function call generation */ -#define TCG_REG_CALL_STACK TCG_REG_R12 -#define TCG_TARGET_STACK_ALIGN 16 -#define TCG_TARGET_CALL_STACK_OFFSET 16 - -/* optional instructions */ -#define TCG_TARGET_HAS_div_i32 0 -#define TCG_TARGET_HAS_rem_i32 0 -#define TCG_TARGET_HAS_div_i64 0 -#define TCG_TARGET_HAS_rem_i64 0 -#define TCG_TARGET_HAS_andc_i32 1 -#define TCG_TARGET_HAS_andc_i64 1 -#define TCG_TARGET_HAS_bswap16_i32 1 -#define TCG_TARGET_HAS_bswap16_i64 1 -#define TCG_TARGET_HAS_bswap32_i32 1 -#define TCG_TARGET_HAS_bswap32_i64 1 -#define TCG_TARGET_HAS_bswap64_i64 1 -#define TCG_TARGET_HAS_eqv_i32 1 -#define TCG_TARGET_HAS_eqv_i64 1 -#define TCG_TARGET_HAS_ext8s_i32 1 -#define TCG_TARGET_HAS_ext16s_i32 1 -#define TCG_TARGET_HAS_ext8s_i64 1 -#define TCG_TARGET_HAS_ext16s_i64 1 -#define TCG_TARGET_HAS_ext32s_i64 1 -#define TCG_TARGET_HAS_ext8u_i32 1 -#define TCG_TARGET_HAS_ext16u_i32 1 -#define TCG_TARGET_HAS_ext8u_i64 1 -#define TCG_TARGET_HAS_ext16u_i64 1 -#define TCG_TARGET_HAS_ext32u_i64 1 -#define TCG_TARGET_HAS_nand_i32 1 -#define TCG_TARGET_HAS_nand_i64 1 -#define TCG_TARGET_HAS_nor_i32 1 -#define TCG_TARGET_HAS_clz_i32 0 -#define TCG_TARGET_HAS_clz_i64 0 -#define TCG_TARGET_HAS_ctz_i32 0 -#define TCG_TARGET_HAS_ctz_i64 0 -#define TCG_TARGET_HAS_ctpop_i32 0 -#define TCG_TARGET_HAS_ctpop_i64 0 -#define TCG_TARGET_HAS_nor_i64 1 -#define TCG_TARGET_HAS_orc_i32 1 -#define TCG_TARGET_HAS_orc_i64 1 -#define TCG_TARGET_HAS_rot_i32 1 -#define TCG_TARGET_HAS_rot_i64 1 -#define TCG_TARGET_HAS_movcond_i32 1 -#define TCG_TARGET_HAS_movcond_i64 1 -#define TCG_TARGET_HAS_deposit_i32 1 -#define TCG_TARGET_HAS_deposit_i64 1 -#define TCG_TARGET_HAS_extract_i32 0 -#define TCG_TARGET_HAS_extract_i64 0 -#define TCG_TARGET_HAS_sextract_i32 0 -#define TCG_TARGET_HAS_sextract_i64 0 -#define TCG_TARGET_HAS_add2_i32 0 -#define TCG_TARGET_HAS_add2_i64 0 -#define TCG_TARGET_HAS_sub2_i32 0 -#define TCG_TARGET_HAS_sub2_i64 0 -#define TCG_TARGET_HAS_mulu2_i32 0 -#define TCG_TARGET_HAS_mulu2_i64 0 -#define TCG_TARGET_HAS_muls2_i32 0 -#define TCG_TARGET_HAS_muls2_i64 0 -#define TCG_TARGET_HAS_muluh_i32 0 -#define TCG_TARGET_HAS_muluh_i64 0 -#define TCG_TARGET_HAS_mulsh_i32 0 -#define TCG_TARGET_HAS_mulsh_i64 0 -#define TCG_TARGET_HAS_extrl_i64_i32 0 -#define TCG_TARGET_HAS_extrh_i64_i32 0 -#define TCG_TARGET_HAS_goto_ptr 0 - -#define TCG_TARGET_deposit_i32_valid(ofs, len) ((len) <= 16) -#define TCG_TARGET_deposit_i64_valid(ofs, len) ((len) <= 16) - -/* optional instructions automatically implemented */ -#define TCG_TARGET_HAS_neg_i32 0 /* sub r1, r0, r3 */ -#define TCG_TARGET_HAS_neg_i64 0 /* sub r1, r0, r3 */ -#define TCG_TARGET_HAS_not_i32 0 /* xor r1, -1, r3 */ -#define TCG_TARGET_HAS_not_i64 0 /* xor r1, -1, r3 */ - -static inline void flush_icache_range(uintptr_t start, uintptr_t stop) -{ - start = start & ~(32UL - 1UL); - stop = (stop + (32UL - 1UL)) & ~(32UL - 1UL); - - for (; start < stop; start += 32UL) { - asm volatile ("fc.i %0" :: "r" (start)); - } - asm volatile (";;sync.i;;srlz.i;;"); -} - -#endif diff --git a/tcg/ia64/tcg-target.inc.c b/tcg/ia64/tcg-target.inc.c deleted file mode 100644 index bf9a97d75c..0000000000 --- a/tcg/ia64/tcg-target.inc.c +++ /dev/null @@ -1,2482 +0,0 @@ -/* - * Tiny Code Generator for QEMU - * - * Copyright (c) 2009-2010 Aurelien Jarno <aurelien@aurel32.net> - * Based on i386/tcg-target.c - Copyright (c) 2008 Fabrice Bellard - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -/* - * Register definitions - */ - -#ifdef CONFIG_DEBUG_TCG -static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", - "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", - "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", - "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", - "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", - "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63", -}; -#endif - -#ifndef CONFIG_SOFTMMU -#define TCG_GUEST_BASE_REG TCG_REG_R55 -#endif - -/* Branch registers */ -enum { - TCG_REG_B0 = 0, - TCG_REG_B1, - TCG_REG_B2, - TCG_REG_B3, - TCG_REG_B4, - TCG_REG_B5, - TCG_REG_B6, - TCG_REG_B7, -}; - -/* Floating point registers */ -enum { - TCG_REG_F0 = 0, - TCG_REG_F1, - TCG_REG_F2, - TCG_REG_F3, - TCG_REG_F4, - TCG_REG_F5, - TCG_REG_F6, - TCG_REG_F7, - TCG_REG_F8, - TCG_REG_F9, - TCG_REG_F10, - TCG_REG_F11, - TCG_REG_F12, - TCG_REG_F13, - TCG_REG_F14, - TCG_REG_F15, -}; - -/* Predicate registers */ -enum { - TCG_REG_P0 = 0, - TCG_REG_P1, - TCG_REG_P2, - TCG_REG_P3, - TCG_REG_P4, - TCG_REG_P5, - TCG_REG_P6, - TCG_REG_P7, - TCG_REG_P8, - TCG_REG_P9, - TCG_REG_P10, - TCG_REG_P11, - TCG_REG_P12, - TCG_REG_P13, - TCG_REG_P14, - TCG_REG_P15, -}; - -/* Application registers */ -enum { - TCG_REG_PFS = 64, -}; - -static const int tcg_target_reg_alloc_order[] = { - TCG_REG_R35, - TCG_REG_R36, - TCG_REG_R37, - TCG_REG_R38, - TCG_REG_R39, - TCG_REG_R40, - TCG_REG_R41, - TCG_REG_R42, - TCG_REG_R43, - TCG_REG_R44, - TCG_REG_R45, - TCG_REG_R46, - TCG_REG_R47, - TCG_REG_R48, - TCG_REG_R49, - TCG_REG_R50, - TCG_REG_R51, - TCG_REG_R52, - TCG_REG_R53, - TCG_REG_R54, - TCG_REG_R55, - TCG_REG_R14, - TCG_REG_R15, - TCG_REG_R16, - TCG_REG_R17, - TCG_REG_R18, - TCG_REG_R19, - TCG_REG_R20, - TCG_REG_R21, - TCG_REG_R22, - TCG_REG_R23, - TCG_REG_R24, - TCG_REG_R25, - TCG_REG_R26, - TCG_REG_R27, - TCG_REG_R28, - TCG_REG_R29, - TCG_REG_R30, - TCG_REG_R31, - TCG_REG_R56, - TCG_REG_R57, - TCG_REG_R58, - TCG_REG_R59, - TCG_REG_R60, - TCG_REG_R61, - TCG_REG_R62, - TCG_REG_R63, - TCG_REG_R8, - TCG_REG_R9, - TCG_REG_R10, - TCG_REG_R11 -}; - -static const int tcg_target_call_iarg_regs[8] = { - TCG_REG_R56, - TCG_REG_R57, - TCG_REG_R58, - TCG_REG_R59, - TCG_REG_R60, - TCG_REG_R61, - TCG_REG_R62, - TCG_REG_R63, -}; - -static const int tcg_target_call_oarg_regs[] = { - TCG_REG_R8 -}; - -/* - * opcode formation - */ - -/* bundle templates: stops (double bar in the IA64 manual) are marked with - an uppercase letter. */ -enum { - mii = 0x00, - miI = 0x01, - mIi = 0x02, - mII = 0x03, - mlx = 0x04, - mLX = 0x05, - mmi = 0x08, - mmI = 0x09, - Mmi = 0x0a, - MmI = 0x0b, - mfi = 0x0c, - mfI = 0x0d, - mmf = 0x0e, - mmF = 0x0f, - mib = 0x10, - miB = 0x11, - mbb = 0x12, - mbB = 0x13, - bbb = 0x16, - bbB = 0x17, - mmb = 0x18, - mmB = 0x19, - mfb = 0x1c, - mfB = 0x1d, -}; - -enum { - OPC_ADD_A1 = 0x10000000000ull, - OPC_AND_A1 = 0x10060000000ull, - OPC_AND_A3 = 0x10160000000ull, - OPC_ANDCM_A1 = 0x10068000000ull, - OPC_ANDCM_A3 = 0x10168000000ull, - OPC_ADDS_A4 = 0x10800000000ull, - OPC_ADDL_A5 = 0x12000000000ull, - OPC_ALLOC_M34 = 0x02c00000000ull, - OPC_BR_DPTK_FEW_B1 = 0x08400000000ull, - OPC_BR_SPTK_MANY_B1 = 0x08000001000ull, - OPC_BR_CALL_SPNT_FEW_B3 = 0x0a200000000ull, - OPC_BR_SPTK_MANY_B4 = 0x00100001000ull, - OPC_BR_CALL_SPTK_MANY_B5 = 0x02100001000ull, - OPC_BR_RET_SPTK_MANY_B4 = 0x00108001100ull, - OPC_BRL_SPTK_MANY_X3 = 0x18000001000ull, - OPC_BRL_CALL_SPNT_MANY_X4 = 0x1a200001000ull, - OPC_BRL_CALL_SPTK_MANY_X4 = 0x1a000001000ull, - OPC_CMP_LT_A6 = 0x18000000000ull, - OPC_CMP_LTU_A6 = 0x1a000000000ull, - OPC_CMP_EQ_A6 = 0x1c000000000ull, - OPC_CMP4_LT_A6 = 0x18400000000ull, - OPC_CMP4_LTU_A6 = 0x1a400000000ull, - OPC_CMP4_EQ_A6 = 0x1c400000000ull, - OPC_DEP_I14 = 0x0ae00000000ull, - OPC_DEP_I15 = 0x08000000000ull, - OPC_DEP_Z_I12 = 0x0a600000000ull, - OPC_EXTR_I11 = 0x0a400002000ull, - OPC_EXTR_U_I11 = 0x0a400000000ull, - OPC_FCVT_FX_TRUNC_S1_F10 = 0x004d0000000ull, - OPC_FCVT_FXU_TRUNC_S1_F10 = 0x004d8000000ull, - OPC_FCVT_XF_F11 = 0x000e0000000ull, - OPC_FMA_S1_F1 = 0x10400000000ull, - OPC_FNMA_S1_F1 = 0x18400000000ull, - OPC_FRCPA_S1_F6 = 0x00600000000ull, - OPC_GETF_SIG_M19 = 0x08708000000ull, - OPC_LD1_M1 = 0x08000000000ull, - OPC_LD1_M3 = 0x0a000000000ull, - OPC_LD2_M1 = 0x08040000000ull, - OPC_LD2_M3 = 0x0a040000000ull, - OPC_LD4_M1 = 0x08080000000ull, - OPC_LD4_M3 = 0x0a080000000ull, - OPC_LD8_M1 = 0x080c0000000ull, - OPC_LD8_M3 = 0x0a0c0000000ull, - OPC_MF_M24 = 0x00110000000ull, - OPC_MUX1_I3 = 0x0eca0000000ull, - OPC_NOP_B9 = 0x04008000000ull, - OPC_NOP_F16 = 0x00008000000ull, - OPC_NOP_I18 = 0x00008000000ull, - OPC_NOP_M48 = 0x00008000000ull, - OPC_MOV_I21 = 0x00e00100000ull, - OPC_MOV_RET_I21 = 0x00e00500000ull, - OPC_MOV_I22 = 0x00188000000ull, - OPC_MOV_I_I26 = 0x00150000000ull, - OPC_MOVL_X2 = 0x0c000000000ull, - OPC_OR_A1 = 0x10070000000ull, - OPC_OR_A3 = 0x10170000000ull, - OPC_SETF_EXP_M18 = 0x0c748000000ull, - OPC_SETF_SIG_M18 = 0x0c708000000ull, - OPC_SHL_I7 = 0x0f240000000ull, - OPC_SHR_I5 = 0x0f220000000ull, - OPC_SHR_U_I5 = 0x0f200000000ull, - OPC_SHRP_I10 = 0x0ac00000000ull, - OPC_SXT1_I29 = 0x000a0000000ull, - OPC_SXT2_I29 = 0x000a8000000ull, - OPC_SXT4_I29 = 0x000b0000000ull, - OPC_ST1_M4 = 0x08c00000000ull, - OPC_ST2_M4 = 0x08c40000000ull, - OPC_ST4_M4 = 0x08c80000000ull, - OPC_ST8_M4 = 0x08cc0000000ull, - OPC_SUB_A1 = 0x10028000000ull, - OPC_SUB_A3 = 0x10128000000ull, - OPC_UNPACK4_L_I2 = 0x0f860000000ull, - OPC_XMA_L_F2 = 0x1d000000000ull, - OPC_XOR_A1 = 0x10078000000ull, - OPC_XOR_A3 = 0x10178000000ull, - OPC_ZXT1_I29 = 0x00080000000ull, - OPC_ZXT2_I29 = 0x00088000000ull, - OPC_ZXT4_I29 = 0x00090000000ull, - - INSN_NOP_M = OPC_NOP_M48, /* nop.m 0 */ - INSN_NOP_I = OPC_NOP_I18, /* nop.i 0 */ -}; - -static inline uint64_t tcg_opc_a1(int qp, uint64_t opc, int r1, - int r2, int r3) -{ - return opc - | ((r3 & 0x7f) << 20) - | ((r2 & 0x7f) << 13) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_a3(int qp, uint64_t opc, int r1, - uint64_t imm, int r3) -{ - return opc - | ((imm & 0x80) << 29) /* s */ - | ((imm & 0x7f) << 13) /* imm7b */ - | ((r3 & 0x7f) << 20) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_a4(int qp, uint64_t opc, int r1, - uint64_t imm, int r3) -{ - return opc - | ((imm & 0x2000) << 23) /* s */ - | ((imm & 0x1f80) << 20) /* imm6d */ - | ((imm & 0x007f) << 13) /* imm7b */ - | ((r3 & 0x7f) << 20) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_a5(int qp, uint64_t opc, int r1, - uint64_t imm, int r3) -{ - return opc - | ((imm & 0x200000) << 15) /* s */ - | ((imm & 0x1f0000) << 6) /* imm5c */ - | ((imm & 0x00ff80) << 20) /* imm9d */ - | ((imm & 0x00007f) << 13) /* imm7b */ - | ((r3 & 0x03) << 20) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_a6(int qp, uint64_t opc, int p1, - int p2, int r2, int r3) -{ - return opc - | ((p2 & 0x3f) << 27) - | ((r3 & 0x7f) << 20) - | ((r2 & 0x7f) << 13) - | ((p1 & 0x3f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_b1(int qp, uint64_t opc, uint64_t imm) -{ - return opc - | ((imm & 0x100000) << 16) /* s */ - | ((imm & 0x0fffff) << 13) /* imm20b */ - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_b3(int qp, uint64_t opc, int b1, uint64_t imm) -{ - return opc - | ((imm & 0x100000) << 16) /* s */ - | ((imm & 0x0fffff) << 13) /* imm20b */ - | ((b1 & 0x7) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_b4(int qp, uint64_t opc, int b2) -{ - return opc - | ((b2 & 0x7) << 13) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_b5(int qp, uint64_t opc, int b1, int b2) -{ - return opc - | ((b2 & 0x7) << 13) - | ((b1 & 0x7) << 6) - | (qp & 0x3f); -} - - -static inline uint64_t tcg_opc_b9(int qp, uint64_t opc, uint64_t imm) -{ - return opc - | ((imm & 0x100000) << 16) /* i */ - | ((imm & 0x0fffff) << 6) /* imm20a */ - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_f1(int qp, uint64_t opc, int f1, - int f3, int f4, int f2) -{ - return opc - | ((f4 & 0x7f) << 27) - | ((f3 & 0x7f) << 20) - | ((f2 & 0x7f) << 13) - | ((f1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_f2(int qp, uint64_t opc, int f1, - int f3, int f4, int f2) -{ - return opc - | ((f4 & 0x7f) << 27) - | ((f3 & 0x7f) << 20) - | ((f2 & 0x7f) << 13) - | ((f1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_f6(int qp, uint64_t opc, int f1, - int p2, int f2, int f3) -{ - return opc - | ((p2 & 0x3f) << 27) - | ((f3 & 0x7f) << 20) - | ((f2 & 0x7f) << 13) - | ((f1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_f10(int qp, uint64_t opc, int f1, int f2) -{ - return opc - | ((f2 & 0x7f) << 13) - | ((f1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_f11(int qp, uint64_t opc, int f1, int f2) -{ - return opc - | ((f2 & 0x7f) << 13) - | ((f1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_f16(int qp, uint64_t opc, uint64_t imm) -{ - return opc - | ((imm & 0x100000) << 16) /* i */ - | ((imm & 0x0fffff) << 6) /* imm20a */ - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_i2(int qp, uint64_t opc, int r1, - int r2, int r3) -{ - return opc - | ((r3 & 0x7f) << 20) - | ((r2 & 0x7f) << 13) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_i3(int qp, uint64_t opc, int r1, - int r2, int mbtype) -{ - return opc - | ((mbtype & 0x0f) << 20) - | ((r2 & 0x7f) << 13) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_i5(int qp, uint64_t opc, int r1, - int r3, int r2) -{ - return opc - | ((r3 & 0x7f) << 20) - | ((r2 & 0x7f) << 13) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_i7(int qp, uint64_t opc, int r1, - int r2, int r3) -{ - return opc - | ((r3 & 0x7f) << 20) - | ((r2 & 0x7f) << 13) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_i10(int qp, uint64_t opc, int r1, - int r2, int r3, uint64_t count) -{ - return opc - | ((count & 0x3f) << 27) - | ((r3 & 0x7f) << 20) - | ((r2 & 0x7f) << 13) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_i11(int qp, uint64_t opc, int r1, - int r3, uint64_t pos, uint64_t len) -{ - return opc - | ((len & 0x3f) << 27) - | ((r3 & 0x7f) << 20) - | ((pos & 0x3f) << 14) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_i12(int qp, uint64_t opc, int r1, - int r2, uint64_t pos, uint64_t len) -{ - return opc - | ((len & 0x3f) << 27) - | ((pos & 0x3f) << 20) - | ((r2 & 0x7f) << 13) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_i14(int qp, uint64_t opc, int r1, uint64_t imm, - int r3, uint64_t pos, uint64_t len) -{ - return opc - | ((imm & 0x01) << 36) - | ((len & 0x3f) << 27) - | ((r3 & 0x7f) << 20) - | ((pos & 0x3f) << 14) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_i15(int qp, uint64_t opc, int r1, int r2, - int r3, uint64_t pos, uint64_t len) -{ - return opc - | ((pos & 0x3f) << 31) - | ((len & 0x0f) << 27) - | ((r3 & 0x7f) << 20) - | ((r2 & 0x7f) << 13) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_i18(int qp, uint64_t opc, uint64_t imm) -{ - return opc - | ((imm & 0x100000) << 16) /* i */ - | ((imm & 0x0fffff) << 6) /* imm20a */ - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_i21(int qp, uint64_t opc, int b1, - int r2, uint64_t imm) -{ - return opc - | ((imm & 0x1ff) << 24) - | ((r2 & 0x7f) << 13) - | ((b1 & 0x7) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_i22(int qp, uint64_t opc, int r1, int b2) -{ - return opc - | ((b2 & 0x7) << 13) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_i26(int qp, uint64_t opc, int ar3, int r2) -{ - return opc - | ((ar3 & 0x7f) << 20) - | ((r2 & 0x7f) << 13) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_i29(int qp, uint64_t opc, int r1, int r3) -{ - return opc - | ((r3 & 0x7f) << 20) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_l2(uint64_t imm) -{ - return (imm & 0x7fffffffffc00000ull) >> 22; -} - -static inline uint64_t tcg_opc_l3(uint64_t imm) -{ - return (imm & 0x07fffffffff00000ull) >> 18; -} - -#define tcg_opc_l4 tcg_opc_l3 - -static inline uint64_t tcg_opc_m1(int qp, uint64_t opc, int r1, int r3) -{ - return opc - | ((r3 & 0x7f) << 20) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_m3(int qp, uint64_t opc, int r1, - int r3, uint64_t imm) -{ - return opc - | ((imm & 0x100) << 28) /* s */ - | ((imm & 0x080) << 20) /* i */ - | ((imm & 0x07f) << 13) /* imm7b */ - | ((r3 & 0x7f) << 20) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_m4(int qp, uint64_t opc, int r2, int r3) -{ - return opc - | ((r3 & 0x7f) << 20) - | ((r2 & 0x7f) << 13) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_m18(int qp, uint64_t opc, int f1, int r2) -{ - return opc - | ((r2 & 0x7f) << 13) - | ((f1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_m19(int qp, uint64_t opc, int r1, int f2) -{ - return opc - | ((f2 & 0x7f) << 13) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_m34(int qp, uint64_t opc, int r1, - int sof, int sol, int sor) -{ - return opc - | ((sor & 0x0f) << 27) - | ((sol & 0x7f) << 20) - | ((sof & 0x7f) << 13) - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_m48(int qp, uint64_t opc, uint64_t imm) -{ - return opc - | ((imm & 0x100000) << 16) /* i */ - | ((imm & 0x0fffff) << 6) /* imm20a */ - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_x2(int qp, uint64_t opc, - int r1, uint64_t imm) -{ - return opc - | ((imm & 0x8000000000000000ull) >> 27) /* i */ - | (imm & 0x0000000000200000ull) /* ic */ - | ((imm & 0x00000000001f0000ull) << 6) /* imm5c */ - | ((imm & 0x000000000000ff80ull) << 20) /* imm9d */ - | ((imm & 0x000000000000007full) << 13) /* imm7b */ - | ((r1 & 0x7f) << 6) - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_x3(int qp, uint64_t opc, uint64_t imm) -{ - return opc - | ((imm & 0x0800000000000000ull) >> 23) /* i */ - | ((imm & 0x00000000000fffffull) << 13) /* imm20b */ - | (qp & 0x3f); -} - -static inline uint64_t tcg_opc_x4(int qp, uint64_t opc, int b1, uint64_t imm) -{ - return opc - | ((imm & 0x0800000000000000ull) >> 23) /* i */ - | ((imm & 0x00000000000fffffull) << 13) /* imm20b */ - | ((b1 & 0x7) << 6) - | (qp & 0x3f); -} - - -/* - * Relocations - Note that we never encode branches elsewhere than slot 2. - */ - -static void reloc_pcrel21b_slot2(tcg_insn_unit *pc, tcg_insn_unit *target) -{ - uint64_t imm = target - pc; - - pc->hi = (pc->hi & 0xf700000fffffffffull) - | ((imm & 0x100000) << 39) /* s */ - | ((imm & 0x0fffff) << 36); /* imm20b */ -} - -static uint64_t get_reloc_pcrel21b_slot2(tcg_insn_unit *pc) -{ - int64_t high = pc->hi; - - return ((high >> 39) & 0x100000) + /* s */ - ((high >> 36) & 0x0fffff); /* imm20b */ -} - -static void patch_reloc(tcg_insn_unit *code_ptr, int type, - intptr_t value, intptr_t addend) -{ - tcg_debug_assert(addend == 0); - tcg_debug_assert(type == R_IA64_PCREL21B); - reloc_pcrel21b_slot2(code_ptr, (tcg_insn_unit *)value); -} - -/* - * Constraints - */ - -/* parse target specific constraints */ -static const char *target_parse_constraint(TCGArgConstraint *ct, - const char *ct_str, TCGType type) -{ - switch(*ct_str++) { - case 'r': - ct->ct |= TCG_CT_REG; - tcg_regset_set(ct->u.regs, 0xffffffffffffffffull); - break; - case 'I': - ct->ct |= TCG_CT_CONST_S22; - break; - case 'S': - ct->ct |= TCG_CT_REG; - tcg_regset_set(ct->u.regs, 0xffffffffffffffffull); -#if defined(CONFIG_SOFTMMU) - tcg_regset_reset_reg(ct->u.regs, TCG_REG_R56); - tcg_regset_reset_reg(ct->u.regs, TCG_REG_R57); - tcg_regset_reset_reg(ct->u.regs, TCG_REG_R58); -#endif - break; - case 'Z': - /* We are cheating a bit here, using the fact that the register - r0 is also the register number 0. Hence there is no need - to check for const_args in each instruction. */ - ct->ct |= TCG_CT_CONST_ZERO; - break; - default: - return NULL; - } - return ct_str; -} - -/* test if a constant matches the constraint */ -static inline int tcg_target_const_match(tcg_target_long val, TCGType type, - const TCGArgConstraint *arg_ct) -{ - int ct; - ct = arg_ct->ct; - if (ct & TCG_CT_CONST) - return 1; - else if ((ct & TCG_CT_CONST_ZERO) && val == 0) - return 1; - else if ((ct & TCG_CT_CONST_S22) && val == ((int32_t)val << 10) >> 10) - return 1; - else - return 0; -} - -/* - * Code generation - */ - -static tcg_insn_unit *tb_ret_addr; - -static inline void tcg_out_bundle(TCGContext *s, int template, - uint64_t slot0, uint64_t slot1, - uint64_t slot2) -{ - template &= 0x1f; /* 5 bits */ - slot0 &= 0x1ffffffffffull; /* 41 bits */ - slot1 &= 0x1ffffffffffull; /* 41 bits */ - slot2 &= 0x1ffffffffffull; /* 41 bits */ - - *s->code_ptr++ = (tcg_insn_unit){ - (slot1 << 46) | (slot0 << 5) | template, - (slot2 << 23) | (slot1 >> 18) - }; -} - -static inline uint64_t tcg_opc_mov_a(int qp, TCGReg dst, TCGReg src) -{ - return tcg_opc_a4(qp, OPC_ADDS_A4, dst, 0, src); -} - -static inline void tcg_out_mov(TCGContext *s, TCGType type, - TCGReg ret, TCGReg arg) -{ - tcg_out_bundle(s, mmI, - INSN_NOP_M, - INSN_NOP_M, - tcg_opc_mov_a(TCG_REG_P0, ret, arg)); -} - -static inline uint64_t tcg_opc_movi_a(int qp, TCGReg dst, int64_t src) -{ - tcg_debug_assert(src == sextract64(src, 0, 22)); - return tcg_opc_a5(qp, OPC_ADDL_A5, dst, src, TCG_REG_R0); -} - -static inline void tcg_out_movi(TCGContext *s, TCGType type, - TCGReg reg, tcg_target_long arg) -{ - tcg_out_bundle(s, mLX, - INSN_NOP_M, - tcg_opc_l2 (arg), - tcg_opc_x2 (TCG_REG_P0, OPC_MOVL_X2, reg, arg)); -} - -static void tcg_out_br(TCGContext *s, TCGLabel *l) -{ - uint64_t imm; - - /* We pay attention here to not modify the branch target by reading - the existing value and using it again. This ensure that caches and - memory are kept coherent during retranslation. */ - if (l->has_value) { - imm = l->u.value_ptr - s->code_ptr; - } else { - imm = get_reloc_pcrel21b_slot2(s->code_ptr); - tcg_out_reloc(s, s->code_ptr, R_IA64_PCREL21B, l, 0); - } - - tcg_out_bundle(s, mmB, - INSN_NOP_M, - INSN_NOP_M, - tcg_opc_b1(TCG_REG_P0, OPC_BR_SPTK_MANY_B1, imm)); -} - -static inline void tcg_out_call(TCGContext *s, tcg_insn_unit *desc) -{ - uintptr_t func = desc->lo, gp = desc->hi, disp; - - /* Look through the function descriptor. */ - tcg_out_bundle(s, mlx, - INSN_NOP_M, - tcg_opc_l2 (gp), - tcg_opc_x2 (TCG_REG_P0, OPC_MOVL_X2, TCG_REG_R1, gp)); - disp = (tcg_insn_unit *)func - s->code_ptr; - tcg_out_bundle(s, mLX, - INSN_NOP_M, - tcg_opc_l4 (disp), - tcg_opc_x4 (TCG_REG_P0, OPC_BRL_CALL_SPTK_MANY_X4, - TCG_REG_B0, disp)); -} - -static void tcg_out_exit_tb(TCGContext *s, tcg_target_long arg) -{ - uint64_t imm, opc1; - - /* At least arg == 0 is a common operation. */ - if (arg == sextract64(arg, 0, 22)) { - opc1 = tcg_opc_movi_a(TCG_REG_P0, TCG_REG_R8, arg); - } else { - tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R8, arg); - opc1 = INSN_NOP_M; - } - - imm = tb_ret_addr - s->code_ptr; - - tcg_out_bundle(s, mLX, - opc1, - tcg_opc_l3 (imm), - tcg_opc_x3 (TCG_REG_P0, OPC_BRL_SPTK_MANY_X3, imm)); -} - -static inline void tcg_out_goto_tb(TCGContext *s, TCGArg arg) -{ - if (s->tb_jmp_insn_offset) { - /* direct jump method */ - tcg_abort(); - } else { - /* indirect jump method */ - tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R2, - (tcg_target_long)(s->tb_jmp_target_addr + arg)); - tcg_out_bundle(s, MmI, - tcg_opc_m1 (TCG_REG_P0, OPC_LD8_M1, - TCG_REG_R2, TCG_REG_R2), - INSN_NOP_M, - tcg_opc_i21(TCG_REG_P0, OPC_MOV_I21, TCG_REG_B6, - TCG_REG_R2, 0)); - tcg_out_bundle(s, mmB, - INSN_NOP_M, - INSN_NOP_M, - tcg_opc_b4 (TCG_REG_P0, OPC_BR_SPTK_MANY_B4, - TCG_REG_B6)); - } - s->tb_jmp_reset_offset[arg] = tcg_current_code_size(s); -} - -static inline void tcg_out_jmp(TCGContext *s, TCGArg addr) -{ - tcg_out_bundle(s, mmI, - INSN_NOP_M, - INSN_NOP_M, - tcg_opc_i21(TCG_REG_P0, OPC_MOV_I21, TCG_REG_B6, addr, 0)); - tcg_out_bundle(s, mmB, - INSN_NOP_M, - INSN_NOP_M, - tcg_opc_b4(TCG_REG_P0, OPC_BR_SPTK_MANY_B4, TCG_REG_B6)); -} - -static inline void tcg_out_ld_rel(TCGContext *s, uint64_t opc_m4, TCGArg arg, - TCGArg arg1, tcg_target_long arg2) -{ - if (arg2 == ((int16_t)arg2 >> 2) << 2) { - tcg_out_bundle(s, MmI, - tcg_opc_a4(TCG_REG_P0, OPC_ADDS_A4, - TCG_REG_R2, arg2, arg1), - tcg_opc_m1 (TCG_REG_P0, opc_m4, arg, TCG_REG_R2), - INSN_NOP_I); - } else { - tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R2, arg2); - tcg_out_bundle(s, MmI, - tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, - TCG_REG_R2, TCG_REG_R2, arg1), - tcg_opc_m1 (TCG_REG_P0, opc_m4, arg, TCG_REG_R2), - INSN_NOP_I); - } -} - -static inline void tcg_out_st_rel(TCGContext *s, uint64_t opc_m4, TCGArg arg, - TCGArg arg1, tcg_target_long arg2) -{ - if (arg2 == ((int16_t)arg2 >> 2) << 2) { - tcg_out_bundle(s, MmI, - tcg_opc_a4(TCG_REG_P0, OPC_ADDS_A4, - TCG_REG_R2, arg2, arg1), - tcg_opc_m4 (TCG_REG_P0, opc_m4, arg, TCG_REG_R2), - INSN_NOP_I); - } else { - tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R2, arg2); - tcg_out_bundle(s, MmI, - tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, - TCG_REG_R2, TCG_REG_R2, arg1), - tcg_opc_m4 (TCG_REG_P0, opc_m4, arg, TCG_REG_R2), - INSN_NOP_I); - } -} - -static inline void tcg_out_ld(TCGContext *s, TCGType type, TCGReg arg, - TCGReg arg1, intptr_t arg2) -{ - if (type == TCG_TYPE_I32) { - tcg_out_ld_rel(s, OPC_LD4_M1, arg, arg1, arg2); - } else { - tcg_out_ld_rel(s, OPC_LD8_M1, arg, arg1, arg2); - } -} - -static inline void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, - TCGReg arg1, intptr_t arg2) -{ - if (type == TCG_TYPE_I32) { - tcg_out_st_rel(s, OPC_ST4_M4, arg, arg1, arg2); - } else { - tcg_out_st_rel(s, OPC_ST8_M4, arg, arg1, arg2); - } -} - -static inline bool tcg_out_sti(TCGContext *s, TCGType type, TCGArg val, - TCGReg base, intptr_t ofs) -{ - if (val == 0) { - tcg_out_st(s, type, TCG_REG_R0, base, ofs); - return true; - } - return false; -} - -static inline void tcg_out_alu(TCGContext *s, uint64_t opc_a1, uint64_t opc_a3, - TCGReg ret, TCGArg arg1, int const_arg1, - TCGArg arg2, int const_arg2) -{ - uint64_t opc1 = 0, opc2 = 0, opc3 = 0; - - if (const_arg2 && arg2 != 0) { - opc2 = tcg_opc_movi_a(TCG_REG_P0, TCG_REG_R3, arg2); - arg2 = TCG_REG_R3; - } - if (const_arg1 && arg1 != 0) { - if (opc_a3 && arg1 == (int8_t)arg1) { - opc3 = tcg_opc_a3(TCG_REG_P0, opc_a3, ret, arg1, arg2); - } else { - opc1 = tcg_opc_movi_a(TCG_REG_P0, TCG_REG_R2, arg1); - arg1 = TCG_REG_R2; - } - } - if (opc3 == 0) { - opc3 = tcg_opc_a1(TCG_REG_P0, opc_a1, ret, arg1, arg2); - } - - tcg_out_bundle(s, (opc1 || opc2 ? mII : miI), - opc1 ? opc1 : INSN_NOP_M, - opc2 ? opc2 : INSN_NOP_I, - opc3); -} - -static inline void tcg_out_add(TCGContext *s, TCGReg ret, TCGReg arg1, - TCGArg arg2, int const_arg2) -{ - if (const_arg2 && arg2 == sextract64(arg2, 0, 14)) { - tcg_out_bundle(s, mmI, - INSN_NOP_M, - INSN_NOP_M, - tcg_opc_a4(TCG_REG_P0, OPC_ADDS_A4, ret, arg2, arg1)); - } else { - tcg_out_alu(s, OPC_ADD_A1, 0, ret, arg1, 0, arg2, const_arg2); - } -} - -static inline void tcg_out_sub(TCGContext *s, TCGReg ret, TCGArg arg1, - int const_arg1, TCGArg arg2, int const_arg2) -{ - if (!const_arg1 && const_arg2 && -arg2 == sextract64(-arg2, 0, 14)) { - tcg_out_bundle(s, mmI, - INSN_NOP_M, - INSN_NOP_M, - tcg_opc_a4(TCG_REG_P0, OPC_ADDS_A4, ret, -arg2, arg1)); - } else { - tcg_out_alu(s, OPC_SUB_A1, OPC_SUB_A3, ret, - arg1, const_arg1, arg2, const_arg2); - } -} - -static inline void tcg_out_eqv(TCGContext *s, TCGArg ret, - TCGArg arg1, int const_arg1, - TCGArg arg2, int const_arg2) -{ - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_a1 (TCG_REG_P0, OPC_XOR_A1, ret, arg1, arg2), - tcg_opc_a3 (TCG_REG_P0, OPC_ANDCM_A3, ret, -1, ret)); -} - -static inline void tcg_out_nand(TCGContext *s, TCGArg ret, - TCGArg arg1, int const_arg1, - TCGArg arg2, int const_arg2) -{ - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_a1 (TCG_REG_P0, OPC_AND_A1, ret, arg1, arg2), - tcg_opc_a3 (TCG_REG_P0, OPC_ANDCM_A3, ret, -1, ret)); -} - -static inline void tcg_out_nor(TCGContext *s, TCGArg ret, - TCGArg arg1, int const_arg1, - TCGArg arg2, int const_arg2) -{ - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_a1 (TCG_REG_P0, OPC_OR_A1, ret, arg1, arg2), - tcg_opc_a3 (TCG_REG_P0, OPC_ANDCM_A3, ret, -1, ret)); -} - -static inline void tcg_out_orc(TCGContext *s, TCGArg ret, - TCGArg arg1, int const_arg1, - TCGArg arg2, int const_arg2) -{ - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_a3 (TCG_REG_P0, OPC_ANDCM_A3, TCG_REG_R2, -1, arg2), - tcg_opc_a1 (TCG_REG_P0, OPC_OR_A1, ret, arg1, TCG_REG_R2)); -} - -static inline void tcg_out_mul(TCGContext *s, TCGArg ret, - TCGArg arg1, TCGArg arg2) -{ - tcg_out_bundle(s, mmI, - tcg_opc_m18(TCG_REG_P0, OPC_SETF_SIG_M18, TCG_REG_F6, arg1), - tcg_opc_m18(TCG_REG_P0, OPC_SETF_SIG_M18, TCG_REG_F7, arg2), - INSN_NOP_I); - tcg_out_bundle(s, mmF, - INSN_NOP_M, - INSN_NOP_M, - tcg_opc_f2 (TCG_REG_P0, OPC_XMA_L_F2, TCG_REG_F6, TCG_REG_F6, - TCG_REG_F7, TCG_REG_F0)); - tcg_out_bundle(s, miI, - tcg_opc_m19(TCG_REG_P0, OPC_GETF_SIG_M19, ret, TCG_REG_F6), - INSN_NOP_I, - INSN_NOP_I); -} - -static inline void tcg_out_sar_i32(TCGContext *s, TCGArg ret, TCGArg arg1, - TCGArg arg2, int const_arg2) -{ - if (const_arg2) { - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_i11(TCG_REG_P0, OPC_EXTR_I11, - ret, arg1, arg2, 31 - arg2)); - } else { - tcg_out_bundle(s, mII, - tcg_opc_a3 (TCG_REG_P0, OPC_AND_A3, - TCG_REG_R3, 0x1f, arg2), - tcg_opc_i29(TCG_REG_P0, OPC_SXT4_I29, TCG_REG_R2, arg1), - tcg_opc_i5 (TCG_REG_P0, OPC_SHR_I5, ret, - TCG_REG_R2, TCG_REG_R3)); - } -} - -static inline void tcg_out_sar_i64(TCGContext *s, TCGArg ret, TCGArg arg1, - TCGArg arg2, int const_arg2) -{ - if (const_arg2) { - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_i11(TCG_REG_P0, OPC_EXTR_I11, - ret, arg1, arg2, 63 - arg2)); - } else { - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_i5 (TCG_REG_P0, OPC_SHR_I5, ret, arg1, arg2)); - } -} - -static inline void tcg_out_shl_i32(TCGContext *s, TCGArg ret, TCGArg arg1, - TCGArg arg2, int const_arg2) -{ - if (const_arg2) { - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, ret, - arg1, 63 - arg2, 31 - arg2)); - } else { - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_a3 (TCG_REG_P0, OPC_AND_A3, TCG_REG_R2, - 0x1f, arg2), - tcg_opc_i7 (TCG_REG_P0, OPC_SHL_I7, ret, - arg1, TCG_REG_R2)); - } -} - -static inline void tcg_out_shl_i64(TCGContext *s, TCGArg ret, TCGArg arg1, - TCGArg arg2, int const_arg2) -{ - if (const_arg2) { - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, ret, - arg1, 63 - arg2, 63 - arg2)); - } else { - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_i7 (TCG_REG_P0, OPC_SHL_I7, ret, - arg1, arg2)); - } -} - -static inline void tcg_out_shr_i32(TCGContext *s, TCGArg ret, TCGArg arg1, - TCGArg arg2, int const_arg2) -{ - if (const_arg2) { - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_i11(TCG_REG_P0, OPC_EXTR_U_I11, ret, - arg1, arg2, 31 - arg2)); - } else { - tcg_out_bundle(s, mII, - tcg_opc_a3 (TCG_REG_P0, OPC_AND_A3, TCG_REG_R3, - 0x1f, arg2), - tcg_opc_i29(TCG_REG_P0, OPC_ZXT4_I29, TCG_REG_R2, arg1), - tcg_opc_i5 (TCG_REG_P0, OPC_SHR_U_I5, ret, - TCG_REG_R2, TCG_REG_R3)); - } -} - -static inline void tcg_out_shr_i64(TCGContext *s, TCGArg ret, TCGArg arg1, - TCGArg arg2, int const_arg2) -{ - if (const_arg2) { - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_i11(TCG_REG_P0, OPC_EXTR_U_I11, ret, - arg1, arg2, 63 - arg2)); - } else { - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_i5 (TCG_REG_P0, OPC_SHR_U_I5, ret, - arg1, arg2)); - } -} - -static inline void tcg_out_rotl_i32(TCGContext *s, TCGArg ret, TCGArg arg1, - TCGArg arg2, int const_arg2) -{ - if (const_arg2) { - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_i2 (TCG_REG_P0, OPC_UNPACK4_L_I2, - TCG_REG_R2, arg1, arg1), - tcg_opc_i11(TCG_REG_P0, OPC_EXTR_U_I11, ret, - TCG_REG_R2, 32 - arg2, 31)); - } else { - tcg_out_bundle(s, miI, - INSN_NOP_M, - tcg_opc_i2 (TCG_REG_P0, OPC_UNPACK4_L_I2, - TCG_REG_R2, arg1, arg1), - tcg_opc_a3 (TCG_REG_P0, OPC_AND_A3, TCG_REG_R3, - 0x1f, arg2)); - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_a3 (TCG_REG_P0, OPC_SUB_A3, TCG_REG_R3, - 0x20, TCG_REG_R3), - tcg_opc_i5 (TCG_REG_P0, OPC_SHR_U_I5, ret, - TCG_REG_R2, TCG_REG_R3)); - } -} - -static inline void tcg_out_rotl_i64(TCGContext *s, TCGArg ret, TCGArg arg1, - TCGArg arg2, int const_arg2) -{ - if (const_arg2) { - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_i10(TCG_REG_P0, OPC_SHRP_I10, ret, arg1, - arg1, 0x40 - arg2)); - } else { - tcg_out_bundle(s, mII, - tcg_opc_a3 (TCG_REG_P0, OPC_SUB_A3, TCG_REG_R2, - 0x40, arg2), - tcg_opc_i7 (TCG_REG_P0, OPC_SHL_I7, TCG_REG_R3, - arg1, arg2), - tcg_opc_i5 (TCG_REG_P0, OPC_SHR_U_I5, TCG_REG_R2, - arg1, TCG_REG_R2)); - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_a1 (TCG_REG_P0, OPC_OR_A1, ret, - TCG_REG_R2, TCG_REG_R3)); - } -} - -static inline void tcg_out_rotr_i32(TCGContext *s, TCGArg ret, TCGArg arg1, - TCGArg arg2, int const_arg2) -{ - if (const_arg2) { - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_i2 (TCG_REG_P0, OPC_UNPACK4_L_I2, - TCG_REG_R2, arg1, arg1), - tcg_opc_i11(TCG_REG_P0, OPC_EXTR_U_I11, ret, - TCG_REG_R2, arg2, 31)); - } else { - tcg_out_bundle(s, mII, - tcg_opc_a3 (TCG_REG_P0, OPC_AND_A3, TCG_REG_R3, - 0x1f, arg2), - tcg_opc_i2 (TCG_REG_P0, OPC_UNPACK4_L_I2, - TCG_REG_R2, arg1, arg1), - tcg_opc_i5 (TCG_REG_P0, OPC_SHR_U_I5, ret, - TCG_REG_R2, TCG_REG_R3)); - } -} - -static inline void tcg_out_rotr_i64(TCGContext *s, TCGArg ret, TCGArg arg1, - TCGArg arg2, int const_arg2) -{ - if (const_arg2) { - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_i10(TCG_REG_P0, OPC_SHRP_I10, ret, arg1, - arg1, arg2)); - } else { - tcg_out_bundle(s, mII, - tcg_opc_a3 (TCG_REG_P0, OPC_SUB_A3, TCG_REG_R2, - 0x40, arg2), - tcg_opc_i5 (TCG_REG_P0, OPC_SHR_U_I5, TCG_REG_R3, - arg1, arg2), - tcg_opc_i7 (TCG_REG_P0, OPC_SHL_I7, TCG_REG_R2, - arg1, TCG_REG_R2)); - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_a1 (TCG_REG_P0, OPC_OR_A1, ret, - TCG_REG_R2, TCG_REG_R3)); - } -} - -static const uint64_t opc_ext_i29[8] = { - OPC_ZXT1_I29, OPC_ZXT2_I29, OPC_ZXT4_I29, 0, - OPC_SXT1_I29, OPC_SXT2_I29, OPC_SXT4_I29, 0 -}; - -static inline uint64_t tcg_opc_ext_i(int qp, TCGMemOp opc, TCGReg d, TCGReg s) -{ - if ((opc & MO_SIZE) == MO_64) { - return tcg_opc_mov_a(qp, d, s); - } else { - return tcg_opc_i29(qp, opc_ext_i29[opc & MO_SSIZE], d, s); - } -} - -static inline void tcg_out_ext(TCGContext *s, uint64_t opc_i29, - TCGArg ret, TCGArg arg) -{ - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_i29(TCG_REG_P0, opc_i29, ret, arg)); -} - -static inline uint64_t tcg_opc_bswap64_i(int qp, TCGReg d, TCGReg s) -{ - return tcg_opc_i3(qp, OPC_MUX1_I3, d, s, 0xb); -} - -static inline void tcg_out_bswap16(TCGContext *s, TCGArg ret, TCGArg arg) -{ - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, ret, arg, 15, 15), - tcg_opc_bswap64_i(TCG_REG_P0, ret, ret)); -} - -static inline void tcg_out_bswap32(TCGContext *s, TCGArg ret, TCGArg arg) -{ - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, ret, arg, 31, 31), - tcg_opc_bswap64_i(TCG_REG_P0, ret, ret)); -} - -static inline void tcg_out_bswap64(TCGContext *s, TCGArg ret, TCGArg arg) -{ - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_bswap64_i(TCG_REG_P0, ret, arg)); -} - -static inline void tcg_out_deposit(TCGContext *s, TCGArg ret, TCGArg a1, - TCGArg a2, int const_a2, int pos, int len) -{ - uint64_t i1 = 0, i2 = 0; - int cpos = 63 - pos, lm1 = len - 1; - - if (const_a2) { - /* Truncate the value of a constant a2 to the width of the field. */ - int mask = (1u << len) - 1; - a2 &= mask; - - if (a2 == 0 || a2 == mask) { - /* 1-bit signed constant inserted into register. */ - i2 = tcg_opc_i14(TCG_REG_P0, OPC_DEP_I14, ret, a2, a1, cpos, lm1); - } else { - /* Otherwise, load any constant into a temporary. Do this into - the first I slot to help out with cross-unit delays. */ - i1 = tcg_opc_movi_a(TCG_REG_P0, TCG_REG_R2, a2); - a2 = TCG_REG_R2; - } - } - if (i2 == 0) { - i2 = tcg_opc_i15(TCG_REG_P0, OPC_DEP_I15, ret, a2, a1, cpos, lm1); - } - tcg_out_bundle(s, (i1 ? mII : miI), - INSN_NOP_M, - i1 ? i1 : INSN_NOP_I, - i2); -} - -static inline uint64_t tcg_opc_cmp_a(int qp, TCGCond cond, TCGArg arg1, - TCGArg arg2, int cmp4) -{ - uint64_t opc_eq_a6, opc_lt_a6, opc_ltu_a6; - - if (cmp4) { - opc_eq_a6 = OPC_CMP4_EQ_A6; - opc_lt_a6 = OPC_CMP4_LT_A6; - opc_ltu_a6 = OPC_CMP4_LTU_A6; - } else { - opc_eq_a6 = OPC_CMP_EQ_A6; - opc_lt_a6 = OPC_CMP_LT_A6; - opc_ltu_a6 = OPC_CMP_LTU_A6; - } - - switch (cond) { - case TCG_COND_EQ: - return tcg_opc_a6 (qp, opc_eq_a6, TCG_REG_P6, TCG_REG_P7, arg1, arg2); - case TCG_COND_NE: - return tcg_opc_a6 (qp, opc_eq_a6, TCG_REG_P7, TCG_REG_P6, arg1, arg2); - case TCG_COND_LT: - return tcg_opc_a6 (qp, opc_lt_a6, TCG_REG_P6, TCG_REG_P7, arg1, arg2); - case TCG_COND_LTU: - return tcg_opc_a6 (qp, opc_ltu_a6, TCG_REG_P6, TCG_REG_P7, arg1, arg2); - case TCG_COND_GE: - return tcg_opc_a6 (qp, opc_lt_a6, TCG_REG_P7, TCG_REG_P6, arg1, arg2); - case TCG_COND_GEU: - return tcg_opc_a6 (qp, opc_ltu_a6, TCG_REG_P7, TCG_REG_P6, arg1, arg2); - case TCG_COND_LE: - return tcg_opc_a6 (qp, opc_lt_a6, TCG_REG_P7, TCG_REG_P6, arg2, arg1); - case TCG_COND_LEU: - return tcg_opc_a6 (qp, opc_ltu_a6, TCG_REG_P7, TCG_REG_P6, arg2, arg1); - case TCG_COND_GT: - return tcg_opc_a6 (qp, opc_lt_a6, TCG_REG_P6, TCG_REG_P7, arg2, arg1); - case TCG_COND_GTU: - return tcg_opc_a6 (qp, opc_ltu_a6, TCG_REG_P6, TCG_REG_P7, arg2, arg1); - default: - tcg_abort(); - break; - } -} - -static inline void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1, - TCGReg arg2, TCGLabel *l, int cmp4) -{ - uint64_t imm; - - /* We pay attention here to not modify the branch target by reading - the existing value and using it again. This ensure that caches and - memory are kept coherent during retranslation. */ - if (l->has_value) { - imm = l->u.value_ptr - s->code_ptr; - } else { - imm = get_reloc_pcrel21b_slot2(s->code_ptr); - tcg_out_reloc(s, s->code_ptr, R_IA64_PCREL21B, l, 0); - } - - tcg_out_bundle(s, miB, - INSN_NOP_M, - tcg_opc_cmp_a(TCG_REG_P0, cond, arg1, arg2, cmp4), - tcg_opc_b1(TCG_REG_P6, OPC_BR_DPTK_FEW_B1, imm)); -} - -static inline void tcg_out_setcond(TCGContext *s, TCGCond cond, TCGArg ret, - TCGArg arg1, TCGArg arg2, int cmp4) -{ - tcg_out_bundle(s, MmI, - tcg_opc_cmp_a(TCG_REG_P0, cond, arg1, arg2, cmp4), - tcg_opc_movi_a(TCG_REG_P6, ret, 1), - tcg_opc_movi_a(TCG_REG_P7, ret, 0)); -} - -static inline void tcg_out_movcond(TCGContext *s, TCGCond cond, TCGArg ret, - TCGArg c1, TCGArg c2, - TCGArg v1, int const_v1, - TCGArg v2, int const_v2, int cmp4) -{ - uint64_t opc1, opc2; - - if (const_v1) { - opc1 = tcg_opc_movi_a(TCG_REG_P6, ret, v1); - } else if (ret == v1) { - opc1 = INSN_NOP_M; - } else { - opc1 = tcg_opc_mov_a(TCG_REG_P6, ret, v1); - } - if (const_v2) { - opc2 = tcg_opc_movi_a(TCG_REG_P7, ret, v2); - } else if (ret == v2) { - opc2 = INSN_NOP_I; - } else { - opc2 = tcg_opc_mov_a(TCG_REG_P7, ret, v2); - } - - tcg_out_bundle(s, MmI, - tcg_opc_cmp_a(TCG_REG_P0, cond, c1, c2, cmp4), - opc1, - opc2); -} - -#if defined(CONFIG_SOFTMMU) -/* We're expecting to use an signed 22-bit immediate add. */ -QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table[NB_MMU_MODES - 1][1]) - > 0x1fffff) - -/* Load and compare a TLB entry, and return the result in (p6, p7). - R2 is loaded with the addend TLB entry. - R57 is loaded with the address, zero extented on 32-bit targets. - R1, R3 are clobbered, leaving R56 free for... - BSWAP_1, BSWAP_2 and I-slot insns for swapping data for store. */ -static inline void tcg_out_qemu_tlb(TCGContext *s, TCGReg addr_reg, - TCGMemOp opc, int off_rw, int off_add, - uint64_t bswap1, uint64_t bswap2) -{ - unsigned s_bits = opc & MO_SIZE; - unsigned a_bits = get_alignment_bits(opc); - - /* We don't support unaligned accesses, but overalignment is easy. */ - if (a_bits < s_bits) { - a_bits = s_bits; - } - - /* - .mii - mov r2 = off_rw - extr.u r3 = addr_reg, ... # extract tlb page - zxt4 r57 = addr_reg # or mov for 64-bit guest - ;; - .mii - addl r2 = r2, areg0 - shl r3 = r3, cteb # via dep.z - dep r1 = 0, r57, ... # zero page ofs, keep align - ;; - .mmi - add r2 = r2, r3 - ;; - ld4 r3 = [r2], off_add-off_rw # or ld8 for 64-bit guest - nop - ;; - .mmi - nop - cmp.eq p6, p7 = r3, r58 - nop - ;; - */ - tcg_out_bundle(s, miI, - tcg_opc_movi_a(TCG_REG_P0, TCG_REG_R2, off_rw), - tcg_opc_i11(TCG_REG_P0, OPC_EXTR_U_I11, TCG_REG_R3, - addr_reg, TARGET_PAGE_BITS, CPU_TLB_BITS - 1), - tcg_opc_ext_i(TCG_REG_P0, - TARGET_LONG_BITS == 32 ? MO_UL : MO_Q, - TCG_REG_R57, addr_reg)); - tcg_out_bundle(s, miI, - tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, TCG_REG_R2, - TCG_REG_R2, TCG_AREG0), - tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, TCG_REG_R3, - TCG_REG_R3, 63 - CPU_TLB_ENTRY_BITS, - 63 - CPU_TLB_ENTRY_BITS), - tcg_opc_i14(TCG_REG_P0, OPC_DEP_I14, TCG_REG_R1, 0, - TCG_REG_R57, 63 - a_bits, - TARGET_PAGE_BITS - a_bits - 1)); - tcg_out_bundle(s, MmI, - tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, - TCG_REG_R2, TCG_REG_R2, TCG_REG_R3), - tcg_opc_m3 (TCG_REG_P0, - (TARGET_LONG_BITS == 32 - ? OPC_LD4_M3 : OPC_LD8_M3), TCG_REG_R3, - TCG_REG_R2, off_add - off_rw), - bswap1); - tcg_out_bundle(s, mmI, - tcg_opc_m1 (TCG_REG_P0, OPC_LD8_M1, TCG_REG_R2, TCG_REG_R2), - tcg_opc_a6 (TCG_REG_P0, OPC_CMP_EQ_A6, TCG_REG_P6, - TCG_REG_P7, TCG_REG_R1, TCG_REG_R3), - bswap2); -} - -typedef struct TCGLabelQemuLdst { - bool is_ld; - TCGMemOp size; - tcg_insn_unit *label_ptr; /* label pointers to be updated */ - struct TCGLabelQemuLdst *next; -} TCGLabelQemuLdst; - -typedef struct TCGBackendData { - TCGLabelQemuLdst *labels; -} TCGBackendData; - -static inline void tcg_out_tb_init(TCGContext *s) -{ - s->be->labels = NULL; -} - -static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGMemOp opc, - tcg_insn_unit *label_ptr) -{ - TCGBackendData *be = s->be; - TCGLabelQemuLdst *l = tcg_malloc(sizeof(*l)); - - l->is_ld = is_ld; - l->size = opc & MO_SIZE; - l->label_ptr = label_ptr; - l->next = be->labels; - be->labels = l; -} - -static bool tcg_out_tb_finalize(TCGContext *s) -{ - static const void * const helpers[8] = { - helper_ret_stb_mmu, - helper_le_stw_mmu, - helper_le_stl_mmu, - helper_le_stq_mmu, - helper_ret_ldub_mmu, - helper_le_lduw_mmu, - helper_le_ldul_mmu, - helper_le_ldq_mmu, - }; - tcg_insn_unit *thunks[8] = { }; - TCGLabelQemuLdst *l; - - for (l = s->be->labels; l != NULL; l = l->next) { - long x = l->is_ld * 4 + l->size; - tcg_insn_unit *dest = thunks[x]; - - /* The out-of-line thunks are all the same; load the return address - from B0, load the GP, and branch to the code. Note that we are - always post-call, so the register window has rolled, so we're - using incoming parameter register numbers, not outgoing. */ - if (dest == NULL) { - uintptr_t *desc = (uintptr_t *)helpers[x]; - uintptr_t func = desc[0], gp = desc[1], disp; - - thunks[x] = dest = s->code_ptr; - - tcg_out_bundle(s, mlx, - INSN_NOP_M, - tcg_opc_l2 (gp), - tcg_opc_x2 (TCG_REG_P0, OPC_MOVL_X2, - TCG_REG_R1, gp)); - tcg_out_bundle(s, mii, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_i22(TCG_REG_P0, OPC_MOV_I22, - l->is_ld ? TCG_REG_R35 : TCG_REG_R36, - TCG_REG_B0)); - disp = (tcg_insn_unit *)func - s->code_ptr; - tcg_out_bundle(s, mLX, - INSN_NOP_M, - tcg_opc_l3 (disp), - tcg_opc_x3 (TCG_REG_P0, OPC_BRL_SPTK_MANY_X3, disp)); - } - - reloc_pcrel21b_slot2(l->label_ptr, dest); - - /* Test for (pending) buffer overflow. The assumption is that any - one operation beginning below the high water mark cannot overrun - the buffer completely. Thus we can test for overflow after - generating code without having to check during generation. */ - if (unlikely((void *)s->code_ptr > s->code_gen_highwater)) { - return false; - } - } - return true; -} - -static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args) -{ - static const uint64_t opc_ld_m1[4] = { - OPC_LD1_M1, OPC_LD2_M1, OPC_LD4_M1, OPC_LD8_M1 - }; - int addr_reg, data_reg, mem_index; - TCGMemOpIdx oi; - TCGMemOp opc, s_bits; - uint64_t fin1, fin2; - tcg_insn_unit *label_ptr; - - data_reg = args[0]; - addr_reg = args[1]; - oi = args[2]; - opc = get_memop(oi); - mem_index = get_mmuidx(oi); - s_bits = opc & MO_SIZE; - - /* Read the TLB entry */ - tcg_out_qemu_tlb(s, addr_reg, opc, - offsetof(CPUArchState, tlb_table[mem_index][0].addr_read), - offsetof(CPUArchState, tlb_table[mem_index][0].addend), - INSN_NOP_I, INSN_NOP_I); - - /* P6 is the fast path, and P7 the slow path */ - - fin2 = 0; - if (opc & MO_BSWAP) { - fin1 = tcg_opc_bswap64_i(TCG_REG_P0, data_reg, TCG_REG_R8); - if (s_bits < MO_64) { - int shift = 64 - (8 << s_bits); - fin2 = (opc & MO_SIGN ? OPC_EXTR_I11 : OPC_EXTR_U_I11); - fin2 = tcg_opc_i11(TCG_REG_P0, fin2, - data_reg, data_reg, shift, 63 - shift); - } - } else { - fin1 = tcg_opc_ext_i(TCG_REG_P0, opc, data_reg, TCG_REG_R8); - } - - tcg_out_bundle(s, mmI, - tcg_opc_mov_a(TCG_REG_P7, TCG_REG_R56, TCG_AREG0), - tcg_opc_a1 (TCG_REG_P6, OPC_ADD_A1, TCG_REG_R2, - TCG_REG_R2, TCG_REG_R57), - tcg_opc_movi_a(TCG_REG_P7, TCG_REG_R58, oi)); - label_ptr = s->code_ptr; - tcg_out_bundle(s, miB, - tcg_opc_m1 (TCG_REG_P6, opc_ld_m1[s_bits], - TCG_REG_R8, TCG_REG_R2), - INSN_NOP_I, - tcg_opc_b3 (TCG_REG_P7, OPC_BR_CALL_SPNT_FEW_B3, TCG_REG_B0, - get_reloc_pcrel21b_slot2(label_ptr))); - - add_qemu_ldst_label(s, 1, opc, label_ptr); - - /* Note that we always use LE helper functions, so the bswap insns - here for the fast path also apply to the slow path. */ - tcg_out_bundle(s, (fin2 ? mII : miI), - INSN_NOP_M, - fin1, - fin2 ? fin2 : INSN_NOP_I); -} - -static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args) -{ - static const uint64_t opc_st_m4[4] = { - OPC_ST1_M4, OPC_ST2_M4, OPC_ST4_M4, OPC_ST8_M4 - }; - TCGReg addr_reg, data_reg; - int mem_index; - uint64_t pre1, pre2; - TCGMemOpIdx oi; - TCGMemOp opc, s_bits; - tcg_insn_unit *label_ptr; - - data_reg = args[0]; - addr_reg = args[1]; - oi = args[2]; - opc = get_memop(oi); - mem_index = get_mmuidx(oi); - s_bits = opc & MO_SIZE; - - /* Note that we always use LE helper functions, so the bswap insns - that are here for the fast path also apply to the slow path, - and move the data into the argument register. */ - pre2 = INSN_NOP_I; - if (opc & MO_BSWAP) { - pre1 = tcg_opc_bswap64_i(TCG_REG_P0, TCG_REG_R58, data_reg); - if (s_bits < MO_64) { - int shift = 64 - (8 << s_bits); - pre2 = tcg_opc_i11(TCG_REG_P0, OPC_EXTR_U_I11, - TCG_REG_R58, TCG_REG_R58, shift, 63 - shift); - } - } else { - /* Just move the data into place for the slow path. */ - pre1 = tcg_opc_ext_i(TCG_REG_P0, opc, TCG_REG_R58, data_reg); - } - - tcg_out_qemu_tlb(s, addr_reg, opc, - offsetof(CPUArchState, tlb_table[mem_index][0].addr_write), - offsetof(CPUArchState, tlb_table[mem_index][0].addend), - pre1, pre2); - - /* P6 is the fast path, and P7 the slow path */ - tcg_out_bundle(s, mmI, - tcg_opc_mov_a(TCG_REG_P7, TCG_REG_R56, TCG_AREG0), - tcg_opc_a1 (TCG_REG_P6, OPC_ADD_A1, TCG_REG_R2, - TCG_REG_R2, TCG_REG_R57), - tcg_opc_movi_a(TCG_REG_P7, TCG_REG_R59, oi)); - label_ptr = s->code_ptr; - tcg_out_bundle(s, miB, - tcg_opc_m4 (TCG_REG_P6, opc_st_m4[s_bits], - TCG_REG_R58, TCG_REG_R2), - INSN_NOP_I, - tcg_opc_b3 (TCG_REG_P7, OPC_BR_CALL_SPNT_FEW_B3, TCG_REG_B0, - get_reloc_pcrel21b_slot2(label_ptr))); - - add_qemu_ldst_label(s, 0, opc, label_ptr); -} - -#else /* !CONFIG_SOFTMMU */ -# include "tcg-be-null.h" - -static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args) -{ - static uint64_t const opc_ld_m1[4] = { - OPC_LD1_M1, OPC_LD2_M1, OPC_LD4_M1, OPC_LD8_M1 - }; - int addr_reg, data_reg; - TCGMemOp opc, s_bits, bswap; - - data_reg = args[0]; - addr_reg = args[1]; - opc = args[2]; - s_bits = opc & MO_SIZE; - bswap = opc & MO_BSWAP; - -#if TARGET_LONG_BITS == 32 - if (guest_base != 0) { - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_i29(TCG_REG_P0, OPC_ZXT4_I29, - TCG_REG_R3, addr_reg), - tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, TCG_REG_R2, - TCG_GUEST_BASE_REG, TCG_REG_R3)); - } else { - tcg_out_bundle(s, miI, - INSN_NOP_M, - tcg_opc_i29(TCG_REG_P0, OPC_ZXT4_I29, - TCG_REG_R2, addr_reg), - INSN_NOP_I); - } - - if (!bswap) { - if (!(opc & MO_SIGN)) { - tcg_out_bundle(s, miI, - tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits], - data_reg, TCG_REG_R2), - INSN_NOP_I, - INSN_NOP_I); - } else { - tcg_out_bundle(s, mII, - tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits], - data_reg, TCG_REG_R2), - INSN_NOP_I, - tcg_opc_ext_i(TCG_REG_P0, opc, data_reg, data_reg)); - } - } else if (s_bits == MO_64) { - tcg_out_bundle(s, mII, - tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits], - data_reg, TCG_REG_R2), - INSN_NOP_I, - tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg)); - } else { - if (s_bits == MO_16) { - tcg_out_bundle(s, mII, - tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits], - data_reg, TCG_REG_R2), - INSN_NOP_I, - tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, - data_reg, data_reg, 15, 15)); - } else { - tcg_out_bundle(s, mII, - tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits], - data_reg, TCG_REG_R2), - INSN_NOP_I, - tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, - data_reg, data_reg, 31, 31)); - } - if (!(opc & MO_SIGN)) { - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg)); - } else { - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg), - tcg_opc_ext_i(TCG_REG_P0, opc, data_reg, data_reg)); - } - } -#else - if (guest_base != 0) { - tcg_out_bundle(s, MmI, - tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, TCG_REG_R2, - TCG_GUEST_BASE_REG, addr_reg), - tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits], - data_reg, TCG_REG_R2), - INSN_NOP_I); - } else { - tcg_out_bundle(s, mmI, - INSN_NOP_M, - tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits], - data_reg, addr_reg), - INSN_NOP_I); - } - - if (bswap && s_bits == MO_16) { - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, - data_reg, data_reg, 15, 15), - tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg)); - } else if (bswap && s_bits == MO_32) { - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, - data_reg, data_reg, 31, 31), - tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg)); - } else if (bswap && s_bits == MO_64) { - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg)); - } - if (opc & MO_SIGN) { - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_ext_i(TCG_REG_P0, opc, data_reg, data_reg)); - } -#endif -} - -static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args) -{ - static uint64_t const opc_st_m4[4] = { - OPC_ST1_M4, OPC_ST2_M4, OPC_ST4_M4, OPC_ST8_M4 - }; - int addr_reg, data_reg; -#if TARGET_LONG_BITS == 64 - uint64_t add_guest_base; -#endif - TCGMemOp opc, s_bits, bswap; - - data_reg = args[0]; - addr_reg = args[1]; - opc = args[2]; - s_bits = opc & MO_SIZE; - bswap = opc & MO_BSWAP; - -#if TARGET_LONG_BITS == 32 - if (guest_base != 0) { - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_i29(TCG_REG_P0, OPC_ZXT4_I29, - TCG_REG_R3, addr_reg), - tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, TCG_REG_R2, - TCG_GUEST_BASE_REG, TCG_REG_R3)); - } else { - tcg_out_bundle(s, miI, - INSN_NOP_M, - tcg_opc_i29(TCG_REG_P0, OPC_ZXT4_I29, - TCG_REG_R2, addr_reg), - INSN_NOP_I); - } - - if (bswap) { - if (s_bits == MO_16) { - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, - TCG_REG_R3, data_reg, 15, 15), - tcg_opc_bswap64_i(TCG_REG_P0, - TCG_REG_R3, TCG_REG_R3)); - data_reg = TCG_REG_R3; - } else if (s_bits == MO_32) { - tcg_out_bundle(s, mII, - INSN_NOP_M, - tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, - TCG_REG_R3, data_reg, 31, 31), - tcg_opc_bswap64_i(TCG_REG_P0, - TCG_REG_R3, TCG_REG_R3)); - data_reg = TCG_REG_R3; - } else if (s_bits == MO_64) { - tcg_out_bundle(s, miI, - INSN_NOP_M, - INSN_NOP_I, - tcg_opc_bswap64_i(TCG_REG_P0, TCG_REG_R3, data_reg)); - data_reg = TCG_REG_R3; - } - } - tcg_out_bundle(s, mmI, - tcg_opc_m4 (TCG_REG_P0, opc_st_m4[s_bits], - data_reg, TCG_REG_R2), - INSN_NOP_M, - INSN_NOP_I); -#else - if (guest_base != 0) { - add_guest_base = tcg_opc_a1 (TCG_REG_P0, OPC_ADD_A1, TCG_REG_R2, - TCG_GUEST_BASE_REG, addr_reg); - addr_reg = TCG_REG_R2; - } else { - add_guest_base = INSN_NOP_M; - } - - if (!bswap) { - tcg_out_bundle(s, (guest_base ? MmI : mmI), - add_guest_base, - tcg_opc_m4 (TCG_REG_P0, opc_st_m4[s_bits], - data_reg, addr_reg), - INSN_NOP_I); - } else { - if (s_bits == MO_16) { - tcg_out_bundle(s, mII, - add_guest_base, - tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, - TCG_REG_R3, data_reg, 15, 15), - tcg_opc_bswap64_i(TCG_REG_P0, - TCG_REG_R3, TCG_REG_R3)); - data_reg = TCG_REG_R3; - } else if (s_bits == MO_32) { - tcg_out_bundle(s, mII, - add_guest_base, - tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, - TCG_REG_R3, data_reg, 31, 31), - tcg_opc_bswap64_i(TCG_REG_P0, - TCG_REG_R3, TCG_REG_R3)); - data_reg = TCG_REG_R3; - } else if (s_bits == MO_64) { - tcg_out_bundle(s, miI, - add_guest_base, - INSN_NOP_I, - tcg_opc_bswap64_i(TCG_REG_P0, TCG_REG_R3, data_reg)); - data_reg = TCG_REG_R3; - } - tcg_out_bundle(s, miI, - tcg_opc_m4 (TCG_REG_P0, opc_st_m4[s_bits], - data_reg, addr_reg), - INSN_NOP_I, - INSN_NOP_I); - } -#endif -} - -#endif - -static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, - const TCGArg *args, const int *const_args) -{ - switch(opc) { - case INDEX_op_exit_tb: - tcg_out_exit_tb(s, args[0]); - break; - case INDEX_op_br: - tcg_out_br(s, arg_label(args[0])); - break; - case INDEX_op_goto_tb: - tcg_out_goto_tb(s, args[0]); - break; - - case INDEX_op_ld8u_i32: - case INDEX_op_ld8u_i64: - tcg_out_ld_rel(s, OPC_LD1_M1, args[0], args[1], args[2]); - break; - case INDEX_op_ld8s_i32: - case INDEX_op_ld8s_i64: - tcg_out_ld_rel(s, OPC_LD1_M1, args[0], args[1], args[2]); - tcg_out_ext(s, OPC_SXT1_I29, args[0], args[0]); - break; - case INDEX_op_ld16u_i32: - case INDEX_op_ld16u_i64: - tcg_out_ld_rel(s, OPC_LD2_M1, args[0], args[1], args[2]); - break; - case INDEX_op_ld16s_i32: - case INDEX_op_ld16s_i64: - tcg_out_ld_rel(s, OPC_LD2_M1, args[0], args[1], args[2]); - tcg_out_ext(s, OPC_SXT2_I29, args[0], args[0]); - break; - case INDEX_op_ld_i32: - case INDEX_op_ld32u_i64: - tcg_out_ld_rel(s, OPC_LD4_M1, args[0], args[1], args[2]); - break; - case INDEX_op_ld32s_i64: - tcg_out_ld_rel(s, OPC_LD4_M1, args[0], args[1], args[2]); - tcg_out_ext(s, OPC_SXT4_I29, args[0], args[0]); - break; - case INDEX_op_ld_i64: - tcg_out_ld_rel(s, OPC_LD8_M1, args[0], args[1], args[2]); - break; - case INDEX_op_st8_i32: - case INDEX_op_st8_i64: - tcg_out_st_rel(s, OPC_ST1_M4, args[0], args[1], args[2]); - break; - case INDEX_op_st16_i32: - case INDEX_op_st16_i64: - tcg_out_st_rel(s, OPC_ST2_M4, args[0], args[1], args[2]); - break; - case INDEX_op_st_i32: - case INDEX_op_st32_i64: - tcg_out_st_rel(s, OPC_ST4_M4, args[0], args[1], args[2]); - break; - case INDEX_op_st_i64: - tcg_out_st_rel(s, OPC_ST8_M4, args[0], args[1], args[2]); - break; - - case INDEX_op_add_i32: - case INDEX_op_add_i64: - tcg_out_add(s, args[0], args[1], args[2], const_args[2]); - break; - case INDEX_op_sub_i32: - case INDEX_op_sub_i64: - tcg_out_sub(s, args[0], args[1], const_args[1], args[2], const_args[2]); - break; - - case INDEX_op_and_i32: - case INDEX_op_and_i64: - /* TCG expects arg2 constant; A3 expects arg1 constant. Swap. */ - tcg_out_alu(s, OPC_AND_A1, OPC_AND_A3, args[0], - args[2], const_args[2], args[1], const_args[1]); - break; - case INDEX_op_andc_i32: - case INDEX_op_andc_i64: - tcg_out_alu(s, OPC_ANDCM_A1, OPC_ANDCM_A3, args[0], - args[1], const_args[1], args[2], const_args[2]); - break; - case INDEX_op_eqv_i32: - case INDEX_op_eqv_i64: - tcg_out_eqv(s, args[0], args[1], const_args[1], - args[2], const_args[2]); - break; - case INDEX_op_nand_i32: - case INDEX_op_nand_i64: - tcg_out_nand(s, args[0], args[1], const_args[1], - args[2], const_args[2]); - break; - case INDEX_op_nor_i32: - case INDEX_op_nor_i64: - tcg_out_nor(s, args[0], args[1], const_args[1], - args[2], const_args[2]); - break; - case INDEX_op_or_i32: - case INDEX_op_or_i64: - /* TCG expects arg2 constant; A3 expects arg1 constant. Swap. */ - tcg_out_alu(s, OPC_OR_A1, OPC_OR_A3, args[0], - args[2], const_args[2], args[1], const_args[1]); - break; - case INDEX_op_orc_i32: - case INDEX_op_orc_i64: - tcg_out_orc(s, args[0], args[1], const_args[1], - args[2], const_args[2]); - break; - case INDEX_op_xor_i32: - case INDEX_op_xor_i64: - /* TCG expects arg2 constant; A3 expects arg1 constant. Swap. */ - tcg_out_alu(s, OPC_XOR_A1, OPC_XOR_A3, args[0], - args[2], const_args[2], args[1], const_args[1]); - break; - - case INDEX_op_mul_i32: - case INDEX_op_mul_i64: - tcg_out_mul(s, args[0], args[1], args[2]); - break; - - case INDEX_op_sar_i32: - tcg_out_sar_i32(s, args[0], args[1], args[2], const_args[2]); - break; - case INDEX_op_sar_i64: - tcg_out_sar_i64(s, args[0], args[1], args[2], const_args[2]); - break; - case INDEX_op_shl_i32: - tcg_out_shl_i32(s, args[0], args[1], args[2], const_args[2]); - break; - case INDEX_op_shl_i64: - tcg_out_shl_i64(s, args[0], args[1], args[2], const_args[2]); - break; - case INDEX_op_shr_i32: - tcg_out_shr_i32(s, args[0], args[1], args[2], const_args[2]); - break; - case INDEX_op_shr_i64: - tcg_out_shr_i64(s, args[0], args[1], args[2], const_args[2]); - break; - case INDEX_op_rotl_i32: - tcg_out_rotl_i32(s, args[0], args[1], args[2], const_args[2]); - break; - case INDEX_op_rotl_i64: - tcg_out_rotl_i64(s, args[0], args[1], args[2], const_args[2]); - break; - case INDEX_op_rotr_i32: - tcg_out_rotr_i32(s, args[0], args[1], args[2], const_args[2]); - break; - case INDEX_op_rotr_i64: - tcg_out_rotr_i64(s, args[0], args[1], args[2], const_args[2]); - break; - - case INDEX_op_ext8s_i32: - case INDEX_op_ext8s_i64: - tcg_out_ext(s, OPC_SXT1_I29, args[0], args[1]); - break; - case INDEX_op_ext8u_i32: - case INDEX_op_ext8u_i64: - tcg_out_ext(s, OPC_ZXT1_I29, args[0], args[1]); - break; - case INDEX_op_ext16s_i32: - case INDEX_op_ext16s_i64: - tcg_out_ext(s, OPC_SXT2_I29, args[0], args[1]); - break; - case INDEX_op_ext16u_i32: - case INDEX_op_ext16u_i64: - tcg_out_ext(s, OPC_ZXT2_I29, args[0], args[1]); - break; - case INDEX_op_ext_i32_i64: - case INDEX_op_ext32s_i64: - tcg_out_ext(s, OPC_SXT4_I29, args[0], args[1]); - break; - case INDEX_op_extu_i32_i64: - case INDEX_op_ext32u_i64: - tcg_out_ext(s, OPC_ZXT4_I29, args[0], args[1]); - break; - - case INDEX_op_bswap16_i32: - case INDEX_op_bswap16_i64: - tcg_out_bswap16(s, args[0], args[1]); - break; - case INDEX_op_bswap32_i32: - case INDEX_op_bswap32_i64: - tcg_out_bswap32(s, args[0], args[1]); - break; - case INDEX_op_bswap64_i64: - tcg_out_bswap64(s, args[0], args[1]); - break; - - case INDEX_op_deposit_i32: - case INDEX_op_deposit_i64: - tcg_out_deposit(s, args[0], args[1], args[2], const_args[2], - args[3], args[4]); - break; - - case INDEX_op_brcond_i32: - tcg_out_brcond(s, args[2], args[0], args[1], arg_label(args[3]), 1); - break; - case INDEX_op_brcond_i64: - tcg_out_brcond(s, args[2], args[0], args[1], arg_label(args[3]), 0); - break; - case INDEX_op_setcond_i32: - tcg_out_setcond(s, args[3], args[0], args[1], args[2], 1); - break; - case INDEX_op_setcond_i64: - tcg_out_setcond(s, args[3], args[0], args[1], args[2], 0); - break; - case INDEX_op_movcond_i32: - tcg_out_movcond(s, args[5], args[0], args[1], args[2], - args[3], const_args[3], args[4], const_args[4], 1); - break; - case INDEX_op_movcond_i64: - tcg_out_movcond(s, args[5], args[0], args[1], args[2], - args[3], const_args[3], args[4], const_args[4], 0); - break; - - case INDEX_op_qemu_ld_i32: - tcg_out_qemu_ld(s, args); - break; - case INDEX_op_qemu_ld_i64: - tcg_out_qemu_ld(s, args); - break; - case INDEX_op_qemu_st_i32: - tcg_out_qemu_st(s, args); - break; - case INDEX_op_qemu_st_i64: - tcg_out_qemu_st(s, args); - break; - - case INDEX_op_mb: - tcg_out_bundle(s, mmI, OPC_MF_M24, INSN_NOP_M, INSN_NOP_I); - break; - case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ - case INDEX_op_mov_i64: - case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ - case INDEX_op_movi_i64: - case INDEX_op_call: /* Always emitted via tcg_out_call. */ - default: - tcg_abort(); - } -} - -static const TCGTargetOpDef ia64_op_defs[] = { - { INDEX_op_br, { } }, - { INDEX_op_exit_tb, { } }, - { INDEX_op_goto_tb, { } }, - - { INDEX_op_ld8u_i32, { "r", "r" } }, - { INDEX_op_ld8s_i32, { "r", "r" } }, - { INDEX_op_ld16u_i32, { "r", "r" } }, - { INDEX_op_ld16s_i32, { "r", "r" } }, - { INDEX_op_ld_i32, { "r", "r" } }, - { INDEX_op_st8_i32, { "rZ", "r" } }, - { INDEX_op_st16_i32, { "rZ", "r" } }, - { INDEX_op_st_i32, { "rZ", "r" } }, - - { INDEX_op_add_i32, { "r", "rZ", "rI" } }, - { INDEX_op_sub_i32, { "r", "rI", "rI" } }, - - { INDEX_op_and_i32, { "r", "rI", "rI" } }, - { INDEX_op_andc_i32, { "r", "rI", "rI" } }, - { INDEX_op_eqv_i32, { "r", "rZ", "rZ" } }, - { INDEX_op_nand_i32, { "r", "rZ", "rZ" } }, - { INDEX_op_nor_i32, { "r", "rZ", "rZ" } }, - { INDEX_op_or_i32, { "r", "rI", "rI" } }, - { INDEX_op_orc_i32, { "r", "rZ", "rZ" } }, - { INDEX_op_xor_i32, { "r", "rI", "rI" } }, - - { INDEX_op_mul_i32, { "r", "rZ", "rZ" } }, - - { INDEX_op_sar_i32, { "r", "rZ", "ri" } }, - { INDEX_op_shl_i32, { "r", "rZ", "ri" } }, - { INDEX_op_shr_i32, { "r", "rZ", "ri" } }, - { INDEX_op_rotl_i32, { "r", "rZ", "ri" } }, - { INDEX_op_rotr_i32, { "r", "rZ", "ri" } }, - - { INDEX_op_ext8s_i32, { "r", "rZ"} }, - { INDEX_op_ext8u_i32, { "r", "rZ"} }, - { INDEX_op_ext16s_i32, { "r", "rZ"} }, - { INDEX_op_ext16u_i32, { "r", "rZ"} }, - - { INDEX_op_bswap16_i32, { "r", "rZ" } }, - { INDEX_op_bswap32_i32, { "r", "rZ" } }, - - { INDEX_op_brcond_i32, { "rZ", "rZ" } }, - { INDEX_op_setcond_i32, { "r", "rZ", "rZ" } }, - { INDEX_op_movcond_i32, { "r", "rZ", "rZ", "rI", "rI" } }, - - { INDEX_op_ld8u_i64, { "r", "r" } }, - { INDEX_op_ld8s_i64, { "r", "r" } }, - { INDEX_op_ld16u_i64, { "r", "r" } }, - { INDEX_op_ld16s_i64, { "r", "r" } }, - { INDEX_op_ld32u_i64, { "r", "r" } }, - { INDEX_op_ld32s_i64, { "r", "r" } }, - { INDEX_op_ld_i64, { "r", "r" } }, - { INDEX_op_st8_i64, { "rZ", "r" } }, - { INDEX_op_st16_i64, { "rZ", "r" } }, - { INDEX_op_st32_i64, { "rZ", "r" } }, - { INDEX_op_st_i64, { "rZ", "r" } }, - - { INDEX_op_add_i64, { "r", "rZ", "rI" } }, - { INDEX_op_sub_i64, { "r", "rI", "rI" } }, - - { INDEX_op_and_i64, { "r", "rI", "rI" } }, - { INDEX_op_andc_i64, { "r", "rI", "rI" } }, - { INDEX_op_eqv_i64, { "r", "rZ", "rZ" } }, - { INDEX_op_nand_i64, { "r", "rZ", "rZ" } }, - { INDEX_op_nor_i64, { "r", "rZ", "rZ" } }, - { INDEX_op_or_i64, { "r", "rI", "rI" } }, - { INDEX_op_orc_i64, { "r", "rZ", "rZ" } }, - { INDEX_op_xor_i64, { "r", "rI", "rI" } }, - - { INDEX_op_mul_i64, { "r", "rZ", "rZ" } }, - - { INDEX_op_sar_i64, { "r", "rZ", "ri" } }, - { INDEX_op_shl_i64, { "r", "rZ", "ri" } }, - { INDEX_op_shr_i64, { "r", "rZ", "ri" } }, - { INDEX_op_rotl_i64, { "r", "rZ", "ri" } }, - { INDEX_op_rotr_i64, { "r", "rZ", "ri" } }, - - { INDEX_op_ext8s_i64, { "r", "rZ"} }, - { INDEX_op_ext8u_i64, { "r", "rZ"} }, - { INDEX_op_ext16s_i64, { "r", "rZ"} }, - { INDEX_op_ext16u_i64, { "r", "rZ"} }, - { INDEX_op_ext32s_i64, { "r", "rZ"} }, - { INDEX_op_ext32u_i64, { "r", "rZ"} }, - { INDEX_op_ext_i32_i64, { "r", "rZ" } }, - { INDEX_op_extu_i32_i64, { "r", "rZ" } }, - - { INDEX_op_bswap16_i64, { "r", "rZ" } }, - { INDEX_op_bswap32_i64, { "r", "rZ" } }, - { INDEX_op_bswap64_i64, { "r", "rZ" } }, - - { INDEX_op_brcond_i64, { "rZ", "rZ" } }, - { INDEX_op_setcond_i64, { "r", "rZ", "rZ" } }, - { INDEX_op_movcond_i64, { "r", "rZ", "rZ", "rI", "rI" } }, - - { INDEX_op_deposit_i32, { "r", "rZ", "ri" } }, - { INDEX_op_deposit_i64, { "r", "rZ", "ri" } }, - - { INDEX_op_qemu_ld_i32, { "r", "r" } }, - { INDEX_op_qemu_ld_i64, { "r", "r" } }, - { INDEX_op_qemu_st_i32, { "SZ", "r" } }, - { INDEX_op_qemu_st_i64, { "SZ", "r" } }, - - { INDEX_op_mb, { } }, - { -1 }, -}; - -static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) -{ - int i, n = ARRAY_SIZE(ia64_op_defs); - - for (i = 0; i < n; ++i) { - if (ia64_op_defs[i].op == op) { - return &ia64_op_defs[i]; - } - } - return NULL; -} - -/* Generate global QEMU prologue and epilogue code */ -static void tcg_target_qemu_prologue(TCGContext *s) -{ - int frame_size; - - /* reserve some stack space */ - frame_size = TCG_STATIC_CALL_ARGS_SIZE + - CPU_TEMP_BUF_NLONGS * sizeof(long); - frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) & - ~(TCG_TARGET_STACK_ALIGN - 1); - tcg_set_frame(s, TCG_REG_CALL_STACK, TCG_STATIC_CALL_ARGS_SIZE, - CPU_TEMP_BUF_NLONGS * sizeof(long)); - - /* First emit adhoc function descriptor */ - *s->code_ptr = (tcg_insn_unit){ - (uint64_t)(s->code_ptr + 1), /* entry point */ - 0 /* skip gp */ - }; - s->code_ptr++; - - /* prologue */ - tcg_out_bundle(s, miI, - tcg_opc_m34(TCG_REG_P0, OPC_ALLOC_M34, - TCG_REG_R34, 32, 24, 0), - INSN_NOP_I, - tcg_opc_i21(TCG_REG_P0, OPC_MOV_I21, - TCG_REG_B6, TCG_REG_R33, 0)); - - /* ??? If guest_base < 0x200000, we could load the register via - an ADDL in the M slot of the next bundle. */ - if (guest_base != 0) { - tcg_out_bundle(s, mlx, - INSN_NOP_M, - tcg_opc_l2(guest_base), - tcg_opc_x2 (TCG_REG_P0, OPC_MOVL_X2, - TCG_GUEST_BASE_REG, guest_base)); - tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); - } - - tcg_out_bundle(s, miB, - tcg_opc_a4 (TCG_REG_P0, OPC_ADDS_A4, - TCG_REG_R12, -frame_size, TCG_REG_R12), - tcg_opc_i22(TCG_REG_P0, OPC_MOV_I22, - TCG_REG_R33, TCG_REG_B0), - tcg_opc_b4 (TCG_REG_P0, OPC_BR_SPTK_MANY_B4, TCG_REG_B6)); - - /* epilogue */ - tb_ret_addr = s->code_ptr; - tcg_out_bundle(s, miI, - INSN_NOP_M, - tcg_opc_i21(TCG_REG_P0, OPC_MOV_I21, - TCG_REG_B0, TCG_REG_R33, 0), - tcg_opc_a4 (TCG_REG_P0, OPC_ADDS_A4, - TCG_REG_R12, frame_size, TCG_REG_R12)); - tcg_out_bundle(s, miB, - INSN_NOP_M, - tcg_opc_i26(TCG_REG_P0, OPC_MOV_I_I26, - TCG_REG_PFS, TCG_REG_R34), - tcg_opc_b4 (TCG_REG_P0, OPC_BR_RET_SPTK_MANY_B4, - TCG_REG_B0)); -} - -static void tcg_target_init(TCGContext *s) -{ - tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I32], - 0xffffffffffffffffull); - tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I64], - 0xffffffffffffffffull); - - tcg_regset_clear(tcg_target_call_clobber_regs); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R8); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R9); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R10); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R11); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R14); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R15); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R16); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R17); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R18); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R19); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R20); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R21); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R22); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R23); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R24); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R25); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R26); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R27); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R28); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R29); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R30); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R31); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R56); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R57); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R58); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R59); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R60); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R61); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R62); - tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_R63); - - tcg_regset_clear(s->reserved_regs); - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0); /* zero register */ - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R1); /* global pointer */ - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R2); /* internal use */ - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R3); /* internal use */ - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R12); /* stack pointer */ - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R13); /* thread pointer */ - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R33); /* return address */ - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R34); /* PFS */ - - /* The following 4 are not in use, are call-saved, but *not* saved - by the prologue. Therefore we cannot use them without modifying - the prologue. There doesn't seem to be any good reason to use - these as opposed to the windowed registers. */ - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R4); - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R5); - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R6); - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R7); -} diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index d75cb63ed3..e9558d15bc 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -206,4 +206,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop) cacheflush ((void *)start, stop-start, ICACHE); } +#define TCG_TARGET_DEFAULT_MO (0) + #endif diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index 5f4a40a5b4..5a092b038a 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -125,4 +125,6 @@ extern bool have_isa_3_00; void flush_icache_range(uintptr_t start, uintptr_t stop); +#define TCG_TARGET_DEFAULT_MO (0) + #endif diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index 957f0c0afe..bedda5edf6 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -58,6 +58,8 @@ typedef enum TCGReg { #define FACILITY_GEN_INST_EXT (1ULL << (63 - 34)) #define FACILITY_LOAD_ON_COND (1ULL << (63 - 45)) #define FACILITY_FAST_BCR_SER FACILITY_LOAD_ON_COND +#define FACILITY_DISTINCT_OPS FACILITY_LOAD_ON_COND +#define FACILITY_LOAD_ON_COND2 (1ULL << (63 - 53)) extern uint64_t s390_facilities; @@ -133,6 +135,8 @@ extern uint64_t s390_facilities; #define TCG_TARGET_EXTEND_ARGS 1 +#define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) + enum { TCG_AREG0 = TCG_REG_R10, }; diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index 5d7083e90c..38b9e791ee 100644 --- a/tcg/s390/tcg-target.inc.c +++ b/tcg/s390/tcg-target.inc.c @@ -38,12 +38,13 @@ a 32-bit displacement here Just In Case. */ #define USE_LONG_BRANCHES 0 -#define TCG_CT_CONST_MULI 0x100 -#define TCG_CT_CONST_ORI 0x200 -#define TCG_CT_CONST_XORI 0x400 -#define TCG_CT_CONST_CMPI 0x800 -#define TCG_CT_CONST_ADLI 0x1000 -#define TCG_CT_CONST_ZERO 0x2000 +#define TCG_CT_CONST_S16 0x100 +#define TCG_CT_CONST_S32 0x200 +#define TCG_CT_CONST_NN16 0x400 +#define TCG_CT_CONST_NN32 0x800 +#define TCG_CT_CONST_U31 0x1000 +#define TCG_CT_CONST_S33 0x2000 +#define TCG_CT_CONST_ZERO 0x4000 /* Several places within the instruction set 0 means "no register" rather than TCG_REG_R0. */ @@ -121,6 +122,7 @@ typedef enum S390Opcode { RIE_CLGIJ = 0xec7d, RIE_CLRJ = 0xec77, RIE_CRJ = 0xec76, + RIE_LOCGHI = 0xec46, RIE_RISBG = 0xec55, RRE_AGR = 0xb908, @@ -158,6 +160,16 @@ typedef enum S390Opcode { RRF_LOCR = 0xb9f2, RRF_LOCGR = 0xb9e2, + RRF_NRK = 0xb9f4, + RRF_NGRK = 0xb9e4, + RRF_ORK = 0xb9f6, + RRF_OGRK = 0xb9e6, + RRF_SRK = 0xb9f9, + RRF_SGRK = 0xb9e9, + RRF_SLRK = 0xb9fb, + RRF_SLGRK = 0xb9eb, + RRF_XRK = 0xb9f7, + RRF_XGRK = 0xb9e7, RR_AR = 0x1a, RR_ALR = 0x1e, @@ -178,8 +190,11 @@ typedef enum S390Opcode { RSY_RLL = 0xeb1d, RSY_RLLG = 0xeb1c, RSY_SLLG = 0xeb0d, + RSY_SLLK = 0xebdf, RSY_SRAG = 0xeb0a, + RSY_SRAK = 0xebdc, RSY_SRLG = 0xeb0c, + RSY_SRLK = 0xebde, RS_SLL = 0x89, RS_SRA = 0x8a, @@ -386,19 +401,33 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, tcg_regset_set_reg(ct->u.regs, TCG_REG_R3); break; case 'A': - ct->ct |= TCG_CT_CONST_ADLI; + ct->ct |= TCG_CT_CONST_S33; break; - case 'K': - ct->ct |= TCG_CT_CONST_MULI; + case 'I': + ct->ct |= TCG_CT_CONST_S16; break; - case 'O': - ct->ct |= TCG_CT_CONST_ORI; + case 'J': + ct->ct |= TCG_CT_CONST_S32; break; - case 'X': - ct->ct |= TCG_CT_CONST_XORI; + case 'N': + ct->ct |= TCG_CT_CONST_NN16; + break; + case 'M': + ct->ct |= TCG_CT_CONST_NN32; break; case 'C': - ct->ct |= TCG_CT_CONST_CMPI; + /* ??? We have no insight here into whether the comparison is + signed or unsigned. The COMPARE IMMEDIATE insn uses a 32-bit + signed immediate, and the COMPARE LOGICAL IMMEDIATE insn uses + a 32-bit unsigned immediate. If we were to use the (semi) + obvious "val == (int32_t)val" we would be enabling unsigned + comparisons vs very large numbers. The only solution is to + take the intersection of the ranges. */ + /* ??? Another possible solution is to simply lie and allow all + constants here and force the out-of-range values into a temp + register in tgen_cmp when we have knowledge of the actual + comparison code in use. */ + ct->ct |= TCG_CT_CONST_U31; break; case 'Z': ct->ct |= TCG_CT_CONST_ZERO; @@ -409,103 +438,6 @@ static const char *target_parse_constraint(TCGArgConstraint *ct, return ct_str; } -/* Immediates to be used with logical OR. This is an optimization only, - since a full 64-bit immediate OR can always be performed with 4 sequential - OI[LH][LH] instructions. What we're looking for is immediates that we - can load efficiently, and the immediate load plus the reg-reg OR is - smaller than the sequential OI's. */ - -static int tcg_match_ori(TCGType type, tcg_target_long val) -{ - if (s390_facilities & FACILITY_EXT_IMM) { - if (type == TCG_TYPE_I32) { - /* All 32-bit ORs can be performed with 1 48-bit insn. */ - return 1; - } - } - - /* Look for negative values. These are best to load with LGHI. */ - if (val < 0) { - if (val == (int16_t)val) { - return 0; - } - if (s390_facilities & FACILITY_EXT_IMM) { - if (val == (int32_t)val) { - return 0; - } - } - } - - return 1; -} - -/* Immediates to be used with logical XOR. This is almost, but not quite, - only an optimization. XOR with immediate is only supported with the - extended-immediate facility. That said, there are a few patterns for - which it is better to load the value into a register first. */ - -static int tcg_match_xori(TCGType type, tcg_target_long val) -{ - if ((s390_facilities & FACILITY_EXT_IMM) == 0) { - return 0; - } - - if (type == TCG_TYPE_I32) { - /* All 32-bit XORs can be performed with 1 48-bit insn. */ - return 1; - } - - /* Look for negative values. These are best to load with LGHI. */ - if (val < 0 && val == (int32_t)val) { - return 0; - } - - return 1; -} - -/* Imediates to be used with comparisons. */ - -static int tcg_match_cmpi(TCGType type, tcg_target_long val) -{ - if (s390_facilities & FACILITY_EXT_IMM) { - /* The COMPARE IMMEDIATE instruction is available. */ - if (type == TCG_TYPE_I32) { - /* We have a 32-bit immediate and can compare against anything. */ - return 1; - } else { - /* ??? We have no insight here into whether the comparison is - signed or unsigned. The COMPARE IMMEDIATE insn uses a 32-bit - signed immediate, and the COMPARE LOGICAL IMMEDIATE insn uses - a 32-bit unsigned immediate. If we were to use the (semi) - obvious "val == (int32_t)val" we would be enabling unsigned - comparisons vs very large numbers. The only solution is to - take the intersection of the ranges. */ - /* ??? Another possible solution is to simply lie and allow all - constants here and force the out-of-range values into a temp - register in tgen_cmp when we have knowledge of the actual - comparison code in use. */ - return val >= 0 && val <= 0x7fffffff; - } - } else { - /* Only the LOAD AND TEST instruction is available. */ - return val == 0; - } -} - -/* Immediates to be used with add2/sub2. */ - -static int tcg_match_add2i(TCGType type, tcg_target_long val) -{ - if (s390_facilities & FACILITY_EXT_IMM) { - if (type == TCG_TYPE_I32) { - return 1; - } else if (val >= -0xffffffffll && val <= 0xffffffffll) { - return 1; - } - } - return 0; -} - /* Test if a constant matches the constraint. */ static int tcg_target_const_match(tcg_target_long val, TCGType type, const TCGArgConstraint *arg_ct) @@ -521,24 +453,18 @@ static int tcg_target_const_match(tcg_target_long val, TCGType type, } /* The following are mutually exclusive. */ - if (ct & TCG_CT_CONST_MULI) { - /* Immediates that may be used with multiply. If we have the - general-instruction-extensions, then we have MULTIPLY SINGLE - IMMEDIATE with a signed 32-bit, otherwise we have only - MULTIPLY HALFWORD IMMEDIATE, with a signed 16-bit. */ - if (s390_facilities & FACILITY_GEN_INST_EXT) { - return val == (int32_t)val; - } else { - return val == (int16_t)val; - } - } else if (ct & TCG_CT_CONST_ADLI) { - return tcg_match_add2i(type, val); - } else if (ct & TCG_CT_CONST_ORI) { - return tcg_match_ori(type, val); - } else if (ct & TCG_CT_CONST_XORI) { - return tcg_match_xori(type, val); - } else if (ct & TCG_CT_CONST_CMPI) { - return tcg_match_cmpi(type, val); + if (ct & TCG_CT_CONST_S16) { + return val == (int16_t)val; + } else if (ct & TCG_CT_CONST_S32) { + return val == (int32_t)val; + } else if (ct & TCG_CT_CONST_S33) { + return val >= -0xffffffffll && val <= 0xffffffffll; + } else if (ct & TCG_CT_CONST_NN16) { + return !(val < 0 && val == (int16_t)val); + } else if (ct & TCG_CT_CONST_NN32) { + return !(val < 0 && val == (int32_t)val); + } else if (ct & TCG_CT_CONST_U31) { + return val >= 0 && val <= 0x7fffffff; } else if (ct & TCG_CT_CONST_ZERO) { return val == 0; } @@ -570,6 +496,13 @@ static void tcg_out_insn_RI(TCGContext *s, S390Opcode op, TCGReg r1, int i2) tcg_out32(s, (op << 16) | (r1 << 20) | (i2 & 0xffff)); } +static void tcg_out_insn_RIE(TCGContext *s, S390Opcode op, TCGReg r1, + int i2, int m3) +{ + tcg_out16(s, (op & 0xff00) | (r1 << 4) | m3); + tcg_out32(s, (i2 << 16) | (op & 0xff)); +} + static void tcg_out_insn_RIL(TCGContext *s, S390Opcode op, TCGReg r1, int i2) { tcg_out16(s, op | (r1 << 4)); @@ -1138,11 +1071,33 @@ static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond, TCGReg dest, TCGReg c1, TCGArg c2, int c2const) { int cc; + bool have_loc; + + /* With LOC2, we can always emit the minimum 3 insns. */ + if (s390_facilities & FACILITY_LOAD_ON_COND2) { + /* Emit: d = 0, d = (cc ? 1 : d). */ + cc = tgen_cmp(s, type, cond, c1, c2, c2const, false); + tcg_out_movi(s, TCG_TYPE_I64, dest, 0); + tcg_out_insn(s, RIE, LOCGHI, dest, 1, cc); + return; + } + have_loc = (s390_facilities & FACILITY_LOAD_ON_COND) != 0; + + /* For HAVE_LOC, only the paths through GTU/GT/LEU/LE are smaller. */ + restart: switch (cond) { + case TCG_COND_NE: + /* X != 0 is X > 0. */ + if (c2const && c2 == 0) { + cond = TCG_COND_GTU; + } else { + break; + } + /* fallthru */ + case TCG_COND_GTU: case TCG_COND_GT: - do_greater: /* The result of a compare has CC=2 for GT and CC=3 unused. ADD LOGICAL WITH CARRY considers (CC & 2) the carry bit. */ tgen_cmp(s, type, cond, c1, c2, c2const, true); @@ -1150,34 +1105,34 @@ static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond, tcg_out_insn(s, RRE, ALCGR, dest, dest); return; - case TCG_COND_GEU: - do_geu: - /* We need "real" carry semantics, so use SUBTRACT LOGICAL - instead of COMPARE LOGICAL. This needs an extra move. */ - tcg_out_mov(s, type, TCG_TMP0, c1); - if (c2const) { - tcg_out_movi(s, TCG_TYPE_I64, dest, 0); - if (type == TCG_TYPE_I32) { - tcg_out_insn(s, RIL, SLFI, TCG_TMP0, c2); - } else { - tcg_out_insn(s, RIL, SLGFI, TCG_TMP0, c2); - } + case TCG_COND_EQ: + /* X == 0 is X <= 0. */ + if (c2const && c2 == 0) { + cond = TCG_COND_LEU; } else { - if (type == TCG_TYPE_I32) { - tcg_out_insn(s, RR, SLR, TCG_TMP0, c2); - } else { - tcg_out_insn(s, RRE, SLGR, TCG_TMP0, c2); - } - tcg_out_movi(s, TCG_TYPE_I64, dest, 0); + break; } - tcg_out_insn(s, RRE, ALCGR, dest, dest); - return; + /* fallthru */ case TCG_COND_LEU: + case TCG_COND_LE: + /* As above, but we're looking for borrow, or !carry. + The second insn computes d - d - borrow, or -1 for true + and 0 for false. So we must mask to 1 bit afterward. */ + tgen_cmp(s, type, cond, c1, c2, c2const, true); + tcg_out_insn(s, RRE, SLBGR, dest, dest); + tgen_andi(s, type, dest, 1); + return; + + case TCG_COND_GEU: case TCG_COND_LTU: case TCG_COND_LT: - /* Swap operands so that we can use GEU/GTU/GT. */ + case TCG_COND_GE: + /* Swap operands so that we can use LEU/GTU/GT/LE. */ if (c2const) { + if (have_loc) { + break; + } tcg_out_movi(s, type, TCG_TMP0, c2); c2 = c1; c2const = 0; @@ -1187,37 +1142,15 @@ static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond, c1 = c2; c2 = t; } - if (cond == TCG_COND_LEU) { - goto do_geu; - } cond = tcg_swap_cond(cond); - goto do_greater; - - case TCG_COND_NE: - /* X != 0 is X > 0. */ - if (c2const && c2 == 0) { - cond = TCG_COND_GTU; - goto do_greater; - } - break; - - case TCG_COND_EQ: - /* X == 0 is X <= 0 is 0 >= X. */ - if (c2const && c2 == 0) { - tcg_out_movi(s, TCG_TYPE_I64, TCG_TMP0, 0); - c2 = c1; - c2const = 0; - c1 = TCG_TMP0; - goto do_geu; - } - break; + goto restart; default: - break; + g_assert_not_reached(); } cc = tgen_cmp(s, type, cond, c1, c2, c2const, false); - if (s390_facilities & FACILITY_LOAD_ON_COND) { + if (have_loc) { /* Emit: d = 0, t = 1, d = (cc ? t : d). */ tcg_out_movi(s, TCG_TYPE_I64, dest, 0); tcg_out_movi(s, TCG_TYPE_I64, TCG_TMP0, 1); @@ -1231,19 +1164,24 @@ static void tgen_setcond(TCGContext *s, TCGType type, TCGCond cond, } static void tgen_movcond(TCGContext *s, TCGType type, TCGCond c, TCGReg dest, - TCGReg c1, TCGArg c2, int c2const, TCGReg r3) + TCGReg c1, TCGArg c2, int c2const, + TCGArg v3, int v3const) { int cc; if (s390_facilities & FACILITY_LOAD_ON_COND) { cc = tgen_cmp(s, type, c, c1, c2, c2const, false); - tcg_out_insn(s, RRF, LOCGR, dest, r3, cc); + if (v3const) { + tcg_out_insn(s, RIE, LOCGHI, dest, v3, cc); + } else { + tcg_out_insn(s, RRF, LOCGR, dest, v3, cc); + } } else { c = tcg_invert_cond(c); cc = tgen_cmp(s, type, c, c1, c2, c2const, false); /* Emit: if (cc) goto over; dest = r3; over: */ tcg_out_insn(s, RI, BRC, cc, (4 + 4) >> 1); - tcg_out_insn(s, RRE, LGR, dest, r3); + tcg_out_insn(s, RRE, LGR, dest, v3); } } @@ -1736,7 +1674,7 @@ static void tcg_out_qemu_st(TCGContext* s, TCGReg data_reg, TCGReg addr_reg, static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, const int *const_args) { - S390Opcode op; + S390Opcode op, op2; TCGArg a0, a1, a2; switch (opc) { @@ -1841,29 +1779,44 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, if (const_args[2]) { a2 = -a2; goto do_addi_32; + } else if (a0 == a1) { + tcg_out_insn(s, RR, SR, a0, a2); + } else { + tcg_out_insn(s, RRF, SRK, a0, a1, a2); } - tcg_out_insn(s, RR, SR, args[0], args[2]); break; case INDEX_op_and_i32: + a0 = args[0], a1 = args[1], a2 = (uint32_t)args[2]; if (const_args[2]) { - tgen_andi(s, TCG_TYPE_I32, args[0], args[2]); + tcg_out_mov(s, TCG_TYPE_I32, a0, a1); + tgen_andi(s, TCG_TYPE_I32, a0, a2); + } else if (a0 == a1) { + tcg_out_insn(s, RR, NR, a0, a2); } else { - tcg_out_insn(s, RR, NR, args[0], args[2]); + tcg_out_insn(s, RRF, NRK, a0, a1, a2); } break; case INDEX_op_or_i32: + a0 = args[0], a1 = args[1], a2 = (uint32_t)args[2]; if (const_args[2]) { - tgen64_ori(s, args[0], args[2] & 0xffffffff); + tcg_out_mov(s, TCG_TYPE_I32, a0, a1); + tgen64_ori(s, a0, a2); + } else if (a0 == a1) { + tcg_out_insn(s, RR, OR, a0, a2); } else { - tcg_out_insn(s, RR, OR, args[0], args[2]); + tcg_out_insn(s, RRF, ORK, a0, a1, a2); } break; case INDEX_op_xor_i32: + a0 = args[0], a1 = args[1], a2 = (uint32_t)args[2]; if (const_args[2]) { - tgen64_xori(s, args[0], args[2] & 0xffffffff); - } else { + tcg_out_mov(s, TCG_TYPE_I32, a0, a1); + tgen64_xori(s, a0, a2); + } else if (a0 == a1) { tcg_out_insn(s, RR, XR, args[0], args[2]); + } else { + tcg_out_insn(s, RRF, XRK, a0, a1, a2); } break; @@ -1892,18 +1845,31 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_shl_i32: op = RS_SLL; + op2 = RSY_SLLK; do_shift32: - if (const_args[2]) { - tcg_out_sh32(s, op, args[0], TCG_REG_NONE, args[2]); + a0 = args[0], a1 = args[1], a2 = (int32_t)args[2]; + if (a0 == a1) { + if (const_args[2]) { + tcg_out_sh32(s, op, a0, TCG_REG_NONE, a2); + } else { + tcg_out_sh32(s, op, a0, a2, 0); + } } else { - tcg_out_sh32(s, op, args[0], args[2], 0); + /* Using tcg_out_sh64 here for the format; it is a 32-bit shift. */ + if (const_args[2]) { + tcg_out_sh64(s, op2, a0, a1, TCG_REG_NONE, a2); + } else { + tcg_out_sh64(s, op2, a0, a1, a2, 0); + } } break; case INDEX_op_shr_i32: op = RS_SRL; + op2 = RSY_SRLK; goto do_shift32; case INDEX_op_sar_i32: op = RS_SRA; + op2 = RSY_SRAK; goto do_shift32; case INDEX_op_rotl_i32: @@ -1978,7 +1944,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_movcond_i32: tgen_movcond(s, TCG_TYPE_I32, args[5], args[0], args[1], - args[2], const_args[2], args[3]); + args[2], const_args[2], args[3], const_args[3]); break; case INDEX_op_qemu_ld_i32: @@ -2045,30 +2011,44 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, if (const_args[2]) { a2 = -a2; goto do_addi_64; + } else if (a0 == a1) { + tcg_out_insn(s, RRE, SGR, a0, a2); } else { - tcg_out_insn(s, RRE, SGR, args[0], args[2]); + tcg_out_insn(s, RRF, SGRK, a0, a1, a2); } break; case INDEX_op_and_i64: + a0 = args[0], a1 = args[1], a2 = args[2]; if (const_args[2]) { + tcg_out_mov(s, TCG_TYPE_I64, a0, a1); tgen_andi(s, TCG_TYPE_I64, args[0], args[2]); - } else { + } else if (a0 == a1) { tcg_out_insn(s, RRE, NGR, args[0], args[2]); + } else { + tcg_out_insn(s, RRF, NGRK, a0, a1, a2); } break; case INDEX_op_or_i64: + a0 = args[0], a1 = args[1], a2 = args[2]; if (const_args[2]) { - tgen64_ori(s, args[0], args[2]); + tcg_out_mov(s, TCG_TYPE_I64, a0, a1); + tgen64_ori(s, a0, a2); + } else if (a0 == a1) { + tcg_out_insn(s, RRE, OGR, a0, a2); } else { - tcg_out_insn(s, RRE, OGR, args[0], args[2]); + tcg_out_insn(s, RRF, OGRK, a0, a1, a2); } break; case INDEX_op_xor_i64: + a0 = args[0], a1 = args[1], a2 = args[2]; if (const_args[2]) { - tgen64_xori(s, args[0], args[2]); + tcg_out_mov(s, TCG_TYPE_I64, a0, a1); + tgen64_xori(s, a0, a2); + } else if (a0 == a1) { + tcg_out_insn(s, RRE, XGR, a0, a2); } else { - tcg_out_insn(s, RRE, XGR, args[0], args[2]); + tcg_out_insn(s, RRF, XGRK, a0, a1, a2); } break; @@ -2197,7 +2177,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_movcond_i64: tgen_movcond(s, TCG_TYPE_I64, args[5], args[0], args[1], - args[2], const_args[2], args[3]); + args[2], const_args[2], args[3], const_args[3]); break; OP_32_64(deposit): @@ -2246,134 +2226,210 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, } } -static const TCGTargetOpDef s390_op_defs[] = { - { INDEX_op_exit_tb, { } }, - { INDEX_op_goto_tb, { } }, - { INDEX_op_br, { } }, - { INDEX_op_goto_ptr, { "r" } }, - - { INDEX_op_ld8u_i32, { "r", "r" } }, - { INDEX_op_ld8s_i32, { "r", "r" } }, - { INDEX_op_ld16u_i32, { "r", "r" } }, - { INDEX_op_ld16s_i32, { "r", "r" } }, - { INDEX_op_ld_i32, { "r", "r" } }, - { INDEX_op_st8_i32, { "r", "r" } }, - { INDEX_op_st16_i32, { "r", "r" } }, - { INDEX_op_st_i32, { "r", "r" } }, - - { INDEX_op_add_i32, { "r", "r", "ri" } }, - { INDEX_op_sub_i32, { "r", "0", "ri" } }, - { INDEX_op_mul_i32, { "r", "0", "rK" } }, - - { INDEX_op_div2_i32, { "b", "a", "0", "1", "r" } }, - { INDEX_op_divu2_i32, { "b", "a", "0", "1", "r" } }, - - { INDEX_op_and_i32, { "r", "0", "ri" } }, - { INDEX_op_or_i32, { "r", "0", "rO" } }, - { INDEX_op_xor_i32, { "r", "0", "rX" } }, - - { INDEX_op_neg_i32, { "r", "r" } }, - - { INDEX_op_shl_i32, { "r", "0", "ri" } }, - { INDEX_op_shr_i32, { "r", "0", "ri" } }, - { INDEX_op_sar_i32, { "r", "0", "ri" } }, - - { INDEX_op_rotl_i32, { "r", "r", "ri" } }, - { INDEX_op_rotr_i32, { "r", "r", "ri" } }, - - { INDEX_op_ext8s_i32, { "r", "r" } }, - { INDEX_op_ext8u_i32, { "r", "r" } }, - { INDEX_op_ext16s_i32, { "r", "r" } }, - { INDEX_op_ext16u_i32, { "r", "r" } }, - - { INDEX_op_bswap16_i32, { "r", "r" } }, - { INDEX_op_bswap32_i32, { "r", "r" } }, - - { INDEX_op_add2_i32, { "r", "r", "0", "1", "rA", "r" } }, - { INDEX_op_sub2_i32, { "r", "r", "0", "1", "rA", "r" } }, - - { INDEX_op_brcond_i32, { "r", "rC" } }, - { INDEX_op_setcond_i32, { "r", "r", "rC" } }, - { INDEX_op_movcond_i32, { "r", "r", "rC", "r", "0" } }, - { INDEX_op_deposit_i32, { "r", "rZ", "r" } }, - { INDEX_op_extract_i32, { "r", "r" } }, - - { INDEX_op_qemu_ld_i32, { "r", "L" } }, - { INDEX_op_qemu_ld_i64, { "r", "L" } }, - { INDEX_op_qemu_st_i32, { "L", "L" } }, - { INDEX_op_qemu_st_i64, { "L", "L" } }, - - { INDEX_op_ld8u_i64, { "r", "r" } }, - { INDEX_op_ld8s_i64, { "r", "r" } }, - { INDEX_op_ld16u_i64, { "r", "r" } }, - { INDEX_op_ld16s_i64, { "r", "r" } }, - { INDEX_op_ld32u_i64, { "r", "r" } }, - { INDEX_op_ld32s_i64, { "r", "r" } }, - { INDEX_op_ld_i64, { "r", "r" } }, - - { INDEX_op_st8_i64, { "r", "r" } }, - { INDEX_op_st16_i64, { "r", "r" } }, - { INDEX_op_st32_i64, { "r", "r" } }, - { INDEX_op_st_i64, { "r", "r" } }, - - { INDEX_op_add_i64, { "r", "r", "ri" } }, - { INDEX_op_sub_i64, { "r", "0", "ri" } }, - { INDEX_op_mul_i64, { "r", "0", "rK" } }, - - { INDEX_op_div2_i64, { "b", "a", "0", "1", "r" } }, - { INDEX_op_divu2_i64, { "b", "a", "0", "1", "r" } }, - { INDEX_op_mulu2_i64, { "b", "a", "0", "r" } }, - - { INDEX_op_and_i64, { "r", "0", "ri" } }, - { INDEX_op_or_i64, { "r", "0", "rO" } }, - { INDEX_op_xor_i64, { "r", "0", "rX" } }, - - { INDEX_op_neg_i64, { "r", "r" } }, - - { INDEX_op_shl_i64, { "r", "r", "ri" } }, - { INDEX_op_shr_i64, { "r", "r", "ri" } }, - { INDEX_op_sar_i64, { "r", "r", "ri" } }, - - { INDEX_op_rotl_i64, { "r", "r", "ri" } }, - { INDEX_op_rotr_i64, { "r", "r", "ri" } }, - - { INDEX_op_ext8s_i64, { "r", "r" } }, - { INDEX_op_ext8u_i64, { "r", "r" } }, - { INDEX_op_ext16s_i64, { "r", "r" } }, - { INDEX_op_ext16u_i64, { "r", "r" } }, - { INDEX_op_ext32s_i64, { "r", "r" } }, - { INDEX_op_ext32u_i64, { "r", "r" } }, - - { INDEX_op_ext_i32_i64, { "r", "r" } }, - { INDEX_op_extu_i32_i64, { "r", "r" } }, - - { INDEX_op_bswap16_i64, { "r", "r" } }, - { INDEX_op_bswap32_i64, { "r", "r" } }, - { INDEX_op_bswap64_i64, { "r", "r" } }, - - { INDEX_op_clz_i64, { "r", "r", "ri" } }, - - { INDEX_op_add2_i64, { "r", "r", "0", "1", "rA", "r" } }, - { INDEX_op_sub2_i64, { "r", "r", "0", "1", "rA", "r" } }, - - { INDEX_op_brcond_i64, { "r", "rC" } }, - { INDEX_op_setcond_i64, { "r", "r", "rC" } }, - { INDEX_op_movcond_i64, { "r", "r", "rC", "r", "0" } }, - { INDEX_op_deposit_i64, { "r", "0", "r" } }, - { INDEX_op_extract_i64, { "r", "r" } }, - - { INDEX_op_mb, { } }, - { -1 }, -}; - static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) { - int i, n = ARRAY_SIZE(s390_op_defs); + static const TCGTargetOpDef r = { .args_ct_str = { "r" } }; + static const TCGTargetOpDef r_r = { .args_ct_str = { "r", "r" } }; + static const TCGTargetOpDef r_L = { .args_ct_str = { "r", "L" } }; + static const TCGTargetOpDef L_L = { .args_ct_str = { "L", "L" } }; + static const TCGTargetOpDef r_ri = { .args_ct_str = { "r", "ri" } }; + static const TCGTargetOpDef r_rC = { .args_ct_str = { "r", "rC" } }; + static const TCGTargetOpDef r_rZ = { .args_ct_str = { "r", "rZ" } }; + static const TCGTargetOpDef r_r_ri = { .args_ct_str = { "r", "r", "ri" } }; + static const TCGTargetOpDef r_r_rM = { .args_ct_str = { "r", "r", "rM" } }; + static const TCGTargetOpDef r_0_r = { .args_ct_str = { "r", "0", "r" } }; + static const TCGTargetOpDef r_0_ri = { .args_ct_str = { "r", "0", "ri" } }; + static const TCGTargetOpDef r_0_rI = { .args_ct_str = { "r", "0", "rI" } }; + static const TCGTargetOpDef r_0_rJ = { .args_ct_str = { "r", "0", "rJ" } }; + static const TCGTargetOpDef r_0_rN = { .args_ct_str = { "r", "0", "rN" } }; + static const TCGTargetOpDef r_0_rM = { .args_ct_str = { "r", "0", "rM" } }; + static const TCGTargetOpDef a2_r + = { .args_ct_str = { "r", "r", "0", "1", "r", "r" } }; + static const TCGTargetOpDef a2_ri + = { .args_ct_str = { "r", "r", "0", "1", "ri", "r" } }; + static const TCGTargetOpDef a2_rA + = { .args_ct_str = { "r", "r", "0", "1", "rA", "r" } }; + + switch (op) { + case INDEX_op_goto_ptr: + return &r; + + case INDEX_op_ld8u_i32: + case INDEX_op_ld8u_i64: + case INDEX_op_ld8s_i32: + case INDEX_op_ld8s_i64: + case INDEX_op_ld16u_i32: + case INDEX_op_ld16u_i64: + case INDEX_op_ld16s_i32: + case INDEX_op_ld16s_i64: + case INDEX_op_ld_i32: + case INDEX_op_ld32u_i64: + case INDEX_op_ld32s_i64: + case INDEX_op_ld_i64: + case INDEX_op_st8_i32: + case INDEX_op_st8_i64: + case INDEX_op_st16_i32: + case INDEX_op_st16_i64: + case INDEX_op_st_i32: + case INDEX_op_st32_i64: + case INDEX_op_st_i64: + return &r_r; + + case INDEX_op_add_i32: + case INDEX_op_add_i64: + return &r_r_ri; + case INDEX_op_sub_i32: + case INDEX_op_sub_i64: + return (s390_facilities & FACILITY_DISTINCT_OPS ? &r_r_ri : &r_0_ri); + + case INDEX_op_mul_i32: + /* If we have the general-instruction-extensions, then we have + MULTIPLY SINGLE IMMEDIATE with a signed 32-bit, otherwise we + have only MULTIPLY HALFWORD IMMEDIATE, with a signed 16-bit. */ + return (s390_facilities & FACILITY_GEN_INST_EXT ? &r_0_ri : &r_0_rI); + case INDEX_op_mul_i64: + return (s390_facilities & FACILITY_GEN_INST_EXT ? &r_0_rJ : &r_0_rI); + + case INDEX_op_or_i32: + /* The use of [iNM] constraints are optimization only, since a full + 64-bit immediate OR can always be performed with 4 sequential + OI[LH][LH] instructions. By rejecting certain negative ranges, + the immediate load plus the reg-reg OR is smaller. */ + return (s390_facilities & FACILITY_EXT_IMM + ? (s390_facilities & FACILITY_DISTINCT_OPS ? &r_r_ri : &r_0_ri) + : &r_0_rN); + case INDEX_op_or_i64: + return (s390_facilities & FACILITY_EXT_IMM + ? (s390_facilities & FACILITY_DISTINCT_OPS ? &r_r_rM : &r_0_rM) + : &r_0_rN); + + case INDEX_op_xor_i32: + /* Without EXT_IMM, no immediates are supported. Otherwise, + rejecting certain negative ranges leads to smaller code. */ + return (s390_facilities & FACILITY_EXT_IMM + ? (s390_facilities & FACILITY_DISTINCT_OPS ? &r_r_ri : &r_0_ri) + : &r_0_r); + case INDEX_op_xor_i64: + return (s390_facilities & FACILITY_EXT_IMM + ? (s390_facilities & FACILITY_DISTINCT_OPS ? &r_r_rM : &r_0_rM) + : &r_0_r); + + case INDEX_op_and_i32: + case INDEX_op_and_i64: + return (s390_facilities & FACILITY_DISTINCT_OPS ? &r_r_ri : &r_0_ri); + + case INDEX_op_shl_i32: + case INDEX_op_shr_i32: + case INDEX_op_sar_i32: + return (s390_facilities & FACILITY_DISTINCT_OPS ? &r_r_ri : &r_0_ri); + + case INDEX_op_shl_i64: + case INDEX_op_shr_i64: + case INDEX_op_sar_i64: + return &r_r_ri; + + case INDEX_op_rotl_i32: + case INDEX_op_rotl_i64: + case INDEX_op_rotr_i32: + case INDEX_op_rotr_i64: + return &r_r_ri; + + case INDEX_op_brcond_i32: + /* Without EXT_IMM, only the LOAD AND TEST insn is available. */ + return (s390_facilities & FACILITY_EXT_IMM ? &r_ri : &r_rZ); + case INDEX_op_brcond_i64: + return (s390_facilities & FACILITY_EXT_IMM ? &r_rC : &r_rZ); + + case INDEX_op_bswap16_i32: + case INDEX_op_bswap16_i64: + case INDEX_op_bswap32_i32: + case INDEX_op_bswap32_i64: + case INDEX_op_bswap64_i64: + case INDEX_op_neg_i32: + case INDEX_op_neg_i64: + case INDEX_op_ext8s_i32: + case INDEX_op_ext8s_i64: + case INDEX_op_ext8u_i32: + case INDEX_op_ext8u_i64: + case INDEX_op_ext16s_i32: + case INDEX_op_ext16s_i64: + case INDEX_op_ext16u_i32: + case INDEX_op_ext16u_i64: + case INDEX_op_ext32s_i64: + case INDEX_op_ext32u_i64: + case INDEX_op_ext_i32_i64: + case INDEX_op_extu_i32_i64: + case INDEX_op_extract_i32: + case INDEX_op_extract_i64: + return &r_r; + + case INDEX_op_clz_i64: + return &r_r_ri; - for (i = 0; i < n; ++i) { - if (s390_op_defs[i].op == op) { - return &s390_op_defs[i]; + case INDEX_op_qemu_ld_i32: + case INDEX_op_qemu_ld_i64: + return &r_L; + case INDEX_op_qemu_st_i64: + case INDEX_op_qemu_st_i32: + return &L_L; + + case INDEX_op_deposit_i32: + case INDEX_op_deposit_i64: + { + static const TCGTargetOpDef dep + = { .args_ct_str = { "r", "rZ", "r" } }; + return &dep; + } + case INDEX_op_setcond_i32: + case INDEX_op_setcond_i64: + { + /* Without EXT_IMM, only the LOAD AND TEST insn is available. */ + static const TCGTargetOpDef setc_z + = { .args_ct_str = { "r", "r", "rZ" } }; + static const TCGTargetOpDef setc_c + = { .args_ct_str = { "r", "r", "rC" } }; + return (s390_facilities & FACILITY_EXT_IMM ? &setc_c : &setc_z); + } + case INDEX_op_movcond_i32: + case INDEX_op_movcond_i64: + { + /* Without EXT_IMM, only the LOAD AND TEST insn is available. */ + static const TCGTargetOpDef movc_z + = { .args_ct_str = { "r", "r", "rZ", "r", "0" } }; + static const TCGTargetOpDef movc_c + = { .args_ct_str = { "r", "r", "rC", "r", "0" } }; + static const TCGTargetOpDef movc_l + = { .args_ct_str = { "r", "r", "rC", "rI", "0" } }; + return (s390_facilities & FACILITY_EXT_IMM + ? (s390_facilities & FACILITY_LOAD_ON_COND2 + ? &movc_l : &movc_c) + : &movc_z); + } + case INDEX_op_div2_i32: + case INDEX_op_div2_i64: + case INDEX_op_divu2_i32: + case INDEX_op_divu2_i64: + { + static const TCGTargetOpDef div2 + = { .args_ct_str = { "b", "a", "0", "1", "r" } }; + return &div2; } + case INDEX_op_mulu2_i64: + { + static const TCGTargetOpDef mul2 + = { .args_ct_str = { "b", "a", "0", "r" } }; + return &mul2; + } + + case INDEX_op_add2_i32: + case INDEX_op_sub2_i32: + return (s390_facilities & FACILITY_EXT_IMM ? &a2_ri : &a2_r); + case INDEX_op_add2_i64: + case INDEX_op_sub2_i64: + return (s390_facilities & FACILITY_EXT_IMM ? &a2_rA : &a2_r); + + default: + break; } return NULL; } diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index 854a0afd70..4515c9ab48 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -162,6 +162,8 @@ extern bool use_vis3_instructions; #define TCG_AREG0 TCG_REG_I0 +#define TCG_TARGET_DEFAULT_MO (0) + static inline void flush_icache_range(uintptr_t start, uintptr_t stop) { uintptr_t p; diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 87f673ef49..688d91755b 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -28,6 +28,7 @@ #include "exec/exec-all.h" #include "tcg.h" #include "tcg-op.h" +#include "tcg-mo.h" #include "trace-tcg.h" #include "trace/mem.h" @@ -2662,8 +2663,20 @@ static void gen_ldst_i64(TCGOpcode opc, TCGv_i64 val, TCGv addr, #endif } +static void tcg_gen_req_mo(TCGBar type) +{ +#ifdef TCG_GUEST_DEFAULT_MO + type &= TCG_GUEST_DEFAULT_MO; +#endif + type &= ~TCG_TARGET_DEFAULT_MO; + if (type) { + tcg_gen_mb(type | TCG_BAR_SC); + } +} + void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop) { + tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); memop = tcg_canonicalize_memop(memop, 0, 0); trace_guest_mem_before_tcg(tcg_ctx.cpu, tcg_ctx.tcg_env, addr, trace_mem_get_info(memop, 0)); @@ -2672,6 +2685,7 @@ void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop) void tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop) { + tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); memop = tcg_canonicalize_memop(memop, 0, 1); trace_guest_mem_before_tcg(tcg_ctx.cpu, tcg_ctx.tcg_env, addr, trace_mem_get_info(memop, 1)); @@ -2680,6 +2694,7 @@ void tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop) void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp memop) { + tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD); if (TCG_TARGET_REG_BITS == 32 && (memop & MO_SIZE) < MO_64) { tcg_gen_qemu_ld_i32(TCGV_LOW(val), addr, idx, memop); if (memop & MO_SIGN) { @@ -2698,6 +2713,7 @@ void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp memop) void tcg_gen_qemu_st_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp memop) { + tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST); if (TCG_TARGET_REG_BITS == 32 && (memop & MO_SIZE) < MO_64) { tcg_gen_qemu_st_i32(TCGV_LOW(val), addr, idx, memop); return; diff --git a/tests/qemu-iotests/184 b/tests/qemu-iotests/184 new file mode 100755 index 0000000000..704f38f936 --- /dev/null +++ b/tests/qemu-iotests/184 @@ -0,0 +1,205 @@ +#!/bin/bash +# +# Test I/O throttle block filter driver interface +# +# Copyright (C) 2017 Manos Pitsidianakis +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +# creator +owner="Manos Pitsidianakis" + +seq=`basename $0` +echo "QA output created by $seq" + +here=`pwd` +status=1 # failure is the default! + +_cleanup() +{ + _cleanup_test_img +} +trap "_cleanup; exit \$status" 0 1 2 3 15 + +# get standard environment, filters and checks +. ./common.rc +. ./common.filter + +_supported_fmt qcow2 +_supported_proto file +_supported_os Linux + +function do_run_qemu() +{ + echo Testing: "$@" | _filter_imgfmt + $QEMU -nographic -qmp-pretty stdio -serial none "$@" + echo +} + +function run_qemu() +{ + do_run_qemu "$@" 2>&1 | _filter_testdir | _filter_qemu | _filter_qmp\ + | _filter_qemu_io | _filter_generated_node_ids +} + +_make_test_img 64M +test_throttle=$($QEMU_IMG --help|grep throttle) +[ "$test_throttle" = "" ] && _supported_fmt throttle + +echo +echo "== checking interface ==" + +run_qemu <<EOF +{ "execute": "qmp_capabilities" } +{ "execute": "blockdev-add", + "arguments": { + "driver": "$IMGFMT", + "node-name": "disk0", + "file": { + "driver": "file", + "filename": "$TEST_IMG" + } + } +} +{ "execute": "object-add", + "arguments": { + "qom-type": "throttle-group", + "id": "group0", + "props": { + "limits" : { + "iops-total": 1000 + } + } + } +} +{ "execute": "blockdev-add", + "arguments": { + "driver": "throttle", + "node-name": "throttle0", + "throttle-group": "group0", + "file": "disk0" + } +} +{ "execute": "query-named-block-nodes" } +{ "execute": "query-block" } +{ "execute": "quit" } +EOF + +echo +echo "== property changes in ThrottleGroup ==" + +run_qemu <<EOF +{ "execute": "qmp_capabilities" } +{ "execute": "object-add", + "arguments": { + "qom-type": "throttle-group", + "id": "group0", + "props" : { + "limits": { + "iops-total": 1000 + } + } + } +} +{ "execute" : "qom-get", + "arguments" : { + "path" : "group0", + "property" : "limits" + } +} +{ "execute" : "qom-set", + "arguments" : { + "path" : "group0", + "property" : "limits", + "value" : { + "iops-total" : 0 + } + } +} +{ "execute" : "qom-get", + "arguments" : { + "path" : "group0", + "property" : "limits" + } +} +{ "execute": "quit" } +EOF + +echo +echo "== object creation/set errors ==" + +run_qemu <<EOF +{ "execute": "qmp_capabilities" } +{ "execute": "object-add", + "arguments": { + "qom-type": "throttle-group", + "id": "group0", + "props" : { + "limits": { + "iops-total": 1000 + } + } + } +} +{ "execute" : "qom-set", + "arguments" : { + "path" : "group0", + "property" : "x-iops-total", + "value" : 0 + } +} +{ "execute" : "qom-set", + "arguments" : { + "path" : "group0", + "property" : "limits", + "value" : { + "iops-total" : 10, + "iops-read" : 10 + } + } +} +{ "execute": "quit" } +EOF + +echo +echo "== don't specify group ==" + +run_qemu <<EOF +{ "execute": "qmp_capabilities" } +{ "execute": "blockdev-add", + "arguments": { + "driver": "$IMGFMT", + "node-name": "disk0", + "file": { + "driver": "file", + "filename": "$TEST_IMG" + } + } +} +{ "execute": "blockdev-add", + "arguments": { + "driver": "throttle", + "node-name": "throttle0", + "file": "disk0" + } +} +{ "execute": "quit" } +EOF + +echo +# success, all done +echo "*** done" +rm -f $seq.full +status=0 diff --git a/tests/qemu-iotests/184.out b/tests/qemu-iotests/184.out new file mode 100644 index 0000000000..0aed1a2220 --- /dev/null +++ b/tests/qemu-iotests/184.out @@ -0,0 +1,302 @@ +QA output created by 184 +Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 + +== checking interface == +Testing: +{ + QMP_VERSION +} +{ + "return": { + } +} +{ + "return": { + } +} +{ + "return": { + } +} +{ + "return": { + } +} +{ + "return": [ + { + "iops_rd": 0, + "detect_zeroes": "off", + "image": { + "virtual-size": 67108864, + "filename": "json:{\"throttle-group\": \"group0\", \"driver\": \"throttle\", \"file\": {\"driver\": \"qcow2\", \"file\": {\"driver\": \"file\", \"filename\": \"TEST_DIR/t.qcow2\"}}}", + "cluster-size": 65536, + "format": "throttle", + "actual-size": 200704, + "dirty-flag": false + }, + "iops_wr": 0, + "ro": false, + "node-name": "throttle0", + "backing_file_depth": 0, + "drv": "throttle", + "iops": 0, + "bps_wr": 0, + "write_threshold": 0, + "encrypted": false, + "bps": 0, + "bps_rd": 0, + "cache": { + "no-flush": false, + "direct": false, + "writeback": true + }, + "file": "json:{\"throttle-group\": \"group0\", \"driver\": \"throttle\", \"file\": {\"driver\": \"qcow2\", \"file\": {\"driver\": \"file\", \"filename\": \"TEST_DIR/t.qcow2\"}}}", + "encryption_key_missing": false + }, + { + "iops_rd": 0, + "detect_zeroes": "off", + "image": { + "virtual-size": 67108864, + "filename": "TEST_DIR/t.qcow2", + "cluster-size": 65536, + "format": "qcow2", + "actual-size": 200704, + "format-specific": { + "type": "qcow2", + "data": { + "compat": "1.1", + "lazy-refcounts": false, + "refcount-bits": 16, + "corrupt": false + } + }, + "dirty-flag": false + }, + "iops_wr": 0, + "ro": false, + "node-name": "disk0", + "backing_file_depth": 0, + "drv": "qcow2", + "iops": 0, + "bps_wr": 0, + "write_threshold": 0, + "encrypted": false, + "bps": 0, + "bps_rd": 0, + "cache": { + "no-flush": false, + "direct": false, + "writeback": true + }, + "file": "TEST_DIR/t.qcow2", + "encryption_key_missing": false + }, + { + "iops_rd": 0, + "detect_zeroes": "off", + "image": { + "virtual-size": 197120, + "filename": "TEST_DIR/t.qcow2", + "format": "file", + "actual-size": 200704, + "dirty-flag": false + }, + "iops_wr": 0, + "ro": false, + "node-name": "NODE_NAME", + "backing_file_depth": 0, + "drv": "file", + "iops": 0, + "bps_wr": 0, + "write_threshold": 0, + "encrypted": false, + "bps": 0, + "bps_rd": 0, + "cache": { + "no-flush": false, + "direct": false, + "writeback": true + }, + "file": "TEST_DIR/t.qcow2", + "encryption_key_missing": false + } + ] +} +{ + "return": [ + ] +} +{ + "return": { + } +} +{ + "timestamp": { + "seconds": TIMESTAMP, + "microseconds": TIMESTAMP + }, + "event": "SHUTDOWN", + "data": { + "guest": false + } +} + + +== property changes in ThrottleGroup == +Testing: +{ + QMP_VERSION +} +{ + "return": { + } +} +{ + "return": { + } +} +{ + "return": { + "bps-read-max-length": 1, + "iops-read-max-length": 1, + "bps-read-max": 0, + "bps-total": 0, + "iops-total-max-length": 1, + "iops-total": 1000, + "iops-write-max": 0, + "bps-write": 0, + "bps-total-max": 0, + "bps-write-max": 0, + "iops-size": 0, + "iops-read": 0, + "iops-write-max-length": 1, + "iops-write": 0, + "bps-total-max-length": 1, + "iops-read-max": 0, + "bps-read": 0, + "bps-write-max-length": 1, + "iops-total-max": 0 + } +} +{ + "return": { + } +} +{ + "return": { + "bps-read-max-length": 1, + "iops-read-max-length": 1, + "bps-read-max": 0, + "bps-total": 0, + "iops-total-max-length": 1, + "iops-total": 0, + "iops-write-max": 0, + "bps-write": 0, + "bps-total-max": 0, + "bps-write-max": 0, + "iops-size": 0, + "iops-read": 0, + "iops-write-max-length": 1, + "iops-write": 0, + "bps-total-max-length": 1, + "iops-read-max": 0, + "bps-read": 0, + "bps-write-max-length": 1, + "iops-total-max": 0 + } +} +{ + "return": { + } +} +{ + "timestamp": { + "seconds": TIMESTAMP, + "microseconds": TIMESTAMP + }, + "event": "SHUTDOWN", + "data": { + "guest": false + } +} + + +== object creation/set errors == +Testing: +{ + QMP_VERSION +} +{ + "return": { + } +} +{ + "return": { + } +} +{ + "error": { + "class": "GenericError", + "desc": "Property cannot be set after initialization" + } +} +{ + "error": { + "class": "GenericError", + "desc": "bps/iops/max total values and read/write values cannot be used at the same time" + } +} +{ + "return": { + } +} +{ + "timestamp": { + "seconds": TIMESTAMP, + "microseconds": TIMESTAMP + }, + "event": "SHUTDOWN", + "data": { + "guest": false + } +} + + +== don't specify group == +Testing: +{ + QMP_VERSION +} +{ + "return": { + } +} +{ + "return": { + } +} +{ + "error": { + "class": "GenericError", + "desc": "Parameter 'throttle-group' is missing" + } +} +{ + "return": { + } +} +{ + "timestamp": { + "seconds": TIMESTAMP, + "microseconds": TIMESTAMP + }, + "event": "SHUTDOWN", + "data": { + "guest": false + } +} + + +*** done diff --git a/tests/qemu-iotests/group b/tests/qemu-iotests/group index 4bd5017008..94e764865a 100644 --- a/tests/qemu-iotests/group +++ b/tests/qemu-iotests/group @@ -180,6 +180,7 @@ 181 rw auto migration 182 rw auto quick 183 rw auto migration +184 rw auto quick 185 rw auto 186 rw auto 187 rw auto diff --git a/tests/test-iov.c b/tests/test-iov.c index fa3d75aee1..458ca25099 100644 --- a/tests/test-iov.c +++ b/tests/test-iov.c @@ -81,17 +81,17 @@ static void test_to_from_buf_1(void) * skip whole vector and process exactly 0 bytes */ /* first set bytes [i..sz) to some "random" value */ - n = iov_memset(iov, niov, 0, 0xff, -1); + n = iov_memset(iov, niov, 0, 0xff, sz); g_assert(n == sz); /* next copy bytes [i..sz) from ibuf to iovec */ - n = iov_from_buf(iov, niov, i, ibuf + i, -1); + n = iov_from_buf(iov, niov, i, ibuf + i, sz - i); g_assert(n == sz - i); /* clear part of obuf */ memset(obuf + i, 0, sz - i); /* and set this part of obuf to values from iovec */ - n = iov_to_buf(iov, niov, i, obuf + i, -1); + n = iov_to_buf(iov, niov, i, obuf + i, sz - i); g_assert(n == sz - i); /* now compare resulting buffers */ @@ -109,7 +109,7 @@ static void test_to_from_buf_1(void) * with j in [i..sz]. */ /* clear iovec */ - n = iov_memset(iov, niov, 0, 0xff, -1); + n = iov_memset(iov, niov, 0, 0xff, sz); g_assert(n == sz); /* copy bytes [i..j) from ibuf to iovec */ @@ -225,7 +225,7 @@ static void test_io(void) for (i = 0; i <= sz; ++i) { for (j = i; j <= sz; ++j) { k = i; - iov_memset(iov, niov, 0, 0xff, -1); + iov_memset(iov, niov, 0, 0xff, sz); do { s = g_test_rand_int_range(0, j - k + 1); r = iov_recv(sv[0], iov, niov, k, s); diff --git a/tests/test-throttle.c b/tests/test-throttle.c index bf7a5a648a..948a42c991 100644 --- a/tests/test-throttle.c +++ b/tests/test-throttle.c @@ -24,8 +24,9 @@ static AioContext *ctx; static LeakyBucket bkt; static ThrottleConfig cfg; +static ThrottleGroupMember tgm; static ThrottleState ts; -static ThrottleTimers tt; +static ThrottleTimers *tt; /* useful function */ static bool double_cmp(double x, double y) @@ -153,19 +154,21 @@ static void test_init(void) { int i; + tt = &tgm.throttle_timers; + /* fill the structures with crap */ memset(&ts, 1, sizeof(ts)); - memset(&tt, 1, sizeof(tt)); + memset(tt, 1, sizeof(*tt)); /* init structures */ throttle_init(&ts); - throttle_timers_init(&tt, ctx, QEMU_CLOCK_VIRTUAL, + throttle_timers_init(tt, ctx, QEMU_CLOCK_VIRTUAL, read_timer_cb, write_timer_cb, &ts); /* check initialized fields */ - g_assert(tt.clock_type == QEMU_CLOCK_VIRTUAL); - g_assert(tt.timers[0]); - g_assert(tt.timers[1]); + g_assert(tt->clock_type == QEMU_CLOCK_VIRTUAL); + g_assert(tt->timers[0]); + g_assert(tt->timers[1]); /* check other fields where cleared */ g_assert(!ts.previous_leak); @@ -176,18 +179,18 @@ static void test_init(void) g_assert(!ts.cfg.buckets[i].level); } - throttle_timers_destroy(&tt); + throttle_timers_destroy(tt); } static void test_destroy(void) { int i; throttle_init(&ts); - throttle_timers_init(&tt, ctx, QEMU_CLOCK_VIRTUAL, + throttle_timers_init(tt, ctx, QEMU_CLOCK_VIRTUAL, read_timer_cb, write_timer_cb, &ts); - throttle_timers_destroy(&tt); + throttle_timers_destroy(tt); for (i = 0; i < 2; i++) { - g_assert(!tt.timers[i]); + g_assert(!tt->timers[i]); } } @@ -224,7 +227,7 @@ static void test_config_functions(void) orig_cfg.op_size = 1; throttle_init(&ts); - throttle_timers_init(&tt, ctx, QEMU_CLOCK_VIRTUAL, + throttle_timers_init(tt, ctx, QEMU_CLOCK_VIRTUAL, read_timer_cb, write_timer_cb, &ts); /* structure reset by throttle_init previous_leak should be null */ g_assert(!ts.previous_leak); @@ -236,7 +239,7 @@ static void test_config_functions(void) /* get back the fixed configuration */ throttle_get_config(&ts, &final_cfg); - throttle_timers_destroy(&tt); + throttle_timers_destroy(tt); g_assert(final_cfg.buckets[THROTTLE_BPS_TOTAL].avg == 153); g_assert(final_cfg.buckets[THROTTLE_BPS_READ].avg == 56); @@ -494,45 +497,45 @@ static void test_have_timer(void) { /* zero structures */ memset(&ts, 0, sizeof(ts)); - memset(&tt, 0, sizeof(tt)); + memset(tt, 0, sizeof(*tt)); /* no timer set should return false */ - g_assert(!throttle_timers_are_initialized(&tt)); + g_assert(!throttle_timers_are_initialized(tt)); /* init structures */ throttle_init(&ts); - throttle_timers_init(&tt, ctx, QEMU_CLOCK_VIRTUAL, + throttle_timers_init(tt, ctx, QEMU_CLOCK_VIRTUAL, read_timer_cb, write_timer_cb, &ts); /* timer set by init should return true */ - g_assert(throttle_timers_are_initialized(&tt)); + g_assert(throttle_timers_are_initialized(tt)); - throttle_timers_destroy(&tt); + throttle_timers_destroy(tt); } static void test_detach_attach(void) { /* zero structures */ memset(&ts, 0, sizeof(ts)); - memset(&tt, 0, sizeof(tt)); + memset(tt, 0, sizeof(*tt)); /* init the structure */ throttle_init(&ts); - throttle_timers_init(&tt, ctx, QEMU_CLOCK_VIRTUAL, + throttle_timers_init(tt, ctx, QEMU_CLOCK_VIRTUAL, read_timer_cb, write_timer_cb, &ts); /* timer set by init should return true */ - g_assert(throttle_timers_are_initialized(&tt)); + g_assert(throttle_timers_are_initialized(tt)); /* timer should no longer exist after detaching */ - throttle_timers_detach_aio_context(&tt); - g_assert(!throttle_timers_are_initialized(&tt)); + throttle_timers_detach_aio_context(tt); + g_assert(!throttle_timers_are_initialized(tt)); /* timer should exist again after attaching */ - throttle_timers_attach_aio_context(&tt, ctx); - g_assert(throttle_timers_are_initialized(&tt)); + throttle_timers_attach_aio_context(tt, ctx); + g_assert(throttle_timers_are_initialized(tt)); - throttle_timers_destroy(&tt); + throttle_timers_destroy(tt); } static bool do_test_accounting(bool is_ops, /* are we testing bps or ops */ @@ -561,7 +564,7 @@ static bool do_test_accounting(bool is_ops, /* are we testing bps or ops */ cfg.op_size = op_size; throttle_init(&ts); - throttle_timers_init(&tt, ctx, QEMU_CLOCK_VIRTUAL, + throttle_timers_init(tt, ctx, QEMU_CLOCK_VIRTUAL, read_timer_cb, write_timer_cb, &ts); throttle_config(&ts, QEMU_CLOCK_VIRTUAL, &cfg); @@ -588,7 +591,7 @@ static bool do_test_accounting(bool is_ops, /* are we testing bps or ops */ return false; } - throttle_timers_destroy(&tt); + throttle_timers_destroy(tt); return true; } @@ -669,6 +672,7 @@ static void test_groups(void) ThrottleConfig cfg1, cfg2; BlockBackend *blk1, *blk2, *blk3; BlockBackendPublic *blkp1, *blkp2, *blkp3; + ThrottleGroupMember *tgm1, *tgm2, *tgm3; /* No actual I/O is performed on these devices */ blk1 = blk_new(0, BLK_PERM_ALL); @@ -679,21 +683,25 @@ static void test_groups(void) blkp2 = blk_get_public(blk2); blkp3 = blk_get_public(blk3); - g_assert(blkp1->throttle_state == NULL); - g_assert(blkp2->throttle_state == NULL); - g_assert(blkp3->throttle_state == NULL); + tgm1 = &blkp1->throttle_group_member; + tgm2 = &blkp2->throttle_group_member; + tgm3 = &blkp3->throttle_group_member; + + g_assert(tgm1->throttle_state == NULL); + g_assert(tgm2->throttle_state == NULL); + g_assert(tgm3->throttle_state == NULL); - throttle_group_register_blk(blk1, "bar"); - throttle_group_register_blk(blk2, "foo"); - throttle_group_register_blk(blk3, "bar"); + throttle_group_register_tgm(tgm1, "bar", blk_get_aio_context(blk1)); + throttle_group_register_tgm(tgm2, "foo", blk_get_aio_context(blk2)); + throttle_group_register_tgm(tgm3, "bar", blk_get_aio_context(blk3)); - g_assert(blkp1->throttle_state != NULL); - g_assert(blkp2->throttle_state != NULL); - g_assert(blkp3->throttle_state != NULL); + g_assert(tgm1->throttle_state != NULL); + g_assert(tgm2->throttle_state != NULL); + g_assert(tgm3->throttle_state != NULL); - g_assert(!strcmp(throttle_group_get_name(blk1), "bar")); - g_assert(!strcmp(throttle_group_get_name(blk2), "foo")); - g_assert(blkp1->throttle_state == blkp3->throttle_state); + g_assert(!strcmp(throttle_group_get_name(tgm1), "bar")); + g_assert(!strcmp(throttle_group_get_name(tgm2), "foo")); + g_assert(tgm1->throttle_state == tgm3->throttle_state); /* Setting the config of a group member affects the whole group */ throttle_config_init(&cfg1); @@ -701,29 +709,29 @@ static void test_groups(void) cfg1.buckets[THROTTLE_BPS_WRITE].avg = 285000; cfg1.buckets[THROTTLE_OPS_READ].avg = 20000; cfg1.buckets[THROTTLE_OPS_WRITE].avg = 12000; - throttle_group_config(blk1, &cfg1); + throttle_group_config(tgm1, &cfg1); - throttle_group_get_config(blk1, &cfg1); - throttle_group_get_config(blk3, &cfg2); + throttle_group_get_config(tgm1, &cfg1); + throttle_group_get_config(tgm3, &cfg2); g_assert(!memcmp(&cfg1, &cfg2, sizeof(cfg1))); cfg2.buckets[THROTTLE_BPS_READ].avg = 4547; cfg2.buckets[THROTTLE_BPS_WRITE].avg = 1349; cfg2.buckets[THROTTLE_OPS_READ].avg = 123; cfg2.buckets[THROTTLE_OPS_WRITE].avg = 86; - throttle_group_config(blk3, &cfg1); + throttle_group_config(tgm3, &cfg1); - throttle_group_get_config(blk1, &cfg1); - throttle_group_get_config(blk3, &cfg2); + throttle_group_get_config(tgm1, &cfg1); + throttle_group_get_config(tgm3, &cfg2); g_assert(!memcmp(&cfg1, &cfg2, sizeof(cfg1))); - throttle_group_unregister_blk(blk1); - throttle_group_unregister_blk(blk2); - throttle_group_unregister_blk(blk3); + throttle_group_unregister_tgm(tgm1); + throttle_group_unregister_tgm(tgm2); + throttle_group_unregister_tgm(tgm3); - g_assert(blkp1->throttle_state == NULL); - g_assert(blkp2->throttle_state == NULL); - g_assert(blkp3->throttle_state == NULL); + g_assert(tgm1->throttle_state == NULL); + g_assert(tgm2->throttle_state == NULL); + g_assert(tgm3->throttle_state == NULL); } int main(int argc, char **argv) @@ -731,6 +739,7 @@ int main(int argc, char **argv) qemu_init_main_loop(&error_fatal); ctx = qemu_get_aio_context(); bdrv_init(); + module_call_init(MODULE_INIT_QOM); do {} while (g_main_context_iteration(NULL, false)); diff --git a/tests/vhost-user-test.c b/tests/vhost-user-test.c index d4da09f147..4b98018478 100644 --- a/tests/vhost-user-test.c +++ b/tests/vhost-user-test.c @@ -31,6 +31,8 @@ #include <linux/virtio_net.h> #include <sys/vfs.h> +#define VHOST_USER_NET_TESTS_WORKING 0 /* broken as of 2.10.0 */ + /* GLIB version compatibility flags */ #if !GLIB_CHECK_VERSION(2, 26, 0) #define G_TIME_SPAN_SECOND (G_GINT64_CONSTANT(1000000)) @@ -472,11 +474,6 @@ static void test_server_listen(TestServer *server) test_server_create_chr(server, ",server,nowait"); } -static inline void test_server_connect(TestServer *server) -{ - test_server_create_chr(server, ",reconnect=1"); -} - #define GET_QEMU_CMD(s) \ g_strdup_printf(QEMU_CMD, 512, 512, (root), (s)->chr_name, \ (s)->socket_path, "", (s)->chr_name) @@ -722,7 +719,12 @@ static void wait_for_rings_started(TestServer *s, size_t count) g_mutex_unlock(&s->data_mutex); } -#ifdef CONFIG_HAS_GLIB_SUBPROCESS_TESTS +#if VHOST_USER_NET_TESTS_WORKING && defined(CONFIG_HAS_GLIB_SUBPROCESS_TESTS) +static inline void test_server_connect(TestServer *server) +{ + test_server_create_chr(server, ",reconnect=1"); +} + static gboolean reconnect_cb(gpointer user_data) { @@ -962,7 +964,8 @@ int main(int argc, char **argv) qtest_add_data_func("/vhost-user/read-guest-mem", server, read_guest_mem); qtest_add_func("/vhost-user/migrate", test_migrate); qtest_add_func("/vhost-user/multiqueue", test_multiqueue); -#ifdef CONFIG_HAS_GLIB_SUBPROCESS_TESTS + +#if VHOST_USER_NET_TESTS_WORKING && defined(CONFIG_HAS_GLIB_SUBPROCESS_TESTS) qtest_add_func("/vhost-user/reconnect/subprocess", test_reconnect_subprocess); qtest_add_func("/vhost-user/reconnect", test_reconnect); diff --git a/tests/vmgenid-test.c b/tests/vmgenid-test.c index 3d5c1c3615..918c82c82a 100644 --- a/tests/vmgenid-test.c +++ b/tests/vmgenid-test.c @@ -40,7 +40,7 @@ static uint32_t acpi_find_vgia(void) AcpiRsdpDescriptor rsdp_table; uint32_t rsdt; AcpiRsdtDescriptorRev1 rsdt_table; - int tables_nr; + size_t tables_nr; uint32_t *tables; AcpiTableHeader ssdt_table; VgidTable vgid_table; @@ -62,9 +62,9 @@ static uint32_t acpi_find_vgia(void) ACPI_ASSERT_CMP(rsdt_table.signature, "RSDT"); /* compute the table entries in rsdt */ + g_assert_cmpint(rsdt_table.length, >, sizeof(AcpiRsdtDescriptorRev1)); tables_nr = (rsdt_table.length - sizeof(AcpiRsdtDescriptorRev1)) / sizeof(uint32_t); - g_assert_cmpint(tables_nr, >, 0); /* get the addresses of the tables pointed by rsdt */ tables = g_new0(uint32_t, tables_nr); diff --git a/util/throttle.c b/util/throttle.c index b8c524336c..06bf916adc 100644 --- a/util/throttle.c +++ b/util/throttle.c @@ -484,3 +484,154 @@ void throttle_account(ThrottleState *ts, bool is_write, uint64_t size) } } +/* return a ThrottleConfig based on the options in a ThrottleLimits + * + * @arg: the ThrottleLimits object to read from + * @cfg: the ThrottleConfig to edit + * @errp: error object + */ +void throttle_limits_to_config(ThrottleLimits *arg, ThrottleConfig *cfg, + Error **errp) +{ + if (arg->has_bps_total) { + cfg->buckets[THROTTLE_BPS_TOTAL].avg = arg->bps_total; + } + if (arg->has_bps_read) { + cfg->buckets[THROTTLE_BPS_READ].avg = arg->bps_read; + } + if (arg->has_bps_write) { + cfg->buckets[THROTTLE_BPS_WRITE].avg = arg->bps_write; + } + + if (arg->has_iops_total) { + cfg->buckets[THROTTLE_OPS_TOTAL].avg = arg->iops_total; + } + if (arg->has_iops_read) { + cfg->buckets[THROTTLE_OPS_READ].avg = arg->iops_read; + } + if (arg->has_iops_write) { + cfg->buckets[THROTTLE_OPS_WRITE].avg = arg->iops_write; + } + + if (arg->has_bps_total_max) { + cfg->buckets[THROTTLE_BPS_TOTAL].max = arg->bps_total_max; + } + if (arg->has_bps_read_max) { + cfg->buckets[THROTTLE_BPS_READ].max = arg->bps_read_max; + } + if (arg->has_bps_write_max) { + cfg->buckets[THROTTLE_BPS_WRITE].max = arg->bps_write_max; + } + if (arg->has_iops_total_max) { + cfg->buckets[THROTTLE_OPS_TOTAL].max = arg->iops_total_max; + } + if (arg->has_iops_read_max) { + cfg->buckets[THROTTLE_OPS_READ].max = arg->iops_read_max; + } + if (arg->has_iops_write_max) { + cfg->buckets[THROTTLE_OPS_WRITE].max = arg->iops_write_max; + } + + if (arg->has_bps_total_max_length) { + if (arg->bps_total_max_length > UINT_MAX) { + error_setg(errp, "bps-total-max-length value must be in" + " the range [0, %u]", UINT_MAX); + return; + } + cfg->buckets[THROTTLE_BPS_TOTAL].burst_length = arg->bps_total_max_length; + } + if (arg->has_bps_read_max_length) { + if (arg->bps_read_max_length > UINT_MAX) { + error_setg(errp, "bps-read-max-length value must be in" + " the range [0, %u]", UINT_MAX); + return; + } + cfg->buckets[THROTTLE_BPS_READ].burst_length = arg->bps_read_max_length; + } + if (arg->has_bps_write_max_length) { + if (arg->bps_write_max_length > UINT_MAX) { + error_setg(errp, "bps-write-max-length value must be in" + " the range [0, %u]", UINT_MAX); + return; + } + cfg->buckets[THROTTLE_BPS_WRITE].burst_length = arg->bps_write_max_length; + } + if (arg->has_iops_total_max_length) { + if (arg->iops_total_max_length > UINT_MAX) { + error_setg(errp, "iops-total-max-length value must be in" + " the range [0, %u]", UINT_MAX); + return; + } + cfg->buckets[THROTTLE_OPS_TOTAL].burst_length = arg->iops_total_max_length; + } + if (arg->has_iops_read_max_length) { + if (arg->iops_read_max_length > UINT_MAX) { + error_setg(errp, "iops-read-max-length value must be in" + " the range [0, %u]", UINT_MAX); + return; + } + cfg->buckets[THROTTLE_OPS_READ].burst_length = arg->iops_read_max_length; + } + if (arg->has_iops_write_max_length) { + if (arg->iops_write_max_length > UINT_MAX) { + error_setg(errp, "iops-write-max-length value must be in" + " the range [0, %u]", UINT_MAX); + return; + } + cfg->buckets[THROTTLE_OPS_WRITE].burst_length = arg->iops_write_max_length; + } + + if (arg->has_iops_size) { + cfg->op_size = arg->iops_size; + } + + throttle_is_valid(cfg, errp); +} + +/* write the options of a ThrottleConfig to a ThrottleLimits + * + * @cfg: the ThrottleConfig to read from + * @var: the ThrottleLimits to write to + */ +void throttle_config_to_limits(ThrottleConfig *cfg, ThrottleLimits *var) +{ + var->bps_total = cfg->buckets[THROTTLE_BPS_TOTAL].avg; + var->bps_read = cfg->buckets[THROTTLE_BPS_READ].avg; + var->bps_write = cfg->buckets[THROTTLE_BPS_WRITE].avg; + var->iops_total = cfg->buckets[THROTTLE_OPS_TOTAL].avg; + var->iops_read = cfg->buckets[THROTTLE_OPS_READ].avg; + var->iops_write = cfg->buckets[THROTTLE_OPS_WRITE].avg; + var->bps_total_max = cfg->buckets[THROTTLE_BPS_TOTAL].max; + var->bps_read_max = cfg->buckets[THROTTLE_BPS_READ].max; + var->bps_write_max = cfg->buckets[THROTTLE_BPS_WRITE].max; + var->iops_total_max = cfg->buckets[THROTTLE_OPS_TOTAL].max; + var->iops_read_max = cfg->buckets[THROTTLE_OPS_READ].max; + var->iops_write_max = cfg->buckets[THROTTLE_OPS_WRITE].max; + var->bps_total_max_length = cfg->buckets[THROTTLE_BPS_TOTAL].burst_length; + var->bps_read_max_length = cfg->buckets[THROTTLE_BPS_READ].burst_length; + var->bps_write_max_length = cfg->buckets[THROTTLE_BPS_WRITE].burst_length; + var->iops_total_max_length = cfg->buckets[THROTTLE_OPS_TOTAL].burst_length; + var->iops_read_max_length = cfg->buckets[THROTTLE_OPS_READ].burst_length; + var->iops_write_max_length = cfg->buckets[THROTTLE_OPS_WRITE].burst_length; + var->iops_size = cfg->op_size; + + var->has_bps_total = true; + var->has_bps_read = true; + var->has_bps_write = true; + var->has_iops_total = true; + var->has_iops_read = true; + var->has_iops_write = true; + var->has_bps_total_max = true; + var->has_bps_read_max = true; + var->has_bps_write_max = true; + var->has_iops_total_max = true; + var->has_iops_read_max = true; + var->has_iops_write_max = true; + var->has_bps_read_max_length = true; + var->has_bps_total_max_length = true; + var->has_bps_write_max_length = true; + var->has_iops_total_max_length = true; + var->has_iops_read_max_length = true; + var->has_iops_write_max_length = true; + var->has_iops_size = true; +} |