diff options
70 files changed, 433 insertions, 3195 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 4db611ffb0..7d43026162 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -83,6 +83,7 @@ F: include/exec/cpu*.h F: include/exec/exec-all.h F: include/exec/helper*.h F: include/exec/tb-hash.h +F: include/sysemu/cpus.h FPU emulation M: Aurelien Jarno <aurelien@aurel32.net> @@ -187,6 +188,7 @@ S: Odd Fixes F: target-sh4/ F: hw/sh4/ F: disas/sh4.c +F: include/hw/sh4/ SPARC M: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> @@ -202,6 +204,7 @@ M: Guan Xuetao <gxt@mprc.pku.edu.cn> S: Maintained F: target-unicore32/ F: hw/unicore32/ +F: include/hw/unicore32/ X86 M: Paolo Bonzini <pbonzini@redhat.com> @@ -225,6 +228,7 @@ M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> S: Maintained F: target-tricore/ F: hw/tricore/ +F: include/hw/tricore/ Guest CPU Cores (KVM): ---------------------- @@ -456,7 +460,6 @@ S: Maintained F: hw/*/xilinx_* F: hw/*/cadence_* F: hw/misc/zynq_slcr.c -F: include/hw/xilinx.h X: hw/ssi/xilinx_* Xilinx ZynqMP @@ -465,7 +468,7 @@ M: Edgar E. Iglesias <edgar.iglesias@gmail.com> L: qemu-arm@nongnu.org S: Maintained F: hw/*/xlnx*.c -F: include/hw/*/xlnx*.c +F: include/hw/*/xlnx*.h ARM ACPI Subsystem M: Shannon Zhao <zhaoshenglong@huawei.com> @@ -695,7 +698,7 @@ F: hw/i2c/smbus_ich9.c F: hw/acpi/piix4.c F: hw/acpi/ich9.c F: include/hw/acpi/ich9.h -F: include/hw/acpi/piix.h +F: include/hw/acpi/piix4.h F: hw/misc/sga.c PC Chipset @@ -801,10 +804,8 @@ F: hw/mem/* F: hw/acpi/* F: hw/smbios/* F: hw/i386/acpi-build.[hc] -F: hw/i386/*dsl F: hw/arm/virt-acpi-build.c F: include/hw/arm/virt-acpi-build.h -F: scripts/acpi*py ppc4xx M: Alexander Graf <agraf@suse.de> @@ -906,7 +907,6 @@ L: qemu-block@nongnu.org S: Supported F: hw/block/virtio-blk.c F: hw/block/dataplane/* -F: hw/virtio/dataplane/* T: git git://github.com/stefanha/qemu.git block virtio-ccw @@ -1068,12 +1068,6 @@ S: Supported F: qom/cpu.c F: include/qom/cpu.h -ICC Bus -M: Igor Mammedov <imammedo@redhat.com> -S: Supported -F: include/hw/cpu/icc_bus.h -F: hw/cpu/icc_bus.c - Device Tree M: Peter Crosthwaite <crosthwaite.peter@gmail.com> M: Alexander Graf <agraf@suse.de> @@ -1589,7 +1583,7 @@ M: Kevin Wolf <kwolf@redhat.com> L: qemu-block@nongnu.org S: Supported F: block/linux-aio.c -F: block/raw-aio.h +F: include/block/raw-aio.h F: block/raw-posix.c F: block/raw-win32.c F: block/raw_bsd.c diff --git a/Makefile b/Makefile index 50b4b3afb9..1fad5b78e5 100644 --- a/Makefile +++ b/Makefile @@ -669,3 +669,40 @@ endif -include $(wildcard *.d tests/*.d) include $(SRC_PATH)/tests/docker/Makefile.include + +.PHONY: help +help: + @echo 'Generic targets:' + @echo ' all - Build all' + @echo ' dir/file.o - Build specified target only' + @echo ' install - Install QEMU, documentation and tools' + @echo ' ctags/TAGS - Generate tags file for editors' + @echo ' cscope - Generate cscope index' + @echo '' + @$(if $(TARGET_DIRS), \ + echo 'Architecture specific targets:'; \ + $(foreach t, $(TARGET_DIRS), \ + printf " %-30s - Build for %s\\n" $(patsubst %,subdir-%,$(t)) $(t);) \ + echo '') + @echo 'Cleaning targets:' + @echo ' clean - Remove most generated files but keep the config' + @echo ' distclean - Remove all generated files' + @echo ' dist - Build a distributable tarball' + @echo '' + @echo 'Test targets:' + @echo ' check - Run all tests (check-help for details)' + @echo ' docker - Help about targets running tests inside Docker containers' + @echo '' + @echo 'Documentation targets:' + @echo ' dvi html info pdf' + @echo ' - Build documentation in specified format' + @echo '' +ifdef CONFIG_WIN32 + @echo 'Windows targets:' + @echo ' installer - Build NSIS-based installer for qemu-ga' +ifdef QEMU_GA_MSI_ENABLED + @echo ' msi - Build MSI-based installer for qemu-ga' +endif + @echo '' +endif + @echo ' make V=0|1 [targets] 0 => quiet build (default), 1 => verbose build' diff --git a/backends/msmouse.c b/backends/msmouse.c index aeb905562d..aceb6dc475 100644 --- a/backends/msmouse.c +++ b/backends/msmouse.c @@ -159,6 +159,9 @@ static CharDriverState *qemu_chr_open_msmouse(const char *id, CharDriverState *chr; chr = qemu_chr_alloc(common, errp); + if (!chr) { + return NULL; + } chr->chr_write = msmouse_chr_write; chr->chr_close = msmouse_chr_close; chr->chr_accept_input = msmouse_chr_accept_input; diff --git a/block/curl.c b/block/curl.c index 426fb4d674..571f24cac2 100644 --- a/block/curl.c +++ b/block/curl.c @@ -675,11 +675,28 @@ static int curl_open(BlockDriverState *bs, QDict *options, int flags, curl_easy_setopt(state->curl, CURLOPT_HEADERDATA, s); if (curl_easy_perform(state->curl)) goto out; - curl_easy_getinfo(state->curl, CURLINFO_CONTENT_LENGTH_DOWNLOAD, &d); - if (d) - s->len = (size_t)d; - else if(!s->len) + if (curl_easy_getinfo(state->curl, CURLINFO_CONTENT_LENGTH_DOWNLOAD, &d)) { goto out; + } + /* Prior CURL 7.19.4 return value of 0 could mean that the file size is not + * know or the size is zero. From 7.19.4 CURL returns -1 if size is not + * known and zero if it is realy zero-length file. */ +#if LIBCURL_VERSION_NUM >= 0x071304 + if (d < 0) { + pstrcpy(state->errmsg, CURL_ERROR_SIZE, + "Server didn't report file size."); + goto out; + } +#else + if (d <= 0) { + pstrcpy(state->errmsg, CURL_ERROR_SIZE, + "Unknown file size or zero-length file."); + goto out; + } +#endif + + s->len = (size_t)d; + if ((!strncasecmp(s->url, "http://", strlen("http://")) || !strncasecmp(s->url, "https://", strlen("https://"))) && !s->accept_range) { diff --git a/block/qcow2.h b/block/qcow2.h index b36a7bf8ad..9ce5a37d3a 100644 --- a/block/qcow2.h +++ b/block/qcow2.h @@ -530,7 +530,6 @@ int qcow2_change_refcount_order(BlockDriverState *bs, int refcount_order, int qcow2_grow_l1_table(BlockDriverState *bs, uint64_t min_size, bool exact_size); int qcow2_write_l1_entry(BlockDriverState *bs, int l1_index); -void qcow2_l2_cache_reset(BlockDriverState *bs); int qcow2_decompress_cluster(BlockDriverState *bs, uint64_t cluster_offset); int qcow2_encrypt_sectors(BDRVQcow2State *s, int64_t sector_num, uint8_t *out_buf, const uint8_t *in_buf, diff --git a/block/sheepdog.c b/block/sheepdog.c index 66e1cb2b2d..ccbf7e1fa6 100644 --- a/block/sheepdog.c +++ b/block/sheepdog.c @@ -1049,7 +1049,7 @@ static int parse_vdiname(BDRVSheepdogState *s, const char *filename, const char *host_spec, *vdi_spec; int nr_sep, ret; - strstart(filename, "sheepdog:", (const char **)&filename); + strstart(filename, "sheepdog:", &filename); p = q = g_strdup(filename); /* count the number of separators */ @@ -2652,7 +2652,7 @@ static int sd_snapshot_list(BlockDriverState *bs, QEMUSnapshotInfo **psn_tab) req.opcode = SD_OP_READ_VDIS; req.data_length = max; - ret = do_req(fd, s->aio_context, (SheepdogReq *)&req, + ret = do_req(fd, s->aio_context, &req, vdi_inuse, &wlen, &rlen); closesocket(fd); diff --git a/configure b/configure index bafc4c1663..7d083bdd85 100755 --- a/configure +++ b/configure @@ -511,8 +511,6 @@ elif check_define __arm__ ; then cpu="arm" elif check_define __aarch64__ ; then cpu="aarch64" -elif check_define __hppa__ ; then - cpu="hppa" else cpu=$(uname -m) fi @@ -3016,7 +3014,7 @@ fi # g_test_trap_subprocess added in 2.38. Used by some tests. glib_subprocess=yes -if ! $pkg_config --atleast-version=2.38 glib-2.0; then +if test "$mingw32" = "yes" || ! $pkg_config --atleast-version=2.38 glib-2.0; then glib_subprocess=no fi @@ -5899,9 +5897,6 @@ for i in $ARCH $TARGET_BASE_ARCH ; do cris) disas_config "CRIS" ;; - hppa) - disas_config "HPPA" - ;; i386|x86_64|x32) disas_config "I386" ;; diff --git a/disas.c b/disas.c index 05a7a1260a..67f116a19b 100644 --- a/disas.c +++ b/disas.c @@ -310,8 +310,6 @@ void disas(FILE *out, void *code, unsigned long size) print_insn = print_insn_m68k; #elif defined(__s390__) print_insn = print_insn_s390; -#elif defined(__hppa__) - print_insn = print_insn_hppa; #elif defined(__ia64__) print_insn = print_insn_ia64; #endif diff --git a/disas/Makefile.objs b/disas/Makefile.objs index abeba84661..09bc992883 100644 --- a/disas/Makefile.objs +++ b/disas/Makefile.objs @@ -9,7 +9,6 @@ libvixldir = $(SRC_PATH)/disas/libvixl # versions do not. arm-a64.o-cflags := -I$(libvixldir) -Wno-sign-compare common-obj-$(CONFIG_CRIS_DIS) += cris.o -common-obj-$(CONFIG_HPPA_DIS) += hppa.o common-obj-$(CONFIG_I386_DIS) += i386.o common-obj-$(CONFIG_IA64_DIS) += ia64.o common-obj-$(CONFIG_M68K_DIS) += m68k.o diff --git a/disas/hppa.c b/disas/hppa.c deleted file mode 100644 index 43facdc47b..0000000000 --- a/disas/hppa.c +++ /dev/null @@ -1,2832 +0,0 @@ -/* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c. - Copyright 1989, 1990, 1992, 1993, 1994, 1995, 1998, 1999, 2000, 2001, 2003, - 2005 Free Software Foundation, Inc. - - Contributed by the Center for Software Science at the - University of Utah (pa-gdb-bugs@cs.utah.edu). - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, see <http://www.gnu.org/licenses/>. */ - -#include "qemu/osdep.h" -#include "disas/bfd.h" - -/* HP PA-RISC SOM object file format: definitions internal to BFD. - Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, - 2003 Free Software Foundation, Inc. - - Contributed by the Center for Software Science at the - University of Utah (pa-gdb-bugs@cs.utah.edu). - - This file is part of BFD, the Binary File Descriptor library. - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, see <http://www.gnu.org/licenses/>. */ - -#ifndef _LIBHPPA_H -#define _LIBHPPA_H - -#define BYTES_IN_WORD 4 -#define PA_PAGESIZE 0x1000 - -/* The PA instruction set variants. */ -enum pa_arch {pa10 = 10, pa11 = 11, pa20 = 20, pa20w = 25}; - -/* HP PA-RISC relocation types */ - -enum hppa_reloc_field_selector_type - { - R_HPPA_FSEL = 0x0, - R_HPPA_LSSEL = 0x1, - R_HPPA_RSSEL = 0x2, - R_HPPA_LSEL = 0x3, - R_HPPA_RSEL = 0x4, - R_HPPA_LDSEL = 0x5, - R_HPPA_RDSEL = 0x6, - R_HPPA_LRSEL = 0x7, - R_HPPA_RRSEL = 0x8, - R_HPPA_NSEL = 0x9, - R_HPPA_NLSEL = 0xa, - R_HPPA_NLRSEL = 0xb, - R_HPPA_PSEL = 0xc, - R_HPPA_LPSEL = 0xd, - R_HPPA_RPSEL = 0xe, - R_HPPA_TSEL = 0xf, - R_HPPA_LTSEL = 0x10, - R_HPPA_RTSEL = 0x11, - R_HPPA_LTPSEL = 0x12, - R_HPPA_RTPSEL = 0x13 - }; - -/* /usr/include/reloc.h defines these to constants. We want to use - them in enums, so #undef them before we start using them. We might - be able to fix this another way by simply managing not to include - /usr/include/reloc.h, but currently GDB picks up these defines - somewhere. */ -#undef e_fsel -#undef e_lssel -#undef e_rssel -#undef e_lsel -#undef e_rsel -#undef e_ldsel -#undef e_rdsel -#undef e_lrsel -#undef e_rrsel -#undef e_nsel -#undef e_nlsel -#undef e_nlrsel -#undef e_psel -#undef e_lpsel -#undef e_rpsel -#undef e_tsel -#undef e_ltsel -#undef e_rtsel -#undef e_one -#undef e_two -#undef e_pcrel -#undef e_con -#undef e_plabel -#undef e_abs - -/* for compatibility */ -enum hppa_reloc_field_selector_type_alt - { - e_fsel = R_HPPA_FSEL, - e_lssel = R_HPPA_LSSEL, - e_rssel = R_HPPA_RSSEL, - e_lsel = R_HPPA_LSEL, - e_rsel = R_HPPA_RSEL, - e_ldsel = R_HPPA_LDSEL, - e_rdsel = R_HPPA_RDSEL, - e_lrsel = R_HPPA_LRSEL, - e_rrsel = R_HPPA_RRSEL, - e_nsel = R_HPPA_NSEL, - e_nlsel = R_HPPA_NLSEL, - e_nlrsel = R_HPPA_NLRSEL, - e_psel = R_HPPA_PSEL, - e_lpsel = R_HPPA_LPSEL, - e_rpsel = R_HPPA_RPSEL, - e_tsel = R_HPPA_TSEL, - e_ltsel = R_HPPA_LTSEL, - e_rtsel = R_HPPA_RTSEL, - e_ltpsel = R_HPPA_LTPSEL, - e_rtpsel = R_HPPA_RTPSEL - }; - -enum hppa_reloc_expr_type - { - R_HPPA_E_ONE = 0, - R_HPPA_E_TWO = 1, - R_HPPA_E_PCREL = 2, - R_HPPA_E_CON = 3, - R_HPPA_E_PLABEL = 7, - R_HPPA_E_ABS = 18 - }; - -/* for compatibility */ -enum hppa_reloc_expr_type_alt - { - e_one = R_HPPA_E_ONE, - e_two = R_HPPA_E_TWO, - e_pcrel = R_HPPA_E_PCREL, - e_con = R_HPPA_E_CON, - e_plabel = R_HPPA_E_PLABEL, - e_abs = R_HPPA_E_ABS - }; - - -/* Relocations for function calls must be accompanied by parameter - relocation bits. These bits describe exactly where the caller has - placed the function's arguments and where it expects to find a return - value. - - Both ELF and SOM encode this information within the addend field - of the call relocation. (Note this could break very badly if one - was to make a call like bl foo + 0x12345678). - - The high order 10 bits contain parameter relocation information, - the low order 22 bits contain the constant offset. */ - -#define HPPA_R_ARG_RELOC(a) \ - (((a) >> 22) & 0x3ff) -#define HPPA_R_CONSTANT(a) \ - ((((bfd_signed_vma)(a)) << (BFD_ARCH_SIZE-22)) >> (BFD_ARCH_SIZE-22)) -#define HPPA_R_ADDEND(r, c) \ - (((r) << 22) + ((c) & 0x3fffff)) - - -/* Some functions to manipulate PA instructions. */ - -/* Declare the functions with the unused attribute to avoid warnings. */ -static inline int sign_extend (int, int) ATTRIBUTE_UNUSED; -static inline int low_sign_extend (int, int) ATTRIBUTE_UNUSED; -static inline int sign_unext (int, int) ATTRIBUTE_UNUSED; -static inline int low_sign_unext (int, int) ATTRIBUTE_UNUSED; -static inline int re_assemble_3 (int) ATTRIBUTE_UNUSED; -static inline int re_assemble_12 (int) ATTRIBUTE_UNUSED; -static inline int re_assemble_14 (int) ATTRIBUTE_UNUSED; -static inline int re_assemble_16 (int) ATTRIBUTE_UNUSED; -static inline int re_assemble_17 (int) ATTRIBUTE_UNUSED; -static inline int re_assemble_21 (int) ATTRIBUTE_UNUSED; -static inline int re_assemble_22 (int) ATTRIBUTE_UNUSED; -static inline bfd_signed_vma hppa_field_adjust - (bfd_vma, bfd_signed_vma, enum hppa_reloc_field_selector_type_alt) - ATTRIBUTE_UNUSED; -static inline int hppa_rebuild_insn (int, int, int) ATTRIBUTE_UNUSED; - - -/* The *sign_extend functions are used to assemble various bitfields - taken from an instruction and return the resulting immediate - value. */ - -static inline int -sign_extend (int x, int len) -{ - int signbit = (1 << (len - 1)); - int mask = (signbit << 1) - 1; - return ((x & mask) ^ signbit) - signbit; -} - -static inline int -low_sign_extend (int x, int len) -{ - return (x >> 1) - ((x & 1) << (len - 1)); -} - - -/* The re_assemble_* functions prepare an immediate value for - insertion into an opcode. pa-risc uses all sorts of weird bitfields - in the instruction to hold the value. */ - -static inline int -sign_unext (int x, int len) -{ - int len_ones; - - len_ones = (1 << len) - 1; - - return x & len_ones; -} - -static inline int -low_sign_unext (int x, int len) -{ - int temp; - int sign; - - sign = (x >> (len-1)) & 1; - - temp = sign_unext (x, len-1); - - return (temp << 1) | sign; -} - -static inline int -re_assemble_3 (int as3) -{ - return (( (as3 & 4) << (13-2)) - | ((as3 & 3) << (13+1))); -} - -static inline int -re_assemble_12 (int as12) -{ - return (( (as12 & 0x800) >> 11) - | ((as12 & 0x400) >> (10 - 2)) - | ((as12 & 0x3ff) << (1 + 2))); -} - -static inline int -re_assemble_14 (int as14) -{ - return (( (as14 & 0x1fff) << 1) - | ((as14 & 0x2000) >> 13)); -} - -static inline int -re_assemble_16 (int as16) -{ - int s, t; - - /* Unusual 16-bit encoding, for wide mode only. */ - t = (as16 << 1) & 0xffff; - s = (as16 & 0x8000); - return (t ^ s ^ (s >> 1)) | (s >> 15); -} - -static inline int -re_assemble_17 (int as17) -{ - return (( (as17 & 0x10000) >> 16) - | ((as17 & 0x0f800) << (16 - 11)) - | ((as17 & 0x00400) >> (10 - 2)) - | ((as17 & 0x003ff) << (1 + 2))); -} - -static inline int -re_assemble_21 (int as21) -{ - return (( (as21 & 0x100000) >> 20) - | ((as21 & 0x0ffe00) >> 8) - | ((as21 & 0x000180) << 7) - | ((as21 & 0x00007c) << 14) - | ((as21 & 0x000003) << 12)); -} - -static inline int -re_assemble_22 (int as22) -{ - return (( (as22 & 0x200000) >> 21) - | ((as22 & 0x1f0000) << (21 - 16)) - | ((as22 & 0x00f800) << (16 - 11)) - | ((as22 & 0x000400) >> (10 - 2)) - | ((as22 & 0x0003ff) << (1 + 2))); -} - - -/* Handle field selectors for PA instructions. - The L and R (and LS, RS etc.) selectors are used in pairs to form a - full 32 bit address. eg. - - LDIL L'start,%r1 ; put left part into r1 - LDW R'start(%r1),%r2 ; add r1 and right part to form address - - This function returns sign extended values in all cases. -*/ - -static inline bfd_signed_vma -hppa_field_adjust (bfd_vma sym_val, - bfd_signed_vma addend, - enum hppa_reloc_field_selector_type_alt r_field) -{ - bfd_signed_vma value; - - value = sym_val + addend; - switch (r_field) - { - case e_fsel: - /* F: No change. */ - break; - - case e_nsel: - /* N: null selector. I don't really understand what this is all - about, but HP's documentation says "this indicates that zero - bits are to be used for the displacement on the instruction. - This fixup is used to identify three-instruction sequences to - access data (for importing shared library data)." */ - value = 0; - break; - - case e_lsel: - case e_nlsel: - /* L: Select top 21 bits. */ - value = value >> 11; - break; - - case e_rsel: - /* R: Select bottom 11 bits. */ - value = value & 0x7ff; - break; - - case e_lssel: - /* LS: Round to nearest multiple of 2048 then select top 21 bits. */ - value = value + 0x400; - value = value >> 11; - break; - - case e_rssel: - /* RS: Select bottom 11 bits for LS. - We need to return a value such that 2048 * LS'x + RS'x == x. - ie. RS'x = x - ((x + 0x400) & -0x800) - this is just a sign extension from bit 21. */ - value = ((value & 0x7ff) ^ 0x400) - 0x400; - break; - - case e_ldsel: - /* LD: Round to next multiple of 2048 then select top 21 bits. - Yes, if we are already on a multiple of 2048, we go up to the - next one. RD in this case will be -2048. */ - value = value + 0x800; - value = value >> 11; - break; - - case e_rdsel: - /* RD: Set bits 0-20 to one. */ - value = value | -0x800; - break; - - case e_lrsel: - case e_nlrsel: - /* LR: L with rounding of the addend to nearest 8k. */ - value = sym_val + ((addend + 0x1000) & -0x2000); - value = value >> 11; - break; - - case e_rrsel: - /* RR: R with rounding of the addend to nearest 8k. - We need to return a value such that 2048 * LR'x + RR'x == x - ie. RR'x = s+a - (s + (((a + 0x1000) & -0x2000) & -0x800)) - . = s+a - ((s & -0x800) + ((a + 0x1000) & -0x2000)) - . = (s & 0x7ff) + a - ((a + 0x1000) & -0x2000) */ - value = (sym_val & 0x7ff) + (((addend & 0x1fff) ^ 0x1000) - 0x1000); - break; - - default: - abort (); - } - return value; -} - -/* PA-RISC OPCODES */ -#define get_opcode(insn) (((insn) >> 26) & 0x3f) - -enum hppa_opcode_type -{ - /* None of the opcodes in the first group generate relocs, so we - aren't too concerned about them. */ - OP_SYSOP = 0x00, - OP_MEMMNG = 0x01, - OP_ALU = 0x02, - OP_NDXMEM = 0x03, - OP_SPOP = 0x04, - OP_DIAG = 0x05, - OP_FMPYADD = 0x06, - OP_UNDEF07 = 0x07, - OP_COPRW = 0x09, - OP_COPRDW = 0x0b, - OP_COPR = 0x0c, - OP_FLOAT = 0x0e, - OP_PRDSPEC = 0x0f, - OP_UNDEF15 = 0x15, - OP_UNDEF1d = 0x1d, - OP_FMPYSUB = 0x26, - OP_FPFUSED = 0x2e, - OP_SHEXDP0 = 0x34, - OP_SHEXDP1 = 0x35, - OP_SHEXDP2 = 0x36, - OP_UNDEF37 = 0x37, - OP_SHEXDP3 = 0x3c, - OP_SHEXDP4 = 0x3d, - OP_MULTMED = 0x3e, - OP_UNDEF3f = 0x3f, - - OP_LDIL = 0x08, - OP_ADDIL = 0x0a, - - OP_LDO = 0x0d, - OP_LDB = 0x10, - OP_LDH = 0x11, - OP_LDW = 0x12, - OP_LDWM = 0x13, - OP_STB = 0x18, - OP_STH = 0x19, - OP_STW = 0x1a, - OP_STWM = 0x1b, - - OP_LDD = 0x14, - OP_STD = 0x1c, - - OP_FLDW = 0x16, - OP_LDWL = 0x17, - OP_FSTW = 0x1e, - OP_STWL = 0x1f, - - OP_COMBT = 0x20, - OP_COMIBT = 0x21, - OP_COMBF = 0x22, - OP_COMIBF = 0x23, - OP_CMPBDT = 0x27, - OP_ADDBT = 0x28, - OP_ADDIBT = 0x29, - OP_ADDBF = 0x2a, - OP_ADDIBF = 0x2b, - OP_CMPBDF = 0x2f, - OP_BVB = 0x30, - OP_BB = 0x31, - OP_MOVB = 0x32, - OP_MOVIB = 0x33, - OP_CMPIBD = 0x3b, - - OP_COMICLR = 0x24, - OP_SUBI = 0x25, - OP_ADDIT = 0x2c, - OP_ADDI = 0x2d, - - OP_BE = 0x38, - OP_BLE = 0x39, - OP_BL = 0x3a -}; - - -/* Insert VALUE into INSN using R_FORMAT to determine exactly what - bits to change. */ - -static inline int -hppa_rebuild_insn (int insn, int value, int r_format) -{ - switch (r_format) - { - case 11: - return (insn & ~ 0x7ff) | low_sign_unext (value, 11); - - case 12: - return (insn & ~ 0x1ffd) | re_assemble_12 (value); - - - case 10: - return (insn & ~ 0x3ff1) | re_assemble_14 (value & -8); - - case -11: - return (insn & ~ 0x3ff9) | re_assemble_14 (value & -4); - - case 14: - return (insn & ~ 0x3fff) | re_assemble_14 (value); - - - case -10: - return (insn & ~ 0xfff1) | re_assemble_16 (value & -8); - - case -16: - return (insn & ~ 0xfff9) | re_assemble_16 (value & -4); - - case 16: - return (insn & ~ 0xffff) | re_assemble_16 (value); - - - case 17: - return (insn & ~ 0x1f1ffd) | re_assemble_17 (value); - - case 21: - return (insn & ~ 0x1fffff) | re_assemble_21 (value); - - case 22: - return (insn & ~ 0x3ff1ffd) | re_assemble_22 (value); - - case 32: - return value; - - default: - abort (); - } - return insn; -} - -#endif /* _LIBHPPA_H */ -/* Table of opcodes for the PA-RISC. - Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, - 2001, 2002, 2003, 2004, 2005 - Free Software Foundation, Inc. - - Contributed by the Center for Software Science at the - University of Utah (pa-gdb-bugs@cs.utah.edu). - -This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler. - -GAS/GDB is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 1, or (at your option) -any later version. - -GAS/GDB is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GAS or GDB; see the file COPYING. -If not, see <http://www.gnu.org/licenses/>. */ - -#if !defined(__STDC__) && !defined(const) -#define const -#endif - -/* - * Structure of an opcode table entry. - */ - -/* There are two kinds of delay slot nullification: normal which is - * controlled by the nullification bit, and conditional, which depends - * on the direction of the branch and its success or failure. - * - * NONE is unfortunately #defined in the hiux system include files. - * #undef it away. - */ -#undef NONE -struct pa_opcode -{ - const char *name; - unsigned long int match; /* Bits that must be set... */ - unsigned long int mask; /* ... in these bits. */ - const char *args; - enum pa_arch arch; - char flags; -}; - -/* Enables strict matching. Opcodes with match errors are skipped - when this bit is set. */ -#define FLAG_STRICT 0x1 - -/* - All hppa opcodes are 32 bits. - - The match component is a mask saying which bits must match a - particular opcode in order for an instruction to be an instance - of that opcode. - - The args component is a string containing one character for each operand of - the instruction. Characters used as a prefix allow any second character to - be used without conflicting with the main operand characters. - - Bit positions in this description follow HP usage of lsb = 31, - "at" is lsb of field. - - In the args field, the following characters must match exactly: - - '+,() ' - - In the args field, the following characters are unused: - - ' " - / 34 6789:; ' - '@ C M [\] ' - '` e g } ' - - Here are all the characters: - - ' !"#$%&'()*+-,./0123456789:;<=>?' - '@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_' - '`abcdefghijklmnopqrstuvwxyz{|}~ ' - -Kinds of operands: - x integer register field at 15. - b integer register field at 10. - t integer register field at 31. - a integer register field at 10 and 15 (for PERMH) - 5 5 bit immediate at 15. - s 2 bit space specifier at 17. - S 3 bit space specifier at 18. - V 5 bit immediate value at 31 - i 11 bit immediate value at 31 - j 14 bit immediate value at 31 - k 21 bit immediate value at 31 - l 16 bit immediate value at 31 (wide mode only, unusual encoding). - n nullification for branch instructions - N nullification for spop and copr instructions - w 12 bit branch displacement - W 17 bit branch displacement (PC relative) - X 22 bit branch displacement (PC relative) - z 17 bit branch displacement (just a number, not an address) - -Also these: - - . 2 bit shift amount at 25 - * 4 bit shift amount at 25 - p 5 bit shift count at 26 (to support the SHD instruction) encoded as - 31-p - ~ 6 bit shift count at 20,22:26 encoded as 63-~. - P 5 bit bit position at 26 - q 6 bit bit position at 20,22:26 - T 5 bit field length at 31 (encoded as 32-T) - % 6 bit field length at 23,27:31 (variable extract/deposit) - | 6 bit field length at 19,27:31 (fixed extract/deposit) - A 13 bit immediate at 18 (to support the BREAK instruction) - ^ like b, but describes a control register - ! sar (cr11) register - D 26 bit immediate at 31 (to support the DIAG instruction) - $ 9 bit immediate at 28 (to support POPBTS) - - v 3 bit Special Function Unit identifier at 25 - O 20 bit Special Function Unit operation split between 15 bits at 20 - and 5 bits at 31 - o 15 bit Special Function Unit operation at 20 - 2 22 bit Special Function Unit operation split between 17 bits at 20 - and 5 bits at 31 - 1 15 bit Special Function Unit operation split between 10 bits at 20 - and 5 bits at 31 - 0 10 bit Special Function Unit operation split between 5 bits at 20 - and 5 bits at 31 - u 3 bit coprocessor unit identifier at 25 - F Source Floating Point Operand Format Completer encoded 2 bits at 20 - I Source Floating Point Operand Format Completer encoded 1 bits at 20 - (for 0xe format FP instructions) - G Destination Floating Point Operand Format Completer encoded 2 bits at 18 - H Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub' - (very similar to 'F') - - r 5 bit immediate value at 31 (for the break instruction) - (very similar to V above, except the value is unsigned instead of - low_sign_ext) - R 5 bit immediate value at 15 (for the ssm, rsm, probei instructions) - (same as r above, except the value is in a different location) - U 10 bit immediate value at 15 (for SSM, RSM on pa2.0) - Q 5 bit immediate value at 10 (a bit position specified in - the bb instruction. It's the same as r above, except the - value is in a different location) - B 5 bit immediate value at 10 (a bit position specified in - the bb instruction. Similar to Q, but 64 bit handling is - different. - Z %r1 -- implicit target of addil instruction. - L ,%r2 completer for new syntax branch - { Source format completer for fcnv - _ Destination format completer for fcnv - h cbit for fcmp - = gfx tests for ftest - d 14 bit offset for single precision FP long load/store. - # 14 bit offset for double precision FP load long/store. - J Yet another 14 bit offset for load/store with ma,mb completers. - K Yet another 14 bit offset for load/store with ma,mb completers. - y 16 bit offset for word aligned load/store (PA2.0 wide). - & 16 bit offset for dword aligned load/store (PA2.0 wide). - < 16 bit offset for load/store with ma,mb completers (PA2.0 wide). - > 16 bit offset for load/store with ma,mb completers (PA2.0 wide). - Y %sr0,%r31 -- implicit target of be,l instruction. - @ implicit immediate value of 0 - -Completer operands all have 'c' as the prefix: - - cx indexed load and store completer. - cX indexed load and store completer. Like cx, but emits a space - after in disassembler. - cm short load and store completer. - cM short load and store completer. Like cm, but emits a space - after in disassembler. - cq long load and store completer (like cm, but inserted into a - different location in the target instruction). - cs store bytes short completer. - cA store bytes short completer. Like cs, but emits a space - after in disassembler. - ce long load/store completer for LDW/STW with a different encoding - than the others - cc load cache control hint - cd load and clear cache control hint - cC store cache control hint - co ordered access - - cp branch link and push completer - cP branch pop completer - cl branch link completer - cg branch gate completer - - cw read/write completer for PROBE - cW wide completer for MFCTL - cL local processor completer for cache control - cZ System Control Completer (to support LPA, LHA, etc.) - - ci correction completer for DCOR - ca add completer - cy 32 bit add carry completer - cY 64 bit add carry completer - cv signed overflow trap completer - ct trap on condition completer for ADDI, SUB - cT trap on condition completer for UADDCM - cb 32 bit borrow completer for SUB - cB 64 bit borrow completer for SUB - - ch left/right half completer - cH signed/unsigned saturation completer - cS signed/unsigned completer at 21 - cz zero/sign extension completer. - c* permutation completer - -Condition operands all have '?' as the prefix: - - ?f Floating point compare conditions (encoded as 5 bits at 31) - - ?a add conditions - ?A 64 bit add conditions - ?@ add branch conditions followed by nullify - ?d non-negated add branch conditions - ?D negated add branch conditions - ?w wide mode non-negated add branch conditions - ?W wide mode negated add branch conditions - - ?s compare/subtract conditions - ?S 64 bit compare/subtract conditions - ?t non-negated compare and branch conditions - ?n 32 bit compare and branch conditions followed by nullify - ?N 64 bit compare and branch conditions followed by nullify - ?Q 64 bit compare and branch conditions for CMPIB instruction - - ?l logical conditions - ?L 64 bit logical conditions - - ?b branch on bit conditions - ?B 64 bit branch on bit conditions - - ?x shift/extract/deposit conditions - ?X 64 bit shift/extract/deposit conditions - ?y shift/extract/deposit conditions followed by nullify for conditional - branches - - ?u unit conditions - ?U 64 bit unit conditions - -Floating point registers all have 'f' as a prefix: - - ft target register at 31 - fT target register with L/R halves at 31 - fa operand 1 register at 10 - fA operand 1 register with L/R halves at 10 - fX Same as fA, except prints a space before register during disasm - fb operand 2 register at 15 - fB operand 2 register with L/R halves at 15 - fC operand 3 register with L/R halves at 16:18,21:23 - fe Like fT, but encoding is different. - fE Same as fe, except prints a space before register during disasm. - fx target register at 15 (only for PA 2.0 long format FLDD/FSTD). - -Float registers for fmpyadd and fmpysub: - - fi mult operand 1 register at 10 - fj mult operand 2 register at 15 - fk mult target register at 20 - fl add/sub operand register at 25 - fm add/sub target register at 31 - -*/ - - -#if 0 -/* List of characters not to put a space after. Note that - "," is included, as the "spopN" operations use literal - commas in their completer sections. */ -static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}"; -#endif - -/* The order of the opcodes in this table is significant: - - * The assembler requires that all instances of the same mnemonic be - consecutive. If they aren't, the assembler will bomb at runtime. - - * Immediate fields use pa_get_absolute_expression to parse the - string. It will generate a "bad expression" error if passed - a register name. Thus, register index variants of an opcode - need to precede immediate variants. - - * The disassembler does not care about the order of the opcodes - except in cases where implicit addressing is used. - - Here are the rules for ordering the opcodes of a mnemonic: - - 1) Opcodes with FLAG_STRICT should precede opcodes without - FLAG_STRICT. - - 2) Opcodes with FLAG_STRICT should be ordered as follows: - register index opcodes, short immediate opcodes, and finally - long immediate opcodes. When both pa10 and pa11 variants - of the same opcode are available, the pa10 opcode should - come first for correct architectural promotion. - - 3) When implicit addressing is available for an opcode, the - implicit opcode should precede the explicit opcode. - - 4) Opcodes without FLAG_STRICT should be ordered as follows: - register index opcodes, long immediate opcodes, and finally - short immediate opcodes. */ - -static const struct pa_opcode pa_opcodes[] = -{ - -/* Pseudo-instructions. */ - -{ "ldi", 0x34000000, 0xffe00000, "l,x", pa20w, 0},/* ldo val(r0),r */ -{ "ldi", 0x34000000, 0xffe0c000, "j,x", pa10, 0},/* ldo val(r0),r */ - -{ "cmpib", 0xec000000, 0xfc000000, "?Qn5,b,w", pa20, FLAG_STRICT}, -{ "cmpib", 0x84000000, 0xf4000000, "?nn5,b,w", pa10, FLAG_STRICT}, -{ "comib", 0x84000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/ -/* This entry is for the disassembler only. It will never be used by - assembler. */ -{ "comib", 0x8c000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/ -{ "cmpb", 0x9c000000, 0xdc000000, "?Nnx,b,w", pa20, FLAG_STRICT}, -{ "cmpb", 0x80000000, 0xf4000000, "?nnx,b,w", pa10, FLAG_STRICT}, -{ "comb", 0x80000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */ -/* This entry is for the disassembler only. It will never be used by - assembler. */ -{ "comb", 0x88000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */ -{ "addb", 0xa0000000, 0xf4000000, "?Wnx,b,w", pa20w, FLAG_STRICT}, -{ "addb", 0xa0000000, 0xfc000000, "?@nx,b,w", pa10, 0}, /* addb{tf} */ -/* This entry is for the disassembler only. It will never be used by - assembler. */ -{ "addb", 0xa8000000, 0xfc000000, "?@nx,b,w", pa10, 0}, -{ "addib", 0xa4000000, 0xf4000000, "?Wn5,b,w", pa20w, FLAG_STRICT}, -{ "addib", 0xa4000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/ -/* This entry is for the disassembler only. It will never be used by - assembler. */ -{ "addib", 0xac000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/ -{ "nop", 0x08000240, 0xffffffff, "", pa10, 0}, /* or 0,0,0 */ -{ "copy", 0x08000240, 0xffe0ffe0, "x,t", pa10, 0}, /* or r,0,t */ -{ "mtsar", 0x01601840, 0xffe0ffff, "x", pa10, 0}, /* mtctl r,cr11 */ - -/* Loads and Stores for integer registers. */ - -{ "ldd", 0x0c0000c0, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT}, -{ "ldd", 0x0c0000c0, 0xfc0013c0, "cxccx(s,b),t", pa20, FLAG_STRICT}, -{ "ldd", 0x0c0010e0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, -{ "ldd", 0x0c0010e0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, -{ "ldd", 0x0c0010c0, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT}, -{ "ldd", 0x0c0010c0, 0xfc0013c0, "cmcc5(s,b),t", pa20, FLAG_STRICT}, -{ "ldd", 0x50000000, 0xfc000002, "cq&(b),x", pa20w, FLAG_STRICT}, -{ "ldd", 0x50000000, 0xfc00c002, "cq#(b),x", pa20, FLAG_STRICT}, -{ "ldd", 0x50000000, 0xfc000002, "cq#(s,b),x", pa20, FLAG_STRICT}, -{ "ldw", 0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, -{ "ldw", 0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, -{ "ldw", 0x0c000080, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, -{ "ldw", 0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, -{ "ldw", 0x0c0010a0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, -{ "ldw", 0x0c0010a0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, -{ "ldw", 0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, -{ "ldw", 0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, -{ "ldw", 0x0c001080, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, -{ "ldw", 0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, -{ "ldw", 0x4c000000, 0xfc000000, "ce<(b),x", pa20w, FLAG_STRICT}, -{ "ldw", 0x5c000004, 0xfc000006, "ce>(b),x", pa20w, FLAG_STRICT}, -{ "ldw", 0x48000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT}, -{ "ldw", 0x5c000004, 0xfc00c006, "ceK(b),x", pa20, FLAG_STRICT}, -{ "ldw", 0x5c000004, 0xfc000006, "ceK(s,b),x", pa20, FLAG_STRICT}, -{ "ldw", 0x4c000000, 0xfc00c000, "ceJ(b),x", pa10, FLAG_STRICT}, -{ "ldw", 0x4c000000, 0xfc000000, "ceJ(s,b),x", pa10, FLAG_STRICT}, -{ "ldw", 0x48000000, 0xfc00c000, "j(b),x", pa10, 0}, -{ "ldw", 0x48000000, 0xfc000000, "j(s,b),x", pa10, 0}, -{ "ldh", 0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, -{ "ldh", 0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, -{ "ldh", 0x0c000040, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, -{ "ldh", 0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, -{ "ldh", 0x0c001060, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, -{ "ldh", 0x0c001060, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, -{ "ldh", 0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, -{ "ldh", 0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, -{ "ldh", 0x0c001040, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, -{ "ldh", 0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, -{ "ldh", 0x44000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT}, -{ "ldh", 0x44000000, 0xfc00c000, "j(b),x", pa10, 0}, -{ "ldh", 0x44000000, 0xfc000000, "j(s,b),x", pa10, 0}, -{ "ldb", 0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, -{ "ldb", 0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, -{ "ldb", 0x0c000000, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, -{ "ldb", 0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, -{ "ldb", 0x0c001020, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, -{ "ldb", 0x0c001020, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, -{ "ldb", 0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, -{ "ldb", 0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, -{ "ldb", 0x0c001000, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, -{ "ldb", 0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, -{ "ldb", 0x40000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT}, -{ "ldb", 0x40000000, 0xfc00c000, "j(b),x", pa10, 0}, -{ "ldb", 0x40000000, 0xfc000000, "j(s,b),x", pa10, 0}, -{ "std", 0x0c0012e0, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, -{ "std", 0x0c0012e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, -{ "std", 0x0c0012c0, 0xfc00d3c0, "cmcCx,V(b)", pa20, FLAG_STRICT}, -{ "std", 0x0c0012c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT}, -{ "std", 0x70000000, 0xfc000002, "cqx,&(b)", pa20w, FLAG_STRICT}, -{ "std", 0x70000000, 0xfc00c002, "cqx,#(b)", pa20, FLAG_STRICT}, -{ "std", 0x70000000, 0xfc000002, "cqx,#(s,b)", pa20, FLAG_STRICT}, -{ "stw", 0x0c0012a0, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, -{ "stw", 0x0c0012a0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, -{ "stw", 0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, -{ "stw", 0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, -{ "stw", 0x0c001280, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, -{ "stw", 0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, -{ "stw", 0x6c000000, 0xfc000000, "cex,<(b)", pa20w, FLAG_STRICT}, -{ "stw", 0x7c000004, 0xfc000006, "cex,>(b)", pa20w, FLAG_STRICT}, -{ "stw", 0x68000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT}, -{ "stw", 0x7c000004, 0xfc00c006, "cex,K(b)", pa20, FLAG_STRICT}, -{ "stw", 0x7c000004, 0xfc000006, "cex,K(s,b)", pa20, FLAG_STRICT}, -{ "stw", 0x6c000000, 0xfc00c000, "cex,J(b)", pa10, FLAG_STRICT}, -{ "stw", 0x6c000000, 0xfc000000, "cex,J(s,b)", pa10, FLAG_STRICT}, -{ "stw", 0x68000000, 0xfc00c000, "x,j(b)", pa10, 0}, -{ "stw", 0x68000000, 0xfc000000, "x,j(s,b)", pa10, 0}, -{ "sth", 0x0c001260, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, -{ "sth", 0x0c001260, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, -{ "sth", 0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, -{ "sth", 0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, -{ "sth", 0x0c001240, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, -{ "sth", 0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, -{ "sth", 0x64000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT}, -{ "sth", 0x64000000, 0xfc00c000, "x,j(b)", pa10, 0}, -{ "sth", 0x64000000, 0xfc000000, "x,j(s,b)", pa10, 0}, -{ "stb", 0x0c001220, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, -{ "stb", 0x0c001220, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, -{ "stb", 0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, -{ "stb", 0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, -{ "stb", 0x0c001200, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, -{ "stb", 0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, -{ "stb", 0x60000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT}, -{ "stb", 0x60000000, 0xfc00c000, "x,j(b)", pa10, 0}, -{ "stb", 0x60000000, 0xfc000000, "x,j(s,b)", pa10, 0}, -{ "ldwm", 0x4c000000, 0xfc00c000, "j(b),x", pa10, 0}, -{ "ldwm", 0x4c000000, 0xfc000000, "j(s,b),x", pa10, 0}, -{ "stwm", 0x6c000000, 0xfc00c000, "x,j(b)", pa10, 0}, -{ "stwm", 0x6c000000, 0xfc000000, "x,j(s,b)", pa10, 0}, -{ "ldwx", 0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, -{ "ldwx", 0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, -{ "ldwx", 0x0c000080, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, -{ "ldwx", 0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, -{ "ldwx", 0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, 0}, -{ "ldwx", 0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, -{ "ldhx", 0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, -{ "ldhx", 0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, -{ "ldhx", 0x0c000040, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, -{ "ldhx", 0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, -{ "ldhx", 0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, 0}, -{ "ldhx", 0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, -{ "ldbx", 0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, -{ "ldbx", 0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, -{ "ldbx", 0x0c000000, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, -{ "ldbx", 0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, -{ "ldbx", 0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, 0}, -{ "ldbx", 0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, -{ "ldwa", 0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, -{ "ldwa", 0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, -{ "ldwa", 0x0c0011a0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, -{ "ldwa", 0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, -{ "ldwa", 0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, -{ "ldcw", 0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, -{ "ldcw", 0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, -{ "ldcw", 0x0c0001c0, 0xfc00d3c0, "cxcdx(b),t", pa11, FLAG_STRICT}, -{ "ldcw", 0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa11, FLAG_STRICT}, -{ "ldcw", 0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, -{ "ldcw", 0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, -{ "ldcw", 0x0c0011c0, 0xfc00d3c0, "cmcd5(b),t", pa11, FLAG_STRICT}, -{ "ldcw", 0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa11, FLAG_STRICT}, -{ "stwa", 0x0c0013a0, 0xfc00d3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, -{ "stwa", 0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, -{ "stwa", 0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, -{ "stby", 0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, FLAG_STRICT}, -{ "stby", 0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, FLAG_STRICT}, -{ "stby", 0x0c001300, 0xfc00d3c0, "cscCx,V(b)", pa11, FLAG_STRICT}, -{ "stby", 0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa11, FLAG_STRICT}, -{ "ldda", 0x0c000100, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT}, -{ "ldda", 0x0c001120, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, -{ "ldda", 0x0c001100, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT}, -{ "ldcd", 0x0c000140, 0xfc00d3c0, "cxcdx(b),t", pa20, FLAG_STRICT}, -{ "ldcd", 0x0c000140, 0xfc0013c0, "cxcdx(s,b),t", pa20, FLAG_STRICT}, -{ "ldcd", 0x0c001140, 0xfc00d3c0, "cmcd5(b),t", pa20, FLAG_STRICT}, -{ "ldcd", 0x0c001140, 0xfc0013c0, "cmcd5(s,b),t", pa20, FLAG_STRICT}, -{ "stda", 0x0c0013e0, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, -{ "stda", 0x0c0013c0, 0xfc00d3c0, "cmcCx,V(b)", pa20, FLAG_STRICT}, -{ "ldwax", 0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, -{ "ldwax", 0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, -{ "ldwax", 0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, 0}, -{ "ldcwx", 0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, -{ "ldcwx", 0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, -{ "ldcwx", 0x0c0001c0, 0xfc00d3c0, "cxcdx(b),t", pa11, FLAG_STRICT}, -{ "ldcwx", 0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa11, FLAG_STRICT}, -{ "ldcwx", 0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, 0}, -{ "ldcwx", 0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, -{ "ldws", 0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, -{ "ldws", 0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, -{ "ldws", 0x0c001080, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, -{ "ldws", 0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, -{ "ldws", 0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, 0}, -{ "ldws", 0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, -{ "ldhs", 0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, -{ "ldhs", 0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, -{ "ldhs", 0x0c001040, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, -{ "ldhs", 0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, -{ "ldhs", 0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, 0}, -{ "ldhs", 0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, -{ "ldbs", 0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, -{ "ldbs", 0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, -{ "ldbs", 0x0c001000, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, -{ "ldbs", 0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, -{ "ldbs", 0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, 0}, -{ "ldbs", 0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, -{ "ldwas", 0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, -{ "ldwas", 0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, -{ "ldwas", 0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, 0}, -{ "ldcws", 0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, -{ "ldcws", 0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, -{ "ldcws", 0x0c0011c0, 0xfc00d3c0, "cmcd5(b),t", pa11, FLAG_STRICT}, -{ "ldcws", 0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa11, FLAG_STRICT}, -{ "ldcws", 0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, 0}, -{ "ldcws", 0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, -{ "stws", 0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, -{ "stws", 0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, -{ "stws", 0x0c001280, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, -{ "stws", 0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, -{ "stws", 0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, 0}, -{ "stws", 0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, 0}, -{ "sths", 0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, -{ "sths", 0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, -{ "sths", 0x0c001240, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, -{ "sths", 0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, -{ "sths", 0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, 0}, -{ "sths", 0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, 0}, -{ "stbs", 0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, -{ "stbs", 0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, -{ "stbs", 0x0c001200, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, -{ "stbs", 0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, -{ "stbs", 0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, 0}, -{ "stbs", 0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, 0}, -{ "stwas", 0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, -{ "stwas", 0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, -{ "stwas", 0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, 0}, -{ "stdby", 0x0c001340, 0xfc00d3c0, "cscCx,V(b)", pa20, FLAG_STRICT}, -{ "stdby", 0x0c001340, 0xfc0013c0, "cscCx,V(s,b)", pa20, FLAG_STRICT}, -{ "stbys", 0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, FLAG_STRICT}, -{ "stbys", 0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, FLAG_STRICT}, -{ "stbys", 0x0c001300, 0xfc00d3c0, "cscCx,V(b)", pa11, FLAG_STRICT}, -{ "stbys", 0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa11, FLAG_STRICT}, -{ "stbys", 0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, 0}, -{ "stbys", 0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, 0}, - -/* Immediate instructions. */ -{ "ldo", 0x34000000, 0xfc000000, "l(b),x", pa20w, 0}, -{ "ldo", 0x34000000, 0xfc00c000, "j(b),x", pa10, 0}, -{ "ldil", 0x20000000, 0xfc000000, "k,b", pa10, 0}, -{ "addil", 0x28000000, 0xfc000000, "k,b,Z", pa10, 0}, -{ "addil", 0x28000000, 0xfc000000, "k,b", pa10, 0}, - -/* Branching instructions. */ -{ "b", 0xe8008000, 0xfc00e000, "cpnXL", pa20, FLAG_STRICT}, -{ "b", 0xe800a000, 0xfc00e000, "clnXL", pa20, FLAG_STRICT}, -{ "b", 0xe8000000, 0xfc00e000, "clnW,b", pa10, FLAG_STRICT}, -{ "b", 0xe8002000, 0xfc00e000, "cgnW,b", pa10, FLAG_STRICT}, -{ "b", 0xe8000000, 0xffe0e000, "nW", pa10, 0}, /* b,l foo,r0 */ -{ "bl", 0xe8000000, 0xfc00e000, "nW,b", pa10, 0}, -{ "gate", 0xe8002000, 0xfc00e000, "nW,b", pa10, 0}, -{ "blr", 0xe8004000, 0xfc00e001, "nx,b", pa10, 0}, -{ "bv", 0xe800c000, 0xfc00fffd, "nx(b)", pa10, 0}, -{ "bv", 0xe800c000, 0xfc00fffd, "n(b)", pa10, 0}, -{ "bve", 0xe800f001, 0xfc1ffffd, "cpn(b)L", pa20, FLAG_STRICT}, -{ "bve", 0xe800f000, 0xfc1ffffd, "cln(b)L", pa20, FLAG_STRICT}, -{ "bve", 0xe800d001, 0xfc1ffffd, "cPn(b)", pa20, FLAG_STRICT}, -{ "bve", 0xe800d000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT}, -{ "be", 0xe4000000, 0xfc000000, "clnz(S,b),Y", pa10, FLAG_STRICT}, -{ "be", 0xe4000000, 0xfc000000, "clnz(b),Y", pa10, FLAG_STRICT}, -{ "be", 0xe0000000, 0xfc000000, "nz(S,b)", pa10, 0}, -{ "be", 0xe0000000, 0xfc000000, "nz(b)", pa10, 0}, -{ "ble", 0xe4000000, 0xfc000000, "nz(S,b)", pa10, 0}, -{ "movb", 0xc8000000, 0xfc000000, "?ynx,b,w", pa10, 0}, -{ "movib", 0xcc000000, 0xfc000000, "?yn5,b,w", pa10, 0}, -{ "combt", 0x80000000, 0xfc000000, "?tnx,b,w", pa10, 0}, -{ "combf", 0x88000000, 0xfc000000, "?tnx,b,w", pa10, 0}, -{ "comibt", 0x84000000, 0xfc000000, "?tn5,b,w", pa10, 0}, -{ "comibf", 0x8c000000, 0xfc000000, "?tn5,b,w", pa10, 0}, -{ "addbt", 0xa0000000, 0xfc000000, "?dnx,b,w", pa10, 0}, -{ "addbf", 0xa8000000, 0xfc000000, "?dnx,b,w", pa10, 0}, -{ "addibt", 0xa4000000, 0xfc000000, "?dn5,b,w", pa10, 0}, -{ "addibf", 0xac000000, 0xfc000000, "?dn5,b,w", pa10, 0}, -{ "bb", 0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT}, -{ "bb", 0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT}, -{ "bb", 0xc4004000, 0xfc006000, "?bnx,Q,w", pa10, FLAG_STRICT}, -{ "bb", 0xc4004000, 0xfc004000, "?Bnx,B,w", pa20, FLAG_STRICT}, -{ "bvb", 0xc0004000, 0xffe04000, "?bnx,w", pa10, 0}, -{ "clrbts", 0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT}, -{ "popbts", 0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT}, -{ "pushnom", 0xe8004001, 0xffffffff, "", pa20, FLAG_STRICT}, -{ "pushbts", 0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT}, - -/* Computation Instructions. */ - -{ "cmpclr", 0x080008a0, 0xfc000fe0, "?Sx,b,t", pa20, FLAG_STRICT}, -{ "cmpclr", 0x08000880, 0xfc000fe0, "?sx,b,t", pa10, FLAG_STRICT}, -{ "comclr", 0x08000880, 0xfc000fe0, "?sx,b,t", pa10, 0}, -{ "or", 0x08000260, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, -{ "or", 0x08000240, 0xfc000fe0, "?lx,b,t", pa10, 0}, -{ "xor", 0x080002a0, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, -{ "xor", 0x08000280, 0xfc000fe0, "?lx,b,t", pa10, 0}, -{ "and", 0x08000220, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, -{ "and", 0x08000200, 0xfc000fe0, "?lx,b,t", pa10, 0}, -{ "andcm", 0x08000020, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, -{ "andcm", 0x08000000, 0xfc000fe0, "?lx,b,t", pa10, 0}, -{ "uxor", 0x080003a0, 0xfc000fe0, "?Ux,b,t", pa20, FLAG_STRICT}, -{ "uxor", 0x08000380, 0xfc000fe0, "?ux,b,t", pa10, 0}, -{ "uaddcm", 0x080009a0, 0xfc000fa0, "cT?Ux,b,t", pa20, FLAG_STRICT}, -{ "uaddcm", 0x08000980, 0xfc000fa0, "cT?ux,b,t", pa10, FLAG_STRICT}, -{ "uaddcm", 0x08000980, 0xfc000fe0, "?ux,b,t", pa10, 0}, -{ "uaddcmt", 0x080009c0, 0xfc000fe0, "?ux,b,t", pa10, 0}, -{ "dcor", 0x08000ba0, 0xfc1f0fa0, "ci?Ub,t", pa20, FLAG_STRICT}, -{ "dcor", 0x08000b80, 0xfc1f0fa0, "ci?ub,t", pa10, FLAG_STRICT}, -{ "dcor", 0x08000b80, 0xfc1f0fe0, "?ub,t", pa10, 0}, -{ "idcor", 0x08000bc0, 0xfc1f0fe0, "?ub,t", pa10, 0}, -{ "addi", 0xb0000000, 0xfc000000, "ct?ai,b,x", pa10, FLAG_STRICT}, -{ "addi", 0xb4000000, 0xfc000000, "cv?ai,b,x", pa10, FLAG_STRICT}, -{ "addi", 0xb4000000, 0xfc000800, "?ai,b,x", pa10, 0}, -{ "addio", 0xb4000800, 0xfc000800, "?ai,b,x", pa10, 0}, -{ "addit", 0xb0000000, 0xfc000800, "?ai,b,x", pa10, 0}, -{ "addito", 0xb0000800, 0xfc000800, "?ai,b,x", pa10, 0}, -{ "add", 0x08000720, 0xfc0007e0, "cY?Ax,b,t", pa20, FLAG_STRICT}, -{ "add", 0x08000700, 0xfc0007e0, "cy?ax,b,t", pa10, FLAG_STRICT}, -{ "add", 0x08000220, 0xfc0003e0, "ca?Ax,b,t", pa20, FLAG_STRICT}, -{ "add", 0x08000200, 0xfc0003e0, "ca?ax,b,t", pa10, FLAG_STRICT}, -{ "add", 0x08000600, 0xfc000fe0, "?ax,b,t", pa10, 0}, -{ "addl", 0x08000a00, 0xfc000fe0, "?ax,b,t", pa10, 0}, -{ "addo", 0x08000e00, 0xfc000fe0, "?ax,b,t", pa10, 0}, -{ "addc", 0x08000700, 0xfc000fe0, "?ax,b,t", pa10, 0}, -{ "addco", 0x08000f00, 0xfc000fe0, "?ax,b,t", pa10, 0}, -{ "sub", 0x080004e0, 0xfc0007e0, "ct?Sx,b,t", pa20, FLAG_STRICT}, -{ "sub", 0x080004c0, 0xfc0007e0, "ct?sx,b,t", pa10, FLAG_STRICT}, -{ "sub", 0x08000520, 0xfc0007e0, "cB?Sx,b,t", pa20, FLAG_STRICT}, -{ "sub", 0x08000500, 0xfc0007e0, "cb?sx,b,t", pa10, FLAG_STRICT}, -{ "sub", 0x08000420, 0xfc0007e0, "cv?Sx,b,t", pa20, FLAG_STRICT}, -{ "sub", 0x08000400, 0xfc0007e0, "cv?sx,b,t", pa10, FLAG_STRICT}, -{ "sub", 0x08000400, 0xfc000fe0, "?sx,b,t", pa10, 0}, -{ "subo", 0x08000c00, 0xfc000fe0, "?sx,b,t", pa10, 0}, -{ "subb", 0x08000500, 0xfc000fe0, "?sx,b,t", pa10, 0}, -{ "subbo", 0x08000d00, 0xfc000fe0, "?sx,b,t", pa10, 0}, -{ "subt", 0x080004c0, 0xfc000fe0, "?sx,b,t", pa10, 0}, -{ "subto", 0x08000cc0, 0xfc000fe0, "?sx,b,t", pa10, 0}, -{ "ds", 0x08000440, 0xfc000fe0, "?sx,b,t", pa10, 0}, -{ "subi", 0x94000000, 0xfc000000, "cv?si,b,x", pa10, FLAG_STRICT}, -{ "subi", 0x94000000, 0xfc000800, "?si,b,x", pa10, 0}, -{ "subio", 0x94000800, 0xfc000800, "?si,b,x", pa10, 0}, -{ "cmpiclr", 0x90000800, 0xfc000800, "?Si,b,x", pa20, FLAG_STRICT}, -{ "cmpiclr", 0x90000000, 0xfc000800, "?si,b,x", pa10, FLAG_STRICT}, -{ "comiclr", 0x90000000, 0xfc000800, "?si,b,x", pa10, 0}, -{ "shladd", 0x08000220, 0xfc000320, "ca?Ax,.,b,t", pa20, FLAG_STRICT}, -{ "shladd", 0x08000200, 0xfc000320, "ca?ax,.,b,t", pa10, FLAG_STRICT}, -{ "sh1add", 0x08000640, 0xfc000fe0, "?ax,b,t", pa10, 0}, -{ "sh1addl", 0x08000a40, 0xfc000fe0, "?ax,b,t", pa10, 0}, -{ "sh1addo", 0x08000e40, 0xfc000fe0, "?ax,b,t", pa10, 0}, -{ "sh2add", 0x08000680, 0xfc000fe0, "?ax,b,t", pa10, 0}, -{ "sh2addl", 0x08000a80, 0xfc000fe0, "?ax,b,t", pa10, 0}, -{ "sh2addo", 0x08000e80, 0xfc000fe0, "?ax,b,t", pa10, 0}, -{ "sh3add", 0x080006c0, 0xfc000fe0, "?ax,b,t", pa10, 0}, -{ "sh3addl", 0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10, 0}, -{ "sh3addo", 0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10, 0}, - -/* Subword Operation Instructions. */ - -{ "hadd", 0x08000300, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT}, -{ "havg", 0x080002c0, 0xfc00ffe0, "x,b,t", pa20, FLAG_STRICT}, -{ "hshl", 0xf8008800, 0xffe0fc20, "x,*,t", pa20, FLAG_STRICT}, -{ "hshladd", 0x08000700, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT}, -{ "hshr", 0xf800c800, 0xfc1ff820, "cSb,*,t", pa20, FLAG_STRICT}, -{ "hshradd", 0x08000500, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT}, -{ "hsub", 0x08000100, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT}, -{ "mixh", 0xf8008400, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT}, -{ "mixw", 0xf8008000, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT}, -{ "permh", 0xf8000000, 0xfc009020, "c*a,t", pa20, FLAG_STRICT}, - - -/* Extract and Deposit Instructions. */ - -{ "shrpd", 0xd0000200, 0xfc001fe0, "?Xx,b,!,t", pa20, FLAG_STRICT}, -{ "shrpd", 0xd0000400, 0xfc001400, "?Xx,b,~,t", pa20, FLAG_STRICT}, -{ "shrpw", 0xd0000000, 0xfc001fe0, "?xx,b,!,t", pa10, FLAG_STRICT}, -{ "shrpw", 0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, FLAG_STRICT}, -{ "vshd", 0xd0000000, 0xfc001fe0, "?xx,b,t", pa10, 0}, -{ "shd", 0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, 0}, -{ "extrd", 0xd0001200, 0xfc001ae0, "cS?Xb,!,%,x", pa20, FLAG_STRICT}, -{ "extrd", 0xd8000000, 0xfc000000, "cS?Xb,q,|,x", pa20, FLAG_STRICT}, -{ "extrw", 0xd0001000, 0xfc001be0, "cS?xb,!,T,x", pa10, FLAG_STRICT}, -{ "extrw", 0xd0001800, 0xfc001800, "cS?xb,P,T,x", pa10, FLAG_STRICT}, -{ "vextru", 0xd0001000, 0xfc001fe0, "?xb,T,x", pa10, 0}, -{ "vextrs", 0xd0001400, 0xfc001fe0, "?xb,T,x", pa10, 0}, -{ "extru", 0xd0001800, 0xfc001c00, "?xb,P,T,x", pa10, 0}, -{ "extrs", 0xd0001c00, 0xfc001c00, "?xb,P,T,x", pa10, 0}, -{ "depd", 0xd4000200, 0xfc001ae0, "cz?Xx,!,%,b", pa20, FLAG_STRICT}, -{ "depd", 0xf0000000, 0xfc000000, "cz?Xx,~,|,b", pa20, FLAG_STRICT}, -{ "depdi", 0xd4001200, 0xfc001ae0, "cz?X5,!,%,b", pa20, FLAG_STRICT}, -{ "depdi", 0xf4000000, 0xfc000000, "cz?X5,~,|,b", pa20, FLAG_STRICT}, -{ "depw", 0xd4000000, 0xfc001be0, "cz?xx,!,T,b", pa10, FLAG_STRICT}, -{ "depw", 0xd4000800, 0xfc001800, "cz?xx,p,T,b", pa10, FLAG_STRICT}, -{ "depwi", 0xd4001000, 0xfc001be0, "cz?x5,!,T,b", pa10, FLAG_STRICT}, -{ "depwi", 0xd4001800, 0xfc001800, "cz?x5,p,T,b", pa10, FLAG_STRICT}, -{ "zvdep", 0xd4000000, 0xfc001fe0, "?xx,T,b", pa10, 0}, -{ "vdep", 0xd4000400, 0xfc001fe0, "?xx,T,b", pa10, 0}, -{ "zdep", 0xd4000800, 0xfc001c00, "?xx,p,T,b", pa10, 0}, -{ "dep", 0xd4000c00, 0xfc001c00, "?xx,p,T,b", pa10, 0}, -{ "zvdepi", 0xd4001000, 0xfc001fe0, "?x5,T,b", pa10, 0}, -{ "vdepi", 0xd4001400, 0xfc001fe0, "?x5,T,b", pa10, 0}, -{ "zdepi", 0xd4001800, 0xfc001c00, "?x5,p,T,b", pa10, 0}, -{ "depi", 0xd4001c00, 0xfc001c00, "?x5,p,T,b", pa10, 0}, - -/* System Control Instructions. */ - -{ "break", 0x00000000, 0xfc001fe0, "r,A", pa10, 0}, -{ "rfi", 0x00000c00, 0xffffff1f, "cr", pa10, FLAG_STRICT}, -{ "rfi", 0x00000c00, 0xffffffff, "", pa10, 0}, -{ "rfir", 0x00000ca0, 0xffffffff, "", pa11, 0}, -{ "ssm", 0x00000d60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT}, -{ "ssm", 0x00000d60, 0xffe0ffe0, "R,t", pa10, 0}, -{ "rsm", 0x00000e60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT}, -{ "rsm", 0x00000e60, 0xffe0ffe0, "R,t", pa10, 0}, -{ "mtsm", 0x00001860, 0xffe0ffff, "x", pa10, 0}, -{ "ldsid", 0x000010a0, 0xfc1fffe0, "(b),t", pa10, 0}, -{ "ldsid", 0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10, 0}, -{ "mtsp", 0x00001820, 0xffe01fff, "x,S", pa10, 0}, -{ "mtctl", 0x00001840, 0xfc00ffff, "x,^", pa10, 0}, -{ "mtsarcm", 0x016018C0, 0xffe0ffff, "x", pa20, FLAG_STRICT}, -{ "mfia", 0x000014A0, 0xffffffe0, "t", pa20, FLAG_STRICT}, -{ "mfsp", 0x000004a0, 0xffff1fe0, "S,t", pa10, 0}, -{ "mfctl", 0x016048a0, 0xffffffe0, "cW!,t", pa20, FLAG_STRICT}, -{ "mfctl", 0x000008a0, 0xfc1fffe0, "^,t", pa10, 0}, -{ "sync", 0x00000400, 0xffffffff, "", pa10, 0}, -{ "syncdma", 0x00100400, 0xffffffff, "", pa10, 0}, -{ "probe", 0x04001180, 0xfc00ffa0, "cw(b),x,t", pa10, FLAG_STRICT}, -{ "probe", 0x04001180, 0xfc003fa0, "cw(s,b),x,t", pa10, FLAG_STRICT}, -{ "probei", 0x04003180, 0xfc00ffa0, "cw(b),R,t", pa10, FLAG_STRICT}, -{ "probei", 0x04003180, 0xfc003fa0, "cw(s,b),R,t", pa10, FLAG_STRICT}, -{ "prober", 0x04001180, 0xfc00ffe0, "(b),x,t", pa10, 0}, -{ "prober", 0x04001180, 0xfc003fe0, "(s,b),x,t", pa10, 0}, -{ "proberi", 0x04003180, 0xfc00ffe0, "(b),R,t", pa10, 0}, -{ "proberi", 0x04003180, 0xfc003fe0, "(s,b),R,t", pa10, 0}, -{ "probew", 0x040011c0, 0xfc00ffe0, "(b),x,t", pa10, 0}, -{ "probew", 0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10, 0}, -{ "probewi", 0x040031c0, 0xfc00ffe0, "(b),R,t", pa10, 0}, -{ "probewi", 0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10, 0}, -{ "lpa", 0x04001340, 0xfc00ffc0, "cZx(b),t", pa10, 0}, -{ "lpa", 0x04001340, 0xfc003fc0, "cZx(s,b),t", pa10, 0}, -{ "lci", 0x04001300, 0xfc00ffe0, "x(b),t", pa11, 0}, -{ "lci", 0x04001300, 0xfc003fe0, "x(s,b),t", pa11, 0}, -{ "pdtlb", 0x04001600, 0xfc00ffdf, "cLcZx(b)", pa20, FLAG_STRICT}, -{ "pdtlb", 0x04001600, 0xfc003fdf, "cLcZx(s,b)", pa20, FLAG_STRICT}, -{ "pdtlb", 0x04001600, 0xfc1fffdf, "cLcZ@(b)", pa20, FLAG_STRICT}, -{ "pdtlb", 0x04001600, 0xfc1f3fdf, "cLcZ@(s,b)", pa20, FLAG_STRICT}, -{ "pdtlb", 0x04001200, 0xfc00ffdf, "cZx(b)", pa10, 0}, -{ "pdtlb", 0x04001200, 0xfc003fdf, "cZx(s,b)", pa10, 0}, -{ "pitlb", 0x04000600, 0xfc001fdf, "cLcZx(S,b)", pa20, FLAG_STRICT}, -{ "pitlb", 0x04000600, 0xfc1f1fdf, "cLcZ@(S,b)", pa20, FLAG_STRICT}, -{ "pitlb", 0x04000200, 0xfc001fdf, "cZx(S,b)", pa10, 0}, -{ "pdtlbe", 0x04001240, 0xfc00ffdf, "cZx(b)", pa10, 0}, -{ "pdtlbe", 0x04001240, 0xfc003fdf, "cZx(s,b)", pa10, 0}, -{ "pitlbe", 0x04000240, 0xfc001fdf, "cZx(S,b)", pa10, 0}, -{ "idtlba", 0x04001040, 0xfc00ffff, "x,(b)", pa10, 0}, -{ "idtlba", 0x04001040, 0xfc003fff, "x,(s,b)", pa10, 0}, -{ "iitlba", 0x04000040, 0xfc001fff, "x,(S,b)", pa10, 0}, -{ "idtlbp", 0x04001000, 0xfc00ffff, "x,(b)", pa10, 0}, -{ "idtlbp", 0x04001000, 0xfc003fff, "x,(s,b)", pa10, 0}, -{ "iitlbp", 0x04000000, 0xfc001fff, "x,(S,b)", pa10, 0}, -{ "pdc", 0x04001380, 0xfc00ffdf, "cZx(b)", pa10, 0}, -{ "pdc", 0x04001380, 0xfc003fdf, "cZx(s,b)", pa10, 0}, -{ "fdc", 0x04001280, 0xfc00ffdf, "cZx(b)", pa10, FLAG_STRICT}, -{ "fdc", 0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, FLAG_STRICT}, -{ "fdc", 0x04003280, 0xfc00ffff, "5(b)", pa20, FLAG_STRICT}, -{ "fdc", 0x04003280, 0xfc003fff, "5(s,b)", pa20, FLAG_STRICT}, -{ "fdc", 0x04001280, 0xfc00ffdf, "cZx(b)", pa10, 0}, -{ "fdc", 0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, 0}, -{ "fic", 0x040013c0, 0xfc00dfdf, "cZx(b)", pa20, FLAG_STRICT}, -{ "fic", 0x04000280, 0xfc001fdf, "cZx(S,b)", pa10, 0}, -{ "fdce", 0x040012c0, 0xfc00ffdf, "cZx(b)", pa10, 0}, -{ "fdce", 0x040012c0, 0xfc003fdf, "cZx(s,b)", pa10, 0}, -{ "fice", 0x040002c0, 0xfc001fdf, "cZx(S,b)", pa10, 0}, -{ "diag", 0x14000000, 0xfc000000, "D", pa10, 0}, -{ "idtlbt", 0x04001800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT}, -{ "iitlbt", 0x04000800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT}, - -/* These may be specific to certain versions of the PA. Joel claimed - they were 72000 (7200?) specific. However, I'm almost certain the - mtcpu/mfcpu were undocumented, but available in the older 700 machines. */ -{ "mtcpu", 0x14001600, 0xfc00ffff, "x,^", pa10, 0}, -{ "mfcpu", 0x14001A00, 0xfc00ffff, "^,x", pa10, 0}, -{ "tocen", 0x14403600, 0xffffffff, "", pa10, 0}, -{ "tocdis", 0x14401620, 0xffffffff, "", pa10, 0}, -{ "shdwgr", 0x14402600, 0xffffffff, "", pa10, 0}, -{ "grshdw", 0x14400620, 0xffffffff, "", pa10, 0}, - -/* gfw and gfr are not in the HP PA 1.1 manual, but they are in either - the Timex FPU or the Mustang ERS (not sure which) manual. */ -{ "gfw", 0x04001680, 0xfc00ffdf, "cZx(b)", pa11, 0}, -{ "gfw", 0x04001680, 0xfc003fdf, "cZx(s,b)", pa11, 0}, -{ "gfr", 0x04001a80, 0xfc00ffdf, "cZx(b)", pa11, 0}, -{ "gfr", 0x04001a80, 0xfc003fdf, "cZx(s,b)", pa11, 0}, - -/* Floating Point Coprocessor Instructions. */ - -{ "fldw", 0x24000000, 0xfc00df80, "cXx(b),fT", pa10, FLAG_STRICT}, -{ "fldw", 0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, FLAG_STRICT}, -{ "fldw", 0x24000000, 0xfc00d380, "cxccx(b),fT", pa11, FLAG_STRICT}, -{ "fldw", 0x24000000, 0xfc001380, "cxccx(s,b),fT", pa11, FLAG_STRICT}, -{ "fldw", 0x24001020, 0xfc1ff3a0, "cocc@(b),fT", pa20, FLAG_STRICT}, -{ "fldw", 0x24001020, 0xfc1f33a0, "cocc@(s,b),fT", pa20, FLAG_STRICT}, -{ "fldw", 0x24001000, 0xfc00df80, "cM5(b),fT", pa10, FLAG_STRICT}, -{ "fldw", 0x24001000, 0xfc001f80, "cM5(s,b),fT", pa10, FLAG_STRICT}, -{ "fldw", 0x24001000, 0xfc00d380, "cmcc5(b),fT", pa11, FLAG_STRICT}, -{ "fldw", 0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa11, FLAG_STRICT}, -{ "fldw", 0x5c000000, 0xfc000004, "y(b),fe", pa20w, FLAG_STRICT}, -{ "fldw", 0x58000000, 0xfc000000, "cJy(b),fe", pa20w, FLAG_STRICT}, -{ "fldw", 0x5c000000, 0xfc00c004, "d(b),fe", pa20, FLAG_STRICT}, -{ "fldw", 0x5c000000, 0xfc000004, "d(s,b),fe", pa20, FLAG_STRICT}, -{ "fldw", 0x58000000, 0xfc00c000, "cJd(b),fe", pa20, FLAG_STRICT}, -{ "fldw", 0x58000000, 0xfc000000, "cJd(s,b),fe", pa20, FLAG_STRICT}, -{ "fldd", 0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, FLAG_STRICT}, -{ "fldd", 0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, FLAG_STRICT}, -{ "fldd", 0x2c000000, 0xfc00d3c0, "cxccx(b),ft", pa11, FLAG_STRICT}, -{ "fldd", 0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa11, FLAG_STRICT}, -{ "fldd", 0x2c001020, 0xfc1ff3e0, "cocc@(b),ft", pa20, FLAG_STRICT}, -{ "fldd", 0x2c001020, 0xfc1f33e0, "cocc@(s,b),ft", pa20, FLAG_STRICT}, -{ "fldd", 0x2c001000, 0xfc00dfc0, "cM5(b),ft", pa10, FLAG_STRICT}, -{ "fldd", 0x2c001000, 0xfc001fc0, "cM5(s,b),ft", pa10, FLAG_STRICT}, -{ "fldd", 0x2c001000, 0xfc00d3c0, "cmcc5(b),ft", pa11, FLAG_STRICT}, -{ "fldd", 0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa11, FLAG_STRICT}, -{ "fldd", 0x50000002, 0xfc000002, "cq&(b),fx", pa20w, FLAG_STRICT}, -{ "fldd", 0x50000002, 0xfc00c002, "cq#(b),fx", pa20, FLAG_STRICT}, -{ "fldd", 0x50000002, 0xfc000002, "cq#(s,b),fx", pa20, FLAG_STRICT}, -{ "fstw", 0x24000200, 0xfc00df80, "cXfT,x(b)", pa10, FLAG_STRICT}, -{ "fstw", 0x24000200, 0xfc001f80, "cXfT,x(s,b)", pa10, FLAG_STRICT}, -{ "fstw", 0x24000200, 0xfc00d380, "cxcCfT,x(b)", pa11, FLAG_STRICT}, -{ "fstw", 0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa11, FLAG_STRICT}, -{ "fstw", 0x24001220, 0xfc1ff3a0, "cocCfT,@(b)", pa20, FLAG_STRICT}, -{ "fstw", 0x24001220, 0xfc1f33a0, "cocCfT,@(s,b)", pa20, FLAG_STRICT}, -{ "fstw", 0x24001200, 0xfc00df80, "cMfT,5(b)", pa10, FLAG_STRICT}, -{ "fstw", 0x24001200, 0xfc001f80, "cMfT,5(s,b)", pa10, FLAG_STRICT}, -{ "fstw", 0x24001200, 0xfc00df80, "cMfT,5(b)", pa10, FLAG_STRICT}, -{ "fstw", 0x24001200, 0xfc001f80, "cMfT,5(s,b)", pa10, FLAG_STRICT}, -{ "fstw", 0x7c000000, 0xfc000004, "fE,y(b)", pa20w, FLAG_STRICT}, -{ "fstw", 0x78000000, 0xfc000000, "cJfE,y(b)", pa20w, FLAG_STRICT}, -{ "fstw", 0x7c000000, 0xfc00c004, "fE,d(b)", pa20, FLAG_STRICT}, -{ "fstw", 0x7c000000, 0xfc000004, "fE,d(s,b)", pa20, FLAG_STRICT}, -{ "fstw", 0x78000000, 0xfc00c000, "cJfE,d(b)", pa20, FLAG_STRICT}, -{ "fstw", 0x78000000, 0xfc000000, "cJfE,d(s,b)", pa20, FLAG_STRICT}, -{ "fstd", 0x2c000200, 0xfc00dfc0, "cXft,x(b)", pa10, FLAG_STRICT}, -{ "fstd", 0x2c000200, 0xfc001fc0, "cXft,x(s,b)", pa10, FLAG_STRICT}, -{ "fstd", 0x2c000200, 0xfc00d3c0, "cxcCft,x(b)", pa11, FLAG_STRICT}, -{ "fstd", 0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa11, FLAG_STRICT}, -{ "fstd", 0x2c001220, 0xfc1ff3e0, "cocCft,@(b)", pa20, FLAG_STRICT}, -{ "fstd", 0x2c001220, 0xfc1f33e0, "cocCft,@(s,b)", pa20, FLAG_STRICT}, -{ "fstd", 0x2c001200, 0xfc00dfc0, "cMft,5(b)", pa10, FLAG_STRICT}, -{ "fstd", 0x2c001200, 0xfc001fc0, "cMft,5(s,b)", pa10, FLAG_STRICT}, -{ "fstd", 0x2c001200, 0xfc00d3c0, "cmcCft,5(b)", pa11, FLAG_STRICT}, -{ "fstd", 0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa11, FLAG_STRICT}, -{ "fstd", 0x70000002, 0xfc000002, "cqfx,&(b)", pa20w, FLAG_STRICT}, -{ "fstd", 0x70000002, 0xfc00c002, "cqfx,#(b)", pa20, FLAG_STRICT}, -{ "fstd", 0x70000002, 0xfc000002, "cqfx,#(s,b)", pa20, FLAG_STRICT}, -{ "fldwx", 0x24000000, 0xfc00df80, "cXx(b),fT", pa10, FLAG_STRICT}, -{ "fldwx", 0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, FLAG_STRICT}, -{ "fldwx", 0x24000000, 0xfc00d380, "cxccx(b),fT", pa11, FLAG_STRICT}, -{ "fldwx", 0x24000000, 0xfc001380, "cxccx(s,b),fT", pa11, FLAG_STRICT}, -{ "fldwx", 0x24000000, 0xfc00df80, "cXx(b),fT", pa10, 0}, -{ "fldwx", 0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, 0}, -{ "flddx", 0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, FLAG_STRICT}, -{ "flddx", 0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, FLAG_STRICT}, -{ "flddx", 0x2c000000, 0xfc00d3c0, "cxccx(b),ft", pa11, FLAG_STRICT}, -{ "flddx", 0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa11, FLAG_STRICT}, -{ "flddx", 0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, 0}, -{ "flddx", 0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, 0}, -{ "fstwx", 0x24000200, 0xfc00df80, "cxfT,x(b)", pa10, FLAG_STRICT}, -{ "fstwx", 0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, FLAG_STRICT}, -{ "fstwx", 0x24000200, 0xfc00d380, "cxcCfT,x(b)", pa11, FLAG_STRICT}, -{ "fstwx", 0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa11, FLAG_STRICT}, -{ "fstwx", 0x24000200, 0xfc00df80, "cxfT,x(b)", pa10, 0}, -{ "fstwx", 0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, 0}, -{ "fstdx", 0x2c000200, 0xfc00dfc0, "cxft,x(b)", pa10, FLAG_STRICT}, -{ "fstdx", 0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, FLAG_STRICT}, -{ "fstdx", 0x2c000200, 0xfc00d3c0, "cxcCft,x(b)", pa11, FLAG_STRICT}, -{ "fstdx", 0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa11, FLAG_STRICT}, -{ "fstdx", 0x2c000200, 0xfc00dfc0, "cxft,x(b)", pa10, 0}, -{ "fstdx", 0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0}, -{ "fstqx", 0x3c000200, 0xfc00dfc0, "cxft,x(b)", pa10, 0}, -{ "fstqx", 0x3c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0}, -{ "fldws", 0x24001000, 0xfc00df80, "cm5(b),fT", pa10, FLAG_STRICT}, -{ "fldws", 0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, FLAG_STRICT}, -{ "fldws", 0x24001000, 0xfc00d380, "cmcc5(b),fT", pa11, FLAG_STRICT}, -{ "fldws", 0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa11, FLAG_STRICT}, -{ "fldws", 0x24001000, 0xfc00df80, "cm5(b),fT", pa10, 0}, -{ "fldws", 0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, 0}, -{ "fldds", 0x2c001000, 0xfc00dfc0, "cm5(b),ft", pa10, FLAG_STRICT}, -{ "fldds", 0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, FLAG_STRICT}, -{ "fldds", 0x2c001000, 0xfc00d3c0, "cmcc5(b),ft", pa11, FLAG_STRICT}, -{ "fldds", 0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa11, FLAG_STRICT}, -{ "fldds", 0x2c001000, 0xfc00dfc0, "cm5(b),ft", pa10, 0}, -{ "fldds", 0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, 0}, -{ "fstws", 0x24001200, 0xfc00df80, "cmfT,5(b)", pa10, FLAG_STRICT}, -{ "fstws", 0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, FLAG_STRICT}, -{ "fstws", 0x24001200, 0xfc00d380, "cmcCfT,5(b)", pa11, FLAG_STRICT}, -{ "fstws", 0x24001200, 0xfc001380, "cmcCfT,5(s,b)", pa11, FLAG_STRICT}, -{ "fstws", 0x24001200, 0xfc00df80, "cmfT,5(b)", pa10, 0}, -{ "fstws", 0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, 0}, -{ "fstds", 0x2c001200, 0xfc00dfc0, "cmft,5(b)", pa10, FLAG_STRICT}, -{ "fstds", 0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, FLAG_STRICT}, -{ "fstds", 0x2c001200, 0xfc00d3c0, "cmcCft,5(b)", pa11, FLAG_STRICT}, -{ "fstds", 0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa11, FLAG_STRICT}, -{ "fstds", 0x2c001200, 0xfc00dfc0, "cmft,5(b)", pa10, 0}, -{ "fstds", 0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0}, -{ "fstqs", 0x3c001200, 0xfc00dfc0, "cmft,5(b)", pa10, 0}, -{ "fstqs", 0x3c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0}, -{ "fadd", 0x30000600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, -{ "fadd", 0x38000600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, -{ "fsub", 0x30002600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, -{ "fsub", 0x38002600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, -{ "fmpy", 0x30004600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, -{ "fmpy", 0x38004600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, -{ "fdiv", 0x30006600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, -{ "fdiv", 0x38006600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, -{ "fsqrt", 0x30008000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, -{ "fsqrt", 0x38008000, 0xfc1fe720, "FfA,fT", pa10, 0}, -{ "fabs", 0x30006000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, -{ "fabs", 0x38006000, 0xfc1fe720, "FfA,fT", pa10, 0}, -{ "frem", 0x30008600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, -{ "frem", 0x38008600, 0xfc00e720, "FfA,fB,fT", pa10, 0}, -{ "frnd", 0x3000a000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, -{ "frnd", 0x3800a000, 0xfc1fe720, "FfA,fT", pa10, 0}, -{ "fcpy", 0x30004000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, -{ "fcpy", 0x38004000, 0xfc1fe720, "FfA,fT", pa10, 0}, -{ "fcnvff", 0x30000200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, -{ "fcnvff", 0x38000200, 0xfc1f8720, "FGfA,fT", pa10, 0}, -{ "fcnvxf", 0x30008200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, -{ "fcnvxf", 0x38008200, 0xfc1f8720, "FGfA,fT", pa10, 0}, -{ "fcnvfx", 0x30010200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, -{ "fcnvfx", 0x38010200, 0xfc1f8720, "FGfA,fT", pa10, 0}, -{ "fcnvfxt", 0x30018200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, -{ "fcnvfxt", 0x38018200, 0xfc1f8720, "FGfA,fT", pa10, 0}, -{ "fmpyfadd", 0xb8000000, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT}, -{ "fmpynfadd", 0xb8000020, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT}, -{ "fneg", 0x3000c000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT}, -{ "fneg", 0x3800c000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT}, -{ "fnegabs", 0x3000e000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT}, -{ "fnegabs", 0x3800e000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT}, -{ "fcnv", 0x30000200, 0xfc1c0720, "{_fa,fT", pa20, FLAG_STRICT}, -{ "fcnv", 0x38000200, 0xfc1c0720, "FGfA,fT", pa20, FLAG_STRICT}, -{ "fcmp", 0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, FLAG_STRICT}, -{ "fcmp", 0x38000400, 0xfc00e720, "I?ffA,fB", pa10, FLAG_STRICT}, -{ "fcmp", 0x30000400, 0xfc0007e0, "F?ffa,fb,h", pa20, FLAG_STRICT}, -{ "fcmp", 0x38000400, 0xfc000720, "I?ffA,fB,h", pa20, FLAG_STRICT}, -{ "fcmp", 0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, 0}, -{ "fcmp", 0x38000400, 0xfc00e720, "I?ffA,fB", pa10, 0}, -{ "xmpyu", 0x38004700, 0xfc00e720, "fX,fB,fT", pa11, 0}, -{ "fmpyadd", 0x18000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0}, -{ "fmpysub", 0x98000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0}, -{ "ftest", 0x30002420, 0xffffffff, "", pa10, FLAG_STRICT}, -{ "ftest", 0x30002420, 0xffffffe0, ",=", pa20, FLAG_STRICT}, -{ "ftest", 0x30000420, 0xffff1fff, "m", pa20, FLAG_STRICT}, -{ "fid", 0x30000000, 0xffffffff, "", pa11, 0}, - -/* Performance Monitor Instructions. */ - -{ "pmdis", 0x30000280, 0xffffffdf, "N", pa20, FLAG_STRICT}, -{ "pmenb", 0x30000680, 0xffffffff, "", pa20, FLAG_STRICT}, - -/* Assist Instructions. */ - -{ "spop0", 0x10000000, 0xfc000600, "v,ON", pa10, 0}, -{ "spop1", 0x10000200, 0xfc000600, "v,oNt", pa10, 0}, -{ "spop2", 0x10000400, 0xfc000600, "v,1Nb", pa10, 0}, -{ "spop3", 0x10000600, 0xfc000600, "v,0Nx,b", pa10, 0}, -{ "copr", 0x30000000, 0xfc000000, "u,2N", pa10, 0}, -{ "cldw", 0x24000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT}, -{ "cldw", 0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT}, -{ "cldw", 0x24000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT}, -{ "cldw", 0x24000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, -{ "cldw", 0x24001000, 0xfc00d200, "ucocc@(b),t", pa20, FLAG_STRICT}, -{ "cldw", 0x24001000, 0xfc001200, "ucocc@(s,b),t", pa20, FLAG_STRICT}, -{ "cldw", 0x24001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT}, -{ "cldw", 0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT}, -{ "cldw", 0x24001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT}, -{ "cldw", 0x24001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, -{ "cldd", 0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT}, -{ "cldd", 0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT}, -{ "cldd", 0x2c000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT}, -{ "cldd", 0x2c000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, -{ "cldd", 0x2c001000, 0xfc00d200, "ucocc@(b),t", pa20, FLAG_STRICT}, -{ "cldd", 0x2c001000, 0xfc001200, "ucocc@(s,b),t", pa20, FLAG_STRICT}, -{ "cldd", 0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT}, -{ "cldd", 0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT}, -{ "cldd", 0x2c001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT}, -{ "cldd", 0x2c001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, -{ "cstw", 0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT}, -{ "cstw", 0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT}, -{ "cstw", 0x24000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, -{ "cstw", 0x24000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, -{ "cstw", 0x24001200, 0xfc00d200, "ucocCt,@(b)", pa20, FLAG_STRICT}, -{ "cstw", 0x24001200, 0xfc001200, "ucocCt,@(s,b)", pa20, FLAG_STRICT}, -{ "cstw", 0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT}, -{ "cstw", 0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT}, -{ "cstw", 0x24001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, -{ "cstw", 0x24001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, -{ "cstd", 0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT}, -{ "cstd", 0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT}, -{ "cstd", 0x2c000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, -{ "cstd", 0x2c000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, -{ "cstd", 0x2c001200, 0xfc00d200, "ucocCt,@(b)", pa20, FLAG_STRICT}, -{ "cstd", 0x2c001200, 0xfc001200, "ucocCt,@(s,b)", pa20, FLAG_STRICT}, -{ "cstd", 0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT}, -{ "cstd", 0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT}, -{ "cstd", 0x2c001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, -{ "cstd", 0x2c001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, -{ "cldwx", 0x24000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT}, -{ "cldwx", 0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT}, -{ "cldwx", 0x24000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT}, -{ "cldwx", 0x24000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, -{ "cldwx", 0x24000000, 0xfc00de00, "ucXx(b),t", pa10, 0}, -{ "cldwx", 0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0}, -{ "clddx", 0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT}, -{ "clddx", 0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT}, -{ "clddx", 0x2c000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT}, -{ "clddx", 0x2c000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, -{ "clddx", 0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, 0}, -{ "clddx", 0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0}, -{ "cstwx", 0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT}, -{ "cstwx", 0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT}, -{ "cstwx", 0x24000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, -{ "cstwx", 0x24000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, -{ "cstwx", 0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, 0}, -{ "cstwx", 0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0}, -{ "cstdx", 0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT}, -{ "cstdx", 0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT}, -{ "cstdx", 0x2c000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, -{ "cstdx", 0x2c000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, -{ "cstdx", 0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, 0}, -{ "cstdx", 0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0}, -{ "cldws", 0x24001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT}, -{ "cldws", 0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT}, -{ "cldws", 0x24001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT}, -{ "cldws", 0x24001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, -{ "cldws", 0x24001000, 0xfc00de00, "ucM5(b),t", pa10, 0}, -{ "cldws", 0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0}, -{ "cldds", 0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT}, -{ "cldds", 0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT}, -{ "cldds", 0x2c001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT}, -{ "cldds", 0x2c001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, -{ "cldds", 0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, 0}, -{ "cldds", 0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0}, -{ "cstws", 0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT}, -{ "cstws", 0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT}, -{ "cstws", 0x24001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, -{ "cstws", 0x24001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, -{ "cstws", 0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, 0}, -{ "cstws", 0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0}, -{ "cstds", 0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT}, -{ "cstds", 0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT}, -{ "cstds", 0x2c001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, -{ "cstds", 0x2c001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, -{ "cstds", 0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, 0}, -{ "cstds", 0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0}, - -/* More pseudo instructions which must follow the main table. */ -{ "call", 0xe800f000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT}, -{ "call", 0xe800a000, 0xffe0e000, "nW", pa10, FLAG_STRICT}, -{ "ret", 0xe840d000, 0xfffffffd, "n", pa20, FLAG_STRICT}, - -}; - -#define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0])) - -/* SKV 12/18/92. Added some denotations for various operands. */ - -#define PA_IMM11_AT_31 'i' -#define PA_IMM14_AT_31 'j' -#define PA_IMM21_AT_31 'k' -#define PA_DISP12 'w' -#define PA_DISP17 'W' - -#define N_HPPA_OPERAND_FORMATS 5 - -/* Integer register names, indexed by the numbers which appear in the - opcodes. */ -static const char *const reg_names[] = -{ - "flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9", - "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", - "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1", - "sp", "r31" -}; - -/* Floating point register names, indexed by the numbers which appear in the - opcodes. */ -static const char *const fp_reg_names[] = -{ - "fpsr", "fpe2", "fpe4", "fpe6", - "fr4", "fr5", "fr6", "fr7", "fr8", - "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", - "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", - "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31" -}; - -typedef unsigned int CORE_ADDR; - -/* Get at various relevant fields of an instruction word. */ - -#define MASK_5 0x1f -#define MASK_10 0x3ff -#define MASK_11 0x7ff -#define MASK_14 0x3fff -#define MASK_16 0xffff -#define MASK_21 0x1fffff - -/* These macros get bit fields using HP's numbering (MSB = 0). */ - -#define GET_FIELD(X, FROM, TO) \ - ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1)) - -#define GET_BIT(X, WHICH) \ - GET_FIELD (X, WHICH, WHICH) - -/* Some of these have been converted to 2-d arrays because they - consume less storage this way. If the maintenance becomes a - problem, convert them back to const 1-d pointer arrays. */ -static const char *const control_reg[] = -{ - "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", - "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4", - "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr", - "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3", - "tr4", "tr5", "tr6", "tr7" -}; - -static const char *const compare_cond_names[] = -{ - "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv", ",od", - ",tr", ",<>", ",>=", ",>", ",>>=", ",>>", ",nsv", ",ev" -}; -static const char *const compare_cond_64_names[] = -{ - "", ",*=", ",*<", ",*<=", ",*<<", ",*<<=", ",*sv", ",*od", - ",*tr", ",*<>", ",*>=", ",*>", ",*>>=", ",*>>", ",*nsv", ",*ev" -}; -static const char *const cmpib_cond_64_names[] = -{ - ",*<<", ",*=", ",*<", ",*<=", ",*>>=", ",*<>", ",*>=", ",*>" -}; -static const char *const add_cond_names[] = -{ - "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv", ",od", - ",tr", ",<>", ",>=", ",>", ",uv", ",vnz", ",nsv", ",ev" -}; -static const char *const add_cond_64_names[] = -{ - "", ",*=", ",*<", ",*<=", ",*nuv", ",*znv", ",*sv", ",*od", - ",*tr", ",*<>", ",*>=", ",*>", ",*uv", ",*vnz", ",*nsv", ",*ev" -}; -static const char *const wide_add_cond_names[] = -{ - "", ",=", ",<", ",<=", ",nuv", ",*=", ",*<", ",*<=", - ",tr", ",<>", ",>=", ",>", ",uv", ",*<>", ",*>=", ",*>" -}; -static const char *const logical_cond_names[] = -{ - "", ",=", ",<", ",<=", 0, 0, 0, ",od", - ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"}; -static const char *const logical_cond_64_names[] = -{ - "", ",*=", ",*<", ",*<=", 0, 0, 0, ",*od", - ",*tr", ",*<>", ",*>=", ",*>", 0, 0, 0, ",*ev"}; -static const char *const unit_cond_names[] = -{ - "", ",swz", ",sbz", ",shz", ",sdc", ",swc", ",sbc", ",shc", - ",tr", ",nwz", ",nbz", ",nhz", ",ndc", ",nwc", ",nbc", ",nhc" -}; -static const char *const unit_cond_64_names[] = -{ - "", ",*swz", ",*sbz", ",*shz", ",*sdc", ",*swc", ",*sbc", ",*shc", - ",*tr", ",*nwz", ",*nbz", ",*nhz", ",*ndc", ",*nwc", ",*nbc", ",*nhc" -}; -static const char *const shift_cond_names[] = -{ - "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev" -}; -static const char *const shift_cond_64_names[] = -{ - "", ",*=", ",*<", ",*od", ",*tr", ",*<>", ",*>=", ",*ev" -}; -static const char *const bb_cond_64_names[] = -{ - ",*<", ",*>=" -}; -static const char *const index_compl_names[] = {"", ",m", ",s", ",sm"}; -static const char *const short_ldst_compl_names[] = {"", ",ma", "", ",mb"}; -static const char *const short_bytes_compl_names[] = -{ - "", ",b,m", ",e", ",e,m" -}; -static const char *const float_format_names[] = {",sgl", ",dbl", "", ",quad"}; -static const char *const fcnv_fixed_names[] = {",w", ",dw", "", ",qw"}; -static const char *const fcnv_ufixed_names[] = {",uw", ",udw", "", ",uqw"}; -static const char *const float_comp_names[] = -{ - ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>", - ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>", - ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<", - ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true" -}; -static const char *const signed_unsigned_names[] = {",u", ",s"}; -static const char *const mix_half_names[] = {",l", ",r"}; -static const char *const saturation_names[] = {",us", ",ss", 0, ""}; -static const char *const read_write_names[] = {",r", ",w"}; -static const char *const add_compl_names[] = { 0, "", ",l", ",tsv" }; - -/* For a bunch of different instructions form an index into a - completer name table. */ -#define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \ - GET_FIELD (insn, 18, 18) << 1) - -#define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \ - (GET_FIELD ((insn), 19, 19) ? 8 : 0)) - -/* Utility function to print registers. Put these first, so gcc's function - inlining can do its stuff. */ - -#define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR) - -static void -fput_reg (unsigned reg, disassemble_info *info) -{ - (*info->fprintf_func) (info->stream, "%s", reg ? reg_names[reg] : "r0"); -} - -static void -fput_fp_reg (unsigned reg, disassemble_info *info) -{ - (*info->fprintf_func) (info->stream, "%s", reg ? fp_reg_names[reg] : "fr0"); -} - -static void -fput_fp_reg_r (unsigned reg, disassemble_info *info) -{ - /* Special case floating point exception registers. */ - if (reg < 4) - (*info->fprintf_func) (info->stream, "fpe%d", reg * 2 + 1); - else - (*info->fprintf_func) (info->stream, "%sR", - reg ? fp_reg_names[reg] : "fr0"); -} - -static void -fput_creg (unsigned reg, disassemble_info *info) -{ - (*info->fprintf_func) (info->stream, "%s", control_reg[reg]); -} - -/* Print constants with sign. */ - -static void -fput_const (unsigned num, disassemble_info *info) -{ - if ((int) num < 0) - (*info->fprintf_func) (info->stream, "-%x", - (int) num); - else - (*info->fprintf_func) (info->stream, "%x", num); -} - -/* Routines to extract various sized constants out of hppa - instructions. */ - -/* Extract a 3-bit space register number from a be, ble, mtsp or mfsp. */ -static int -extract_3 (unsigned word) -{ - return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17); -} - -static int -extract_5_load (unsigned word) -{ - return low_sign_extend (word >> 16 & MASK_5, 5); -} - -/* Extract the immediate field from a st{bhw}s instruction. */ - -static int -extract_5_store (unsigned word) -{ - return low_sign_extend (word & MASK_5, 5); -} - -/* Extract the immediate field from a break instruction. */ - -static unsigned -extract_5r_store (unsigned word) -{ - return (word & MASK_5); -} - -/* Extract the immediate field from a {sr}sm instruction. */ - -static unsigned -extract_5R_store (unsigned word) -{ - return (word >> 16 & MASK_5); -} - -/* Extract the 10 bit immediate field from a {sr}sm instruction. */ - -static unsigned -extract_10U_store (unsigned word) -{ - return (word >> 16 & MASK_10); -} - -/* Extract the immediate field from a bb instruction. */ - -static unsigned -extract_5Q_store (unsigned word) -{ - return (word >> 21 & MASK_5); -} - -/* Extract an 11 bit immediate field. */ - -static int -extract_11 (unsigned word) -{ - return low_sign_extend (word & MASK_11, 11); -} - -/* Extract a 14 bit immediate field. */ - -static int -extract_14 (unsigned word) -{ - return low_sign_extend (word & MASK_14, 14); -} - -/* Extract a 16 bit immediate field (PA2.0 wide only). */ - -static int -extract_16 (unsigned word) -{ - int m15, m0, m1; - - m0 = GET_BIT (word, 16); - m1 = GET_BIT (word, 17); - m15 = GET_BIT (word, 31); - word = (word >> 1) & 0x1fff; - word = word | (m15 << 15) | ((m15 ^ m0) << 14) | ((m15 ^ m1) << 13); - return sign_extend (word, 16); -} - -/* Extract a 21 bit constant. */ - -static int -extract_21 (unsigned word) -{ - int val; - - word &= MASK_21; - word <<= 11; - val = GET_FIELD (word, 20, 20); - val <<= 11; - val |= GET_FIELD (word, 9, 19); - val <<= 2; - val |= GET_FIELD (word, 5, 6); - val <<= 5; - val |= GET_FIELD (word, 0, 4); - val <<= 2; - val |= GET_FIELD (word, 7, 8); - return sign_extend (val, 21) << 11; -} - -/* Extract a 12 bit constant from branch instructions. */ - -static int -extract_12 (unsigned word) -{ - return sign_extend (GET_FIELD (word, 19, 28) - | GET_FIELD (word, 29, 29) << 10 - | (word & 0x1) << 11, 12) << 2; -} - -/* Extract a 17 bit constant from branch instructions, returning the - 19 bit signed value. */ - -static int -extract_17 (unsigned word) -{ - return sign_extend (GET_FIELD (word, 19, 28) - | GET_FIELD (word, 29, 29) << 10 - | GET_FIELD (word, 11, 15) << 11 - | (word & 0x1) << 16, 17) << 2; -} - -static int -extract_22 (unsigned word) -{ - return sign_extend (GET_FIELD (word, 19, 28) - | GET_FIELD (word, 29, 29) << 10 - | GET_FIELD (word, 11, 15) << 11 - | GET_FIELD (word, 6, 10) << 16 - | (word & 0x1) << 21, 22) << 2; -} - -/* Print one instruction. */ - -int -print_insn_hppa (bfd_vma memaddr, disassemble_info *info) -{ - bfd_byte buffer[4]; - unsigned int insn, i; - - { - int status = - (*info->read_memory_func) (memaddr, buffer, sizeof (buffer), info); - if (status != 0) - { - (*info->memory_error_func) (status, memaddr, info); - return -1; - } - } - - insn = bfd_getb32 (buffer); - - for (i = 0; i < NUMOPCODES; ++i) - { - const struct pa_opcode *opcode = &pa_opcodes[i]; - - if ((insn & opcode->mask) == opcode->match) - { - const char *s; -#ifndef BFD64 - if (opcode->arch == pa20w) - continue; -#endif - (*info->fprintf_func) (info->stream, "%s", opcode->name); - - if (!strchr ("cfCY?-+nHNZFIuv{", opcode->args[0])) - (*info->fprintf_func) (info->stream, " "); - for (s = opcode->args; *s != '\0'; ++s) - { - switch (*s) - { - case 'x': - fput_reg (GET_FIELD (insn, 11, 15), info); - break; - case 'a': - case 'b': - fput_reg (GET_FIELD (insn, 6, 10), info); - break; - case '^': - fput_creg (GET_FIELD (insn, 6, 10), info); - break; - case 't': - fput_reg (GET_FIELD (insn, 27, 31), info); - break; - - /* Handle floating point registers. */ - case 'f': - switch (*++s) - { - case 't': - fput_fp_reg (GET_FIELD (insn, 27, 31), info); - break; - case 'T': - if (GET_FIELD (insn, 25, 25)) - fput_fp_reg_r (GET_FIELD (insn, 27, 31), info); - else - fput_fp_reg (GET_FIELD (insn, 27, 31), info); - break; - case 'a': - if (GET_FIELD (insn, 25, 25)) - fput_fp_reg_r (GET_FIELD (insn, 6, 10), info); - else - fput_fp_reg (GET_FIELD (insn, 6, 10), info); - break; - - /* 'fA' will not generate a space before the regsiter - name. Normally that is fine. Except that it - causes problems with xmpyu which has no FP format - completer. */ - case 'X': - fputs_filtered (" ", info); - /* FALLTHRU */ - - case 'A': - if (GET_FIELD (insn, 24, 24)) - fput_fp_reg_r (GET_FIELD (insn, 6, 10), info); - else - fput_fp_reg (GET_FIELD (insn, 6, 10), info); - break; - case 'b': - if (GET_FIELD (insn, 25, 25)) - fput_fp_reg_r (GET_FIELD (insn, 11, 15), info); - else - fput_fp_reg (GET_FIELD (insn, 11, 15), info); - break; - case 'B': - if (GET_FIELD (insn, 19, 19)) - fput_fp_reg_r (GET_FIELD (insn, 11, 15), info); - else - fput_fp_reg (GET_FIELD (insn, 11, 15), info); - break; - case 'C': - { - int reg = GET_FIELD (insn, 21, 22); - reg |= GET_FIELD (insn, 16, 18) << 2; - if (GET_FIELD (insn, 23, 23) != 0) - fput_fp_reg_r (reg, info); - else - fput_fp_reg (reg, info); - break; - } - case 'i': - { - int reg = GET_FIELD (insn, 6, 10); - - reg |= (GET_FIELD (insn, 26, 26) << 4); - fput_fp_reg (reg, info); - break; - } - case 'j': - { - int reg = GET_FIELD (insn, 11, 15); - - reg |= (GET_FIELD (insn, 26, 26) << 4); - fput_fp_reg (reg, info); - break; - } - case 'k': - { - int reg = GET_FIELD (insn, 27, 31); - - reg |= (GET_FIELD (insn, 26, 26) << 4); - fput_fp_reg (reg, info); - break; - } - case 'l': - { - int reg = GET_FIELD (insn, 21, 25); - - reg |= (GET_FIELD (insn, 26, 26) << 4); - fput_fp_reg (reg, info); - break; - } - case 'm': - { - int reg = GET_FIELD (insn, 16, 20); - - reg |= (GET_FIELD (insn, 26, 26) << 4); - fput_fp_reg (reg, info); - break; - } - - /* 'fe' will not generate a space before the register - name. Normally that is fine. Except that it - causes problems with fstw fe,y(b) which has no FP - format completer. */ - case 'E': - fputs_filtered (" ", info); - /* FALLTHRU */ - - case 'e': - if (GET_FIELD (insn, 30, 30)) - fput_fp_reg_r (GET_FIELD (insn, 11, 15), info); - else - fput_fp_reg (GET_FIELD (insn, 11, 15), info); - break; - case 'x': - fput_fp_reg (GET_FIELD (insn, 11, 15), info); - break; - } - break; - - case '5': - fput_const (extract_5_load (insn), info); - break; - case 's': - { - int space = GET_FIELD (insn, 16, 17); - /* Zero means implicit addressing, not use of sr0. */ - if (space != 0) - (*info->fprintf_func) (info->stream, "sr%d", space); - } - break; - - case 'S': - (*info->fprintf_func) (info->stream, "sr%d", - extract_3 (insn)); - break; - - /* Handle completers. */ - case 'c': - switch (*++s) - { - case 'x': - (*info->fprintf_func) - (info->stream, "%s", - index_compl_names[GET_COMPL (insn)]); - break; - case 'X': - (*info->fprintf_func) - (info->stream, "%s ", - index_compl_names[GET_COMPL (insn)]); - break; - case 'm': - (*info->fprintf_func) - (info->stream, "%s", - short_ldst_compl_names[GET_COMPL (insn)]); - break; - case 'M': - (*info->fprintf_func) - (info->stream, "%s ", - short_ldst_compl_names[GET_COMPL (insn)]); - break; - case 'A': - (*info->fprintf_func) - (info->stream, "%s ", - short_bytes_compl_names[GET_COMPL (insn)]); - break; - case 's': - (*info->fprintf_func) - (info->stream, "%s", - short_bytes_compl_names[GET_COMPL (insn)]); - break; - case 'c': - case 'C': - switch (GET_FIELD (insn, 20, 21)) - { - case 1: - (*info->fprintf_func) (info->stream, ",bc "); - break; - case 2: - (*info->fprintf_func) (info->stream, ",sl "); - break; - default: - (*info->fprintf_func) (info->stream, " "); - } - break; - case 'd': - switch (GET_FIELD (insn, 20, 21)) - { - case 1: - (*info->fprintf_func) (info->stream, ",co "); - break; - default: - (*info->fprintf_func) (info->stream, " "); - } - break; - case 'o': - (*info->fprintf_func) (info->stream, ",o"); - break; - case 'g': - (*info->fprintf_func) (info->stream, ",gate"); - break; - case 'p': - (*info->fprintf_func) (info->stream, ",l,push"); - break; - case 'P': - (*info->fprintf_func) (info->stream, ",pop"); - break; - case 'l': - case 'L': - (*info->fprintf_func) (info->stream, ",l"); - break; - case 'w': - (*info->fprintf_func) - (info->stream, "%s ", - read_write_names[GET_FIELD (insn, 25, 25)]); - break; - case 'W': - (*info->fprintf_func) (info->stream, ",w "); - break; - case 'r': - if (GET_FIELD (insn, 23, 26) == 5) - (*info->fprintf_func) (info->stream, ",r"); - break; - case 'Z': - if (GET_FIELD (insn, 26, 26)) - (*info->fprintf_func) (info->stream, ",m "); - else - (*info->fprintf_func) (info->stream, " "); - break; - case 'i': - if (GET_FIELD (insn, 25, 25)) - (*info->fprintf_func) (info->stream, ",i"); - break; - case 'z': - if (!GET_FIELD (insn, 21, 21)) - (*info->fprintf_func) (info->stream, ",z"); - break; - case 'a': - (*info->fprintf_func) - (info->stream, "%s", - add_compl_names[GET_FIELD (insn, 20, 21)]); - break; - case 'Y': - (*info->fprintf_func) - (info->stream, ",dc%s", - add_compl_names[GET_FIELD (insn, 20, 21)]); - break; - case 'y': - (*info->fprintf_func) - (info->stream, ",c%s", - add_compl_names[GET_FIELD (insn, 20, 21)]); - break; - case 'v': - if (GET_FIELD (insn, 20, 20)) - (*info->fprintf_func) (info->stream, ",tsv"); - break; - case 't': - (*info->fprintf_func) (info->stream, ",tc"); - if (GET_FIELD (insn, 20, 20)) - (*info->fprintf_func) (info->stream, ",tsv"); - break; - case 'B': - (*info->fprintf_func) (info->stream, ",db"); - if (GET_FIELD (insn, 20, 20)) - (*info->fprintf_func) (info->stream, ",tsv"); - break; - case 'b': - (*info->fprintf_func) (info->stream, ",b"); - if (GET_FIELD (insn, 20, 20)) - (*info->fprintf_func) (info->stream, ",tsv"); - break; - case 'T': - if (GET_FIELD (insn, 25, 25)) - (*info->fprintf_func) (info->stream, ",tc"); - break; - case 'S': - /* EXTRD/W has a following condition. */ - if (*(s + 1) == '?') - (*info->fprintf_func) - (info->stream, "%s", - signed_unsigned_names[GET_FIELD (insn, 21, 21)]); - else - (*info->fprintf_func) - (info->stream, "%s ", - signed_unsigned_names[GET_FIELD (insn, 21, 21)]); - break; - case 'h': - (*info->fprintf_func) - (info->stream, "%s", - mix_half_names[GET_FIELD (insn, 17, 17)]); - break; - case 'H': - (*info->fprintf_func) - (info->stream, "%s ", - saturation_names[GET_FIELD (insn, 24, 25)]); - break; - case '*': - (*info->fprintf_func) - (info->stream, ",%d%d%d%d ", - GET_FIELD (insn, 17, 18), GET_FIELD (insn, 20, 21), - GET_FIELD (insn, 22, 23), GET_FIELD (insn, 24, 25)); - break; - - case 'q': - { - int m, a; - - m = GET_FIELD (insn, 28, 28); - a = GET_FIELD (insn, 29, 29); - - if (m && !a) - fputs_filtered (",ma ", info); - else if (m && a) - fputs_filtered (",mb ", info); - else - fputs_filtered (" ", info); - break; - } - - case 'J': - { - int opc = GET_FIELD (insn, 0, 5); - - if (opc == 0x16 || opc == 0x1e) - { - if (GET_FIELD (insn, 29, 29) == 0) - fputs_filtered (",ma ", info); - else - fputs_filtered (",mb ", info); - } - else - fputs_filtered (" ", info); - break; - } - - case 'e': - { - int opc = GET_FIELD (insn, 0, 5); - - if (opc == 0x13 || opc == 0x1b) - { - if (GET_FIELD (insn, 18, 18) == 1) - fputs_filtered (",mb ", info); - else - fputs_filtered (",ma ", info); - } - else if (opc == 0x17 || opc == 0x1f) - { - if (GET_FIELD (insn, 31, 31) == 1) - fputs_filtered (",ma ", info); - else - fputs_filtered (",mb ", info); - } - else - fputs_filtered (" ", info); - - break; - } - } - break; - - /* Handle conditions. */ - case '?': - { - s++; - switch (*s) - { - case 'f': - (*info->fprintf_func) - (info->stream, "%s ", - float_comp_names[GET_FIELD (insn, 27, 31)]); - break; - - /* These four conditions are for the set of instructions - which distinguish true/false conditions by opcode - rather than by the 'f' bit (sigh): comb, comib, - addb, addib. */ - case 't': - fputs_filtered - (compare_cond_names[GET_FIELD (insn, 16, 18)], info); - break; - case 'n': - fputs_filtered - (compare_cond_names[GET_FIELD (insn, 16, 18) - + GET_FIELD (insn, 4, 4) * 8], - info); - break; - case 'N': - fputs_filtered - (compare_cond_64_names[GET_FIELD (insn, 16, 18) - + GET_FIELD (insn, 2, 2) * 8], - info); - break; - case 'Q': - fputs_filtered - (cmpib_cond_64_names[GET_FIELD (insn, 16, 18)], - info); - break; - case '@': - fputs_filtered - (add_cond_names[GET_FIELD (insn, 16, 18) - + GET_FIELD (insn, 4, 4) * 8], - info); - break; - case 's': - (*info->fprintf_func) - (info->stream, "%s ", - compare_cond_names[GET_COND (insn)]); - break; - case 'S': - (*info->fprintf_func) - (info->stream, "%s ", - compare_cond_64_names[GET_COND (insn)]); - break; - case 'a': - (*info->fprintf_func) - (info->stream, "%s ", - add_cond_names[GET_COND (insn)]); - break; - case 'A': - (*info->fprintf_func) - (info->stream, "%s ", - add_cond_64_names[GET_COND (insn)]); - break; - case 'd': - (*info->fprintf_func) - (info->stream, "%s", - add_cond_names[GET_FIELD (insn, 16, 18)]); - break; - - case 'W': - (*info->fprintf_func) - (info->stream, "%s", - wide_add_cond_names[GET_FIELD (insn, 16, 18) + - GET_FIELD (insn, 4, 4) * 8]); - break; - - case 'l': - (*info->fprintf_func) - (info->stream, "%s ", - logical_cond_names[GET_COND (insn)]); - break; - case 'L': - (*info->fprintf_func) - (info->stream, "%s ", - logical_cond_64_names[GET_COND (insn)]); - break; - case 'u': - (*info->fprintf_func) - (info->stream, "%s ", - unit_cond_names[GET_COND (insn)]); - break; - case 'U': - (*info->fprintf_func) - (info->stream, "%s ", - unit_cond_64_names[GET_COND (insn)]); - break; - case 'y': - case 'x': - case 'b': - (*info->fprintf_func) - (info->stream, "%s", - shift_cond_names[GET_FIELD (insn, 16, 18)]); - - /* If the next character in args is 'n', it will handle - putting out the space. */ - if (s[1] != 'n') - (*info->fprintf_func) (info->stream, " "); - break; - case 'X': - (*info->fprintf_func) - (info->stream, "%s ", - shift_cond_64_names[GET_FIELD (insn, 16, 18)]); - break; - case 'B': - (*info->fprintf_func) - (info->stream, "%s", - bb_cond_64_names[GET_FIELD (insn, 16, 16)]); - - /* If the next character in args is 'n', it will handle - putting out the space. */ - if (s[1] != 'n') - (*info->fprintf_func) (info->stream, " "); - break; - } - break; - } - - case 'V': - fput_const (extract_5_store (insn), info); - break; - case 'r': - fput_const (extract_5r_store (insn), info); - break; - case 'R': - fput_const (extract_5R_store (insn), info); - break; - case 'U': - fput_const (extract_10U_store (insn), info); - break; - case 'B': - case 'Q': - fput_const (extract_5Q_store (insn), info); - break; - case 'i': - fput_const (extract_11 (insn), info); - break; - case 'j': - fput_const (extract_14 (insn), info); - break; - case 'k': - fputs_filtered ("L%", info); - fput_const (extract_21 (insn), info); - break; - case '<': - case 'l': - /* 16-bit long disp., PA2.0 wide only. */ - fput_const (extract_16 (insn), info); - break; - case 'n': - if (insn & 0x2) - (*info->fprintf_func) (info->stream, ",n "); - else - (*info->fprintf_func) (info->stream, " "); - break; - case 'N': - if ((insn & 0x20) && s[1]) - (*info->fprintf_func) (info->stream, ",n "); - else if (insn & 0x20) - (*info->fprintf_func) (info->stream, ",n"); - else if (s[1]) - (*info->fprintf_func) (info->stream, " "); - break; - case 'w': - (*info->print_address_func) - (memaddr + 8 + extract_12 (insn), info); - break; - case 'W': - /* 17 bit PC-relative branch. */ - (*info->print_address_func) - ((memaddr + 8 + extract_17 (insn)), info); - break; - case 'z': - /* 17 bit displacement. This is an offset from a register - so it gets disasssembled as just a number, not any sort - of address. */ - fput_const (extract_17 (insn), info); - break; - - case 'Z': - /* addil %r1 implicit output. */ - fputs_filtered ("r1", info); - break; - - case 'Y': - /* be,l %sr0,%r31 implicit output. */ - fputs_filtered ("sr0,r31", info); - break; - - case '@': - (*info->fprintf_func) (info->stream, "0"); - break; - - case '.': - (*info->fprintf_func) (info->stream, "%d", - GET_FIELD (insn, 24, 25)); - break; - case '*': - (*info->fprintf_func) (info->stream, "%d", - GET_FIELD (insn, 22, 25)); - break; - case '!': - fputs_filtered ("sar", info); - break; - case 'p': - (*info->fprintf_func) (info->stream, "%d", - 31 - GET_FIELD (insn, 22, 26)); - break; - case '~': - { - int num; - num = GET_FIELD (insn, 20, 20) << 5; - num |= GET_FIELD (insn, 22, 26); - (*info->fprintf_func) (info->stream, "%d", 63 - num); - break; - } - case 'P': - (*info->fprintf_func) (info->stream, "%d", - GET_FIELD (insn, 22, 26)); - break; - case 'q': - { - int num; - num = GET_FIELD (insn, 20, 20) << 5; - num |= GET_FIELD (insn, 22, 26); - (*info->fprintf_func) (info->stream, "%d", num); - break; - } - case 'T': - (*info->fprintf_func) (info->stream, "%d", - 32 - GET_FIELD (insn, 27, 31)); - break; - case '%': - { - int num; - num = (GET_FIELD (insn, 23, 23) + 1) * 32; - num -= GET_FIELD (insn, 27, 31); - (*info->fprintf_func) (info->stream, "%d", num); - break; - } - case '|': - { - int num; - num = (GET_FIELD (insn, 19, 19) + 1) * 32; - num -= GET_FIELD (insn, 27, 31); - (*info->fprintf_func) (info->stream, "%d", num); - break; - } - case '$': - fput_const (GET_FIELD (insn, 20, 28), info); - break; - case 'A': - fput_const (GET_FIELD (insn, 6, 18), info); - break; - case 'D': - fput_const (GET_FIELD (insn, 6, 31), info); - break; - case 'v': - (*info->fprintf_func) (info->stream, ",%d", - GET_FIELD (insn, 23, 25)); - break; - case 'O': - fput_const ((GET_FIELD (insn, 6,20) << 5 | - GET_FIELD (insn, 27, 31)), info); - break; - case 'o': - fput_const (GET_FIELD (insn, 6, 20), info); - break; - case '2': - fput_const ((GET_FIELD (insn, 6, 22) << 5 | - GET_FIELD (insn, 27, 31)), info); - break; - case '1': - fput_const ((GET_FIELD (insn, 11, 20) << 5 | - GET_FIELD (insn, 27, 31)), info); - break; - case '0': - fput_const ((GET_FIELD (insn, 16, 20) << 5 | - GET_FIELD (insn, 27, 31)), info); - break; - case 'u': - (*info->fprintf_func) (info->stream, ",%d", - GET_FIELD (insn, 23, 25)); - break; - case 'F': - /* If no destination completer and not before a completer - for fcmp, need a space here. */ - if (s[1] == 'G' || s[1] == '?') - fputs_filtered - (float_format_names[GET_FIELD (insn, 19, 20)], info); - else - (*info->fprintf_func) - (info->stream, "%s ", - float_format_names[GET_FIELD (insn, 19, 20)]); - break; - case 'G': - (*info->fprintf_func) - (info->stream, "%s ", - float_format_names[GET_FIELD (insn, 17, 18)]); - break; - case 'H': - if (GET_FIELD (insn, 26, 26) == 1) - (*info->fprintf_func) (info->stream, "%s ", - float_format_names[0]); - else - (*info->fprintf_func) (info->stream, "%s ", - float_format_names[1]); - break; - case 'I': - /* If no destination completer and not before a completer - for fcmp, need a space here. */ - if (s[1] == '?') - fputs_filtered - (float_format_names[GET_FIELD (insn, 20, 20)], info); - else - (*info->fprintf_func) - (info->stream, "%s ", - float_format_names[GET_FIELD (insn, 20, 20)]); - break; - - case 'J': - fput_const (extract_14 (insn), info); - break; - - case '#': - { - int sign = GET_FIELD (insn, 31, 31); - int imm10 = GET_FIELD (insn, 18, 27); - int disp; - - if (sign) - disp = (-1 << 10) | imm10; - else - disp = imm10; - - disp <<= 3; - fput_const (disp, info); - break; - } - case 'K': - case 'd': - { - int sign = GET_FIELD (insn, 31, 31); - int imm11 = GET_FIELD (insn, 18, 28); - int disp; - - if (sign) - disp = (-1 << 11) | imm11; - else - disp = imm11; - - disp <<= 2; - fput_const (disp, info); - break; - } - - case '>': - case 'y': - { - /* 16-bit long disp., PA2.0 wide only. */ - int disp = extract_16 (insn); - disp &= ~3; - fput_const (disp, info); - break; - } - - case '&': - { - /* 16-bit long disp., PA2.0 wide only. */ - int disp = extract_16 (insn); - disp &= ~7; - fput_const (disp, info); - break; - } - - case '_': - break; /* Dealt with by '{' */ - - case '{': - { - int sub = GET_FIELD (insn, 14, 16); - int df = GET_FIELD (insn, 17, 18); - int sf = GET_FIELD (insn, 19, 20); - const char * const * source = float_format_names; - const char * const * dest = float_format_names; - const char *t = ""; - - if (sub == 4) - { - fputs_filtered (",UND ", info); - break; - } - if ((sub & 3) == 3) - t = ",t"; - if ((sub & 3) == 1) - source = sub & 4 ? fcnv_ufixed_names : fcnv_fixed_names; - if (sub & 2) - dest = sub & 4 ? fcnv_ufixed_names : fcnv_fixed_names; - - (*info->fprintf_func) (info->stream, "%s%s%s ", - t, source[sf], dest[df]); - break; - } - - case 'm': - { - int y = GET_FIELD (insn, 16, 18); - - if (y != 1) - fput_const ((y ^ 1) - 1, info); - } - break; - - case 'h': - { - int cbit; - - cbit = GET_FIELD (insn, 16, 18); - - if (cbit > 0) - (*info->fprintf_func) (info->stream, ",%d", cbit - 1); - break; - } - - case '=': - { - int cond = GET_FIELD (insn, 27, 31); - - switch (cond) - { - case 0: fputs_filtered (" ", info); break; - case 1: fputs_filtered ("acc ", info); break; - case 2: fputs_filtered ("rej ", info); break; - case 5: fputs_filtered ("acc8 ", info); break; - case 6: fputs_filtered ("rej8 ", info); break; - case 9: fputs_filtered ("acc6 ", info); break; - case 13: fputs_filtered ("acc4 ", info); break; - case 17: fputs_filtered ("acc2 ", info); break; - default: break; - } - break; - } - - case 'X': - (*info->print_address_func) - (memaddr + 8 + extract_22 (insn), info); - break; - case 'L': - fputs_filtered (",rp", info); - break; - default: - (*info->fprintf_func) (info->stream, "%c", *s); - break; - } - } - return sizeof (insn); - } - } - (*info->fprintf_func) (info->stream, "#%8x", insn); - return sizeof (insn); -} diff --git a/disas/sh4.c b/disas/sh4.c index 8b0415dfe9..6b66176bed 100644 --- a/disas/sh4.c +++ b/disas/sh4.c @@ -264,12 +264,6 @@ sh_dsp_reg_nums; be some confusion between DSP and FPU etc. */ #define SH_ARCH_UNKNOWN_ARCH 0xffffffff -/* These are defined in bfd/cpu-sh.c . */ -unsigned int sh_get_arch_from_bfd_mach (unsigned long mach); -unsigned int sh_get_arch_up_from_bfd_mach (unsigned long mach); -unsigned long sh_get_bfd_mach_from_arch_set (unsigned int arch_set); -/* bfd_boolean sh_merge_bfd_arch (bfd *ibfd, bfd *obfd); */ - /* Below are the 'architecture sets'. They describe the following inheritance graph: diff --git a/hw/audio/pcspk.c b/hw/audio/pcspk.c index 42a6f4885a..984534b2d1 100644 --- a/hw/audio/pcspk.c +++ b/hw/audio/pcspk.c @@ -52,8 +52,8 @@ typedef struct { unsigned int pit_count; unsigned int samples; unsigned int play_pos; - int data_on; - int dummy_refresh_clock; + uint8_t data_on; + uint8_t dummy_refresh_clock; } PCSpkState; static const char *s_spk = "pcspk"; @@ -187,6 +187,18 @@ static void pcspk_realizefn(DeviceState *dev, Error **errp) pcspk_state = s; } +static const VMStateDescription vmstate_spk = { + .name = "pcspk", + .version_id = 1, + .minimum_version_id = 1, + .minimum_version_id_old = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT8(data_on, PCSpkState), + VMSTATE_UINT8(dummy_refresh_clock, PCSpkState), + VMSTATE_END_OF_LIST() + } +}; + static Property pcspk_properties[] = { DEFINE_PROP_UINT32("iobase", PCSpkState, iobase, -1), DEFINE_PROP_END_OF_LIST(), @@ -198,6 +210,7 @@ static void pcspk_class_initfn(ObjectClass *klass, void *data) dc->realize = pcspk_realizefn; set_bit(DEVICE_CATEGORY_SOUND, dc->categories); + dc->vmsd = &vmstate_spk; dc->props = pcspk_properties; /* Reason: realize sets global pcspk_state */ dc->cannot_instantiate_with_device_add_yet = true; diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c index 3bf1ddd976..a1cd9b5a29 100644 --- a/hw/i386/kvmvapic.c +++ b/hw/i386/kvmvapic.c @@ -768,6 +768,7 @@ static void kvmvapic_vm_state_change(void *opaque, int running, } qemu_del_vm_change_state_handler(s->vmsentry); + s->vmsentry = NULL; } static int vapic_post_load(void *opaque, int version_id) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index e31f70f428..2d6d7920ff 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -161,13 +161,15 @@ int cpu_get_pic_interrupt(CPUX86State *env) X86CPU *cpu = x86_env_get_cpu(env); int intno; - intno = apic_get_interrupt(cpu->apic_state); - if (intno >= 0) { - return intno; - } - /* read the irq from the PIC */ - if (!apic_accept_pic_intr(cpu->apic_state)) { - return -1; + if (!kvm_irqchip_in_kernel()) { + intno = apic_get_interrupt(cpu->apic_state); + if (intno >= 0) { + return intno; + } + /* read the irq from the PIC */ + if (!apic_accept_pic_intr(cpu->apic_state)) { + return -1; + } } intno = pic_read_irq(isa_pic); @@ -180,7 +182,7 @@ static void pic_irq_request(void *opaque, int irq, int level) X86CPU *cpu = X86_CPU(cs); DPRINTF("pic_irqs: %s irq %d\n", level? "raise" : "lower", irq); - if (cpu->apic_state) { + if (cpu->apic_state && !kvm_irqchip_in_kernel()) { CPU_FOREACH(cs) { cpu = X86_CPU(cs); if (apic_accept_pic_intr(cpu->apic_state)) { diff --git a/hw/intc/apic.c b/hw/intc/apic.c index 45887d99c0..7bd1d279c4 100644 --- a/hw/intc/apic.c +++ b/hw/intc/apic.c @@ -39,6 +39,10 @@ static APICCommonState *local_apics[MAX_APICS + 1]; +#define TYPE_APIC "apic" +#define APIC(obj) \ + OBJECT_CHECK(APICCommonState, (obj), TYPE_APIC) + static void apic_set_irq(APICCommonState *s, int vector_num, int trigger_mode); static void apic_update_irq(APICCommonState *s); static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask, @@ -163,7 +167,7 @@ static void apic_local_deliver(APICCommonState *s, int vector) void apic_deliver_pic_intr(DeviceState *dev, int level) { - APICCommonState *s = APIC_COMMON(dev); + APICCommonState *s = APIC(dev); if (level) { apic_local_deliver(s, APIC_LVT_LINT0); @@ -373,7 +377,7 @@ static void apic_update_irq(APICCommonState *s) void apic_poll_irq(DeviceState *dev) { - APICCommonState *s = APIC_COMMON(dev); + APICCommonState *s = APIC(dev); apic_sync_vapic(s, SYNC_FROM_VAPIC); apic_update_irq(s); @@ -479,7 +483,7 @@ static void apic_startup(APICCommonState *s, int vector_num) void apic_sipi(DeviceState *dev) { - APICCommonState *s = APIC_COMMON(dev); + APICCommonState *s = APIC(dev); cpu_reset_interrupt(CPU(s->cpu), CPU_INTERRUPT_SIPI); @@ -493,7 +497,7 @@ static void apic_deliver(DeviceState *dev, uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) { - APICCommonState *s = APIC_COMMON(dev); + APICCommonState *s = APIC(dev); uint32_t deliver_bitmask[MAX_APIC_WORDS]; int dest_shorthand = (s->icr[0] >> 18) & 3; APICCommonState *apic_iter; @@ -550,7 +554,7 @@ static bool apic_check_pic(APICCommonState *s) int apic_get_interrupt(DeviceState *dev) { - APICCommonState *s = APIC_COMMON(dev); + APICCommonState *s = APIC(dev); int intno; /* if the APIC is installed or enabled, we let the 8259 handle the @@ -584,7 +588,7 @@ int apic_get_interrupt(DeviceState *dev) int apic_accept_pic_intr(DeviceState *dev) { - APICCommonState *s = APIC_COMMON(dev); + APICCommonState *s = APIC(dev); uint32_t lvt0; if (!s) @@ -663,7 +667,7 @@ static uint32_t apic_mem_readl(void *opaque, hwaddr addr) if (!dev) { return 0; } - s = APIC_COMMON(dev); + s = APIC(dev); index = (addr >> 4) & 0xff; switch(index) { @@ -766,7 +770,7 @@ static void apic_mem_writel(void *opaque, hwaddr addr, uint32_t val) if (!dev) { return; } - s = APIC_COMMON(dev); + s = APIC(dev); trace_apic_mem_writel(addr, val); @@ -870,7 +874,7 @@ static const MemoryRegionOps apic_io_ops = { static void apic_realize(DeviceState *dev, Error **errp) { - APICCommonState *s = APIC_COMMON(dev); + APICCommonState *s = APIC(dev); if (s->id >= MAX_APICS) { error_setg(errp, "%s initialization failed. APIC ID %d is invalid", @@ -889,7 +893,7 @@ static void apic_realize(DeviceState *dev, Error **errp) static void apic_unrealize(DeviceState *dev, Error **errp) { - APICCommonState *s = APIC_COMMON(dev); + APICCommonState *s = APIC(dev); timer_del(s->timer); timer_free(s->timer); @@ -912,7 +916,7 @@ static void apic_class_init(ObjectClass *klass, void *data) } static const TypeInfo apic_info = { - .name = "apic", + .name = TYPE_APIC, .instance_size = sizeof(APICCommonState), .parent = TYPE_APIC_COMMON, .class_init = apic_class_init, diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c index 40a2ebca20..f803dfd5b3 100644 --- a/hw/misc/ivshmem.c +++ b/hw/misc/ivshmem.c @@ -628,7 +628,6 @@ static void ivshmem_read(void *opaque, const uint8_t *buf, int size) s->msg_buffered_bytes = 0; fd = qemu_chr_fe_get_msgfd(s->server_chr); - IVSHMEM_DPRINTF("posn is %" PRId64 ", fd is %d\n", msg, fd); process_msg(s, msg, fd, &err); if (err) { diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 6a68e594d5..1776b1b3c4 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -180,7 +180,7 @@ static void fw_cfg_bootsplash(FWCfgState *s) temp = qemu_opt_get(opts, "splash-time"); if (temp != NULL) { p = (char *)temp; - boot_splash_time = strtol(p, (char **)&p, 10); + boot_splash_time = strtol(p, &p, 10); } } @@ -240,7 +240,7 @@ static void fw_cfg_reboot(FWCfgState *s) temp = qemu_opt_get(opts, "reboot-timeout"); if (temp != NULL) { p = (char *)temp; - reboot_timeout = strtol(p, (char **)&p, 10); + reboot_timeout = strtol(p, &p, 10); } } /* validate the input */ diff --git a/hw/ppc/ppc405.h b/hw/ppc/ppc405.h index c67febca2f..a9ffc87f19 100644 --- a/hw/ppc/ppc405.h +++ b/hw/ppc/ppc405.h @@ -71,11 +71,5 @@ CPUPPCState *ppc405ep_init(MemoryRegion *address_space_mem, hwaddr ram_sizes[2], uint32_t sysclk, qemu_irq **picp, int do_init); -/* IBM STBxxx microcontrollers */ -CPUPPCState *ppc_stb025_init (MemoryRegion ram_memories[2], - hwaddr ram_bases[2], - hwaddr ram_sizes[2], - uint32_t sysclk, qemu_irq **picp, - ram_addr_t *offsetp); #endif /* PPC405_H */ diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c index 48e38b2bbe..e741da1141 100644 --- a/hw/s390x/sclp.c +++ b/hw/s390x/sclp.c @@ -426,7 +426,7 @@ int sclp_service_call(CPUS390XState *env, uint64_t sccb, uint32_t code) goto out; } - sclp_c->execute(sclp, (SCCB *)&work_sccb, code); + sclp_c->execute(sclp, &work_sccb, code); cpu_physical_memory_write(sccb, &work_sccb, be16_to_cpu(work_sccb.h.length)); diff --git a/hw/s390x/virtio-ccw.h b/hw/s390x/virtio-ccw.h index 904e357581..b58ab21d4c 100644 --- a/hw/s390x/virtio-ccw.h +++ b/hw/s390x/virtio-ccw.h @@ -183,7 +183,6 @@ typedef struct VirtIORNGCcw { VirtIORNG vdev; } VirtIORNGCcw; -void virtio_ccw_device_update_status(SubchDev *sch); VirtIODevice *virtio_ccw_get_vdev(SubchDev *sch); #ifdef CONFIG_VIRTFS diff --git a/hw/scsi/mptsas.c b/hw/scsi/mptsas.c index 0e0a22f696..ad87e78fe2 100644 --- a/hw/scsi/mptsas.c +++ b/hw/scsi/mptsas.c @@ -304,7 +304,7 @@ static int mptsas_process_scsi_io_request(MPTSASState *s, goto bad; } - req = g_new(MPTSASRequest, 1); + req = g_new0(MPTSASRequest, 1); QTAILQ_INSERT_TAIL(&s->pending, req, next); req->scsi_io = *scsi_io; req->dev = s; @@ -1269,7 +1269,7 @@ static const struct SCSIBusInfo mptsas_scsi_info = { .load_request = mptsas_load_request, }; -static void mptsas_scsi_init(PCIDevice *dev, Error **errp) +static void mptsas_scsi_realize(PCIDevice *dev, Error **errp) { DeviceState *d = DEVICE(dev); MPTSASState *s = MPT_SAS(dev); @@ -1426,7 +1426,7 @@ static void mptsas1068_class_init(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); PCIDeviceClass *pc = PCI_DEVICE_CLASS(oc); - pc->realize = mptsas_scsi_init; + pc->realize = mptsas_scsi_realize; pc->exit = mptsas_scsi_uninit; pc->romfile = 0; pc->vendor_id = PCI_VENDOR_ID_LSI_LOGIC; diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c index 77cba31e30..88beaf4bb8 100644 --- a/hw/scsi/scsi-disk.c +++ b/hw/scsi/scsi-disk.c @@ -396,7 +396,7 @@ static void scsi_read_data(SCSIRequest *req) return; } - if (s->tray_open) { + if (!blk_is_available(req->dev->conf.blk)) { scsi_read_complete(r, -ENOMEDIUM); return; } @@ -519,7 +519,7 @@ static void scsi_write_data(SCSIRequest *req) scsi_write_complete_noio(r, 0); return; } - if (s->tray_open) { + if (!blk_is_available(req->dev->conf.blk)) { scsi_write_complete_noio(r, -ENOMEDIUM); return; } @@ -792,10 +792,7 @@ static inline bool media_is_dvd(SCSIDiskState *s) if (s->qdev.type != TYPE_ROM) { return false; } - if (!blk_is_inserted(s->qdev.conf.blk)) { - return false; - } - if (s->tray_open) { + if (!blk_is_available(s->qdev.conf.blk)) { return false; } blk_get_geometry(s->qdev.conf.blk, &nb_sectors); @@ -808,10 +805,7 @@ static inline bool media_is_cd(SCSIDiskState *s) if (s->qdev.type != TYPE_ROM) { return false; } - if (!blk_is_inserted(s->qdev.conf.blk)) { - return false; - } - if (s->tray_open) { + if (!blk_is_available(s->qdev.conf.blk)) { return false; } blk_get_geometry(s->qdev.conf.blk, &nb_sectors); @@ -875,7 +869,7 @@ static int scsi_read_dvd_structure(SCSIDiskState *s, SCSIDiskReq *r, } if (format != 0xff) { - if (s->tray_open || !blk_is_inserted(s->qdev.conf.blk)) { + if (!blk_is_available(s->qdev.conf.blk)) { scsi_check_condition(r, SENSE_CODE(NO_MEDIUM)); return -1; } @@ -1857,7 +1851,7 @@ static int32_t scsi_disk_emulate_command(SCSIRequest *req, uint8_t *buf) break; default: - if (s->tray_open || !blk_is_inserted(s->qdev.conf.blk)) { + if (!blk_is_available(s->qdev.conf.blk)) { scsi_check_condition(r, SENSE_CODE(NO_MEDIUM)); return 0; } @@ -1886,7 +1880,7 @@ static int32_t scsi_disk_emulate_command(SCSIRequest *req, uint8_t *buf) memset(outbuf, 0, r->buflen); switch (req->cmd.buf[0]) { case TEST_UNIT_READY: - assert(!s->tray_open && blk_is_inserted(s->qdev.conf.blk)); + assert(blk_is_available(s->qdev.conf.blk)); break; case INQUIRY: buflen = scsi_disk_emulate_inquiry(req, outbuf); @@ -2126,7 +2120,7 @@ static int32_t scsi_disk_dma_command(SCSIRequest *req, uint8_t *buf) command = buf[0]; - if (s->tray_open || !blk_is_inserted(s->qdev.conf.blk)) { + if (!blk_is_available(s->qdev.conf.blk)) { scsi_check_condition(r, SENSE_CODE(NO_MEDIUM)); return 0; } diff --git a/hw/scsi/virtio-scsi.c b/hw/scsi/virtio-scsi.c index ce57ef6248..e596b64741 100644 --- a/hw/scsi/virtio-scsi.c +++ b/hw/scsi/virtio-scsi.c @@ -236,6 +236,13 @@ static void virtio_scsi_cancel_notify(Notifier *notifier, void *data) g_free(n); } +static inline void virtio_scsi_ctx_check(VirtIOSCSI *s, SCSIDevice *d) +{ + if (s->dataplane_started && d && blk_is_available(d->conf.blk)) { + assert(blk_get_aio_context(d->conf.blk) == s->ctx); + } +} + /* Return 0 if the request is ready to be completed and return to guest; * -EINPROGRESS if the request is submitted and will be completed later, in the * case of async cancellation. */ @@ -247,9 +254,7 @@ static int virtio_scsi_do_tmf(VirtIOSCSI *s, VirtIOSCSIReq *req) int target; int ret = 0; - if (s->dataplane_started && d) { - assert(blk_get_aio_context(d->conf.blk) == s->ctx); - } + virtio_scsi_ctx_check(s, d); /* Here VIRTIO_SCSI_S_OK means "FUNCTION COMPLETE". */ req->resp.tmf.response = VIRTIO_SCSI_S_OK; @@ -539,9 +544,7 @@ static bool virtio_scsi_handle_cmd_req_prepare(VirtIOSCSI *s, VirtIOSCSIReq *req virtio_scsi_complete_cmd_req(req); return false; } - if (s->dataplane_started) { - assert(blk_get_aio_context(d->conf.blk) == s->ctx); - } + virtio_scsi_ctx_check(s, d); req->sreq = scsi_req_new(d, req->req.cmd.tag, virtio_scsi_get_lun(req->req.cmd.lun), req->req.cmd.cdb, req); diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index babac5a68a..a5ce7dea8e 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -247,8 +247,11 @@ static hwaddr pvscsi_ring_pop_req_descr(PVSCSIRingInfo *mgr) { uint32_t ready_ptr = RS_GET_FIELD(mgr, reqProdIdx); + uint32_t ring_size = PVSCSI_MAX_NUM_PAGES_REQ_RING + * PVSCSI_MAX_NUM_REQ_ENTRIES_PER_PAGE; - if (ready_ptr != mgr->consumed_ptr) { + if (ready_ptr != mgr->consumed_ptr + && ready_ptr - mgr->consumed_ptr < ring_size) { uint32_t next_ready_ptr = mgr->consumed_ptr++ & mgr->txr_len_mask; uint32_t next_ready_page = diff --git a/hw/sh4/shix.c b/hw/sh4/shix.c index ccc9e75894..14d4007c1c 100644 --- a/hw/sh4/shix.c +++ b/hw/sh4/shix.c @@ -23,7 +23,7 @@ */ /* Shix 2.0 board by Alexis Polti, described at - http://perso.enst.fr/~polti/realisations/shix20/ + https://web.archive.org/web/20070917001736/perso.enst.fr/~polti/realisations/shix20 More information in target-sh4/README.sh4 */ diff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c index 8d3520f5be..19dd587207 100644 --- a/hw/tricore/tricore_testboard.c +++ b/hw/tricore/tricore_testboard.c @@ -46,7 +46,7 @@ static void tricore_load_kernel(CPUTriCoreState *env) long kernel_size; kernel_size = load_elf(tricoretb_binfo.kernel_filename, NULL, - NULL, (uint64_t *)&entry, NULL, + NULL, &entry, NULL, NULL, 0, EM_TRICORE, 1, 0); if (kernel_size <= 0) { diff --git a/include/block/block.h b/include/block/block.h index 7edce5c35f..ffecebfb3a 100644 --- a/include/block/block.h +++ b/include/block/block.h @@ -185,11 +185,6 @@ typedef enum BlockOpType { BLOCK_OP_TYPE_MAX, } BlockOpType; -void bdrv_info_print(Monitor *mon, const QObject *data); -void bdrv_info(Monitor *mon, QObject **ret_data); -void bdrv_stats_print(Monitor *mon, const QObject *data); -void bdrv_info_stats(Monitor *mon, QObject **ret_data); - /* disk I/O throttling */ void bdrv_init(void); void bdrv_init_with_whitelist(void); @@ -393,7 +388,6 @@ bool bdrv_is_encrypted(BlockDriverState *bs); bool bdrv_key_required(BlockDriverState *bs); int bdrv_set_key(BlockDriverState *bs, const char *key); void bdrv_add_key(BlockDriverState *bs, const char *key, Error **errp); -int bdrv_query_missing_keys(void); void bdrv_iterate_format(void (*it)(void *opaque, const char *name), void *opaque); const char *bdrv_get_node_name(const BlockDriverState *bs); diff --git a/include/block/block_int.h b/include/block/block_int.h index 713cea6071..ef3c047cb3 100644 --- a/include/block/block_int.h +++ b/include/block/block_int.h @@ -562,15 +562,6 @@ extern BlockDriver bdrv_file; extern BlockDriver bdrv_raw; extern BlockDriver bdrv_qcow2; -/** - * bdrv_setup_io_funcs: - * - * Prepare a #BlockDriver for I/O request processing by populating - * unimplemented coroutine and AIO interfaces with generic wrapper functions - * that fall back to implemented interfaces. - */ -void bdrv_setup_io_funcs(BlockDriver *bdrv); - int coroutine_fn bdrv_co_preadv(BdrvChild *child, int64_t offset, unsigned int bytes, QEMUIOVector *qiov, BdrvRequestFlags flags); diff --git a/include/hw/arm/pxa.h b/include/hw/arm/pxa.h index dd1a48b0c1..191e068184 100644 --- a/include/hw/arm/pxa.h +++ b/include/hw/arm/pxa.h @@ -83,7 +83,6 @@ typedef struct PXA2xxLCDState PXA2xxLCDState; PXA2xxLCDState *pxa2xx_lcdc_init(MemoryRegion *sysmem, hwaddr base, qemu_irq irq); void pxa2xx_lcd_vsync_notifier(PXA2xxLCDState *s, qemu_irq handler); -void pxa2xx_lcdc_oritentation(void *opaque, int angle); /* pxa2xx_mmci.c */ typedef struct PXA2xxMMCIState PXA2xxMMCIState; diff --git a/include/hw/bt.h b/include/hw/bt.h index 185e79df2b..963f330138 100644 --- a/include/hw/bt.h +++ b/include/hw/bt.h @@ -174,8 +174,6 @@ enum bt_l2cap_psm_predef { void bt_l2cap_sdp_init(struct bt_l2cap_device_s *dev); /* bt-hid.c */ -struct bt_device_s *bt_mouse_init(struct bt_scatternet_s *net); -struct bt_device_s *bt_tablet_init(struct bt_scatternet_s *net); struct bt_device_s *bt_keyboard_init(struct bt_scatternet_s *net); /* Link Management Protocol layer defines */ diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index ebba151097..ab8e319505 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -216,7 +216,6 @@ void vmmouse_set_data(const uint32_t *data); /* pckbd.c */ #define I8042_A20_LINE "a20" -void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, MemoryRegion *region, ram_addr_t size, hwaddr mask); @@ -284,7 +283,6 @@ int cmos_get_fd_drive_type(FloppyDriveType fd0); I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, qemu_irq sci_irq, qemu_irq smi_irq, int smm_enabled, DeviceState **piix4_pm); -void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); /* hpet.c */ extern int no_hpet; diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 5adc603d47..1a2b11b322 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -106,8 +106,6 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb, uint32_t xics_phandle, void *fdt); -void spapr_pci_msi_init(sPAPRMachineState *spapr, hwaddr addr); - void spapr_pci_rtas_init(void); sPAPRPHBState *spapr_pci_find_phb(sPAPRMachineState *spapr, uint64_t buid); diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h index 847fd7db33..d5891cd30e 100644 --- a/include/hw/pci/pci_bridge.h +++ b/include/hw/pci/pci_bridge.h @@ -45,7 +45,6 @@ void pci_bridge_update_mappings(PCIBridge *br); void pci_bridge_write_config(PCIDevice *d, uint32_t address, uint32_t val, int len); void pci_bridge_disable_base_limit(PCIDevice *dev); -void pci_bridge_reset_reg(PCIDevice *dev); void pci_bridge_reset(DeviceState *qdev); void pci_bridge_initfn(PCIDevice *pci_dev, const char *typename); diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h index e167bf7520..f7b64db00c 100644 --- a/include/hw/pci/pcie_port.h +++ b/include/hw/pci/pcie_port.h @@ -53,7 +53,6 @@ struct PCIESlot { }; void pcie_chassis_create(uint8_t chassis_number); -void pcie_main_chassis_create(void); PCIESlot *pcie_chassis_find_slot(uint8_t chassis, uint16_t slot); int pcie_chassis_add_slot(struct PCIESlot *slot); void pcie_chassis_del_slot(PCIESlot *s); diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h index 3b01ae8314..66e57a5194 100644 --- a/include/hw/ppc/ppc4xx.h +++ b/include/hw/ppc/ppc4xx.h @@ -55,10 +55,4 @@ void ppc4xx_sdram_init (CPUPPCState *env, qemu_irq irq, int nbanks, #define TYPE_PPC4xx_PCI_HOST_BRIDGE "ppc4xx-pcihost" -PCIBus *ppc4xx_pci_init(CPUPPCState *env, qemu_irq pci_irqs[4], - hwaddr config_space, - hwaddr int_ack, - hwaddr special_cycle, - hwaddr registers); - #endif /* PPC4XX_H */ diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index caf7be919f..6289d50dbf 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -368,9 +368,6 @@ void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn); target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode, target_ulong *args); -int spapr_allocate_irq(int hint, bool lsi); -int spapr_allocate_irq_block(int num, bool lsi, bool msi); - /* ibm,set-eeh-option */ #define RTAS_EEH_DISABLE 0 #define RTAS_EEH_ENABLE 1 diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h index d4a1e2c8af..40d0e5f6a3 100644 --- a/include/hw/ppc/spapr_vio.h +++ b/include/hw/ppc/spapr_vio.h @@ -85,8 +85,6 @@ extern VIOsPAPRDevice *spapr_vio_find_by_reg(VIOsPAPRBus *bus, uint32_t reg); extern int spapr_populate_vdevice(VIOsPAPRBus *bus, void *fdt); extern int spapr_populate_chosen_stdout(void *fdt, VIOsPAPRBus *bus); -extern int spapr_vio_signal(VIOsPAPRDevice *dev, target_ulong mode); - static inline qemu_irq spapr_vio_qirq(VIOsPAPRDevice *dev) { sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); @@ -137,8 +135,6 @@ void spapr_vscsi_create(VIOsPAPRBus *bus); VIOsPAPRDevice *spapr_vty_get_default(VIOsPAPRBus *bus); -void spapr_vio_quiesce(void); - extern const VMStateDescription vmstate_spapr_vio; #define VMSTATE_SPAPR_VIO(_f, _s) \ diff --git a/include/hw/scsi/scsi.h b/include/hw/scsi/scsi.h index 94d7868105..9bad49e917 100644 --- a/include/hw/scsi/scsi.h +++ b/include/hw/scsi/scsi.h @@ -243,7 +243,6 @@ extern const struct SCSISense sense_code_SPACE_ALLOC_FAILED; uint32_t scsi_data_cdb_xfer(uint8_t *buf); uint32_t scsi_cdb_xfer(uint8_t *buf); int scsi_cdb_length(uint8_t *buf); -int scsi_sense_valid(SCSISense sense); int scsi_build_sense(uint8_t *in_buf, int in_len, uint8_t *buf, int len, bool fixed); diff --git a/include/hw/virtio/virtio-bus.h b/include/hw/virtio/virtio-bus.h index f3e5ef3f5b..c98aa526d1 100644 --- a/include/hw/virtio/virtio-bus.h +++ b/include/hw/virtio/virtio-bus.h @@ -111,9 +111,6 @@ void virtio_bus_device_unplugged(VirtIODevice *bus); uint16_t virtio_bus_get_vdev_id(VirtioBusState *bus); /* Get the config_len field of the plugged device. */ size_t virtio_bus_get_vdev_config_len(VirtioBusState *bus); -/* Get the features of the plugged device. */ -uint32_t virtio_bus_get_vdev_features(VirtioBusState *bus, - uint32_t requested_features); /* Get bad features of the plugged device. */ uint32_t virtio_bus_get_vdev_bad_features(VirtioBusState *bus); /* Get config of the plugged device. */ diff --git a/include/migration/migration.h b/include/migration/migration.h index 3c96623d3d..d4acc72b85 100644 --- a/include/migration/migration.h +++ b/include/migration/migration.h @@ -229,8 +229,6 @@ void migrate_fd_error(MigrationState *s, const Error *error); void migrate_fd_connect(MigrationState *s); -int migrate_fd_close(MigrationState *s); - void add_migration_state_change_notifier(Notifier *notify); void remove_migration_state_change_notifier(Notifier *notify); MigrationState *migrate_init(const MigrationParams *params); diff --git a/include/net/net.h b/include/net/net.h index e8d9e9e4e9..99b28d5b38 100644 --- a/include/net/net.h +++ b/include/net/net.h @@ -138,8 +138,6 @@ NetClientState *qemu_get_queue(NICState *nic); NICState *qemu_get_nic(NetClientState *nc); void *qemu_get_nic_opaque(NetClientState *nc); void qemu_del_net_client(NetClientState *nc); -NetClientState *qemu_find_vlan_client_by_name(Monitor *mon, int vlan_id, - const char *client_str); typedef void (*qemu_nic_foreach)(NICState *nic, void *opaque); void qemu_foreach_nic(qemu_nic_foreach func, void *opaque); int qemu_can_send_packet(NetClientState *nc); diff --git a/include/qemu/bitmap.h b/include/qemu/bitmap.h index ec5146f84e..7247f14788 100644 --- a/include/qemu/bitmap.h +++ b/include/qemu/bitmap.h @@ -75,10 +75,6 @@ int slow_bitmap_equal(const unsigned long *bitmap1, const unsigned long *bitmap2, long bits); void slow_bitmap_complement(unsigned long *dst, const unsigned long *src, long bits); -void slow_bitmap_shift_right(unsigned long *dst, - const unsigned long *src, int shift, long bits); -void slow_bitmap_shift_left(unsigned long *dst, - const unsigned long *src, int shift, long bits); int slow_bitmap_and(unsigned long *dst, const unsigned long *bitmap1, const unsigned long *bitmap2, long bits); void slow_bitmap_or(unsigned long *dst, const unsigned long *bitmap1, diff --git a/include/qemu/uri.h b/include/qemu/uri.h index de99b3bd4b..d201c61260 100644 --- a/include/qemu/uri.h +++ b/include/qemu/uri.h @@ -102,8 +102,6 @@ typedef struct QueryParams { } QueryParams; struct QueryParams *query_params_new (int init_alloc); -int query_param_append (QueryParams *ps, const char *name, const char *value); -extern char *query_param_to_string (const QueryParams *ps); extern QueryParams *query_params_parse (const char *query); extern void query_params_free (QueryParams *ps); diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index f2a7b3b8fe..3e17ba76ce 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -326,8 +326,6 @@ MemTxAttrs kvm_arch_post_run(CPUState *cpu, struct kvm_run *run); int kvm_arch_handle_exit(CPUState *cpu, struct kvm_run *run); -int kvm_arch_handle_ioapic_eoi(CPUState *cpu, struct kvm_run *run); - int kvm_arch_process_async_events(CPUState *cpu); int kvm_arch_get_registers(CPUState *cpu); diff --git a/include/ui/console.h b/include/ui/console.h index 2703a3aa5a..d9c13d20b1 100644 --- a/include/ui/console.h +++ b/include/ui/console.h @@ -394,9 +394,7 @@ QemuUIInfo *qemu_console_get_ui_info(QemuConsole *con); int qemu_console_get_width(QemuConsole *con, int fallback); int qemu_console_get_height(QemuConsole *con, int fallback); -void text_consoles_set_display(DisplayState *ds); void console_select(unsigned int index); -void console_color_init(DisplayState *ds); void qemu_console_resize(QemuConsole *con, int width, int height); void qemu_console_copy(QemuConsole *con, int src_x, int src_y, int dst_x, int dst_y, int w, int h); diff --git a/include/ui/input.h b/include/ui/input.h index 102d8a3341..d06a12dd4c 100644 --- a/include/ui/input.h +++ b/include/ui/input.h @@ -65,6 +65,4 @@ void qemu_input_check_mode_change(void); void qemu_add_mouse_mode_change_notifier(Notifier *notify); void qemu_remove_mouse_mode_change_notifier(Notifier *notify); -int input_linux_init(void *opaque, QemuOpts *opts, Error **errp); - #endif /* INPUT_H */ diff --git a/include/ui/spice-display.h b/include/ui/spice-display.h index 568b64a0f6..42e0fdf775 100644 --- a/include/ui/spice-display.h +++ b/include/ui/spice-display.h @@ -144,8 +144,6 @@ void qemu_spice_destroy_update(SimpleSpiceDisplay *sdpy, SimpleSpiceUpdate *upda void qemu_spice_create_host_memslot(SimpleSpiceDisplay *ssd); void qemu_spice_create_host_primary(SimpleSpiceDisplay *ssd); void qemu_spice_destroy_host_primary(SimpleSpiceDisplay *ssd); -void qemu_spice_vm_change_state_handler(void *opaque, int running, - RunState state); void qemu_spice_display_init_common(SimpleSpiceDisplay *ssd); void qemu_spice_display_update(SimpleSpiceDisplay *ssd, diff --git a/linux-user/elfload.c b/linux-user/elfload.c index f807baf389..29455e4e47 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -2718,7 +2718,6 @@ static int core_dump_filename(const TaskState *ts, char *buf, size_t bufsize) { char timestamp[64]; - char *filename = NULL; char *base_filename = NULL; struct timeval tv; struct tm tm; @@ -2731,14 +2730,12 @@ static int core_dump_filename(const TaskState *ts, char *buf, return (-1); } - filename = strdup(ts->bprm->filename); - base_filename = strdup(basename(filename)); + base_filename = g_path_get_basename(ts->bprm->filename); (void) strftime(timestamp, sizeof (timestamp), "%Y%m%d-%H%M%S", localtime_r(&tv.tv_sec, &tm)); (void) snprintf(buf, bufsize, "qemu_%s_%s_%d.core", base_filename, timestamp, (int)getpid()); - free(base_filename); - free(filename); + g_free(base_filename); return (0); } diff --git a/linux-user/qemu.h b/linux-user/qemu.h index bef465de4d..815447f5fc 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -548,7 +548,7 @@ static inline void *lock_user(int type, abi_ulong guest_addr, long len, int copy #ifdef DEBUG_REMAP { void *addr; - addr = malloc(len); + addr = g_malloc(len); if (copy) memcpy(addr, g2h(guest_addr), len); else @@ -574,7 +574,7 @@ static inline void unlock_user(void *host_ptr, abi_ulong guest_addr, return; if (len > 0) memcpy(g2h(guest_addr), host_ptr, len); - free(host_ptr); + g_free(host_ptr); #endif } diff --git a/linux-user/signal.c b/linux-user/signal.c index 9a4d894e3a..d3ac0e2565 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -4244,7 +4244,7 @@ static void setup_frame(int sig, struct target_sigaction *ka, env->regs[5] = 0; // FIXME: no clue... current->thread.prot_addr; /* Place signal number on stack to allow backtrace from handler. */ - __put_user(env->regs[2], (int *) &frame->signo); + __put_user(env->regs[2], &frame->signo); unlock_user_struct(frame, frame_addr, 1); return; diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index 783565463f..c0c9b5887c 100644 --- a/linux-user/syscall_defs.h +++ b/linux-user/syscall_defs.h @@ -2329,8 +2329,8 @@ struct target_flock { struct target_flock64 { short l_type; short l_whence; -#if defined(TARGET_PPC) || defined(TARGET_X86_64) || defined(TARGET_MIPS) \ - || defined(TARGET_SPARC) || defined(TARGET_HPPA) \ +#if defined(TARGET_PPC) || defined(TARGET_X86_64) \ + || defined(TARGET_MIPS) || defined(TARGET_SPARC) \ || defined(TARGET_MICROBLAZE) || defined(TARGET_TILEGX) int __pad; #endif diff --git a/memory.c b/memory.c index 0eb6895fe6..1a1baf574c 100644 --- a/memory.c +++ b/memory.c @@ -944,11 +944,6 @@ static void memory_region_destructor_ram(MemoryRegion *mr) qemu_ram_free(mr->ram_block); } -static void memory_region_destructor_rom_device(MemoryRegion *mr) -{ - qemu_ram_free(mr->ram_block); -} - static bool memory_region_need_escape(char c) { return c == '/' || c == '[' || c == '\\' || c == ']'; @@ -1405,7 +1400,7 @@ void memory_region_init_rom_device(MemoryRegion *mr, mr->opaque = opaque; mr->terminates = true; mr->rom_device = true; - mr->destructor = memory_region_destructor_rom_device; + mr->destructor = memory_region_destructor_ram; mr->ram_block = qemu_ram_alloc(size, mr, errp); } diff --git a/net/socket.c b/net/socket.c index 3f98eefb34..982c8debe4 100644 --- a/net/socket.c +++ b/net/socket.c @@ -489,90 +489,105 @@ static int net_socket_listen_init(NetClientState *peer, { NetClientState *nc; NetSocketState *s; - struct sockaddr_in saddr; - int fd, ret; - - if (parse_host_port(&saddr, host_str) < 0) - return -1; + SocketAddress *saddr; + int ret; + Error *local_error = NULL; - fd = qemu_socket(PF_INET, SOCK_STREAM, 0); - if (fd < 0) { - perror("socket"); + saddr = socket_parse(host_str, &local_error); + if (saddr == NULL) { + error_report_err(local_error); return -1; } - qemu_set_nonblock(fd); - - socket_set_fast_reuse(fd); - ret = bind(fd, (struct sockaddr *)&saddr, sizeof(saddr)); + ret = socket_listen(saddr, &local_error); if (ret < 0) { - perror("bind"); - closesocket(fd); - return -1; - } - ret = listen(fd, 0); - if (ret < 0) { - perror("listen"); - closesocket(fd); + qapi_free_SocketAddress(saddr); + error_report_err(local_error); return -1; } nc = qemu_new_net_client(&net_socket_info, peer, model, name); s = DO_UPCAST(NetSocketState, nc, nc); s->fd = -1; - s->listen_fd = fd; + s->listen_fd = ret; s->nc.link_down = true; qemu_set_fd_handler(s->listen_fd, net_socket_accept, NULL, s); + qapi_free_SocketAddress(saddr); return 0; } +typedef struct { + NetClientState *peer; + SocketAddress *saddr; + char *model; + char *name; +} socket_connect_data; + +static void socket_connect_data_free(socket_connect_data *c) +{ + qapi_free_SocketAddress(c->saddr); + g_free(c->model); + g_free(c->name); + g_free(c); +} + +static void net_socket_connected(int fd, Error *err, void *opaque) +{ + socket_connect_data *c = opaque; + NetSocketState *s; + char *addr_str = NULL; + Error *local_error = NULL; + + addr_str = socket_address_to_string(c->saddr, &local_error); + if (addr_str == NULL) { + error_report_err(local_error); + closesocket(fd); + goto end; + } + + s = net_socket_fd_init(c->peer, c->model, c->name, fd, true); + if (!s) { + closesocket(fd); + goto end; + } + + snprintf(s->nc.info_str, sizeof(s->nc.info_str), + "socket: connect to %s", addr_str); + +end: + g_free(addr_str); + socket_connect_data_free(c); +} + static int net_socket_connect_init(NetClientState *peer, const char *model, const char *name, const char *host_str) { - NetSocketState *s; - int fd, connected, ret; - struct sockaddr_in saddr; + socket_connect_data *c = g_new0(socket_connect_data, 1); + int fd = -1; + Error *local_error = NULL; - if (parse_host_port(&saddr, host_str) < 0) - return -1; + c->peer = peer; + c->model = g_strdup(model); + c->name = g_strdup(name); + c->saddr = socket_parse(host_str, &local_error); + if (c->saddr == NULL) { + goto err; + } - fd = qemu_socket(PF_INET, SOCK_STREAM, 0); + fd = socket_connect(c->saddr, &local_error, net_socket_connected, c); if (fd < 0) { - perror("socket"); - return -1; + goto err; } - qemu_set_nonblock(fd); - connected = 0; - for(;;) { - ret = connect(fd, (struct sockaddr *)&saddr, sizeof(saddr)); - if (ret < 0) { - if (errno == EINTR || errno == EWOULDBLOCK) { - /* continue */ - } else if (errno == EINPROGRESS || - errno == EALREADY || - errno == EINVAL) { - break; - } else { - perror("connect"); - closesocket(fd); - return -1; - } - } else { - connected = 1; - break; - } - } - s = net_socket_fd_init(peer, model, name, fd, connected); - if (!s) - return -1; - snprintf(s->nc.info_str, sizeof(s->nc.info_str), - "socket: connect to %s:%d", - inet_ntoa(saddr.sin_addr), ntohs(saddr.sin_port)); return 0; + +err: + error_report_err(local_error); + socket_connect_data_free(c); + return -1; } static int net_socket_mcast_init(NetClientState *peer, diff --git a/qemu-char.c b/qemu-char.c index 7fa87a8b6e..8826419d7d 100644 --- a/qemu-char.c +++ b/qemu-char.c @@ -1230,6 +1230,9 @@ static CharDriverState *qemu_chr_open_stdio(const char *id, sigaction(SIGCONT, &act, NULL); chr = qemu_chr_open_fd(0, 1, common, errp); + if (!chr) { + return NULL; + } chr->chr_close = qemu_chr_close_stdio; chr->chr_set_echo = qemu_chr_set_echo_stdio; if (opts->has_signal) { @@ -1686,6 +1689,9 @@ static CharDriverState *qemu_chr_open_tty_fd(int fd, tty_serial_init(fd, 115200, 'N', 8, 1); chr = qemu_chr_open_fd(fd, fd, backend, errp); + if (!chr) { + return NULL; + } chr->chr_ioctl = tty_serial_ioctl; chr->chr_close = qemu_chr_close_tty; return chr; diff --git a/qemu-tech.texi b/qemu-tech.texi index bdb2285f4e..1b048cb337 100644 --- a/qemu-tech.texi +++ b/qemu-tech.texi @@ -89,8 +89,7 @@ QEMU generic features: @item Working on x86, x86_64 and PowerPC32/64 hosts. Being tested on ARM, -HPPA, Sparc32 and Sparc64. Previous versions had some support for -Alpha and S390 hosts, but TCG (see below) doesn't support those yet. +S390x, Sparc32 and Sparc64. @item Self-modifying code support. diff --git a/scripts/coccinelle/typecast.cocci b/scripts/coccinelle/typecast.cocci new file mode 100644 index 0000000000..be2183ee4f --- /dev/null +++ b/scripts/coccinelle/typecast.cocci @@ -0,0 +1,7 @@ +// Remove useless casts +@@ +type T; +T v; +@@ +- (T *)&v ++ &v diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index ac5e801fb4..dcdd0416bd 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -474,7 +474,6 @@ int cpu_alpha_signal_handler(int host_signum, void *pinfo, void *puc); int alpha_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, int mmu_idx); -void do_restore_state(CPUAlphaState *, uintptr_t retaddr); void QEMU_NORETURN dynamic_excp(CPUAlphaState *, uintptr_t, int, int); void QEMU_NORETURN arith_excp(CPUAlphaState *, uintptr_t, int, uint64_t); diff --git a/target-i386/cpu.h b/target-i386/cpu.h index bb3ffda244..58e43b6f4b 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -1035,6 +1035,9 @@ typedef struct CPUX86State { uint64_t tsc; uint64_t tsc_adjust; uint64_t tsc_deadline; + uint64_t tsc_aux; + + uint64_t xcr0; uint64_t mcg_status; uint64_t msr_ia32_misc_enable; @@ -1051,6 +1054,8 @@ typedef struct CPUX86State { uint64_t pat; uint32_t smbase; + uint32_t pkru; + /* End of state preserved by INIT (dummy marker). */ struct {} end_init_save; @@ -1135,20 +1140,15 @@ typedef struct CPUX86State { uint64_t mcg_ctl; uint64_t mcg_ext_ctl; uint64_t mce_banks[MCE_BANKS_DEF*4]; - - uint64_t tsc_aux; + uint64_t xstate_bv; /* vmstate */ uint16_t fpus_vmstate; uint16_t fptag_vmstate; uint16_t fpregs_format_vmstate; - uint64_t xstate_bv; - uint64_t xcr0; uint64_t xss; - uint32_t pkru; - TPRAccess tpr_access_type; } CPUX86State; diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c index 6cbdf17426..fb79f3180d 100644 --- a/target-i386/seg_helper.c +++ b/target-i386/seg_helper.c @@ -1137,25 +1137,27 @@ static void do_interrupt_real(CPUX86State *env, int intno, int is_int, static void do_interrupt_user(CPUX86State *env, int intno, int is_int, int error_code, target_ulong next_eip) { - SegmentCache *dt; - target_ulong ptr; - int dpl, cpl, shift; - uint32_t e2; + if (is_int) { + SegmentCache *dt; + target_ulong ptr; + int dpl, cpl, shift; + uint32_t e2; - dt = &env->idt; - if (env->hflags & HF_LMA_MASK) { - shift = 4; - } else { - shift = 3; - } - ptr = dt->base + (intno << shift); - e2 = cpu_ldl_kernel(env, ptr + 4); + dt = &env->idt; + if (env->hflags & HF_LMA_MASK) { + shift = 4; + } else { + shift = 3; + } + ptr = dt->base + (intno << shift); + e2 = cpu_ldl_kernel(env, ptr + 4); - dpl = (e2 >> DESC_DPL_SHIFT) & 3; - cpl = env->hflags & HF_CPL_MASK; - /* check privilege if software int */ - if (is_int && dpl < cpl) { - raise_exception_err(env, EXCP0D_GPF, (intno << shift) + 2); + dpl = (e2 >> DESC_DPL_SHIFT) & 3; + cpl = env->hflags & HF_CPL_MASK; + /* check privilege if software int */ + if (dpl < cpl) { + raise_exception_err(env, EXCP0D_GPF, (intno << shift) + 2); + } } /* Since we emulate only user space, we cannot do more than diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h index b2faa6b605..c2d40cb1cc 100644 --- a/target-m68k/cpu.h +++ b/target-m68k/cpu.h @@ -196,7 +196,6 @@ enum { #define MACSR_EV 0x001 void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector); -void m68k_set_macsr(CPUM68KState *env, uint32_t val); void m68k_switch_sp(CPUM68KState *env); #define M68K_FPCR_PREC (1 << 6) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 1e808c8884..9617481196 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1184,8 +1184,6 @@ void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); -int ppc_cpu_get_monitor_def(CPUState *cs, const char *name, - uint64_t *pval); hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int ppc_cpu_gdb_read_register_apple(CPUState *cpu, uint8_t *buf, int reg); diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h index db265e30b2..ab5d347a53 100644 --- a/target-ppc/mmu-hash64.h +++ b/target-ppc/mmu-hash64.h @@ -4,7 +4,6 @@ #ifndef CONFIG_USER_ONLY #ifdef TARGET_PPC64 -void ppc_hash64_check_page_sizes(PowerPCCPU *cpu, Error **errp); void dump_slb(FILE *f, fprintf_function cpu_fprintf, PowerPCCPU *cpu); int ppc_store_slb(PowerPCCPU *cpu, target_ulong slot, target_ulong esid, target_ulong vsid); diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h index ac75360eab..5645e063af 100644 --- a/target-s390x/cpu.h +++ b/target-s390x/cpu.h @@ -624,8 +624,6 @@ static inline unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu) return 0; } #endif -void cpu_lock(void); -void cpu_unlock(void); extern void subsystem_reset(void); diff --git a/target-sh4/README.sh4 b/target-sh4/README.sh4 index e578830f79..ece046442a 100644 --- a/target-sh4/README.sh4 +++ b/target-sh4/README.sh4 @@ -25,7 +25,7 @@ Goals The primary model being worked on is the soft MMU target to be able to emulate the Shix 2.0 board by Alexis Polti, described at -http://perso.enst.fr/~polti/realisations/shix20/ +https://web.archive.org/web/20070917001736/http://perso.enst.fr/~polti/realisations/shix20/ Ultimately, qemu will be coupled with a system C or a verilog simulator to simulate the whole board functionalities. diff --git a/tcg/tcg.c b/tcg/tcg.c index 42417bdc92..c450c6273b 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -40,8 +40,6 @@ #define NO_CPU_IO_DEFS #include "cpu.h" -#include "qemu/host-utils.h" -#include "qemu/timer.h" #include "exec/cpu-common.h" #include "exec/exec-all.h" diff --git a/tcg/tcg.h b/tcg/tcg.h index 1bcabcad9d..9bf31bbc84 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -723,7 +723,6 @@ static inline bool tcg_op_buf_full(void) void *tcg_malloc_internal(TCGContext *s, int size); void tcg_pool_reset(TCGContext *s); -void tcg_pool_delete(TCGContext *s); void tb_lock(void); void tb_unlock(void); @@ -907,7 +906,6 @@ void tcg_optimize(TCGContext *s); /* only used for debugging purposes */ void tcg_dump_ops(TCGContext *s); -void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf); TCGv_i32 tcg_const_i32(int32_t val); TCGv_i64 tcg_const_i64(int64_t val); TCGv_i32 tcg_const_local_i32(int32_t val); diff --git a/tcg/tci/README b/tcg/tci/README index 3786b0915b..386c3c7507 100644 --- a/tcg/tci/README +++ b/tcg/tci/README @@ -9,7 +9,7 @@ code fragments ("basic blocks") from target code (any of the targets supported by QEMU) to a code representation which can be run on a host. -QEMU can create native code for some hosts (arm, hppa, i386, ia64, ppc, ppc64, +QEMU can create native code for some hosts (arm, i386, ia64, ppc, ppc64, s390, sparc, x86_64). For others, unofficial host support was written. By adding a code generator for a virtual machine and using an diff --git a/ui/console.c b/ui/console.c index c24bfe422d..3940762851 100644 --- a/ui/console.c +++ b/ui/console.c @@ -1142,6 +1142,7 @@ static const int qcode_to_keysym[Q_KEY_CODE__MAX] = { [Q_KEY_CODE_PGUP] = QEMU_KEY_PAGEUP, [Q_KEY_CODE_PGDN] = QEMU_KEY_PAGEDOWN, [Q_KEY_CODE_DELETE] = QEMU_KEY_DELETE, + [Q_KEY_CODE_BACKSPACE] = QEMU_KEY_BACKSPACE, }; bool kbd_put_qcode_console(QemuConsole *s, int qcode) diff --git a/util/bufferiszero.c b/util/bufferiszero.c index abe65f9d88..eb974b7849 100644 --- a/util/bufferiszero.c +++ b/util/bufferiszero.c @@ -26,38 +26,6 @@ #include "qemu/cutils.h" #include "qemu/bswap.h" - -/* vector definitions */ - -extern void link_error(void); - -#define ACCEL_BUFFER_ZERO(NAME, SIZE, VECTYPE, NONZERO) \ -static bool NAME(const void *buf, size_t len) \ -{ \ - const void *end = buf + len; \ - do { \ - const VECTYPE *p = buf; \ - VECTYPE t; \ - __builtin_prefetch(buf + SIZE); \ - barrier(); \ - if (SIZE == sizeof(VECTYPE) * 4) { \ - t = (p[0] | p[1]) | (p[2] | p[3]); \ - } else if (SIZE == sizeof(VECTYPE) * 8) { \ - t = p[0] | p[1]; \ - t |= p[2] | p[3]; \ - t |= p[4] | p[5]; \ - t |= p[6] | p[7]; \ - } else { \ - link_error(); \ - } \ - if (unlikely(NONZERO(t))) { \ - return false; \ - } \ - buf += SIZE; \ - } while (buf < end); \ - return true; \ -} - static bool buffer_zero_int(const void *buf, size_t len) { @@ -96,47 +64,174 @@ buffer_zero_int(const void *buf, size_t len) } } -#if defined(CONFIG_AVX2_OPT) || (defined(CONFIG_CPUID_H) && defined(__SSE2__)) -#include <cpuid.h> - +#if defined(CONFIG_AVX2_OPT) || defined(__SSE2__) /* Do not use push_options pragmas unnecessarily, because clang * does not support them. */ -#ifndef __SSE2__ +#ifdef CONFIG_AVX2_OPT #pragma GCC push_options #pragma GCC target("sse2") #endif #include <emmintrin.h> -#define SSE2_NONZERO(X) \ - (_mm_movemask_epi8(_mm_cmpeq_epi8((X), _mm_setzero_si128())) != 0xFFFF) -ACCEL_BUFFER_ZERO(buffer_zero_sse2, 64, __m128i, SSE2_NONZERO) -#ifndef __SSE2__ + +/* Note that each of these vectorized functions require len >= 64. */ + +static bool +buffer_zero_sse2(const void *buf, size_t len) +{ + __m128i t = _mm_loadu_si128(buf); + __m128i *p = (__m128i *)(((uintptr_t)buf + 5 * 16) & -16); + __m128i *e = (__m128i *)(((uintptr_t)buf + len) & -16); + __m128i zero = _mm_setzero_si128(); + + /* Loop over 16-byte aligned blocks of 64. */ + while (likely(p <= e)) { + __builtin_prefetch(p); + t = _mm_cmpeq_epi8(t, zero); + if (unlikely(_mm_movemask_epi8(t) != 0xFFFF)) { + return false; + } + t = p[-4] | p[-3] | p[-2] | p[-1]; + p += 4; + } + + /* Finish the aligned tail. */ + t |= e[-3]; + t |= e[-2]; + t |= e[-1]; + + /* Finish the unaligned tail. */ + t |= _mm_loadu_si128(buf + len - 16); + + return _mm_movemask_epi8(_mm_cmpeq_epi8(t, zero)) == 0xFFFF; +} +#ifdef CONFIG_AVX2_OPT #pragma GCC pop_options #endif #ifdef CONFIG_AVX2_OPT +/* Note that due to restrictions/bugs wrt __builtin functions in gcc <= 4.8, + * the includes have to be within the corresponding push_options region, and + * therefore the regions themselves have to be ordered with increasing ISA. + */ #pragma GCC push_options #pragma GCC target("sse4") #include <smmintrin.h> -#define SSE4_NONZERO(X) !_mm_testz_si128((X), (X)) -ACCEL_BUFFER_ZERO(buffer_zero_sse4, 64, __m128i, SSE4_NONZERO) -#pragma GCC pop_options +static bool +buffer_zero_sse4(const void *buf, size_t len) +{ + __m128i t = _mm_loadu_si128(buf); + __m128i *p = (__m128i *)(((uintptr_t)buf + 5 * 16) & -16); + __m128i *e = (__m128i *)(((uintptr_t)buf + len) & -16); + + /* Loop over 16-byte aligned blocks of 64. */ + while (likely(p <= e)) { + __builtin_prefetch(p); + if (unlikely(!_mm_testz_si128(t, t))) { + return false; + } + t = p[-4] | p[-3] | p[-2] | p[-1]; + p += 4; + } + + /* Finish the aligned tail. */ + t |= e[-3]; + t |= e[-2]; + t |= e[-1]; + + /* Finish the unaligned tail. */ + t |= _mm_loadu_si128(buf + len - 16); + + return _mm_testz_si128(t, t); +} + +#pragma GCC pop_options #pragma GCC push_options #pragma GCC target("avx2") #include <immintrin.h> -#define AVX2_NONZERO(X) !_mm256_testz_si256((X), (X)) -ACCEL_BUFFER_ZERO(buffer_zero_avx2, 128, __m256i, AVX2_NONZERO) + +static bool +buffer_zero_avx2(const void *buf, size_t len) +{ + /* Begin with an unaligned head of 32 bytes. */ + __m256i t = _mm256_loadu_si256(buf); + __m256i *p = (__m256i *)(((uintptr_t)buf + 5 * 32) & -32); + __m256i *e = (__m256i *)(((uintptr_t)buf + len) & -32); + + if (likely(p <= e)) { + /* Loop over 32-byte aligned blocks of 128. */ + do { + __builtin_prefetch(p); + if (unlikely(!_mm256_testz_si256(t, t))) { + return false; + } + t = p[-4] | p[-3] | p[-2] | p[-1]; + p += 4; + } while (p <= e); + } else { + t |= _mm256_loadu_si256(buf + 32); + if (len <= 128) { + goto last2; + } + } + + /* Finish the last block of 128 unaligned. */ + t |= _mm256_loadu_si256(buf + len - 4 * 32); + t |= _mm256_loadu_si256(buf + len - 3 * 32); + last2: + t |= _mm256_loadu_si256(buf + len - 2 * 32); + t |= _mm256_loadu_si256(buf + len - 1 * 32); + + return _mm256_testz_si256(t, t); +} #pragma GCC pop_options +#endif /* CONFIG_AVX2_OPT */ + +/* Note that for test_buffer_is_zero_next_accel, the most preferred + * ISA must have the least significant bit. + */ +#define CACHE_AVX2 1 +#define CACHE_SSE4 2 +#define CACHE_SSE2 4 + +/* Make sure that these variables are appropriately initialized when + * SSE2 is enabled on the compiler command-line, but the compiler is + * too old to support <cpuid.h>. + */ +#ifdef CONFIG_AVX2_OPT +# define INIT_CACHE 0 +# define INIT_ACCEL buffer_zero_int +#else +# ifndef __SSE2__ +# error "ISA selection confusion" +# endif +# define INIT_CACHE CACHE_SSE2 +# define INIT_ACCEL buffer_zero_sse2 #endif -#define CACHE_AVX2 2 -#define CACHE_AVX1 4 -#define CACHE_SSE4 8 -#define CACHE_SSE2 16 +static unsigned cpuid_cache = INIT_CACHE; +static bool (*buffer_accel)(const void *, size_t) = INIT_ACCEL; -static unsigned cpuid_cache; +static void init_accel(unsigned cache) +{ + bool (*fn)(const void *, size_t) = buffer_zero_int; + if (cache & CACHE_SSE2) { + fn = buffer_zero_sse2; + } +#ifdef CONFIG_AVX2_OPT + if (cache & CACHE_SSE4) { + fn = buffer_zero_sse4; + } + if (cache & CACHE_AVX2) { + fn = buffer_zero_avx2; + } +#endif + buffer_accel = fn; +} +#ifdef CONFIG_AVX2_OPT +#include <cpuid.h> static void __attribute__((constructor)) init_cpuid_cache(void) { int max = __get_cpuid_max(0, NULL); @@ -154,24 +249,21 @@ static void __attribute__((constructor)) init_cpuid_cache(void) } /* We must check that AVX is not just available, but usable. */ - if ((c & bit_OSXSAVE) && (c & bit_AVX)) { - __asm("xgetbv" : "=a"(a), "=d"(d) : "c"(0)); - if ((a & 6) == 6) { - cache |= CACHE_AVX1; - if (max >= 7) { - __cpuid_count(7, 0, a, b, c, d); - if (b & bit_AVX2) { - cache |= CACHE_AVX2; - } - } + if ((c & bit_OSXSAVE) && (c & bit_AVX) && max >= 7) { + int bv; + __asm("xgetbv" : "=a"(bv), "=d"(d) : "c"(0)); + __cpuid_count(7, 0, a, b, c, d); + if ((bv & 6) == 6 && (b & bit_AVX2)) { + cache |= CACHE_AVX2; } } #endif } cpuid_cache = cache; + init_accel(cache); } +#endif /* CONFIG_AVX2_OPT */ -#define HAVE_NEXT_ACCEL bool test_buffer_is_zero_next_accel(void) { /* If no bits set, we just tested buffer_zero_int, and there @@ -181,31 +273,20 @@ bool test_buffer_is_zero_next_accel(void) } /* Disable the accelerator we used before and select a new one. */ cpuid_cache &= cpuid_cache - 1; + init_accel(cpuid_cache); return true; } static bool select_accel_fn(const void *buf, size_t len) { - uintptr_t ibuf = (uintptr_t)buf; -#ifdef CONFIG_AVX2_OPT - if (len % 128 == 0 && ibuf % 32 == 0 && (cpuid_cache & CACHE_AVX2)) { - return buffer_zero_avx2(buf, len); - } - if (len % 64 == 0 && ibuf % 16 == 0 && (cpuid_cache & CACHE_SSE4)) { - return buffer_zero_sse4(buf, len); - } -#endif - if (len % 64 == 0 && ibuf % 16 == 0 && (cpuid_cache & CACHE_SSE2)) { - return buffer_zero_sse2(buf, len); + if (likely(len >= 64)) { + return buffer_accel(buf, len); } return buffer_zero_int(buf, len); } #else #define select_accel_fn buffer_zero_int -#endif - -#ifndef HAVE_NEXT_ACCEL bool test_buffer_is_zero_next_accel(void) { return false; diff --git a/util/log.c b/util/log.c index 54b54e868a..e077340ae1 100644 --- a/util/log.c +++ b/util/log.c @@ -275,53 +275,42 @@ const QEMULogItem qemu_log_items[] = { { 0, NULL, NULL }, }; -static int cmp1(const char *s1, int n, const char *s2) -{ - if (strlen(s2) != n) { - return 0; - } - return memcmp(s1, s2, n) == 0; -} - /* takes a comma separated list of log masks. Return 0 if error. */ int qemu_str_to_log_mask(const char *str) { const QEMULogItem *item; - int mask; - const char *p, *p1; + int mask = 0; + char **parts = g_strsplit(str, ",", 0); + char **tmp; - p = str; - mask = 0; - for (;;) { - p1 = strchr(p, ','); - if (!p1) { - p1 = p + strlen(p); - } - if (cmp1(p,p1-p,"all")) { + for (tmp = parts; tmp && *tmp; tmp++) { + if (g_str_equal(*tmp, "all")) { for (item = qemu_log_items; item->mask != 0; item++) { mask |= item->mask; } #ifdef CONFIG_TRACE_LOG - } else if (strncmp(p, "trace:", 6) == 0 && p + 6 != p1) { - trace_enable_events(p + 6); + } else if (g_str_has_prefix(*tmp, "trace:") && (*tmp)[6] != '\0') { + trace_enable_events((*tmp) + 6); mask |= LOG_TRACE; #endif } else { for (item = qemu_log_items; item->mask != 0; item++) { - if (cmp1(p, p1 - p, item->name)) { + if (g_str_equal(*tmp, item->name)) { goto found; } } - return 0; + goto error; found: mask |= item->mask; } - if (*p1 != ',') { - break; - } - p = p1 + 1; } + + g_strfreev(parts); return mask; + + error: + g_strfreev(parts); + return 0; } void qemu_print_log_usage(FILE *f) |