diff options
48 files changed, 1077 insertions, 527 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index a73a61a546..9424a490d6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1158,10 +1158,11 @@ F: include/hw/timer/sun4v-rtc.h Leon3 M: Fabien Chouteau <chouteau@adacore.com> +M: KONRAD Frederic <frederic.konrad@adacore.com> S: Maintained F: hw/sparc/leon3.c F: hw/*/grlib* -F: include/hw/sparc/grlib.h +F: include/hw/*/grlib* S390 Machines ------------- diff --git a/Makefile b/Makefile index 66d5c65156..155f066a20 100644 --- a/Makefile +++ b/Makefile @@ -87,6 +87,10 @@ endif include $(SRC_PATH)/rules.mak +# notempy and lor are defined in rules.mak +CONFIG_TOOLS := $(call notempty,$(TOOLS)) +CONFIG_BLOCK := $(call lor,$(CONFIG_SOFTMMU),$(CONFIG_TOOLS)) + # Create QEMU_PKGVERSION and FULL_VERSION strings # If PKGVERSION is set, use that; otherwise get version and -dirty status from git QEMU_PKGVERSION := $(if $(PKGVERSION),$(PKGVERSION),$(shell \ @@ -101,7 +105,7 @@ QEMU_PKGVERSION := $(if $(PKGVERSION),$(PKGVERSION),$(shell \ # Either "version (pkgversion)", or just "version" if pkgversion not set FULL_VERSION := $(if $(QEMU_PKGVERSION),$(VERSION) ($(QEMU_PKGVERSION)),$(VERSION)) -GENERATED_FILES = qemu-version.h config-host.h qemu-options.def +generated-files-y = qemu-version.h config-host.h qemu-options.def GENERATED_QAPI_FILES = qapi/qapi-builtin-types.h qapi/qapi-builtin-types.c GENERATED_QAPI_FILES += qapi/qapi-types.h qapi/qapi-types.c @@ -121,20 +125,18 @@ GENERATED_QAPI_FILES += $(QAPI_MODULES:%=qapi/qapi-events-%.c) GENERATED_QAPI_FILES += qapi/qapi-introspect.c qapi/qapi-introspect.h GENERATED_QAPI_FILES += qapi/qapi-doc.texi -GENERATED_FILES += $(GENERATED_QAPI_FILES) +generated-files-y += $(GENERATED_QAPI_FILES) -GENERATED_FILES += trace/generated-tcg-tracers.h +generated-files-y += trace/generated-tcg-tracers.h -GENERATED_FILES += trace/generated-helpers-wrappers.h -GENERATED_FILES += trace/generated-helpers.h -GENERATED_FILES += trace/generated-helpers.c +generated-files-y += trace/generated-helpers-wrappers.h +generated-files-y += trace/generated-helpers.h +generated-files-y += trace/generated-helpers.c -ifdef CONFIG_TRACE_UST -GENERATED_FILES += trace-ust-all.h -GENERATED_FILES += trace-ust-all.c -endif +generated-files-$(CONFIG_TRACE_UST) += trace-ust-all.h +generated-files-$(CONFIG_TRACE_UST) += trace-ust-all.c -GENERATED_FILES += module_block.h +generated-files-y += module_block.h TRACE_HEADERS = trace-root.h $(trace-events-subdirs:%=%/trace.h) TRACE_SOURCES = trace-root.c $(trace-events-subdirs:%=%/trace.c) @@ -147,10 +149,10 @@ ifdef CONFIG_TRACE_UST TRACE_HEADERS += trace-ust-root.h $(trace-events-subdirs:%=%/trace-ust.h) endif -GENERATED_FILES += $(TRACE_HEADERS) -GENERATED_FILES += $(TRACE_SOURCES) -GENERATED_FILES += $(BUILD_DIR)/trace-events-all -GENERATED_FILES += .git-submodule-status +generated-files-y += $(TRACE_HEADERS) +generated-files-y += $(TRACE_SOURCES) +generated-files-y += $(BUILD_DIR)/trace-events-all +generated-files-y += .git-submodule-status trace-group-name = $(shell dirname $1 | sed -e 's/[^a-zA-Z0-9]/_/g') @@ -281,7 +283,7 @@ KEYCODEMAP_FILES = \ ui/input-keymap-osx-to-qcode.c \ $(NULL) -GENERATED_FILES += $(KEYCODEMAP_FILES) +generated-files-$(CONFIG_SOFTMMU) += $(KEYCODEMAP_FILES) ui/input-keymap-%.c: $(KEYCODEMAP_GEN) $(KEYCODEMAP_CSV) $(SRC_PATH)/ui/Makefile.objs $(call quiet-command,\ @@ -446,6 +448,7 @@ SOFTMMU_SUBDIR_RULES=$(filter %-softmmu,$(SUBDIR_RULES)) $(SOFTMMU_SUBDIR_RULES): $(authz-obj-y) $(SOFTMMU_SUBDIR_RULES): $(block-obj-y) +$(SOFTMMU_SUBDIR_RULES): $(chardev-obj-y) $(SOFTMMU_SUBDIR_RULES): $(crypto-obj-y) $(SOFTMMU_SUBDIR_RULES): $(io-obj-y) $(SOFTMMU_SUBDIR_RULES): config-all-devices.mak @@ -482,7 +485,7 @@ subdir-capstone: .git-submodule-status subdir-slirp: .git-submodule-status $(call quiet-command,$(MAKE) -C $(SRC_PATH)/slirp BUILD_DIR="$(BUILD_DIR)/slirp" CC="$(CC)" AR="$(AR)" LD="$(LD)" RANLIB="$(RANLIB)" CFLAGS="$(QEMU_CFLAGS) $(CFLAGS)" LDFLAGS="$(LDFLAGS)") -$(SUBDIR_RULES): libqemuutil.a $(common-obj-y) $(chardev-obj-y) \ +$(SUBDIR_RULES): libqemuutil.a $(common-obj-y) \ $(qom-obj-y) $(crypto-aes-obj-$(CONFIG_USER_ONLY)) ROMSUBDIR_RULES=$(patsubst %,romsubdir-%, $(ROMS)) @@ -643,10 +646,10 @@ clean: rm -f fsdev/*.pod scsi/*.pod rm -f qemu-img-cmds.h rm -f ui/shader/*-vert.h ui/shader/*-frag.h - @# May not be present in GENERATED_FILES + @# May not be present in generated-files-y rm -f trace/generated-tracers-dtrace.dtrace* rm -f trace/generated-tracers-dtrace.h* - rm -f $(foreach f,$(GENERATED_FILES),$(f) $(f)-timestamp) + rm -f $(foreach f,$(generated-files-y),$(f) $(f)-timestamp) rm -f qapi-gen-timestamp rm -rf qga/qapi-generated for d in $(ALL_SUBDIRS); do \ @@ -1062,7 +1065,7 @@ endif # CONFIG_WIN # rebuilt before other object files ifneq ($(wildcard config-host.mak),) ifneq ($(filter-out $(UNCHECKED_GOALS),$(MAKECMDGOALS)),$(if $(MAKECMDGOALS),,fail)) -Makefile: $(GENERATED_FILES) +Makefile: $(generated-files-y) endif endif diff --git a/Makefile.objs b/Makefile.objs index cf065de5ed..2b0793ecc9 100644 --- a/Makefile.objs +++ b/Makefile.objs @@ -127,11 +127,20 @@ rdmacm-mux-obj-y = contrib/rdmacm-mux/ trace-events-subdirs = trace-events-subdirs += accel/kvm trace-events-subdirs += accel/tcg -trace-events-subdirs += audio +trace-events-subdirs += crypto +ifeq ($(CONFIG_USER_ONLY),y) +trace-events-subdirs += linux-user +endif +ifeq ($(CONFIG_BLOCK),y) trace-events-subdirs += authz trace-events-subdirs += block +trace-events-subdirs += io +trace-events-subdirs += nbd +trace-events-subdirs += scsi +endif +ifeq ($(CONFIG_SOFTMMU),y) trace-events-subdirs += chardev -trace-events-subdirs += crypto +trace-events-subdirs += audio trace-events-subdirs += hw/9pfs trace-events-subdirs += hw/acpi trace-events-subdirs += hw/alpha @@ -140,7 +149,6 @@ trace-events-subdirs += hw/audio trace-events-subdirs += hw/block trace-events-subdirs += hw/block/dataplane trace-events-subdirs += hw/char -trace-events-subdirs += hw/display trace-events-subdirs += hw/dma trace-events-subdirs += hw/hppa trace-events-subdirs += hw/i2c @@ -173,14 +181,13 @@ trace-events-subdirs += hw/virtio trace-events-subdirs += hw/watchdog trace-events-subdirs += hw/xen trace-events-subdirs += hw/gpio -trace-events-subdirs += io -trace-events-subdirs += linux-user trace-events-subdirs += migration -trace-events-subdirs += nbd trace-events-subdirs += net +trace-events-subdirs += ui +endif +trace-events-subdirs += hw/display trace-events-subdirs += qapi trace-events-subdirs += qom -trace-events-subdirs += scsi trace-events-subdirs += target/arm trace-events-subdirs += target/hppa trace-events-subdirs += target/i386 @@ -189,7 +196,6 @@ trace-events-subdirs += target/ppc trace-events-subdirs += target/riscv trace-events-subdirs += target/s390x trace-events-subdirs += target/sparc -trace-events-subdirs += ui trace-events-subdirs += util trace-events-files = $(SRC_PATH)/trace-events $(trace-events-subdirs:%=$(SRC_PATH)/%/trace-events) diff --git a/Makefile.target b/Makefile.target index ae02495951..fdbe7c89f4 100644 --- a/Makefile.target +++ b/Makefile.target @@ -166,7 +166,7 @@ else obj-y += hw/$(TARGET_BASE_ARCH)/ endif -GENERATED_FILES += hmp-commands.h hmp-commands-info.h +generated-files-y += hmp-commands.h hmp-commands-info.h endif # CONFIG_SOFTMMU @@ -236,5 +236,5 @@ ifdef CONFIG_TRACE_SYSTEMTAP $(INSTALL_DATA) $(QEMU_PROG)-log.stp "$(DESTDIR)$(qemu_datadir)/../systemtap/tapset/$(QEMU_PROG)-log.stp" endif -GENERATED_FILES += config-target.h -Makefile: $(GENERATED_FILES) +generated-files-y += config-target.h +Makefile: $(generated-files-y) diff --git a/configure b/configure index 8999698bc2..d2fc346302 100755 --- a/configure +++ b/configure @@ -6079,7 +6079,9 @@ fi # Probe for guest agent support/options if [ "$guest_agent" != "no" ]; then - if [ "$linux" = "yes" -o "$bsd" = "yes" -o "$solaris" = "yes" -o "$mingw32" = "yes" ] ; then + if [ "$softmmu" = no -a "$want_tools" = no ] ; then + guest_agent=no + elif [ "$linux" = "yes" -o "$bsd" = "yes" -o "$solaris" = "yes" -o "$mingw32" = "yes" ] ; then tools="qemu-ga $tools" guest_agent=yes elif [ "$guest_agent" != yes ]; then diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 9c079d6834..c903e65169 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -92,8 +92,6 @@ typedef struct PIIX4PMState { MemHotplugState acpi_memory_hotplug; } PIIX4PMState; -#define TYPE_PIIX4_PM "PIIX4_PM" - #define PIIX4_PM(obj) \ OBJECT_CHECK(PIIX4PMState, (obj), TYPE_PIIX4_PM) @@ -554,17 +552,6 @@ static void piix4_pm_realize(PCIDevice *dev, Error **errp) piix4_pm_add_propeties(s); } -Object *piix4_pm_find(void) -{ - bool ambig; - Object *o = object_resolve_path_type("", TYPE_PIIX4_PM, &ambig); - - if (ambig || !o) { - return NULL; - } - return o; -} - I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, qemu_irq sci_irq, qemu_irq smi_irq, int smm_enabled, DeviceState **piix4_pm) diff --git a/hw/char/Kconfig b/hw/char/Kconfig index 6360c9fffa..40e7a8b8bb 100644 --- a/hw/char/Kconfig +++ b/hw/char/Kconfig @@ -24,6 +24,12 @@ config SERIAL_PCI depends on PCI select SERIAL +config SERIAL_PCI_MULTI + bool + default y if PCI_DEVICES + depends on PCI + select SERIAL + config VIRTIO_SERIAL bool default y diff --git a/hw/char/Makefile.objs b/hw/char/Makefile.objs index cf086e7114..02d8a66925 100644 --- a/hw/char/Makefile.objs +++ b/hw/char/Makefile.objs @@ -7,6 +7,7 @@ common-obj-$(CONFIG_PL011) += pl011.o common-obj-$(CONFIG_SERIAL) += serial.o common-obj-$(CONFIG_SERIAL_ISA) += serial-isa.o common-obj-$(CONFIG_SERIAL_PCI) += serial-pci.o +common-obj-$(CONFIG_SERIAL_PCI_MULTI) += serial-pci-multi.o common-obj-$(CONFIG_VIRTIO_SERIAL) += virtio-console.o common-obj-$(CONFIG_XILINX) += xilinx_uartlite.o common-obj-$(CONFIG_XEN) += xen_console.o diff --git a/hw/char/escc.c b/hw/char/escc.c index 628f5f81f7..c5b05a63f1 100644 --- a/hw/char/escc.c +++ b/hw/char/escc.c @@ -509,6 +509,13 @@ static void escc_mem_write(void *opaque, hwaddr addr, break; case SERIAL_DATA: trace_escc_mem_writeb_data(CHN_C(s), val); + /* + * Lower the irq when data is written to the Tx buffer and no other + * interrupts are currently pending. The irq will be raised again once + * the Tx buffer becomes empty below. + */ + s->txint = 0; + escc_update_irq(s); s->tx = val; if (s->wregs[W_TXCTRL2] & TXCTRL2_TXEN) { // tx enabled if (qemu_chr_fe_backend_connected(&s->chr)) { diff --git a/hw/char/grlib_apbuart.c b/hw/char/grlib_apbuart.c index e1d258b611..9623016d56 100644 --- a/hw/char/grlib_apbuart.c +++ b/hw/char/grlib_apbuart.c @@ -1,7 +1,7 @@ /* * QEMU GRLIB APB UART Emulator * - * Copyright (c) 2010-2011 AdaCore + * Copyright (c) 2010-2019 AdaCore * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,6 +23,7 @@ */ #include "qemu/osdep.h" +#include "hw/sparc/grlib.h" #include "hw/sysbus.h" #include "chardev/char-fe.h" @@ -68,7 +69,6 @@ #define FIFO_LENGTH 1024 -#define TYPE_GRLIB_APB_UART "grlib,apbuart" #define GRLIB_APB_UART(obj) \ OBJECT_CHECK(UART, (obj), TYPE_GRLIB_APB_UART) diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c new file mode 100644 index 0000000000..63dcbaa984 --- /dev/null +++ b/hw/char/serial-pci-multi.c @@ -0,0 +1,208 @@ +/* + * QEMU 16550A multi UART emulation + * + * SPDX-License-Identifier: MIT + * + * Copyright (c) 2003-2004 Fabrice Bellard + * Copyright (c) 2008 Citrix Systems, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +/* see docs/specs/pci-serial.txt */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/char/serial.h" +#include "hw/pci/pci.h" + +#define PCI_SERIAL_MAX_PORTS 4 + +typedef struct PCIMultiSerialState { + PCIDevice dev; + MemoryRegion iobar; + uint32_t ports; + char *name[PCI_SERIAL_MAX_PORTS]; + SerialState state[PCI_SERIAL_MAX_PORTS]; + uint32_t level[PCI_SERIAL_MAX_PORTS]; + qemu_irq *irqs; + uint8_t prog_if; +} PCIMultiSerialState; + +static void multi_serial_pci_exit(PCIDevice *dev) +{ + PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev); + SerialState *s; + int i; + + for (i = 0; i < pci->ports; i++) { + s = pci->state + i; + serial_exit_core(s); + memory_region_del_subregion(&pci->iobar, &s->io); + g_free(pci->name[i]); + } + qemu_free_irqs(pci->irqs, pci->ports); +} + +static void multi_serial_irq_mux(void *opaque, int n, int level) +{ + PCIMultiSerialState *pci = opaque; + int i, pending = 0; + + pci->level[n] = level; + for (i = 0; i < pci->ports; i++) { + if (pci->level[i]) { + pending = 1; + } + } + pci_set_irq(&pci->dev, pending); +} + +static void multi_serial_pci_realize(PCIDevice *dev, Error **errp) +{ + PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); + PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev); + SerialState *s; + Error *err = NULL; + int i, nr_ports = 0; + + switch (pc->device_id) { + case 0x0003: + nr_ports = 2; + break; + case 0x0004: + nr_ports = 4; + break; + } + assert(nr_ports > 0); + assert(nr_ports <= PCI_SERIAL_MAX_PORTS); + + pci->dev.config[PCI_CLASS_PROG] = pci->prog_if; + pci->dev.config[PCI_INTERRUPT_PIN] = 0x01; + memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * nr_ports); + pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar); + pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, + nr_ports); + + for (i = 0; i < nr_ports; i++) { + s = pci->state + i; + s->baudbase = 115200; + serial_realize_core(s, &err); + if (err != NULL) { + error_propagate(errp, err); + multi_serial_pci_exit(dev); + return; + } + s->irq = pci->irqs[i]; + pci->name[i] = g_strdup_printf("uart #%d", i + 1); + memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, + pci->name[i], 8); + memory_region_add_subregion(&pci->iobar, 8 * i, &s->io); + pci->ports++; + } +} + +static const VMStateDescription vmstate_pci_multi_serial = { + .name = "pci-serial-multi", + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_PCI_DEVICE(dev, PCIMultiSerialState), + VMSTATE_STRUCT_ARRAY(state, PCIMultiSerialState, PCI_SERIAL_MAX_PORTS, + 0, vmstate_serial, SerialState), + VMSTATE_UINT32_ARRAY(level, PCIMultiSerialState, PCI_SERIAL_MAX_PORTS), + VMSTATE_END_OF_LIST() + } +}; + +static Property multi_2x_serial_pci_properties[] = { + DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr), + DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr), + DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02), + DEFINE_PROP_END_OF_LIST(), +}; + +static Property multi_4x_serial_pci_properties[] = { + DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr), + DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr), + DEFINE_PROP_CHR("chardev3", PCIMultiSerialState, state[2].chr), + DEFINE_PROP_CHR("chardev4", PCIMultiSerialState, state[3].chr), + DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02), + DEFINE_PROP_END_OF_LIST(), +}; + +static void multi_2x_serial_pci_class_initfn(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass); + pc->realize = multi_serial_pci_realize; + pc->exit = multi_serial_pci_exit; + pc->vendor_id = PCI_VENDOR_ID_REDHAT; + pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL2; + pc->revision = 1; + pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL; + dc->vmsd = &vmstate_pci_multi_serial; + dc->props = multi_2x_serial_pci_properties; + set_bit(DEVICE_CATEGORY_INPUT, dc->categories); +} + +static void multi_4x_serial_pci_class_initfn(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass); + pc->realize = multi_serial_pci_realize; + pc->exit = multi_serial_pci_exit; + pc->vendor_id = PCI_VENDOR_ID_REDHAT; + pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL4; + pc->revision = 1; + pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL; + dc->vmsd = &vmstate_pci_multi_serial; + dc->props = multi_4x_serial_pci_properties; + set_bit(DEVICE_CATEGORY_INPUT, dc->categories); +} + +static const TypeInfo multi_2x_serial_pci_info = { + .name = "pci-serial-2x", + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(PCIMultiSerialState), + .class_init = multi_2x_serial_pci_class_initfn, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, +}; + +static const TypeInfo multi_4x_serial_pci_info = { + .name = "pci-serial-4x", + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(PCIMultiSerialState), + .class_init = multi_4x_serial_pci_class_initfn, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, +}; + +static void multi_serial_pci_register_types(void) +{ + type_register_static(&multi_2x_serial_pci_info); + type_register_static(&multi_4x_serial_pci_info); +} + +type_init(multi_serial_pci_register_types) diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index cb0d04c1d9..2d5ffae5cf 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -30,26 +30,12 @@ #include "hw/char/serial.h" #include "hw/pci/pci.h" -#define PCI_SERIAL_MAX_PORTS 4 - typedef struct PCISerialState { PCIDevice dev; SerialState state; uint8_t prog_if; } PCISerialState; -typedef struct PCIMultiSerialState { - PCIDevice dev; - MemoryRegion iobar; - uint32_t ports; - char *name[PCI_SERIAL_MAX_PORTS]; - SerialState state[PCI_SERIAL_MAX_PORTS]; - uint32_t level[PCI_SERIAL_MAX_PORTS]; - qemu_irq *irqs; - uint8_t prog_if; -} PCIMultiSerialState; - -static void multi_serial_pci_exit(PCIDevice *dev); static void serial_pci_realize(PCIDevice *dev, Error **errp) { @@ -72,64 +58,6 @@ static void serial_pci_realize(PCIDevice *dev, Error **errp) pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io); } -static void multi_serial_irq_mux(void *opaque, int n, int level) -{ - PCIMultiSerialState *pci = opaque; - int i, pending = 0; - - pci->level[n] = level; - for (i = 0; i < pci->ports; i++) { - if (pci->level[i]) { - pending = 1; - } - } - pci_set_irq(&pci->dev, pending); -} - -static void multi_serial_pci_realize(PCIDevice *dev, Error **errp) -{ - PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); - PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev); - SerialState *s; - Error *err = NULL; - int i, nr_ports = 0; - - switch (pc->device_id) { - case 0x0003: - nr_ports = 2; - break; - case 0x0004: - nr_ports = 4; - break; - } - assert(nr_ports > 0); - assert(nr_ports <= PCI_SERIAL_MAX_PORTS); - - pci->dev.config[PCI_CLASS_PROG] = pci->prog_if; - pci->dev.config[PCI_INTERRUPT_PIN] = 0x01; - memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * nr_ports); - pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar); - pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, - nr_ports); - - for (i = 0; i < nr_ports; i++) { - s = pci->state + i; - s->baudbase = 115200; - serial_realize_core(s, &err); - if (err != NULL) { - error_propagate(errp, err); - multi_serial_pci_exit(dev); - return; - } - s->irq = pci->irqs[i]; - pci->name[i] = g_strdup_printf("uart #%d", i+1); - memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, - pci->name[i], 8); - memory_region_add_subregion(&pci->iobar, 8 * i, &s->io); - pci->ports++; - } -} - static void serial_pci_exit(PCIDevice *dev) { PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev); @@ -139,21 +67,6 @@ static void serial_pci_exit(PCIDevice *dev) qemu_free_irq(s->irq); } -static void multi_serial_pci_exit(PCIDevice *dev) -{ - PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev); - SerialState *s; - int i; - - for (i = 0; i < pci->ports; i++) { - s = pci->state + i; - serial_exit_core(s); - memory_region_del_subregion(&pci->iobar, &s->io); - g_free(pci->name[i]); - } - qemu_free_irqs(pci->irqs, pci->ports); -} - static const VMStateDescription vmstate_pci_serial = { .name = "pci-serial", .version_id = 1, @@ -165,41 +78,12 @@ static const VMStateDescription vmstate_pci_serial = { } }; -static const VMStateDescription vmstate_pci_multi_serial = { - .name = "pci-serial-multi", - .version_id = 1, - .minimum_version_id = 1, - .fields = (VMStateField[]) { - VMSTATE_PCI_DEVICE(dev, PCIMultiSerialState), - VMSTATE_STRUCT_ARRAY(state, PCIMultiSerialState, PCI_SERIAL_MAX_PORTS, - 0, vmstate_serial, SerialState), - VMSTATE_UINT32_ARRAY(level, PCIMultiSerialState, PCI_SERIAL_MAX_PORTS), - VMSTATE_END_OF_LIST() - } -}; - static Property serial_pci_properties[] = { DEFINE_PROP_CHR("chardev", PCISerialState, state.chr), DEFINE_PROP_UINT8("prog_if", PCISerialState, prog_if, 0x02), DEFINE_PROP_END_OF_LIST(), }; -static Property multi_2x_serial_pci_properties[] = { - DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr), - DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr), - DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02), - DEFINE_PROP_END_OF_LIST(), -}; - -static Property multi_4x_serial_pci_properties[] = { - DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr), - DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr), - DEFINE_PROP_CHR("chardev3", PCIMultiSerialState, state[2].chr), - DEFINE_PROP_CHR("chardev4", PCIMultiSerialState, state[3].chr), - DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02), - DEFINE_PROP_END_OF_LIST(), -}; - static void serial_pci_class_initfn(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -215,36 +99,6 @@ static void serial_pci_class_initfn(ObjectClass *klass, void *data) set_bit(DEVICE_CATEGORY_INPUT, dc->categories); } -static void multi_2x_serial_pci_class_initfn(ObjectClass *klass, void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass); - pc->realize = multi_serial_pci_realize; - pc->exit = multi_serial_pci_exit; - pc->vendor_id = PCI_VENDOR_ID_REDHAT; - pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL2; - pc->revision = 1; - pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL; - dc->vmsd = &vmstate_pci_multi_serial; - dc->props = multi_2x_serial_pci_properties; - set_bit(DEVICE_CATEGORY_INPUT, dc->categories); -} - -static void multi_4x_serial_pci_class_initfn(ObjectClass *klass, void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass); - pc->realize = multi_serial_pci_realize; - pc->exit = multi_serial_pci_exit; - pc->vendor_id = PCI_VENDOR_ID_REDHAT; - pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL4; - pc->revision = 1; - pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL; - dc->vmsd = &vmstate_pci_multi_serial; - dc->props = multi_4x_serial_pci_properties; - set_bit(DEVICE_CATEGORY_INPUT, dc->categories); -} - static const TypeInfo serial_pci_info = { .name = "pci-serial", .parent = TYPE_PCI_DEVICE, @@ -256,33 +110,9 @@ static const TypeInfo serial_pci_info = { }, }; -static const TypeInfo multi_2x_serial_pci_info = { - .name = "pci-serial-2x", - .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(PCIMultiSerialState), - .class_init = multi_2x_serial_pci_class_initfn, - .interfaces = (InterfaceInfo[]) { - { INTERFACE_CONVENTIONAL_PCI_DEVICE }, - { }, - }, -}; - -static const TypeInfo multi_4x_serial_pci_info = { - .name = "pci-serial-4x", - .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(PCIMultiSerialState), - .class_init = multi_4x_serial_pci_class_initfn, - .interfaces = (InterfaceInfo[]) { - { INTERFACE_CONVENTIONAL_PCI_DEVICE }, - { }, - }, -}; - static void serial_pci_register_types(void) { type_register_static(&serial_pci_info); - type_register_static(&multi_2x_serial_pci_info); - type_register_static(&multi_4x_serial_pci_info); } type_init(serial_pci_register_types) diff --git a/hw/core/loader.c b/hw/core/loader.c index fe5cb24122..a097bbe30a 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -1025,6 +1025,7 @@ MemoryRegion *rom_add_blob(const char *name, const void *blob, size_t len, rom->addr = addr; rom->romsize = max_len ? max_len : len; rom->datasize = len; + g_assert(rom->romsize >= rom->datasize); rom->data = g_malloc0(rom->datasize); memcpy(rom->data, blob, len); rom_insert(rom); diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 416da318ae..b4ec14e349 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -35,6 +35,7 @@ #include "hw/acpi/acpi-defs.h" #include "hw/acpi/acpi.h" #include "hw/acpi/cpu.h" +#include "hw/acpi/piix4.h" #include "hw/nvram/fw_cfg.h" #include "hw/acpi/bios-linker-loader.h" #include "hw/loader.h" @@ -164,16 +165,28 @@ static void init_common_fadt_data(Object *o, AcpiFadtData *data) *data = fadt; } +static Object *object_resolve_type_unambiguous(const char *typename) +{ + bool ambig; + Object *o = object_resolve_path_type("", typename, &ambig); + + if (ambig || !o) { + return NULL; + } + return o; +} + static void acpi_get_pm_info(AcpiPmInfo *pm) { - Object *piix = piix4_pm_find(); - Object *lpc = ich9_lpc_find(); + Object *piix = object_resolve_type_unambiguous(TYPE_PIIX4_PM); + Object *lpc = object_resolve_type_unambiguous(TYPE_ICH9_LPC_DEVICE); Object *obj = piix ? piix : lpc; QObject *o; pm->cpu_hp_io_base = 0; pm->pcihp_io_base = 0; pm->pcihp_io_len = 0; + assert(obj); init_common_fadt_data(obj, &pm->fadt); if (piix) { /* w2k requires FADT(rev1) or it won't boot, keep PC compatible */ @@ -192,7 +205,6 @@ static void acpi_get_pm_info(AcpiPmInfo *pm) pm->fadt.flags |= 1 << ACPI_FADT_F_RESET_REG_SUP; pm->cpu_hp_io_base = ICH9_CPU_HOTPLUG_IO_BASE; } - assert(obj); /* The above need not be conditional on machine type because the reset port * happens to be the same on PIIX (pc) and ICH9 (q35). */ @@ -228,8 +240,8 @@ static void acpi_get_pm_info(AcpiPmInfo *pm) static void acpi_get_misc_info(AcpiMiscInfo *info) { - Object *piix = piix4_pm_find(); - Object *lpc = ich9_lpc_find(); + Object *piix = object_resolve_type_unambiguous(TYPE_PIIX4_PM); + Object *lpc = object_resolve_type_unambiguous(TYPE_ICH9_LPC_DEVICE); assert(!!piix != !!lpc); if (piix) { diff --git a/hw/input/Kconfig b/hw/input/Kconfig index 889363d8ae..287f08887b 100644 --- a/hw/input/Kconfig +++ b/hw/input/Kconfig @@ -8,10 +8,15 @@ config LM832X config PCKBD bool default y + select PS2 depends on ISA_BUS config PL050 bool + select PS2 + +config PS2 + bool config STELLARIS_INPUT bool diff --git a/hw/input/Makefile.objs b/hw/input/Makefile.objs index d1de307708..a1bc502ed0 100644 --- a/hw/input/Makefile.objs +++ b/hw/input/Makefile.objs @@ -3,7 +3,7 @@ common-obj-y += hid.o common-obj-$(CONFIG_LM832X) += lm832x.o common-obj-$(CONFIG_PCKBD) += pckbd.o common-obj-$(CONFIG_PL050) += pl050.o -common-obj-y += ps2.o +common-obj-$(CONFIG_PS2) += ps2.o common-obj-$(CONFIG_STELLARIS_INPUT) += stellaris_input.o common-obj-$(CONFIG_TSC2005) += tsc2005.o diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index d6f9cb3692..20accb6c4d 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc/grlib_irqmp.c @@ -3,7 +3,7 @@ * * (Multiprocessor and extended interrupt not supported) * - * Copyright (c) 2010-2011 AdaCore + * Copyright (c) 2010-2019 AdaCore * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -47,7 +47,6 @@ #define FORCE_OFFSET 0x80 #define EXTENDED_OFFSET 0xC0 -#define TYPE_GRLIB_IRQMP "grlib,irqmp" #define GRLIB_IRQMP(obj) OBJECT_CHECK(IRQMP, (obj), TYPE_GRLIB_IRQMP) typedef struct IRQMPState IRQMPState; diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c index 9d75f84d3b..7074489fdf 100644 --- a/hw/intc/ioapic.c +++ b/hw/intc/ioapic.c @@ -139,6 +139,15 @@ static void ioapic_service(IOAPICCommonState *s) } } +#define SUCCESSIVE_IRQ_MAX_COUNT 10000 + +static void delayed_ioapic_service_cb(void *opaque) +{ + IOAPICCommonState *s = opaque; + + ioapic_service(s); +} + static void ioapic_set_irq(void *opaque, int vector, int level) { IOAPICCommonState *s = opaque; @@ -222,13 +231,39 @@ void ioapic_eoi_broadcast(int vector) } for (n = 0; n < IOAPIC_NUM_PINS; n++) { entry = s->ioredtbl[n]; - if ((entry & IOAPIC_LVT_REMOTE_IRR) - && (entry & IOAPIC_VECTOR_MASK) == vector) { - trace_ioapic_clear_remote_irr(n, vector); - s->ioredtbl[n] = entry & ~IOAPIC_LVT_REMOTE_IRR; - if (!(entry & IOAPIC_LVT_MASKED) && (s->irr & (1 << n))) { + + if ((entry & IOAPIC_VECTOR_MASK) != vector || + ((entry >> IOAPIC_LVT_TRIGGER_MODE_SHIFT) & 1) != IOAPIC_TRIGGER_LEVEL) { + continue; + } + + if (!(entry & IOAPIC_LVT_REMOTE_IRR)) { + continue; + } + + trace_ioapic_clear_remote_irr(n, vector); + s->ioredtbl[n] = entry & ~IOAPIC_LVT_REMOTE_IRR; + + if (!(entry & IOAPIC_LVT_MASKED) && (s->irr & (1 << n))) { + ++s->irq_eoi[vector]; + if (s->irq_eoi[vector] >= SUCCESSIVE_IRQ_MAX_COUNT) { + /* + * Real hardware does not deliver the interrupt immediately + * during eoi broadcast, and this lets a buggy guest make + * slow progress even if it does not correctly handle a + * level-triggered interrupt. Emulate this behavior if we + * detect an interrupt storm. + */ + s->irq_eoi[vector] = 0; + timer_mod_anticipate(s->delayed_ioapic_service_timer, + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + + NANOSECONDS_PER_SECOND / 100); + trace_ioapic_eoi_delayed_reassert(vector); + } else { ioapic_service(s); } + } else { + s->irq_eoi[vector] = 0; } } } @@ -401,6 +436,9 @@ static void ioapic_realize(DeviceState *dev, Error **errp) memory_region_init_io(&s->io_memory, OBJECT(s), &ioapic_io_ops, s, "ioapic", 0x1000); + s->delayed_ioapic_service_timer = + timer_new_ns(QEMU_CLOCK_VIRTUAL, delayed_ioapic_service_cb, s); + qdev_init_gpio_in(dev, ioapic_set_irq, IOAPIC_NUM_PINS); ioapics[ioapic_no] = s; @@ -408,6 +446,14 @@ static void ioapic_realize(DeviceState *dev, Error **errp) qemu_add_machine_init_done_notifier(&s->machine_done); } +static void ioapic_unrealize(DeviceState *dev, Error **errp) +{ + IOAPICCommonState *s = IOAPIC_COMMON(dev); + + timer_del(s->delayed_ioapic_service_timer); + timer_free(s->delayed_ioapic_service_timer); +} + static Property ioapic_properties[] = { DEFINE_PROP_UINT8("version", IOAPICCommonState, version, IOAPIC_VER_DEF), DEFINE_PROP_END_OF_LIST(), @@ -419,6 +465,7 @@ static void ioapic_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); k->realize = ioapic_realize; + k->unrealize = ioapic_unrealize; /* * If APIC is in kernel, we need to update the kernel cache after * migration, otherwise first 24 gsi routes will be invalid. diff --git a/hw/intc/trace-events b/hw/intc/trace-events index a28bdce925..90c9d07c1a 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -25,6 +25,7 @@ apic_mem_writel(uint64_t addr, uint32_t val) "0x%"PRIx64" = 0x%08x" ioapic_set_remote_irr(int n) "set remote irr for pin %d" ioapic_clear_remote_irr(int n, int vector) "clear remote irr for pin %d vector %d" ioapic_eoi_broadcast(int vector) "EOI broadcast for vector %d" +ioapic_eoi_delayed_reassert(int vector) "delayed reassert on EOI broadcast for vector %d" ioapic_mem_read(uint8_t addr, uint8_t regsel, uint8_t size, uint32_t val) "ioapic mem read addr 0x%"PRIx8" regsel: 0x%"PRIx8" size 0x%"PRIx8" retval 0x%"PRIx32 ioapic_mem_write(uint8_t addr, uint8_t regsel, uint8_t size, uint32_t val) "ioapic mem write addr 0x%"PRIx8" regsel: 0x%"PRIx8" size 0x%"PRIx8" val 0x%"PRIx32 ioapic_set_irq(int vector, int level) "vector: %d level: %d" diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index ac44aa53be..031ee9cd93 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -624,17 +624,6 @@ static const MemoryRegionOps ich9_rst_cnt_ops = { .endianness = DEVICE_LITTLE_ENDIAN }; -Object *ich9_lpc_find(void) -{ - bool ambig; - Object *o = object_resolve_path_type("", TYPE_ICH9_LPC_DEVICE, &ambig); - - if (ambig) { - return NULL; - } - return o; -} - static void ich9_lpc_get_sci_int(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index 9d7480ed31..05a5a823a1 100644 --- a/hw/mips/mips_fulong2e.c +++ b/hw/mips/mips_fulong2e.c @@ -349,10 +349,12 @@ static void mips_fulong2e_init(MachineState *machine) &smbus, &isa_bus); /* GPU */ - dev = DEVICE(pci_create(pci_bus, -1, "ati-vga")); - qdev_prop_set_uint32(dev, "vgamem_mb", 16); - qdev_prop_set_uint16(dev, "x-device-id", 0x5159); - qdev_init_nofail(dev); + if (vga_interface_type != VGA_NONE) { + dev = DEVICE(pci_create(pci_bus, -1, "ati-vga")); + qdev_prop_set_uint32(dev, "vgamem_mb", 16); + qdev_prop_set_uint16(dev, "x-device-id", 0x5159); + qdev_init_nofail(dev); + } /* Populate SPD eeprom data */ spd_data = spd_data_generate(DDR, ram_size, &err); diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index c71e07ae35..77b9df9796 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -77,3 +77,5 @@ obj-$(CONFIG_AUX) += auxbus.o obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o obj-$(CONFIG_MSF2) += msf2-sysreg.o obj-$(CONFIG_NRF51_SOC) += nrf51_rng.o + +obj-$(CONFIG_GRLIB) += grlib_ahb_apb_pnp.o diff --git a/hw/misc/grlib_ahb_apb_pnp.c b/hw/misc/grlib_ahb_apb_pnp.c new file mode 100644 index 0000000000..7338461694 --- /dev/null +++ b/hw/misc/grlib_ahb_apb_pnp.c @@ -0,0 +1,269 @@ +/* + * GRLIB AHB APB PNP + * + * Copyright (C) 2019 AdaCore + * + * Developed by : + * Frederic Konrad <frederic.konrad@adacore.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, see <http://www.gnu.org/licenses/>. + * + */ + +#include "qemu/osdep.h" +#include "hw/sysbus.h" +#include "hw/misc/grlib_ahb_apb_pnp.h" + +#define GRLIB_PNP_VENDOR_SHIFT (24) +#define GRLIB_PNP_VENDOR_SIZE (8) +#define GRLIB_PNP_DEV_SHIFT (12) +#define GRLIB_PNP_DEV_SIZE (12) +#define GRLIB_PNP_VER_SHIFT (5) +#define GRLIB_PNP_VER_SIZE (5) +#define GRLIB_PNP_IRQ_SHIFT (0) +#define GRLIB_PNP_IRQ_SIZE (5) +#define GRLIB_PNP_ADDR_SHIFT (20) +#define GRLIB_PNP_ADDR_SIZE (12) +#define GRLIB_PNP_MASK_SHIFT (4) +#define GRLIB_PNP_MASK_SIZE (12) + +#define GRLIB_AHB_DEV_ADDR_SHIFT (20) +#define GRLIB_AHB_DEV_ADDR_SIZE (12) +#define GRLIB_AHB_ENTRY_SIZE (0x20) +#define GRLIB_AHB_MAX_DEV (64) +#define GRLIB_AHB_SLAVE_OFFSET (0x800) + +#define GRLIB_APB_DEV_ADDR_SHIFT (8) +#define GRLIB_APB_DEV_ADDR_SIZE (12) +#define GRLIB_APB_ENTRY_SIZE (0x08) +#define GRLIB_APB_MAX_DEV (512) + +#define GRLIB_PNP_MAX_REGS (0x1000) + +typedef struct AHBPnp { + SysBusDevice parent_obj; + MemoryRegion iomem; + + uint32_t regs[GRLIB_PNP_MAX_REGS >> 2]; + uint8_t master_count; + uint8_t slave_count; +} AHBPnp; + +void grlib_ahb_pnp_add_entry(AHBPnp *dev, uint32_t address, uint32_t mask, + uint8_t vendor, uint16_t device, int slave, + int type) +{ + unsigned int reg_start; + + /* + * AHB entries look like this: + * + * 31 -------- 23 -------- 11 ----- 9 -------- 4 --- 0 + * | VENDOR ID | DEVICE ID | IRQ ? | VERSION | IRQ | + * -------------------------------------------------- + * | USER | + * -------------------------------------------------- + * | USER | + * -------------------------------------------------- + * | USER | + * -------------------------------------------------- + * | USER | + * -------------------------------------------------- + * 31 ----------- 20 --- 15 ----------------- 3 ---- 0 + * | ADDR[31..12] | 00PC | MASK | TYPE | + * -------------------------------------------------- + * 31 ----------- 20 --- 15 ----------------- 3 ---- 0 + * | ADDR[31..12] | 00PC | MASK | TYPE | + * -------------------------------------------------- + * 31 ----------- 20 --- 15 ----------------- 3 ---- 0 + * | ADDR[31..12] | 00PC | MASK | TYPE | + * -------------------------------------------------- + * 31 ----------- 20 --- 15 ----------------- 3 ---- 0 + * | ADDR[31..12] | 00PC | MASK | TYPE | + * -------------------------------------------------- + */ + + if (slave) { + assert(dev->slave_count < GRLIB_AHB_MAX_DEV); + reg_start = (GRLIB_AHB_SLAVE_OFFSET + + (dev->slave_count * GRLIB_AHB_ENTRY_SIZE)) >> 2; + dev->slave_count++; + } else { + assert(dev->master_count < GRLIB_AHB_MAX_DEV); + reg_start = (dev->master_count * GRLIB_AHB_ENTRY_SIZE) >> 2; + dev->master_count++; + } + + dev->regs[reg_start] = deposit32(dev->regs[reg_start], + GRLIB_PNP_VENDOR_SHIFT, + GRLIB_PNP_VENDOR_SIZE, + vendor); + dev->regs[reg_start] = deposit32(dev->regs[reg_start], + GRLIB_PNP_DEV_SHIFT, + GRLIB_PNP_DEV_SIZE, + device); + reg_start += 4; + /* AHB Memory Space */ + dev->regs[reg_start] = type; + dev->regs[reg_start] = deposit32(dev->regs[reg_start], + GRLIB_PNP_ADDR_SHIFT, + GRLIB_PNP_ADDR_SIZE, + extract32(address, + GRLIB_AHB_DEV_ADDR_SHIFT, + GRLIB_AHB_DEV_ADDR_SIZE)); + dev->regs[reg_start] = deposit32(dev->regs[reg_start], + GRLIB_PNP_MASK_SHIFT, + GRLIB_PNP_MASK_SIZE, + mask); +} + +static uint64_t grlib_ahb_pnp_read(void *opaque, hwaddr offset, unsigned size) +{ + AHBPnp *ahb_pnp = GRLIB_AHB_PNP(opaque); + + return ahb_pnp->regs[offset >> 2]; +} + +static const MemoryRegionOps grlib_ahb_pnp_ops = { + .read = grlib_ahb_pnp_read, + .endianness = DEVICE_BIG_ENDIAN, +}; + +static void grlib_ahb_pnp_realize(DeviceState *dev, Error **errp) +{ + AHBPnp *ahb_pnp = GRLIB_AHB_PNP(dev); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + + memory_region_init_io(&ahb_pnp->iomem, OBJECT(dev), &grlib_ahb_pnp_ops, + ahb_pnp, TYPE_GRLIB_AHB_PNP, GRLIB_PNP_MAX_REGS); + sysbus_init_mmio(sbd, &ahb_pnp->iomem); +} + +static void grlib_ahb_pnp_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->realize = grlib_ahb_pnp_realize; +} + +static const TypeInfo grlib_ahb_pnp_info = { + .name = TYPE_GRLIB_AHB_PNP, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(AHBPnp), + .class_init = grlib_ahb_pnp_class_init, +}; + +/* APBPnp */ + +typedef struct APBPnp { + SysBusDevice parent_obj; + MemoryRegion iomem; + + uint32_t regs[GRLIB_PNP_MAX_REGS >> 2]; + uint32_t entry_count; +} APBPnp; + +void grlib_apb_pnp_add_entry(APBPnp *dev, uint32_t address, uint32_t mask, + uint8_t vendor, uint16_t device, uint8_t version, + uint8_t irq, int type) +{ + unsigned int reg_start; + + /* + * APB entries look like this: + * + * 31 -------- 23 -------- 11 ----- 9 ------- 4 --- 0 + * | VENDOR ID | DEVICE ID | IRQ ? | VERSION | IRQ | + * + * 31 ---------- 20 --- 15 ----------------- 3 ---- 0 + * | ADDR[20..8] | 0000 | MASK | TYPE | + */ + + assert(dev->entry_count < GRLIB_APB_MAX_DEV); + reg_start = (dev->entry_count * GRLIB_APB_ENTRY_SIZE) >> 2; + dev->entry_count++; + + dev->regs[reg_start] = deposit32(dev->regs[reg_start], + GRLIB_PNP_VENDOR_SHIFT, + GRLIB_PNP_VENDOR_SIZE, + vendor); + dev->regs[reg_start] = deposit32(dev->regs[reg_start], + GRLIB_PNP_DEV_SHIFT, + GRLIB_PNP_DEV_SIZE, + device); + dev->regs[reg_start] = deposit32(dev->regs[reg_start], + GRLIB_PNP_VER_SHIFT, + GRLIB_PNP_VER_SIZE, + version); + dev->regs[reg_start] = deposit32(dev->regs[reg_start], + GRLIB_PNP_IRQ_SHIFT, + GRLIB_PNP_IRQ_SIZE, + irq); + reg_start += 1; + dev->regs[reg_start] = type; + dev->regs[reg_start] = deposit32(dev->regs[reg_start], + GRLIB_PNP_ADDR_SHIFT, + GRLIB_PNP_ADDR_SIZE, + extract32(address, + GRLIB_APB_DEV_ADDR_SHIFT, + GRLIB_APB_DEV_ADDR_SIZE)); + dev->regs[reg_start] = deposit32(dev->regs[reg_start], + GRLIB_PNP_MASK_SHIFT, + GRLIB_PNP_MASK_SIZE, + mask); +} + +static uint64_t grlib_apb_pnp_read(void *opaque, hwaddr offset, unsigned size) +{ + APBPnp *apb_pnp = GRLIB_APB_PNP(opaque); + + return apb_pnp->regs[offset >> 2]; +} + +static const MemoryRegionOps grlib_apb_pnp_ops = { + .read = grlib_apb_pnp_read, + .endianness = DEVICE_BIG_ENDIAN, +}; + +static void grlib_apb_pnp_realize(DeviceState *dev, Error **errp) +{ + APBPnp *apb_pnp = GRLIB_APB_PNP(dev); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + + memory_region_init_io(&apb_pnp->iomem, OBJECT(dev), &grlib_apb_pnp_ops, + apb_pnp, TYPE_GRLIB_APB_PNP, GRLIB_PNP_MAX_REGS); + sysbus_init_mmio(sbd, &apb_pnp->iomem); +} + +static void grlib_apb_pnp_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->realize = grlib_apb_pnp_realize; +} + +static const TypeInfo grlib_apb_pnp_info = { + .name = TYPE_GRLIB_APB_PNP, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(APBPnp), + .class_init = grlib_apb_pnp_class_init, +}; + +static void grlib_ahb_apb_pnp_register_types(void) +{ + type_register_static(&grlib_ahb_pnp_info); + type_register_static(&grlib_apb_pnp_info); +} + +type_init(grlib_ahb_apb_pnp_register_types) diff --git a/hw/net/Kconfig b/hw/net/Kconfig index 7d7bbc5d7c..4ef86dc3a5 100644 --- a/hw/net/Kconfig +++ b/hw/net/Kconfig @@ -1,10 +1,14 @@ config DP8393X bool +config NE2000_COMMON + bool + config NE2000_PCI bool default y if PCI_DEVICES depends on PCI + select NE2000_COMMON config EEPRO100_PCI bool @@ -51,8 +55,7 @@ config NE2000_ISA bool default y depends on ISA_BUS - depends on PCI # for NE2000State - select NE2000_PCI + select NE2000_COMMON config OPENCORES_ETH bool diff --git a/hw/net/Makefile.objs b/hw/net/Makefile.objs index ea63715780..9904273b06 100644 --- a/hw/net/Makefile.objs +++ b/hw/net/Makefile.objs @@ -1,8 +1,9 @@ common-obj-$(CONFIG_DP8393X) += dp8393x.o common-obj-$(CONFIG_XEN) += xen_nic.o +common-obj-$(CONFIG_NE2000_COMMON) += ne2000.o # PCI network cards -common-obj-$(CONFIG_NE2000_PCI) += ne2000.o +common-obj-$(CONFIG_NE2000_PCI) += ne2000-pci.o common-obj-$(CONFIG_EEPRO100_PCI) += eepro100.o common-obj-$(CONFIG_PCNET_PCI) += pcnet-pci.o common-obj-$(CONFIG_PCNET_COMMON) += pcnet.o diff --git a/hw/net/e1000.c b/hw/net/e1000.c index 9b39bccfb2..121452d508 100644 --- a/hw/net/e1000.c +++ b/hw/net/e1000.c @@ -901,7 +901,6 @@ e1000_receive_iov(NetClientState *nc, const struct iovec *iov, int iovcnt) if (size < sizeof(min_buf)) { iov_to_buf(iov, iovcnt, 0, min_buf, size); memset(&min_buf[size], 0, sizeof(min_buf) - size); - e1000x_inc_reg_if_not_full(s->mac_reg, RUC); min_iov.iov_base = filter_buf = min_buf; min_iov.iov_len = size = sizeof(min_buf); iovcnt = 1; diff --git a/hw/net/ne2000-pci.c b/hw/net/ne2000-pci.c new file mode 100644 index 0000000000..cb05744f3c --- /dev/null +++ b/hw/net/ne2000-pci.c @@ -0,0 +1,132 @@ +/* + * QEMU NE2000 emulation (PCI bus) + * + * Copyright (c) 2003-2004 Fabrice Bellard + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "qemu/osdep.h" +#include "hw/pci/pci.h" +#include "ne2000.h" +#include "sysemu/sysemu.h" + +typedef struct PCINE2000State { + PCIDevice dev; + NE2000State ne2000; +} PCINE2000State; + +static const VMStateDescription vmstate_pci_ne2000 = { + .name = "ne2000", + .version_id = 3, + .minimum_version_id = 3, + .fields = (VMStateField[]) { + VMSTATE_PCI_DEVICE(dev, PCINE2000State), + VMSTATE_STRUCT(ne2000, PCINE2000State, 0, vmstate_ne2000, NE2000State), + VMSTATE_END_OF_LIST() + } +}; + +static NetClientInfo net_ne2000_info = { + .type = NET_CLIENT_DRIVER_NIC, + .size = sizeof(NICState), + .receive = ne2000_receive, +}; + +static void pci_ne2000_realize(PCIDevice *pci_dev, Error **errp) +{ + PCINE2000State *d = DO_UPCAST(PCINE2000State, dev, pci_dev); + NE2000State *s; + uint8_t *pci_conf; + + pci_conf = d->dev.config; + pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin A */ + + s = &d->ne2000; + ne2000_setup_io(s, DEVICE(pci_dev), 0x100); + pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io); + s->irq = pci_allocate_irq(&d->dev); + + qemu_macaddr_default_if_unset(&s->c.macaddr); + ne2000_reset(s); + + s->nic = qemu_new_nic(&net_ne2000_info, &s->c, + object_get_typename(OBJECT(pci_dev)), + pci_dev->qdev.id, s); + qemu_format_nic_info_str(qemu_get_queue(s->nic), s->c.macaddr.a); +} + +static void pci_ne2000_exit(PCIDevice *pci_dev) +{ + PCINE2000State *d = DO_UPCAST(PCINE2000State, dev, pci_dev); + NE2000State *s = &d->ne2000; + + qemu_del_nic(s->nic); + qemu_free_irq(s->irq); +} + +static void ne2000_instance_init(Object *obj) +{ + PCIDevice *pci_dev = PCI_DEVICE(obj); + PCINE2000State *d = DO_UPCAST(PCINE2000State, dev, pci_dev); + NE2000State *s = &d->ne2000; + + device_add_bootindex_property(obj, &s->c.bootindex, + "bootindex", "/ethernet-phy@0", + &pci_dev->qdev, NULL); +} + +static Property ne2000_properties[] = { + DEFINE_NIC_PROPERTIES(PCINE2000State, ne2000.c), + DEFINE_PROP_END_OF_LIST(), +}; + +static void ne2000_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + + k->realize = pci_ne2000_realize; + k->exit = pci_ne2000_exit; + k->romfile = "efi-ne2k_pci.rom", + k->vendor_id = PCI_VENDOR_ID_REALTEK; + k->device_id = PCI_DEVICE_ID_REALTEK_8029; + k->class_id = PCI_CLASS_NETWORK_ETHERNET; + dc->vmsd = &vmstate_pci_ne2000; + dc->props = ne2000_properties; + set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); +} + +static const TypeInfo ne2000_info = { + .name = "ne2k_pci", + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(PCINE2000State), + .class_init = ne2000_class_init, + .instance_init = ne2000_instance_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, +}; + +static void ne2000_register_types(void) +{ + type_register_static(&ne2000_info); +} + +type_init(ne2000_register_types) diff --git a/hw/net/ne2000.c b/hw/net/ne2000.c index 037afc8052..ca792d96f1 100644 --- a/hw/net/ne2000.c +++ b/hw/net/ne2000.c @@ -22,7 +22,6 @@ * THE SOFTWARE. */ #include "qemu/osdep.h" -#include "hw/pci/pci.h" #include "net/eth.h" #include "ne2000.h" #include "sysemu/sysemu.h" @@ -118,11 +117,6 @@ #define ENTSR_CDH 0x40 /* The collision detect "heartbeat" signal was lost. */ #define ENTSR_OWC 0x80 /* There was an out-of-window collision. */ -typedef struct PCINE2000State { - PCIDevice dev; - NE2000State ne2000; -} PCINE2000State; - void ne2000_reset(NE2000State *s) { int i; @@ -644,17 +638,6 @@ const VMStateDescription vmstate_ne2000 = { } }; -static const VMStateDescription vmstate_pci_ne2000 = { - .name = "ne2000", - .version_id = 3, - .minimum_version_id = 3, - .fields = (VMStateField[]) { - VMSTATE_PCI_DEVICE(dev, PCINE2000State), - VMSTATE_STRUCT(ne2000, PCINE2000State, 0, vmstate_ne2000, NE2000State), - VMSTATE_END_OF_LIST() - } -}; - static uint64_t ne2000_read(void *opaque, hwaddr addr, unsigned size) { @@ -711,91 +694,3 @@ void ne2000_setup_io(NE2000State *s, DeviceState *dev, unsigned size) { memory_region_init_io(&s->io, OBJECT(dev), &ne2000_ops, s, "ne2000", size); } - -static NetClientInfo net_ne2000_info = { - .type = NET_CLIENT_DRIVER_NIC, - .size = sizeof(NICState), - .receive = ne2000_receive, -}; - -static void pci_ne2000_realize(PCIDevice *pci_dev, Error **errp) -{ - PCINE2000State *d = DO_UPCAST(PCINE2000State, dev, pci_dev); - NE2000State *s; - uint8_t *pci_conf; - - pci_conf = d->dev.config; - pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin A */ - - s = &d->ne2000; - ne2000_setup_io(s, DEVICE(pci_dev), 0x100); - pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io); - s->irq = pci_allocate_irq(&d->dev); - - qemu_macaddr_default_if_unset(&s->c.macaddr); - ne2000_reset(s); - - s->nic = qemu_new_nic(&net_ne2000_info, &s->c, - object_get_typename(OBJECT(pci_dev)), pci_dev->qdev.id, s); - qemu_format_nic_info_str(qemu_get_queue(s->nic), s->c.macaddr.a); -} - -static void pci_ne2000_exit(PCIDevice *pci_dev) -{ - PCINE2000State *d = DO_UPCAST(PCINE2000State, dev, pci_dev); - NE2000State *s = &d->ne2000; - - qemu_del_nic(s->nic); - qemu_free_irq(s->irq); -} - -static void ne2000_instance_init(Object *obj) -{ - PCIDevice *pci_dev = PCI_DEVICE(obj); - PCINE2000State *d = DO_UPCAST(PCINE2000State, dev, pci_dev); - NE2000State *s = &d->ne2000; - - device_add_bootindex_property(obj, &s->c.bootindex, - "bootindex", "/ethernet-phy@0", - &pci_dev->qdev, NULL); -} - -static Property ne2000_properties[] = { - DEFINE_NIC_PROPERTIES(PCINE2000State, ne2000.c), - DEFINE_PROP_END_OF_LIST(), -}; - -static void ne2000_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - - k->realize = pci_ne2000_realize; - k->exit = pci_ne2000_exit; - k->romfile = "efi-ne2k_pci.rom", - k->vendor_id = PCI_VENDOR_ID_REALTEK; - k->device_id = PCI_DEVICE_ID_REALTEK_8029; - k->class_id = PCI_CLASS_NETWORK_ETHERNET; - dc->vmsd = &vmstate_pci_ne2000; - dc->props = ne2000_properties; - set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); -} - -static const TypeInfo ne2000_info = { - .name = "ne2k_pci", - .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(PCINE2000State), - .class_init = ne2000_class_init, - .instance_init = ne2000_instance_init, - .interfaces = (InterfaceInfo[]) { - { INTERFACE_CONVENTIONAL_PCI_DEVICE }, - { }, - }, -}; - -static void ne2000_register_types(void) -{ - type_register_static(&ne2000_info); -} - -type_init(ne2000_register_types) diff --git a/hw/net/vhost_net.c b/hw/net/vhost_net.c index be3cc88370..a6b719035c 100644 --- a/hw/net/vhost_net.c +++ b/hw/net/vhost_net.c @@ -244,6 +244,11 @@ static int vhost_net_start_one(struct vhost_net *net, qemu_set_fd_handler(net->backend, NULL, NULL, NULL); file.fd = net->backend; for (file.index = 0; file.index < net->dev.nvqs; ++file.index) { + if (!virtio_queue_enabled(dev, net->dev.vq_index + + file.index)) { + /* Queue might not be ready for start */ + continue; + } r = vhost_net_set_backend(&net->dev, &file); if (r < 0) { r = -errno; @@ -256,6 +261,11 @@ fail: file.fd = -1; if (net->nc->info->type == NET_CLIENT_DRIVER_TAP) { while (file.index-- > 0) { + if (!virtio_queue_enabled(dev, net->dev.vq_index + + file.index)) { + /* Queue might not be ready for start */ + continue; + } int r = vhost_net_set_backend(&net->dev, &file); assert(r >= 0); } diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index a56317e026..5ad762de23 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -477,7 +477,7 @@ static MegasasCmd *megasas_enqueue_frame(MegasasState *s, { PCIDevice *pcid = PCI_DEVICE(s); MegasasCmd *cmd = NULL; - int frame_size = MFI_FRAME_SIZE * 16; + int frame_size = MEGASAS_MAX_SGE * sizeof(union mfi_sgl); hwaddr frame_size_p = frame_size; unsigned long index; diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 0383b17c29..bdead85a93 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -1,7 +1,7 @@ /* * QEMU Leon3 System Emulator * - * Copyright (c) 2010-2011 AdaCore + * Copyright (c) 2010-2019 AdaCore * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -39,20 +39,88 @@ #include "exec/address-spaces.h" #include "hw/sparc/grlib.h" +#include "hw/misc/grlib_ahb_apb_pnp.h" /* Default system clock. */ #define CPU_CLK (40 * 1000 * 1000) -#define PROM_FILENAME "u-boot.bin" +#define LEON3_PROM_FILENAME "u-boot.bin" +#define LEON3_PROM_OFFSET (0x00000000) +#define LEON3_RAM_OFFSET (0x40000000) #define MAX_PILS 16 +#define LEON3_UART_OFFSET (0x80000100) +#define LEON3_UART_IRQ (3) + +#define LEON3_IRQMP_OFFSET (0x80000200) + +#define LEON3_TIMER_OFFSET (0x80000300) +#define LEON3_TIMER_IRQ (6) +#define LEON3_TIMER_COUNT (2) + +#define LEON3_APB_PNP_OFFSET (0x800FF000) +#define LEON3_AHB_PNP_OFFSET (0xFFFFF000) + typedef struct ResetData { SPARCCPU *cpu; uint32_t entry; /* save kernel entry in case of reset */ target_ulong sp; /* initial stack pointer */ } ResetData; +static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val) +{ + stl_p(code++, 0x82100000); /* mov %g0, %g1 */ + stl_p(code++, 0x84100000); /* mov %g0, %g2 */ + stl_p(code++, 0x03000000 + + extract32(addr, 10, 22)); + /* sethi %hi(addr), %g1 */ + stl_p(code++, 0x82106000 + + extract32(addr, 0, 10)); + /* or %g1, addr, %g1 */ + stl_p(code++, 0x05000000 + + extract32(val, 10, 22)); + /* sethi %hi(val), %g2 */ + stl_p(code++, 0x8410a000 + + extract32(val, 0, 10)); + /* or %g2, val, %g2 */ + stl_p(code++, 0xc4204000); /* st %g2, [ %g1 ] */ + + return code; +} + +/* + * When loading a kernel in RAM the machine is expected to be in a different + * state (eg: initialized by the bootloader). This little code reproduces + * this behavior. + */ +static void write_bootloader(CPUSPARCState *env, uint8_t *base, + hwaddr kernel_addr) +{ + uint32_t *p = (uint32_t *) base; + + /* Initialize the UARTs */ + /* *UART_CONTROL = UART_RECEIVE_ENABLE | UART_TRANSMIT_ENABLE; */ + p = gen_store_u32(p, 0x80000108, 3); + + /* Initialize the TIMER 0 */ + /* *GPTIMER_SCALER_RELOAD = 40 - 1; */ + p = gen_store_u32(p, 0x80000304, 39); + /* *GPTIMER0_COUNTER_RELOAD = 0xFFFE; */ + p = gen_store_u32(p, 0x80000314, 0xFFFFFFFE); + /* *GPTIMER0_CONFIG = GPTIMER_ENABLE | GPTIMER_RESTART; */ + p = gen_store_u32(p, 0x80000318, 3); + + /* JUMP to the entry point */ + stl_p(p++, 0x82100000); /* mov %g0, %g1 */ + stl_p(p++, 0x03000000 + extract32(kernel_addr, 10, 22)); + /* sethi %hi(kernel_addr), %g1 */ + stl_p(p++, 0x82106000 + extract32(kernel_addr, 0, 10)); + /* or kernel_addr, %g1 */ + stl_p(p++, 0x81c04000); /* jmp %g1 */ + stl_p(p++, 0x01000000); /* nop */ +} + static void main_cpu_reset(void *opaque) { ResetData *s = (ResetData *)opaque; @@ -121,6 +189,10 @@ static void leon3_generic_hw_init(MachineState *machine) int bios_size; int prom_size; ResetData *reset_info; + DeviceState *dev; + int i; + AHBPnp *ahb_pnp; + APBPnp *apb_pnp; /* Init CPU */ cpu = SPARC_CPU(cpu_create(machine->cpu_type)); @@ -131,13 +203,35 @@ static void leon3_generic_hw_init(MachineState *machine) /* Reset data */ reset_info = g_malloc0(sizeof(ResetData)); reset_info->cpu = cpu; - reset_info->sp = 0x40000000 + ram_size; + reset_info->sp = LEON3_RAM_OFFSET + ram_size; qemu_register_reset(main_cpu_reset, reset_info); - /* Allocate IRQ manager */ - grlib_irqmp_create(0x80000200, env, &cpu_irqs, MAX_PILS, &leon3_set_pil_in); + ahb_pnp = GRLIB_AHB_PNP(object_new(TYPE_GRLIB_AHB_PNP)); + object_property_set_bool(OBJECT(ahb_pnp), true, "realized", &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(ahb_pnp), 0, LEON3_AHB_PNP_OFFSET); + grlib_ahb_pnp_add_entry(ahb_pnp, 0, 0, GRLIB_VENDOR_GAISLER, + GRLIB_LEON3_DEV, GRLIB_AHB_MASTER, + GRLIB_CPU_AREA); + apb_pnp = GRLIB_APB_PNP(object_new(TYPE_GRLIB_APB_PNP)); + object_property_set_bool(OBJECT(apb_pnp), true, "realized", &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(apb_pnp), 0, LEON3_APB_PNP_OFFSET); + grlib_ahb_pnp_add_entry(ahb_pnp, LEON3_APB_PNP_OFFSET, 0xFFF, + GRLIB_VENDOR_GAISLER, GRLIB_APBMST_DEV, + GRLIB_AHB_SLAVE, GRLIB_AHBMEM_AREA); + + /* Allocate IRQ manager */ + dev = qdev_create(NULL, TYPE_GRLIB_IRQMP); + qdev_prop_set_ptr(dev, "set_pil_in", leon3_set_pil_in); + qdev_prop_set_ptr(dev, "set_pil_in_opaque", env); + qdev_init_nofail(dev); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); + env->irq_manager = dev; env->qemu_irq_ack = leon3_irq_manager; + cpu_irqs = qemu_allocate_irqs(grlib_irqmp_set_irq, dev, MAX_PILS); + grlib_apb_pnp_add_entry(apb_pnp, LEON3_IRQMP_OFFSET, 0xFFF, + GRLIB_VENDOR_GAISLER, GRLIB_IRQMP_DEV, + 2, 0, GRLIB_APBIO_AREA); /* Allocate RAM */ if (ram_size > 1 * GiB) { @@ -148,17 +242,17 @@ static void leon3_generic_hw_init(MachineState *machine) } memory_region_allocate_system_memory(ram, NULL, "leon3.ram", ram_size); - memory_region_add_subregion(address_space_mem, 0x40000000, ram); + memory_region_add_subregion(address_space_mem, LEON3_RAM_OFFSET, ram); /* Allocate BIOS */ prom_size = 8 * MiB; memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size, &error_fatal); memory_region_set_readonly(prom, true); - memory_region_add_subregion(address_space_mem, 0x00000000, prom); + memory_region_add_subregion(address_space_mem, LEON3_PROM_OFFSET, prom); /* Load boot prom */ if (bios_name == NULL) { - bios_name = PROM_FILENAME; + bios_name = LEON3_PROM_FILENAME; } filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); @@ -174,13 +268,15 @@ static void leon3_generic_hw_init(MachineState *machine) } if (bios_size > 0) { - ret = load_image_targphys(filename, 0x00000000, bios_size); + ret = load_image_targphys(filename, LEON3_PROM_OFFSET, bios_size); if (ret < 0 || ret > prom_size) { error_report("could not load prom '%s'", filename); exit(1); } } else if (kernel_filename == NULL && !qtest_enabled()) { - error_report("Can't read bios image %s", filename); + error_report("Can't read bios image '%s'", filename + ? filename + : LEON3_PROM_FILENAME); exit(1); } g_free(filename); @@ -202,19 +298,48 @@ static void leon3_generic_hw_init(MachineState *machine) exit(1); } if (bios_size <= 0) { - /* If there is no bios/monitor, start the application. */ - env->pc = entry; - env->npc = entry + 4; - reset_info->entry = entry; + /* + * If there is no bios/monitor just start the application but put + * the machine in an initialized state through a little + * bootloader. + */ + uint8_t *bootloader_entry; + + bootloader_entry = memory_region_get_ram_ptr(prom); + write_bootloader(env, bootloader_entry, entry); + env->pc = LEON3_PROM_OFFSET; + env->npc = LEON3_PROM_OFFSET + 4; + reset_info->entry = LEON3_PROM_OFFSET; } } /* Allocate timers */ - grlib_gptimer_create(0x80000300, 2, CPU_CLK, cpu_irqs, 6); + dev = qdev_create(NULL, TYPE_GRLIB_GPTIMER); + qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT); + qdev_prop_set_uint32(dev, "frequency", CPU_CLK); + qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ); + qdev_init_nofail(dev); + + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET); + for (i = 0; i < LEON3_TIMER_COUNT; i++) { + sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, + cpu_irqs[LEON3_TIMER_IRQ + i]); + } + + grlib_apb_pnp_add_entry(apb_pnp, LEON3_TIMER_OFFSET, 0xFFF, + GRLIB_VENDOR_GAISLER, GRLIB_GPTIMER_DEV, + 0, LEON3_TIMER_IRQ, GRLIB_APBIO_AREA); /* Allocate uart */ if (serial_hd(0)) { - grlib_apbuart_create(0x80000100, serial_hd(0), cpu_irqs[3]); + dev = qdev_create(NULL, TYPE_GRLIB_APB_UART); + qdev_prop_set_chr(dev, "chrdev", serial_hd(0)); + qdev_init_nofail(dev); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irqs[LEON3_UART_IRQ]); + grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF, + GRLIB_VENDOR_GAISLER, GRLIB_APBUART_DEV, 1, + LEON3_UART_IRQ, GRLIB_APBIO_AREA); } } diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index ca1e3825d5..07d126aea8 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -850,7 +850,6 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, uint32_t initrd_size; DriveInfo *fd[MAX_FD]; FWCfgState *fw_cfg; - unsigned int num_vsimms; DeviceState *dev; SysBusDevice *s; @@ -909,8 +908,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, error_report("Unsupported depth: %d", graphic_depth); exit (1); } - num_vsimms = 0; - if (num_vsimms == 0) { + if (vga_interface_type != VGA_NONE) { if (vga_interface_type == VGA_CG3) { if (graphic_depth != 8) { error_report("Unsupported depth: %d", graphic_depth); @@ -945,7 +943,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, } } - for (i = num_vsimms; i < MAX_VSIMMS; i++) { + for (i = 0; i < MAX_VSIMMS; i++) { /* vsimm registers probed by OBP */ if (hwdef->vsimm[i].reg_base) { empty_slot_init(hwdef->vsimm[i].reg_base, 0x2000); diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c index 183eddc073..4b7088fc84 100644 --- a/hw/timer/grlib_gptimer.c +++ b/hw/timer/grlib_gptimer.c @@ -1,7 +1,7 @@ /* * QEMU GRLIB GPTimer Emulator * - * Copyright (c) 2010-2011 AdaCore + * Copyright (c) 2010-2019 AdaCore * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,6 +23,7 @@ */ #include "qemu/osdep.h" +#include "hw/sparc/grlib.h" #include "hw/sysbus.h" #include "qemu/timer.h" #include "hw/ptimer.h" @@ -52,7 +53,6 @@ #define COUNTER_RELOAD_OFFSET 0x04 #define TIMER_BASE 0x10 -#define TYPE_GRLIB_GPTIMER "grlib,gptimer" #define GRLIB_GPTIMER(obj) \ OBJECT_CHECK(GPTimerUnit, (obj), TYPE_GRLIB_GPTIMER) diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index 2626a895cb..28056a7ef7 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -2318,6 +2318,11 @@ hwaddr virtio_queue_get_desc_addr(VirtIODevice *vdev, int n) return vdev->vq[n].vring.desc; } +bool virtio_queue_enabled(VirtIODevice *vdev, int n) +{ + return virtio_queue_get_desc_addr(vdev, n) != 0; +} + hwaddr virtio_queue_get_avail_addr(VirtIODevice *vdev, int n) { return vdev->vq[n].vring.avail; diff --git a/include/hw/acpi/piix4.h b/include/hw/acpi/piix4.h index 26c2370e30..028bb53e3d 100644 --- a/include/hw/acpi/piix4.h +++ b/include/hw/acpi/piix4.h @@ -1,6 +1,6 @@ #ifndef HW_ACPI_PIIX4_H #define HW_ACPI_PIIX4_H -Object *piix4_pm_find(void); +#define TYPE_PIIX4_PM "PIIX4_PM" #endif diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h index 673d13d28f..046bcf33be 100644 --- a/include/hw/i386/ich9.h +++ b/include/hw/i386/ich9.h @@ -81,8 +81,6 @@ typedef struct ICH9LPCState { qemu_irq gsi[GSI_NUM_PINS]; } ICH9LPCState; -Object *ich9_lpc_find(void); - #define Q35_MASK(bit, ms_bit, ls_bit) \ ((uint##bit##_t)(((1ULL << ((ms_bit) + 1)) - 1) & ~((1ULL << ls_bit) - 1))) diff --git a/include/hw/i386/ioapic_internal.h b/include/hw/i386/ioapic_internal.h index 9848f391bb..07002f9662 100644 --- a/include/hw/i386/ioapic_internal.h +++ b/include/hw/i386/ioapic_internal.h @@ -96,6 +96,7 @@ typedef struct IOAPICCommonClass { SysBusDeviceClass parent_class; DeviceRealize realize; + DeviceUnrealize unrealize; void (*pre_save)(IOAPICCommonState *s); void (*post_load)(IOAPICCommonState *s); } IOAPICCommonClass; @@ -111,6 +112,8 @@ struct IOAPICCommonState { uint8_t version; uint64_t irq_count[IOAPIC_NUM_PINS]; int irq_level[IOAPIC_NUM_PINS]; + int irq_eoi[IOAPIC_NUM_PINS]; + QEMUTimer *delayed_ioapic_service_timer; }; void ioapic_reset_common(DeviceState *dev); diff --git a/include/hw/misc/grlib_ahb_apb_pnp.h b/include/hw/misc/grlib_ahb_apb_pnp.h new file mode 100644 index 0000000000..a0f6dcfda7 --- /dev/null +++ b/include/hw/misc/grlib_ahb_apb_pnp.h @@ -0,0 +1,60 @@ +/* + * GRLIB AHB APB PNP + * + * Copyright (C) 2019 AdaCore + * + * Developed by : + * Frederic Konrad <frederic.konrad@adacore.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, see <http://www.gnu.org/licenses/>. + * + */ + +#ifndef GRLIB_AHB_APB_PNP_H +#define GRLIB_AHB_APB_PNP_H + +#define TYPE_GRLIB_AHB_PNP "grlib,ahbpnp" +#define GRLIB_AHB_PNP(obj) \ + OBJECT_CHECK(AHBPnp, (obj), TYPE_GRLIB_AHB_PNP) +typedef struct AHBPnp AHBPnp; + +#define TYPE_GRLIB_APB_PNP "grlib,apbpnp" +#define GRLIB_APB_PNP(obj) \ + OBJECT_CHECK(APBPnp, (obj), TYPE_GRLIB_APB_PNP) +typedef struct APBPnp APBPnp; + +void grlib_ahb_pnp_add_entry(AHBPnp *dev, uint32_t address, uint32_t mask, + uint8_t vendor, uint16_t device, int slave, + int type); +void grlib_apb_pnp_add_entry(APBPnp *dev, uint32_t address, uint32_t mask, + uint8_t vendor, uint16_t device, uint8_t version, + uint8_t irq, int type); + +/* VENDORS */ +#define GRLIB_VENDOR_GAISLER (0x01) +/* DEVICES */ +#define GRLIB_LEON3_DEV (0x03) +#define GRLIB_APBMST_DEV (0x06) +#define GRLIB_APBUART_DEV (0x0C) +#define GRLIB_IRQMP_DEV (0x0D) +#define GRLIB_GPTIMER_DEV (0x11) +/* TYPE */ +#define GRLIB_CPU_AREA (0x00) +#define GRLIB_APBIO_AREA (0x01) +#define GRLIB_AHBMEM_AREA (0x02) + +#define GRLIB_AHB_MASTER (0x00) +#define GRLIB_AHB_SLAVE (0x01) + +#endif /* GRLIB_AHB_APB_PNP_H */ diff --git a/include/hw/sparc/grlib.h b/include/hw/sparc/grlib.h index 61a345c269..5606ff0a97 100644 --- a/include/hw/sparc/grlib.h +++ b/include/hw/sparc/grlib.h @@ -1,7 +1,7 @@ /* * QEMU GRLIB Components * - * Copyright (c) 2010-2011 AdaCore + * Copyright (c) 2010-2019 AdaCore * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -33,6 +33,7 @@ */ /* IRQMP */ +#define TYPE_GRLIB_IRQMP "grlib,irqmp" typedef void (*set_pil_in_fn) (void *opaque, uint32_t pil_in); @@ -40,81 +41,10 @@ void grlib_irqmp_set_irq(void *opaque, int irq, int level); void grlib_irqmp_ack(DeviceState *dev, int intno); -static inline -DeviceState *grlib_irqmp_create(hwaddr base, - CPUSPARCState *env, - qemu_irq **cpu_irqs, - uint32_t nr_irqs, - set_pil_in_fn set_pil_in) -{ - DeviceState *dev; - - assert(cpu_irqs != NULL); - - dev = qdev_create(NULL, "grlib,irqmp"); - qdev_prop_set_ptr(dev, "set_pil_in", set_pil_in); - qdev_prop_set_ptr(dev, "set_pil_in_opaque", env); - - qdev_init_nofail(dev); - - env->irq_manager = dev; - - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); - - *cpu_irqs = qemu_allocate_irqs(grlib_irqmp_set_irq, - dev, - nr_irqs); - - return dev; -} - /* GPTimer */ - -static inline -DeviceState *grlib_gptimer_create(hwaddr base, - uint32_t nr_timers, - uint32_t freq, - qemu_irq *cpu_irqs, - int base_irq) -{ - DeviceState *dev; - int i; - - dev = qdev_create(NULL, "grlib,gptimer"); - qdev_prop_set_uint32(dev, "nr-timers", nr_timers); - qdev_prop_set_uint32(dev, "frequency", freq); - qdev_prop_set_uint32(dev, "irq-line", base_irq); - - qdev_init_nofail(dev); - - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); - - for (i = 0; i < nr_timers; i++) { - sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, cpu_irqs[base_irq + i]); - } - - return dev; -} +#define TYPE_GRLIB_GPTIMER "grlib,gptimer" /* APB UART */ - -static inline -DeviceState *grlib_apbuart_create(hwaddr base, - Chardev *serial, - qemu_irq irq) -{ - DeviceState *dev; - - dev = qdev_create(NULL, "grlib,apbuart"); - qdev_prop_set_chr(dev, "chrdev", serial); - - qdev_init_nofail(dev); - - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); - - sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq); - - return dev; -} +#define TYPE_GRLIB_APB_UART "grlib,apbuart" #endif /* GRLIB_H */ diff --git a/include/hw/virtio/virtio.h b/include/hw/virtio/virtio.h index ce9516236a..7140381e3a 100644 --- a/include/hw/virtio/virtio.h +++ b/include/hw/virtio/virtio.h @@ -282,6 +282,7 @@ typedef struct VirtIORNGConf VirtIORNGConf; VIRTIO_F_IOMMU_PLATFORM, false) hwaddr virtio_queue_get_desc_addr(VirtIODevice *vdev, int n); +bool virtio_queue_enabled(VirtIODevice *vdev, int n); hwaddr virtio_queue_get_avail_addr(VirtIODevice *vdev, int n); hwaddr virtio_queue_get_used_addr(VirtIODevice *vdev, int n); hwaddr virtio_queue_get_desc_size(VirtIODevice *vdev, int n); diff --git a/memory.c b/memory.c index bb2b71ee38..3071c4bdad 100644 --- a/memory.c +++ b/memory.c @@ -2584,7 +2584,7 @@ void memory_global_dirty_log_start(void) MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); - /* Refresh DIRTY_LOG_MIGRATION bit. */ + /* Refresh DIRTY_MEMORY_MIGRATION bit. */ memory_region_transaction_begin(); memory_region_update_pending = true; memory_region_transaction_commit(); @@ -2594,7 +2594,7 @@ static void memory_global_dirty_log_do_stop(void) { global_dirty_log = false; - /* Refresh DIRTY_LOG_MIGRATION bit. */ + /* Refresh DIRTY_MEMORY_MIGRATION bit. */ memory_region_transaction_begin(); memory_region_update_pending = true; memory_region_transaction_commit(); diff --git a/net/colo-compare.c b/net/colo-compare.c index bf10526f05..fcb491121b 100644 --- a/net/colo-compare.c +++ b/net/colo-compare.c @@ -813,9 +813,8 @@ static void colo_compare_handle_event(void *opaque) break; } - assert(event_unhandled_count > 0); - qemu_mutex_lock(&event_mtx); + assert(event_unhandled_count > 0); event_unhandled_count--; qemu_cond_broadcast(&event_complete_cond); qemu_mutex_unlock(&event_mtx); diff --git a/net/slirp.c b/net/slirp.c index 95934fb36d..b34cb29276 100644 --- a/net/slirp.c +++ b/net/slirp.c @@ -498,7 +498,8 @@ static int net_slirp_init(NetClientState *peer, const char *model, } if (vprefix6_len < 0 || vprefix6_len > 126) { error_setg(errp, - "Invalid prefix provided (prefix len must be in range 0-126"); + "Invalid IPv6 prefix provided " + "(IPv6 prefix length must be between 0 and 126)"); return -1; } diff --git a/qemu-deprecated.texi b/qemu-deprecated.texi index 842e71b11d..ab62dd7c1d 100644 --- a/qemu-deprecated.texi +++ b/qemu-deprecated.texi @@ -72,6 +72,11 @@ backend settings instead of environment variables. To ease migration to the new format, the ``-audiodev-help'' option can be used to convert the current values of the environment variables to ``-audiodev'' options. +@subsection -realtime (since 4.1) + +The @code{-realtime mlock=on|off} argument has been replaced by the +@code{-overcommit mem-lock=on|off} argument. + @section QEMU Machine Protocol (QMP) commands @subsection block-dirty-bitmap-add "autoload" parameter (since 2.12.0) diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 42f9447303..2751c8125c 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -708,6 +708,7 @@ int hvf_vcpu_exec(CPUState *cpu) !(idtvec_info & VMCS_IDT_VEC_VALID)) { cpu->halted = 1; ret = EXCP_HLT; + break; } ret = EXCP_INTERRUPT; break; diff --git a/target/s390x/Makefile.objs b/target/s390x/Makefile.objs index 68eeee3d2f..312bf4f6ba 100644 --- a/target/s390x/Makefile.objs +++ b/target/s390x/Makefile.objs @@ -12,7 +12,7 @@ obj-$(call lnot,$(CONFIG_TCG)) += tcg-stub.o feat-src = $(SRC_PATH)/target/$(TARGET_BASE_ARCH)/ feat-dst = $(BUILD_DIR)/$(TARGET_DIR) ifneq ($(MAKECMDGOALS),clean) -GENERATED_FILES += $(feat-dst)gen-features.h +generated-files-y += $(feat-dst)gen-features.h endif $(feat-dst)gen-features.h: $(feat-dst)gen-features.h-timestamp diff --git a/tests/Makefile.include b/tests/Makefile.include index 60de085ee1..1865f6b322 100644 --- a/tests/Makefile.include +++ b/tests/Makefile.include @@ -45,7 +45,7 @@ SYSEMU_TARGET_LIST := $(subst -softmmu.mak,,$(notdir \ check-unit-y += tests/check-qdict$(EXESUF) check-unit-y += tests/check-block-qdict$(EXESUF) -check-unit-y += tests/test-char$(EXESUF) +check-unit-$(CONFIG_SOFTMMU) += tests/test-char$(EXESUF) check-unit-y += tests/check-qnum$(EXESUF) check-unit-y += tests/check-qstring$(EXESUF) check-unit-y += tests/check-qlist$(EXESUF) @@ -61,21 +61,21 @@ check-unit-y += tests/test-string-input-visitor$(EXESUF) check-unit-y += tests/test-string-output-visitor$(EXESUF) check-unit-y += tests/test-qmp-event$(EXESUF) check-unit-y += tests/test-opts-visitor$(EXESUF) -check-unit-y += tests/test-coroutine$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-coroutine$(EXESUF) check-unit-y += tests/test-visitor-serialization$(EXESUF) check-unit-y += tests/test-iov$(EXESUF) -check-unit-y += tests/test-aio$(EXESUF) -check-unit-y += tests/test-aio-multithread$(EXESUF) -check-unit-y += tests/test-throttle$(EXESUF) -check-unit-y += tests/test-thread-pool$(EXESUF) -check-unit-y += tests/test-hbitmap$(EXESUF) -check-unit-y += tests/test-bdrv-drain$(EXESUF) -check-unit-y += tests/test-bdrv-graph-mod$(EXESUF) -check-unit-y += tests/test-blockjob$(EXESUF) -check-unit-y += tests/test-blockjob-txn$(EXESUF) -check-unit-y += tests/test-block-backend$(EXESUF) -check-unit-y += tests/test-block-iothread$(EXESUF) -check-unit-y += tests/test-image-locking$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-aio$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-aio-multithread$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-throttle$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-thread-pool$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-hbitmap$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-bdrv-drain$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-bdrv-graph-mod$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-blockjob$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-blockjob-txn$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-block-backend$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-block-iothread$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-image-locking$(EXESUF) check-unit-y += tests/test-x86-cpuid$(EXESUF) # all code tested by test-x86-cpuid is inside topology.h ifeq ($(CONFIG_SOFTMMU),y) @@ -101,40 +101,40 @@ check-unit-y += tests/check-qom-interface$(EXESUF) check-unit-y += tests/check-qom-proplist$(EXESUF) check-unit-y += tests/test-qemu-opts$(EXESUF) check-unit-y += tests/test-keyval$(EXESUF) -check-unit-y += tests/test-write-threshold$(EXESUF) -check-unit-y += tests/test-crypto-hash$(EXESUF) -check-speed-y += tests/benchmark-crypto-hash$(EXESUF) -check-unit-y += tests/test-crypto-hmac$(EXESUF) -check-speed-y += tests/benchmark-crypto-hmac$(EXESUF) -check-unit-y += tests/test-crypto-cipher$(EXESUF) -check-speed-y += tests/benchmark-crypto-cipher$(EXESUF) -check-unit-y += tests/test-crypto-secret$(EXESUF) -check-unit-$(CONFIG_GNUTLS) += tests/test-crypto-tlscredsx509$(EXESUF) -check-unit-$(CONFIG_GNUTLS) += tests/test-crypto-tlssession$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-write-threshold$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-crypto-hash$(EXESUF) +check-speed-$(CONFIG_BLOCK) += tests/benchmark-crypto-hash$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-crypto-hmac$(EXESUF) +check-speed-$(CONFIG_BLOCK) += tests/benchmark-crypto-hmac$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-crypto-cipher$(EXESUF) +check-speed-$(CONFIG_BLOCK) += tests/benchmark-crypto-cipher$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-crypto-secret$(EXESUF) +check-unit-$(call land,$(CONFIG_BLOCK),$(CONFIG_GNUTLS)) += tests/test-crypto-tlscredsx509$(EXESUF) +check-unit-$(call land,$(CONFIG_BLOCK),$(CONFIG_GNUTLS)) += tests/test-crypto-tlssession$(EXESUF) ifneq (,$(findstring qemu-ga,$(TOOLS))) check-unit-$(call land,$(CONFIG_LINUX),$(CONFIG_VIRTIO_SERIAL)) += tests/test-qga$(EXESUF) endif check-unit-y += tests/test-timed-average$(EXESUF) check-unit-$(CONFIG_INOTIFY1) += tests/test-util-filemonitor$(EXESUF) check-unit-y += tests/test-util-sockets$(EXESUF) -check-unit-y += tests/test-authz-simple$(EXESUF) -check-unit-y += tests/test-authz-list$(EXESUF) -check-unit-y += tests/test-authz-listfile$(EXESUF) -check-unit-$(CONFIG_AUTH_PAM) += tests/test-authz-pam$(EXESUF) -check-unit-y += tests/test-io-task$(EXESUF) -check-unit-y += tests/test-io-channel-socket$(EXESUF) -check-unit-y += tests/test-io-channel-file$(EXESUF) -check-unit-$(CONFIG_GNUTLS) += tests/test-io-channel-tls$(EXESUF) -check-unit-y += tests/test-io-channel-command$(EXESUF) -check-unit-y += tests/test-io-channel-buffer$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-authz-simple$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-authz-list$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-authz-listfile$(EXESUF) +check-unit-$(call land,$(CONFIG_BLOCK),$(CONFIG_AUTH_PAM)) += tests/test-authz-pam$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-io-task$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-io-channel-socket$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-io-channel-file$(EXESUF) +check-unit-$(call land,$(CONFIG_BLOCK),$(CONFIG_GNUTLS)) += tests/test-io-channel-tls$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-io-channel-command$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-io-channel-buffer$(EXESUF) check-unit-y += tests/test-base64$(EXESUF) -check-unit-$(if $(CONFIG_NETTLE),y,$(CONFIG_GCRYPT)) += tests/test-crypto-pbkdf$(EXESUF) -check-unit-y += tests/test-crypto-ivgen$(EXESUF) -check-unit-y += tests/test-crypto-afsplit$(EXESUF) -check-unit-y += tests/test-crypto-xts$(EXESUF) -check-unit-y += tests/test-crypto-block$(EXESUF) +check-unit-$(call land,$(CONFIG_BLOCK),$(if $(CONFIG_NETTLE),y,$(CONFIG_GCRYPT))) += tests/test-crypto-pbkdf$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-crypto-ivgen$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-crypto-afsplit$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-crypto-xts$(EXESUF) +check-unit-$(CONFIG_BLOCK) += tests/test-crypto-block$(EXESUF) check-unit-y += tests/test-logging$(EXESUF) -check-unit-$(CONFIG_REPLICATION) += tests/test-replication$(EXESUF) +check-unit-$(call land,$(CONFIG_BLOCK),$(CONFIG_REPLICATION)) += tests/test-replication$(EXESUF) check-unit-y += tests/test-bufferiszero$(EXESUF) check-unit-y += tests/test-uuid$(EXESUF) check-unit-y += tests/ptimer-test$(EXESUF) @@ -468,19 +468,19 @@ qapi-schema += unknown-expr-key.json check-qapi-schema-y := $(addprefix tests/qapi-schema/, $(qapi-schema)) -GENERATED_FILES += tests/test-qapi-types.h \ - tests/include/test-qapi-types-sub-module.h \ - tests/test-qapi-types-sub-sub-module.h \ - tests/test-qapi-visit.h \ - tests/include/test-qapi-visit-sub-module.h \ - tests/test-qapi-visit-sub-sub-module.h \ - tests/test-qapi-commands.h \ - tests/include/test-qapi-commands-sub-module.h \ - tests/test-qapi-commands-sub-sub-module.h \ - tests/test-qapi-events.h \ - tests/include/test-qapi-events-sub-module.h \ - tests/test-qapi-events-sub-sub-module.h \ - tests/test-qapi-introspect.h +generated-files-y += tests/test-qapi-types.h +generated-files-y += tests/include/test-qapi-types-sub-module.h +generated-files-y += tests/test-qapi-types-sub-sub-module.h +generated-files-y += tests/test-qapi-visit.h +generated-files-y += tests/include/test-qapi-visit-sub-module.h +generated-files-y += tests/test-qapi-visit-sub-sub-module.h +generated-files-y += tests/test-qapi-commands.h +generated-files-y += tests/include/test-qapi-commands-sub-module.h +generated-files-y += tests/test-qapi-commands-sub-sub-module.h +generated-files-y += tests/test-qapi-events.h +generated-files-y += tests/include/test-qapi-events-sub-module.h +generated-files-y += tests/test-qapi-events-sub-sub-module.h +generated-files-y += tests/test-qapi-introspect.h QEMU_CFLAGS += -I$(SRC_PATH)/tests @@ -496,11 +496,11 @@ test-qapi-obj-y = tests/test-qapi-types.o \ tests/test-qapi-visit-sub-sub-module.o \ tests/test-qapi-introspect.o \ $(test-qom-obj-y) -benchmark-crypto-obj-y = $(authz-obj-y) $(crypto-obj-y) $(test-qom-obj-y) -test-crypto-obj-y = $(authz-obj-y) $(crypto-obj-y) $(test-qom-obj-y) -test-io-obj-y = $(io-obj-y) $(test-crypto-obj-y) -test-authz-obj-y = $(test-qom-obj-y) $(authz-obj-y) -test-block-obj-y = $(block-obj-y) $(test-io-obj-y) tests/iothread.o +benchmark-crypto-obj-$(CONFIG_BLOCK) = $(authz-obj-y) $(crypto-obj-y) $(test-qom-obj-y) +test-crypto-obj-$(CONFIG_BLOCK) = $(authz-obj-y) $(crypto-obj-y) $(test-qom-obj-y) +test-io-obj-$(CONFIG_BLOCK) = $(io-obj-y) $(test-crypto-obj-y) +test-authz-obj-$(CONFIG_BLOCK) = $(test-qom-obj-y) $(authz-obj-y) +test-block-obj-$(CONFIG_BLOCK) = $(block-obj-y) $(test-io-obj-y) tests/iothread.o tests/check-qnum$(EXESUF): tests/check-qnum.o $(test-util-obj-y) tests/check-qstring$(EXESUF): tests/check-qstring.o $(test-util-obj-y) diff --git a/vl.c b/vl.c index b6709514c1..c8ca9ff6ff 100644 --- a/vl.c +++ b/vl.c @@ -2018,6 +2018,7 @@ typedef struct VGAInterfaceInfo { static const VGAInterfaceInfo vga_interfaces[VGA_TYPE_MAX] = { [VGA_NONE] = { .opt_name = "none", + .name = "no graphic card", }, [VGA_STD] = { .opt_name = "std", @@ -2056,6 +2057,7 @@ static const VGAInterfaceInfo vga_interfaces[VGA_TYPE_MAX] = { }, [VGA_XENFB] = { .opt_name = "xenfb", + .name = "Xen paravirtualized framebuffer", }, }; @@ -3894,17 +3896,19 @@ int main(int argc, char **argv, char **envp) qtest_log = optarg; break; case QEMU_OPTION_sandbox: -#ifdef CONFIG_SECCOMP - opts = qemu_opts_parse_noisily(qemu_find_opts("sandbox"), - optarg, true); + olist = qemu_find_opts("sandbox"); + if (!olist) { +#ifndef CONFIG_SECCOMP + error_report("-sandbox support is not enabled " + "in this QEMU binary"); +#endif + exit(1); + } + + opts = qemu_opts_parse_noisily(olist, optarg, true); if (!opts) { exit(1); } -#else - error_report("-sandbox support is not enabled " - "in this QEMU binary"); - exit(1); -#endif break; case QEMU_OPTION_add_fd: #ifndef _WIN32 @@ -3927,6 +3931,8 @@ int main(int argc, char **argv, char **envp) } break; case QEMU_OPTION_realtime: + warn_report("'-realtime mlock=...' is deprecated, please use " + "'-overcommit mem-lock=...' instead"); opts = qemu_opts_parse_noisily(qemu_find_opts("realtime"), optarg, false); if (!opts) { |