diff options
| -rw-r--r-- | cpu-exec.c | 9 | ||||
| -rw-r--r-- | target-microblaze/cpu-qom.h | 1 | ||||
| -rw-r--r-- | target-microblaze/cpu.c | 1 | ||||
| -rw-r--r-- | target-microblaze/helper.c | 16 |
4 files changed, 18 insertions, 9 deletions
diff --git a/cpu-exec.c b/cpu-exec.c index 60f727019f..5c93a5f7a6 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -505,15 +505,6 @@ int cpu_exec(CPUArchState *env) cc->do_interrupt(cpu); next_tb = 0; } -#elif defined(TARGET_MICROBLAZE) - if ((interrupt_request & CPU_INTERRUPT_HARD) - && (env->sregs[SR_MSR] & MSR_IE) - && !(env->sregs[SR_MSR] & (MSR_EIP | MSR_BIP)) - && !(env->iflags & (D_FLAG | IMM_FLAG))) { - cpu->exception_index = EXCP_IRQ; - cc->do_interrupt(cpu); - next_tb = 0; - } #endif /* The target hook has 3 exit conditions: False when the interrupt isn't processed, diff --git a/target-microblaze/cpu-qom.h b/target-microblaze/cpu-qom.h index 35a12b42a5..e3e070159f 100644 --- a/target-microblaze/cpu-qom.h +++ b/target-microblaze/cpu-qom.h @@ -72,6 +72,7 @@ static inline MicroBlazeCPU *mb_env_get_cpu(CPUMBState *env) #define ENV_OFFSET offsetof(MicroBlazeCPU, env) void mb_cpu_do_interrupt(CPUState *cs); +bool mb_cpu_exec_interrupt(CPUState *cs, int int_req); void mb_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); hwaddr mb_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c index 0379f2be2c..67e3182f70 100644 --- a/target-microblaze/cpu.c +++ b/target-microblaze/cpu.c @@ -169,6 +169,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) cc->has_work = mb_cpu_has_work; cc->do_interrupt = mb_cpu_do_interrupt; + cc->cpu_exec_interrupt = mb_cpu_exec_interrupt; cc->dump_state = mb_cpu_dump_state; cc->set_pc = mb_cpu_set_pc; cc->gdb_read_register = mb_cpu_gdb_read_register; diff --git a/target-microblaze/helper.c b/target-microblaze/helper.c index 59c9ad5aef..59466c9742 100644 --- a/target-microblaze/helper.c +++ b/target-microblaze/helper.c @@ -286,3 +286,19 @@ hwaddr mb_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) return paddr; } #endif + +bool mb_cpu_exec_interrupt(CPUState *cs, int interrupt_request) +{ + MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); + CPUMBState *env = &cpu->env; + + if ((interrupt_request & CPU_INTERRUPT_HARD) + && (env->sregs[SR_MSR] & MSR_IE) + && !(env->sregs[SR_MSR] & (MSR_EIP | MSR_BIP)) + && !(env->iflags & (D_FLAG | IMM_FLAG))) { + cs->exception_index = EXCP_IRQ; + mb_cpu_do_interrupt(cs); + return true; + } + return false; +} |