diff options
| m--------- | dtc | 0 | ||||
| -rw-r--r-- | hw/char/virtio-serial-bus.c | 1 | ||||
| -rw-r--r-- | hw/ide/ahci.c | 12 | ||||
| -rw-r--r-- | hw/ide/core.c | 8 | ||||
| -rw-r--r-- | hw/ide/qdev.c | 12 | ||||
| -rw-r--r-- | hw/pci/pci.c | 2 | ||||
| -rw-r--r-- | hw/pci/pcie.c | 20 | ||||
| -rw-r--r-- | hw/virtio/virtio-pci.c | 31 | ||||
| -rw-r--r-- | hw/virtio/virtio-pci.h | 12 | ||||
| -rw-r--r-- | include/hw/compat.h | 16 | ||||
| -rw-r--r-- | include/hw/ide/internal.h | 1 | ||||
| -rw-r--r-- | include/hw/pci/pci.h | 2 | ||||
| -rw-r--r-- | include/hw/pci/pcie.h | 5 | ||||
| -rw-r--r-- | pc-bios/openbios-ppc | bin | 750840 -> 750840 bytes | |||
| -rw-r--r-- | pc-bios/openbios-sparc32 | bin | 382048 -> 382048 bytes | |||
| -rw-r--r-- | pc-bios/openbios-sparc64 | bin | 1593408 -> 1593408 bytes | |||
| m--------- | roms/openbios | 0 |
17 files changed, 116 insertions, 6 deletions
diff --git a/dtc b/dtc -Subproject 558cd81bdd432769b59bff01240c44f82cfb1a9 +Subproject 65cc4d2748a2c2e6f27f1cf39e07a5dbabd80eb diff --git a/hw/char/virtio-serial-bus.c b/hw/char/virtio-serial-bus.c index d544cd91c0..d797a6796e 100644 --- a/hw/char/virtio-serial-bus.c +++ b/hw/char/virtio-serial-bus.c @@ -724,6 +724,7 @@ static void virtio_serial_post_load_timer_cb(void *opaque) } } g_free(s->post_load->connected); + timer_del(s->post_load->timer); timer_free(s->post_load->timer); g_free(s->post_load); s->post_load = NULL; diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index 6a17acf639..f60826d6e0 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -1485,6 +1485,18 @@ void ahci_realize(AHCIState *s, DeviceState *qdev, AddressSpace *as, int ports) void ahci_uninit(AHCIState *s) { + int i, j; + + for (i = 0; i < s->ports; i++) { + AHCIDevice *ad = &s->dev[i]; + + for (j = 0; j < 2; j++) { + IDEState *s = &ad->port.ifs[j]; + + ide_exit(s); + } + } + g_free(s->dev); } diff --git a/hw/ide/core.c b/hw/ide/core.c index db509b3e15..0b48b64d3a 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -2603,6 +2603,14 @@ void ide_init2(IDEBus *bus, qemu_irq irq) bus->dma = &ide_dma_nop; } +void ide_exit(IDEState *s) +{ + timer_del(s->sector_write_timer); + timer_free(s->sector_write_timer); + qemu_vfree(s->smart_selftest_data); + qemu_vfree(s->io_buffer); +} + static const MemoryRegionPortio ide_portio_list[] = { { 0, 8, 1, .read = ide_ioport_read, .write = ide_ioport_write }, { 0, 1, 2, .read = ide_data_readw, .write = ide_data_writew }, diff --git a/hw/ide/qdev.c b/hw/ide/qdev.c index 4383cd111d..299e592fa2 100644 --- a/hw/ide/qdev.c +++ b/hw/ide/qdev.c @@ -31,7 +31,7 @@ /* --------------------------------- */ static char *idebus_get_fw_dev_path(DeviceState *dev); -static void idebus_unrealize(DeviceState *qdev, Error **errp); +static void idebus_unrealize(BusState *qdev, Error **errp); static Property ide_props[] = { DEFINE_PROP_UINT32("unit", IDEDevice, unit, -1), @@ -43,14 +43,15 @@ static void ide_bus_class_init(ObjectClass *klass, void *data) BusClass *k = BUS_CLASS(klass); k->get_fw_dev_path = idebus_get_fw_dev_path; + k->unrealize = idebus_unrealize; } -static void idebus_unrealize(DeviceState *qdev, Error **errp) +static void idebus_unrealize(BusState *bus, Error **errp) { - IDEBus *bus = DO_UPCAST(IDEBus, qbus, qdev->parent_bus); + IDEBus *ibus = IDE_BUS(bus); - if (bus->vmstate) { - qemu_del_vm_change_state_handler(bus->vmstate); + if (ibus->vmstate) { + qemu_del_vm_change_state_handler(ibus->vmstate); } } @@ -370,7 +371,6 @@ static void ide_device_class_init(ObjectClass *klass, void *data) k->init = ide_qdev_init; set_bit(DEVICE_CATEGORY_STORAGE, k->categories); k->bus_type = TYPE_IDE_BUS; - k->unrealize = idebus_unrealize; k->props = ide_props; } diff --git a/hw/pci/pci.c b/hw/pci/pci.c index ad46390ec5..e6b08e1988 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -64,6 +64,8 @@ static Property pci_props[] = { QEMU_PCI_CAP_SERR_BITNR, true), DEFINE_PROP_BIT("x-pcie-lnksta-dllla", PCIDevice, cap_present, QEMU_PCIE_LNKSTA_DLLLA_BITNR, true), + DEFINE_PROP_BIT("x-pcie-extcap-init", PCIDevice, cap_present, + QEMU_PCIE_EXTCAP_INIT_BITNR, true), DEFINE_PROP_END_OF_LIST() }; diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index fc54bfd53d..18e634f577 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -109,6 +109,12 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port) PCI_EXP_DEVCAP2_EFF | PCI_EXP_DEVCAP2_EETLPP); pci_set_word(dev->wmask + pos + PCI_EXP_DEVCTL2, PCI_EXP_DEVCTL2_EETLPPB); + + if (dev->cap_present & QEMU_PCIE_EXTCAP_INIT) { + /* read-only to behave like a 'NULL' Extended Capability Header */ + pci_set_long(dev->wmask + PCI_CONFIG_SPACE_SIZE, 0); + } + return pos; } @@ -217,6 +223,20 @@ void pcie_cap_deverr_reset(PCIDevice *dev) PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE); } +void pcie_cap_lnkctl_init(PCIDevice *dev) +{ + uint32_t pos = dev->exp.exp_cap; + pci_long_test_and_set_mask(dev->wmask + pos + PCI_EXP_LNKCTL, + PCI_EXP_LNKCTL_CCC | PCI_EXP_LNKCTL_ES); +} + +void pcie_cap_lnkctl_reset(PCIDevice *dev) +{ + uint8_t *lnkctl = dev->config + dev->exp.exp_cap + PCI_EXP_LNKCTL; + pci_long_test_and_clear_mask(lnkctl, + PCI_EXP_LNKCTL_CCC | PCI_EXP_LNKCTL_ES); +} + static void hotplug_event_update_event_status(PCIDevice *dev) { uint32_t pos = dev->exp.exp_cap; diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 69cc471e56..f9b7244808 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1812,6 +1812,7 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0, PCI_PM_SIZEOF); assert(pos > 0); + pci_dev->exp.pm_cap = pos; /* * Indicates that this function complies with revision 1.2 of the @@ -1819,6 +1820,22 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) */ pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3); + if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) { + /* Init error enabling flags */ + pcie_cap_deverr_init(pci_dev); + } + + if (proxy->flags & VIRTIO_PCI_FLAG_INIT_LNKCTL) { + /* Init Link Control Register */ + pcie_cap_lnkctl_init(pci_dev); + } + + if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) { + /* Init Power Management Control Register */ + pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL, + PCI_PM_CTRL_STATE_MASK); + } + if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { pcie_ats_init(pci_dev, 256); } @@ -1849,6 +1866,7 @@ static void virtio_pci_reset(DeviceState *qdev) { VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev); VirtioBusState *bus = VIRTIO_BUS(&proxy->bus); + PCIDevice *dev = PCI_DEVICE(qdev); int i; virtio_pci_stop_ioeventfd(proxy); @@ -1862,6 +1880,13 @@ static void virtio_pci_reset(DeviceState *qdev) proxy->vqs[i].avail[0] = proxy->vqs[i].avail[1] = 0; proxy->vqs[i].used[0] = proxy->vqs[i].used[1] = 0; } + + if (pci_is_express(dev)) { + pcie_cap_deverr_reset(dev); + pcie_cap_lnkctl_reset(dev); + + pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0); + } } static Property virtio_pci_properties[] = { @@ -1882,6 +1907,12 @@ static Property virtio_pci_properties[] = { ignore_backend_features, false), DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags, VIRTIO_PCI_FLAG_ATS_BIT, false), + DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags, + VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true), + DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags, + VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true), + DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags, + VIRTIO_PCI_FLAG_INIT_PM_BIT, true), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h index d00064cc0c..b095dfc6d9 100644 --- a/hw/virtio/virtio-pci.h +++ b/hw/virtio/virtio-pci.h @@ -73,6 +73,9 @@ enum { VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, VIRTIO_PCI_FLAG_ATS_BIT, + VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, + VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, + VIRTIO_PCI_FLAG_INIT_PM_BIT, }; /* Need to activate work-arounds for buggy guests at vmstate load. */ @@ -100,6 +103,15 @@ enum { /* address space translation service */ #define VIRTIO_PCI_FLAG_ATS (1 << VIRTIO_PCI_FLAG_ATS_BIT) +/* Init error enabling flags */ +#define VIRTIO_PCI_FLAG_INIT_DEVERR (1 << VIRTIO_PCI_FLAG_INIT_DEVERR_BIT) + +/* Init Link Control register */ +#define VIRTIO_PCI_FLAG_INIT_LNKCTL (1 << VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT) + +/* Init Power Management */ +#define VIRTIO_PCI_FLAG_INIT_PM (1 << VIRTIO_PCI_FLAG_INIT_PM_BIT) + typedef struct { MSIMessage msg; int virq; diff --git a/include/hw/compat.h b/include/hw/compat.h index b7db43803c..90606f9fdb 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -18,6 +18,22 @@ .driver = "pci-bridge",\ .property = "shpc",\ .value = "on",\ + },{\ + .driver = TYPE_PCI_DEVICE,\ + .property = "x-pcie-extcap-init",\ + .value = "off",\ + },{\ + .driver = "virtio-pci",\ + .property = "x-pcie-deverr-init",\ + .value = "off",\ + },{\ + .driver = "virtio-pci",\ + .property = "x-pcie-lnkctl-init",\ + .value = "off",\ + },{\ + .driver = "virtio-pci",\ + .property = "x-pcie-pm-init",\ + .value = "off",\ }, #define HW_COMPAT_2_7 \ diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index 88dc11808b..482a9512be 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -607,6 +607,7 @@ int ide_init_drive(IDEState *s, BlockBackend *blk, IDEDriveKind kind, uint32_t cylinders, uint32_t heads, uint32_t secs, int chs_trans); void ide_init2(IDEBus *bus, qemu_irq irq); +void ide_exit(IDEState *s); void ide_init_ioport(IDEBus *bus, ISADevice *isa, int iobase, int iobase2); void ide_register_restart_cb(IDEBus *bus); diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 713ede00bf..a37a2d5cb6 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -183,6 +183,8 @@ enum { /* Link active status in endpoint capability is always set */ #define QEMU_PCIE_LNKSTA_DLLLA_BITNR 8 QEMU_PCIE_LNKSTA_DLLLA = (1 << QEMU_PCIE_LNKSTA_DLLLA_BITNR), +#define QEMU_PCIE_EXTCAP_INIT_BITNR 9 + QEMU_PCIE_EXTCAP_INIT = (1 << QEMU_PCIE_EXTCAP_INIT_BITNR), }; #define TYPE_PCI_DEVICE "pci-device" diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h index 163c5195b6..3d8f24b007 100644 --- a/include/hw/pci/pcie.h +++ b/include/hw/pci/pcie.h @@ -63,6 +63,8 @@ typedef enum { struct PCIExpressDevice { /* Offset of express capability in config space */ uint8_t exp_cap; + /* Offset of Power Management capability in config space */ + uint8_t pm_cap; /* SLOT */ bool hpev_notified; /* Logical AND of conditions for hot plug event. @@ -96,6 +98,9 @@ uint8_t pcie_cap_flags_get_vector(PCIDevice *dev); void pcie_cap_deverr_init(PCIDevice *dev); void pcie_cap_deverr_reset(PCIDevice *dev); +void pcie_cap_lnkctl_init(PCIDevice *dev); +void pcie_cap_lnkctl_reset(PCIDevice *dev); + void pcie_cap_slot_init(PCIDevice *dev, uint16_t slot); void pcie_cap_slot_reset(PCIDevice *dev); void pcie_cap_slot_write_config(PCIDevice *dev, diff --git a/pc-bios/openbios-ppc b/pc-bios/openbios-ppc index 4869c9dcf3..cfe0aee7e5 100644 --- a/pc-bios/openbios-ppc +++ b/pc-bios/openbios-ppc Binary files differdiff --git a/pc-bios/openbios-sparc32 b/pc-bios/openbios-sparc32 index aada55e094..d6244b9ebd 100644 --- a/pc-bios/openbios-sparc32 +++ b/pc-bios/openbios-sparc32 Binary files differdiff --git a/pc-bios/openbios-sparc64 b/pc-bios/openbios-sparc64 index cf466f6a4c..74f67f2724 100644 --- a/pc-bios/openbios-sparc64 +++ b/pc-bios/openbios-sparc64 Binary files differdiff --git a/roms/openbios b/roms/openbios -Subproject 0cd97cc904e71fbb461112f6756934ec6af890b +Subproject f233c3f72cfa79c1123a7ccef08d2f7e228da6d |