diff options
291 files changed, 4292 insertions, 3092 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 0bfd95a4ef..87f90721b9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -962,6 +962,7 @@ L: qemu-ppc@nongnu.org S: Odd Fixes F: hw/ppc/e500.[hc] F: hw/ppc/e500plat.c +F: hw/gpio/mpc8xxx.c F: include/hw/ppc/ppc_e500.h F: include/hw/pci-host/ppce500.h F: pc-bios/u-boot.e500 @@ -973,7 +974,7 @@ S: Odd Fixes F: hw/ppc/mpc8544ds.c F: hw/ppc/mpc8544_guts.c -New World +New World (mac99) M: David Gibson <david@gibson.dropbear.id.au> L: qemu-ppc@nongnu.org S: Odd Fixes @@ -983,12 +984,15 @@ F: hw/pci-bridge/dec.[hc] F: hw/misc/macio/ F: hw/misc/mos6522.c F: hw/nvram/mac_nvram.c +F: hw/input/adb* F: include/hw/misc/macio/ F: include/hw/misc/mos6522.h F: include/hw/ppc/mac_dbdma.h F: include/hw/pci-host/uninorth.h +F: include/hw/input/adb* +F: pc-bios/qemu_vga.ndrv -Old World +Old World (g3beige) M: David Gibson <david@gibson.dropbear.id.au> L: qemu-ppc@nongnu.org S: Odd Fixes @@ -996,7 +1000,10 @@ F: hw/ppc/mac_oldworld.c F: hw/pci-host/grackle.c F: hw/misc/macio/ F: hw/intc/heathrow_pic.c +F: hw/input/adb* F: include/hw/intc/heathrow_pic.h +F: include/hw/input/adb* +F: pc-bios/qemu_vga.ndrv PReP M: Hervé Poussineau <hpoussin@reactos.org> @@ -1052,8 +1059,14 @@ sam460ex M: BALATON Zoltan <balaton@eik.bme.hu> L: qemu-ppc@nongnu.org S: Maintained +F: hw/ppc/sam460ex.c +F: hw/ppc/ppc440_pcix.c +F: hw/display/sm501* F: hw/ide/sii3112.c F: hw/timer/m41t80.c +F: pc-bios/canyonlands.dt[sb] +F: pc-bios/u-boot-sam460ex-20100605.bin +F: roms/u-boot-sam460ex SH4 Machines ------------ diff --git a/Makefile b/Makefile index dd53965f77..a9ac16d94e 100644 --- a/Makefile +++ b/Makefile @@ -651,9 +651,9 @@ distclean: clean rm -Rf .sdk if test -f dtc/version_gen.h; then $(MAKE) $(DTC_MAKE_ARGS) clean; fi -KEYMAPS=da en-gb et fr fr-ch is lt modifiers no pt-br sv \ +KEYMAPS=da en-gb et fr fr-ch is lt no pt-br sv \ ar de en-us fi fr-be hr it lv nl pl ru th \ -common de-ch es fo fr-ca hu ja mk nl-be pt sl tr \ +de-ch es fo fr-ca hu ja mk pt sl tr \ bepo cz ifdef INSTALL_BLOBS diff --git a/accel/accel.c b/accel/accel.c index 6db5d8f4df..68b6d56323 100644 --- a/accel/accel.c +++ b/accel/accel.c @@ -69,7 +69,7 @@ static int accel_init_machine(AccelClass *acc, MachineState *ms) return ret; } -void configure_accelerator(MachineState *ms) +void configure_accelerator(MachineState *ms, const char *progname) { const char *accel; char **accel_list, **tmp; @@ -80,8 +80,20 @@ void configure_accelerator(MachineState *ms) accel = qemu_opt_get(qemu_get_machine_opts(), "accel"); if (accel == NULL) { - /* Use the default "accelerator", tcg */ - accel = "tcg"; + /* Select the default accelerator */ + int pnlen = strlen(progname); + if (pnlen >= 3 && g_str_equal(&progname[pnlen - 3], "kvm")) { + /* If the program name ends with "kvm", we prefer KVM */ + accel = "kvm:tcg"; + } else { +#if defined(CONFIG_TCG) + accel = "tcg"; +#elif defined(CONFIG_KVM) + accel = "kvm"; +#else +#error "No default accelerator available" +#endif + } } accel_list = g_strsplit(accel, ":", 0); diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 4880a05399..4e1de942ce 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -86,7 +86,7 @@ struct KVMState int robust_singlestep; int debugregs; #ifdef KVM_CAP_SET_GUEST_DEBUG - struct kvm_sw_breakpoint_head kvm_sw_breakpoints; + QTAILQ_HEAD(, kvm_sw_breakpoint) kvm_sw_breakpoints; #endif int many_ioeventfds; int intx_set_mask; @@ -102,7 +102,7 @@ struct KVMState int nr_allocated_irq_routes; unsigned long *used_gsi_bitmap; unsigned int gsi_count; - QTAILQ_HEAD(msi_hashtab, KVMMSIRoute) msi_hashtab[KVM_MSI_HASHTAB_SIZE]; + QTAILQ_HEAD(, KVMMSIRoute) msi_hashtab[KVM_MSI_HASHTAB_SIZE]; #endif KVMMemoryListener memory_listener; QLIST_HEAD(, KVMParkedVcpu) kvm_parked_vcpus; diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 639f0b2728..8cb8c8870e 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -16,12 +16,8 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ -#ifdef _WIN32 -#include <windows.h> -#endif #include "qemu/osdep.h" - #include "qemu-common.h" #define NO_CPU_IO_DEFS #include "cpu.h" diff --git a/block/bochs.c b/block/bochs.c index 22e7d44211..79f95d3b50 100644 --- a/block/bochs.c +++ b/block/bochs.c @@ -85,14 +85,14 @@ static int bochs_probe(const uint8_t *buf, int buf_size, const char *filename) const struct bochs_header *bochs = (const void *)buf; if (buf_size < HEADER_SIZE) - return 0; + return 0; if (!strcmp(bochs->magic, HEADER_MAGIC) && - !strcmp(bochs->type, REDOLOG_TYPE) && - !strcmp(bochs->subtype, GROWING_TYPE) && - ((le32_to_cpu(bochs->version) == HEADER_VERSION) || - (le32_to_cpu(bochs->version) == HEADER_V1))) - return 100; + !strcmp(bochs->type, REDOLOG_TYPE) && + !strcmp(bochs->subtype, GROWING_TYPE) && + ((le32_to_cpu(bochs->version) == HEADER_VERSION) || + (le32_to_cpu(bochs->version) == HEADER_V1))) + return 100; return 0; } @@ -125,8 +125,8 @@ static int bochs_open(BlockDriverState *bs, QDict *options, int flags, if (strcmp(bochs.magic, HEADER_MAGIC) || strcmp(bochs.type, REDOLOG_TYPE) || strcmp(bochs.subtype, GROWING_TYPE) || - ((le32_to_cpu(bochs.version) != HEADER_VERSION) && - (le32_to_cpu(bochs.version) != HEADER_V1))) { + ((le32_to_cpu(bochs.version) != HEADER_VERSION) && + (le32_to_cpu(bochs.version) != HEADER_V1))) { error_setg(errp, "Image not in Bochs format"); return -EINVAL; } @@ -158,7 +158,7 @@ static int bochs_open(BlockDriverState *bs, QDict *options, int flags, } for (i = 0; i < s->catalog_size; i++) - le32_to_cpus(&s->catalog_bitmap[i]); + le32_to_cpus(&s->catalog_bitmap[i]); s->data_offset = le32_to_cpu(bochs.header) + (s->catalog_size * 4); @@ -217,7 +217,7 @@ static int64_t seek_to_sector(BlockDriverState *bs, int64_t sector_num) extent_offset = (offset % s->extent_size) / 512; if (s->catalog_bitmap[extent_index] == 0xffffffff) { - return 0; /* not allocated */ + return 0; /* not allocated */ } bitmap_offset = s->data_offset + @@ -232,7 +232,7 @@ static int64_t seek_to_sector(BlockDriverState *bs, int64_t sector_num) } if (!((bitmap_entry >> (extent_offset % 8)) & 1)) { - return 0; /* not allocated */ + return 0; /* not allocated */ } return bitmap_offset + (512 * (s->bitmap_blocks + extent_offset)); diff --git a/block/file-posix.c b/block/file-posix.c index d8f0b93752..8aee7a3fb8 100644 --- a/block/file-posix.c +++ b/block/file-posix.c @@ -2083,7 +2083,7 @@ again: #endif if (!fstat(fd, &sb) && (S_IFCHR & sb.st_mode)) { #ifdef DIOCGMEDIASIZE - if (ioctl(fd, DIOCGMEDIASIZE, (off_t *)&size)) + if (ioctl(fd, DIOCGMEDIASIZE, (off_t *)&size)) #elif defined(DIOCGPART) { struct partinfo pi; diff --git a/block/file-win32.c b/block/file-win32.c index f1e2187f3b..6b2d67b239 100644 --- a/block/file-win32.c +++ b/block/file-win32.c @@ -176,7 +176,7 @@ int qemu_ftruncate64(int fd, int64_t length) BOOL res; if ((GetVersion() & 0x80000000UL) && (length >> 32) != 0) - return -1; + return -1; h = (HANDLE)_get_osfhandle(fd); @@ -184,13 +184,13 @@ int qemu_ftruncate64(int fd, int64_t length) li.HighPart = 0; li.LowPart = SetFilePointer (h, 0, &li.HighPart, FILE_CURRENT); if (li.LowPart == INVALID_SET_FILE_POINTER && GetLastError() != NO_ERROR) { - return -1; + return -1; } high = length >> 32; dw = SetFilePointer(h, (DWORD) length, &high, FILE_BEGIN); if (dw == INVALID_SET_FILE_POINTER && GetLastError() != NO_ERROR) { - return -1; + return -1; } res = SetEndOfFile(h); @@ -203,7 +203,7 @@ static int set_sparse(int fd) { DWORD returned; return (int) DeviceIoControl((HANDLE)_get_osfhandle(fd), FSCTL_SET_SPARSE, - NULL, 0, NULL, 0, &returned, NULL); + NULL, 0, NULL, 0, &returned, NULL); } static void raw_detach_aio_context(BlockDriverState *bs) diff --git a/block/gluster.c b/block/gluster.c index 5e300c96c8..72891060e3 100644 --- a/block/gluster.c +++ b/block/gluster.c @@ -72,7 +72,7 @@ typedef struct ListElement { GlfsPreopened saved; } ListElement; -static QLIST_HEAD(glfs_list, ListElement) glfs_list; +static QLIST_HEAD(, ListElement) glfs_list; static QemuOptsList qemu_gluster_create_opts = { .name = "qemu-gluster-create-opts", diff --git a/block/iscsi.c b/block/iscsi.c index 727dee50bf..a7e8c1ffaf 100644 --- a/block/iscsi.c +++ b/block/iscsi.c @@ -117,7 +117,6 @@ typedef struct IscsiAIOCB { QEMUBH *bh; IscsiLun *iscsilun; struct scsi_task *task; - uint8_t *buf; int status; int64_t sector_num; int nb_sectors; @@ -125,6 +124,7 @@ typedef struct IscsiAIOCB { #ifdef __linux__ sg_io_hdr_t *ioh; #endif + bool cancelled; } IscsiAIOCB; /* libiscsi uses time_t so its enough to process events every second */ @@ -150,9 +150,6 @@ iscsi_bh_cb(void *p) qemu_bh_delete(acb->bh); - g_free(acb->buf); - acb->buf = NULL; - acb->common.cb(acb->common.opaque, acb->status); if (acb->task != NULL) { @@ -291,14 +288,20 @@ static void iscsi_co_init_iscsitask(IscsiLun *iscsilun, struct IscsiTask *iTask) }; } +/* Called (via iscsi_service) with QemuMutex held. */ static void iscsi_abort_task_cb(struct iscsi_context *iscsi, int status, void *command_data, void *private_data) { IscsiAIOCB *acb = private_data; - acb->status = -ECANCELED; - iscsi_schedule_bh(acb); + /* If the command callback hasn't been called yet, drop the task */ + if (!acb->bh) { + /* Call iscsi_aio_ioctl_cb() with SCSI_STATUS_CANCELLED */ + iscsi_scsi_cancel_task(iscsi, acb->task); + } + + qemu_aio_unref(acb); /* acquired in iscsi_aio_cancel() */ } static void @@ -307,14 +310,25 @@ iscsi_aio_cancel(BlockAIOCB *blockacb) IscsiAIOCB *acb = (IscsiAIOCB *)blockacb; IscsiLun *iscsilun = acb->iscsilun; - if (acb->status != -EINPROGRESS) { + qemu_mutex_lock(&iscsilun->mutex); + + /* If it was cancelled or completed already, our work is done here */ + if (acb->cancelled || acb->status != -EINPROGRESS) { + qemu_mutex_unlock(&iscsilun->mutex); return; } + acb->cancelled = true; + + qemu_aio_ref(acb); /* released in iscsi_abort_task_cb() */ + /* send a task mgmt call to the target to cancel the task on the target */ - iscsi_task_mgmt_abort_task_async(iscsilun->iscsi, acb->task, - iscsi_abort_task_cb, acb); + if (iscsi_task_mgmt_abort_task_async(iscsilun->iscsi, acb->task, + iscsi_abort_task_cb, acb) < 0) { + qemu_aio_unref(acb); /* since iscsi_abort_task_cb() won't be called */ + } + qemu_mutex_unlock(&iscsilun->mutex); } static const AIOCBInfo iscsi_aiocb_info = { @@ -348,6 +362,8 @@ static void iscsi_timed_check_events(void *opaque) { IscsiLun *iscsilun = opaque; + qemu_mutex_lock(&iscsilun->mutex); + /* check for timed out requests */ iscsi_service(iscsilun->iscsi, 0); @@ -360,6 +376,8 @@ static void iscsi_timed_check_events(void *opaque) * to return to service once this situation changes. */ iscsi_set_events(iscsilun); + qemu_mutex_unlock(&iscsilun->mutex); + timer_mod(iscsilun->event_timer, qemu_clock_get_ms(QEMU_CLOCK_REALTIME) + EVENT_INTERVAL); } @@ -933,8 +951,13 @@ iscsi_aio_ioctl_cb(struct iscsi_context *iscsi, int status, { IscsiAIOCB *acb = opaque; - g_free(acb->buf); - acb->buf = NULL; + if (status == SCSI_STATUS_CANCELLED) { + if (!acb->bh) { + acb->status = -ECANCELED; + iscsi_schedule_bh(acb); + } + return; + } acb->status = 0; if (status < 0) { @@ -1010,8 +1033,8 @@ static BlockAIOCB *iscsi_aio_ioctl(BlockDriverState *bs, acb->iscsilun = iscsilun; acb->bh = NULL; acb->status = -EINPROGRESS; - acb->buf = NULL; acb->ioh = buf; + acb->cancelled = false; if (req != SG_IO) { iscsi_ioctl_handle_emulated(acb, req, buf); diff --git a/block/linux-aio.c b/block/linux-aio.c index 217ce60138..d4b61fb251 100644 --- a/block/linux-aio.c +++ b/block/linux-aio.c @@ -384,10 +384,10 @@ static int laio_do_submit(int fd, struct qemu_laiocb *laiocb, off_t offset, switch (type) { case QEMU_AIO_WRITE: io_prep_pwritev(iocbs, fd, qiov->iov, qiov->niov, offset); - break; + break; case QEMU_AIO_READ: io_prep_preadv(iocbs, fd, qiov->iov, qiov->niov, offset); - break; + break; /* Currently Linux kernel does not support other operations */ default: fprintf(stderr, "%s: invalid AIO request type 0x%x.\n", diff --git a/block/mirror.c b/block/mirror.c index ab59ad77e8..f0b211a9c8 100644 --- a/block/mirror.c +++ b/block/mirror.c @@ -72,7 +72,7 @@ typedef struct MirrorBlockJob { unsigned long *in_flight_bitmap; int in_flight; int64_t bytes_in_flight; - QTAILQ_HEAD(MirrorOpList, MirrorOp) ops_in_flight; + QTAILQ_HEAD(, MirrorOp) ops_in_flight; int ret; bool unmap; int target_cluster_size; diff --git a/block/nvme.c b/block/nvme.c index 29294038fc..982097b5b1 100644 --- a/block/nvme.c +++ b/block/nvme.c @@ -837,7 +837,7 @@ try_map: } for (j = 0; j < qiov->iov[i].iov_len / s->page_size; j++) { - pagelist[entries++] = iova + j * s->page_size; + pagelist[entries++] = cpu_to_le64(iova + j * s->page_size); } trace_nvme_cmd_map_qiov_iov(s, i, qiov->iov[i].iov_base, qiov->iov[i].iov_len / s->page_size); @@ -850,20 +850,16 @@ try_map: case 0: abort(); case 1: - cmd->prp1 = cpu_to_le64(pagelist[0]); + cmd->prp1 = pagelist[0]; cmd->prp2 = 0; break; case 2: - cmd->prp1 = cpu_to_le64(pagelist[0]); - cmd->prp2 = cpu_to_le64(pagelist[1]);; + cmd->prp1 = pagelist[0]; + cmd->prp2 = pagelist[1]; break; default: - cmd->prp1 = cpu_to_le64(pagelist[0]); - cmd->prp2 = cpu_to_le64(req->prp_list_iova); - for (i = 0; i < entries - 1; ++i) { - pagelist[i] = cpu_to_le64(pagelist[i + 1]); - } - pagelist[entries - 1] = 0; + cmd->prp1 = pagelist[0]; + cmd->prp2 = cpu_to_le64(req->prp_list_iova + sizeof(uint64_t)); break; } trace_nvme_cmd_map_qiov(s, cmd, req, qiov, entries); diff --git a/block/qcow2-bitmap.c b/block/qcow2-bitmap.c index accebef4cf..b946301429 100644 --- a/block/qcow2-bitmap.c +++ b/block/qcow2-bitmap.c @@ -77,8 +77,6 @@ typedef struct Qcow2BitmapTable { uint32_t size; /* number of 64bit entries */ QSIMPLEQ_ENTRY(Qcow2BitmapTable) entry; } Qcow2BitmapTable; -typedef QSIMPLEQ_HEAD(Qcow2BitmapTableList, Qcow2BitmapTable) - Qcow2BitmapTableList; typedef struct Qcow2Bitmap { Qcow2BitmapTable table; @@ -1316,7 +1314,7 @@ void qcow2_store_persistent_dirty_bitmaps(BlockDriverState *bs, Error **errp) int ret; Qcow2BitmapList *bm_list; Qcow2Bitmap *bm; - Qcow2BitmapTableList drop_tables; + QSIMPLEQ_HEAD(, Qcow2BitmapTable) drop_tables; Qcow2BitmapTable *tb, *tb_next; if (!bdrv_has_changed_persistent_bitmaps(bs)) { diff --git a/block/qcow2-cluster.c b/block/qcow2-cluster.c index e2737429f5..30eca26c47 100644 --- a/block/qcow2-cluster.c +++ b/block/qcow2-cluster.c @@ -402,7 +402,7 @@ static int count_contiguous_clusters(int nb_clusters, int cluster_size, } } - return i; + return i; } /* diff --git a/block/qcow2.h b/block/qcow2.h index a98d24500b..438a1dee9e 100644 --- a/block/qcow2.h +++ b/block/qcow2.h @@ -278,7 +278,10 @@ typedef struct BDRVQcow2State { QEMUTimer *cache_clean_timer; unsigned cache_clean_interval; - QLIST_HEAD(QCowClusterAlloc, QCowL2Meta) cluster_allocs; + uint8_t *cluster_cache; + uint8_t *cluster_data; + uint64_t cluster_cache_offset; + QLIST_HEAD(, QCowL2Meta) cluster_allocs; uint64_t *refcount_table; uint64_t refcount_table_offset; diff --git a/block/sheepdog.c b/block/sheepdog.c index 0125df9d49..90ab43baa4 100644 --- a/block/sheepdog.c +++ b/block/sheepdog.c @@ -391,12 +391,12 @@ struct BDRVSheepdogState { uint32_t aioreq_seq_num; /* Every aio request must be linked to either of these queues. */ - QLIST_HEAD(inflight_aio_head, AIOReq) inflight_aio_head; - QLIST_HEAD(failed_aio_head, AIOReq) failed_aio_head; + QLIST_HEAD(, AIOReq) inflight_aio_head; + QLIST_HEAD(, AIOReq) failed_aio_head; CoMutex queue_lock; CoQueue overlapping_queue; - QLIST_HEAD(inflight_aiocb_head, SheepdogAIOCB) inflight_aiocb_head; + QLIST_HEAD(, SheepdogAIOCB) inflight_aiocb_head; }; typedef struct BDRVSheepdogReopenState { diff --git a/block/vhdx.h b/block/vhdx.h index 3a5f5293ad..1bfb4e4f73 100644 --- a/block/vhdx.h +++ b/block/vhdx.h @@ -398,7 +398,7 @@ typedef struct BDRVVHDXState { bool log_replayed_on_open; - QLIST_HEAD(VHDXRegionHead, VHDXRegionEntry) regions; + QLIST_HEAD(, VHDXRegionEntry) regions; } BDRVVHDXState; void vhdx_guid_generate(MSGUID *guid); diff --git a/block/vpc.c b/block/vpc.c index 80c5b2b197..d886465b7e 100644 --- a/block/vpc.c +++ b/block/vpc.c @@ -187,7 +187,7 @@ static uint32_t vpc_checksum(uint8_t* buf, size_t size) static int vpc_probe(const uint8_t *buf, int buf_size, const char *filename) { if (buf_size >= 8 && !strncmp((char *)buf, "conectix", 8)) - return 100; + return 100; return 0; } diff --git a/blockdev.c b/blockdev.c index a6f71f9d83..1cc893fe61 100644 --- a/blockdev.c +++ b/blockdev.c @@ -2266,7 +2266,7 @@ void qmp_transaction(TransactionActionList *dev_list, BlkActionState *state, *next; Error *local_err = NULL; - QSIMPLEQ_HEAD(snap_bdrv_states, BlkActionState) snap_bdrv_states; + QSIMPLEQ_HEAD(, BlkActionState) snap_bdrv_states; QSIMPLEQ_INIT(&snap_bdrv_states); /* Does this transaction get canceled as a group on failure? @@ -4252,7 +4252,7 @@ void qmp_blockdev_del(const char *node_name, Error **errp) goto out; } - if (!bs->monitor_list.tqe_prev) { + if (!QTAILQ_IN_USE(bs, monitor_list)) { error_setg(errp, "Node %s is not owned by the monitor", bs->node_name); goto out; diff --git a/bsd-user/elfload.c b/bsd-user/elfload.c index 7cccf3eb8b..32378af7b2 100644 --- a/bsd-user/elfload.c +++ b/bsd-user/elfload.c @@ -1367,7 +1367,7 @@ int load_elf_binary(struct linux_binprm * bprm, struct target_pt_regs * regs, if (!have_guest_base) { /* * Go through ELF program header table and find out whether - * any of the segments drop below our current mmap_min_addr and + * any of the segments drop below our current mmap_min_addr and * in that case set guest_base to corresponding address. */ for (i = 0, elf_ppnt = elf_phdata; i < elf_ex.e_phnum; diff --git a/bsd-user/x86_64/target_syscall.h b/bsd-user/x86_64/target_syscall.h index 211ce29e90..a5d779884f 100644 --- a/bsd-user/x86_64/target_syscall.h +++ b/bsd-user/x86_64/target_syscall.h @@ -12,7 +12,7 @@ struct target_pt_regs { abi_ulong rbp; abi_ulong rbx; /* arguments: non interrupts/non tracing syscalls only save up to here */ - abi_ulong r11; + abi_ulong r11; abi_ulong r10; abi_ulong r9; abi_ulong r8; diff --git a/chardev/spice.c b/chardev/spice.c index e66e3ad568..173c257949 100644 --- a/chardev/spice.c +++ b/chardev/spice.c @@ -77,7 +77,6 @@ static int vmc_read(SpiceCharDeviceInstance *sin, uint8_t *buf, int len) return bytes; } -#if SPICE_SERVER_VERSION >= 0x000c02 static void vmc_event(SpiceCharDeviceInstance *sin, uint8_t event) { SpiceChardev *scd = container_of(sin, SpiceChardev, sin); @@ -95,7 +94,6 @@ static void vmc_event(SpiceCharDeviceInstance *sin, uint8_t event) trace_spice_vmc_event(chr_event); qemu_chr_be_event(chr, chr_event); } -#endif static void vmc_state(SpiceCharDeviceInstance *sin, int connected) { @@ -119,9 +117,7 @@ static SpiceCharDeviceInterface vmc_interface = { .state = vmc_state, .write = vmc_write, .read = vmc_read, -#if SPICE_SERVER_VERSION >= 0x000c02 .event = vmc_event, -#endif #if SPICE_SERVER_VERSION >= 0x000c06 .flags = SPICE_CHAR_DEVICE_NOTIFY_WRITABLE, #endif @@ -223,9 +219,7 @@ static void char_spice_finalize(Object *obj) } g_free((char *)s->sin.subtype); -#if SPICE_SERVER_VERSION >= 0x000c02 g_free((char *)s->sin.portname); -#endif } static void spice_vmc_set_fe_open(struct Chardev *chr, int fe_open) @@ -240,7 +234,6 @@ static void spice_vmc_set_fe_open(struct Chardev *chr, int fe_open) static void spice_port_set_fe_open(struct Chardev *chr, int fe_open) { -#if SPICE_SERVER_VERSION >= 0x000c02 SpiceChardev *s = SPICE_CHARDEV(chr); if (fe_open) { @@ -248,7 +241,6 @@ static void spice_port_set_fe_open(struct Chardev *chr, int fe_open) } else { spice_server_port_event(&s->sin, SPICE_PORT_EVENT_CLOSED); } -#endif } static void spice_chr_accept_input(struct Chardev *chr) @@ -298,7 +290,6 @@ static void qemu_chr_open_spice_vmc(Chardev *chr, chr_open(chr, type); } -#if SPICE_SERVER_VERSION >= 0x000c02 static void qemu_chr_open_spice_port(Chardev *chr, ChardevBackend *backend, bool *be_opened, @@ -331,7 +322,6 @@ void qemu_spice_register_ports(void) vmc_register_interface(s); } } -#endif static void qemu_chr_parse_spice_vmc(QemuOpts *opts, ChardevBackend *backend, Error **errp) diff --git a/configure b/configure index b9f34afc9e..4ea3f14883 100755 --- a/configure +++ b/configure @@ -912,9 +912,6 @@ fi if test "$mingw32" = "yes" ; then EXESUF=".exe" DSOSUF=".dll" - QEMU_CFLAGS="-DWIN32_LEAN_AND_MEAN -DWINVER=0x501 $QEMU_CFLAGS" - # enable C99/POSIX format strings (needs mingw32-runtime 3.15 or later) - QEMU_CFLAGS="-D__USE_MINGW_ANSI_STDIO=1 $QEMU_CFLAGS" # MinGW needs -mthreads for TLS and macro _MT. QEMU_CFLAGS="-mthreads $QEMU_CFLAGS" LIBS="-lwinmm -lws2_32 -liphlpapi $LIBS" @@ -3939,7 +3936,7 @@ if test "$fdt" != "no" ; then cat > $TMPC << EOF #include <libfdt.h> #include <libfdt_env.h> -int main(void) { fdt_first_subnode(0, 0); return 0; } +int main(void) { fdt_check_full(NULL, 0); return 0; } EOF if compile_prog "" "$fdt_libs" ; then # system DTC is good - use it @@ -4622,7 +4619,7 @@ int main(void) { spice_server_new(); return 0; } EOF spice_cflags=$($pkg_config --cflags spice-protocol spice-server 2>/dev/null) spice_libs=$($pkg_config --libs spice-protocol spice-server 2>/dev/null) - if $pkg_config --atleast-version=0.12.0 spice-server && \ + if $pkg_config --atleast-version=0.12.5 spice-server && \ $pkg_config --atleast-version=0.12.3 spice-protocol && \ compile_prog "$spice_cflags" "$spice_libs" ; then spice="yes" @@ -4633,7 +4630,7 @@ EOF else if test "$spice" = "yes" ; then feature_not_found "spice" \ - "Install spice-server(>=0.12.0) and spice-protocol(>=0.12.3) devel" + "Install spice-server(>=0.12.5) and spice-protocol(>=0.12.3) devel" fi spice="no" fi @@ -7490,7 +7487,8 @@ alpha) esac if test "$gprof" = "yes" ; then - echo "TARGET_GPROF=yes" >> $config_target_mak + echo "CONFIG_GPROF=y" >> $config_host_mak + echo "TARGET_GPROF=y" >> $config_target_mak if test "$target_linux_user" = "yes" ; then cflags="-p $cflags" ldflags="-p $ldflags" diff --git a/contrib/elf2dmp/main.c b/contrib/elf2dmp/main.c index 9b93dab662..7115b0d6d0 100644 --- a/contrib/elf2dmp/main.c +++ b/contrib/elf2dmp/main.c @@ -296,7 +296,7 @@ static int fill_header(WinDumpHeader64 *hdr, struct pa_space *ps, static int fill_context(KDDEBUGGER_DATA64 *kdbg, struct va_space *vs, QEMU_Elf *qe) { - int i; + int i; for (i = 0; i < qe->state_nr; i++) { uint64_t Prcb; uint64_t Context; diff --git a/contrib/ivshmem-client/ivshmem-client.h b/contrib/ivshmem-client/ivshmem-client.h index 5ee942262b..fe3cc4a03d 100644 --- a/contrib/ivshmem-client/ivshmem-client.h +++ b/contrib/ivshmem-client/ivshmem-client.h @@ -46,9 +46,7 @@ typedef struct IvshmemClientPeer { int vectors[IVSHMEM_CLIENT_MAX_VECTORS]; /**< one fd per vector */ unsigned vectors_count; /**< number of vectors */ } IvshmemClientPeer; -QTAILQ_HEAD(IvshmemClientPeerList, IvshmemClientPeer); -typedef struct IvshmemClientPeerList IvshmemClientPeerList; typedef struct IvshmemClient IvshmemClient; /** @@ -73,7 +71,7 @@ struct IvshmemClient { int sock_fd; /**< unix sock filedesc */ int shm_fd; /**< shm file descriptor */ - IvshmemClientPeerList peer_list; /**< list of peers */ + QTAILQ_HEAD(, IvshmemClientPeer) peer_list; /**< list of peers */ IvshmemClientPeer local; /**< our own infos */ IvshmemClientNotifCb notif_cb; /**< notification callback */ diff --git a/contrib/ivshmem-server/ivshmem-server.h b/contrib/ivshmem-server/ivshmem-server.h index 4af08e1bb7..d870adb6a0 100644 --- a/contrib/ivshmem-server/ivshmem-server.h +++ b/contrib/ivshmem-server/ivshmem-server.h @@ -52,9 +52,6 @@ typedef struct IvshmemServerPeer { EventNotifier vectors[IVSHMEM_SERVER_MAX_VECTORS]; /**< one per vector */ unsigned vectors_count; /**< number of vectors */ } IvshmemServerPeer; -QTAILQ_HEAD(IvshmemServerPeerList, IvshmemServerPeer); - -typedef struct IvshmemServerPeerList IvshmemServerPeerList; /** * Structure describing an ivshmem server @@ -72,7 +69,7 @@ typedef struct IvshmemServer { unsigned n_vectors; /**< number of vectors */ uint16_t cur_id; /**< id to be given to next client */ bool verbose; /**< true in verbose mode */ - IvshmemServerPeerList peer_list; /**< list of peers */ + QTAILQ_HEAD(, IvshmemServerPeer) peer_list; /**< list of peers */ } IvshmemServer; /** diff --git a/cpus-common.c b/cpus-common.c index 98dd8c6ff1..3ca58c64e8 100644 --- a/cpus-common.c +++ b/cpus-common.c @@ -99,7 +99,7 @@ void cpu_list_remove(CPUState *cpu) return; } - assert(!(cpu_index_auto_assigned && cpu != QTAILQ_LAST(&cpus, CPUTailQ))); + assert(!(cpu_index_auto_assigned && cpu != QTAILQ_LAST(&cpus))); QTAILQ_REMOVE_RCU(&cpus, cpu, node); cpu->cpu_index = UNASSIGNED_CPU_INDEX; diff --git a/crypto/aes.c b/crypto/aes.c index 3456eacd08..773d246b00 100644 --- a/crypto/aes.c +++ b/crypto/aes.c @@ -1071,7 +1071,7 @@ int AES_set_encrypt_key(const unsigned char *userKey, const int bits, AES_KEY *key) { u32 *rk; - int i = 0; + int i = 0; u32 temp; if (!userKey || !key) @@ -1160,7 +1160,7 @@ int AES_set_encrypt_key(const unsigned char *userKey, const int bits, rk[15] = rk[ 7] ^ rk[14]; rk += 8; - } + } } abort(); } @@ -1247,7 +1247,7 @@ void AES_encrypt(const unsigned char *in, unsigned char *out, t1 = AES_Te0[s1 >> 24] ^ AES_Te1[(s2 >> 16) & 0xff] ^ AES_Te2[(s3 >> 8) & 0xff] ^ AES_Te3[s0 & 0xff] ^ rk[ 5]; t2 = AES_Te0[s2 >> 24] ^ AES_Te1[(s3 >> 16) & 0xff] ^ AES_Te2[(s0 >> 8) & 0xff] ^ AES_Te3[s1 & 0xff] ^ rk[ 6]; t3 = AES_Te0[s3 >> 24] ^ AES_Te1[(s0 >> 16) & 0xff] ^ AES_Te2[(s1 >> 8) & 0xff] ^ AES_Te3[s2 & 0xff] ^ rk[ 7]; - /* round 2: */ + /* round 2: */ s0 = AES_Te0[t0 >> 24] ^ AES_Te1[(t1 >> 16) & 0xff] ^ AES_Te2[(t2 >> 8) & 0xff] ^ AES_Te3[t3 & 0xff] ^ rk[ 8]; s1 = AES_Te0[t1 >> 24] ^ AES_Te1[(t2 >> 16) & 0xff] ^ AES_Te2[(t3 >> 8) & 0xff] ^ AES_Te3[t0 & 0xff] ^ rk[ 9]; s2 = AES_Te0[t2 >> 24] ^ AES_Te1[(t3 >> 16) & 0xff] ^ AES_Te2[(t0 >> 8) & 0xff] ^ AES_Te3[t1 & 0xff] ^ rk[10]; @@ -1257,7 +1257,7 @@ void AES_encrypt(const unsigned char *in, unsigned char *out, t1 = AES_Te0[s1 >> 24] ^ AES_Te1[(s2 >> 16) & 0xff] ^ AES_Te2[(s3 >> 8) & 0xff] ^ AES_Te3[s0 & 0xff] ^ rk[13]; t2 = AES_Te0[s2 >> 24] ^ AES_Te1[(s3 >> 16) & 0xff] ^ AES_Te2[(s0 >> 8) & 0xff] ^ AES_Te3[s1 & 0xff] ^ rk[14]; t3 = AES_Te0[s3 >> 24] ^ AES_Te1[(s0 >> 16) & 0xff] ^ AES_Te2[(s1 >> 8) & 0xff] ^ AES_Te3[s2 & 0xff] ^ rk[15]; - /* round 4: */ + /* round 4: */ s0 = AES_Te0[t0 >> 24] ^ AES_Te1[(t1 >> 16) & 0xff] ^ AES_Te2[(t2 >> 8) & 0xff] ^ AES_Te3[t3 & 0xff] ^ rk[16]; s1 = AES_Te0[t1 >> 24] ^ AES_Te1[(t2 >> 16) & 0xff] ^ AES_Te2[(t3 >> 8) & 0xff] ^ AES_Te3[t0 & 0xff] ^ rk[17]; s2 = AES_Te0[t2 >> 24] ^ AES_Te1[(t3 >> 16) & 0xff] ^ AES_Te2[(t0 >> 8) & 0xff] ^ AES_Te3[t1 & 0xff] ^ rk[18]; @@ -1267,7 +1267,7 @@ void AES_encrypt(const unsigned char *in, unsigned char *out, t1 = AES_Te0[s1 >> 24] ^ AES_Te1[(s2 >> 16) & 0xff] ^ AES_Te2[(s3 >> 8) & 0xff] ^ AES_Te3[s0 & 0xff] ^ rk[21]; t2 = AES_Te0[s2 >> 24] ^ AES_Te1[(s3 >> 16) & 0xff] ^ AES_Te2[(s0 >> 8) & 0xff] ^ AES_Te3[s1 & 0xff] ^ rk[22]; t3 = AES_Te0[s3 >> 24] ^ AES_Te1[(s0 >> 16) & 0xff] ^ AES_Te2[(s1 >> 8) & 0xff] ^ AES_Te3[s2 & 0xff] ^ rk[23]; - /* round 6: */ + /* round 6: */ s0 = AES_Te0[t0 >> 24] ^ AES_Te1[(t1 >> 16) & 0xff] ^ AES_Te2[(t2 >> 8) & 0xff] ^ AES_Te3[t3 & 0xff] ^ rk[24]; s1 = AES_Te0[t1 >> 24] ^ AES_Te1[(t2 >> 16) & 0xff] ^ AES_Te2[(t3 >> 8) & 0xff] ^ AES_Te3[t0 & 0xff] ^ rk[25]; s2 = AES_Te0[t2 >> 24] ^ AES_Te1[(t3 >> 16) & 0xff] ^ AES_Te2[(t0 >> 8) & 0xff] ^ AES_Te3[t1 & 0xff] ^ rk[26]; @@ -1277,7 +1277,7 @@ void AES_encrypt(const unsigned char *in, unsigned char *out, t1 = AES_Te0[s1 >> 24] ^ AES_Te1[(s2 >> 16) & 0xff] ^ AES_Te2[(s3 >> 8) & 0xff] ^ AES_Te3[s0 & 0xff] ^ rk[29]; t2 = AES_Te0[s2 >> 24] ^ AES_Te1[(s3 >> 16) & 0xff] ^ AES_Te2[(s0 >> 8) & 0xff] ^ AES_Te3[s1 & 0xff] ^ rk[30]; t3 = AES_Te0[s3 >> 24] ^ AES_Te1[(s0 >> 16) & 0xff] ^ AES_Te2[(s1 >> 8) & 0xff] ^ AES_Te3[s2 & 0xff] ^ rk[31]; - /* round 8: */ + /* round 8: */ s0 = AES_Te0[t0 >> 24] ^ AES_Te1[(t1 >> 16) & 0xff] ^ AES_Te2[(t2 >> 8) & 0xff] ^ AES_Te3[t3 & 0xff] ^ rk[32]; s1 = AES_Te0[t1 >> 24] ^ AES_Te1[(t2 >> 16) & 0xff] ^ AES_Te2[(t3 >> 8) & 0xff] ^ AES_Te3[t0 & 0xff] ^ rk[33]; s2 = AES_Te0[t2 >> 24] ^ AES_Te1[(t3 >> 16) & 0xff] ^ AES_Te2[(t0 >> 8) & 0xff] ^ AES_Te3[t1 & 0xff] ^ rk[34]; @@ -1569,33 +1569,33 @@ void AES_decrypt(const unsigned char *in, unsigned char *out, * apply last round and * map cipher state to byte array block: */ - s0 = + s0 = (AES_Td4[(t0 >> 24) ] & 0xff000000) ^ (AES_Td4[(t3 >> 16) & 0xff] & 0x00ff0000) ^ (AES_Td4[(t2 >> 8) & 0xff] & 0x0000ff00) ^ (AES_Td4[(t1 ) & 0xff] & 0x000000ff) ^ - rk[0]; + rk[0]; PUTU32(out , s0); - s1 = + s1 = (AES_Td4[(t1 >> 24) ] & 0xff000000) ^ (AES_Td4[(t0 >> 16) & 0xff] & 0x00ff0000) ^ (AES_Td4[(t3 >> 8) & 0xff] & 0x0000ff00) ^ (AES_Td4[(t2 ) & 0xff] & 0x000000ff) ^ - rk[1]; + rk[1]; PUTU32(out + 4, s1); - s2 = + s2 = (AES_Td4[(t2 >> 24) ] & 0xff000000) ^ (AES_Td4[(t1 >> 16) & 0xff] & 0x00ff0000) ^ (AES_Td4[(t0 >> 8) & 0xff] & 0x0000ff00) ^ (AES_Td4[(t3 ) & 0xff] & 0x000000ff) ^ - rk[2]; + rk[2]; PUTU32(out + 8, s2); - s3 = + s3 = (AES_Td4[(t3 >> 24) ] & 0xff000000) ^ (AES_Td4[(t2 >> 16) & 0xff] & 0x00ff0000) ^ (AES_Td4[(t1 >> 8) & 0xff] & 0x0000ff00) ^ (AES_Td4[(t0 ) & 0xff] & 0x000000ff) ^ - rk[3]; + rk[3]; PUTU32(out + 12, s3); } diff --git a/disas/alpha.c b/disas/alpha.c index b7b0ae0d92..a0c9ecd49d 100644 --- a/disas/alpha.c +++ b/disas/alpha.c @@ -672,7 +672,7 @@ extract_ev6hwjhint(unsigned insn, int *invalid ATTRIBUTE_UNUSED) OPCODE is the instruction opcode. MASK is the opcode mask; this is used to tell the disassembler - which bits in the actual opcode must match OPCODE. + which bits in the actual opcode must match OPCODE. OPERANDS is the list of operands. @@ -699,10 +699,10 @@ extract_ev6hwjhint(unsigned insn, int *invalid ATTRIBUTE_UNUSED) And two annotations: EV56 BUT opcodes that are officially introduced as of the ev56, - but with defined results on previous implementations. + but with defined results on previous implementations. EV56 UNA opcodes that were introduced as of the ev56 with - presumably undefined results on previous implementations + presumably undefined results on previous implementations that were not assigned to a particular extension. */ @@ -832,7 +832,7 @@ const struct alpha_opcode alpha_opcodes[] = { { "cmovgt", OPR(0x11,0x66), BASE, ARG_OPR }, { "cmovgt", OPRL(0x11,0x66), BASE, ARG_OPRL }, { "implver", OPRL_(0x11,0x6C)|(31<<21)|(1<<13), - 0xFFFFFFE0, BASE, { RC } }, /* ev56 but */ + 0xFFFFFFE0, BASE, { RC } }, /* ev56 but */ { "mskbl", OPR(0x12,0x02), BASE, ARG_OPR }, { "mskbl", OPRL(0x12,0x02), BASE, ARG_OPRL }, diff --git a/disas/arm.c b/disas/arm.c index dda7b2a943..17ea120b44 100644 --- a/disas/arm.c +++ b/disas/arm.c @@ -1077,7 +1077,7 @@ static const struct opcode32 arm_opcodes[] = %S print Thumb register (bits 3..5 as high number if bit 6 set) %D print Thumb register (bits 0..2 as high number if bit 7 set) %<bitfield>I print bitfield as a signed decimal - (top bit of range being the sign bit) + (top bit of range being the sign bit) %N print Thumb register mask (with LR) %O print Thumb register mask (with PC) %M print Thumb register mask diff --git a/disas/i386.c b/disas/i386.c index a557e678ec..fc03b9f06a 100644 --- a/disas/i386.c +++ b/disas/i386.c @@ -6075,7 +6075,7 @@ OP_EM (int bytemode, int sizeflag) { bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode; used_prefixes |= (prefixes & PREFIX_DATA); - } + } OP_E (bytemode, sizeflag); return; } @@ -6112,7 +6112,7 @@ OP_EMC (int bytemode, int sizeflag) { bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode; used_prefixes |= (prefixes & PREFIX_DATA); - } + } OP_E (bytemode, sizeflag); return; } diff --git a/disas/m68k.c b/disas/m68k.c index 0dc8aa1a3c..e544c7137f 100644 --- a/disas/m68k.c +++ b/disas/m68k.c @@ -350,7 +350,7 @@ struct m68k_opcode_alias * all (modes 0-6,7.0-4) ~ alterable memory (modes 2-6,7.0,7.1) - (not 0,1,7.2-4) + (not 0,1,7.2-4) % alterable (modes 0-6,7.0,7.1) (not 7.2-4) ; data (modes 0,2-6,7.0-4) @@ -1647,7 +1647,7 @@ print_insn_arg (const char *d, case 0x15: name = "%val"; break; case 0x16: name = "%scc"; break; case 0x17: name = "%ac"; break; - case 0x18: name = "%psr"; break; + case 0x18: name = "%psr"; break; case 0x19: name = "%pcsr"; break; case 0x1c: case 0x1d: diff --git a/dump.c b/dump.c index 4ec94c5e25..ef1d8025c9 100644 --- a/dump.c +++ b/dump.c @@ -1557,7 +1557,7 @@ static void get_max_mapnr(DumpState *s) { GuestPhysBlock *last_block; - last_block = QTAILQ_LAST(&s->guest_phys_blocks.head, GuestPhysBlockHead); + last_block = QTAILQ_LAST(&s->guest_phys_blocks.head); s->max_mapnr = dump_paddr_to_pfn(s, last_block->target_end); } diff --git a/exec.c b/exec.c index 6e875f0640..895449f926 100644 --- a/exec.c +++ b/exec.c @@ -94,7 +94,8 @@ int target_page_bits; bool target_page_bits_decided; #endif -struct CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus); +CPUTailQ cpus = QTAILQ_HEAD_INITIALIZER(cpus); + /* current CPU in the current thread. It is only valid inside cpu_exec() */ __thread CPUState *current_cpu; @@ -3471,7 +3472,7 @@ typedef struct MapClient { } MapClient; QemuMutex map_client_list_lock; -static QLIST_HEAD(map_client_list, MapClient) map_client_list +static QLIST_HEAD(, MapClient) map_client_list = QLIST_HEAD_INITIALIZER(map_client_list); static void cpu_unregister_map_client_do(MapClient *client) diff --git a/fsdev/qemu-fsdev.c b/fsdev/qemu-fsdev.c index 4536fd977d..54cb36a212 100644 --- a/fsdev/qemu-fsdev.c +++ b/fsdev/qemu-fsdev.c @@ -18,7 +18,7 @@ #include "qemu/error-report.h" #include "qemu/option.h" -static QTAILQ_HEAD(FsDriverEntry_head, FsDriverListEntry) fsdriver_entries = +static QTAILQ_HEAD(, FsDriverListEntry) fsdriver_entries = QTAILQ_HEAD_INITIALIZER(fsdriver_entries); static FsDriverTable FsDrivers[] = { diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index cbacea5fbd..397e2dcdc7 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -664,8 +664,8 @@ static bool window_translate(TyphoonWindow *win, hwaddr addr, pte_addr |= (addr & (wsm | 0xfe000)) >> 10; return pte_translate(pte_addr, ret); } else { - /* Direct-mapped translation. */ - return make_iommu_tlbe(tba & ~wsm_ext, wsm_ext, ret); + /* Direct-mapped translation. */ + return make_iommu_tlbe(tba & ~wsm_ext, wsm_ext, ret); } } @@ -700,7 +700,7 @@ static IOMMUTLBEntry typhoon_translate_iommu(IOMMUMemoryRegion *iommu, /* Check the fourth window for DAC disable. */ if ((pchip->win[3].wba & 0x80000000000ull) == 0 - && window_translate(&pchip->win[3], addr, &ret)) { + && window_translate(&pchip->win[3], addr, &ret)) { goto success; } } else { @@ -711,7 +711,7 @@ static IOMMUTLBEntry typhoon_translate_iommu(IOMMUMemoryRegion *iommu, if (pchip->ctl & 0x40) { /* See 10.1.4.4; in particular <39:35> is ignored. */ make_iommu_tlbe(0, 0x007ffffffffull, &ret); - goto success; + goto success; } } @@ -723,8 +723,8 @@ static IOMMUTLBEntry typhoon_translate_iommu(IOMMUMemoryRegion *iommu, pte_addr = pchip->win[3].tba & 0x7ffc00000ull; pte_addr |= (addr & 0xffffe000u) >> 10; if (pte_translate(pte_addr, &ret)) { - goto success; - } + goto success; + } } } } diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 6c69ce79b2..442529cc65 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -131,7 +131,7 @@ static void gptm_tick(void *opaque) s->state |= 1; if ((s->control & 0x20)) { /* Output trigger. */ - qemu_irq_pulse(s->trigger); + qemu_irq_pulse(s->trigger); } if (s->mode[0] & 1) { /* One-shot. */ diff --git a/hw/audio/marvell_88w8618.c b/hw/audio/marvell_88w8618.c index 6600ab4851..035dd76cbf 100644 --- a/hw/audio/marvell_88w8618.c +++ b/hw/audio/marvell_88w8618.c @@ -12,7 +12,6 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" #include "hw/hw.h" -#include "hw/i2c/i2c.h" #include "hw/audio/wm8750.h" #include "audio/audio.h" #include "qapi/error.h" diff --git a/hw/block/nvme.h b/hw/block/nvme.h index cabcf20c32..56c9d4b4b1 100644 --- a/hw/block/nvme.h +++ b/hw/block/nvme.h @@ -29,8 +29,8 @@ typedef struct NvmeSQueue { uint64_t dma_addr; QEMUTimer *timer; NvmeRequest *io_req; - QTAILQ_HEAD(sq_req_list, NvmeRequest) req_list; - QTAILQ_HEAD(out_req_list, NvmeRequest) out_req_list; + QTAILQ_HEAD(, NvmeRequest) req_list; + QTAILQ_HEAD(, NvmeRequest) out_req_list; QTAILQ_ENTRY(NvmeSQueue) entry; } NvmeSQueue; @@ -45,8 +45,8 @@ typedef struct NvmeCQueue { uint32_t size; uint64_t dma_addr; QEMUTimer *timer; - QTAILQ_HEAD(sq_list, NvmeSQueue) sq_list; - QTAILQ_HEAD(cq_req_list, NvmeRequest) req_list; + QTAILQ_HEAD(, NvmeSQueue) sq_list; + QTAILQ_HEAD(, NvmeRequest) req_list; } NvmeCQueue; typedef struct NvmeNamespace { diff --git a/hw/block/xen_disk.c b/hw/block/xen_disk.c index 36eff94f84..2a254b99d0 100644 --- a/hw/block/xen_disk.c +++ b/hw/block/xen_disk.c @@ -82,9 +82,9 @@ struct XenBlkDev { int more_work; /* request lists */ - QLIST_HEAD(inflight_head, ioreq) inflight; - QLIST_HEAD(finished_head, ioreq) finished; - QLIST_HEAD(freelist_head, ioreq) freelist; + QLIST_HEAD(, ioreq) inflight; + QLIST_HEAD(, ioreq) finished; + QLIST_HEAD(, ioreq) freelist; int requests_total; int requests_inflight; int requests_finished; diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.c index 12831561a6..67740b7ee6 100644 --- a/hw/char/sh_serial.c +++ b/hw/char/sh_serial.c @@ -90,7 +90,7 @@ static void sh_serial_write(void *opaque, hwaddr offs, #ifdef DEBUG_SERIAL printf("sh_serial: write offs=0x%02x val=0x%02x\n", - offs, val); + offs, val); #endif switch(offs) { case 0x00: /* SMR */ @@ -98,17 +98,17 @@ static void sh_serial_write(void *opaque, hwaddr offs, return; case 0x04: /* BRR */ s->brr = val; - return; + return; case 0x08: /* SCR */ /* TODO : For SH7751, SCIF mask should be 0xfb. */ s->scr = val & ((s->feat & SH_SERIAL_FEAT_SCIF) ? 0xfa : 0xff); if (!(val & (1 << 5))) s->flags |= SH_SERIAL_FLAG_TEND; if ((s->feat & SH_SERIAL_FEAT_SCIF) && s->txi) { - qemu_set_irq(s->txi, val & (1 << 7)); + qemu_set_irq(s->txi, val & (1 << 7)); } if (!(val & (1 << 6))) { - qemu_set_irq(s->rxi, 0); + qemu_set_irq(s->rxi, 0); } return; case 0x0c: /* FTDR / TDR */ @@ -117,9 +117,9 @@ static void sh_serial_write(void *opaque, hwaddr offs, /* XXX this blocks entire thread. Rewrite to use * qemu_chr_fe_write and background I/O callbacks */ qemu_chr_fe_write_all(&s->chr, &ch, 1); - } - s->dr = val; - s->flags &= ~SH_SERIAL_FLAG_TDE; + } + s->dr = val; + s->flags &= ~SH_SERIAL_FLAG_TDE; return; #if 0 case 0x14: /* FRDR / RDR */ @@ -210,7 +210,7 @@ static uint64_t sh_serial_read(void *opaque, hwaddr offs, break; case 0x04: ret = s->brr; - break; + break; case 0x08: ret = s->scr; break; @@ -288,7 +288,7 @@ static uint64_t sh_serial_read(void *opaque, hwaddr offs, } #ifdef DEBUG_SERIAL printf("sh_serial: read offs=0x%02x val=0x%x\n", - offs, ret); + offs, ret); #endif if (ret & ~((1 << 16) - 1)) { diff --git a/hw/char/virtio-serial-bus.c b/hw/char/virtio-serial-bus.c index 04e3ebe352..d76351d748 100644 --- a/hw/char/virtio-serial-bus.c +++ b/hw/char/virtio-serial-bus.c @@ -696,7 +696,7 @@ static void virtio_serial_save_device(VirtIODevice *vdev, QEMUFile *f) qemu_put_byte(f, port->guest_connected); qemu_put_byte(f, port->host_connected); - elem_popped = 0; + elem_popped = 0; if (port->elem) { elem_popped = 1; } diff --git a/hw/char/xen_console.c b/hw/char/xen_console.c index 44f7236382..b1a1e66d5a 100644 --- a/hw/char/xen_console.c +++ b/hw/char/xen_console.c @@ -60,34 +60,34 @@ static void buffer_append(struct XenConsole *con) size = prod - cons; if ((size == 0) || (size > sizeof(intf->out))) - return; + return; if ((buffer->capacity - buffer->size) < size) { - buffer->capacity += (size + 1024); - buffer->data = g_realloc(buffer->data, buffer->capacity); + buffer->capacity += (size + 1024); + buffer->data = g_realloc(buffer->data, buffer->capacity); } while (cons != prod) - buffer->data[buffer->size++] = intf->out[ - MASK_XENCONS_IDX(cons++, intf->out)]; + buffer->data[buffer->size++] = intf->out[ + MASK_XENCONS_IDX(cons++, intf->out)]; xen_mb(); intf->out_cons = cons; xen_pv_send_notify(&con->xendev); if (buffer->max_capacity && - buffer->size > buffer->max_capacity) { - /* Discard the middle of the data. */ + buffer->size > buffer->max_capacity) { + /* Discard the middle of the data. */ - size_t over = buffer->size - buffer->max_capacity; - uint8_t *maxpos = buffer->data + buffer->max_capacity; + size_t over = buffer->size - buffer->max_capacity; + uint8_t *maxpos = buffer->data + buffer->max_capacity; - memmove(maxpos - over, maxpos, over); - buffer->data = g_realloc(buffer->data, buffer->max_capacity); - buffer->size = buffer->capacity = buffer->max_capacity; + memmove(maxpos - over, maxpos, over); + buffer->data = g_realloc(buffer->data, buffer->max_capacity); + buffer->size = buffer->capacity = buffer->max_capacity; - if (buffer->consumed > buffer->max_capacity - over) - buffer->consumed = buffer->max_capacity - over; + if (buffer->consumed > buffer->max_capacity - over) + buffer->consumed = buffer->max_capacity - over; } } @@ -95,8 +95,8 @@ static void buffer_advance(struct buffer *buffer, size_t len) { buffer->consumed += len; if (buffer->consumed == buffer->size) { - buffer->consumed = 0; - buffer->size = 0; + buffer->consumed = 0; + buffer->size = 0; } } @@ -111,7 +111,7 @@ static int ring_free_bytes(struct XenConsole *con) space = prod - cons; if (space > sizeof(intf->in)) - return 0; /* ring is screwed: ignore it */ + return 0; /* ring is screwed: ignore it */ return (sizeof(intf->in) - space); } @@ -132,12 +132,12 @@ static void xencons_receive(void *opaque, const uint8_t *buf, int len) max = ring_free_bytes(con); /* The can_receive() func limits this, but check again anyway */ if (max < len) - len = max; + len = max; prod = intf->in_prod; for (i = 0; i < len; i++) { - intf->in[MASK_XENCONS_IDX(prod++, intf->in)] = - buf[i]; + intf->in[MASK_XENCONS_IDX(prod++, intf->in)] = + buf[i]; } xen_wmb(); intf->in_prod = prod; @@ -228,11 +228,11 @@ static int con_initialise(struct XenDevice *xendev) int limit; if (xenstore_read_int(con->console, "ring-ref", &con->ring_ref) == -1) - return -1; + return -1; if (xenstore_read_int(con->console, "port", &con->xendev.remote_port) == -1) - return -1; + return -1; if (xenstore_read_int(con->console, "limit", &limit) == 0) - con->buffer.max_capacity = limit; + con->buffer.max_capacity = limit; if (!xendev->dev) { xen_pfn_t mfn = con->ring_ref; @@ -244,7 +244,7 @@ static int con_initialise(struct XenDevice *xendev) PROT_READ | PROT_WRITE); } if (!con->sring) - return -1; + return -1; xen_be_bind_evtchn(&con->xendev); qemu_chr_fe_set_handlers(&con->chr, xencons_can_receive, @@ -252,10 +252,10 @@ static int con_initialise(struct XenDevice *xendev) xen_pv_printf(xendev, 1, "ring mfn %d, remote port %d, local port %d, limit %zd\n", - con->ring_ref, - con->xendev.remote_port, - con->xendev.local_port, - con->buffer.max_capacity); + con->ring_ref, + con->xendev.remote_port, + con->xendev.local_port, + con->buffer.max_capacity); return 0; } @@ -282,7 +282,7 @@ static void con_event(struct XenDevice *xendev) buffer_append(con); if (con->buffer.size - con->buffer.consumed) - xencons_send(con); + xencons_send(con); } /* -------------------------------------------------------------------- */ diff --git a/hw/core/loader.c b/hw/core/loader.c index c7182dfa64..c4f62fe427 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -244,26 +244,26 @@ int load_aout(const char *filename, hwaddr addr, int max_sz, case OMAGIC: if (e.a_text + e.a_data > max_sz) goto fail; - lseek(fd, N_TXTOFF(e), SEEK_SET); - size = read_targphys(filename, fd, addr, e.a_text + e.a_data); - if (size < 0) - goto fail; - break; + lseek(fd, N_TXTOFF(e), SEEK_SET); + size = read_targphys(filename, fd, addr, e.a_text + e.a_data); + if (size < 0) + goto fail; + break; case NMAGIC: if (N_DATADDR(e, target_page_size) + e.a_data > max_sz) goto fail; - lseek(fd, N_TXTOFF(e), SEEK_SET); - size = read_targphys(filename, fd, addr, e.a_text); - if (size < 0) - goto fail; + lseek(fd, N_TXTOFF(e), SEEK_SET); + size = read_targphys(filename, fd, addr, e.a_text); + if (size < 0) + goto fail; ret = read_targphys(filename, fd, addr + N_DATADDR(e, target_page_size), e.a_data); - if (ret < 0) - goto fail; - size += ret; - break; + if (ret < 0) + goto fail; + size += ret; + break; default: - goto fail; + goto fail; } close(fd); return size; diff --git a/hw/core/machine.c b/hw/core/machine.c index f8563efb86..95dc7c3913 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -24,23 +24,10 @@ #include "hw/pci/pci.h" GlobalProperty hw_compat_3_1[] = { - { - .driver = "pcie-root-port", - .property = "x-speed", - .value = "2_5", - },{ - .driver = "pcie-root-port", - .property = "x-width", - .value = "1", - },{ - .driver = "memory-backend-file", - .property = "x-use-canonical-path-for-ramblock-id", - .value = "true", - },{ - .driver = "memory-backend-memfd", - .property = "x-use-canonical-path-for-ramblock-id", - .value = "true", - }, + { "pcie-root-port", "x-speed", "2_5" }, + { "pcie-root-port", "x-width", "1" }, + { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, + { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, }; const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); @@ -48,269 +35,96 @@ GlobalProperty hw_compat_3_0[] = {}; const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); GlobalProperty hw_compat_2_12[] = { - { - .driver = "migration", - .property = "decompress-error-check", - .value = "off", - },{ - .driver = "hda-audio", - .property = "use-timer", - .value = "false", - },{ - .driver = "cirrus-vga", - .property = "global-vmstate", - .value = "true", - },{ - .driver = "VGA", - .property = "global-vmstate", - .value = "true", - },{ - .driver = "vmware-svga", - .property = "global-vmstate", - .value = "true", - },{ - .driver = "qxl-vga", - .property = "global-vmstate", - .value = "true", - }, + { "migration", "decompress-error-check", "off" }, + { "hda-audio", "use-timer", "false" }, + { "cirrus-vga", "global-vmstate", "true" }, + { "VGA", "global-vmstate", "true" }, + { "vmware-svga", "global-vmstate", "true" }, + { "qxl-vga", "global-vmstate", "true" }, }; const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); GlobalProperty hw_compat_2_11[] = { - { - .driver = "hpet", - .property = "hpet-offset-saved", - .value = "false", - },{ - .driver = "virtio-blk-pci", - .property = "vectors", - .value = "2", - },{ - .driver = "vhost-user-blk-pci", - .property = "vectors", - .value = "2", - },{ - .driver = "e1000", - .property = "migrate_tso_props", - .value = "off", - }, + { "hpet", "hpet-offset-saved", "false" }, + { "virtio-blk-pci", "vectors", "2" }, + { "vhost-user-blk-pci", "vectors", "2" }, + { "e1000", "migrate_tso_props", "off" }, }; const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); GlobalProperty hw_compat_2_10[] = { - { - .driver = "virtio-mouse-device", - .property = "wheel-axis", - .value = "false", - },{ - .driver = "virtio-tablet-device", - .property = "wheel-axis", - .value = "false", - }, + { "virtio-mouse-device", "wheel-axis", "false" }, + { "virtio-tablet-device", "wheel-axis", "false" }, }; const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); GlobalProperty hw_compat_2_9[] = { - { - .driver = "pci-bridge", - .property = "shpc", - .value = "off", - },{ - .driver = "intel-iommu", - .property = "pt", - .value = "off", - },{ - .driver = "virtio-net-device", - .property = "x-mtu-bypass-backend", - .value = "off", - },{ - .driver = "pcie-root-port", - .property = "x-migrate-msix", - .value = "false", - }, + { "pci-bridge", "shpc", "off" }, + { "intel-iommu", "pt", "off" }, + { "virtio-net-device", "x-mtu-bypass-backend", "off" }, + { "pcie-root-port", "x-migrate-msix", "false" }, }; const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); GlobalProperty hw_compat_2_8[] = { - { - .driver = "fw_cfg_mem", - .property = "x-file-slots", - .value = stringify(0x10), - },{ - .driver = "fw_cfg_io", - .property = "x-file-slots", - .value = stringify(0x10), - },{ - .driver = "pflash_cfi01", - .property = "old-multiple-chip-handling", - .value = "on", - },{ - .driver = "pci-bridge", - .property = "shpc", - .value = "on", - },{ - .driver = TYPE_PCI_DEVICE, - .property = "x-pcie-extcap-init", - .value = "off", - },{ - .driver = "virtio-pci", - .property = "x-pcie-deverr-init", - .value = "off", - },{ - .driver = "virtio-pci", - .property = "x-pcie-lnkctl-init", - .value = "off", - },{ - .driver = "virtio-pci", - .property = "x-pcie-pm-init", - .value = "off", - },{ - .driver = "cirrus-vga", - .property = "vgamem_mb", - .value = "8", - },{ - .driver = "isa-cirrus-vga", - .property = "vgamem_mb", - .value = "8", - }, + { "fw_cfg_mem", "x-file-slots", "0x10" }, + { "fw_cfg_io", "x-file-slots", "0x10" }, + { "pflash_cfi01", "old-multiple-chip-handling", "on" }, + { "pci-bridge", "shpc", "on" }, + { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, + { "virtio-pci", "x-pcie-deverr-init", "off" }, + { "virtio-pci", "x-pcie-lnkctl-init", "off" }, + { "virtio-pci", "x-pcie-pm-init", "off" }, + { "cirrus-vga", "vgamem_mb", "8" }, + { "isa-cirrus-vga", "vgamem_mb", "8" }, }; const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); GlobalProperty hw_compat_2_7[] = { - { - .driver = "virtio-pci", - .property = "page-per-vq", - .value = "on", - },{ - .driver = "virtio-serial-device", - .property = "emergency-write", - .value = "off", - },{ - .driver = "ioapic", - .property = "version", - .value = "0x11", - },{ - .driver = "intel-iommu", - .property = "x-buggy-eim", - .value = "true", - },{ - .driver = "virtio-pci", - .property = "x-ignore-backend-features", - .value = "on", - }, + { "virtio-pci", "page-per-vq", "on" }, + { "virtio-serial-device", "emergency-write", "off" }, + { "ioapic", "version", "0x11" }, + { "intel-iommu", "x-buggy-eim", "true" }, + { "virtio-pci", "x-ignore-backend-features", "on" }, }; const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); GlobalProperty hw_compat_2_6[] = { - { - .driver = "virtio-mmio", - .property = "format_transport_address", - .value = "off", - },{ - .driver = "virtio-pci", - .property = "disable-modern", - .value = "on", - },{ - .driver = "virtio-pci", - .property = "disable-legacy", - .value = "off", - }, + { "virtio-mmio", "format_transport_address", "off" }, + { "virtio-pci", "disable-modern", "on" }, + { "virtio-pci", "disable-legacy", "off" }, }; const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); GlobalProperty hw_compat_2_5[] = { - { - .driver = "isa-fdc", - .property = "fallback", - .value = "144", - },{ - .driver = "pvscsi", - .property = "x-old-pci-configuration", - .value = "on", - },{ - .driver = "pvscsi", - .property = "x-disable-pcie", - .value = "on", - }, - { - .driver = "vmxnet3", - .property = "x-old-msi-offsets", - .value = "on", - },{ - .driver = "vmxnet3", - .property = "x-disable-pcie", - .value = "on", - }, + { "isa-fdc", "fallback", "144" }, + { "pvscsi", "x-old-pci-configuration", "on" }, + { "pvscsi", "x-disable-pcie", "on" }, + { "vmxnet3", "x-old-msi-offsets", "on" }, + { "vmxnet3", "x-disable-pcie", "on" }, }; const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); GlobalProperty hw_compat_2_4[] = { - { - .driver = "virtio-blk-device", - .property = "scsi", - .value = "true", - },{ - .driver = "e1000", - .property = "extra_mac_registers", - .value = "off", - },{ - .driver = "virtio-pci", - .property = "x-disable-pcie", - .value = "on", - },{ - .driver = "virtio-pci", - .property = "migrate-extra", - .value = "off", - },{ - .driver = "fw_cfg_mem", - .property = "dma_enabled", - .value = "off", - },{ - .driver = "fw_cfg_io", - .property = "dma_enabled", - .value = "off", - } + { "virtio-blk-device", "scsi", "true" }, + { "e1000", "extra_mac_registers", "off" }, + { "virtio-pci", "x-disable-pcie", "on" }, + { "virtio-pci", "migrate-extra", "off" }, + { "fw_cfg_mem", "dma_enabled", "off" }, + { "fw_cfg_io", "dma_enabled", "off" } }; const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); GlobalProperty hw_compat_2_3[] = { - { - .driver = "virtio-blk-pci", - .property = "any_layout", - .value = "off", - },{ - .driver = "virtio-balloon-pci", - .property = "any_layout", - .value = "off", - },{ - .driver = "virtio-serial-pci", - .property = "any_layout", - .value = "off", - },{ - .driver = "virtio-9p-pci", - .property = "any_layout", - .value = "off", - },{ - .driver = "virtio-rng-pci", - .property = "any_layout", - .value = "off", - },{ - .driver = TYPE_PCI_DEVICE, - .property = "x-pcie-lnksta-dllla", - .value = "off", - },{ - .driver = "migration", - .property = "send-configuration", - .value = "off", - },{ - .driver = "migration", - .property = "send-section-footer", - .value = "off", - },{ - .driver = "migration", - .property = "store-global-state", - .value = "off", - }, + { "virtio-blk-pci", "any_layout", "off" }, + { "virtio-balloon-pci", "any_layout", "off" }, + { "virtio-serial-pci", "any_layout", "off" }, + { "virtio-9p-pci", "any_layout", "off" }, + { "virtio-rng-pci", "any_layout", "off" }, + { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, + { "migration", "send-configuration", "off" }, + { "migration", "send-section-footer", "off" }, + { "migration", "store-global-state", "off" }, }; const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); @@ -318,35 +132,13 @@ GlobalProperty hw_compat_2_2[] = {}; const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2); GlobalProperty hw_compat_2_1[] = { - { - .driver = "intel-hda", - .property = "old_msi_addr", - .value = "on", - },{ - .driver = "VGA", - .property = "qemu-extended-regs", - .value = "off", - },{ - .driver = "secondary-vga", - .property = "qemu-extended-regs", - .value = "off", - },{ - .driver = "virtio-scsi-pci", - .property = "any_layout", - .value = "off", - },{ - .driver = "usb-mouse", - .property = "usb_version", - .value = stringify(1), - },{ - .driver = "usb-kbd", - .property = "usb_version", - .value = stringify(1), - },{ - .driver = "virtio-pci", - .property = "virtio-pci-bus-master-bug-migration", - .value = "on", - }, + { "intel-hda", "old_msi_addr", "on" }, + { "VGA", "qemu-extended-regs", "off" }, + { "secondary-vga", "qemu-extended-regs", "off" }, + { "virtio-scsi-pci", "any_layout", "off" }, + { "usb-mouse", "usb_version", "1" }, + { "usb-kbd", "usb_version", "1" }, + { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" }, }; const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1); @@ -919,7 +711,7 @@ static void machine_class_init(ObjectClass *oc, void *data) object_class_property_add_bool(oc, "dump-guest-core", machine_get_dump_guest_core, machine_set_dump_guest_core, &error_abort); object_class_property_set_description(oc, "dump-guest-core", - "Include guest memory in a core dump", &error_abort); + "Include guest memory in a core dump", &error_abort); object_class_property_add_bool(oc, "mem-merge", machine_get_mem_merge, machine_set_mem_merge, &error_abort); diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 3769a2bccb..d59071b8ed 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -158,7 +158,7 @@ DeviceState *qdev_try_create(BusState *bus, const char *type) return dev; } -static QTAILQ_HEAD(device_listeners, DeviceListener) device_listeners +static QTAILQ_HEAD(, DeviceListener) device_listeners = QTAILQ_HEAD_INITIALIZER(device_listeners); enum ListenerDirection { Forward, Reverse }; @@ -177,7 +177,7 @@ enum ListenerDirection { Forward, Reverse }; break; \ case Reverse: \ QTAILQ_FOREACH_REVERSE(_listener, &device_listeners, \ - device_listeners, link) { \ + link) { \ if (_listener->_callback) { \ _listener->_callback(_listener, ##_args); \ } \ @@ -975,10 +975,13 @@ void object_apply_compat_props(Object *obj) if (object_dynamic_cast(qdev_get_machine(), TYPE_MACHINE)) { MachineState *m = MACHINE(qdev_get_machine()); MachineClass *mc = MACHINE_GET_CLASS(m); - AccelClass *ac = ACCEL_GET_CLASS(m->accelerator); - if (ac->compat_props) { - object_apply_global_props(obj, ac->compat_props, &error_abort); + if (m->accelerator) { + AccelClass *ac = ACCEL_GET_CLASS(m->accelerator); + + if (ac->compat_props) { + object_apply_global_props(obj, ac->compat_props, &error_abort); + } } object_apply_global_props(obj, mc->compat_props, &error_abort); } diff --git a/hw/core/reset.c b/hw/core/reset.c index 84c8869371..9c477f2bf5 100644 --- a/hw/core/reset.c +++ b/hw/core/reset.c @@ -35,7 +35,7 @@ typedef struct QEMUResetEntry { void *opaque; } QEMUResetEntry; -static QTAILQ_HEAD(reset_handlers, QEMUResetEntry) reset_handlers = +static QTAILQ_HEAD(, QEMUResetEntry) reset_handlers = QTAILQ_HEAD_INITIALIZER(reset_handlers); void qemu_register_reset(QEMUResetHandler *func, void *opaque) diff --git a/hw/display/qxl.c b/hw/display/qxl.c index 9087db5dee..8e9a65e75b 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -1189,9 +1189,7 @@ static void qxl_enter_vga_mode(PCIQXLDevice *d) return; } trace_qxl_enter_vga_mode(d->id); -#if SPICE_SERVER_VERSION >= 0x000c03 /* release 0.12.3 */ spice_qxl_driver_unload(&d->ssd.qxl); -#endif graphic_console_set_hwops(d->ssd.dcl.con, d->vga.hw_ops, &d->vga); update_displaychangelistener(&d->ssd.dcl, GUI_REFRESH_INTERVAL_DEFAULT); qemu_spice_create_host_primary(&d->ssd); diff --git a/hw/display/ramfb-standalone.c b/hw/display/ramfb-standalone.c index c0d241ba01..da3229a1f6 100644 --- a/hw/display/ramfb-standalone.c +++ b/hw/display/ramfb-standalone.c @@ -1,7 +1,6 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "hw/loader.h" -#include "hw/isa/isa.h" #include "hw/display/ramfb.h" #include "ui/console.h" #include "sysemu/sysemu.h" diff --git a/hw/display/tc6393xb.c b/hw/display/tc6393xb.c index 3360be6f84..e1b1e302f2 100644 --- a/hw/display/tc6393xb.c +++ b/hw/display/tc6393xb.c @@ -319,7 +319,7 @@ static void tc6393xb_scr_writeb(TC6393xbState *s, hwaddr addr, uint32_t value) SCR_REG_B(DEBUG); } fprintf(stderr, "tc6393xb_scr: unhandled write at %08x: %02x\n", - (uint32_t) addr, value & 0xff); + (uint32_t) addr, value & 0xff); } #undef SCR_REG_B #undef SCR_REG_W @@ -358,7 +358,7 @@ static void tc6393xb_nand_cfg_writeb(TC6393xbState *s, hwaddr addr, uint32_t val return; } fprintf(stderr, "tc6393xb_nand_cfg: unhandled write at %08x: %02x\n", - (uint32_t) addr, value & 0xff); + (uint32_t) addr, value & 0xff); } static uint32_t tc6393xb_nand_readb(TC6393xbState *s, hwaddr addr) { @@ -421,7 +421,7 @@ static void tc6393xb_nand_writeb(TC6393xbState *s, hwaddr addr, uint32_t value) return; } fprintf(stderr, "tc6393xb_nand: unhandled write at %08x: %02x\n", - (uint32_t) addr, value & 0xff); + (uint32_t) addr, value & 0xff); } #define BITS 8 diff --git a/hw/display/vga.c b/hw/display/vga.c index 3ba3f6853c..910a23c12e 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -85,10 +85,10 @@ const uint8_t gr_mask[16] = { #define cbswap_32(__x) \ ((uint32_t)( \ - (((uint32_t)(__x) & (uint32_t)0x000000ffUL) << 24) | \ - (((uint32_t)(__x) & (uint32_t)0x0000ff00UL) << 8) | \ - (((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >> 8) | \ - (((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) )) + (((uint32_t)(__x) & (uint32_t)0x000000ffUL) << 24) | \ + (((uint32_t)(__x) & (uint32_t)0x0000ff00UL) << 8) | \ + (((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >> 8) | \ + (((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) )) #ifdef HOST_WORDS_BIGENDIAN #define PAT(x) cbswap_32(x) diff --git a/hw/display/virtio-gpu-3d.c b/hw/display/virtio-gpu-3d.c index 55d76405a9..bc6e99c943 100644 --- a/hw/display/virtio-gpu-3d.c +++ b/hw/display/virtio-gpu-3d.c @@ -498,9 +498,9 @@ static void virgl_write_fence(void *opaque, uint32_t fence) QTAILQ_FOREACH_SAFE(cmd, &g->fenceq, next, tmp) { /* - * the guest can end up emitting fences out of order - * so we should check all fenced cmds not just the first one. - */ + * the guest can end up emitting fences out of order + * so we should check all fenced cmds not just the first one. + */ if (cmd->cmd_hdr.fence_id > fence) { continue; } diff --git a/hw/dma/pxa2xx_dma.c b/hw/dma/pxa2xx_dma.c index f4eb26cf17..d498de8ffe 100644 --- a/hw/dma/pxa2xx_dma.c +++ b/hw/dma/pxa2xx_dma.c @@ -228,7 +228,7 @@ static void pxa2xx_dma_run(PXA2xxDMAState *s) !(ch->state & DCSR_NODESCFETCH)) pxa2xx_dma_descriptor_fetch(s, c); break; - } + } } ch->cmd = (ch->cmd & ~DCMD_LEN) | length; @@ -283,7 +283,7 @@ static uint64_t pxa2xx_dma_read(void *opaque, hwaddr offset, case DCSR0 ... DCSR31: channel = offset >> 2; - if (s->chan[channel].request) + if (s->chan[channel].request) return s->chan[channel].state | DCSR_REQPEND; return s->chan[channel].state; diff --git a/hw/dma/soc_dma.c b/hw/dma/soc_dma.c index 45516241c6..58502721fa 100644 --- a/hw/dma/soc_dma.c +++ b/hw/dma/soc_dma.c @@ -345,7 +345,7 @@ void soc_dma_port_add_mem(struct soc_dma_s *soc, uint8_t *phys_base, while (entry < dma->memmap + dma->memmap_size && entry->addr <= virt_base) entry ++; - } + } memmove(entry + 1, entry, (uint8_t *) (dma->memmap + dma->memmap_size ++) - diff --git a/hw/gpio/max7310.c b/hw/gpio/max7310.c index a560e3afd2..1a2478b5a9 100644 --- a/hw/gpio/max7310.c +++ b/hw/gpio/max7310.c @@ -118,7 +118,7 @@ static int max7310_tx(I2CSlave *i2c, uint8_t data) break; case 0x00: /* Input port - ignore writes */ - break; + break; default: #ifdef VERBOSE printf("%s: unknown register %02x\n", __func__, s->command); diff --git a/hw/i2c/i2c-ddc.c b/hw/i2c/i2c-ddc.c index be34fe072c..0a0367ff38 100644 --- a/hw/i2c/i2c-ddc.c +++ b/hw/i2c/i2c-ddc.c @@ -56,7 +56,7 @@ static int i2c_ddc_rx(I2CSlave *i2c) I2CDDCState *s = I2CDDC(i2c); int value; - value = s->edid_blob[s->reg]; + value = s->edid_blob[s->reg % sizeof(s->edid_blob)]; s->reg++; return value; } diff --git a/hw/i386/kvm/ioapic.c b/hw/i386/kvm/ioapic.c index 5b40d75439..e453692199 100644 --- a/hw/i386/kvm/ioapic.c +++ b/hw/i386/kvm/ioapic.c @@ -163,7 +163,7 @@ static void kvm_ioapic_class_init(ObjectClass *klass, void *data) } static const TypeInfo kvm_ioapic_info = { - .name = "kvm-ioapic", + .name = TYPE_KVM_IOAPIC, .parent = TYPE_IOAPIC_COMMON, .instance_size = sizeof(KVMIOAPICState), .class_init = kvm_ioapic_class_init, diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 4952feb476..fc65049e1d 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -111,174 +111,67 @@ static unsigned e820_entries; struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX}; GlobalProperty pc_compat_3_1[] = { - { - .driver = "intel-iommu", - .property = "dma-drain", - .value = "off", - }, + { "intel-iommu", "dma-drain", "off" }, }; const size_t pc_compat_3_1_len = G_N_ELEMENTS(pc_compat_3_1); GlobalProperty pc_compat_3_0[] = { - { - .driver = TYPE_X86_CPU, - .property = "x-hv-synic-kvm-only", - .value = "on", - },{ - .driver = "Skylake-Server" "-" TYPE_X86_CPU, - .property = "pku", - .value = "off", - },{ - .driver = "Skylake-Server-IBRS" "-" TYPE_X86_CPU, - .property = "pku", - .value = "off", - }, + { TYPE_X86_CPU, "x-hv-synic-kvm-only", "on" }, + { "Skylake-Server" "-" TYPE_X86_CPU, "pku", "off" }, + { "Skylake-Server-IBRS" "-" TYPE_X86_CPU, "pku", "off" }, }; const size_t pc_compat_3_0_len = G_N_ELEMENTS(pc_compat_3_0); GlobalProperty pc_compat_2_12[] = { - { - .driver = TYPE_X86_CPU, - .property = "legacy-cache", - .value = "on", - },{ - .driver = TYPE_X86_CPU, - .property = "topoext", - .value = "off", - },{ - .driver = "EPYC-" TYPE_X86_CPU, - .property = "xlevel", - .value = stringify(0x8000000a), - },{ - .driver = "EPYC-IBPB-" TYPE_X86_CPU, - .property = "xlevel", - .value = stringify(0x8000000a), - }, + { TYPE_X86_CPU, "legacy-cache", "on" }, + { TYPE_X86_CPU, "topoext", "off" }, + { "EPYC-" TYPE_X86_CPU, "xlevel", "0x8000000a" }, + { "EPYC-IBPB-" TYPE_X86_CPU, "xlevel", "0x8000000a" }, }; const size_t pc_compat_2_12_len = G_N_ELEMENTS(pc_compat_2_12); GlobalProperty pc_compat_2_11[] = { - { - .driver = TYPE_X86_CPU, - .property = "x-migrate-smi-count", - .value = "off", - },{ - .driver = "Skylake-Server" "-" TYPE_X86_CPU, - .property = "clflushopt", - .value = "off", - }, + { TYPE_X86_CPU, "x-migrate-smi-count", "off" }, + { "Skylake-Server" "-" TYPE_X86_CPU, "clflushopt", "off" }, }; const size_t pc_compat_2_11_len = G_N_ELEMENTS(pc_compat_2_11); GlobalProperty pc_compat_2_10[] = { - { - .driver = TYPE_X86_CPU, - .property = "x-hv-max-vps", - .value = "0x40", - },{ - .driver = "i440FX-pcihost", - .property = "x-pci-hole64-fix", - .value = "off", - },{ - .driver = "q35-pcihost", - .property = "x-pci-hole64-fix", - .value = "off", - }, + { TYPE_X86_CPU, "x-hv-max-vps", "0x40" }, + { "i440FX-pcihost", "x-pci-hole64-fix", "off" }, + { "q35-pcihost", "x-pci-hole64-fix", "off" }, }; const size_t pc_compat_2_10_len = G_N_ELEMENTS(pc_compat_2_10); GlobalProperty pc_compat_2_9[] = { - { - .driver = "mch", - .property = "extended-tseg-mbytes", - .value = stringify(0), - }, + { "mch", "extended-tseg-mbytes", "0" }, }; const size_t pc_compat_2_9_len = G_N_ELEMENTS(pc_compat_2_9); GlobalProperty pc_compat_2_8[] = { - { - .driver = TYPE_X86_CPU, - .property = "tcg-cpuid", - .value = "off", - }, - { - .driver = "kvmclock", - .property = "x-mach-use-reliable-get-clock", - .value = "off", - }, - { - .driver = "ICH9-LPC", - .property = "x-smi-broadcast", - .value = "off", - }, - { - .driver = TYPE_X86_CPU, - .property = "vmware-cpuid-freq", - .value = "off", - }, - { - .driver = "Haswell-" TYPE_X86_CPU, - .property = "stepping", - .value = "1", - }, + { TYPE_X86_CPU, "tcg-cpuid", "off" }, + { "kvmclock", "x-mach-use-reliable-get-clock", "off" }, + { "ICH9-LPC", "x-smi-broadcast", "off" }, + { TYPE_X86_CPU, "vmware-cpuid-freq", "off" }, + { "Haswell-" TYPE_X86_CPU, "stepping", "1" }, }; const size_t pc_compat_2_8_len = G_N_ELEMENTS(pc_compat_2_8); GlobalProperty pc_compat_2_7[] = { - { - .driver = TYPE_X86_CPU, - .property = "l3-cache", - .value = "off", - }, - { - .driver = TYPE_X86_CPU, - .property = "full-cpuid-auto-level", - .value = "off", - }, - { - .driver = "Opteron_G3" "-" TYPE_X86_CPU, - .property = "family", - .value = "15", - }, - { - .driver = "Opteron_G3" "-" TYPE_X86_CPU, - .property = "model", - .value = "6", - }, - { - .driver = "Opteron_G3" "-" TYPE_X86_CPU, - .property = "stepping", - .value = "1", - }, - { - .driver = "isa-pcspk", - .property = "migrate", - .value = "off", - }, + { TYPE_X86_CPU, "l3-cache", "off" }, + { TYPE_X86_CPU, "full-cpuid-auto-level", "off" }, + { "Opteron_G3" "-" TYPE_X86_CPU, "family", "15" }, + { "Opteron_G3" "-" TYPE_X86_CPU, "model", "6" }, + { "Opteron_G3" "-" TYPE_X86_CPU, "stepping", "1" }, + { "isa-pcspk", "migrate", "off" }, }; const size_t pc_compat_2_7_len = G_N_ELEMENTS(pc_compat_2_7); GlobalProperty pc_compat_2_6[] = { - { - .driver = TYPE_X86_CPU, - .property = "cpuid-0xb", - .value = "off", - },{ - .driver = "vmxnet3", - .property = "romfile", - .value = "", - }, - { - .driver = TYPE_X86_CPU, - .property = "fill-mtrr-mask", - .value = "off", - }, - { - .driver = "apic-common", - .property = "legacy-instance-id", - .value = "on", - } + { TYPE_X86_CPU, "cpuid-0xb", "off" }, + { "vmxnet3", "romfile", "" }, + { TYPE_X86_CPU, "fill-mtrr-mask", "off" }, + { "apic-common", "legacy-instance-id", "on", } }; const size_t pc_compat_2_6_len = G_N_ELEMENTS(pc_compat_2_6); @@ -287,499 +180,148 @@ const size_t pc_compat_2_5_len = G_N_ELEMENTS(pc_compat_2_5); GlobalProperty pc_compat_2_4[] = { PC_CPU_MODEL_IDS("2.4.0") - { - .driver = "Haswell-" TYPE_X86_CPU, - .property = "abm", - .value = "off", - }, - { - .driver = "Haswell-noTSX-" TYPE_X86_CPU, - .property = "abm", - .value = "off", - }, - { - .driver = "Broadwell-" TYPE_X86_CPU, - .property = "abm", - .value = "off", - }, - { - .driver = "Broadwell-noTSX-" TYPE_X86_CPU, - .property = "abm", - .value = "off", - }, - { - .driver = "host" "-" TYPE_X86_CPU, - .property = "host-cache-info", - .value = "on", - }, - { - .driver = TYPE_X86_CPU, - .property = "check", - .value = "off", - }, - { - .driver = "qemu64" "-" TYPE_X86_CPU, - .property = "sse4a", - .value = "on", - }, - { - .driver = "qemu64" "-" TYPE_X86_CPU, - .property = "abm", - .value = "on", - }, - { - .driver = "qemu64" "-" TYPE_X86_CPU, - .property = "popcnt", - .value = "on", - }, - { - .driver = "qemu32" "-" TYPE_X86_CPU, - .property = "popcnt", - .value = "on", - },{ - .driver = "Opteron_G2" "-" TYPE_X86_CPU, - .property = "rdtscp", - .value = "on", - },{ - .driver = "Opteron_G3" "-" TYPE_X86_CPU, - .property = "rdtscp", - .value = "on", - },{ - .driver = "Opteron_G4" "-" TYPE_X86_CPU, - .property = "rdtscp", - .value = "on", - },{ - .driver = "Opteron_G5" "-" TYPE_X86_CPU, - .property = "rdtscp", - .value = "on", - } + { "Haswell-" TYPE_X86_CPU, "abm", "off" }, + { "Haswell-noTSX-" TYPE_X86_CPU, "abm", "off" }, + { "Broadwell-" TYPE_X86_CPU, "abm", "off" }, + { "Broadwell-noTSX-" TYPE_X86_CPU, "abm", "off" }, + { "host" "-" TYPE_X86_CPU, "host-cache-info", "on" }, + { TYPE_X86_CPU, "check", "off" }, + { "qemu64" "-" TYPE_X86_CPU, "sse4a", "on" }, + { "qemu64" "-" TYPE_X86_CPU, "abm", "on" }, + { "qemu64" "-" TYPE_X86_CPU, "popcnt", "on" }, + { "qemu32" "-" TYPE_X86_CPU, "popcnt", "on" }, + { "Opteron_G2" "-" TYPE_X86_CPU, "rdtscp", "on" }, + { "Opteron_G3" "-" TYPE_X86_CPU, "rdtscp", "on" }, + { "Opteron_G4" "-" TYPE_X86_CPU, "rdtscp", "on" }, + { "Opteron_G5" "-" TYPE_X86_CPU, "rdtscp", "on", } }; const size_t pc_compat_2_4_len = G_N_ELEMENTS(pc_compat_2_4); GlobalProperty pc_compat_2_3[] = { PC_CPU_MODEL_IDS("2.3.0") - { - .driver = TYPE_X86_CPU, - .property = "arat", - .value = "off", - },{ - .driver = "qemu64" "-" TYPE_X86_CPU, - .property = "min-level", - .value = stringify(4), - },{ - .driver = "kvm64" "-" TYPE_X86_CPU, - .property = "min-level", - .value = stringify(5), - },{ - .driver = "pentium3" "-" TYPE_X86_CPU, - .property = "min-level", - .value = stringify(2), - },{ - .driver = "n270" "-" TYPE_X86_CPU, - .property = "min-level", - .value = stringify(5), - },{ - .driver = "Conroe" "-" TYPE_X86_CPU, - .property = "min-level", - .value = stringify(4), - },{ - .driver = "Penryn" "-" TYPE_X86_CPU, - .property = "min-level", - .value = stringify(4), - },{ - .driver = "Nehalem" "-" TYPE_X86_CPU, - .property = "min-level", - .value = stringify(4), - },{ - .driver = "n270" "-" TYPE_X86_CPU, - .property = "min-xlevel", - .value = stringify(0x8000000a), - },{ - .driver = "Penryn" "-" TYPE_X86_CPU, - .property = "min-xlevel", - .value = stringify(0x8000000a), - },{ - .driver = "Conroe" "-" TYPE_X86_CPU, - .property = "min-xlevel", - .value = stringify(0x8000000a), - },{ - .driver = "Nehalem" "-" TYPE_X86_CPU, - .property = "min-xlevel", - .value = stringify(0x8000000a), - },{ - .driver = "Westmere" "-" TYPE_X86_CPU, - .property = "min-xlevel", - .value = stringify(0x8000000a), - },{ - .driver = "SandyBridge" "-" TYPE_X86_CPU, - .property = "min-xlevel", - .value = stringify(0x8000000a), - },{ - .driver = "IvyBridge" "-" TYPE_X86_CPU, - .property = "min-xlevel", - .value = stringify(0x8000000a), - },{ - .driver = "Haswell" "-" TYPE_X86_CPU, - .property = "min-xlevel", - .value = stringify(0x8000000a), - },{ - .driver = "Haswell-noTSX" "-" TYPE_X86_CPU, - .property = "min-xlevel", - .value = stringify(0x8000000a), - },{ - .driver = "Broadwell" "-" TYPE_X86_CPU, - .property = "min-xlevel", - .value = stringify(0x8000000a), - },{ - .driver = "Broadwell-noTSX" "-" TYPE_X86_CPU, - .property = "min-xlevel", - .value = stringify(0x8000000a), - },{ - .driver = TYPE_X86_CPU, - .property = "kvm-no-smi-migration", - .value = "on", - }, + { TYPE_X86_CPU, "arat", "off" }, + { "qemu64" "-" TYPE_X86_CPU, "min-level", "4" }, + { "kvm64" "-" TYPE_X86_CPU, "min-level", "5" }, + { "pentium3" "-" TYPE_X86_CPU, "min-level", "2" }, + { "n270" "-" TYPE_X86_CPU, "min-level", "5" }, + { "Conroe" "-" TYPE_X86_CPU, "min-level", "4" }, + { "Penryn" "-" TYPE_X86_CPU, "min-level", "4" }, + { "Nehalem" "-" TYPE_X86_CPU, "min-level", "4" }, + { "n270" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, + { "Penryn" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, + { "Conroe" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, + { "Nehalem" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, + { "Westmere" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, + { "SandyBridge" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, + { "IvyBridge" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, + { "Haswell" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, + { "Haswell-noTSX" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, + { "Broadwell" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, + { "Broadwell-noTSX" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, + { TYPE_X86_CPU, "kvm-no-smi-migration", "on" }, }; const size_t pc_compat_2_3_len = G_N_ELEMENTS(pc_compat_2_3); GlobalProperty pc_compat_2_2[] = { PC_CPU_MODEL_IDS("2.2.0") - { - .driver = "kvm64" "-" TYPE_X86_CPU, - .property = "vme", - .value = "off", - }, - { - .driver = "kvm32" "-" TYPE_X86_CPU, - .property = "vme", - .value = "off", - }, - { - .driver = "Conroe" "-" TYPE_X86_CPU, - .property = "vme", - .value = "off", - }, - { - .driver = "Penryn" "-" TYPE_X86_CPU, - .property = "vme", - .value = "off", - }, - { - .driver = "Nehalem" "-" TYPE_X86_CPU, - .property = "vme", - .value = "off", - }, - { - .driver = "Westmere" "-" TYPE_X86_CPU, - .property = "vme", - .value = "off", - }, - { - .driver = "SandyBridge" "-" TYPE_X86_CPU, - .property = "vme", - .value = "off", - }, - { - .driver = "Haswell" "-" TYPE_X86_CPU, - .property = "vme", - .value = "off", - }, - { - .driver = "Broadwell" "-" TYPE_X86_CPU, - .property = "vme", - .value = "off", - }, - { - .driver = "Opteron_G1" "-" TYPE_X86_CPU, - .property = "vme", - .value = "off", - }, - { - .driver = "Opteron_G2" "-" TYPE_X86_CPU, - .property = "vme", - .value = "off", - }, - { - .driver = "Opteron_G3" "-" TYPE_X86_CPU, - .property = "vme", - .value = "off", - }, - { - .driver = "Opteron_G4" "-" TYPE_X86_CPU, - .property = "vme", - .value = "off", - }, - { - .driver = "Opteron_G5" "-" TYPE_X86_CPU, - .property = "vme", - .value = "off", - }, - { - .driver = "Haswell" "-" TYPE_X86_CPU, - .property = "f16c", - .value = "off", - }, - { - .driver = "Haswell" "-" TYPE_X86_CPU, - .property = "rdrand", - .value = "off", - }, - { - .driver = "Broadwell" "-" TYPE_X86_CPU, - .property = "f16c", - .value = "off", - }, - { - .driver = "Broadwell" "-" TYPE_X86_CPU, - .property = "rdrand", - .value = "off", - }, + { "kvm64" "-" TYPE_X86_CPU, "vme", "off" }, + { "kvm32" "-" TYPE_X86_CPU, "vme", "off" }, + { "Conroe" "-" TYPE_X86_CPU, "vme", "off" }, + { "Penryn" "-" TYPE_X86_CPU, "vme", "off" }, + { "Nehalem" "-" TYPE_X86_CPU, "vme", "off" }, + { "Westmere" "-" TYPE_X86_CPU, "vme", "off" }, + { "SandyBridge" "-" TYPE_X86_CPU, "vme", "off" }, + { "Haswell" "-" TYPE_X86_CPU, "vme", "off" }, + { "Broadwell" "-" TYPE_X86_CPU, "vme", "off" }, + { "Opteron_G1" "-" TYPE_X86_CPU, "vme", "off" }, + { "Opteron_G2" "-" TYPE_X86_CPU, "vme", "off" }, + { "Opteron_G3" "-" TYPE_X86_CPU, "vme", "off" }, + { "Opteron_G4" "-" TYPE_X86_CPU, "vme", "off" }, + { "Opteron_G5" "-" TYPE_X86_CPU, "vme", "off" }, + { "Haswell" "-" TYPE_X86_CPU, "f16c", "off" }, + { "Haswell" "-" TYPE_X86_CPU, "rdrand", "off" }, + { "Broadwell" "-" TYPE_X86_CPU, "f16c", "off" }, + { "Broadwell" "-" TYPE_X86_CPU, "rdrand", "off" }, }; const size_t pc_compat_2_2_len = G_N_ELEMENTS(pc_compat_2_2); GlobalProperty pc_compat_2_1[] = { PC_CPU_MODEL_IDS("2.1.0") - { - .driver = "coreduo" "-" TYPE_X86_CPU, - .property = "vmx", - .value = "on", - }, - { - .driver = "core2duo" "-" TYPE_X86_CPU, - .property = "vmx", - .value = "on", - }, + { "coreduo" "-" TYPE_X86_CPU, "vmx", "on" }, + { "core2duo" "-" TYPE_X86_CPU, "vmx", "on" }, }; const size_t pc_compat_2_1_len = G_N_ELEMENTS(pc_compat_2_1); GlobalProperty pc_compat_2_0[] = { PC_CPU_MODEL_IDS("2.0.0") - { - .driver = "virtio-scsi-pci", - .property = "any_layout", - .value = "off", - },{ - .driver = "PIIX4_PM", - .property = "memory-hotplug-support", - .value = "off", - }, - { - .driver = "apic", - .property = "version", - .value = stringify(0x11), - }, - { - .driver = "nec-usb-xhci", - .property = "superspeed-ports-first", - .value = "off", - }, - { - .driver = "nec-usb-xhci", - .property = "force-pcie-endcap", - .value = "on", - }, - { - .driver = "pci-serial", - .property = "prog_if", - .value = stringify(0), - }, - { - .driver = "pci-serial-2x", - .property = "prog_if", - .value = stringify(0), - }, - { - .driver = "pci-serial-4x", - .property = "prog_if", - .value = stringify(0), - }, - { - .driver = "virtio-net-pci", - .property = "guest_announce", - .value = "off", - }, - { - .driver = "ICH9-LPC", - .property = "memory-hotplug-support", - .value = "off", - },{ - .driver = "xio3130-downstream", - .property = COMPAT_PROP_PCP, - .value = "off", - },{ - .driver = "ioh3420", - .property = COMPAT_PROP_PCP, - .value = "off", - }, + { "virtio-scsi-pci", "any_layout", "off" }, + { "PIIX4_PM", "memory-hotplug-support", "off" }, + { "apic", "version", "0x11" }, + { "nec-usb-xhci", "superspeed-ports-first", "off" }, + { "nec-usb-xhci", "force-pcie-endcap", "on" }, + { "pci-serial", "prog_if", "0" }, + { "pci-serial-2x", "prog_if", "0" }, + { "pci-serial-4x", "prog_if", "0" }, + { "virtio-net-pci", "guest_announce", "off" }, + { "ICH9-LPC", "memory-hotplug-support", "off" }, + { "xio3130-downstream", COMPAT_PROP_PCP, "off" }, + { "ioh3420", COMPAT_PROP_PCP, "off" }, }; const size_t pc_compat_2_0_len = G_N_ELEMENTS(pc_compat_2_0); GlobalProperty pc_compat_1_7[] = { PC_CPU_MODEL_IDS("1.7.0") - { - .driver = TYPE_USB_DEVICE, - .property = "msos-desc", - .value = "no", - }, - { - .driver = "PIIX4_PM", - .property = "acpi-pci-hotplug-with-bridge-support", - .value = "off", - }, - { - .driver = "hpet", - .property = HPET_INTCAP, - .value = stringify(4), - }, + { TYPE_USB_DEVICE, "msos-desc", "no" }, + { "PIIX4_PM", "acpi-pci-hotplug-with-bridge-support", "off" }, + { "hpet", HPET_INTCAP, "4" }, }; const size_t pc_compat_1_7_len = G_N_ELEMENTS(pc_compat_1_7); GlobalProperty pc_compat_1_6[] = { PC_CPU_MODEL_IDS("1.6.0") - { - .driver = "e1000", - .property = "mitigation", - .value = "off", - },{ - .driver = "qemu64-" TYPE_X86_CPU, - .property = "model", - .value = stringify(2), - },{ - .driver = "qemu32-" TYPE_X86_CPU, - .property = "model", - .value = stringify(3), - },{ - .driver = "i440FX-pcihost", - .property = "short_root_bus", - .value = stringify(1), - },{ - .driver = "q35-pcihost", - .property = "short_root_bus", - .value = stringify(1), - }, + { "e1000", "mitigation", "off" }, + { "qemu64-" TYPE_X86_CPU, "model", "2" }, + { "qemu32-" TYPE_X86_CPU, "model", "3" }, + { "i440FX-pcihost", "short_root_bus", "1" }, + { "q35-pcihost", "short_root_bus", "1" }, }; const size_t pc_compat_1_6_len = G_N_ELEMENTS(pc_compat_1_6); GlobalProperty pc_compat_1_5[] = { PC_CPU_MODEL_IDS("1.5.0") - { - .driver = "Conroe-" TYPE_X86_CPU, - .property = "model", - .value = stringify(2), - },{ - .driver = "Conroe-" TYPE_X86_CPU, - .property = "min-level", - .value = stringify(2), - },{ - .driver = "Penryn-" TYPE_X86_CPU, - .property = "model", - .value = stringify(2), - },{ - .driver = "Penryn-" TYPE_X86_CPU, - .property = "min-level", - .value = stringify(2), - },{ - .driver = "Nehalem-" TYPE_X86_CPU, - .property = "model", - .value = stringify(2), - },{ - .driver = "Nehalem-" TYPE_X86_CPU, - .property = "min-level", - .value = stringify(2), - },{ - .driver = "virtio-net-pci", - .property = "any_layout", - .value = "off", - },{ - .driver = TYPE_X86_CPU, - .property = "pmu", - .value = "on", - },{ - .driver = "i440FX-pcihost", - .property = "short_root_bus", - .value = stringify(0), - },{ - .driver = "q35-pcihost", - .property = "short_root_bus", - .value = stringify(0), - }, + { "Conroe-" TYPE_X86_CPU, "model", "2" }, + { "Conroe-" TYPE_X86_CPU, "min-level", "2" }, + { "Penryn-" TYPE_X86_CPU, "model", "2" }, + { "Penryn-" TYPE_X86_CPU, "min-level", "2" }, + { "Nehalem-" TYPE_X86_CPU, "model", "2" }, + { "Nehalem-" TYPE_X86_CPU, "min-level", "2" }, + { "virtio-net-pci", "any_layout", "off" }, + { TYPE_X86_CPU, "pmu", "on" }, + { "i440FX-pcihost", "short_root_bus", "0" }, + { "q35-pcihost", "short_root_bus", "0" }, }; const size_t pc_compat_1_5_len = G_N_ELEMENTS(pc_compat_1_5); GlobalProperty pc_compat_1_4[] = { PC_CPU_MODEL_IDS("1.4.0") - { - .driver = "scsi-hd", - .property = "discard_granularity", - .value = stringify(0), - },{ - .driver = "scsi-cd", - .property = "discard_granularity", - .value = stringify(0), - },{ - .driver = "scsi-disk", - .property = "discard_granularity", - .value = stringify(0), - },{ - .driver = "ide-hd", - .property = "discard_granularity", - .value = stringify(0), - },{ - .driver = "ide-cd", - .property = "discard_granularity", - .value = stringify(0), - },{ - .driver = "ide-drive", - .property = "discard_granularity", - .value = stringify(0), - },{ - .driver = "virtio-blk-pci", - .property = "discard_granularity", - .value = stringify(0), - },{ - .driver = "virtio-serial-pci", - .property = "vectors", - /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */ - .value = stringify(0xFFFFFFFF), - },{ - .driver = "virtio-net-pci", - .property = "ctrl_guest_offloads", - .value = "off", - },{ - .driver = "e1000", - .property = "romfile", - .value = "pxe-e1000.rom", - },{ - .driver = "ne2k_pci", - .property = "romfile", - .value = "pxe-ne2k_pci.rom", - },{ - .driver = "pcnet", - .property = "romfile", - .value = "pxe-pcnet.rom", - },{ - .driver = "rtl8139", - .property = "romfile", - .value = "pxe-rtl8139.rom", - },{ - .driver = "virtio-net-pci", - .property = "romfile", - .value = "pxe-virtio.rom", - },{ - .driver = "486-" TYPE_X86_CPU, - .property = "model", - .value = stringify(0), - }, - { - .driver = "n270" "-" TYPE_X86_CPU, - .property = "movbe", - .value = "off", - }, - { - .driver = "Westmere" "-" TYPE_X86_CPU, - .property = "pclmulqdq", - .value = "off", - }, + { "scsi-hd", "discard_granularity", "0" }, + { "scsi-cd", "discard_granularity", "0" }, + { "scsi-disk", "discard_granularity", "0" }, + { "ide-hd", "discard_granularity", "0" }, + { "ide-cd", "discard_granularity", "0" }, + { "ide-drive", "discard_granularity", "0" }, + { "virtio-blk-pci", "discard_granularity", "0" }, + /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string: */ + { "virtio-serial-pci", "vectors", "0xFFFFFFFF" }, + { "virtio-net-pci", "ctrl_guest_offloads", "off" }, + { "e1000", "romfile", "pxe-e1000.rom" }, + { "ne2k_pci", "romfile", "pxe-ne2k_pci.rom" }, + { "pcnet", "romfile", "pxe-pcnet.rom" }, + { "rtl8139", "romfile", "pxe-rtl8139.rom" }, + { "virtio-net-pci", "romfile", "pxe-virtio.rom" }, + { "486-" TYPE_X86_CPU, "model", "0" }, + { "n270" "-" TYPE_X86_CPU, "movbe", "off" }, + { "Westmere" "-" TYPE_X86_CPU, "pclmulqdq", "off" }, }; const size_t pc_compat_1_4_len = G_N_ELEMENTS(pc_compat_1_4); @@ -2339,9 +1881,9 @@ void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name) unsigned int i; if (kvm_ioapic_in_kernel()) { - dev = qdev_create(NULL, "kvm-ioapic"); + dev = qdev_create(NULL, TYPE_KVM_IOAPIC); } else { - dev = qdev_create(NULL, "ioapic"); + dev = qdev_create(NULL, TYPE_IOAPIC); } if (parent_name) { object_property_add_child(object_resolve_path(parent_name, NULL), diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index ed6984638e..5088e2f492 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -694,23 +694,10 @@ static void pc_i440fx_1_3_machine_options(MachineClass *m) { static GlobalProperty compat[] = { PC_CPU_MODEL_IDS("1.3.0") - { - .driver = "usb-tablet", - .property = "usb_version", - .value = stringify(1), - },{ - .driver = "virtio-net-pci", - .property = "ctrl_mac_addr", - .value = "off", - },{ - .driver = "virtio-net-pci", - .property = "mq", - .value = "off", - }, { - .driver = "e1000", - .property = "autonegotiation", - .value = "off", - }, + { "usb-tablet", "usb_version", "1" }, + { "virtio-net-pci", "ctrl_mac_addr", "off" }, + { "virtio-net-pci", "mq", "off" }, + { "e1000", "autonegotiation", "off" }, }; pc_i440fx_1_4_machine_options(m); @@ -726,31 +713,12 @@ static void pc_i440fx_1_2_machine_options(MachineClass *m) { static GlobalProperty compat[] = { PC_CPU_MODEL_IDS("1.2.0") - { - .driver = "nec-usb-xhci", - .property = "msi", - .value = "off", - },{ - .driver = "nec-usb-xhci", - .property = "msix", - .value = "off", - },{ - .driver = "ivshmem", - .property = "use64", - .value = "0", - },{ - .driver = "qxl", - .property = "revision", - .value = stringify(3), - },{ - .driver = "qxl-vga", - .property = "revision", - .value = stringify(3), - },{ - .driver = "VGA", - .property = "mmio", - .value = "off", - }, + { "nec-usb-xhci", "msi", "off" }, + { "nec-usb-xhci", "msix", "off" }, + { "ivshmem", "use64", "0" }, + { "qxl", "revision", "3" }, + { "qxl-vga", "revision", "3" }, + { "VGA", "mmio", "off" }, }; pc_i440fx_1_3_machine_options(m); @@ -766,35 +734,13 @@ static void pc_i440fx_1_1_machine_options(MachineClass *m) { static GlobalProperty compat[] = { PC_CPU_MODEL_IDS("1.1.0") - { - .driver = "virtio-scsi-pci", - .property = "hotplug", - .value = "off", - },{ - .driver = "virtio-scsi-pci", - .property = "param_change", - .value = "off", - },{ - .driver = "VGA", - .property = "vgamem_mb", - .value = stringify(8), - },{ - .driver = "vmware-svga", - .property = "vgamem_mb", - .value = stringify(8), - },{ - .driver = "qxl-vga", - .property = "vgamem_mb", - .value = stringify(8), - },{ - .driver = "qxl", - .property = "vgamem_mb", - .value = stringify(8), - },{ - .driver = "virtio-blk-pci", - .property = "config-wce", - .value = "off", - }, + { "virtio-scsi-pci", "hotplug", "off" }, + { "virtio-scsi-pci", "param_change", "off" }, + { "VGA", "vgamem_mb", "8" }, + { "vmware-svga", "vgamem_mb", "8" }, + { "qxl-vga", "vgamem_mb", "8" }, + { "qxl", "vgamem_mb", "8" }, + { "virtio-blk-pci", "config-wce", "off" }, }; pc_i440fx_1_2_machine_options(m); @@ -809,23 +755,10 @@ static void pc_i440fx_1_0_machine_options(MachineClass *m) { static GlobalProperty compat[] = { PC_CPU_MODEL_IDS("1.0") - { - .driver = TYPE_ISA_FDC, - .property = "check_media_rate", - .value = "off", - },{ - .driver = "virtio-balloon-pci", - .property = "class", - .value = stringify(PCI_CLASS_MEMORY_RAM), - },{ - .driver = "apic-common", - .property = "vapic", - .value = "off", - },{ - .driver = TYPE_USB_DEVICE, - .property = "full-path", - .value = "no", - }, + { TYPE_ISA_FDC, "check_media_rate", "off" }, + { "virtio-balloon-pci", "class", stringify(PCI_CLASS_MEMORY_RAM) }, + { "apic-common", "vapic", "off" }, + { TYPE_USB_DEVICE, "full-path", "no" }, }; pc_i440fx_1_1_machine_options(m); @@ -857,31 +790,12 @@ static void pc_i440fx_0_14_machine_options(MachineClass *m) { static GlobalProperty compat[] = { PC_CPU_MODEL_IDS("0.14") - { - .driver = "virtio-blk-pci", - .property = "event_idx", - .value = "off", - },{ - .driver = "virtio-serial-pci", - .property = "event_idx", - .value = "off", - },{ - .driver = "virtio-net-pci", - .property = "event_idx", - .value = "off", - },{ - .driver = "virtio-balloon-pci", - .property = "event_idx", - .value = "off", - },{ - .driver = "qxl", - .property = "revision", - .value = stringify(2), - },{ - .driver = "qxl-vga", - .property = "revision", - .value = stringify(2), - }, + { "virtio-blk-pci", "event_idx", "off" }, + { "virtio-serial-pci", "event_idx", "off" }, + { "virtio-net-pci", "event_idx", "off" }, + { "virtio-balloon-pci", "event_idx", "off" }, + { "qxl", "revision", "2" }, + { "qxl-vga", "revision", "2" }, }; pc_i440fx_0_15_machine_options(m); @@ -897,27 +811,11 @@ static void pc_i440fx_0_13_machine_options(MachineClass *m) PCMachineClass *pcmc = PC_MACHINE_CLASS(m); static GlobalProperty compat[] = { PC_CPU_MODEL_IDS("0.13") - { - .driver = TYPE_PCI_DEVICE, - .property = "command_serr_enable", - .value = "off", - },{ - .driver = "AC97", - .property = "use_broken_id", - .value = stringify(1), - },{ - .driver = "virtio-9p-pci", - .property = "vectors", - .value = stringify(0), - },{ - .driver = "VGA", - .property = "rombar", - .value = stringify(0), - },{ - .driver = "vmware-svga", - .property = "rombar", - .value = stringify(0), - }, + { TYPE_PCI_DEVICE, "command_serr_enable", "off" }, + { "AC97", "use_broken_id", "1" }, + { "virtio-9p-pci", "vectors", "0" }, + { "VGA", "rombar", "0" }, + { "vmware-svga", "rombar", "0" }, }; pc_i440fx_0_14_machine_options(m); @@ -933,27 +831,11 @@ static void pc_i440fx_0_12_machine_options(MachineClass *m) { static GlobalProperty compat[] = { PC_CPU_MODEL_IDS("0.12") - { - .driver = "virtio-serial-pci", - .property = "max_ports", - .value = stringify(1), - },{ - .driver = "virtio-serial-pci", - .property = "vectors", - .value = stringify(0), - },{ - .driver = "usb-mouse", - .property = "serial", - .value = "1", - },{ - .driver = "usb-tablet", - .property = "serial", - .value = "1", - },{ - .driver = "usb-kbd", - .property = "serial", - .value = "1", - }, + { "virtio-serial-pci", "max_ports", "1" }, + { "virtio-serial-pci", "vectors", "0" }, + { "usb-mouse", "serial", "1" }, + { "usb-tablet", "serial", "1" }, + { "usb-kbd", "serial", "1" }, }; pc_i440fx_0_13_machine_options(m); diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c index 2143d33b18..8c8562f359 100644 --- a/hw/i386/xen/xen-hvm.c +++ b/hw/i386/xen/xen-hvm.c @@ -570,7 +570,7 @@ static void xen_io_del(MemoryListener *listener, } static void xen_device_realize(DeviceListener *listener, - DeviceState *dev) + DeviceState *dev) { XenIOState *state = container_of(listener, XenIOState, device_listener); @@ -588,7 +588,7 @@ static void xen_device_realize(DeviceListener *listener, } static void xen_device_unrealize(DeviceListener *listener, - DeviceState *dev) + DeviceState *dev) { XenIOState *state = container_of(listener, XenIOState, device_listener); diff --git a/hw/i386/xen/xen-mapcache.c b/hw/i386/xen/xen-mapcache.c index 4e4f069a24..02e823c5a2 100644 --- a/hw/i386/xen/xen-mapcache.c +++ b/hw/i386/xen/xen-mapcache.c @@ -71,7 +71,7 @@ typedef struct MapCacheRev { typedef struct MapCache { MapCacheEntry *entry; unsigned long nr_buckets; - QTAILQ_HEAD(map_cache_head, MapCacheRev) locked_entries; + QTAILQ_HEAD(, MapCacheRev) locked_entries; /* For most cases (>99.9%), the page address is the same. */ MapCacheEntry *last_entry; diff --git a/hw/ide/core.c b/hw/ide/core.c index 04e22e751d..c3d779db6e 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -575,16 +575,16 @@ int64_t ide_get_sector(IDEState *s) int64_t sector_num; if (s->select & 0x40) { /* lba */ - if (!s->lba48) { - sector_num = ((s->select & 0x0f) << 24) | (s->hcyl << 16) | - (s->lcyl << 8) | s->sector; - } else { - sector_num = ((int64_t)s->hob_hcyl << 40) | - ((int64_t) s->hob_lcyl << 32) | - ((int64_t) s->hob_sector << 24) | - ((int64_t) s->hcyl << 16) | - ((int64_t) s->lcyl << 8) | s->sector; - } + if (!s->lba48) { + sector_num = ((s->select & 0x0f) << 24) | (s->hcyl << 16) | + (s->lcyl << 8) | s->sector; + } else { + sector_num = ((int64_t)s->hob_hcyl << 40) | + ((int64_t) s->hob_lcyl << 32) | + ((int64_t) s->hob_sector << 24) | + ((int64_t) s->hcyl << 16) | + ((int64_t) s->lcyl << 8) | s->sector; + } } else { sector_num = ((s->hcyl << 8) | s->lcyl) * s->heads * s->sectors + (s->select & 0x0f) * s->sectors + (s->sector - 1); @@ -596,19 +596,19 @@ void ide_set_sector(IDEState *s, int64_t sector_num) { unsigned int cyl, r; if (s->select & 0x40) { - if (!s->lba48) { + if (!s->lba48) { s->select = (s->select & 0xf0) | (sector_num >> 24); s->hcyl = (sector_num >> 16); s->lcyl = (sector_num >> 8); s->sector = (sector_num); - } else { - s->sector = sector_num; - s->lcyl = sector_num >> 8; - s->hcyl = sector_num >> 16; - s->hob_sector = sector_num >> 24; - s->hob_lcyl = sector_num >> 32; - s->hob_hcyl = sector_num >> 40; - } + } else { + s->sector = sector_num; + s->lcyl = sector_num >> 8; + s->hcyl = sector_num >> 16; + s->hob_sector = sector_num >> 24; + s->hob_lcyl = sector_num >> 32; + s->hob_hcyl = sector_num >> 40; + } } else { cyl = sector_num / (s->heads * s->sectors); r = sector_num % (s->heads * s->sectors); @@ -1188,17 +1188,17 @@ static void ide_cmd_lba48_transform(IDEState *s, int lba48) * full sector count in ->nsector and ignore ->hob_nsector from now */ if (!s->lba48) { - if (!s->nsector) - s->nsector = 256; + if (!s->nsector) + s->nsector = 256; } else { - if (!s->nsector && !s->hob_nsector) - s->nsector = 65536; - else { - int lo = s->nsector; - int hi = s->hob_nsector; + if (!s->nsector && !s->hob_nsector) + s->nsector = 65536; + else { + int lo = s->nsector; + int hi = s->hob_nsector; - s->nsector = (hi << 8) | lo; - } + s->nsector = (hi << 8) | lo; + } } } @@ -1258,35 +1258,35 @@ void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val) bus->ifs[1].feature = val; break; case ATA_IOPORT_WR_SECTOR_COUNT: - ide_clear_hob(bus); - bus->ifs[0].hob_nsector = bus->ifs[0].nsector; - bus->ifs[1].hob_nsector = bus->ifs[1].nsector; + ide_clear_hob(bus); + bus->ifs[0].hob_nsector = bus->ifs[0].nsector; + bus->ifs[1].hob_nsector = bus->ifs[1].nsector; bus->ifs[0].nsector = val; bus->ifs[1].nsector = val; break; case ATA_IOPORT_WR_SECTOR_NUMBER: - ide_clear_hob(bus); - bus->ifs[0].hob_sector = bus->ifs[0].sector; - bus->ifs[1].hob_sector = bus->ifs[1].sector; + ide_clear_hob(bus); + bus->ifs[0].hob_sector = bus->ifs[0].sector; + bus->ifs[1].hob_sector = bus->ifs[1].sector; bus->ifs[0].sector = val; bus->ifs[1].sector = val; break; case ATA_IOPORT_WR_CYLINDER_LOW: - ide_clear_hob(bus); - bus->ifs[0].hob_lcyl = bus->ifs[0].lcyl; - bus->ifs[1].hob_lcyl = bus->ifs[1].lcyl; + ide_clear_hob(bus); + bus->ifs[0].hob_lcyl = bus->ifs[0].lcyl; + bus->ifs[1].hob_lcyl = bus->ifs[1].lcyl; bus->ifs[0].lcyl = val; bus->ifs[1].lcyl = val; break; case ATA_IOPORT_WR_CYLINDER_HIGH: - ide_clear_hob(bus); - bus->ifs[0].hob_hcyl = bus->ifs[0].hcyl; - bus->ifs[1].hob_hcyl = bus->ifs[1].hcyl; + ide_clear_hob(bus); + bus->ifs[0].hob_hcyl = bus->ifs[0].hcyl; + bus->ifs[1].hob_hcyl = bus->ifs[1].hcyl; bus->ifs[0].hcyl = val; bus->ifs[1].hcyl = val; break; case ATA_IOPORT_WR_DEVICE_HEAD: - /* FIXME: HOB readback uses bit 7 */ + /* FIXME: HOB readback uses bit 7 */ bus->ifs[0].select = (val & ~0x10) | 0xa0; bus->ifs[1].select = (val | 0x10) | 0xa0; /* select drive */ @@ -2146,7 +2146,7 @@ uint32_t ide_ioport_read(void *opaque, uint32_t addr) } else if (!hob) { ret = s->error; } else { - ret = s->hob_feature; + ret = s->hob_feature; } break; case ATA_IOPORT_RR_SECTOR_COUNT: @@ -2155,7 +2155,7 @@ uint32_t ide_ioport_read(void *opaque, uint32_t addr) } else if (!hob) { ret = s->nsector & 0xff; } else { - ret = s->hob_nsector; + ret = s->hob_nsector; } break; case ATA_IOPORT_RR_SECTOR_NUMBER: @@ -2164,7 +2164,7 @@ uint32_t ide_ioport_read(void *opaque, uint32_t addr) } else if (!hob) { ret = s->sector; } else { - ret = s->hob_sector; + ret = s->hob_sector; } break; case ATA_IOPORT_RR_CYLINDER_LOW: @@ -2173,7 +2173,7 @@ uint32_t ide_ioport_read(void *opaque, uint32_t addr) } else if (!hob) { ret = s->lcyl; } else { - ret = s->hob_lcyl; + ret = s->hob_lcyl; } break; case ATA_IOPORT_RR_CYLINDER_HIGH: @@ -2182,7 +2182,7 @@ uint32_t ide_ioport_read(void *opaque, uint32_t addr) } else if (!hob) { ret = s->hcyl; } else { - ret = s->hob_hcyl; + ret = s->hob_hcyl; } break; case ATA_IOPORT_RR_DEVICE_HEAD: @@ -2847,7 +2847,7 @@ static const VMStateDescription vmstate_ide_drive_pio_state = { .fields = (VMStateField[]) { VMSTATE_INT32(req_nb_sectors, IDEState), VMSTATE_VARRAY_INT32(io_buffer, IDEState, io_buffer_total_len, 1, - vmstate_info_uint8, uint8_t), + vmstate_info_uint8, uint8_t), VMSTATE_INT32(cur_io_buffer_offset, IDEState), VMSTATE_INT32(cur_io_buffer_len, IDEState), VMSTATE_UINT8(end_transfer_fn_idx, IDEState), diff --git a/hw/ide/pci.c b/hw/ide/pci.c index fe1ceeb0cd..b75154f99f 100644 --- a/hw/ide/pci.c +++ b/hw/ide/pci.c @@ -25,7 +25,6 @@ #include "qemu/osdep.h" #include "hw/hw.h" #include "hw/pci/pci.h" -#include "hw/isa/isa.h" #include "sysemu/dma.h" #include "qemu/error-report.h" #include "hw/ide/pci.h" diff --git a/hw/ide/piix.c b/hw/ide/piix.c index a3afe1fd29..885c16e938 100644 --- a/hw/ide/piix.c +++ b/hw/ide/piix.c @@ -26,7 +26,6 @@ #include "qemu/osdep.h" #include "hw/hw.h" #include "hw/pci/pci.h" -#include "hw/isa/isa.h" #include "sysemu/block-backend.h" #include "sysemu/sysemu.h" #include "sysemu/blockdev.h" diff --git a/hw/ide/via.c b/hw/ide/via.c index 238f038d72..987d99c5ec 100644 --- a/hw/ide/via.c +++ b/hw/ide/via.c @@ -26,7 +26,6 @@ #include "qemu/osdep.h" #include "hw/hw.h" #include "hw/pci/pci.h" -#include "hw/isa/isa.h" #include "sysemu/sysemu.h" #include "sysemu/dma.h" diff --git a/hw/input/lm832x.c b/hw/input/lm832x.c index 74da30d9ca..cffbf586d4 100644 --- a/hw/input/lm832x.c +++ b/hw/input/lm832x.c @@ -66,7 +66,7 @@ typedef struct { struct { uint16_t file[256]; - uint8_t faddr; + uint8_t faddr; uint8_t addr[3]; QEMUTimer *tm[3]; } pwm; diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c index 07c8801387..3e66713b47 100644 --- a/hw/input/pckbd.c +++ b/hw/input/pckbd.c @@ -55,7 +55,7 @@ #define KBD_CCMD_WRITE_OUTPORT 0xD1 /* write output port */ #define KBD_CCMD_WRITE_OBUF 0xD2 #define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if - initiated by the auxiliary device */ + initiated by the auxiliary device */ #define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */ #define KBD_CCMD_DISABLE_A20 0xDD /* HP vectra only ? */ #define KBD_CCMD_ENABLE_A20 0xDF /* HP vectra only ? */ diff --git a/hw/input/tsc210x.c b/hw/input/tsc210x.c index 1cad57f644..ded0db9351 100644 --- a/hw/input/tsc210x.c +++ b/hw/input/tsc210x.c @@ -577,7 +577,7 @@ static void tsc2102_control_register_write( case 0x01: /* Status / Keypad Control */ if ((s->model & 0xff00) == 0x2100) s->pin_func = value >> 14; - else { + else { s->kb.scan = (value >> 14) & 1; s->kb.debounce = (value >> 11) & 7; if (s->kb.intr && s->kb.scan) { diff --git a/hw/intc/apic.c b/hw/intc/apic.c index c9dd65b3a0..6ea619c360 100644 --- a/hw/intc/apic.c +++ b/hw/intc/apic.c @@ -442,7 +442,7 @@ static int apic_find_dest(uint8_t dest) for (i = 0; i < MAX_APICS; i++) { apic = local_apics[i]; - if (apic && apic->id == dest) + if (apic && apic->id == dest) return i; if (!apic) break; diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c index 4e529729b4..9d75f84d3b 100644 --- a/hw/intc/ioapic.c +++ b/hw/intc/ioapic.c @@ -429,7 +429,7 @@ static void ioapic_class_init(ObjectClass *klass, void *data) } static const TypeInfo ioapic_info = { - .name = "ioapic", + .name = TYPE_IOAPIC, .parent = TYPE_IOAPIC_COMMON, .instance_size = sizeof(IOAPICCommonState), .class_init = ioapic_class_init, diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 0e39c90cbd..d391177ab8 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -179,6 +179,15 @@ static void spapr_xive_map_mmio(sPAPRXive *xive) sysbus_mmio_map(SYS_BUS_DEVICE(xive), 2, xive->tm_base); } +void spapr_xive_mmio_set_enabled(sPAPRXive *xive, bool enable) +{ + memory_region_set_enabled(&xive->source.esb_mmio, enable); + memory_region_set_enabled(&xive->tm_mmio, enable); + + /* Disable the END ESBs until a guest OS makes use of them */ + memory_region_set_enabled(&xive->end_source.esb_mmio, false); +} + /* * When a Virtual Processor is scheduled to run on a HW thread, the * hypervisor pushes its identifier in the OS CAM line. Emulate the @@ -488,20 +497,6 @@ bool spapr_xive_irq_free(sPAPRXive *xive, uint32_t lisn) return true; } -qemu_irq spapr_xive_qirq(sPAPRXive *xive, uint32_t lisn) -{ - XiveSource *xsrc = &xive->source; - - if (lisn >= xive->nr_irqs) { - return NULL; - } - - /* The sPAPR machine/device should have claimed the IRQ before */ - assert(xive_eas_is_valid(&xive->eat[lisn])); - - return xive_source_qirq(xsrc, lisn); -} - /* * XIVE hcalls * diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 406efee064..16e8ffa2aa 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -461,7 +461,7 @@ static void ics_simple_set_irq_lsi(ICSState *ics, int srcno, int val) ics_simple_resend_lsi(ics, srcno); } -static void ics_simple_set_irq(void *opaque, int srcno, int val) +void ics_simple_set_irq(void *opaque, int srcno, int val) { ICSState *ics = (ICSState *)opaque; @@ -571,8 +571,6 @@ static void ics_simple_realize(DeviceState *dev, Error **errp) return; } - ics->qirqs = qemu_allocate_irqs(ics_simple_set_irq, ics, ics->nr_irqs); - qemu_register_reset(ics_simple_reset_handler, ics); } diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c index e8fa9a53ae..ac94594b19 100644 --- a/hw/intc/xics_kvm.c +++ b/hw/intc/xics_kvm.c @@ -298,7 +298,7 @@ static int ics_set_kvm_state(ICSState *ics, int version_id) return 0; } -static void ics_kvm_set_irq(void *opaque, int srcno, int val) +void ics_kvm_set_irq(void *opaque, int srcno, int val) { ICSState *ics = opaque; struct kvm_irq_level args; @@ -344,7 +344,6 @@ static void ics_kvm_realize(DeviceState *dev, Error **errp) error_propagate(errp, local_err); return; } - ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs); qemu_register_reset(ics_kvm_reset_handler, ics); } diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index f67d3c80bf..9c1a90d709 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -44,7 +44,7 @@ static target_ulong h_cppr(PowerPCCPU *cpu, sPAPRMachineState *spapr, { target_ulong cppr = args[0]; - icp_set_cppr(ICP(cpu->intc), cppr); + icp_set_cppr(cpu->icp, cppr); return H_SUCCESS; } @@ -65,7 +65,7 @@ static target_ulong h_ipi(PowerPCCPU *cpu, sPAPRMachineState *spapr, static target_ulong h_xirr(PowerPCCPU *cpu, sPAPRMachineState *spapr, target_ulong opcode, target_ulong *args) { - uint32_t xirr = icp_accept(ICP(cpu->intc)); + uint32_t xirr = icp_accept(cpu->icp); args[0] = xirr; return H_SUCCESS; @@ -74,7 +74,7 @@ static target_ulong h_xirr(PowerPCCPU *cpu, sPAPRMachineState *spapr, static target_ulong h_xirr_x(PowerPCCPU *cpu, sPAPRMachineState *spapr, target_ulong opcode, target_ulong *args) { - uint32_t xirr = icp_accept(ICP(cpu->intc)); + uint32_t xirr = icp_accept(cpu->icp); args[0] = xirr; args[1] = cpu_get_host_ticks(); @@ -86,7 +86,7 @@ static target_ulong h_eoi(PowerPCCPU *cpu, sPAPRMachineState *spapr, { target_ulong xirr = args[0]; - icp_eoi(ICP(cpu->intc), xirr); + icp_eoi(cpu->icp, xirr); return H_SUCCESS; } @@ -94,7 +94,7 @@ static target_ulong h_ipoll(PowerPCCPU *cpu, sPAPRMachineState *spapr, target_ulong opcode, target_ulong *args) { uint32_t mfrr; - uint32_t xirr = icp_ipoll(ICP(cpu->intc), &mfrr); + uint32_t xirr = icp_ipoll(cpu->icp, &mfrr); args[0] = xirr; args[1] = mfrr; diff --git a/hw/intc/xive.c b/hw/intc/xive.c index ea33494338..a3cb0cf0e3 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -321,7 +321,7 @@ static void xive_tm_write(void *opaque, hwaddr offset, uint64_t value, unsigned size) { PowerPCCPU *cpu = POWERPC_CPU(current_cpu); - XiveTCTX *tctx = XIVE_TCTX(cpu->intc); + XiveTCTX *tctx = cpu->tctx; const XiveTmOp *xto; /* @@ -360,7 +360,7 @@ static void xive_tm_write(void *opaque, hwaddr offset, static uint64_t xive_tm_read(void *opaque, hwaddr offset, unsigned size) { PowerPCCPU *cpu = POWERPC_CPU(current_cpu); - XiveTCTX *tctx = XIVE_TCTX(cpu->intc); + XiveTCTX *tctx = cpu->tctx; const XiveTmOp *xto; /* @@ -845,7 +845,7 @@ static const MemoryRegionOps xive_source_esb_ops = { }, }; -static void xive_source_set_irq(void *opaque, int srcno, int val) +void xive_source_set_irq(void *opaque, int srcno, int val) { XiveSource *xsrc = XIVE_SOURCE(opaque); bool notify = false; @@ -932,9 +932,6 @@ static void xive_source_realize(DeviceState *dev, Error **errp) &xive_source_esb_ops, xsrc, "xive.esb", (1ull << xsrc->esb_shift) * xsrc->nr_irqs); - xsrc->qirqs = qemu_allocate_irqs(xive_source_set_irq, xsrc, - xsrc->nr_irqs); - qemu_register_reset(xive_source_reset, dev); } @@ -1186,7 +1183,7 @@ static bool xive_presenter_match(XiveRouter *xrtr, uint8_t format, CPU_FOREACH(cs) { PowerPCCPU *cpu = POWERPC_CPU(cs); - XiveTCTX *tctx = XIVE_TCTX(cpu->intc); + XiveTCTX *tctx = cpu->tctx; int ring; /* diff --git a/hw/mem/memory-device.c b/hw/mem/memory-device.c index 8be63c8032..5f2c408036 100644 --- a/hw/mem/memory-device.c +++ b/hw/mem/memory-device.c @@ -100,9 +100,8 @@ static uint64_t memory_device_get_free_addr(MachineState *ms, uint64_t align, uint64_t size, Error **errp) { - uint64_t address_space_start, address_space_end; GSList *list = NULL, *item; - uint64_t new_addr = 0; + Range as, new = range_empty; if (!ms->device_memory) { error_setg(errp, "memory devices (e.g. for memory hotplug) are not " @@ -115,13 +114,11 @@ static uint64_t memory_device_get_free_addr(MachineState *ms, "enabled, please specify the maxmem option"); return 0; } - address_space_start = ms->device_memory->base; - address_space_end = address_space_start + - memory_region_size(&ms->device_memory->mr); - g_assert(address_space_end >= address_space_start); + range_init_nofail(&as, ms->device_memory->base, + memory_region_size(&ms->device_memory->mr)); - /* address_space_start indicates the maximum alignment we expect */ - if (!QEMU_IS_ALIGNED(address_space_start, align)) { + /* start of address space indicates the maximum alignment we expect */ + if (!QEMU_IS_ALIGNED(range_lob(&as), align)) { error_setg(errp, "the alignment (0x%" PRIx64 ") is not supported", align); return 0; @@ -145,20 +142,18 @@ static uint64_t memory_device_get_free_addr(MachineState *ms, } if (hint) { - new_addr = *hint; - if (new_addr < address_space_start) { + if (range_init(&new, *hint, size) || !range_contains_range(&as, &new)) { error_setg(errp, "can't add memory device [0x%" PRIx64 ":0x%" PRIx64 - "] before 0x%" PRIx64, new_addr, size, - address_space_start); - return 0; - } else if ((new_addr + size) > address_space_end) { - error_setg(errp, "can't add memory device [0x%" PRIx64 ":0x%" PRIx64 - "] beyond 0x%" PRIx64, new_addr, size, - address_space_end); + "], usable range for memory devices [0x%" PRIx64 ":0x%" + PRIx64 "]", *hint, size, range_lob(&as), + range_size(&as)); return 0; } } else { - new_addr = address_space_start; + if (range_init(&new, range_lob(&as), size)) { + error_setg(errp, "can't add memory device, device too big"); + return 0; + } } /* find address range that will fit new memory device */ @@ -166,30 +161,36 @@ static uint64_t memory_device_get_free_addr(MachineState *ms, for (item = list; item; item = g_slist_next(item)) { const MemoryDeviceState *md = item->data; const MemoryDeviceClass *mdc = MEMORY_DEVICE_GET_CLASS(OBJECT(md)); - uint64_t md_size, md_addr; + uint64_t next_addr; + Range tmp; - md_addr = mdc->get_addr(md); - md_size = memory_device_get_region_size(md, &error_abort); + range_init_nofail(&tmp, mdc->get_addr(md), + memory_device_get_region_size(md, &error_abort)); - if (ranges_overlap(md_addr, md_size, new_addr, size)) { + if (range_overlaps_range(&tmp, &new)) { if (hint) { const DeviceState *d = DEVICE(md); error_setg(errp, "address range conflicts with memory device" " id='%s'", d->id ? d->id : "(unnamed)"); goto out; } - new_addr = QEMU_ALIGN_UP(md_addr + md_size, align); + + next_addr = QEMU_ALIGN_UP(range_upb(&tmp) + 1, align); + if (!next_addr || range_init(&new, next_addr, range_size(&new))) { + range_make_empty(&new); + break; + } } } - if (new_addr + size > address_space_end) { + if (!range_contains_range(&as, &new)) { error_setg(errp, "could not find position in guest address space for " "memory device - memory fragmented due to alignments"); goto out; } out: g_slist_free(list); - return new_addr; + return range_lob(&new); } MemoryDeviceInfoList *qmp_memory_device_list(void) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 1cd8aac658..f707e59c7a 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -395,7 +395,7 @@ static void gt64120_writel (void *opaque, hwaddr addr, s->regs[GT_CPU] = val; break; case GT_MULTI: - /* Read-only register as only one GT64xxx is present on the CPU bus */ + /* Read-only register as only one GT64xxx is present on the CPU bus */ break; /* CPU Address Decode */ @@ -457,13 +457,13 @@ static void gt64120_writel (void *opaque, hwaddr addr, case GT_CPUERR_DATALO: case GT_CPUERR_DATAHI: case GT_CPUERR_PARITY: - /* Read-only registers, do nothing */ + /* Read-only registers, do nothing */ break; /* CPU Sync Barrier */ case GT_PCI0SYNC: case GT_PCI1SYNC: - /* Read-only registers, do nothing */ + /* Read-only registers, do nothing */ break; /* SDRAM and Device Address Decode */ diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c index 3e852e98cf..1922407394 100644 --- a/hw/mips/mips_r4k.c +++ b/hw/mips/mips_r4k.c @@ -239,7 +239,7 @@ void mips_r4k_init(MachineState *machine) sector_len, mips_rom / sector_len, 4, 0, 0, 0, 0, be)) { fprintf(stderr, "qemu: Error registering flash memory.\n"); - } + } } else if (!qtest_enabled()) { /* not fatal */ warn_report("could not load MIPS bios '%s'", bios_name); @@ -285,7 +285,7 @@ void mips_r4k_init(MachineState *machine) for(i = 0; i < MAX_IDE_BUS; i++) isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i], hd[MAX_IDE_DEVS * i], - hd[MAX_IDE_DEVS * i + 1]); + hd[MAX_IDE_DEVS * i + 1]); isa_create_simple(isa_bus, TYPE_I8042); } diff --git a/hw/misc/macio/mac_dbdma.c b/hw/misc/macio/mac_dbdma.c index 87ae246d37..e5917d8f2e 100644 --- a/hw/misc/macio/mac_dbdma.c +++ b/hw/misc/macio/mac_dbdma.c @@ -38,7 +38,6 @@ */ #include "qemu/osdep.h" #include "hw/hw.h" -#include "hw/isa/isa.h" #include "hw/ppc/mac_dbdma.h" #include "qemu/main-loop.h" #include "qemu/log.h" diff --git a/hw/misc/max111x.c b/hw/misc/max111x.c index 6dbdc03677..ac6d35a81d 100644 --- a/hw/misc/max111x.c +++ b/hw/misc/max111x.c @@ -43,9 +43,9 @@ typedef struct { #define CB_START (1 << 7) #define CHANNEL_NUM(v, b0, b1, b2) \ - ((((v) >> (2 + (b0))) & 4) | \ - (((v) >> (3 + (b1))) & 2) | \ - (((v) >> (4 + (b2))) & 1)) + ((((v) >> (2 + (b0))) & 4) | \ + (((v) >> (3 + (b1))) & 2) | \ + (((v) >> (4 + (b2))) & 1)) static uint32_t max111x_read(MAX111xState *s) { diff --git a/hw/misc/omap_l4.c b/hw/misc/omap_l4.c index 96fc057b4e..c217728c78 100644 --- a/hw/misc/omap_l4.c +++ b/hw/misc/omap_l4.c @@ -112,8 +112,8 @@ static const MemoryRegionOps omap_l4ta_ops = { struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus, const struct omap_l4_region_s *regions, - const struct omap_l4_agent_info_s *agents, - int cs) + const struct omap_l4_agent_info_s *agents, + int cs) { int i; struct omap_target_agent_s *ta = NULL; diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c index 4b0ce09c5e..c6b6f7262d 100644 --- a/hw/moxie/moxiesim.c +++ b/hw/moxie/moxiesim.c @@ -31,7 +31,6 @@ #include "cpu.h" #include "hw/sysbus.h" #include "hw/hw.h" -#include "hw/isa/isa.h" #include "net/net.h" #include "sysemu/sysemu.h" #include "hw/boards.h" diff --git a/hw/net/mipsnet.c b/hw/net/mipsnet.c index 03b3104278..5ec13105df 100644 --- a/hw/net/mipsnet.c +++ b/hw/net/mipsnet.c @@ -112,27 +112,27 @@ static uint64_t mipsnet_ioport_read(void *opaque, hwaddr addr, addr &= 0x3f; switch (addr) { case MIPSNET_DEV_ID: - ret = be32_to_cpu(0x4d495053); /* MIPS */ + ret = be32_to_cpu(0x4d495053); /* MIPS */ break; case MIPSNET_DEV_ID + 4: - ret = be32_to_cpu(0x4e455430); /* NET0 */ + ret = be32_to_cpu(0x4e455430); /* NET0 */ break; case MIPSNET_BUSY: - ret = s->busy; + ret = s->busy; break; case MIPSNET_RX_DATA_COUNT: - ret = s->rx_count; + ret = s->rx_count; break; case MIPSNET_TX_DATA_COUNT: - ret = s->tx_count; + ret = s->tx_count; break; case MIPSNET_INT_CTL: - ret = s->intctl; + ret = s->intctl; s->intctl &= ~MIPSNET_INTCTL_TESTBIT; break; case MIPSNET_INTERRUPT_INFO: /* XXX: This seems to be a per-VPE interrupt number. */ - ret = 0; + ret = 0; break; case MIPSNET_RX_DATA_BUFFER: if (s->rx_count) { @@ -161,7 +161,7 @@ static void mipsnet_ioport_write(void *opaque, hwaddr addr, trace_mipsnet_write(addr, val); switch (addr) { case MIPSNET_TX_DATA_COUNT: - s->tx_count = (val <= MAX_ETH_FRAME_SIZE) ? val : 0; + s->tx_count = (val <= MAX_ETH_FRAME_SIZE) ? val : 0; s->tx_written = 0; break; case MIPSNET_INT_CTL: diff --git a/hw/net/ne2000.c b/hw/net/ne2000.c index 869518ee06..037afc8052 100644 --- a/hw/net/ne2000.c +++ b/hw/net/ne2000.c @@ -145,7 +145,7 @@ static void ne2000_update_irq(NE2000State *s) isr = (s->isr & s->imr) & 0x7f; #if defined(DEBUG_NE2000) printf("NE2000: Set IRQ to %d (%02x %02x)\n", - isr ? 1 : 0, s->isr, s->imr); + isr ? 1 : 0, s->isr, s->imr); #endif qemu_set_irq(s->irq, (isr != 0)); } @@ -396,12 +396,12 @@ static uint32_t ne2000_ioport_read(void *opaque, uint32_t addr) case EN0_ISR: ret = s->isr; break; - case EN0_RSARLO: - ret = s->rsar & 0x00ff; - break; - case EN0_RSARHI: - ret = s->rsar >> 8; - break; + case EN0_RSARLO: + ret = s->rsar & 0x00ff; + break; + case EN0_RSARHI: + ret = s->rsar >> 8; + break; case EN1_PHYS ... EN1_PHYS + 5: ret = s->phys[offset - EN1_PHYS]; break; @@ -420,21 +420,21 @@ static uint32_t ne2000_ioport_read(void *opaque, uint32_t addr) case EN2_STOPPG: ret = s->stop >> 8; break; - case EN0_RTL8029ID0: - ret = 0x50; - break; - case EN0_RTL8029ID1: - ret = 0x43; - break; - case EN3_CONFIG0: - ret = 0; /* 10baseT media */ - break; - case EN3_CONFIG2: - ret = 0x40; /* 10baseT active */ - break; - case EN3_CONFIG3: - ret = 0x40; /* Full duplex */ - break; + case EN0_RTL8029ID0: + ret = 0x50; + break; + case EN0_RTL8029ID1: + ret = 0x43; + break; + case EN3_CONFIG0: + ret = 0; /* 10baseT media */ + break; + case EN3_CONFIG2: + ret = 0x40; /* 10baseT active */ + break; + case EN3_CONFIG3: + ret = 0x40; /* Full duplex */ + break; default: ret = 0x00; break; diff --git a/hw/net/rocker/rocker.c b/hw/net/rocker/rocker.c index c02cbefece..5266f9b7dd 100644 --- a/hw/net/rocker/rocker.c +++ b/hw/net/rocker/rocker.c @@ -1279,7 +1279,7 @@ static World *rocker_world_type_by_name(Rocker *r, const char *name) for (i = 0; i < ROCKER_WORLD_TYPE_MAX; i++) { if (strcmp(name, world_name(r->worlds[i])) == 0) { return r->worlds[i]; - } + } } return NULL; } diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c index 385b1a03e9..e37fc34839 100644 --- a/hw/net/virtio-net.c +++ b/hw/net/virtio-net.c @@ -1375,10 +1375,10 @@ static int32_t virtio_net_flush_tx(VirtIONetQueue *q) n->guest_hdr_len, -1); if (out_num == VIRTQUEUE_MAX_SIZE) { goto drop; - } + } out_num += 1; out_sg = sg2; - } + } } /* * If host wants to see the guest header as is, we can diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c index 54746a4030..4665dc95ad 100644 --- a/hw/net/vmxnet3.c +++ b/hw/net/vmxnet3.c @@ -137,7 +137,7 @@ typedef struct VMXNET3Class { OBJECT_GET_CLASS(VMXNET3Class, (obj), TYPE_VMXNET3) static inline void vmxnet3_ring_init(PCIDevice *d, - Vmxnet3Ring *ring, + Vmxnet3Ring *ring, hwaddr pa, uint32_t size, uint32_t cell_size, @@ -181,13 +181,13 @@ static inline hwaddr vmxnet3_ring_curr_cell_pa(Vmxnet3Ring *ring) } static inline void vmxnet3_ring_read_curr_cell(PCIDevice *d, Vmxnet3Ring *ring, - void *buff) + void *buff) { vmw_shmem_read(d, vmxnet3_ring_curr_cell_pa(ring), buff, ring->cell_size); } static inline void vmxnet3_ring_write_curr_cell(PCIDevice *d, Vmxnet3Ring *ring, - void *buff) + void *buff) { vmw_shmem_write(d, vmxnet3_ring_curr_cell_pa(ring), buff, ring->cell_size); } diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index de58c7be46..53e8e010a8 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -27,7 +27,6 @@ #include "sysemu/sysemu.h" #include "sysemu/dma.h" #include "hw/boards.h" -#include "hw/isa/isa.h" #include "hw/nvram/fw_cfg.h" #include "hw/sysbus.h" #include "trace.h" diff --git a/hw/pci-host/pam.c b/hw/pci-host/pam.c index e361ecb7ee..aa5ecfd0c2 100644 --- a/hw/pci-host/pam.c +++ b/hw/pci-host/pam.c @@ -52,11 +52,13 @@ void init_pam(DeviceState *dev, MemoryRegion *ram_memory, memory_region_init_alias(&mem->alias[2], OBJECT(dev), "pam-pci", ram_memory, start, size); + memory_region_transaction_begin(); for (i = 0; i < 4; ++i) { memory_region_set_enabled(&mem->alias[i], false); memory_region_add_subregion_overlap(system_memory, start, &mem->alias[i], 1); } + memory_region_transaction_commit(); mem->current = 0; } diff --git a/hw/pci/msix.c b/hw/pci/msix.c index 702dac4ec7..c7bdbeda9e 100644 --- a/hw/pci/msix.c +++ b/hw/pci/msix.c @@ -501,7 +501,7 @@ void msix_reset(PCIDevice *dev) } msix_clear_all_vectors(dev); dev->config[dev->msix_cap + MSIX_CONTROL_OFFSET] &= - ~dev->wmask[dev->msix_cap + MSIX_CONTROL_OFFSET]; + ~dev->wmask[dev->msix_cap + MSIX_CONTROL_OFFSET]; memset(dev->msix_table, 0, dev->msix_entries_nr * PCI_MSIX_ENTRY_SIZE); memset(dev->msix_pba, 0, QEMU_ALIGN_UP(dev->msix_entries_nr, 64) / 8); msix_mask_all(dev, dev->msix_entries_nr); diff --git a/hw/pci/pci.c b/hw/pci/pci.c index d831fa0a36..c9fc2fbe19 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -211,13 +211,13 @@ int pci_bar(PCIDevice *d, int reg) static inline int pci_irq_state(PCIDevice *d, int irq_num) { - return (d->irq_state >> irq_num) & 0x1; + return (d->irq_state >> irq_num) & 0x1; } static inline void pci_set_irq_state(PCIDevice *d, int irq_num, int level) { - d->irq_state &= ~(0x1 << irq_num); - d->irq_state |= level << irq_num; + d->irq_state &= ~(0x1 << irq_num); + d->irq_state |= level << irq_num; } static void pci_change_irq_level(PCIDevice *pci_dev, int irq_num, int change) @@ -333,6 +333,13 @@ static void pci_host_bus_register(DeviceState *host) QLIST_INSERT_HEAD(&pci_host_bridges, host_bridge, next); } +static void pci_host_bus_unregister(DeviceState *host) +{ + PCIHostState *host_bridge = PCI_HOST_BRIDGE(host); + + QLIST_REMOVE(host_bridge, next); +} + PCIBus *pci_device_root_bus(const PCIDevice *d) { PCIBus *bus = pci_get_bus(d); @@ -379,6 +386,11 @@ static void pci_root_bus_init(PCIBus *bus, DeviceState *parent, pci_host_bus_register(parent); } +static void pci_bus_uninit(PCIBus *bus) +{ + pci_host_bus_unregister(BUS(bus)->parent); +} + bool pci_bus_is_express(PCIBus *bus) { return object_dynamic_cast(OBJECT(bus), TYPE_PCIE_BUS); @@ -413,6 +425,12 @@ PCIBus *pci_root_bus_new(DeviceState *parent, const char *name, return bus; } +void pci_root_bus_cleanup(PCIBus *bus) +{ + pci_bus_uninit(bus); + object_unparent(OBJECT(bus)); +} + void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, void *irq_opaque, int nirq) { @@ -423,6 +441,15 @@ void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, bus->irq_count = g_malloc0(nirq * sizeof(bus->irq_count[0])); } +void pci_bus_irqs_cleanup(PCIBus *bus) +{ + bus->set_irq = NULL; + bus->map_irq = NULL; + bus->irq_opaque = NULL; + bus->nirq = 0; + g_free(bus->irq_count); +} + PCIBus *pci_register_root_bus(DeviceState *parent, const char *name, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, void *irq_opaque, @@ -439,6 +466,12 @@ PCIBus *pci_register_root_bus(DeviceState *parent, const char *name, return bus; } +void pci_unregister_root_bus(PCIBus *bus) +{ + pci_bus_irqs_cleanup(bus); + pci_root_bus_cleanup(bus); +} + int pci_bus_num(PCIBus *s) { return PCI_BUS_GET_CLASS(s)->bus_num(s); @@ -571,8 +604,8 @@ const VMStateDescription vmstate_pci_device = { 0, vmstate_info_pci_config, PCIE_CONFIG_SPACE_SIZE), VMSTATE_BUFFER_UNSAFE_INFO(irq_state, PCIDevice, 2, - vmstate_info_pci_irq_state, - PCI_NUM_PINS * sizeof(int32_t)), + vmstate_info_pci_irq_state, + PCI_NUM_PINS * sizeof(int32_t)), VMSTATE_END_OF_LIST() } }; @@ -624,21 +657,21 @@ static int pci_parse_devaddr(const char *addr, int *domp, int *busp, p = addr; val = strtoul(p, &e, 16); if (e == p) - return -1; + return -1; if (*e == ':') { - bus = val; - p = e + 1; - val = strtoul(p, &e, 16); - if (e == p) - return -1; - if (*e == ':') { - dom = bus; - bus = val; - p = e + 1; - val = strtoul(p, &e, 16); - if (e == p) - return -1; - } + bus = val; + p = e + 1; + val = strtoul(p, &e, 16); + if (e == p) + return -1; + if (*e == ':') { + dom = bus; + bus = val; + p = e + 1; + val = strtoul(p, &e, 16); + if (e == p) + return -1; + } } slot = val; @@ -657,10 +690,10 @@ static int pci_parse_devaddr(const char *addr, int *domp, int *busp, /* if funcp == NULL func is 0 */ if (dom > 0xffff || bus > 0xff || slot > 0x1f || func > 7) - return -1; + return -1; if (*e) - return -1; + return -1; *domp = dom; *busp = bus; @@ -1217,7 +1250,7 @@ pcibus_t pci_get_bar_addr(PCIDevice *pci_dev, int region_num) } static pcibus_t pci_bar_address(PCIDevice *d, - int reg, uint8_t type, pcibus_t size) + int reg, uint8_t type, pcibus_t size) { pcibus_t new_addr, last_addr; int bar = pci_bar(d, reg); diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index b9143ac88b..c6d9ded320 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -369,7 +369,7 @@ void pci_bridge_initfn(PCIDevice *dev, const char *typename) * let users address the bus using the device name. */ if (!br->bus_name && dev->qdev.id && *dev->qdev.id) { - br->bus_name = dev->qdev.id; + br->bus_name = dev->qdev.id; } qbus_create_inplace(sec_bus, sizeof(br->sec_bus), typename, DEVICE(dev), diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 346f5e7aed..d84acef55b 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -668,11 +668,20 @@ static uint32_t pnv_chip_core_pir_p8(PnvChip *chip, uint32_t core_id) return (chip->chip_id << 7) | (core_id << 3); } -static Object *pnv_chip_power8_intc_create(PnvChip *chip, Object *child, - Error **errp) +static void pnv_chip_power8_intc_create(PnvChip *chip, PowerPCCPU *cpu, + Error **errp) { - return icp_create(child, TYPE_PNV_ICP, XICS_FABRIC(qdev_get_machine()), - errp); + Error *local_err = NULL; + Object *obj; + + obj = icp_create(OBJECT(cpu), TYPE_PNV_ICP, XICS_FABRIC(qdev_get_machine()), + &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + cpu->icp = ICP(obj); } /* @@ -690,10 +699,10 @@ static uint32_t pnv_chip_core_pir_p9(PnvChip *chip, uint32_t core_id) return (chip->chip_id << 8) | (core_id << 2); } -static Object *pnv_chip_power9_intc_create(PnvChip *chip, Object *child, - Error **errp) +static void pnv_chip_power9_intc_create(PnvChip *chip, PowerPCCPU *cpu, + Error **errp) { - return NULL; + return; } /* Allowed core identifiers on a POWER8 Processor Chip : @@ -1090,7 +1099,7 @@ static ICPState *pnv_icp_get(XICSFabric *xi, int pir) { PowerPCCPU *cpu = ppc_get_vcpu_by_pir(pir); - return cpu ? ICP(cpu->intc) : NULL; + return cpu ? cpu->icp : NULL; } static void pnv_pic_print_info(InterruptStatsProvider *obj, @@ -1103,7 +1112,7 @@ static void pnv_pic_print_info(InterruptStatsProvider *obj, CPU_FOREACH(cs) { PowerPCCPU *cpu = POWERPC_CPU(cs); - icp_pic_print_info(ICP(cpu->intc), mon); + icp_pic_print_info(cpu->icp, mon); } for (i = 0; i < pnv->num_chips; i++) { diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index ad1bcc7990..b98f277f1e 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -114,7 +114,7 @@ static void pnv_realize_vcpu(PowerPCCPU *cpu, PnvChip *chip, Error **errp) return; } - cpu->intc = pcc->intc_create(chip, OBJECT(cpu), &local_err); + pcc->intc_create(chip, cpu, &local_err); if (local_err) { error_propagate(errp, local_err); return; @@ -190,7 +190,7 @@ err: static void pnv_unrealize_vcpu(PowerPCCPU *cpu) { qemu_unregister_reset(pnv_cpu_reset, cpu); - object_unparent(cpu->intc); + object_unparent(OBJECT(cpu->icp)); cpu_remove_sync(CPU(cpu)); object_unparent(OBJECT(cpu)); } diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 5b969127c3..8ced095063 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -207,7 +207,6 @@ static const uint64_t stat_bits[] = { void pnv_psi_irq_set(PnvPsi *psi, PnvPsiIrq irq, bool state) { - ICSState *ics = &psi->ics; uint32_t xivr_reg; uint32_t stat_reg; uint32_t src; @@ -227,14 +226,14 @@ void pnv_psi_irq_set(PnvPsi *psi, PnvPsiIrq irq, bool state) /* TODO: optimization, check mask here. That means * re-evaluating when unmasking */ - qemu_irq_raise(ics->qirqs[src]); + qemu_irq_raise(psi->qirqs[src]); } else { psi->regs[stat_reg] &= ~stat_bits[irq]; /* FSP and PSI are muxed so don't lower if either is still set */ if (stat_reg != PSIHB_XSCOM_CR || !(psi->regs[stat_reg] & (PSIHB_CR_PSI_IRQ | PSIHB_CR_FSP_IRQ))) { - qemu_irq_lower(ics->qirqs[src]); + qemu_irq_lower(psi->qirqs[src]); } else { state = true; } @@ -491,6 +490,8 @@ static void pnv_psi_realize(DeviceState *dev, Error **errp) ics_set_irq_type(ics, i, true); } + psi->qirqs = qemu_allocate_irqs(ics_simple_set_irq, ics, ics->nr_irqs); + /* XSCOM region for PSI registers */ pnv_xscom_region_init(&psi->xscom_regs, OBJECT(dev), &pnv_psi_xscom_ops, psi, "xscom-psi", PNV_XSCOM_PSIHB_SIZE); diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c index e1aadf126d..8d3a797cb8 100644 --- a/hw/ppc/ppc405_uc.c +++ b/hw/ppc/ppc405_uc.c @@ -1885,7 +1885,7 @@ CPUPPCState *ppc405ep_init(MemoryRegion *address_space_mem, pic = ppcuic_init(env, irqs, 0x0C0, 0, 1); *picp = pic; /* SDRAM controller */ - /* XXX 405EP has no ECC interrupt */ + /* XXX 405EP has no ECC interrupt */ ppc4xx_sdram_init(env, pic[17], 2, ram_memories, ram_bases, ram_sizes, do_init); /* External bus controller */ diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c index 8c6f3c9577..9b6e4c60fa 100644 --- a/hw/ppc/ppc4xx_devs.c +++ b/hw/ppc/ppc4xx_devs.c @@ -32,8 +32,7 @@ #include "exec/address-spaces.h" #include "qemu/error-report.h" -#define DEBUG_UIC - +/*#define DEBUG_UIC*/ #ifdef DEBUG_UIC # define LOG_UIC(...) qemu_log_mask(CPU_LOG_INT, ## __VA_ARGS__) diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index 2afb7f437e..7bda86a7d0 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -538,7 +538,7 @@ static void ppc_prep_init(MachineState *machine) nb_nics1 = NE2000_NB_MAX; for(i = 0; i < nb_nics1; i++) { if (nd_table[i].model == NULL) { - nd_table[i].model = g_strdup("ne2k_isa"); + nd_table[i].model = g_strdup("ne2k_isa"); } if (strcmp(nd_table[i].model, "ne2k_isa") == 0) { isa_ne2000_init(isa_bus, ne2000_io[i], ne2000_irq[i], @@ -552,7 +552,7 @@ static void ppc_prep_init(MachineState *machine) for(i = 0; i < MAX_IDE_BUS; i++) { isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i], hd[2 * i], - hd[2 * i + 1]); + hd[2 * i + 1]); } cpu = POWERPC_CPU(first_cpu); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 5671608cea..0942f35bf8 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1048,6 +1048,7 @@ static void spapr_dt_rtas(sPAPRMachineState *spapr, void *fdt) add_str(hypertas, "hcall-sprg0"); add_str(hypertas, "hcall-copy"); add_str(hypertas, "hcall-debug"); + add_str(hypertas, "hcall-vphn"); add_str(qemu_hypertas, "hcall-memop1"); if (!kvm_enabled() || kvmppc_spapr_use_multitce()) { @@ -1668,7 +1669,10 @@ static void spapr_machine_reset(void) /* Load the fdt */ qemu_fdt_dumpdtb(fdt, fdt_totalsize(fdt)); cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt)); - g_free(fdt); + g_free(spapr->fdt_blob); + spapr->fdt_size = fdt_totalsize(fdt); + spapr->fdt_initial_size = spapr->fdt_size; + spapr->fdt_blob = fdt; /* Set up the entry state */ spapr_cpu_set_entry_state(first_ppc_cpu, SPAPR_ENTRY_POINT, fdt_addr); @@ -1743,12 +1747,17 @@ static int spapr_post_load(void *opaque, int version_id) return err; } - /* In earlier versions, there was no separate qdev for the PAPR + /* + * In earlier versions, there was no separate qdev for the PAPR * RTC, so the RTC offset was stored directly in sPAPREnvironment. * So when migrating from those versions, poke the incoming offset - * value into the RTC device */ + * value into the RTC device + */ if (version_id < 3) { err = spapr_rtc_import_offset(&spapr->rtc, spapr->rtc_offset); + if (err) { + return err; + } } if (kvm_enabled() && spapr->patb_entry) { @@ -1919,6 +1928,39 @@ static const VMStateDescription vmstate_spapr_irq_map = { }, }; +static bool spapr_dtb_needed(void *opaque) +{ + sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(opaque); + + return smc->update_dt_enabled; +} + +static int spapr_dtb_pre_load(void *opaque) +{ + sPAPRMachineState *spapr = (sPAPRMachineState *)opaque; + + g_free(spapr->fdt_blob); + spapr->fdt_blob = NULL; + spapr->fdt_size = 0; + + return 0; +} + +static const VMStateDescription vmstate_spapr_dtb = { + .name = "spapr_dtb", + .version_id = 1, + .minimum_version_id = 1, + .needed = spapr_dtb_needed, + .pre_load = spapr_dtb_pre_load, + .fields = (VMStateField[]) { + VMSTATE_UINT32(fdt_initial_size, sPAPRMachineState), + VMSTATE_UINT32(fdt_size, sPAPRMachineState), + VMSTATE_VBUFFER_ALLOC_UINT32(fdt_blob, sPAPRMachineState, 0, NULL, + fdt_size), + VMSTATE_END_OF_LIST() + }, +}; + static const VMStateDescription vmstate_spapr = { .name = "spapr", .version_id = 3, @@ -1948,6 +1990,7 @@ static const VMStateDescription vmstate_spapr = { &vmstate_spapr_cap_ibs, &vmstate_spapr_irq_map, &vmstate_spapr_cap_nested_kvm_hv, + &vmstate_spapr_dtb, NULL } }; @@ -2514,6 +2557,17 @@ static void spapr_init_cpus(sPAPRMachineState *spapr) } } +static PCIHostState *spapr_create_default_phb(void) +{ + DeviceState *dev; + + dev = qdev_create(NULL, TYPE_SPAPR_PCI_HOST_BRIDGE); + qdev_prop_set_uint32(dev, "index", 0); + qdev_init_nofail(dev); + + return PCI_HOST_BRIDGE(dev); +} + /* pSeries LPAR / sPAPR hardware init */ static void spapr_machine_init(MachineState *machine) { @@ -2632,11 +2686,11 @@ static void spapr_machine_init(MachineState *machine) spapr_ovec_set(spapr->ov5, OV5_DRMEM_V2); /* advertise XIVE on POWER9 machines */ - if (spapr->irq->ov5 & SPAPR_OV5_XIVE_EXPLOIT) { + if (spapr->irq->ov5 & (SPAPR_OV5_XIVE_EXPLOIT | SPAPR_OV5_XIVE_BOTH)) { if (ppc_type_check_compat(machine->cpu_type, CPU_POWERPC_LOGICAL_3_00, 0, spapr->max_compat_pvr)) { spapr_ovec_set(spapr->ov5, OV5_XIVE_EXPLOIT); - } else { + } else if (spapr->irq->ov5 & SPAPR_OV5_XIVE_EXPLOIT) { error_report("XIVE-only machines require a POWER9 CPU"); exit(1); } @@ -2746,7 +2800,7 @@ static void spapr_machine_init(MachineState *machine) /* Set up PCI */ spapr_pci_rtas_init(); - phb = spapr_create_phb(spapr, 0); + phb = spapr_create_default_phb(); for (i = 0; i < nb_nics; i++) { NICInfo *nd = &nd_table[i]; @@ -3062,6 +3116,8 @@ static char *spapr_get_ic_mode(Object *obj, Error **errp) return g_strdup("xics"); } else if (spapr->irq == &spapr_irq_xive) { return g_strdup("xive"); + } else if (spapr->irq == &spapr_irq_dual) { + return g_strdup("dual"); } g_assert_not_reached(); } @@ -3075,6 +3131,8 @@ static void spapr_set_ic_mode(Object *obj, const char *value, Error **errp) spapr->irq = &spapr_irq_xics; } else if (strcmp(value, "xive") == 0) { spapr->irq = &spapr_irq_xive; + } else if (strcmp(value, "dual") == 0) { + spapr->irq = &spapr_irq_dual; } else { error_setg(errp, "Bad value for \"ic-mode\" property"); } @@ -3123,7 +3181,7 @@ static void spapr_instance_init(Object *obj) object_property_add_str(obj, "ic-mode", spapr_get_ic_mode, spapr_set_ic_mode, NULL); object_property_set_description(obj, "ic-mode", - "Specifies the interrupt controller mode (xics, xive)", + "Specifies the interrupt controller mode (xics, xive, dual)", NULL); } @@ -3791,8 +3849,6 @@ static void spapr_phb_placement(sPAPRMachineState *spapr, uint32_t index, * 1TiB 64-bit MMIO windows for each PHB. */ const uint64_t base_buid = 0x800000020000000ULL; -#define SPAPR_MAX_PHBS ((SPAPR_PCI_LIMIT - SPAPR_PCI_BASE) / \ - SPAPR_PCI_MEM64_WIN_SIZE - 1) int i; /* Sanity check natural alignments */ @@ -3840,7 +3896,7 @@ static ICPState *spapr_icp_get(XICSFabric *xi, int vcpu_id) { PowerPCCPU *cpu = spapr_find_cpu(vcpu_id); - return cpu ? ICP(cpu->intc) : NULL; + return cpu ? cpu->icp : NULL; } static void spapr_pic_print_info(InterruptStatsProvider *obj, @@ -3930,6 +3986,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data) hc->unplug = spapr_machine_device_unplug; smc->dr_lmb_enabled = true; + smc->update_dt_enabled = true; mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power9_v2.0"); mc->has_hotpluggable_cpus = true; smc->resize_hpt_default = SPAPR_RESIZE_HPT_ENABLED; @@ -4022,9 +4079,12 @@ DEFINE_SPAPR_MACHINE(4_0, "4.0", true); */ static void spapr_machine_3_1_class_options(MachineClass *mc) { + sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc); + spapr_machine_4_0_class_options(mc); compat_props_add(mc->compat_props, hw_compat_3_1, hw_compat_3_1_len); mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0"); + smc->update_dt_enabled = false; } DEFINE_SPAPR_MACHINE(3_1, "3.1", false); @@ -4053,16 +4113,8 @@ static void spapr_machine_2_12_class_options(MachineClass *mc) { sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc); static GlobalProperty compat[] = { - { - .driver = TYPE_POWERPC_CPU, - .property = "pre-3.0-migration", - .value = "on", - }, - { - .driver = TYPE_SPAPR_CPU_CORE, - .property = "pre-3.0-migration", - .value = "on", - }, + { TYPE_POWERPC_CPU, "pre-3.0-migration", "on" }, + { TYPE_SPAPR_CPU_CORE, "pre-3.0-migration", "on" }, }; spapr_machine_3_0_class_options(mc); @@ -4126,11 +4178,7 @@ static void spapr_machine_2_9_class_options(MachineClass *mc) { sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc); static GlobalProperty compat[] = { - { - .driver = TYPE_POWERPC_CPU, - .property = "pre-2.10-migration", - .value = "on", - }, + { TYPE_POWERPC_CPU, "pre-2.10-migration", "on" }, }; spapr_machine_2_10_class_options(mc); @@ -4150,11 +4198,7 @@ DEFINE_SPAPR_MACHINE(2_9, "2.9", false); static void spapr_machine_2_8_class_options(MachineClass *mc) { static GlobalProperty compat[] = { - { - .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, - .property = "pcie-extended-configuration-space", - .value = "off", - }, + { TYPE_SPAPR_PCI_HOST_BRIDGE, "pcie-extended-configuration-space", "off" }, }; spapr_machine_2_9_class_options(mc); @@ -4222,26 +4266,10 @@ static void spapr_machine_2_7_class_options(MachineClass *mc) { sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc); static GlobalProperty compat[] = { - { - .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, - .property = "mem_win_size", - .value = stringify(SPAPR_PCI_2_7_MMIO_WIN_SIZE), - }, - { - .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, - .property = "mem64_win_size", - .value = "0", - }, - { - .driver = TYPE_POWERPC_CPU, - .property = "pre-2.8-migration", - .value = "on", - }, - { - .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, - .property = "pre-2.8-migration", - .value = "on", - }, + { TYPE_SPAPR_PCI_HOST_BRIDGE, "mem_win_size", "0xf80000000", }, + { TYPE_SPAPR_PCI_HOST_BRIDGE, "mem64_win_size", "0", }, + { TYPE_POWERPC_CPU, "pre-2.8-migration", "on", }, + { TYPE_SPAPR_PCI_HOST_BRIDGE, "pre-2.8-migration", "on", }, }; spapr_machine_2_8_class_options(mc); @@ -4261,11 +4289,7 @@ DEFINE_SPAPR_MACHINE(2_7, "2.7", false); static void spapr_machine_2_6_class_options(MachineClass *mc) { static GlobalProperty compat[] = { - { - .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, - .property = "ddw", - .value = stringify(off), - }, + { TYPE_SPAPR_PCI_HOST_BRIDGE, "ddw", "off" }, }; spapr_machine_2_7_class_options(mc); @@ -4284,11 +4308,7 @@ static void spapr_machine_2_5_class_options(MachineClass *mc) { sPAPRMachineClass *smc = SPAPR_MACHINE_CLASS(mc); static GlobalProperty compat[] = { - { - .driver = "spapr-vlan", - .property = "use-rx-buffer-pools", - .value = "off", - }, + { "spapr-vlan", "use-rx-buffer-pools", "off" }, }; spapr_machine_2_6_class_options(mc); @@ -4321,11 +4341,7 @@ DEFINE_SPAPR_MACHINE(2_4, "2.4", false); static void spapr_machine_2_3_class_options(MachineClass *mc) { static GlobalProperty compat[] = { - { - .driver = "spapr-pci-host-bridge", - .property = "dynamic-reconfiguration", - .value = "off", - }, + { "spapr-pci-host-bridge", "dynamic-reconfiguration", "off" }, }; spapr_machine_2_4_class_options(mc); compat_props_add(mc->compat_props, hw_compat_2_3, hw_compat_2_3_len); @@ -4340,11 +4356,7 @@ DEFINE_SPAPR_MACHINE(2_3, "2.3", false); static void spapr_machine_2_2_class_options(MachineClass *mc) { static GlobalProperty compat[] = { - { - .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, - .property = "mem_win_size", - .value = "0x20000000", - }, + { TYPE_SPAPR_PCI_HOST_BRIDGE, "mem_win_size", "0x20000000" }, }; spapr_machine_2_3_class_options(mc); diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 82666436e9..0405306d1e 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -194,7 +194,12 @@ static void spapr_unrealize_vcpu(PowerPCCPU *cpu, sPAPRCPUCore *sc) vmstate_unregister(NULL, &vmstate_spapr_cpu_state, cpu->machine_data); } qemu_unregister_reset(spapr_cpu_reset, cpu); - object_unparent(cpu->intc); + if (cpu->icp) { + object_unparent(OBJECT(cpu->icp)); + } + if (cpu->tctx) { + object_unparent(OBJECT(cpu->tctx)); + } cpu_remove_sync(CPU(cpu)); object_unparent(OBJECT(cpu)); } @@ -232,7 +237,7 @@ static void spapr_realize_vcpu(PowerPCCPU *cpu, sPAPRMachineState *spapr, qemu_register_reset(spapr_cpu_reset, cpu); spapr_cpu_reset(cpu); - cpu->intc = spapr->irq->cpu_intc_create(spapr, OBJECT(cpu), &local_err); + spapr->irq->cpu_intc_create(spapr, cpu, &local_err); if (local_err) { goto error_unregister; } diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index ae913d070f..17bcaa3822 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -1654,6 +1654,17 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu, (spapr_h_cas_compose_response(spapr, args[1], args[2], ov5_updates) != 0); } + + /* + * Generate a machine reset when we have an update of the + * interrupt mode. Only required when the machine supports both + * modes. + */ + if (!spapr->cas_reboot) { + spapr->cas_reboot = spapr_ovec_test(ov5_updates, OV5_XIVE_EXPLOIT) + && spapr->irq->ov5 & SPAPR_OV5_XIVE_BOTH; + } + spapr_ovec_cleanup(ov5_updates); if (spapr->cas_reboot) { @@ -1663,6 +1674,42 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu, return H_SUCCESS; } +static target_ulong h_home_node_associativity(PowerPCCPU *cpu, + sPAPRMachineState *spapr, + target_ulong opcode, + target_ulong *args) +{ + target_ulong flags = args[0]; + target_ulong procno = args[1]; + PowerPCCPU *tcpu; + int idx; + + /* only support procno from H_REGISTER_VPA */ + if (flags != 0x1) { + return H_FUNCTION; + } + + tcpu = spapr_find_cpu(procno); + if (tcpu == NULL) { + return H_P2; + } + + /* sequence is the same as in the "ibm,associativity" property */ + + idx = 0; +#define ASSOCIATIVITY(a, b) (((uint64_t)(a) << 32) | \ + ((uint64_t)(b) & 0xffffffff)) + args[idx++] = ASSOCIATIVITY(0, 0); + args[idx++] = ASSOCIATIVITY(0, tcpu->node_id); + args[idx++] = ASSOCIATIVITY(procno, -1); + for ( ; idx < 6; idx++) { + args[idx] = -1; + } +#undef ASSOCIATIVITY + + return H_SUCCESS; +} + static target_ulong h_get_cpu_characteristics(PowerPCCPU *cpu, sPAPRMachineState *spapr, target_ulong opcode, @@ -1717,6 +1764,46 @@ static target_ulong h_get_cpu_characteristics(PowerPCCPU *cpu, args[0] = characteristics; args[1] = behaviour; + return H_SUCCESS; +} + +static target_ulong h_update_dt(PowerPCCPU *cpu, sPAPRMachineState *spapr, + target_ulong opcode, target_ulong *args) +{ + target_ulong dt = ppc64_phys_to_real(args[0]); + struct fdt_header hdr = { 0 }; + unsigned cb; + sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); + void *fdt; + + cpu_physical_memory_read(dt, &hdr, sizeof(hdr)); + cb = fdt32_to_cpu(hdr.totalsize); + + if (!smc->update_dt_enabled) { + return H_SUCCESS; + } + + /* Check that the fdt did not grow out of proportion */ + if (cb > spapr->fdt_initial_size * 2) { + trace_spapr_update_dt_failed_size(spapr->fdt_initial_size, cb, + fdt32_to_cpu(hdr.magic)); + return H_PARAMETER; + } + + fdt = g_malloc0(cb); + cpu_physical_memory_read(dt, fdt, cb); + + /* Check the fdt consistency */ + if (fdt_check_full(fdt, cb)) { + trace_spapr_update_dt_failed_check(spapr->fdt_initial_size, cb, + fdt32_to_cpu(hdr.magic)); + return H_PARAMETER; + } + + g_free(spapr->fdt_blob); + spapr->fdt_size = cb; + spapr->fdt_blob = fdt; + trace_spapr_update_dt(cb); return H_SUCCESS; } @@ -1822,6 +1909,12 @@ static void hypercall_register_types(void) /* ibm,client-architecture-support support */ spapr_register_hypercall(KVMPPC_H_CAS, h_client_architecture_support); + + spapr_register_hypercall(KVMPPC_H_UPDATE_DT, h_update_dt); + + /* Virtual Processor Home Node */ + spapr_register_hypercall(H_HOME_NODE_ASSOCIATIVITY, + h_home_node_associativity); } type_init(hypercall_register_types) diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c index b56466f89a..37e98f9321 100644 --- a/hw/ppc/spapr_iommu.c +++ b/hw/ppc/spapr_iommu.c @@ -42,7 +42,7 @@ enum sPAPRTCEAccess { #define IOMMU_PAGE_SIZE(shift) (1ULL << (shift)) #define IOMMU_PAGE_MASK(shift) (~(IOMMU_PAGE_SIZE(shift) - 1)) -static QLIST_HEAD(spapr_tce_tables, sPAPRTCETable) spapr_tce_tables; +static QLIST_HEAD(, sPAPRTCETable) spapr_tce_tables; sPAPRTCETable *spapr_tce_find_by_liobn(target_ulong liobn) { diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index 7b3b5afec2..5fce72fe0f 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -171,7 +171,7 @@ static qemu_irq spapr_qirq_xics(sPAPRMachineState *spapr, int irq) uint32_t srcno = irq - ics->offset; if (ics_valid_irq(ics, irq)) { - return ics->qirqs[srcno]; + return spapr->qirqs[srcno]; } return NULL; @@ -184,16 +184,26 @@ static void spapr_irq_print_info_xics(sPAPRMachineState *spapr, Monitor *mon) CPU_FOREACH(cs) { PowerPCCPU *cpu = POWERPC_CPU(cs); - icp_pic_print_info(ICP(cpu->intc), mon); + icp_pic_print_info(cpu->icp, mon); } ics_pic_print_info(spapr->ics, mon); } -static Object *spapr_irq_cpu_intc_create_xics(sPAPRMachineState *spapr, - Object *cpu, Error **errp) +static void spapr_irq_cpu_intc_create_xics(sPAPRMachineState *spapr, + PowerPCCPU *cpu, Error **errp) { - return icp_create(cpu, spapr->icp_type, XICS_FABRIC(spapr), errp); + Error *local_err = NULL; + Object *obj; + + obj = icp_create(OBJECT(cpu), spapr->icp_type, XICS_FABRIC(spapr), + &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + cpu->icp = ICP(obj); } static int spapr_irq_post_load_xics(sPAPRMachineState *spapr, int version_id) @@ -202,12 +212,29 @@ static int spapr_irq_post_load_xics(sPAPRMachineState *spapr, int version_id) CPUState *cs; CPU_FOREACH(cs) { PowerPCCPU *cpu = POWERPC_CPU(cs); - icp_resend(ICP(cpu->intc)); + icp_resend(cpu->icp); } } return 0; } +static void spapr_irq_set_irq_xics(void *opaque, int srcno, int val) +{ + sPAPRMachineState *spapr = opaque; + MachineState *machine = MACHINE(opaque); + + if (kvm_enabled() && machine_kernel_irqchip_allowed(machine)) { + ics_kvm_set_irq(spapr->ics, srcno, val); + } else { + ics_simple_set_irq(spapr->ics, srcno, val); + } +} + +static void spapr_irq_reset_xics(sPAPRMachineState *spapr, Error **errp) +{ + /* TODO: create the KVM XICS device */ +} + #define SPAPR_IRQ_XICS_NR_IRQS 0x1000 #define SPAPR_IRQ_XICS_NR_MSIS \ (XICS_IRQ_BASE + SPAPR_IRQ_XICS_NR_IRQS - SPAPR_IRQ_MSI) @@ -225,6 +252,8 @@ sPAPRIrq spapr_irq_xics = { .dt_populate = spapr_dt_xics, .cpu_intc_create = spapr_irq_cpu_intc_create_xics, .post_load = spapr_irq_post_load_xics, + .reset = spapr_irq_reset_xics, + .set_irq = spapr_irq_set_irq_xics, }; /* @@ -284,7 +313,16 @@ static void spapr_irq_free_xive(sPAPRMachineState *spapr, int irq, int num) static qemu_irq spapr_qirq_xive(sPAPRMachineState *spapr, int irq) { - return spapr_xive_qirq(spapr->xive, irq); + sPAPRXive *xive = spapr->xive; + + if (irq >= xive->nr_irqs) { + return NULL; + } + + /* The sPAPR machine/device should have claimed the IRQ before */ + assert(xive_eas_is_valid(&xive->eat[irq])); + + return spapr->qirqs[irq]; } static void spapr_irq_print_info_xive(sPAPRMachineState *spapr, @@ -295,23 +333,31 @@ static void spapr_irq_print_info_xive(sPAPRMachineState *spapr, CPU_FOREACH(cs) { PowerPCCPU *cpu = POWERPC_CPU(cs); - xive_tctx_pic_print_info(XIVE_TCTX(cpu->intc), mon); + xive_tctx_pic_print_info(cpu->tctx, mon); } spapr_xive_pic_print_info(spapr->xive, mon); } -static Object *spapr_irq_cpu_intc_create_xive(sPAPRMachineState *spapr, - Object *cpu, Error **errp) +static void spapr_irq_cpu_intc_create_xive(sPAPRMachineState *spapr, + PowerPCCPU *cpu, Error **errp) { - Object *obj = xive_tctx_create(cpu, XIVE_ROUTER(spapr->xive), errp); + Error *local_err = NULL; + Object *obj; + + obj = xive_tctx_create(OBJECT(cpu), XIVE_ROUTER(spapr->xive), &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + cpu->tctx = XIVE_TCTX(obj); /* * (TCG) Early setting the OS CAM line for hotplugged CPUs as they - * don't benificiate from the reset of the XIVE IRQ backend + * don't beneficiate from the reset of the XIVE IRQ backend */ - spapr_xive_set_tctx_os_cam(XIVE_TCTX(obj)); - return obj; + spapr_xive_set_tctx_os_cam(cpu->tctx); } static int spapr_irq_post_load_xive(sPAPRMachineState *spapr, int version_id) @@ -327,8 +373,18 @@ static void spapr_irq_reset_xive(sPAPRMachineState *spapr, Error **errp) PowerPCCPU *cpu = POWERPC_CPU(cs); /* (TCG) Set the OS CAM line of the thread interrupt context. */ - spapr_xive_set_tctx_os_cam(XIVE_TCTX(cpu->intc)); + spapr_xive_set_tctx_os_cam(cpu->tctx); } + + /* Activate the XIVE MMIOs */ + spapr_xive_mmio_set_enabled(spapr->xive, true); +} + +static void spapr_irq_set_irq_xive(void *opaque, int srcno, int val) +{ + sPAPRMachineState *spapr = opaque; + + xive_source_set_irq(&spapr->xive->source, srcno, val); } /* @@ -353,6 +409,186 @@ sPAPRIrq spapr_irq_xive = { .cpu_intc_create = spapr_irq_cpu_intc_create_xive, .post_load = spapr_irq_post_load_xive, .reset = spapr_irq_reset_xive, + .set_irq = spapr_irq_set_irq_xive, +}; + +/* + * Dual XIVE and XICS IRQ backend. + * + * Both interrupt mode, XIVE and XICS, objects are created but the + * machine starts in legacy interrupt mode (XICS). It can be changed + * by the CAS negotiation process and, in that case, the new mode is + * activated after an extra machine reset. + */ + +/* + * Returns the sPAPR IRQ backend negotiated by CAS. XICS is the + * default. + */ +static sPAPRIrq *spapr_irq_current(sPAPRMachineState *spapr) +{ + return spapr_ovec_test(spapr->ov5_cas, OV5_XIVE_EXPLOIT) ? + &spapr_irq_xive : &spapr_irq_xics; +} + +static void spapr_irq_init_dual(sPAPRMachineState *spapr, Error **errp) +{ + MachineState *machine = MACHINE(spapr); + Error *local_err = NULL; + + if (kvm_enabled() && machine_kernel_irqchip_allowed(machine)) { + error_setg(errp, "No KVM support for the 'dual' machine"); + return; + } + + spapr_irq_xics.init(spapr, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + /* + * Align the XICS and the XIVE IRQ number space under QEMU. + * + * However, the XICS KVM device still considers that the IRQ + * numbers should start at XICS_IRQ_BASE (0x1000). Either we + * should introduce a KVM device ioctl to set the offset or ignore + * the lower 4K numbers when using the get/set ioctl of the XICS + * KVM device. The second option seems the least intrusive. + */ + spapr->ics->offset = 0; + + spapr_irq_xive.init(spapr, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } +} + +static int spapr_irq_claim_dual(sPAPRMachineState *spapr, int irq, bool lsi, + Error **errp) +{ + Error *local_err = NULL; + int ret; + + ret = spapr_irq_xics.claim(spapr, irq, lsi, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return ret; + } + + ret = spapr_irq_xive.claim(spapr, irq, lsi, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return ret; + } + + return ret; +} + +static void spapr_irq_free_dual(sPAPRMachineState *spapr, int irq, int num) +{ + spapr_irq_xics.free(spapr, irq, num); + spapr_irq_xive.free(spapr, irq, num); +} + +static qemu_irq spapr_qirq_dual(sPAPRMachineState *spapr, int irq) +{ + sPAPRXive *xive = spapr->xive; + ICSState *ics = spapr->ics; + + if (irq >= spapr->irq->nr_irqs) { + return NULL; + } + + /* + * The IRQ number should have been claimed under both interrupt + * controllers. + */ + assert(!ICS_IRQ_FREE(ics, irq - ics->offset)); + assert(xive_eas_is_valid(&xive->eat[irq])); + + return spapr->qirqs[irq]; +} + +static void spapr_irq_print_info_dual(sPAPRMachineState *spapr, Monitor *mon) +{ + spapr_irq_current(spapr)->print_info(spapr, mon); +} + +static void spapr_irq_dt_populate_dual(sPAPRMachineState *spapr, + uint32_t nr_servers, void *fdt, + uint32_t phandle) +{ + spapr_irq_current(spapr)->dt_populate(spapr, nr_servers, fdt, phandle); +} + +static void spapr_irq_cpu_intc_create_dual(sPAPRMachineState *spapr, + PowerPCCPU *cpu, Error **errp) +{ + Error *local_err = NULL; + + spapr_irq_xive.cpu_intc_create(spapr, cpu, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + spapr_irq_xics.cpu_intc_create(spapr, cpu, errp); +} + +static int spapr_irq_post_load_dual(sPAPRMachineState *spapr, int version_id) +{ + /* + * Force a reset of the XIVE backend after migration. The machine + * defaults to XICS at startup. + */ + if (spapr_ovec_test(spapr->ov5_cas, OV5_XIVE_EXPLOIT)) { + spapr_irq_xive.reset(spapr, &error_fatal); + } + + return spapr_irq_current(spapr)->post_load(spapr, version_id); +} + +static void spapr_irq_reset_dual(sPAPRMachineState *spapr, Error **errp) +{ + /* + * Deactivate the XIVE MMIOs. The XIVE backend will reenable them + * if selected. + */ + spapr_xive_mmio_set_enabled(spapr->xive, false); + + spapr_irq_current(spapr)->reset(spapr, errp); +} + +static void spapr_irq_set_irq_dual(void *opaque, int srcno, int val) +{ + sPAPRMachineState *spapr = opaque; + + spapr_irq_current(spapr)->set_irq(spapr, srcno, val); +} + +/* + * Define values in sync with the XIVE and XICS backend + */ +#define SPAPR_IRQ_DUAL_NR_IRQS 0x2000 +#define SPAPR_IRQ_DUAL_NR_MSIS (SPAPR_IRQ_DUAL_NR_IRQS - SPAPR_IRQ_MSI) + +sPAPRIrq spapr_irq_dual = { + .nr_irqs = SPAPR_IRQ_DUAL_NR_IRQS, + .nr_msis = SPAPR_IRQ_DUAL_NR_MSIS, + .ov5 = SPAPR_OV5_XIVE_BOTH, + + .init = spapr_irq_init_dual, + .claim = spapr_irq_claim_dual, + .free = spapr_irq_free_dual, + .qirq = spapr_qirq_dual, + .print_info = spapr_irq_print_info_dual, + .dt_populate = spapr_irq_dt_populate_dual, + .cpu_intc_create = spapr_irq_cpu_intc_create_dual, + .post_load = spapr_irq_post_load_dual, + .reset = spapr_irq_reset_dual, + .set_irq = spapr_irq_set_irq_dual }; /* @@ -366,6 +602,9 @@ void spapr_irq_init(sPAPRMachineState *spapr, Error **errp) } spapr->irq->init(spapr, errp); + + spapr->qirqs = qemu_allocate_irqs(spapr->irq->set_irq, spapr, + spapr->irq->nr_irqs); } int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp) @@ -465,4 +704,5 @@ sPAPRIrq spapr_irq_xics_legacy = { .dt_populate = spapr_dt_xics, .cpu_intc_create = spapr_irq_cpu_intc_create_xics, .post_load = spapr_irq_post_load_xics, + .set_irq = spapr_irq_set_irq_xics, }; diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index bfb02ee96b..b74f2632ec 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1988,17 +1988,6 @@ static const TypeInfo spapr_phb_info = { } }; -PCIHostState *spapr_create_phb(sPAPRMachineState *spapr, int index) -{ - DeviceState *dev; - - dev = qdev_create(NULL, TYPE_SPAPR_PCI_HOST_BRIDGE); - qdev_prop_set_uint32(dev, "index", index); - qdev_init_nofail(dev); - - return PCI_HOST_BRIDGE(dev); -} - typedef struct sPAPRFDT { void *fdt; int node_off; diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events index dc5e65aee9..0af155ed32 100644 --- a/hw/ppc/trace-events +++ b/hw/ppc/trace-events @@ -22,6 +22,9 @@ spapr_cas_pvr_try(uint32_t pvr) "0x%x" spapr_cas_pvr(uint32_t cur_pvr, bool explicit_match, uint32_t new_pvr) "current=0x%x, explicit_match=%u, new=0x%x" spapr_h_resize_hpt_prepare(uint64_t flags, uint64_t shift) "flags=0x%"PRIx64", shift=%"PRIu64 spapr_h_resize_hpt_commit(uint64_t flags, uint64_t shift) "flags=0x%"PRIx64", shift=%"PRIu64 +spapr_update_dt(unsigned cb) "New blob %u bytes" +spapr_update_dt_failed_size(unsigned cbold, unsigned cbnew, unsigned magic) "Old blob %u bytes, new blob %u bytes, magic 0x%x" +spapr_update_dt_failed_check(unsigned cbold, unsigned cbnew, unsigned magic) "Old blob %u bytes, new blob %u bytes, magic 0x%x" # hw/ppc/spapr_iommu.c spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64 diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index c737507053..811fdf913d 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -712,11 +712,7 @@ static void ccw_machine_2_11_instance_options(MachineState *machine) static void ccw_machine_2_11_class_options(MachineClass *mc) { static GlobalProperty compat[] = { - { - .driver = TYPE_SCLP_EVENT_FACILITY, - .property = "allow_all_mask_sizes", - .value = "off", - }, + { TYPE_SCLP_EVENT_FACILITY, "allow_all_mask_sizes", "off", }, }; ccw_machine_2_12_class_options(mc); @@ -751,11 +747,7 @@ static void ccw_machine_2_9_class_options(MachineClass *mc) { S390CcwMachineClass *s390mc = S390_MACHINE_CLASS(mc); static GlobalProperty compat[] = { - { - .driver = TYPE_S390_STATTRIB, - .property = "migration-enabled", - .value = "off", - }, + { TYPE_S390_STATTRIB, "migration-enabled", "off", }, }; ccw_machine_2_10_class_options(mc); @@ -773,11 +765,7 @@ static void ccw_machine_2_8_instance_options(MachineState *machine) static void ccw_machine_2_8_class_options(MachineClass *mc) { static GlobalProperty compat[] = { - { - .driver = TYPE_S390_FLIC_COMMON, - .property = "adapter_routes_max_batch", - .value = "64", - }, + { TYPE_S390_FLIC_COMMON, "adapter_routes_max_batch", "64", }, }; ccw_machine_2_9_class_options(mc); @@ -810,15 +798,8 @@ static void ccw_machine_2_6_class_options(MachineClass *mc) { S390CcwMachineClass *s390mc = S390_MACHINE_CLASS(mc); static GlobalProperty compat[] = { - { - .driver = TYPE_S390_IPL, - .property = "iplbext_migration", - .value = "off", - }, { - .driver = TYPE_VIRTUAL_CSS_BRIDGE, - .property = "css_dev_path", - .value = "off", - }, + { TYPE_S390_IPL, "iplbext_migration", "off", }, + { TYPE_VIRTUAL_CSS_BRIDGE, "css_dev_path", "off", }, }; s390mc->ri_allowed = false; @@ -848,43 +829,15 @@ static void ccw_machine_2_4_instance_options(MachineState *machine) static void ccw_machine_2_4_class_options(MachineClass *mc) { static GlobalProperty compat[] = { - { - .driver = TYPE_S390_SKEYS, - .property = "migration-enabled", - .value = "off", - },{ - .driver = "virtio-blk-ccw", - .property = "max_revision", - .value = "0", - },{ - .driver = "virtio-balloon-ccw", - .property = "max_revision", - .value = "0", - },{ - .driver = "virtio-serial-ccw", - .property = "max_revision", - .value = "0", - },{ - .driver = "virtio-9p-ccw", - .property = "max_revision", - .value = "0", - },{ - .driver = "virtio-rng-ccw", - .property = "max_revision", - .value = "0", - },{ - .driver = "virtio-net-ccw", - .property = "max_revision", - .value = "0", - },{ - .driver = "virtio-scsi-ccw", - .property = "max_revision", - .value = "0", - },{ - .driver = "vhost-scsi-ccw", - .property = "max_revision", - .value = "0", - }, + { TYPE_S390_SKEYS, "migration-enabled", "off", }, + { "virtio-blk-ccw", "max_revision", "0", }, + { "virtio-balloon-ccw", "max_revision", "0", }, + { "virtio-serial-ccw", "max_revision", "0", }, + { "virtio-9p-ccw", "max_revision", "0", }, + { "virtio-rng-ccw", "max_revision", "0", }, + { "virtio-net-ccw", "max_revision", "0", }, + { "virtio-scsi-ccw", "max_revision", "0", }, + { "vhost-scsi-ccw", "max_revision", "0", }, }; ccw_machine_2_5_class_options(mc); diff --git a/hw/scsi/esp-pci.c b/hw/scsi/esp-pci.c index 419fc668ac..6b0bbb9b7f 100644 --- a/hw/scsi/esp-pci.c +++ b/hw/scsi/esp-pci.c @@ -59,7 +59,7 @@ #define DMA_STAT_SCSIINT 0x10 #define DMA_STAT_BCMBLT 0x20 -#define SBAC_STATUS 0x1000 +#define SBAC_STATUS (1 << 24) typedef struct PCIESPState { /*< private >*/ @@ -136,7 +136,7 @@ static void esp_pci_dma_write(PCIESPState *pci, uint32_t saddr, uint32_t val) pci->dma_regs[saddr] = val; break; case DMA_STAT: - if (!(pci->sbac & SBAC_STATUS)) { + if (pci->sbac & SBAC_STATUS) { /* clear some bits on write */ uint32_t mask = DMA_STAT_ERROR | DMA_STAT_ABORT | DMA_STAT_DONE; pci->dma_regs[DMA_STAT] &= ~(val & mask); @@ -157,7 +157,7 @@ static uint32_t esp_pci_dma_read(PCIESPState *pci, uint32_t saddr) if (pci->esp.rregs[ESP_RSTAT] & STAT_INT) { val |= DMA_STAT_SCSIINT; } - if (pci->sbac & SBAC_STATUS) { + if (!(pci->sbac & SBAC_STATUS)) { pci->dma_regs[DMA_STAT] &= ~(DMA_STAT_ERROR | DMA_STAT_ABORT | DMA_STAT_DONE); } @@ -313,8 +313,8 @@ static void esp_pci_hard_reset(DeviceState *dev) static const VMStateDescription vmstate_esp_pci_scsi = { .name = "pciespscsi", - .version_id = 0, - .minimum_version_id = 0, + .version_id = 1, + .minimum_version_id = 1, .fields = (VMStateField[]) { VMSTATE_PCI_DEVICE(parent_obj, PCIESPState), VMSTATE_BUFFER_UNSAFE(dma_regs, PCIESPState, 0, 8 * sizeof(uint32_t)), diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c index 630d923623..ca8b36c0c5 100644 --- a/hw/scsi/esp.c +++ b/hw/scsi/esp.c @@ -286,11 +286,8 @@ static void esp_do_dma(ESPState *s) esp_dma_done(s); } -void esp_command_complete(SCSIRequest *req, uint32_t status, - size_t resid) +static void esp_report_command_complete(ESPState *s, uint32_t status) { - ESPState *s = req->hba_private; - trace_esp_command_complete(); if (s->ti_size != 0) { trace_esp_command_complete_unexpected(); @@ -311,6 +308,23 @@ void esp_command_complete(SCSIRequest *req, uint32_t status, } } +void esp_command_complete(SCSIRequest *req, uint32_t status, + size_t resid) +{ + ESPState *s = req->hba_private; + + if (s->rregs[ESP_RSTAT] & STAT_INT) { + /* Defer handling command complete until the previous + * interrupt has been handled. + */ + trace_esp_command_complete_deferred(); + s->deferred_status = status; + s->deferred_complete = true; + return; + } + esp_report_command_complete(s, status); +} + void esp_transfer_data(SCSIRequest *req, uint32_t len) { ESPState *s = req->hba_private; @@ -422,7 +436,10 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr) s->rregs[ESP_RSTAT] &= ~STAT_TC; s->rregs[ESP_RSEQ] = SEQ_CD; esp_lower_irq(s); - + if (s->deferred_complete) { + esp_report_command_complete(s, s->deferred_status); + s->deferred_complete = false; + } return old_val; case ESP_TCHI: /* Return the unique id if the value has never been written */ @@ -582,6 +599,8 @@ const VMStateDescription vmstate_esp = { VMSTATE_UINT32(ti_wptr, ESPState), VMSTATE_BUFFER(ti_buf, ESPState), VMSTATE_UINT32(status, ESPState), + VMSTATE_UINT32(deferred_status, ESPState), + VMSTATE_BOOL(deferred_complete, ESPState), VMSTATE_UINT32(dma, ESPState), VMSTATE_PARTIAL_BUFFER(cmdbuf, ESPState, 16), VMSTATE_BUFFER_START_MIDDLE_V(cmdbuf, ESPState, 16, 4), @@ -671,8 +690,8 @@ static void sysbus_esp_hard_reset(DeviceState *dev) static const VMStateDescription vmstate_sysbus_esp_scsi = { .name = "sysbusespscsi", - .version_id = 0, - .minimum_version_id = 0, + .version_id = 1, + .minimum_version_id = 1, .fields = (VMStateField[]) { VMSTATE_STRUCT(esp, SysBusESPState, 0, vmstate_esp, ESPState), VMSTATE_END_OF_LIST() diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c index 52a38933b6..89def1421f 100644 --- a/hw/scsi/lsi53c895a.c +++ b/hw/scsi/lsi53c895a.c @@ -1850,7 +1850,7 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val) break; case 0x0a: case 0x0b: /* Openserver writes to these readonly registers on startup */ - return; + return; case 0x0c: case 0x0d: case 0x0e: case 0x0f: /* Linux writes to these readonly registers on startup. */ return; @@ -1884,8 +1884,8 @@ static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val) /* nothing to do */ break; case 0x1a: /* CTEST2 */ - s->ctest2 = val & LSI_CTEST2_PCICIE; - break; + s->ctest2 = val & LSI_CTEST2_PCICIE; + break; case 0x1b: /* CTEST3 */ s->ctest3 = val & 0x0f; break; diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c index 97cd167114..c480553083 100644 --- a/hw/scsi/scsi-bus.c +++ b/hw/scsi/scsi-bus.c @@ -1554,7 +1554,7 @@ SCSIDevice *scsi_device_find(SCSIBus *bus, int channel, int id, int lun) BusChild *kid; SCSIDevice *target_dev = NULL; - QTAILQ_FOREACH_REVERSE(kid, &bus->qbus.children, ChildrenHead, sibling) { + QTAILQ_FOREACH_REVERSE(kid, &bus->qbus.children, sibling) { DeviceState *qdev = kid->child; SCSIDevice *dev = SCSI_DEVICE(qdev); diff --git a/hw/scsi/trace-events b/hw/scsi/trace-events index 0fb6a99616..2fe8a7c062 100644 --- a/hw/scsi/trace-events +++ b/hw/scsi/trace-events @@ -167,6 +167,7 @@ esp_handle_satn_stop(uint32_t cmdlen) "cmdlen %d" esp_write_response(uint32_t status) "Transfer status (status=%d)" esp_do_dma(uint32_t cmdlen, uint32_t len) "command len %d + %d" esp_command_complete(void) "SCSI Command complete" +esp_command_complete_deferred(void) "SCSI Command complete deferred" esp_command_complete_unexpected(void) "SCSI command completed unexpectedly" esp_command_complete_fail(void) "Command failed" esp_transfer_data(uint32_t dma_left, int32_t ti_size) "transfer %d/%d" diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index 6a5fc46a47..5b399e7161 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -139,11 +139,11 @@ static uint64_t r2d_fpga_read(void *opaque, hwaddr addr, unsigned int size) case PA_IRLMSK: return s->irlmsk; case PA_OUTPORT: - return s->outport; + return s->outport; case PA_POWOFF: - return 0x00; + return 0x00; case PA_VERREG: - return 0x10; + return 0x10; } return 0; @@ -158,18 +158,18 @@ r2d_fpga_write(void *opaque, hwaddr addr, uint64_t value, unsigned int size) case PA_IRLMSK: s->irlmsk = value; update_irl(s); - break; + break; case PA_OUTPORT: - s->outport = value; - break; + s->outport = value; + break; case PA_POWOFF: if (value & 1) { qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); } break; case PA_VERREG: - /* Discard writes */ - break; + /* Discard writes */ + break; } } diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 639906cca3..709ee37e08 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -37,7 +37,6 @@ #include "net/net.h" #include "hw/boards.h" #include "hw/scsi/esp.h" -#include "hw/isa/isa.h" #include "hw/nvram/sun_nvram.h" #include "hw/nvram/chrp_nvram.h" #include "hw/nvram/fw_cfg.h" diff --git a/hw/timer/i8254.c b/hw/timer/i8254.c index 1057850808..20f834e7da 100644 --- a/hw/timer/i8254.c +++ b/hw/timer/i8254.c @@ -23,7 +23,6 @@ */ #include "qemu/osdep.h" #include "hw/hw.h" -#include "hw/isa/isa.h" #include "qemu/timer.h" #include "hw/timer/i8254.h" #include "hw/timer/i8254_internal.h" diff --git a/hw/usb/ccid-card-emulated.c b/hw/usb/ccid-card-emulated.c index e0457d305b..963373ba95 100644 --- a/hw/usb/ccid-card-emulated.c +++ b/hw/usb/ccid-card-emulated.c @@ -119,11 +119,11 @@ struct EmulatedState { char *db; uint8_t atr[MAX_ATR_SIZE]; uint8_t atr_length; - QSIMPLEQ_HEAD(event_list, EmulEvent) event_list; + QSIMPLEQ_HEAD(, EmulEvent) event_list; QemuMutex event_list_mutex; QemuThread event_thread_id; VReader *reader; - QSIMPLEQ_HEAD(guest_apdu_list, EmulEvent) guest_apdu_list; + QSIMPLEQ_HEAD(, EmulEvent) guest_apdu_list; QemuMutex vreader_mutex; /* and guest_apdu_list mutex */ QemuMutex handle_apdu_mutex; QemuCond handle_apdu_cond; diff --git a/hw/usb/combined-packet.c b/hw/usb/combined-packet.c index 01a7ed0848..fc98383d30 100644 --- a/hw/usb/combined-packet.c +++ b/hw/usb/combined-packet.c @@ -64,7 +64,7 @@ void usb_combined_input_packet_complete(USBDevice *dev, USBPacket *p) status = combined->first->status; actual_length = combined->first->actual_length; - short_not_ok = QTAILQ_LAST(&combined->packets, packets_head)->short_not_ok; + short_not_ok = QTAILQ_LAST(&combined->packets)->short_not_ok; QTAILQ_FOREACH_SAFE(p, &combined->packets, combined_entry, next) { if (!done) { diff --git a/hw/usb/dev-audio.c b/hw/usb/dev-audio.c index ee43e4914d..28ac7c5165 100644 --- a/hw/usb/dev-audio.c +++ b/hw/usb/dev-audio.c @@ -321,6 +321,9 @@ static int streambuf_put(struct streambuf *buf, USBPacket *p) if (!free) { return 0; } + if (p->iov.size != USBAUDIO_PACKET_SIZE) { + return 0; + } assert(free >= USBAUDIO_PACKET_SIZE); usb_packet_copy(p, buf->data + (buf->prod % buf->size), USBAUDIO_PACKET_SIZE); diff --git a/hw/usb/dev-bluetooth.c b/hw/usb/dev-bluetooth.c index eac7365b0a..c539a1afc6 100644 --- a/hw/usb/dev-bluetooth.c +++ b/hw/usb/dev-bluetooth.c @@ -46,7 +46,7 @@ struct USBBtState { struct usb_hci_out_fifo_s { uint8_t data[4096]; - int len; + int len; } outcmd, outacl, outsco; }; diff --git a/hw/usb/dev-hid.c b/hw/usb/dev-hid.c index 62d18290dc..90cd745f06 100644 --- a/hw/usb/dev-hid.c +++ b/hw/usb/dev-hid.c @@ -592,12 +592,12 @@ static void usb_hid_handle_control(USBDevice *dev, USBPacket *p, switch (value >> 8) { case 0x22: if (hs->kind == HID_MOUSE) { - memcpy(data, qemu_mouse_hid_report_descriptor, - sizeof(qemu_mouse_hid_report_descriptor)); + memcpy(data, qemu_mouse_hid_report_descriptor, + sizeof(qemu_mouse_hid_report_descriptor)); p->actual_length = sizeof(qemu_mouse_hid_report_descriptor); } else if (hs->kind == HID_TABLET) { memcpy(data, qemu_tablet_hid_report_descriptor, - sizeof(qemu_tablet_hid_report_descriptor)); + sizeof(qemu_tablet_hid_report_descriptor)); p->actual_length = sizeof(qemu_tablet_hid_report_descriptor); } else if (hs->kind == HID_KEYBOARD) { memcpy(data, qemu_keyboard_hid_report_descriptor, diff --git a/hw/usb/dev-hub.c b/hw/usb/dev-hub.c index dc368179d1..7e9339b8a8 100644 --- a/hw/usb/dev-hub.c +++ b/hw/usb/dev-hub.c @@ -147,13 +147,13 @@ static const USBDesc desc_hub = { static const uint8_t qemu_hub_hub_descriptor[] = { - 0x00, /* u8 bLength; patched in later */ - 0x29, /* u8 bDescriptorType; Hub-descriptor */ - 0x00, /* u8 bNbrPorts; (patched later) */ - 0x0a, /* u16 wHubCharacteristics; */ - 0x00, /* (per-port OC, no power switching) */ - 0x01, /* u8 bPwrOn2pwrGood; 2ms */ - 0x00 /* u8 bHubContrCurrent; 0 mA */ + 0x00, /* u8 bLength; patched in later */ + 0x29, /* u8 bDescriptorType; Hub-descriptor */ + 0x00, /* u8 bNbrPorts; (patched later) */ + 0x0a, /* u16 wHubCharacteristics; */ + 0x00, /* (per-port OC, no power switching) */ + 0x01, /* u8 bPwrOn2pwrGood; 2ms */ + 0x00 /* u8 bHubContrCurrent; 0 mA */ /* DeviceRemovable and PortPwrCtrlMask patched in later */ }; diff --git a/hw/usb/dev-mtp.c b/hw/usb/dev-mtp.c index b19b576278..68c5eb8eaa 100644 --- a/hw/usb/dev-mtp.c +++ b/hw/usb/dev-mtp.c @@ -191,7 +191,7 @@ struct MTPState { #ifdef CONFIG_INOTIFY1 /* inotify descriptor */ int inotifyfd; - QTAILQ_HEAD(events, MTPMonEntry) events; + QTAILQ_HEAD(, MTPMonEntry) events; #endif /* Responder is expecting a write operation */ bool write_pending; @@ -1989,7 +1989,7 @@ static void usb_mtp_handle_data(USBDevice *dev, USBPacket *p) case EP_EVENT: #ifdef CONFIG_INOTIFY1 if (!QTAILQ_EMPTY(&s->events)) { - struct MTPMonEntry *e = QTAILQ_LAST(&s->events, events); + struct MTPMonEntry *e = QTAILQ_LAST(&s->events); uint32_t handle; int len = sizeof(container) + sizeof(uint32_t); diff --git a/hw/usb/dev-network.c b/hw/usb/dev-network.c index 385e090336..ffab3fabee 100644 --- a/hw/usb/dev-network.c +++ b/hw/usb/dev-network.c @@ -648,7 +648,7 @@ typedef struct USBNetState { char usbstring_mac[13]; NICState *nic; NICConf conf; - QTAILQ_HEAD(rndis_resp_head, rndis_response) rndis_resp; + QTAILQ_HEAD(, rndis_response) rndis_resp; } USBNetState; #define TYPE_USB_NET "usb-net" diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index 8d44d483df..e233681962 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -1823,7 +1823,7 @@ static int ehci_state_fetchqtd(EHCIQueue *q) break; case EHCI_ASYNC_INFLIGHT: /* Check if the guest has added new tds to the queue */ - again = ehci_fill_queue(QTAILQ_LAST(&q->packets, pkts_head)); + again = ehci_fill_queue(QTAILQ_LAST(&q->packets)); /* Unfinished async handled packet, go horizontal */ ehci_set_state(q->ehci, q->async, EST_HORIZONTALQH); break; diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h index cd30b5d5e0..d6601706ee 100644 --- a/hw/usb/hcd-ehci.h +++ b/hw/usb/hcd-ehci.h @@ -247,7 +247,7 @@ struct EHCIQueue { uint32_t qtdaddr; /* address QTD read from */ int last_pid; /* pid of last packet executed */ USBDevice *dev; - QTAILQ_HEAD(pkts_head, EHCIPacket) packets; + QTAILQ_HEAD(, EHCIPacket) packets; }; typedef QTAILQ_HEAD(EHCIQueueHead, EHCIQueue) EHCIQueueHead; diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c index 836b11f177..e694b62086 100644 --- a/hw/usb/hcd-uhci.c +++ b/hw/usb/hcd-uhci.c @@ -99,7 +99,7 @@ struct UHCIQueue { UHCIState *uhci; USBEndpoint *ep; QTAILQ_ENTRY(UHCIQueue) next; - QTAILQ_HEAD(asyncs_head, UHCIAsync) asyncs; + QTAILQ_HEAD(, UHCIAsync) asyncs; int8_t valid; }; @@ -837,7 +837,7 @@ static int uhci_handle_td(UHCIState *s, UHCIQueue *q, uint32_t qh_addr, } if (!async->done) { UHCI_TD last_td; - UHCIAsync *last = QTAILQ_LAST(&async->queue->asyncs, asyncs_head); + UHCIAsync *last = QTAILQ_LAST(&async->queue->asyncs); /* * While we are waiting for the current td to complete, the guest * may have added more tds to the queue. Note we re-read the td @@ -1056,8 +1056,8 @@ static void uhci_process_frame(UHCIState *s) link = qh.link; } else { /* QH with elements */ - curr_qh = link; - link = qh.el_link; + curr_qh = link; + link = qh.el_link; } continue; } diff --git a/hw/usb/xen-usb.c b/hw/usb/xen-usb.c index f5d5c91094..5758a105a2 100644 --- a/hw/usb/xen-usb.c +++ b/hw/usb/xen-usb.c @@ -72,7 +72,7 @@ struct usbback_stub { USBPort port; unsigned int speed; bool attached; - QTAILQ_HEAD(submit_q_head, usbback_req) submit_q; + QTAILQ_HEAD(, usbback_req) submit_q; }; struct usbback_req { @@ -108,8 +108,8 @@ struct usbback_info { int num_ports; int usb_ver; bool ring_error; - QTAILQ_HEAD(req_free_q_head, usbback_req) req_free_q; - QSIMPLEQ_HEAD(hotplug_q_head, usbback_hotplug) hotplug_q; + QTAILQ_HEAD(, usbback_req) req_free_q; + QSIMPLEQ_HEAD(, usbback_hotplug) hotplug_q; struct usbback_stub ports[USBBACK_MAXPORTS]; struct usbback_stub *addr_table[USB_DEV_ADDR_SIZE]; QEMUBH *bh; diff --git a/hw/vfio/common.c b/hw/vfio/common.c index 7c185e5a2e..4262b80c44 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -37,9 +37,9 @@ #include "trace.h" #include "qapi/error.h" -struct vfio_group_head vfio_group_list = +VFIOGroupList vfio_group_list = QLIST_HEAD_INITIALIZER(vfio_group_list); -struct vfio_as_head vfio_address_spaces = +static QLIST_HEAD(, VFIOAddressSpace) vfio_address_spaces = QLIST_HEAD_INITIALIZER(vfio_address_spaces); #ifdef CONFIG_KVM diff --git a/hw/watchdog/watchdog.c b/hw/watchdog/watchdog.c index 33e6c20184..dce7c1db14 100644 --- a/hw/watchdog/watchdog.c +++ b/hw/watchdog/watchdog.c @@ -32,7 +32,7 @@ #include "qemu/help_option.h" static WatchdogAction watchdog_action = WATCHDOG_ACTION_RESET; -static QLIST_HEAD(watchdog_list, WatchdogTimerModel) watchdog_list; +static QLIST_HEAD(, WatchdogTimerModel) watchdog_list; void watchdog_add_model(WatchdogTimerModel *model) { diff --git a/hw/watchdog/wdt_i6300esb.c b/hw/watchdog/wdt_i6300esb.c index 7b59469888..1c6eddf86a 100644 --- a/hw/watchdog/wdt_i6300esb.c +++ b/hw/watchdog/wdt_i6300esb.c @@ -449,7 +449,6 @@ static void i6300esb_realize(PCIDevice *dev, Error **errp) memory_region_init_io(&d->io_mem, OBJECT(d), &i6300esb_ops, d, "i6300esb", 0x10); pci_register_bar(&d->dev, 0, 0, &d->io_mem); - /* qemu_register_coalesced_mmio (addr, 0x10); ? */ } static void i6300esb_exit(PCIDevice *dev) diff --git a/hw/xen/xen-common.c b/hw/xen/xen-common.c index d51148b6b3..18a9045556 100644 --- a/hw/xen/xen-common.c +++ b/hw/xen/xen-common.c @@ -163,21 +163,9 @@ static void xen_accel_class_init(ObjectClass *oc, void *data) { AccelClass *ac = ACCEL_CLASS(oc); static GlobalProperty compat[] = { - { - .driver = "migration", - .property = "store-global-state", - .value = "off", - }, - { - .driver = "migration", - .property = "send-configuration", - .value = "off", - }, - { - .driver = "migration", - .property = "send-section-footer", - .value = "off", - } + { "migration", "store-global-state", "off" }, + { "migration", "send-configuration", "off" }, + { "migration", "send-section-footer", "off" }, }; ac->name = "Xen"; diff --git a/hw/xen/xen_devconfig.c b/hw/xen/xen_devconfig.c index aebc19bd71..3500d88a3e 100644 --- a/hw/xen/xen_devconfig.c +++ b/hw/xen/xen_devconfig.c @@ -6,7 +6,7 @@ /* ------------------------------------------------------------- */ static int xen_config_dev_dirs(const char *ftype, const char *btype, int vdev, - char *fe, char *be, int len) + char *fe, char *be, int len) { char *dom; diff --git a/hw/xen/xen_pvdev.c b/hw/xen/xen_pvdev.c index aed783e844..f026556f62 100644 --- a/hw/xen/xen_pvdev.c +++ b/hw/xen/xen_pvdev.c @@ -31,10 +31,10 @@ struct xs_dirs { QTAILQ_ENTRY(xs_dirs) list; }; -static QTAILQ_HEAD(xs_dirs_head, xs_dirs) xs_cleanup = +static QTAILQ_HEAD(, xs_dirs) xs_cleanup = QTAILQ_HEAD_INITIALIZER(xs_cleanup); -static QTAILQ_HEAD(XenDeviceHead, XenDevice) xendevs = +static QTAILQ_HEAD(, XenDevice) xendevs = QTAILQ_HEAD_INITIALIZER(xendevs); /* ------------------------------------------------------------- */ diff --git a/hw/xenpv/xen_domainbuild.c b/hw/xenpv/xen_domainbuild.c index 188acaca16..2859280a6a 100644 --- a/hw/xenpv/xen_domainbuild.c +++ b/hw/xenpv/xen_domainbuild.c @@ -27,11 +27,11 @@ static int xenstore_domain_mkdir(char *path) if (!xs_mkdir(xenstore, 0, path)) { fprintf(stderr, "%s: xs_mkdir %s: failed\n", __func__, path); - return -1; + return -1; } if (!xs_set_permissions(xenstore, 0, path, perms_ro, 2)) { fprintf(stderr, "%s: xs_set_permissions failed\n", __func__); - return -1; + return -1; } for (i = 0; writable[i]; i++) { @@ -82,8 +82,8 @@ int xenstore_domain_init1(const char *kernel, const char *ramdisk, /* cpus */ for (i = 0; i < smp_cpus; i++) { - snprintf(path, sizeof(path), "cpu/%d/availability",i); - xenstore_write_str(dom, path, "online"); + snprintf(path, sizeof(path), "cpu/%d/availability",i); + xenstore_write_str(dom, path, "online"); } xenstore_write_int(vm, "vcpu_avail", smp_cpus); xenstore_write_int(vm, "vcpus", smp_cpus); diff --git a/include/elf.h b/include/elf.h index 0ac7911b7b..e816fb4d76 100644 --- a/include/elf.h +++ b/include/elf.h @@ -782,11 +782,11 @@ typedef struct { /* ARM-specific values for sh_flags */ #define SHF_ARM_ENTRYSECT 0x10000000 /* Section contains an entry point */ #define SHF_ARM_COMDEF 0x80000000 /* Section may be multiply defined - in the input to a link step */ + in the input to a link step */ /* ARM-specific program header flags */ #define PF_ARM_SB 0x10000000 /* Segment contains the location - addressed by the static base */ + addressed by the static base */ /* ARM relocs. */ #define R_ARM_NONE 0 /* No reloc */ @@ -1047,7 +1047,7 @@ typedef struct { #define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */ #define R_X86_64_RELATIVE 8 /* Adjust by program base */ #define R_X86_64_GOTPCREL 9 /* 32 bit signed pc relative - offset to GOT */ + offset to GOT */ #define R_X86_64_32 10 /* Direct 32 bit zero extended */ #define R_X86_64_32S 11 /* Direct 32 bit sign extended */ #define R_X86_64_16 12 /* Direct 16 bit zero extended */ @@ -1070,7 +1070,7 @@ typedef struct { #define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */ #define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */ #define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch - prediction. */ + prediction. */ #define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */ #define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */ @@ -1083,7 +1083,7 @@ typedef struct { /* Additional section indeces. */ #define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared - symbols in ANSI C. */ + symbols in ANSI C. */ #define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */ /* Legal values for sh_type field of Elf32_Shdr. */ diff --git a/include/exec/memory.h b/include/exec/memory.h index ffd23ed8d8..cd2f209b64 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -379,9 +379,9 @@ struct MemoryRegion { MemoryRegion *alias; hwaddr alias_offset; int32_t priority; - QTAILQ_HEAD(subregions, MemoryRegion) subregions; + QTAILQ_HEAD(, MemoryRegion) subregions; QTAILQ_ENTRY(MemoryRegion) subregions_link; - QTAILQ_HEAD(coalesced_ranges, CoalescedMemoryRange) coalesced; + QTAILQ_HEAD(, CoalescedMemoryRange) coalesced; const char *name; unsigned ioeventfd_nb; MemoryRegionIoeventfd *ioeventfds; @@ -445,7 +445,7 @@ struct AddressSpace { int ioeventfd_nb; struct MemoryRegionIoeventfd *ioeventfds; - QTAILQ_HEAD(memory_listeners_as, MemoryListener) listeners; + QTAILQ_HEAD(, MemoryListener) listeners; QTAILQ_ENTRY(AddressSpace) address_spaces_link; }; diff --git a/include/hw/acpi/acpi.h b/include/hw/acpi/acpi.h index c20ace0d0b..bbf541263a 100644 --- a/include/hw/acpi/acpi.h +++ b/include/hw/acpi/acpi.h @@ -69,13 +69,13 @@ #define ACPI_BITMASK_WAKE_STATUS 0x8000 #define ACPI_BITMASK_ALL_FIXED_STATUS (\ - ACPI_BITMASK_TIMER_STATUS | \ - ACPI_BITMASK_BUS_MASTER_STATUS | \ - ACPI_BITMASK_GLOBAL_LOCK_STATUS | \ - ACPI_BITMASK_POWER_BUTTON_STATUS | \ - ACPI_BITMASK_SLEEP_BUTTON_STATUS | \ - ACPI_BITMASK_RT_CLOCK_STATUS | \ - ACPI_BITMASK_WAKE_STATUS) + ACPI_BITMASK_TIMER_STATUS | \ + ACPI_BITMASK_BUS_MASTER_STATUS | \ + ACPI_BITMASK_GLOBAL_LOCK_STATUS | \ + ACPI_BITMASK_POWER_BUTTON_STATUS | \ + ACPI_BITMASK_SLEEP_BUTTON_STATUS | \ + ACPI_BITMASK_RT_CLOCK_STATUS | \ + ACPI_BITMASK_WAKE_STATUS) /* PM1x_EN */ #define ACPI_BITMASK_TIMER_ENABLE 0x0001 diff --git a/include/hw/elf_ops.h b/include/hw/elf_ops.h index 74679ff8da..e2cb675195 100644 --- a/include/hw/elf_ops.h +++ b/include/hw/elf_ops.h @@ -343,7 +343,7 @@ static int glue(load_elf, SZ)(const char *name, int fd, } if (pentry) - *pentry = (uint64_t)(elf_sword)ehdr.e_entry; + *pentry = (uint64_t)(elf_sword)ehdr.e_entry; glue(load_symbols, SZ)(&ehdr, fd, must_swab, clear_lsb, sym_cb); diff --git a/include/hw/i386/ioapic.h b/include/hw/i386/ioapic.h index 9c8816f11f..59fcb158a7 100644 --- a/include/hw/i386/ioapic.h +++ b/include/hw/i386/ioapic.h @@ -23,6 +23,9 @@ #define IOAPIC_NUM_PINS 24 #define IO_APIC_DEFAULT_ADDRESS 0xfec00000 +#define TYPE_KVM_IOAPIC "kvm-ioapic" +#define TYPE_IOAPIC "ioapic" + void ioapic_eoi_broadcast(int vector); #endif /* HW_IOAPIC_H */ diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 84720bede9..0abbe45637 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -354,21 +354,9 @@ extern const size_t pc_compat_1_4_len; * depending on QEMU versions up to QEMU 2.4. */ #define PC_CPU_MODEL_IDS(v) \ - {\ - .driver = "qemu32-" TYPE_X86_CPU,\ - .property = "model-id",\ - .value = "QEMU Virtual CPU version " v,\ - },\ - {\ - .driver = "qemu64-" TYPE_X86_CPU,\ - .property = "model-id",\ - .value = "QEMU Virtual CPU version " v,\ - },\ - {\ - .driver = "athlon-" TYPE_X86_CPU,\ - .property = "model-id",\ - .value = "QEMU Virtual CPU version " v,\ - }, + { "qemu32-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\ + { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\ + { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, }, #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index 594081e57f..880413ddc7 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -342,7 +342,7 @@ enum ide_dma_cmd { extern const char *IDE_DMA_CMD_lookup[IDE_DMA__COUNT]; #define ide_cmd_is_read(s) \ - ((s)->dma_cmd == IDE_DMA_READ) + ((s)->dma_cmd == IDE_DMA_READ) typedef struct IDEBufferedRequest { QLIST_ENTRY(IDEBufferedRequest) list; diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index 7c66c3872f..a5a7bf4837 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -94,12 +94,13 @@ struct sPAPRPHBState { ((1ULL << 32) - SPAPR_PCI_MEM_WIN_BUS_OFFSET) #define SPAPR_PCI_MEM64_WIN_SIZE 0x10000000000ULL /* 1 TiB */ -/* Without manual configuration, all PCI outbound windows will be - * within this range */ +/* All PCI outbound windows will be within this range */ #define SPAPR_PCI_BASE (1ULL << 45) /* 32 TiB */ #define SPAPR_PCI_LIMIT (1ULL << 46) /* 64 TiB */ -#define SPAPR_PCI_2_7_MMIO_WIN_SIZE 0xf80000000 +#define SPAPR_MAX_PHBS ((SPAPR_PCI_LIMIT - SPAPR_PCI_BASE) / \ + SPAPR_PCI_MEM64_WIN_SIZE - 1) + #define SPAPR_PCI_IO_WIN_SIZE 0x10000 #define SPAPR_PCI_MSI_WINDOW 0x40000000000ULL @@ -111,8 +112,6 @@ static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin) return spapr_qirq(spapr, phb->lsi_table[pin].irq); } -PCIHostState *spapr_create_phb(sPAPRMachineState *spapr, int index); - int spapr_populate_pci_dt(sPAPRPHBState *phb, uint32_t xics_phandle, void *fdt, uint32_t nr_msis); diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index eb12fa112e..d87f5f93e9 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -405,8 +405,10 @@ PCIBus *pci_root_bus_new(DeviceState *parent, const char *name, MemoryRegion *address_space_mem, MemoryRegion *address_space_io, uint8_t devfn_min, const char *typename); +void pci_root_bus_cleanup(PCIBus *bus); void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, void *irq_opaque, int nirq); +void pci_bus_irqs_cleanup(PCIBus *bus); int pci_bus_get_irq_level(PCIBus *bus, int irq_num); /* 0 <= pin <= 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD */ int pci_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin); @@ -417,6 +419,7 @@ PCIBus *pci_register_root_bus(DeviceState *parent, const char *name, MemoryRegion *address_space_io, uint8_t devfn_min, int nirq, const char *typename); +void pci_unregister_root_bus(PCIBus *bus); void pci_bus_set_route_irq_fn(PCIBus *, pci_route_irq_fn); PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, int pin); bool pci_intx_route_changed(PCIINTxRoute *old, PCIINTxRoute *new); diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index 86d5f54e54..6b65397b7e 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -98,7 +98,7 @@ typedef struct PnvChipClass { DeviceRealize parent_realize; uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id); - Object *(*intc_create)(PnvChip *chip, Object *child, Error **errp); + void (*intc_create)(PnvChip *chip, PowerPCCPU *cpu, Error **errp); ISABus *(*isa_create)(PnvChip *chip, Error **errp); } PnvChipClass; diff --git a/include/hw/ppc/pnv_psi.h b/include/hw/ppc/pnv_psi.h index f6af5eae1f..64ac73512e 100644 --- a/include/hw/ppc/pnv_psi.h +++ b/include/hw/ppc/pnv_psi.h @@ -40,6 +40,7 @@ typedef struct PnvPsi { /* Interrupt generation */ ICSState ics; + qemu_irq *qirqs; /* Registers */ uint64_t regs[PSIHB_XSCOM_MAX]; diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 2c77a8ba88..9e01a5a12e 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -103,6 +103,7 @@ struct sPAPRMachineClass { /*< public >*/ bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMBs */ + bool update_dt_enabled; /* enable KVMPPC_H_UPDATE_DT */ bool use_ohci_by_default; /* use USB-OHCI instead of XHCI */ bool pre_2_10_has_unused_icps; bool legacy_irq_allocation; @@ -139,6 +140,9 @@ struct sPAPRMachineState { int vrma_adjust; ssize_t rtas_size; void *rtas_blob; + uint32_t fdt_size; + uint32_t fdt_initial_size; + void *fdt_blob; long kernel_size; bool kernel_le; uint32_t initrd_base; @@ -178,6 +182,7 @@ struct sPAPRMachineState { unsigned long *irq_map; sPAPRXive *xive; sPAPRIrq *irq; + qemu_irq *qirqs; bool cmd_line_caps[SPAPR_CAP_NUM]; sPAPRCapabilities def, eff, mig; @@ -444,6 +449,7 @@ struct sPAPRMachineState { #define H_GET_EM_PARMS 0x2B8 #define H_SET_MPP 0x2D0 #define H_GET_MPP 0x2D4 +#define H_HOME_NODE_ASSOCIATIVITY 0x2EC #define H_XIRR_X 0x2FC #define H_RANDOM 0x300 #define H_SET_MODE 0x31C @@ -480,7 +486,8 @@ struct sPAPRMachineState { #define KVMPPC_H_LOGICAL_MEMOP (KVMPPC_HCALL_BASE + 0x1) /* Client Architecture support */ #define KVMPPC_H_CAS (KVMPPC_HCALL_BASE + 0x2) -#define KVMPPC_HCALL_MAX KVMPPC_H_CAS +#define KVMPPC_H_UPDATE_DT (KVMPPC_HCALL_BASE + 0x3) +#define KVMPPC_HCALL_MAX KVMPPC_H_UPDATE_DT typedef struct sPAPRDeviceTreeUpdateHeader { uint32_t version_id; diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index b34d5a0038..14b02c3aca 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -42,15 +42,17 @@ typedef struct sPAPRIrq { void (*print_info)(sPAPRMachineState *spapr, Monitor *mon); void (*dt_populate)(sPAPRMachineState *spapr, uint32_t nr_servers, void *fdt, uint32_t phandle); - Object *(*cpu_intc_create)(sPAPRMachineState *spapr, Object *cpu, - Error **errp); + void (*cpu_intc_create)(sPAPRMachineState *spapr, PowerPCCPU *cpu, + Error **errp); int (*post_load)(sPAPRMachineState *spapr, int version_id); void (*reset)(sPAPRMachineState *spapr, Error **errp); + void (*set_irq)(void *opaque, int srcno, int val); } sPAPRIrq; extern sPAPRIrq spapr_irq_xics; extern sPAPRIrq spapr_irq_xics_legacy; extern sPAPRIrq spapr_irq_xive; +extern sPAPRIrq spapr_irq_dual; void spapr_irq_init(sPAPRMachineState *spapr, Error **errp); int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp); diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h index 728735dbcf..7fdc250574 100644 --- a/include/hw/ppc/spapr_xive.h +++ b/include/hw/ppc/spapr_xive.h @@ -40,7 +40,6 @@ typedef struct sPAPRXive { bool spapr_xive_irq_claim(sPAPRXive *xive, uint32_t lisn, bool lsi); bool spapr_xive_irq_free(sPAPRXive *xive, uint32_t lisn); void spapr_xive_pic_print_info(sPAPRXive *xive, Monitor *mon); -qemu_irq spapr_xive_qirq(sPAPRXive *xive, uint32_t lisn); typedef struct sPAPRMachineState sPAPRMachineState; @@ -48,5 +47,6 @@ void spapr_xive_hcall_init(sPAPRMachineState *spapr); void spapr_dt_xive(sPAPRMachineState *spapr, uint32_t nr_servers, void *fdt, uint32_t phandle); void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx); +void spapr_xive_mmio_set_enabled(sPAPRXive *xive, bool enable); #endif /* PPC_SPAPR_XIVE_H */ diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 14afda198c..07508cbd21 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -131,7 +131,6 @@ struct ICSState { /*< public >*/ uint32_t nr_irqs; uint32_t offset; - qemu_irq *qirqs; ICSIRQState *irqs; XICSFabric *xics; }; @@ -140,8 +139,7 @@ struct ICSState { static inline bool ics_valid_irq(ICSState *ics, uint32_t nr) { - return (ics->offset != 0) && (nr >= ics->offset) - && (nr < (ics->offset + ics->nr_irqs)); + return (nr >= ics->offset) && (nr < (ics->offset + ics->nr_irqs)); } struct ICSIRQState { @@ -192,6 +190,8 @@ void icp_eoi(ICPState *icp, uint32_t xirr); void ics_simple_write_xive(ICSState *ics, int nr, int server, uint8_t priority, uint8_t saved_priority); +void ics_simple_set_irq(void *opaque, int srcno, int val); +void ics_kvm_set_irq(void *opaque, int srcno, int val); void ics_set_irq_type(ICSState *ics, int srcno, bool lsi); void icp_pic_print_info(ICPState *icp, Monitor *mon); diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h index 18cd114eb2..ec23253ba4 100644 --- a/include/hw/ppc/xive.h +++ b/include/hw/ppc/xive.h @@ -184,7 +184,6 @@ typedef struct XiveSource { /* IRQs */ uint32_t nr_irqs; - qemu_irq *qirqs; unsigned long *lsi_map; /* PQ bits and LSI assertion bit */ @@ -278,12 +277,6 @@ uint8_t xive_source_esb_set(XiveSource *xsrc, uint32_t srcno, uint8_t pq); void xive_source_pic_print_info(XiveSource *xsrc, uint32_t offset, Monitor *mon); -static inline qemu_irq xive_source_qirq(XiveSource *xsrc, uint32_t srcno) -{ - assert(srcno < xsrc->nr_irqs); - return xsrc->qirqs[srcno]; -} - static inline bool xive_source_irq_is_lsi(XiveSource *xsrc, uint32_t srcno) { assert(srcno < xsrc->nr_irqs); @@ -299,6 +292,8 @@ static inline void xive_source_irq_set(XiveSource *xsrc, uint32_t srcno, } } +void xive_source_set_irq(void *opaque, int srcno, int val); + /* * XIVE Router */ diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index bc014c1c9f..9614f76ae6 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -206,7 +206,7 @@ struct BusState { HotplugHandler *hotplug_handler; int max_index; bool realized; - QTAILQ_HEAD(ChildrenHead, BusChild) children; + QTAILQ_HEAD(, BusChild) children; QLIST_ENTRY(BusState) sibling; }; diff --git a/include/hw/scsi/esp.h b/include/hw/scsi/esp.h index 682a0d2de0..adab63d1c9 100644 --- a/include/hw/scsi/esp.h +++ b/include/hw/scsi/esp.h @@ -23,6 +23,8 @@ struct ESPState { int32_t ti_size; uint32_t ti_rptr, ti_wptr; uint32_t status; + uint32_t deferred_status; + bool deferred_complete; uint32_t dma; uint8_t ti_buf[TI_BUFSZ]; SCSIBus bus; diff --git a/include/hw/sh4/sh_intc.h b/include/hw/sh4/sh_intc.h index fbcee94ed7..adfedb2efc 100644 --- a/include/hw/sh4/sh_intc.h +++ b/include/hw/sh4/sh_intc.h @@ -61,21 +61,21 @@ struct intc_desc { int sh_intc_get_pending_vector(struct intc_desc *desc, int imask); struct intc_source *sh_intc_source(struct intc_desc *desc, intc_enum id); void sh_intc_toggle_source(struct intc_source *source, - int enable_adj, int assert_adj); + int enable_adj, int assert_adj); void sh_intc_register_sources(struct intc_desc *desc, - struct intc_vect *vectors, - int nr_vectors, - struct intc_group *groups, - int nr_groups); + struct intc_vect *vectors, + int nr_vectors, + struct intc_group *groups, + int nr_groups); int sh_intc_init(MemoryRegion *sysmem, struct intc_desc *desc, - int nr_sources, - struct intc_mask_reg *mask_regs, - int nr_mask_regs, - struct intc_prio_reg *prio_regs, - int nr_prio_regs); + int nr_sources, + struct intc_mask_reg *mask_regs, + int nr_mask_regs, + struct intc_prio_reg *prio_regs, + int nr_prio_regs); void sh_intc_set_irl(void *opaque, int n, int level); diff --git a/include/hw/usb.h b/include/hw/usb.h index 4961405fa0..c21f41c8a9 100644 --- a/include/hw/usb.h +++ b/include/hw/usb.h @@ -408,7 +408,7 @@ struct USBPacket { struct USBCombinedPacket { USBPacket *first; - QTAILQ_HEAD(packets_head, USBPacket) packets; + QTAILQ_HEAD(, USBPacket) packets; QEMUIOVector iov; }; diff --git a/include/hw/vfio/vfio-common.h b/include/hw/vfio/vfio-common.h index 1b434d02f6..7624c9f511 100644 --- a/include/hw/vfio/vfio-common.h +++ b/include/hw/vfio/vfio-common.h @@ -180,8 +180,8 @@ int vfio_get_device(VFIOGroup *group, const char *name, VFIODevice *vbasedev, Error **errp); extern const MemoryRegionOps vfio_region_ops; -extern QLIST_HEAD(vfio_group_head, VFIOGroup) vfio_group_list; -extern QLIST_HEAD(vfio_as_head, VFIOAddressSpace) vfio_address_spaces; +typedef QLIST_HEAD(VFIOGroupList, VFIOGroup) VFIOGroupList; +extern VFIOGroupList vfio_group_list; #ifdef CONFIG_LINUX int vfio_get_region_info(VFIODevice *vbasedev, int index, diff --git a/include/hw/vfio/vfio-platform.h b/include/hw/vfio/vfio-platform.h index 0ee10b1d71..30d3c28d3b 100644 --- a/include/hw/vfio/vfio-platform.h +++ b/include/hw/vfio/vfio-platform.h @@ -53,7 +53,7 @@ typedef struct VFIOPlatformDevice { VFIORegion **regions; QLIST_HEAD(, VFIOINTp) intp_list; /* list of IRQs */ /* queue of pending IRQs */ - QSIMPLEQ_HEAD(pending_intp_queue, VFIOINTp) pending_intp_queue; + QSIMPLEQ_HEAD(, VFIOINTp) pending_intp_queue; char *compat; /* DT compatible values, separated by NUL */ unsigned int num_compat; /* number of compatible values */ uint32_t mmap_timeout; /* delay to re-enable mmaps after interrupt */ diff --git a/include/hw/xen/io/ring.h b/include/hw/xen/io/ring.h index ffa3ebadc8..1adacf09f9 100644 --- a/include/hw/xen/io/ring.h +++ b/include/hw/xen/io/ring.h @@ -235,8 +235,8 @@ typedef struct __name##_back_ring __name##_back_ring_t * to be ineffective where _req is a struct which consists of only bitfields. */ #define RING_COPY_REQUEST(_r, _idx, _req) do { \ - /* Use volatile to force the copy into _req. */ \ - *(_req) = *(volatile typeof(_req))RING_GET_REQUEST(_r, _idx); \ + /* Use volatile to force the copy into _req. */ \ + *(_req) = *(volatile typeof(_req))RING_GET_REQUEST(_r, _idx); \ } while (0) #define RING_GET_RESPONSE(_r, _idx) \ diff --git a/include/net/net.h b/include/net/net.h index ec13702dbf..643295d163 100644 --- a/include/net/net.h +++ b/include/net/net.h @@ -97,7 +97,7 @@ struct NetClientState { unsigned rxfilter_notify_enabled:1; int vring_enable; int vnet_hdr_len; - QTAILQ_HEAD(NetFilterHead, NetFilterState) filters; + QTAILQ_HEAD(, NetFilterState) filters; }; typedef struct NICState { diff --git a/include/qemu/acl.h b/include/qemu/acl.h index 7c44119a47..73d2a71c8d 100644 --- a/include/qemu/acl.h +++ b/include/qemu/acl.h @@ -49,18 +49,18 @@ qemu_acl *qemu_acl_init(const char *aclname); qemu_acl *qemu_acl_find(const char *aclname); int qemu_acl_party_is_allowed(qemu_acl *acl, - const char *party); + const char *party); void qemu_acl_reset(qemu_acl *acl); int qemu_acl_append(qemu_acl *acl, - int deny, - const char *match); + int deny, + const char *match); int qemu_acl_insert(qemu_acl *acl, - int deny, - const char *match, - int index); + int deny, + const char *match, + int index); int qemu_acl_remove(qemu_acl *acl, - const char *match); + const char *match); #endif /* QEMU_ACL_H */ diff --git a/include/qemu/iov.h b/include/qemu/iov.h index 72d4c559b4..5f433c7768 100644 --- a/include/qemu/iov.h +++ b/include/qemu/iov.h @@ -35,7 +35,7 @@ size_t iov_size(const struct iovec *iov, const unsigned int iov_cnt); size_t iov_from_buf_full(const struct iovec *iov, unsigned int iov_cnt, size_t offset, const void *buf, size_t bytes); size_t iov_to_buf_full(const struct iovec *iov, const unsigned int iov_cnt, - size_t offset, void *buf, size_t bytes); + size_t offset, void *buf, size_t bytes); static inline size_t iov_from_buf(const struct iovec *iov, unsigned int iov_cnt, diff --git a/include/qemu/option_int.h b/include/qemu/option_int.h index 26b1d9e4d6..5dd9a5162d 100644 --- a/include/qemu/option_int.h +++ b/include/qemu/option_int.h @@ -47,7 +47,7 @@ struct QemuOpts { char *id; QemuOptsList *list; Location loc; - QTAILQ_HEAD(QemuOptHead, QemuOpt) head; + QTAILQ_HEAD(, QemuOpt) head; QTAILQ_ENTRY(QemuOpts) next; }; diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h index 3bf48bcdec..80df7253db 100644 --- a/include/qemu/osdep.h +++ b/include/qemu/osdep.h @@ -74,13 +74,30 @@ typedef __float128 _Float128; extern int daemon(int, int); #endif +#ifdef _WIN32 +/* as defined in sdkddkver.h */ +#ifndef _WIN32_WINNT +#define _WIN32_WINNT 0x0600 /* Vista */ +#endif +/* reduces the number of implicitly included headers */ +#ifndef WIN32_LEAN_AND_MEAN +#define WIN32_LEAN_AND_MEAN +#endif +#endif + #include <stdarg.h> #include <stddef.h> #include <stdbool.h> #include <stdint.h> #include <sys/types.h> #include <stdlib.h> + +/* enable C99/POSIX format strings (needs mingw32-runtime 3.15 or later) */ +#ifdef __MINGW32__ +#define __USE_MINGW_ANSI_STDIO 1 +#endif #include <stdio.h> + #include <string.h> #include <strings.h> #include <inttypes.h> diff --git a/include/qemu/queue.h b/include/qemu/queue.h index ac418efc43..1f8e219412 100644 --- a/include/qemu/queue.h +++ b/include/qemu/queue.h @@ -346,77 +346,80 @@ struct { \ #define QSIMPLEQ_FIRST(head) ((head)->sqh_first) #define QSIMPLEQ_NEXT(elm, field) ((elm)->field.sqe_next) +typedef struct QTailQLink { + void *tql_next; + struct QTailQLink *tql_prev; +} QTailQLink; /* - * Tail queue definitions. + * Tail queue definitions. The union acts as a poor man template, as if + * it were QTailQLink<type>. */ -#define Q_TAILQ_HEAD(name, type, qual) \ -struct name { \ - qual type *tqh_first; /* first element */ \ - qual type *qual *tqh_last; /* addr of last next element */ \ +#define QTAILQ_HEAD(name, type) \ +union name { \ + struct type *tqh_first; /* first element */ \ + QTailQLink tqh_circ; /* link for circular backwards list */ \ } -#define QTAILQ_HEAD(name, type) Q_TAILQ_HEAD(name, struct type,) #define QTAILQ_HEAD_INITIALIZER(head) \ - { NULL, &(head).tqh_first } + { .tqh_circ = { NULL, &(head).tqh_circ } } -#define Q_TAILQ_ENTRY(type, qual) \ -struct { \ - qual type *tqe_next; /* next element */ \ - qual type *qual *tqe_prev; /* address of previous next element */\ +#define QTAILQ_ENTRY(type) \ +union { \ + struct type *tqe_next; /* next element */ \ + QTailQLink tqe_circ; /* link for circular backwards list */ \ } -#define QTAILQ_ENTRY(type) Q_TAILQ_ENTRY(struct type,) /* * Tail queue functions. */ #define QTAILQ_INIT(head) do { \ (head)->tqh_first = NULL; \ - (head)->tqh_last = &(head)->tqh_first; \ + (head)->tqh_circ.tql_prev = &(head)->tqh_circ; \ } while (/*CONSTCOND*/0) #define QTAILQ_INSERT_HEAD(head, elm, field) do { \ if (((elm)->field.tqe_next = (head)->tqh_first) != NULL) \ - (head)->tqh_first->field.tqe_prev = \ - &(elm)->field.tqe_next; \ + (head)->tqh_first->field.tqe_circ.tql_prev = \ + &(elm)->field.tqe_circ; \ else \ - (head)->tqh_last = &(elm)->field.tqe_next; \ + (head)->tqh_circ.tql_prev = &(elm)->field.tqe_circ; \ (head)->tqh_first = (elm); \ - (elm)->field.tqe_prev = &(head)->tqh_first; \ + (elm)->field.tqe_circ.tql_prev = &(head)->tqh_circ; \ } while (/*CONSTCOND*/0) #define QTAILQ_INSERT_TAIL(head, elm, field) do { \ (elm)->field.tqe_next = NULL; \ - (elm)->field.tqe_prev = (head)->tqh_last; \ - *(head)->tqh_last = (elm); \ - (head)->tqh_last = &(elm)->field.tqe_next; \ + (elm)->field.tqe_circ.tql_prev = (head)->tqh_circ.tql_prev; \ + (head)->tqh_circ.tql_prev->tql_next = (elm); \ + (head)->tqh_circ.tql_prev = &(elm)->field.tqe_circ; \ } while (/*CONSTCOND*/0) #define QTAILQ_INSERT_AFTER(head, listelm, elm, field) do { \ if (((elm)->field.tqe_next = (listelm)->field.tqe_next) != NULL)\ - (elm)->field.tqe_next->field.tqe_prev = \ - &(elm)->field.tqe_next; \ + (elm)->field.tqe_next->field.tqe_circ.tql_prev = \ + &(elm)->field.tqe_circ; \ else \ - (head)->tqh_last = &(elm)->field.tqe_next; \ + (head)->tqh_circ.tql_prev = &(elm)->field.tqe_circ; \ (listelm)->field.tqe_next = (elm); \ - (elm)->field.tqe_prev = &(listelm)->field.tqe_next; \ + (elm)->field.tqe_circ.tql_prev = &(listelm)->field.tqe_circ; \ } while (/*CONSTCOND*/0) -#define QTAILQ_INSERT_BEFORE(listelm, elm, field) do { \ - (elm)->field.tqe_prev = (listelm)->field.tqe_prev; \ - (elm)->field.tqe_next = (listelm); \ - *(listelm)->field.tqe_prev = (elm); \ - (listelm)->field.tqe_prev = &(elm)->field.tqe_next; \ +#define QTAILQ_INSERT_BEFORE(listelm, elm, field) do { \ + (elm)->field.tqe_circ.tql_prev = (listelm)->field.tqe_circ.tql_prev; \ + (elm)->field.tqe_next = (listelm); \ + (listelm)->field.tqe_circ.tql_prev->tql_next = (elm); \ + (listelm)->field.tqe_circ.tql_prev = &(elm)->field.tqe_circ; \ } while (/*CONSTCOND*/0) #define QTAILQ_REMOVE(head, elm, field) do { \ if (((elm)->field.tqe_next) != NULL) \ - (elm)->field.tqe_next->field.tqe_prev = \ - (elm)->field.tqe_prev; \ + (elm)->field.tqe_next->field.tqe_circ.tql_prev = \ + (elm)->field.tqe_circ.tql_prev; \ else \ - (head)->tqh_last = (elm)->field.tqe_prev; \ - *(elm)->field.tqe_prev = (elm)->field.tqe_next; \ - (elm)->field.tqe_prev = NULL; \ + (head)->tqh_circ.tql_prev = (elm)->field.tqe_circ.tql_prev; \ + (elm)->field.tqe_circ.tql_prev->tql_next = (elm)->field.tqe_next; \ + (elm)->field.tqe_circ.tql_prev = NULL; \ } while (/*CONSTCOND*/0) #define QTAILQ_FOREACH(var, head, field) \ @@ -429,14 +432,14 @@ struct { \ (var) && ((next_var) = ((var)->field.tqe_next), 1); \ (var) = (next_var)) -#define QTAILQ_FOREACH_REVERSE(var, head, headname, field) \ - for ((var) = (*(((struct headname *)((head)->tqh_last))->tqh_last)); \ +#define QTAILQ_FOREACH_REVERSE(var, head, field) \ + for ((var) = QTAILQ_LAST(head); \ (var); \ - (var) = (*(((struct headname *)((var)->field.tqe_prev))->tqh_last))) + (var) = QTAILQ_PREV(var, field)) -#define QTAILQ_FOREACH_REVERSE_SAFE(var, head, headname, field, prev_var) \ - for ((var) = (*(((struct headname *)((head)->tqh_last))->tqh_last)); \ - (var) && ((prev_var) = (*(((struct headname *)((var)->field.tqe_prev))->tqh_last)), 1); \ +#define QTAILQ_FOREACH_REVERSE_SAFE(var, head, field, prev_var) \ + for ((var) = QTAILQ_LAST(head); \ + (var) && ((prev_var) = QTAILQ_PREV(var, field)); \ (var) = (prev_var)) /* @@ -445,71 +448,49 @@ struct { \ #define QTAILQ_EMPTY(head) ((head)->tqh_first == NULL) #define QTAILQ_FIRST(head) ((head)->tqh_first) #define QTAILQ_NEXT(elm, field) ((elm)->field.tqe_next) -#define QTAILQ_IN_USE(elm, field) ((elm)->field.tqe_prev != NULL) +#define QTAILQ_IN_USE(elm, field) ((elm)->field.tqe_circ.tql_prev != NULL) -#define QTAILQ_LAST(head, headname) \ - (*(((struct headname *)((head)->tqh_last))->tqh_last)) -#define QTAILQ_PREV(elm, headname, field) \ - (*(((struct headname *)((elm)->field.tqe_prev))->tqh_last)) +#define QTAILQ_LINK_PREV(link) \ + ((link).tql_prev->tql_prev->tql_next) +#define QTAILQ_LAST(head) \ + ((typeof((head)->tqh_first)) QTAILQ_LINK_PREV((head)->tqh_circ)) +#define QTAILQ_PREV(elm, field) \ + ((typeof((elm)->field.tqe_next)) QTAILQ_LINK_PREV((elm)->field.tqe_circ)) #define field_at_offset(base, offset, type) \ - ((type) (((char *) (base)) + (offset))) - -typedef struct DUMMY_Q_ENTRY DUMMY_Q_ENTRY; -typedef struct DUMMY_Q DUMMY_Q; - -struct DUMMY_Q_ENTRY { - QTAILQ_ENTRY(DUMMY_Q_ENTRY) next; -}; - -struct DUMMY_Q { - QTAILQ_HEAD(DUMMY_Q_HEAD, DUMMY_Q_ENTRY) head; -}; - -#define dummy_q ((DUMMY_Q *) 0) -#define dummy_qe ((DUMMY_Q_ENTRY *) 0) + ((type *) (((char *) (base)) + (offset))) /* - * Offsets of layout of a tail queue head. - */ -#define QTAILQ_FIRST_OFFSET (offsetof(typeof(dummy_q->head), tqh_first)) -#define QTAILQ_LAST_OFFSET (offsetof(typeof(dummy_q->head), tqh_last)) -/* - * Raw access of elements of a tail queue + * Raw access of elements of a tail queue head. Offsets are all zero + * because it's a union. */ #define QTAILQ_RAW_FIRST(head) \ - (*field_at_offset(head, QTAILQ_FIRST_OFFSET, void **)) -#define QTAILQ_RAW_TQH_LAST(head) \ - (*field_at_offset(head, QTAILQ_LAST_OFFSET, void ***)) - -/* - * Offsets of layout of a tail queue element. - */ -#define QTAILQ_NEXT_OFFSET (offsetof(typeof(dummy_qe->next), tqe_next)) -#define QTAILQ_PREV_OFFSET (offsetof(typeof(dummy_qe->next), tqe_prev)) + field_at_offset(head, 0, void *) +#define QTAILQ_RAW_TQH_CIRC(head) \ + field_at_offset(head, 0, QTailQLink) /* * Raw access of elements of a tail entry */ #define QTAILQ_RAW_NEXT(elm, entry) \ - (*field_at_offset(elm, entry + QTAILQ_NEXT_OFFSET, void **)) -#define QTAILQ_RAW_TQE_PREV(elm, entry) \ - (*field_at_offset(elm, entry + QTAILQ_PREV_OFFSET, void ***)) + field_at_offset(elm, entry, void *) +#define QTAILQ_RAW_TQE_CIRC(elm, entry) \ + field_at_offset(elm, entry, QTailQLink) /* - * Tail queue tranversal using pointer arithmetic. + * Tail queue traversal using pointer arithmetic. */ #define QTAILQ_RAW_FOREACH(elm, head, entry) \ - for ((elm) = QTAILQ_RAW_FIRST(head); \ + for ((elm) = *QTAILQ_RAW_FIRST(head); \ (elm); \ - (elm) = QTAILQ_RAW_NEXT(elm, entry)) + (elm) = *QTAILQ_RAW_NEXT(elm, entry)) /* * Tail queue insertion using pointer arithmetic. */ -#define QTAILQ_RAW_INSERT_TAIL(head, elm, entry) do { \ - QTAILQ_RAW_NEXT(elm, entry) = NULL; \ - QTAILQ_RAW_TQE_PREV(elm, entry) = QTAILQ_RAW_TQH_LAST(head); \ - *QTAILQ_RAW_TQH_LAST(head) = (elm); \ - QTAILQ_RAW_TQH_LAST(head) = &QTAILQ_RAW_NEXT(elm, entry); \ +#define QTAILQ_RAW_INSERT_TAIL(head, elm, entry) do { \ + *QTAILQ_RAW_NEXT(elm, entry) = NULL; \ + QTAILQ_RAW_TQE_CIRC(elm, entry)->tql_prev = QTAILQ_RAW_TQH_CIRC(head)->tql_prev; \ + QTAILQ_RAW_TQH_CIRC(head)->tql_prev->tql_next = (elm); \ + QTAILQ_RAW_TQH_CIRC(head)->tql_prev = QTAILQ_RAW_TQE_CIRC(elm, entry); \ } while (/*CONSTCOND*/0) #endif /* QEMU_SYS_QUEUE_H */ diff --git a/include/qemu/range.h b/include/qemu/range.h index 7e75f4e655..ba606c6bc0 100644 --- a/include/qemu/range.h +++ b/include/qemu/range.h @@ -113,6 +113,68 @@ static inline uint64_t range_upb(Range *range) } /* + * Initialize @range to span the interval [@lob,@lob + @size - 1]. + * @size may be 0. If the range would overflow, returns -ERANGE, otherwise + * 0. + */ +static inline int QEMU_WARN_UNUSED_RESULT range_init(Range *range, uint64_t lob, + uint64_t size) +{ + if (lob + size < lob) { + return -ERANGE; + } + range->lob = lob; + range->upb = lob + size - 1; + range_invariant(range); + return 0; +} + +/* + * Initialize @range to span the interval [@lob,@lob + @size - 1]. + * @size may be 0. Range must not overflow. + */ +static inline void range_init_nofail(Range *range, uint64_t lob, uint64_t size) +{ + range->lob = lob; + range->upb = lob + size - 1; + range_invariant(range); +} + +/* + * Get the size of @range. + */ +static inline uint64_t range_size(const Range *range) +{ + return range->upb - range->lob + 1; +} + +/* + * Check if @range1 overlaps with @range2. If one of the ranges is empty, + * the result is always "false". + */ +static inline bool range_overlaps_range(const Range *range1, + const Range *range2) +{ + if (range_is_empty(range1) || range_is_empty(range2)) { + return false; + } + return !(range2->upb < range1->lob || range1->upb < range2->lob); +} + +/* + * Check if @range1 contains @range2. If one of the ranges is empty, + * the result is always "false". + */ +static inline bool range_contains_range(const Range *range1, + const Range *range2) +{ + if (range_is_empty(range1) || range_is_empty(range2)) { + return false; + } + return range1->lob <= range2->lob && range1->upb >= range2->upb; +} + +/* * Extend @range to the smallest interval that includes @extend_by, too. */ static inline void range_extend(Range *range, Range *extend_by) diff --git a/include/qemu/rcu_queue.h b/include/qemu/rcu_queue.h index 904b3372dc..2d386f303e 100644 --- a/include/qemu/rcu_queue.h +++ b/include/qemu/rcu_queue.h @@ -206,47 +206,50 @@ extern "C" { #define QTAILQ_INSERT_HEAD_RCU(head, elm, field) do { \ (elm)->field.tqe_next = (head)->tqh_first; \ if ((elm)->field.tqe_next != NULL) { \ - (head)->tqh_first->field.tqe_prev = &(elm)->field.tqe_next; \ + (head)->tqh_first->field.tqe_circ.tql_prev = \ + &(elm)->field.tqe_circ; \ } else { \ - (head)->tqh_last = &(elm)->field.tqe_next; \ + (head)->tqh_circ.tql_prev = &(elm)->field.tqe_circ; \ } \ atomic_rcu_set(&(head)->tqh_first, (elm)); \ - (elm)->field.tqe_prev = &(head)->tqh_first; \ + (elm)->field.tqe_circ.tql_prev = &(head)->tqh_circ; \ } while (/*CONSTCOND*/0) -#define QTAILQ_INSERT_TAIL_RCU(head, elm, field) do { \ - (elm)->field.tqe_next = NULL; \ - (elm)->field.tqe_prev = (head)->tqh_last; \ - atomic_rcu_set((head)->tqh_last, (elm)); \ - (head)->tqh_last = &(elm)->field.tqe_next; \ +#define QTAILQ_INSERT_TAIL_RCU(head, elm, field) do { \ + (elm)->field.tqe_next = NULL; \ + (elm)->field.tqe_circ.tql_prev = (head)->tqh_circ.tql_prev; \ + atomic_rcu_set(&(head)->tqh_circ.tql_prev->tql_next, (elm)); \ + (head)->tqh_circ.tql_prev = &(elm)->field.tqe_circ; \ } while (/*CONSTCOND*/0) #define QTAILQ_INSERT_AFTER_RCU(head, listelm, elm, field) do { \ (elm)->field.tqe_next = (listelm)->field.tqe_next; \ if ((elm)->field.tqe_next != NULL) { \ - (elm)->field.tqe_next->field.tqe_prev = &(elm)->field.tqe_next; \ + (elm)->field.tqe_next->field.tqe_circ.tql_prev = \ + &(elm)->field.tqe_circ; \ } else { \ - (head)->tqh_last = &(elm)->field.tqe_next; \ + (head)->tqh_circ.tql_prev = &(elm)->field.tqe_circ; \ } \ atomic_rcu_set(&(listelm)->field.tqe_next, (elm)); \ - (elm)->field.tqe_prev = &(listelm)->field.tqe_next; \ + (elm)->field.tqe_circ.tql_prev = &(listelm)->field.tqe_circ; \ } while (/*CONSTCOND*/0) -#define QTAILQ_INSERT_BEFORE_RCU(listelm, elm, field) do { \ - (elm)->field.tqe_prev = (listelm)->field.tqe_prev; \ - (elm)->field.tqe_next = (listelm); \ - atomic_rcu_set((listelm)->field.tqe_prev, (elm)); \ - (listelm)->field.tqe_prev = &(elm)->field.tqe_next; \ - } while (/*CONSTCOND*/0) +#define QTAILQ_INSERT_BEFORE_RCU(listelm, elm, field) do { \ + (elm)->field.tqe_circ.tql_prev = (listelm)->field.tqe_circ.tql_prev; \ + (elm)->field.tqe_next = (listelm); \ + atomic_rcu_set(&(listelm)->field.tqe_circ.tql_prev->tql_next, (elm)); \ + (listelm)->field.tqe_circ.tql_prev = &(elm)->field.tqe_circ; \ +} while (/*CONSTCOND*/0) #define QTAILQ_REMOVE_RCU(head, elm, field) do { \ if (((elm)->field.tqe_next) != NULL) { \ - (elm)->field.tqe_next->field.tqe_prev = (elm)->field.tqe_prev; \ + (elm)->field.tqe_next->field.tqe_circ.tql_prev = \ + (elm)->field.tqe_circ.tql_prev; \ } else { \ - (head)->tqh_last = (elm)->field.tqe_prev; \ + (head)->tqh_circ.tql_prev = (elm)->field.tqe_circ.tql_prev; \ } \ - atomic_set((elm)->field.tqe_prev, (elm)->field.tqe_next); \ - (elm)->field.tqe_prev = NULL; \ + atomic_set(&(elm)->field.tqe_circ.tql_prev->tql_next, (elm)->field.tqe_next); \ + (elm)->field.tqe_circ.tql_prev = NULL; \ } while (/*CONSTCOND*/0) #define QTAILQ_FOREACH_RCU(var, head, field) \ diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h index d59df20c4d..741935fe36 100644 --- a/include/qemu/typedefs.h +++ b/include/qemu/typedefs.h @@ -4,7 +4,7 @@ /* A load of opaque types so that device init declarations don't have to pull in all the real definitions. */ -/* Please keep this list in alphabetical order */ +/* Please keep this list in case-insensitive alphabetical order */ typedef struct AdapterInfo AdapterInfo; typedef struct AddressSpace AddressSpace; typedef struct AioContext AioContext; @@ -40,6 +40,7 @@ typedef struct HCIInfo HCIInfo; typedef struct HVFX86EmulatorState HVFX86EmulatorState; typedef struct I2CBus I2CBus; typedef struct I2SCodec I2SCodec; +typedef struct IOMMUMemoryRegion IOMMUMemoryRegion; typedef struct ISABus ISABus; typedef struct ISADevice ISADevice; typedef struct IsaDma IsaDma; @@ -49,7 +50,6 @@ typedef struct MachineState MachineState; typedef struct MemoryListener MemoryListener; typedef struct MemoryMappingList MemoryMappingList; typedef struct MemoryRegion MemoryRegion; -typedef struct IOMMUMemoryRegion IOMMUMemoryRegion; typedef struct MemoryRegionCache MemoryRegionCache; typedef struct MemoryRegionSection MemoryRegionSection; typedef struct MigrationIncomingState MigrationIncomingState; @@ -84,6 +84,8 @@ typedef struct PostcopyDiscardState PostcopyDiscardState; typedef struct Property Property; typedef struct PropertyInfo PropertyInfo; typedef struct PS2State PS2State; +typedef struct QBool QBool; +typedef struct QDict QDict; typedef struct QEMUBH QEMUBH; typedef struct QemuConsole QemuConsole; typedef struct QemuDmaBuf QemuDmaBuf; @@ -93,12 +95,10 @@ typedef struct QemuMutex QemuMutex; typedef struct QemuOpt QemuOpt; typedef struct QemuOpts QemuOpts; typedef struct QemuOptsList QemuOptsList; -typedef struct QemuSpin QemuSpin; typedef struct QEMUSGList QEMUSGList; +typedef struct QemuSpin QemuSpin; typedef struct QEMUTimer QEMUTimer; typedef struct QEMUTimerListGroup QEMUTimerListGroup; -typedef struct QBool QBool; -typedef struct QDict QDict; typedef struct QJSON QJSON; typedef struct QList QList; typedef struct QNull QNull; diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 1396f53e5b..16bbed1ae0 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -26,6 +26,7 @@ #include "exec/memattrs.h" #include "qapi/qapi-types-run-state.h" #include "qemu/bitmap.h" +#include "qemu/fprintf-fn.h" #include "qemu/rcu_queue.h" #include "qemu/queue.h" #include "qemu/thread.h" @@ -375,9 +376,9 @@ struct CPUState { QTAILQ_ENTRY(CPUState) node; /* ice debug support */ - QTAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints; + QTAILQ_HEAD(, CPUBreakpoint) breakpoints; - QTAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints; + QTAILQ_HEAD(, CPUWatchpoint) watchpoints; CPUWatchpoint *watchpoint_hit; void *opaque; @@ -435,8 +436,9 @@ struct CPUState { GArray *iommu_notifiers; }; -QTAILQ_HEAD(CPUTailQ, CPUState); -extern struct CPUTailQ cpus; +typedef QTAILQ_HEAD(CPUTailQ, CPUState) CPUTailQ; +extern CPUTailQ cpus; + #define first_cpu QTAILQ_FIRST_RCU(&cpus) #define CPU_NEXT(cpu) QTAILQ_NEXT_RCU(cpu, node) #define CPU_FOREACH(cpu) QTAILQ_FOREACH_RCU(cpu, &cpus, node) diff --git a/include/scsi/constants.h b/include/scsi/constants.h index 083a8e887a..0dc550732d 100644 --- a/include/scsi/constants.h +++ b/include/scsi/constants.h @@ -212,7 +212,7 @@ #define TYPE_ROM 0x05 #define TYPE_SCANNER 0x06 #define TYPE_MOD 0x07 /* Magneto-optical disk - - * - treated as TYPE_DISK */ + * - treated as TYPE_DISK */ #define TYPE_MEDIUM_CHANGER 0x08 #define TYPE_STORAGE_ARRAY 0x0c /* Storage array device */ #define TYPE_ENCLOSURE 0x0d /* Enclosure Services Device */ diff --git a/include/sysemu/accel.h b/include/sysemu/accel.h index f331d128e9..5565e00a96 100644 --- a/include/sysemu/accel.h +++ b/include/sysemu/accel.h @@ -66,7 +66,7 @@ typedef struct AccelClass { extern unsigned long tcg_tb_size; -void configure_accelerator(MachineState *ms); +void configure_accelerator(MachineState *ms, const char *progname); /* Called just before os_setup_post (ie just before drop OS privs) */ void accel_setup_post(MachineState *ms); diff --git a/include/sysemu/balloon.h b/include/sysemu/balloon.h index 66543ae8f4..c8f6145257 100644 --- a/include/sysemu/balloon.h +++ b/include/sysemu/balloon.h @@ -20,7 +20,7 @@ typedef void (QEMUBalloonEvent)(void *opaque, ram_addr_t target); typedef void (QEMUBalloonStatus)(void *opaque, BalloonInfo *info); int qemu_add_balloon_handler(QEMUBalloonEvent *event_func, - QEMUBalloonStatus *stat_func, void *opaque); + QEMUBalloonStatus *stat_func, void *opaque); void qemu_remove_balloon_handler(void *opaque); bool qemu_balloon_is_inhibited(void); void qemu_balloon_inhibit(bool state); diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index 97d8d9d0d5..a6d1cd190f 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -412,8 +412,6 @@ struct kvm_sw_breakpoint { QTAILQ_ENTRY(kvm_sw_breakpoint) entry; }; -QTAILQ_HEAD(kvm_sw_breakpoint_head, kvm_sw_breakpoint); - struct kvm_sw_breakpoint *kvm_find_sw_breakpoint(CPUState *cpu, target_ulong pc); diff --git a/include/sysemu/memory_mapping.h b/include/sysemu/memory_mapping.h index 706152d533..58452457ce 100644 --- a/include/sysemu/memory_mapping.h +++ b/include/sysemu/memory_mapping.h @@ -36,7 +36,7 @@ typedef struct GuestPhysBlock { /* point-in-time snapshot of guest-visible physical mappings */ typedef struct GuestPhysBlockList { unsigned num; - QTAILQ_HEAD(GuestPhysBlockHead, GuestPhysBlock) head; + QTAILQ_HEAD(, GuestPhysBlock) head; } GuestPhysBlockList; /* The physical and virtual address in the memory mapping are contiguous. */ diff --git a/include/sysemu/rng.h b/include/sysemu/rng.h index 45629c4c53..27b37da05d 100644 --- a/include/sysemu/rng.h +++ b/include/sysemu/rng.h @@ -57,7 +57,7 @@ struct RngBackend /*< protected >*/ bool opened; - QSIMPLEQ_HEAD(requests, RngRequest) requests; + QSIMPLEQ_HEAD(, RngRequest) requests; }; diff --git a/include/ui/console.h b/include/ui/console.h index c17803c530..853fcf4eb7 100644 --- a/include/ui/console.h +++ b/include/ui/console.h @@ -257,10 +257,6 @@ DisplaySurface *qemu_create_displaysurface_from(int width, int height, pixman_format_code_t format, int linesize, uint8_t *data); DisplaySurface *qemu_create_displaysurface_pixman(pixman_image_t *image); -DisplaySurface *qemu_create_displaysurface_guestmem(int width, int height, - pixman_format_code_t format, - int linesize, - uint64_t addr); DisplaySurface *qemu_create_message_surface(int w, int h, const char *msg); PixelFormat qemu_default_pixelformat(int bpp); diff --git a/include/ui/input.h b/include/ui/input.h index 34ebc67c5a..8c8ccb999f 100644 --- a/include/ui/input.h +++ b/include/ui/input.h @@ -49,7 +49,6 @@ int qemu_input_key_value_to_scancode(const KeyValue *value, bool down, int *codes); int qemu_input_linux_to_qcode(unsigned int lnx); -InputEvent *qemu_input_event_new_btn(InputButton btn, bool down); void qemu_input_queue_btn(QemuConsole *src, InputButton btn, bool down); void qemu_input_update_buttons(QemuConsole *src, uint32_t *button_map, uint32_t button_old, uint32_t button_new); @@ -58,8 +57,6 @@ bool qemu_input_is_absolute(void); int qemu_input_scale_axis(int value, int min_in, int max_in, int min_out, int max_out); -InputEvent *qemu_input_event_new_move(InputEventKind kind, - InputAxis axis, int value); void qemu_input_queue_rel(QemuConsole *src, InputAxis axis, int value); void qemu_input_queue_abs(QemuConsole *src, InputAxis axis, int value, int min_in, int max_in); diff --git a/include/ui/qemu-spice.h b/include/ui/qemu-spice.h index c6d50eb87a..8c23dfe717 100644 --- a/include/ui/qemu-spice.h +++ b/include/ui/qemu-spice.h @@ -46,13 +46,7 @@ int qemu_spice_migrate_info(const char *hostname, int port, int tls_port, #else #define SPICE_NEEDS_SET_MM_TIME 0 #endif - -#if SPICE_SERVER_VERSION >= 0x000c02 void qemu_spice_register_ports(void); -#else -static inline Chardev *qemu_chr_open_spice_port(const char *name) -{ return NULL; } -#endif #else /* CONFIG_SPICE */ diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 5bccd2e243..4cff9e1a31 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -2844,7 +2844,7 @@ struct elf_note_info { struct target_elf_prstatus *prstatus; /* NT_PRSTATUS */ struct target_elf_prpsinfo *psinfo; /* NT_PRPSINFO */ - QTAILQ_HEAD(thread_list_head, elf_thread_status) thread_list; + QTAILQ_HEAD(, elf_thread_status) thread_list; #if 0 /* * Current version of ELF coredump doesn't support diff --git a/linux-user/linuxload.c b/linux-user/linuxload.c index 6f0d6054ce..a27e1d0d8b 100644 --- a/linux-user/linuxload.c +++ b/linux-user/linuxload.c @@ -38,15 +38,15 @@ static int prepare_binprm(struct linux_binprm *bprm) int retval; if(fstat(bprm->fd, &st) < 0) { - return(-errno); + return(-errno); } mode = st.st_mode; if(!S_ISREG(mode)) { /* Must be regular file */ - return(-EACCES); + return(-EACCES); } if(!(mode & 0111)) { /* Must have at least one execute bit set */ - return(-EACCES); + return(-EACCES); } bprm->e_uid = geteuid(); @@ -54,7 +54,7 @@ static int prepare_binprm(struct linux_binprm *bprm) /* Set-uid? */ if(mode & S_ISUID) { - bprm->e_uid = st.st_uid; + bprm->e_uid = st.st_uid; } /* Set-gid? */ @@ -64,13 +64,13 @@ static int prepare_binprm(struct linux_binprm *bprm) * executable. */ if ((mode & (S_ISGID | S_IXGRP)) == (S_ISGID | S_IXGRP)) { - bprm->e_gid = st.st_gid; + bprm->e_gid = st.st_gid; } retval = read(bprm->fd, bprm->buf, BPRM_BUF_SIZE); if (retval < 0) { - perror("prepare_binprm"); - exit(-1); + perror("prepare_binprm"); + exit(-1); } if (retval < BPRM_BUF_SIZE) { /* Make sure the rest of the loader won't read garbage. */ diff --git a/linux-user/main.c b/linux-user/main.c index 923cbb753a..a0aba9cb1e 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -740,8 +740,8 @@ int main(int argc, char **argv, char **envp) target_argc = argc - optind; target_argv = calloc(target_argc + 1, sizeof (char *)); if (target_argv == NULL) { - (void) fprintf(stderr, "Unable to allocate memory for target_argv\n"); - exit(EXIT_FAILURE); + (void) fprintf(stderr, "Unable to allocate memory for target_argv\n"); + exit(EXIT_FAILURE); } /* diff --git a/linux-user/mmap.c b/linux-user/mmap.c index 41e0983ce8..e0249efe4f 100644 --- a/linux-user/mmap.c +++ b/linux-user/mmap.c @@ -485,11 +485,11 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int prot, end = start + len; real_end = HOST_PAGE_ALIGN(end); - /* - * Test if requested memory area fits target address space - * It can fail only on 64-bit host with 32-bit target. - * On any other target/host host mmap() handles this error correctly. - */ + /* + * Test if requested memory area fits target address space + * It can fail only on 64-bit host with 32-bit target. + * On any other target/host host mmap() handles this error correctly. + */ if (!guest_range_valid(start, len)) { errno = ENOMEM; goto fail; diff --git a/linux-user/ppc/signal.c b/linux-user/ppc/signal.c index 2ae120a2bc..619a56950d 100644 --- a/linux-user/ppc/signal.c +++ b/linux-user/ppc/signal.c @@ -258,8 +258,8 @@ static void save_user_regs(CPUPPCState *env, struct target_mcontext *frame) /* Save Altivec registers if necessary. */ if (env->insns_flags & PPC_ALTIVEC) { uint32_t *vrsave; - for (i = 0; i < ARRAY_SIZE(env->avr); i++) { - ppc_avr_t *avr = &env->avr[i]; + for (i = 0; i < 32; i++) { + ppc_avr_t *avr = cpu_avr_ptr(env, i); ppc_avr_t *vreg = (ppc_avr_t *)&frame->mc_vregs.altivec[i]; __put_user(avr->u64[PPC_VEC_HI], &vreg->u64[0]); @@ -281,15 +281,17 @@ static void save_user_regs(CPUPPCState *env, struct target_mcontext *frame) /* Save VSX second halves */ if (env->insns_flags2 & PPC2_VSX) { uint64_t *vsregs = (uint64_t *)&frame->mc_vregs.altivec[34]; - for (i = 0; i < ARRAY_SIZE(env->vsr); i++) { - __put_user(env->vsr[i], &vsregs[i]); + for (i = 0; i < 32; i++) { + uint64_t *vsrl = cpu_vsrl_ptr(env, i); + __put_user(*vsrl, &vsregs[i]); } } /* Save floating point registers. */ if (env->insns_flags & PPC_FLOAT) { - for (i = 0; i < ARRAY_SIZE(env->fpr); i++) { - __put_user(env->fpr[i], &frame->mc_fregs[i]); + for (i = 0; i < 32; i++) { + uint64_t *fpr = cpu_fpr_ptr(env, i); + __put_user(*fpr, &frame->mc_fregs[i]); } __put_user((uint64_t) env->fpscr, &frame->mc_fregs[32]); } @@ -373,8 +375,8 @@ static void restore_user_regs(CPUPPCState *env, #else v_regs = (ppc_avr_t *)frame->mc_vregs.altivec; #endif - for (i = 0; i < ARRAY_SIZE(env->avr); i++) { - ppc_avr_t *avr = &env->avr[i]; + for (i = 0; i < 32; i++) { + ppc_avr_t *avr = cpu_avr_ptr(env, i); ppc_avr_t *vreg = &v_regs[i]; __get_user(avr->u64[PPC_VEC_HI], &vreg->u64[0]); @@ -393,16 +395,18 @@ static void restore_user_regs(CPUPPCState *env, /* Restore VSX second halves */ if (env->insns_flags2 & PPC2_VSX) { uint64_t *vsregs = (uint64_t *)&frame->mc_vregs.altivec[34]; - for (i = 0; i < ARRAY_SIZE(env->vsr); i++) { - __get_user(env->vsr[i], &vsregs[i]); + for (i = 0; i < 32; i++) { + uint64_t *vsrl = cpu_vsrl_ptr(env, i); + __get_user(*vsrl, &vsregs[i]); } } /* Restore floating point registers. */ if (env->insns_flags & PPC_FLOAT) { uint64_t fpscr; - for (i = 0; i < ARRAY_SIZE(env->fpr); i++) { - __get_user(env->fpr[i], &frame->mc_fregs[i]); + for (i = 0; i < 32; i++) { + uint64_t *fpr = cpu_fpr_ptr(env, i); + __get_user(*fpr, &frame->mc_fregs[i]); } __get_user(fpscr, &frame->mc_fregs[32]); env->fpscr = (uint32_t) fpscr; diff --git a/linux-user/qemu.h b/linux-user/qemu.h index dd5771ce0c..069df8f1f9 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -50,7 +50,7 @@ struct image_info { abi_ulong env_strings; abi_ulong file_string; uint32_t elf_flags; - int personality; + int personality; abi_ulong alignment; /* The fields below are used in FDPIC mode. */ @@ -174,7 +174,7 @@ extern unsigned long mmap_min_addr; struct linux_binprm { char buf[BPRM_BUF_SIZE] __attribute__((aligned)); abi_ulong p; - int fd; + int fd; int e_uid, e_gid; int argc, envc; char **argv; diff --git a/linux-user/signal.c b/linux-user/signal.c index 602b631b92..e2c0b37173 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -727,7 +727,7 @@ abi_long do_sigaltstack(abi_ulong uss_addr, abi_ulong uoss_addr, abi_ulong sp) } #endif - ret = -TARGET_EFAULT; + ret = -TARGET_EFAULT; if (!lock_user_struct(VERIFY_READ, uss, uss_addr, 1)) { goto out; } @@ -736,25 +736,25 @@ abi_long do_sigaltstack(abi_ulong uss_addr, abi_ulong uoss_addr, abi_ulong sp) __get_user(ss.ss_flags, &uss->ss_flags); unlock_user_struct(uss, uss_addr, 0); - ret = -TARGET_EPERM; - if (on_sig_stack(sp)) + ret = -TARGET_EPERM; + if (on_sig_stack(sp)) goto out; - ret = -TARGET_EINVAL; - if (ss.ss_flags != TARGET_SS_DISABLE + ret = -TARGET_EINVAL; + if (ss.ss_flags != TARGET_SS_DISABLE && ss.ss_flags != TARGET_SS_ONSTACK && ss.ss_flags != 0) goto out; - if (ss.ss_flags == TARGET_SS_DISABLE) { + if (ss.ss_flags == TARGET_SS_DISABLE) { ss.ss_size = 0; ss.ss_sp = 0; - } else { + } else { ret = -TARGET_ENOMEM; if (ss.ss_size < minstacksize) { goto out; } - } + } target_sigaltstack_used.ss_sp = ss.ss_sp; target_sigaltstack_used.ss_size = ss.ss_size; diff --git a/linux-user/strace.c b/linux-user/strace.c index d1d14945f9..7318392e57 100644 --- a/linux-user/strace.c +++ b/linux-user/strace.c @@ -647,11 +647,11 @@ print_execve(const struct syscallname *name, for (arg_ptr_addr = arg2; ; arg_ptr_addr += sizeof(abi_ulong)) { abi_ulong *arg_ptr, arg_addr; - arg_ptr = lock_user(VERIFY_READ, arg_ptr_addr, sizeof(abi_ulong), 1); + arg_ptr = lock_user(VERIFY_READ, arg_ptr_addr, sizeof(abi_ulong), 1); if (!arg_ptr) return; arg_addr = tswapal(*arg_ptr); - unlock_user(arg_ptr, arg_ptr_addr, 0); + unlock_user(arg_ptr, arg_ptr_addr, 0); if (!arg_addr) break; if ((s = lock_user_string(arg_addr))) { diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 280137da8c..b5786d4fc1 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -902,7 +902,7 @@ abi_long do_brk(abi_ulong new_brk) } target_brk = new_brk; DEBUGF_BRK(TARGET_ABI_FMT_lx " (new_brk <= brk_page)\n", target_brk); - return target_brk; + return target_brk; } /* We need to allocate more memory after the brk... Note that @@ -2352,6 +2352,45 @@ static abi_long do_getsockopt(int sockfd, int level, int optname, break; } break; + case SOL_IPV6: + switch (optname) { + case IPV6_MTU_DISCOVER: + case IPV6_MTU: + case IPV6_V6ONLY: + case IPV6_RECVPKTINFO: + case IPV6_UNICAST_HOPS: + case IPV6_MULTICAST_HOPS: + case IPV6_MULTICAST_LOOP: + case IPV6_RECVERR: + case IPV6_RECVHOPLIMIT: + case IPV6_2292HOPLIMIT: + case IPV6_CHECKSUM: + if (get_user_u32(len, optlen)) + return -TARGET_EFAULT; + if (len < 0) + return -TARGET_EINVAL; + lv = sizeof(lv); + ret = get_errno(getsockopt(sockfd, level, optname, &val, &lv)); + if (ret < 0) + return ret; + if (len < sizeof(int) && len > 0 && val >= 0 && val < 255) { + len = 1; + if (put_user_u32(len, optlen) + || put_user_u8(val, optval_addr)) + return -TARGET_EFAULT; + } else { + if (len > sizeof(int)) + len = sizeof(int); + if (put_user_u32(len, optlen) + || put_user_u32(val, optval_addr)) + return -TARGET_EFAULT; + } + break; + default: + ret = -TARGET_ENOPROTOOPT; + break; + } + break; default: unimplemented: gemu_log("getsockopt level=%d optname=%d not yet supported\n", @@ -9677,8 +9716,15 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1, arg4 = arg5; arg5 = arg6; } - if (!(p = lock_user(VERIFY_WRITE, arg2, arg3, 0))) - return -TARGET_EFAULT; + if (arg2 == 0 && arg3 == 0) { + /* Special-case NULL buffer and zero length, which should succeed */ + p = 0; + } else { + p = lock_user(VERIFY_WRITE, arg2, arg3, 0); + if (!p) { + return -TARGET_EFAULT; + } + } ret = get_errno(pread64(arg1, p, arg3, target_offset64(arg4, arg5))); unlock_user(p, arg2, ret); return ret; @@ -9687,8 +9733,15 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1, arg4 = arg5; arg5 = arg6; } - if (!(p = lock_user(VERIFY_READ, arg2, arg3, 1))) - return -TARGET_EFAULT; + if (arg2 == 0 && arg3 == 0) { + /* Special-case NULL buffer and zero length, which should succeed */ + p = 0; + } else { + p = lock_user(VERIFY_READ, arg2, arg3, 1); + if (!p) { + return -TARGET_EFAULT; + } + } ret = get_errno(pwrite64(arg1, p, arg3, target_offset64(arg4, arg5))); unlock_user(p, arg2, 0); return ret; diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index 99bbce083c..12c8407144 100644 --- a/linux-user/syscall_defs.h +++ b/linux-user/syscall_defs.h @@ -1807,7 +1807,7 @@ struct target_stat { abi_ulong st_rdev; abi_long st_size; abi_long st_blksize; - abi_long st_blocks; /* Number 512-byte blocks allocated. */ + abi_long st_blocks; /* Number 512-byte blocks allocated. */ abi_ulong target_st_atime; abi_ulong target_st_atime_nsec; @@ -1816,7 +1816,7 @@ struct target_stat { abi_ulong target_st_ctime; abi_ulong target_st_ctime_nsec; - abi_long __unused[3]; + abi_long __unused[3]; }; #elif defined(TARGET_S390X) struct target_stat { diff --git a/linux-user/uaccess.c b/linux-user/uaccess.c index 0a5c0b0b29..e215ecc2a6 100644 --- a/linux-user/uaccess.c +++ b/linux-user/uaccess.c @@ -30,7 +30,7 @@ abi_long copy_to_user(abi_ulong gaddr, void *hptr, size_t len) if ((ghptr = lock_user(VERIFY_WRITE, gaddr, len, 0))) { memcpy(ghptr, hptr, len); - unlock_user(ghptr, gaddr, len); + unlock_user(ghptr, gaddr, len); } else ret = -TARGET_EFAULT; diff --git a/linux-user/vm86.c b/linux-user/vm86.c index 3829b9a677..9c393df424 100644 --- a/linux-user/vm86.c +++ b/linux-user/vm86.c @@ -257,7 +257,7 @@ void handle_vm86_trap(CPUX86State *env, int trapno) #define CHECK_IF_IN_TRAP() \ if ((ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_active) && \ (ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_TFpendig)) \ - newflags |= TF_MASK + newflags |= TF_MASK #define VM86_FAULT_RETURN \ if ((ts->vm86plus.vm86plus.flags & TARGET_force_return_for_pic) && \ diff --git a/linux-user/x86_64/target_syscall.h b/linux-user/x86_64/target_syscall.h index 983fb23d9b..5e221e1d9d 100644 --- a/linux-user/x86_64/target_syscall.h +++ b/linux-user/x86_64/target_syscall.h @@ -12,7 +12,7 @@ struct target_pt_regs { abi_ulong rbp; abi_ulong rbx; /* arguments: non interrupts/non tracing syscalls only save up to here */ - abi_ulong r11; + abi_ulong r11; abi_ulong r10; abi_ulong r9; abi_ulong r8; diff --git a/memory.c b/memory.c index d14c6dec1d..61d66e4441 100644 --- a/memory.c +++ b/memory.c @@ -39,7 +39,7 @@ static bool memory_region_update_pending; static bool ioeventfd_update_pending; static bool global_dirty_log = false; -static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners +static QTAILQ_HEAD(, MemoryListener) memory_listeners = QTAILQ_HEAD_INITIALIZER(memory_listeners); static QTAILQ_HEAD(, AddressSpace) address_spaces @@ -113,8 +113,7 @@ enum ListenerDirection { Forward, Reverse }; } \ break; \ case Reverse: \ - QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ - memory_listeners, link) { \ + QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \ if (_listener->_callback) { \ _listener->_callback(_listener, ##_args); \ } \ @@ -128,19 +127,17 @@ enum ListenerDirection { Forward, Reverse }; #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \ do { \ MemoryListener *_listener; \ - struct memory_listeners_as *list = &(_as)->listeners; \ \ switch (_direction) { \ case Forward: \ - QTAILQ_FOREACH(_listener, list, link_as) { \ + QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \ if (_listener->_callback) { \ _listener->_callback(_listener, _section, ##_args); \ } \ } \ break; \ case Reverse: \ - QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \ - link_as) { \ + QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \ if (_listener->_callback) { \ _listener->_callback(_listener, _section, ##_args); \ } \ @@ -217,6 +214,7 @@ struct FlatRange { bool romd_mode; bool readonly; bool nonvolatile; + int has_coalesced_range; }; #define FOR_EACH_FLAT_RANGE(var, view) \ @@ -650,6 +648,7 @@ static void render_memory_region(FlatView *view, fr.romd_mode = mr->romd_mode; fr.readonly = readonly; fr.nonvolatile = nonvolatile; + fr.has_coalesced_range = 0; /* Render the region itself into any gaps left by the current view. */ for (i = 0; i < view->nr && int128_nz(remain); ++i) { @@ -850,6 +849,49 @@ static void address_space_update_ioeventfds(AddressSpace *as) flatview_unref(view); } +static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as) +{ + if (!fr->has_coalesced_range) { + return; + } + + if (--fr->has_coalesced_range > 0) { + return; + } + + MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del, + int128_get64(fr->addr.start), + int128_get64(fr->addr.size)); +} + +static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as) +{ + MemoryRegion *mr = fr->mr; + CoalescedMemoryRange *cmr; + AddrRange tmp; + + if (QTAILQ_EMPTY(&mr->coalesced)) { + return; + } + + if (fr->has_coalesced_range++) { + return; + } + + QTAILQ_FOREACH(cmr, &mr->coalesced, link) { + tmp = addrrange_shift(cmr->addr, + int128_sub(fr->addr.start, + int128_make64(fr->offset_in_region))); + if (!addrrange_intersects(tmp, fr->addr)) { + continue; + } + tmp = addrrange_intersection(tmp, fr->addr); + MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add, + int128_get64(tmp.start), + int128_get64(tmp.size)); + } +} + static void address_space_update_topology_pass(AddressSpace *as, const FlatView *old_view, const FlatView *new_view, @@ -882,6 +924,7 @@ static void address_space_update_topology_pass(AddressSpace *as, /* In old but not in new, or in both but attributes changed. */ if (!adding) { + flat_range_coalesced_io_del(frold, as); MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); } @@ -889,7 +932,9 @@ static void address_space_update_topology_pass(AddressSpace *as, } else if (frold && frnew && flatrange_equal(frold, frnew)) { /* In both and unchanged (except logging may have changed) */ - if (adding) { + if (!adding) { + flat_range_coalesced_io_del(frold, as); + } else { MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); if (frnew->dirty_log_mask & ~frold->dirty_log_mask) { MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start, @@ -901,6 +946,7 @@ static void address_space_update_topology_pass(AddressSpace *as, frold->dirty_log_mask, frnew->dirty_log_mask); } + flat_range_coalesced_io_add(frnew, as); } ++iold; @@ -910,6 +956,7 @@ static void address_space_update_topology_pass(AddressSpace *as, if (adding) { MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); + flat_range_coalesced_io_add(frnew, as); } ++inew; @@ -2136,34 +2183,12 @@ static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpa { FlatView *view; FlatRange *fr; - CoalescedMemoryRange *cmr; - AddrRange tmp; - MemoryRegionSection section; view = address_space_get_flatview(as); FOR_EACH_FLAT_RANGE(fr, view) { if (fr->mr == mr) { - section = (MemoryRegionSection) { - .fv = view, - .offset_within_address_space = int128_get64(fr->addr.start), - .size = fr->addr.size, - }; - - MEMORY_LISTENER_CALL(as, coalesced_io_del, Reverse, §ion, - int128_get64(fr->addr.start), - int128_get64(fr->addr.size)); - QTAILQ_FOREACH(cmr, &mr->coalesced, link) { - tmp = addrrange_shift(cmr->addr, - int128_sub(fr->addr.start, - int128_make64(fr->offset_in_region))); - if (!addrrange_intersects(tmp, fr->addr)) { - continue; - } - tmp = addrrange_intersection(tmp, fr->addr); - MEMORY_LISTENER_CALL(as, coalesced_io_add, Forward, §ion, - int128_get64(tmp.start), - int128_get64(tmp.size)); - } + flat_range_coalesced_io_del(fr, as); + flat_range_coalesced_io_add(fr, as); } } flatview_unref(view); @@ -2663,8 +2688,7 @@ void memory_listener_register(MemoryListener *listener, AddressSpace *as) listener->address_space = as; if (QTAILQ_EMPTY(&memory_listeners) - || listener->priority >= QTAILQ_LAST(&memory_listeners, - memory_listeners)->priority) { + || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) { QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); } else { QTAILQ_FOREACH(other, &memory_listeners, link) { @@ -2676,8 +2700,7 @@ void memory_listener_register(MemoryListener *listener, AddressSpace *as) } if (QTAILQ_EMPTY(&as->listeners) - || listener->priority >= QTAILQ_LAST(&as->listeners, - memory_listeners)->priority) { + || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) { QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as); } else { QTAILQ_FOREACH(other, &as->listeners, link_as) { @@ -2767,7 +2790,7 @@ struct MemoryRegionList { QTAILQ_ENTRY(MemoryRegionList) mrqueue; }; -typedef QTAILQ_HEAD(mrqueue, MemoryRegionList) MemoryRegionListHead; +typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead; #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \ int128_sub((size), int128_one())) : 0) diff --git a/memory_mapping.c b/memory_mapping.c index 724dd0b417..e3ec70624f 100644 --- a/memory_mapping.c +++ b/memory_mapping.c @@ -223,7 +223,7 @@ static void guest_phys_blocks_region_add(MemoryListener *listener, if (!QTAILQ_EMPTY(&g->list->head)) { hwaddr predecessor_size; - predecessor = QTAILQ_LAST(&g->list->head, GuestPhysBlockHead); + predecessor = QTAILQ_LAST(&g->list->head); predecessor_size = predecessor->target_end - predecessor->target_start; /* the memory API guarantees monotonically increasing traversal */ diff --git a/migration/block-dirty-bitmap.c b/migration/block-dirty-bitmap.c index 5e90f44c2f..6426151e4f 100644 --- a/migration/block-dirty-bitmap.c +++ b/migration/block-dirty-bitmap.c @@ -116,7 +116,7 @@ typedef struct DirtyBitmapMigBitmapState { } DirtyBitmapMigBitmapState; typedef struct DirtyBitmapMigState { - QSIMPLEQ_HEAD(dbms_list, DirtyBitmapMigBitmapState) dbms_list; + QSIMPLEQ_HEAD(, DirtyBitmapMigBitmapState) dbms_list; bool bulk_completed; bool no_bitmaps; diff --git a/migration/block.c b/migration/block.c index 4c04d937b1..0e24e18d13 100644 --- a/migration/block.c +++ b/migration/block.c @@ -93,12 +93,12 @@ typedef struct BlkMigBlock { } BlkMigBlock; typedef struct BlkMigState { - QSIMPLEQ_HEAD(bmds_list, BlkMigDevState) bmds_list; + QSIMPLEQ_HEAD(, BlkMigDevState) bmds_list; int64_t total_sector_sum; bool zero_blocks; /* Protected by lock. */ - QSIMPLEQ_HEAD(blk_list, BlkMigBlock) blk_list; + QSIMPLEQ_HEAD(, BlkMigBlock) blk_list; int submitted; int read_done; diff --git a/migration/ram.c b/migration/ram.c index 7e7deec4d8..1849979fed 100644 --- a/migration/ram.c +++ b/migration/ram.c @@ -322,7 +322,7 @@ struct RAMState { RAMBlock *last_req_rb; /* Queue of outstanding page requests from the destination */ QemuMutex src_page_req_mutex; - QSIMPLEQ_HEAD(src_page_requests, RAMSrcPageRequest) src_page_requests; + QSIMPLEQ_HEAD(, RAMSrcPageRequest) src_page_requests; }; typedef struct RAMState RAMState; diff --git a/monitor.c b/monitor.c index 0ad54d8b11..eb39fb015b 100644 --- a/monitor.c +++ b/monitor.c @@ -266,12 +266,12 @@ typedef struct QMPRequest QMPRequest; /* Protects mon_list, monitor_qapi_event_state, monitor_destroyed. */ static QemuMutex monitor_lock; static GHashTable *monitor_qapi_event_state; -static QTAILQ_HEAD(mon_list, Monitor) mon_list; +static QTAILQ_HEAD(, Monitor) mon_list; static bool monitor_destroyed; /* Protects mon_fdsets */ static QemuMutex mon_fdsets_lock; -static QLIST_HEAD(mon_fdsets, MonFdset) mon_fdsets; +static QLIST_HEAD(, MonFdset) mon_fdsets; static int mon_refcount; diff --git a/net/checksum.c b/net/checksum.c index 4da72a6a6c..273bc9c6bc 100644 --- a/net/checksum.c +++ b/net/checksum.c @@ -43,7 +43,7 @@ uint32_t net_checksum_add_cont(int len, uint8_t *buf, int seq) uint16_t net_checksum_finish(uint32_t sum) { while (sum>>16) - sum = (sum & 0xFFFF)+(sum >> 16); + sum = (sum & 0xFFFF)+(sum >> 16); return ~sum; } diff --git a/net/filter.c b/net/filter.c index c9f9e5fa08..28d1930db7 100644 --- a/net/filter.c +++ b/net/filter.c @@ -55,7 +55,7 @@ static NetFilterState *netfilter_next(NetFilterState *nf, next = QTAILQ_NEXT(nf, next); } else { /* reverse order */ - next = QTAILQ_PREV(nf, NetFilterHead, next); + next = QTAILQ_PREV(nf, next); } return next; diff --git a/net/net.c b/net/net.c index 1f7d626197..3acbdccd61 100644 --- a/net/net.c +++ b/net/net.c @@ -563,7 +563,7 @@ static ssize_t filter_receive_iov(NetClientState *nc, } } } else { - QTAILQ_FOREACH_REVERSE(nf, &nc->filters, NetFilterHead, next) { + QTAILQ_FOREACH_REVERSE(nf, &nc->filters, next) { ret = qemu_netfilter_receive(nf, direction, sender, flags, iov, iovcnt, sent_cb); if (ret) { diff --git a/net/queue.c b/net/queue.c index 9c32abdb8f..61276ca4be 100644 --- a/net/queue.c +++ b/net/queue.c @@ -55,7 +55,7 @@ struct NetQueue { uint32_t nq_count; NetQueueDeliverFunc *deliver; - QTAILQ_HEAD(packets, NetPacket) packets; + QTAILQ_HEAD(, NetPacket) packets; unsigned delivering : 1; }; diff --git a/net/slirp.c b/net/slirp.c index f6dc03963a..38ae65e4a9 100644 --- a/net/slirp.c +++ b/net/slirp.c @@ -85,7 +85,7 @@ typedef struct SlirpState { } SlirpState; static struct slirp_config_str *slirp_configs; -static QTAILQ_HEAD(slirp_stacks, SlirpState) slirp_stacks = +static QTAILQ_HEAD(, SlirpState) slirp_stacks = QTAILQ_HEAD_INITIALIZER(slirp_stacks); static int slirp_hostfwd(SlirpState *s, const char *redir_str, Error **errp); diff --git a/pc-bios/keymaps/common b/pc-bios/keymaps/common deleted file mode 100644 index adc56c77d2..0000000000 --- a/pc-bios/keymaps/common +++ /dev/null @@ -1,157 +0,0 @@ -include modifiers - -# -# Top row -# -1 0x2 -2 0x3 -3 0x4 -4 0x5 -5 0x6 -6 0x7 -7 0x8 -8 0x9 -9 0xa -0 0xb -BackSpace 0xe - -# -# QWERTY first row -# -Tab 0xf localstate -ISO_Left_Tab 0xf shift -q 0x10 addupper -w 0x11 addupper -e 0x12 addupper -r 0x13 addupper -t 0x14 addupper -y 0x15 addupper -u 0x16 addupper -i 0x17 addupper -o 0x18 addupper -p 0x19 addupper - -# -# QWERTY second row -# -a 0x1e addupper -s 0x1f addupper -d 0x20 addupper -f 0x21 addupper -g 0x22 addupper -h 0x23 addupper -j 0x24 addupper -k 0x25 addupper -l 0x26 addupper -Return 0x1c localstate - -# -# QWERTY third row -# -z 0x2c addupper -x 0x2d addupper -c 0x2e addupper -v 0x2f addupper -b 0x30 addupper -n 0x31 addupper -m 0x32 addupper - -space 0x39 localstate - -less 0x56 -greater 0x56 shift -bar 0x56 altgr -brokenbar 0x56 shift altgr - -# -# Esc and Function keys -# -Escape 0x1 localstate -F1 0x3b localstate -F2 0x3c localstate -F3 0x3d localstate -F4 0x3e localstate -F5 0x3f localstate -F6 0x40 localstate -F7 0x41 localstate -F8 0x42 localstate -F9 0x43 localstate -F10 0x44 localstate -F11 0x57 localstate -F12 0x58 localstate - -# Printscreen, Scrollock and Pause -# Printscreen really requires four scancodes (0xe0, 0x2a, 0xe0, 0x37), -# but (0xe0, 0x37) seems to work. -Print 0xb7 localstate -Sys_Req 0xb7 localstate -Execute 0xb7 localstate -Scroll_Lock 0x46 - -# -# Insert - PgDown -# -Insert 0xd2 localstate -Delete 0xd3 localstate -Home 0xc7 localstate -End 0xcf localstate -Page_Up 0xc9 localstate -Page_Down 0xd1 localstate - -# -# Arrow keys -# -Left 0xcb localstate -Up 0xc8 localstate -Down 0xd0 localstate -Right 0xcd localstate - -# -# Numpad -# -Num_Lock 0x45 -KP_Divide 0xb5 -KP_Multiply 0x37 -KP_Subtract 0x4a -KP_Add 0x4e -KP_Enter 0x9c - -KP_Decimal 0x53 numlock -KP_Separator 0x53 numlock -KP_Delete 0x53 - -KP_0 0x52 numlock -KP_Insert 0x52 - -KP_1 0x4f numlock -KP_End 0x4f - -KP_2 0x50 numlock -KP_Down 0x50 - -KP_3 0x51 numlock -KP_Next 0x51 - -KP_4 0x4b numlock -KP_Left 0x4b - -KP_5 0x4c numlock -KP_Begin 0x4c - -KP_6 0x4d numlock -KP_Right 0x4d - -KP_7 0x47 numlock -KP_Home 0x47 - -KP_8 0x48 numlock -KP_Up 0x48 - -KP_9 0x49 numlock -KP_Prior 0x49 - -Caps_Lock 0x3a -# -# Inhibited keys -# -Multi_key 0x0 inhibit diff --git a/pc-bios/keymaps/modifiers b/pc-bios/keymaps/modifiers deleted file mode 100644 index d73b7a6637..0000000000 --- a/pc-bios/keymaps/modifiers +++ /dev/null @@ -1,18 +0,0 @@ -Shift_R 0x36 -Shift_L 0x2a - -Alt_R 0xb8 -Mode_switch 0xb8 -ISO_Level3_Shift 0xb8 -Alt_L 0x38 - -Control_R 0x9d -Control_L 0x1d - -# Translate Super to Windows keys. -# This is hardcoded. See documentation for details. -Super_R 0xdc -Super_L 0xdb - -# Translate Menu to the Windows Application key. -Menu 0xdd diff --git a/pc-bios/keymaps/nl-be b/pc-bios/keymaps/nl-be deleted file mode 100644 index 34fc881ad0..0000000000 --- a/pc-bios/keymaps/nl-be +++ /dev/null @@ -1,3 +0,0 @@ -# Dutch (Belgium) -map 0x813 -include common diff --git a/pc-bios/keymaps/sl b/pc-bios/keymaps/sl index 56835a92c3..73eb956d04 100644 --- a/pc-bios/keymaps/sl +++ b/pc-bios/keymaps/sl @@ -1,5 +1,180 @@ # generated from XKB map sl -include common + +Shift_R 0x36 +Shift_L 0x2a + +Alt_R 0xb8 +Mode_switch 0xb8 +ISO_Level3_Shift 0xb8 +Alt_L 0x38 + +Control_R 0x9d +Control_L 0x1d + +# Translate Super to Windows keys. +# This is hardcoded. See documentation for details. +Super_R 0xdc +Super_L 0xdb + +# Translate Menu to the Windows Application key. +Menu 0xdd + +# +# Top row +# +1 0x2 +2 0x3 +3 0x4 +4 0x5 +5 0x6 +6 0x7 +7 0x8 +8 0x9 +9 0xa +0 0xb +BackSpace 0xe + +# +# QWERTY first row +# +Tab 0xf localstate +ISO_Left_Tab 0xf shift +q 0x10 addupper +w 0x11 addupper +e 0x12 addupper +r 0x13 addupper +t 0x14 addupper +y 0x15 addupper +u 0x16 addupper +i 0x17 addupper +o 0x18 addupper +p 0x19 addupper + +# +# QWERTY second row +# +a 0x1e addupper +s 0x1f addupper +d 0x20 addupper +f 0x21 addupper +g 0x22 addupper +h 0x23 addupper +j 0x24 addupper +k 0x25 addupper +l 0x26 addupper +Return 0x1c localstate + +# +# QWERTY third row +# +z 0x2c addupper +x 0x2d addupper +c 0x2e addupper +v 0x2f addupper +b 0x30 addupper +n 0x31 addupper +m 0x32 addupper + +space 0x39 localstate + +less 0x56 +greater 0x56 shift +bar 0x56 altgr +brokenbar 0x56 shift altgr + +# +# Esc and Function keys +# +Escape 0x1 localstate +F1 0x3b localstate +F2 0x3c localstate +F3 0x3d localstate +F4 0x3e localstate +F5 0x3f localstate +F6 0x40 localstate +F7 0x41 localstate +F8 0x42 localstate +F9 0x43 localstate +F10 0x44 localstate +F11 0x57 localstate +F12 0x58 localstate + +# Printscreen, Scrollock and Pause +# Printscreen really requires four scancodes (0xe0, 0x2a, 0xe0, 0x37), +# but (0xe0, 0x37) seems to work. +Print 0xb7 localstate +Sys_Req 0xb7 localstate +Execute 0xb7 localstate +Scroll_Lock 0x46 + +# +# Insert - PgDown +# +Insert 0xd2 localstate +Delete 0xd3 localstate +Home 0xc7 localstate +End 0xcf localstate +Page_Up 0xc9 localstate +Page_Down 0xd1 localstate + +# +# Arrow keys +# +Left 0xcb localstate +Up 0xc8 localstate +Down 0xd0 localstate +Right 0xcd localstate + +# +# Numpad +# +Num_Lock 0x45 +KP_Divide 0xb5 +KP_Multiply 0x37 +KP_Subtract 0x4a +KP_Add 0x4e +KP_Enter 0x9c + +KP_Decimal 0x53 numlock +KP_Separator 0x53 numlock +KP_Delete 0x53 + +KP_0 0x52 numlock +KP_Insert 0x52 + +KP_1 0x4f numlock +KP_End 0x4f + +KP_2 0x50 numlock +KP_Down 0x50 + +KP_3 0x51 numlock +KP_Next 0x51 + +KP_4 0x4b numlock +KP_Left 0x4b + +KP_5 0x4c numlock +KP_Begin 0x4c + +KP_6 0x4d numlock +KP_Right 0x4d + +KP_7 0x47 numlock +KP_Home 0x47 + +KP_8 0x48 numlock +KP_Up 0x48 + +KP_9 0x49 numlock +KP_Prior 0x49 + +Caps_Lock 0x3a +# +# Inhibited keys +# +Multi_key 0x0 inhibit + map 0x424 exclam 0x02 shift asciitilde 0x02 altgr diff --git a/pc-bios/keymaps/sv b/pc-bios/keymaps/sv index 5d9080eff1..0717b7114f 100644 --- a/pc-bios/keymaps/sv +++ b/pc-bios/keymaps/sv @@ -1,5 +1,179 @@ map 0x0000041d -include common + +Shift_R 0x36 +Shift_L 0x2a + +Alt_R 0xb8 +Mode_switch 0xb8 +ISO_Level3_Shift 0xb8 +Alt_L 0x38 + +Control_R 0x9d +Control_L 0x1d + +# Translate Super to Windows keys. +# This is hardcoded. See documentation for details. +Super_R 0xdc +Super_L 0xdb + +# Translate Menu to the Windows Application key. +Menu 0xdd + +# +# Top row +# +1 0x2 +2 0x3 +3 0x4 +4 0x5 +5 0x6 +6 0x7 +7 0x8 +8 0x9 +9 0xa +0 0xb +BackSpace 0xe + +# +# QWERTY first row +# +Tab 0xf localstate +ISO_Left_Tab 0xf shift +q 0x10 addupper +w 0x11 addupper +e 0x12 addupper +r 0x13 addupper +t 0x14 addupper +y 0x15 addupper +u 0x16 addupper +i 0x17 addupper +o 0x18 addupper +p 0x19 addupper + +# +# QWERTY second row +# +a 0x1e addupper +s 0x1f addupper +d 0x20 addupper +f 0x21 addupper +g 0x22 addupper +h 0x23 addupper +j 0x24 addupper +k 0x25 addupper +l 0x26 addupper +Return 0x1c localstate + +# +# QWERTY third row +# +z 0x2c addupper +x 0x2d addupper +c 0x2e addupper +v 0x2f addupper +b 0x30 addupper +n 0x31 addupper +m 0x32 addupper + +space 0x39 localstate + +less 0x56 +greater 0x56 shift +bar 0x56 altgr +brokenbar 0x56 shift altgr + +# +# Esc and Function keys +# +Escape 0x1 localstate +F1 0x3b localstate +F2 0x3c localstate +F3 0x3d localstate +F4 0x3e localstate +F5 0x3f localstate +F6 0x40 localstate +F7 0x41 localstate +F8 0x42 localstate +F9 0x43 localstate +F10 0x44 localstate +F11 0x57 localstate +F12 0x58 localstate + +# Printscreen, Scrollock and Pause +# Printscreen really requires four scancodes (0xe0, 0x2a, 0xe0, 0x37), +# but (0xe0, 0x37) seems to work. +Print 0xb7 localstate +Sys_Req 0xb7 localstate +Execute 0xb7 localstate +Scroll_Lock 0x46 + +# +# Insert - PgDown +# +Insert 0xd2 localstate +Delete 0xd3 localstate +Home 0xc7 localstate +End 0xcf localstate +Page_Up 0xc9 localstate +Page_Down 0xd1 localstate + +# +# Arrow keys +# +Left 0xcb localstate +Up 0xc8 localstate +Down 0xd0 localstate +Right 0xcd localstate + +# +# Numpad +# +Num_Lock 0x45 +KP_Divide 0xb5 +KP_Multiply 0x37 +KP_Subtract 0x4a +KP_Add 0x4e +KP_Enter 0x9c + +KP_Decimal 0x53 numlock +KP_Separator 0x53 numlock +KP_Delete 0x53 + +KP_0 0x52 numlock +KP_Insert 0x52 + +KP_1 0x4f numlock +KP_End 0x4f + +KP_2 0x50 numlock +KP_Down 0x50 + +KP_3 0x51 numlock +KP_Next 0x51 + +KP_4 0x4b numlock +KP_Left 0x4b + +KP_5 0x4c numlock +KP_Begin 0x4c + +KP_6 0x4d numlock +KP_Right 0x4d + +KP_7 0x47 numlock +KP_Home 0x47 + +KP_8 0x48 numlock +KP_Up 0x48 + +KP_9 0x49 numlock +KP_Prior 0x49 + +Caps_Lock 0x3a +# +# Inhibited keys +# +Multi_key 0x0 inhibit # # Top row diff --git a/qemu-deprecated.texi b/qemu-deprecated.texi index c3735b698e..81de5fc019 100644 --- a/qemu-deprecated.texi +++ b/qemu-deprecated.texi @@ -106,14 +106,20 @@ The ``query-cpus'' command is replaced by the ``query-cpus-fast'' command. The ``arch'' output member of the ``query-cpus-fast'' command is replaced by the ``target'' output member. -@section System emulator human monitor commands +@subsection cpu-add (since 4.0) + +Use ``device_add'' for hotplugging vCPUs instead of ``cpu-add''. See +documentation of ``query-hotpluggable-cpus'' for additional +details. + +@section Human Monitor Protocol (HMP) commands @subsection The hub_id parameter of 'hostfwd_add' / 'hostfwd_remove' (since 3.1) The @option{[hub_id name]} parameter tuple of the 'hostfwd_add' and 'hostfwd_remove' HMP commands has been replaced by @option{netdev_id}. -@subsection cpu-add (since 3.1) +@subsection cpu-add (since 4.0) Use ``device_add'' for hotplugging vCPUs instead of ``cpu-add''. See documentation of ``query-hotpluggable-cpus'' for additional details. diff --git a/qga/commands-posix.c b/qga/commands-posix.c index 2e719d9b6b..7ee6a33cce 100644 --- a/qga/commands-posix.c +++ b/qga/commands-posix.c @@ -1291,7 +1291,7 @@ int64_t qmp_guest_fsfreeze_freeze_list(bool has_mountpoints, /* cannot risk guest agent blocking itself on a write in this state */ ga_set_frozen(ga_state); - QTAILQ_FOREACH_REVERSE(mount, &mounts, FsMountList, next) { + QTAILQ_FOREACH_REVERSE(mount, &mounts, next) { /* To issue fsfreeze in the reverse order of mounts, check if the * mount is listed in the list here */ if (has_mountpoints) { diff --git a/qga/commands-win32.c b/qga/commands-win32.c index 62e1b51dfe..989b93e702 100644 --- a/qga/commands-win32.c +++ b/qga/commands-win32.c @@ -10,12 +10,8 @@ * This work is licensed under the terms of the GNU GPL, version 2 or later. * See the COPYING file in the top-level directory. */ - -#ifndef _WIN32_WINNT -# define _WIN32_WINNT 0x0600 -#endif - #include "qemu/osdep.h" + #include <wtypes.h> #include <powrprof.h> #include <winsock2.h> @@ -470,13 +466,11 @@ static STORAGE_BUS_TYPE win2qemu[] = { [BusTypeFibre] = GUEST_DISK_BUS_TYPE_SSA, [BusTypeUsb] = GUEST_DISK_BUS_TYPE_USB, [BusTypeRAID] = GUEST_DISK_BUS_TYPE_RAID, -#if (_WIN32_WINNT >= 0x0600) [BusTypeiScsi] = GUEST_DISK_BUS_TYPE_ISCSI, [BusTypeSas] = GUEST_DISK_BUS_TYPE_SAS, [BusTypeSata] = GUEST_DISK_BUS_TYPE_SATA, [BusTypeSd] = GUEST_DISK_BUS_TYPE_SD, [BusTypeMmc] = GUEST_DISK_BUS_TYPE_MMC, -#endif #if (_WIN32_WINNT >= 0x0601) [BusTypeVirtual] = GUEST_DISK_BUS_TYPE_VIRTUAL, [BusTypeFileBackedVirtual] = GUEST_DISK_BUS_TYPE_FILE_BACKED_VIRTUAL, @@ -728,10 +722,8 @@ static void get_single_disk_info(GuestDiskAddress *disk, Error **errp) if (disk->bus_type == GUEST_DISK_BUS_TYPE_SCSI || disk->bus_type == GUEST_DISK_BUS_TYPE_IDE || disk->bus_type == GUEST_DISK_BUS_TYPE_RAID -#if (_WIN32_WINNT >= 0x0600) /* This bus type is not supported before Windows Server 2003 SP1 */ || disk->bus_type == GUEST_DISK_BUS_TYPE_SAS -#endif ) { /* We are able to use the same ioctls for different bus types * according to Microsoft docs @@ -1326,7 +1318,6 @@ static char *guest_addr_to_str(IP_ADAPTER_UNICAST_ADDRESS *ip_addr, return NULL; } -#if (_WIN32_WINNT >= 0x0600) static int64_t guest_ip_prefix(IP_ADAPTER_UNICAST_ADDRESS *ip_addr) { /* For Windows Vista/2008 and newer, use the OnLinkPrefixLength @@ -1334,60 +1325,6 @@ static int64_t guest_ip_prefix(IP_ADAPTER_UNICAST_ADDRESS *ip_addr) */ return ip_addr->OnLinkPrefixLength; } -#else -/* When using the Windows XP and 2003 build environment, do the best we can to - * figure out the prefix. - */ -static IP_ADAPTER_INFO *guest_get_adapters_info(void) -{ - IP_ADAPTER_INFO *adptr_info = NULL; - ULONG adptr_info_len = 0; - DWORD ret; - - /* Call the first time to get the adptr_info_len. */ - GetAdaptersInfo(adptr_info, &adptr_info_len); - - adptr_info = g_malloc(adptr_info_len); - ret = GetAdaptersInfo(adptr_info, &adptr_info_len); - if (ret != ERROR_SUCCESS) { - g_free(adptr_info); - adptr_info = NULL; - } - return adptr_info; -} - -static int64_t guest_ip_prefix(IP_ADAPTER_UNICAST_ADDRESS *ip_addr) -{ - int64_t prefix = -1; /* Use for AF_INET6 and unknown/undetermined values. */ - IP_ADAPTER_INFO *adptr_info, *info; - IP_ADDR_STRING *ip; - struct in_addr *p; - - if (ip_addr->Address.lpSockaddr->sa_family != AF_INET) { - return prefix; - } - adptr_info = guest_get_adapters_info(); - if (adptr_info == NULL) { - return prefix; - } - - /* Match up the passed in ip_addr with one found in adaptr_info. - * The matching one in adptr_info will have the netmask. - */ - p = &((struct sockaddr_in *)ip_addr->Address.lpSockaddr)->sin_addr; - for (info = adptr_info; info; info = info->Next) { - for (ip = &info->IpAddressList; ip; ip = ip->Next) { - if (p->S_un.S_addr == inet_addr(ip->IpAddress.String)) { - prefix = ctpop32(inet_addr(ip->IpMask.String)); - goto out; - } - } - } -out: - g_free(adptr_info); - return prefix; -} -#endif #define INTERFACE_PATH_BUF_SZ 512 @@ -1908,7 +1845,6 @@ typedef struct _GA_WTSINFOA { GuestUserList *qmp_guest_get_users(Error **err) { -#if (_WIN32_WINNT >= 0x0600) #define QGA_NANOSECONDS 10000000 GHashTable *cache = NULL; @@ -1978,10 +1914,6 @@ GuestUserList *qmp_guest_get_users(Error **err) } g_hash_table_destroy(cache); return head; -#else - error_setg(err, QERR_UNSUPPORTED); - return NULL; -#endif } typedef struct _ga_matrix_lookup_t { diff --git a/qom/object.c b/qom/object.c index aa6f3a2a71..4e5226ca12 100644 --- a/qom/object.c +++ b/qom/object.c @@ -372,7 +372,6 @@ static void object_post_init_with_type(Object *obj, TypeImpl *ti) void object_apply_global_props(Object *obj, const GPtrArray *props, Error **errp) { - Error *err = NULL; int i; if (!props) { @@ -381,6 +380,7 @@ void object_apply_global_props(Object *obj, const GPtrArray *props, Error **errp for (i = 0; i < props->len; i++) { GlobalProperty *p = g_ptr_array_index(props, i); + Error *err = NULL; if (object_dynamic_cast(obj, p->driver) == NULL) { continue; diff --git a/qtest.c b/qtest.c index 451696b5da..60988c8aa2 100644 --- a/qtest.c +++ b/qtest.c @@ -301,7 +301,7 @@ static void qtest_process_command(CharBackend *chr, gchar **words) if (!dev) { qtest_send_prefix(chr); qtest_send(chr, "FAIL Unknown device\n"); - return; + return; } if (irq_intercept_dev) { @@ -311,7 +311,7 @@ static void qtest_process_command(CharBackend *chr, gchar **words) } else { qtest_send(chr, "OK\n"); } - return; + return; } QLIST_FOREACH(ngl, &dev->gpios, node) { diff --git a/roms/Makefile b/roms/Makefile index f4141e1d96..a6043eff37 100644 --- a/roms/Makefile +++ b/roms/Makefile @@ -83,12 +83,12 @@ build-seabios-config-%: config.% cp $< seabios/builds/$*/.config $(MAKE) -C seabios \ EXTRAVERSION=$(SEABIOS_EXTRAVERSION) \ - CROSS_COMPILE=$(x86_64_cross_prefix) \ + CROSS_PREFIX=$(x86_64_cross_prefix) \ KCONFIG_CONFIG=$(CURDIR)/seabios/builds/$*/.config \ OUT=$(CURDIR)/seabios/builds/$*/ oldnoconfig $(MAKE) -C seabios \ EXTRAVERSION=$(SEABIOS_EXTRAVERSION) \ - CROSS_COMPILE=$(x86_64_cross_prefix) \ + CROSS_PREFIX=$(x86_64_cross_prefix) \ KCONFIG_CONFIG=$(CURDIR)/seabios/builds/$*/.config \ OUT=$(CURDIR)/seabios/builds/$*/ all diff --git a/rules.mak b/rules.mak index bbb2667928..86e033d815 100644 --- a/rules.mak +++ b/rules.mak @@ -132,7 +132,9 @@ modules: # otherwise print the 'quiet' output in the format " NAME args to print" # NAME should be a short name of the command, 7 letters or fewer. # If called with only a single argument, will print nothing in quiet mode. -quiet-command = $(if $(V),$1,$(if $(2),@printf " %-7s %s\n" $2 $3 && $1, @$1)) +quiet-command-run = $(if $(V),,$(if $2,printf " %-7s %s\n" $2 $3 && ))$1 +quiet-@ = $(if $(V),,@) +quiet-command = $(quiet-@)$(call quiet-command-run,$1,$2,$3) # cc-option # Usage: CFLAGS+=$(call cc-option, -falign-functions=0, -malign-functions=0) diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index 18e16b79df..d10dddf1be 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -7,6 +7,7 @@ use strict; use warnings; +use Term::ANSIColor qw(:constants); my $P = $0; $P =~ s@.*/@@g; @@ -26,6 +27,7 @@ my $tst_only; my $emacs = 0; my $terse = 0; my $file = undef; +my $color = "auto"; my $no_warnings = 0; my $summary = 1; my $mailback = 0; @@ -64,6 +66,8 @@ Options: is all off) --test-only=WORD report only warnings/errors containing WORD literally + --color[=WHEN] Use colors 'always', 'never', or only when output + is a terminal ('auto'). Default is 'auto'. -h, --help, --version display this help and exit When FILE is - read standard input. @@ -72,6 +76,14 @@ EOM exit($exitcode); } +# Perl's Getopt::Long allows options to take optional arguments after a space. +# Prevent --color by itself from consuming other arguments +foreach (@ARGV) { + if ($_ eq "--color" || $_ eq "-color") { + $_ = "--color=$color"; + } +} + GetOptions( 'q|quiet+' => \$quiet, 'tree!' => \$tree, @@ -89,6 +101,8 @@ GetOptions( 'debug=s' => \%debug, 'test-only=s' => \$tst_only, + 'color=s' => \$color, + 'no-color' => sub { $color = 'never'; }, 'h|help' => \$help, 'version' => \$help ) or help(1); @@ -144,6 +158,16 @@ if (!$chk_patch && !$chk_branch && !$file) { die "One of --file, --branch, --patch is required\n"; } +if ($color =~ /^always$/i) { + $color = 1; +} elsif ($color =~ /^never$/i) { + $color = 0; +} elsif ($color =~ /^auto$/i) { + $color = (-t STDOUT); +} else { + die "Invalid color mode: $color\n"; +} + my $dbg_values = 0; my $dbg_possible = 0; my $dbg_type = 0; @@ -339,13 +363,18 @@ my @lines = (); my $vname; if ($chk_branch) { my @patches; + my %git_commits = (); my $HASH; - open($HASH, "-|", "git", "log", "--format=%H", $ARGV[0]) || - die "$P: git log --format=%H $ARGV[0] failed - $!\n"; - - while (<$HASH>) { - chomp; - push @patches, $_; + open($HASH, "-|", "git", "log", "--reverse", "--no-merges", "--format=%H %s", $ARGV[0]) || + die "$P: git log --reverse --no-merges --format='%H %s' $ARGV[0] failed - $!\n"; + + for my $line (<$HASH>) { + $line =~ /^([0-9a-fA-F]{40,40}) (.*)$/; + next if (!defined($1) || !defined($2)); + my $sha1 = $1; + my $subject = $2; + push(@patches, $sha1); + $git_commits{$sha1} = $subject; } close $HASH; @@ -353,21 +382,33 @@ if ($chk_branch) { die "$P: no revisions returned for revlist '$chk_branch'\n" unless @patches; + my $i = 1; + my $num_patches = @patches; for my $hash (@patches) { my $FILE; open($FILE, '-|', "git", "show", $hash) || die "$P: git show $hash - $!\n"; - $vname = $hash; while (<$FILE>) { chomp; push(@rawlines, $_); } close($FILE); + $vname = substr($hash, 0, 12) . ' (' . $git_commits{$hash} . ')'; + if ($num_patches > 1 && $quiet == 0) { + my $prefix = "$i/$num_patches"; + $prefix = BLUE . BOLD . $prefix . RESET if $color; + print "$prefix Checking commit $vname\n"; + $vname = "Patch $i/$num_patches"; + } else { + $vname = "Commit " . $vname; + } if (!process($hash)) { $exit = 1; + print "\n" if ($num_patches > 1 && $quiet == 0); } @rawlines = (); @lines = (); + $i++; } } else { for my $filename (@ARGV) { @@ -386,6 +427,7 @@ if ($chk_branch) { } else { $vname = $filename; } + print "Checking $filename...\n" if @ARGV > 1 && $quiet == 0; while (<$FILE>) { chomp; push(@rawlines, $_); @@ -1165,14 +1207,23 @@ sub possible { my $prefix = ''; sub report { - if (defined $tst_only && $_[0] !~ /\Q$tst_only\E/) { + my ($level, $msg) = @_; + if (defined $tst_only && $msg !~ /\Q$tst_only\E/) { return 0; } - my $line = $prefix . $_[0]; - $line = (split('\n', $line))[0] . "\n" if ($terse); + my $output = ''; + $output .= BOLD if $color; + $output .= $prefix; + $output .= RED if $color && $level eq 'ERROR'; + $output .= MAGENTA if $color && $level eq 'WARNING'; + $output .= $level . ':'; + $output .= RESET if $color; + $output .= ' ' . $msg . "\n"; + + $output = (split('\n', $output))[0] . "\n" if ($terse); - push(our @report, $line); + push(our @report, $output); return 1; } @@ -1180,13 +1231,13 @@ sub report_dump { our @report; } sub ERROR { - if (report("ERROR: $_[0]\n")) { + if (report("ERROR", $_[0])) { our $clean = 0; our $cnt_error++; } } sub WARN { - if (report("WARNING: $_[0]\n")) { + if (report("WARNING", $_[0])) { our $clean = 0; our $cnt_warn++; } @@ -2259,6 +2310,11 @@ sub process { } } + if ($line =~ /^.\s*(Q(?:S?LIST|SIMPLEQ|TAILQ)_HEAD)\s*\(\s*[^,]/ && + $line !~ /^.typedef/) { + ERROR("named $1 should be typedefed separately\n" . $herecurr); + } + # Need a space before open parenthesis after if, while etc if ($line=~/\b(if|while|for|switch)\(/) { ERROR("space required before the open parenthesis '('\n" . $herecurr); @@ -2864,30 +2920,31 @@ sub process { } } + if ($is_patch && $chk_signoff && $signoff == 0) { + ERROR("Missing Signed-off-by: line(s)\n"); + } + # If we have no input at all, then there is nothing to report on # so just keep quiet. if ($#rawlines == -1) { - exit(0); + return 1; } # In mailback mode only produce a report in the negative, for # things that appear to be patches. if ($mailback && ($clean == 1 || !$is_patch)) { - exit(0); + return 1; } # This is not a patch, and we are are in 'no-patch' mode so # just keep quiet. if (!$chk_patch && !$is_patch) { - exit(0); + return 1; } if (!$is_patch) { ERROR("Does not appear to be a unified-diff format patch\n"); } - if ($is_patch && $chk_signoff && $signoff == 0) { - ERROR("Missing Signed-off-by: line(s)\n"); - } print report_dump(); if ($summary && !($clean == 1 && $quiet == 1)) { diff --git a/scripts/cocci-macro-file.h b/scripts/cocci-macro-file.h index 7e200a1023..e485cdccae 100644 --- a/scripts/cocci-macro-file.h +++ b/scripts/cocci-macro-file.h @@ -92,29 +92,19 @@ struct { \ /* * Tail queue definitions. */ -#define Q_TAILQ_HEAD(name, type, qual) \ -struct name { \ - qual type *tqh_first; /* first element */ \ - qual type *qual *tqh_last; /* addr of last next element */ \ -} #define QTAILQ_HEAD(name, type) \ -struct name { \ - type *tqh_first; /* first element */ \ - type **tqh_last; /* addr of last next element */ \ +union name { \ + struct type *tqh_first; /* first element */ \ + QTailQLink tqh_circ; /* link for last element */ \ } #define QTAILQ_HEAD_INITIALIZER(head) \ - { NULL, &(head).tqh_first } + { .tqh_circ = { NULL, &(head).tqh_circ } } -#define Q_TAILQ_ENTRY(type, qual) \ -struct { \ - qual type *tqe_next; /* next element */ \ - qual type *qual *tqe_prev; /* address of previous next element */\ -} #define QTAILQ_ENTRY(type) \ -struct { \ - type *tqe_next; /* next element */ \ - type **tqe_prev; /* address of previous next element */ \ +union { \ + struct type *tqe_next; /* next element */ \ + QTailQLink tqe_circ; /* link for prev element */ \ } /* From glib */ diff --git a/scripts/fix-multiline-comments.sh b/scripts/fix-multiline-comments.sh new file mode 100755 index 0000000000..93f9b10669 --- /dev/null +++ b/scripts/fix-multiline-comments.sh @@ -0,0 +1,62 @@ +#! /bin/sh +# +# Fix multiline comments to match CODING_STYLE +# +# Copyright (C) 2018 Red Hat, Inc. +# +# Author: Paolo Bonzini +# +# Usage: scripts/fix-multiline-comments.sh [-i] FILE... +# +# -i edits the file in place (requires gawk 4.1.0). +# +# Set the AWK environment variable to choose the awk interpreter to use +# (default 'awk') + +if test "$1" = -i; then + # gawk extension + inplace="-i inplace" + shift +fi +${AWK-awk} $inplace 'BEGIN { indent = -1 } +{ + line = $0 + # apply a star to the indent on lines after the first + if (indent != -1) { + if (line == "") { + line = sp " *" + } else if (substr(line, 1, indent + 2) == sp " ") { + line = sp " *" substr(line, indent + 3) + } + } + + is_lead = (line ~ /^[ \t]*\/\*/) + is_trail = (line ~ /\*\//) + if (is_lead && !is_trail) { + # grab the indent at the start of a comment, but not for + # single-line comments + match(line, /^[ \t]*\/\*/) + indent = RLENGTH - 2 + sp = substr(line, 1, indent) + } + + # the regular expression filters out lone /*, /**, or */ + if (indent != -1 && !(line ~ /^[ \t]*(\/\*+|\*\/)[ \t]*$/)) { + if (is_lead) { + # split the leading /* or /** on a separate line + match(line, /^[ \t]*\/\*+/) + lead = substr(line, 1, RLENGTH) + match(line, /^[ \t]*\/\*+[ \t]*/) + line = lead "\n" sp " *" substr(line, RLENGTH) + } + if (is_trail) { + # split the trailing */ on a separate line + match(line, /[ \t]*\*\//) + line = substr(line, 1, RSTART - 1) "\n" sp " */" + } + } + if (is_trail) { + indent = -1 + } + print line +}' "$@" diff --git a/scripts/gtester-cat b/scripts/gtester-cat deleted file mode 100755 index 061a952cad..0000000000 --- a/scripts/gtester-cat +++ /dev/null @@ -1,26 +0,0 @@ -#!/bin/sh -# -# Copyright IBM, Corp. 2012 -# -# Authors: -# Anthony Liguori <aliguori@us.ibm.com> -# -# This work is licensed under the terms of the GNU GPLv2 or later. -# See the COPYING file in the top-level directory. - -cat <<EOF -<?xml version="1.0"?> -<gtester> - <info> - <package>qemu</package> - <version>0.0</version> - <revision>rev</revision> - </info> -EOF - -sed \ - -e '/<?xml/d' \ - -e '/^<gtester>$/d' \ - -e '/<info>/,/<\/info>/d' \ - -e '$b' \ - -e '/^<\/gtester>$/d' "$@" diff --git a/scripts/tap-driver.pl b/scripts/tap-driver.pl new file mode 100755 index 0000000000..5e59b5db49 --- /dev/null +++ b/scripts/tap-driver.pl @@ -0,0 +1,378 @@ +#! /usr/bin/env perl +# Copyright (C) 2011-2013 Free Software Foundation, Inc. +# Copyright (C) 2018 Red Hat, Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <https://www.gnu.org/licenses/>. + +# As a special exception to the GNU General Public License, if you +# distribute this file as part of a program that contains a +# configuration script generated by Autoconf, you may include it under +# the same distribution terms that you use for the rest of that program. + +# ---------------------------------- # +# Imports, static data, and setup. # +# ---------------------------------- # + +use warnings FATAL => 'all'; +use strict; +use Getopt::Long (); +use TAP::Parser; +use Term::ANSIColor qw(:constants); + +my $ME = "tap-driver.pl"; +my $VERSION = "2018-11-30"; + +my $USAGE = <<'END'; +Usage: + tap-driver [--test-name=TEST] [--color={always|never|auto}] + [--verbose] [--show-failures-only] +END + +my $HELP = "$ME: TAP-aware test driver for QEMU testsuite harness." . + "\n" . $USAGE; + +# It's important that NO_PLAN evaluates "false" as a boolean. +use constant NO_PLAN => 0; +use constant EARLY_PLAN => 1; +use constant LATE_PLAN => 2; + +use constant DIAG_STRING => "#"; + +# ------------------- # +# Global variables. # +# ------------------- # + +my $testno = 0; # Number of test results seen so far. +my $bailed_out = 0; # Whether a "Bail out!" directive has been seen. +my $failed = 0; # Final exit code + +# Whether the TAP plan has been seen or not, and if yes, which kind +# it is ("early" is seen before any test result, "late" otherwise). +my $plan_seen = NO_PLAN; + +# ----------------- # +# Option parsing. # +# ----------------- # + +my %cfg = ( + "color" => 0, + "verbose" => 0, + "show-failures-only" => 0, +); + +my $color = "auto"; +my $test_name = undef; + +# Perl's Getopt::Long allows options to take optional arguments after a space. +# Prevent --color by itself from consuming other arguments +foreach (@ARGV) { + if ($_ eq "--color" || $_ eq "-color") { + $_ = "--color=$color"; + } +} + +Getopt::Long::GetOptions + ( + 'help' => sub { print $HELP; exit 0; }, + 'version' => sub { print "$ME $VERSION\n"; exit 0; }, + 'test-name=s' => \$test_name, + 'color=s' => \$color, + 'show-failures-only' => sub { $cfg{"show-failures-only"} = 1; }, + 'verbose' => sub { $cfg{"verbose"} = 1; }, + ) or exit 1; + +if ($color =~ /^always$/i) { + $cfg{'color'} = 1; +} elsif ($color =~ /^never$/i) { + $cfg{'color'} = 0; +} elsif ($color =~ /^auto$/i) { + $cfg{'color'} = (-t STDOUT); +} else { + die "Invalid color mode: $color\n"; +} + +# ------------- # +# Prototypes. # +# ------------- # + +sub colored ($$); +sub decorate_result ($); +sub extract_tap_comment ($); +sub handle_tap_bailout ($); +sub handle_tap_plan ($); +sub handle_tap_result ($); +sub is_null_string ($); +sub main (); +sub report ($;$); +sub stringify_result_obj ($); +sub testsuite_error ($); + +# -------------- # +# Subroutines. # +# -------------- # + +# If the given string is undefined or empty, return true, otherwise +# return false. This function is useful to avoid pitfalls like: +# if ($message) { print "$message\n"; } +# which wouldn't print anything if $message is the literal "0". +sub is_null_string ($) +{ + my $str = shift; + return ! (defined $str and length $str); +} + +sub stringify_result_obj ($) +{ + my $result_obj = shift; + if ($result_obj->is_unplanned || $result_obj->number != $testno) + { + return "ERROR"; + } + elsif ($plan_seen == LATE_PLAN) + { + return "ERROR"; + } + elsif (!$result_obj->directive) + { + return $result_obj->is_ok ? "PASS" : "FAIL"; + } + elsif ($result_obj->has_todo) + { + return $result_obj->is_actual_ok ? "XPASS" : "XFAIL"; + } + elsif ($result_obj->has_skip) + { + return $result_obj->is_ok ? "SKIP" : "FAIL"; + } + die "$ME: INTERNAL ERROR"; # NOTREACHED +} + +sub colored ($$) +{ + my ($color_string, $text) = @_; + return $color_string . $text . RESET; +} + +sub decorate_result ($) +{ + my $result = shift; + return $result unless $cfg{"color"}; + my %color_for_result = + ( + "ERROR" => BOLD.MAGENTA, + "PASS" => GREEN, + "XPASS" => BOLD.YELLOW, + "FAIL" => BOLD.RED, + "XFAIL" => YELLOW, + "SKIP" => BLUE, + ); + if (my $color = $color_for_result{$result}) + { + return colored ($color, $result); + } + else + { + return $result; # Don't colorize unknown stuff. + } +} + +sub report ($;$) +{ + my ($msg, $result, $explanation) = (undef, @_); + if ($result =~ /^(?:X?(?:PASS|FAIL)|SKIP|ERROR)/) + { + # Output on console might be colorized. + $msg = decorate_result($result); + if ($result =~ /^(?:PASS|XFAIL|SKIP)/) + { + return if $cfg{"show-failures-only"}; + } + else + { + $failed = 1; + } + } + elsif ($result eq "#") + { + $msg = " "; + } + else + { + die "$ME: INTERNAL ERROR"; # NOTREACHED + } + $msg .= " $explanation" if defined $explanation; + print $msg . "\n"; +} + +sub testsuite_error ($) +{ + report "ERROR", "- $_[0]"; +} + +sub handle_tap_result ($) +{ + $testno++; + my $result_obj = shift; + + my $test_result = stringify_result_obj $result_obj; + my $string = $result_obj->number; + + my $description = $result_obj->description; + $string .= " $test_name" unless is_null_string $test_name; + $string .= " $description" unless is_null_string $description; + + if ($plan_seen == LATE_PLAN) + { + $string .= " # AFTER LATE PLAN"; + } + elsif ($result_obj->is_unplanned) + { + $string .= " # UNPLANNED"; + } + elsif ($result_obj->number != $testno) + { + $string .= " # OUT-OF-ORDER (expecting $testno)"; + } + elsif (my $directive = $result_obj->directive) + { + $string .= " # $directive"; + my $explanation = $result_obj->explanation; + $string .= " $explanation" + unless is_null_string $explanation; + } + + report $test_result, $string; +} + +sub handle_tap_plan ($) +{ + my $plan = shift; + if ($plan_seen) + { + # Error, only one plan per stream is acceptable. + testsuite_error "multiple test plans"; + return; + } + # The TAP plan can come before or after *all* the TAP results; we speak + # respectively of an "early" or a "late" plan. If we see the plan line + # after at least one TAP result has been seen, assume we have a late + # plan; in this case, any further test result seen after the plan will + # be flagged as an error. + $plan_seen = ($testno >= 1 ? LATE_PLAN : EARLY_PLAN); + # If $testno > 0, we have an error ("too many tests run") that will be + # automatically dealt with later, so don't worry about it here. If + # $plan_seen is true, we have an error due to a repeated plan, and that + # has already been dealt with above. Otherwise, we have a valid "plan + # with SKIP" specification, and should report it as a particular kind + # of SKIP result. + if ($plan->directive && $testno == 0) + { + my $explanation = is_null_string ($plan->explanation) ? + undef : "- " . $plan->explanation; + report "SKIP", $explanation; + } +} + +sub handle_tap_bailout ($) +{ + my ($bailout, $msg) = ($_[0], "Bail out!"); + $bailed_out = 1; + $msg .= " " . $bailout->explanation + unless is_null_string $bailout->explanation; + testsuite_error $msg; +} + +sub extract_tap_comment ($) +{ + my $line = shift; + if (index ($line, DIAG_STRING) == 0) + { + # Strip leading `DIAG_STRING' from `$line'. + $line = substr ($line, length (DIAG_STRING)); + # And strip any leading and trailing whitespace left. + $line =~ s/(?:^\s*|\s*$)//g; + # Return what is left (if any). + return $line; + } + return ""; +} + +sub main () +{ + my $iterator = TAP::Parser::Iterator::Stream->new(\*STDIN); + my $parser = TAP::Parser->new ({iterator => $iterator }); + + while (defined (my $cur = $parser->next)) + { + # Parsing of TAP input should stop after a "Bail out!" directive. + next if $bailed_out; + + if ($cur->is_plan) + { + handle_tap_plan ($cur); + } + elsif ($cur->is_test) + { + handle_tap_result ($cur); + } + elsif ($cur->is_bailout) + { + handle_tap_bailout ($cur); + } + elsif ($cfg{"verbose"}) + { + my $comment = extract_tap_comment ($cur->raw); + report "#", "$comment" if length $comment; + } + } + # A "Bail out!" directive should cause us to ignore any following TAP + # error. + if (!$bailed_out) + { + if (!$plan_seen) + { + testsuite_error "missing test plan"; + } + elsif ($parser->tests_planned != $parser->tests_run) + { + my ($planned, $run) = ($parser->tests_planned, $parser->tests_run); + my $bad_amount = $run > $planned ? "many" : "few"; + testsuite_error (sprintf "too %s tests run (expected %d, got %d)", + $bad_amount, $planned, $run); + } + } +} + +# ----------- # +# Main code. # +# ----------- # + +main; +exit($failed); + +# Local Variables: +# perl-indent-level: 2 +# perl-continued-statement-offset: 2 +# perl-continued-brace-offset: 0 +# perl-brace-offset: 0 +# perl-brace-imaginary-offset: 0 +# perl-label-offset: -2 +# cperl-indent-level: 2 +# cperl-brace-offset: 0 +# cperl-continued-brace-offset: 0 +# cperl-label-offset: -2 +# cperl-extra-newline-before-brace: t +# cperl-merge-trailing-else: nil +# cperl-continued-statement-offset: 2 +# End: diff --git a/scripts/tap-merge.pl b/scripts/tap-merge.pl new file mode 100755 index 0000000000..59e3fa5007 --- /dev/null +++ b/scripts/tap-merge.pl @@ -0,0 +1,110 @@ +#! /usr/bin/env perl +# Copyright (C) 2018 Red Hat, Inc. +# +# Author: Paolo Bonzini <pbonzini@redhat.com> +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <https://www.gnu.org/licenses/>. + +# ---------------------------------- # +# Imports, static data, and setup. # +# ---------------------------------- # + +use warnings FATAL => 'all'; +use strict; +use Getopt::Long (); +use TAP::Parser; + +my $ME = "tap-merge.pl"; +my $VERSION = "2018-11-30"; + +my $HELP = "$ME: merge multiple TAP inputs from stdin."; + +use constant DIAG_STRING => "#"; + +# ----------------- # +# Option parsing. # +# ----------------- # + +Getopt::Long::GetOptions + ( + 'help' => sub { print $HELP; exit 0; }, + 'version' => sub { print "$ME $VERSION\n"; exit 0; }, + ); + +# -------------- # +# Subroutines. # +# -------------- # + +sub main () +{ + my $iterator = TAP::Parser::Iterator::Stream->new(\*STDIN); + my $parser = TAP::Parser->new ({iterator => $iterator }); + my $testno = 0; # Number of test results seen so far. + my $bailed_out = 0; # Whether a "Bail out!" directive has been seen. + + while (defined (my $cur = $parser->next)) + { + if ($cur->is_bailout) + { + $bailed_out = 1; + print DIAG_STRING . " " . $cur->as_string . "\n"; + next; + } + elsif ($cur->is_plan) + { + $bailed_out = 0; + next; + } + elsif ($cur->is_test) + { + $bailed_out = 0 if $cur->number == 1; + $testno++; + $cur = TAP::Parser::Result::Test->new({ + ok => $cur->ok, + test_num => $testno, + directive => $cur->directive, + explanation => $cur->explanation, + description => $cur->description + }); + } + elsif ($cur->is_version) + { + next if $testno > 0; + } + print $cur->as_string . "\n" unless $bailed_out; + } + print "1..$testno\n"; +} + +# ----------- # +# Main code. # +# ----------- # + +main; + +# Local Variables: +# perl-indent-level: 2 +# perl-continued-statement-offset: 2 +# perl-continued-brace-offset: 0 +# perl-brace-offset: 0 +# perl-brace-imaginary-offset: 0 +# perl-label-offset: -2 +# cperl-indent-level: 2 +# cperl-brace-offset: 0 +# cperl-continued-brace-offset: 0 +# cperl-label-offset: -2 +# cperl-extra-newline-before-brace: t +# cperl-merge-trailing-else: nil +# cperl-continued-statement-offset: 2 +# End: diff --git a/slirp/ip_input.c b/slirp/ip_input.c index 348e1dca5a..094a807d41 100644 --- a/slirp/ip_input.c +++ b/slirp/ip_input.c @@ -193,7 +193,7 @@ ip_input(struct mbuf *m) m = dtom(slirp, ip); } else if (fp) - ip_freef(slirp, fp); + ip_freef(slirp, fp); } else ip->ip_len -= hlen; @@ -537,7 +537,7 @@ typedef uint32_t n_time; if (opt == IPOPT_SSRR) { #define INA struct in_ifaddr * #define SA struct sockaddr * - if ((ia = (INA)ifa_ifwithdstaddr((SA)&ipaddr)) == 0) + if ((ia = (INA)ifa_ifwithdstaddr((SA)&ipaddr)) == 0) ia = (INA)ifa_ifwithnet((SA)&ipaddr); } else ia = ip_rtaddr(ipaddr.sin_addr); diff --git a/slirp/slirp.c b/slirp/slirp.c index 322edf51eb..ab2fc4eb8b 100644 --- a/slirp/slirp.c +++ b/slirp/slirp.c @@ -47,7 +47,7 @@ static const uint8_t special_ethaddr[ETH_ALEN] = { u_int curtime; -static QTAILQ_HEAD(slirp_instances, Slirp) slirp_instances = +static QTAILQ_HEAD(, Slirp) slirp_instances = QTAILQ_HEAD_INITIALIZER(slirp_instances); static struct in_addr dns_addr; diff --git a/slirp/tcp_input.c b/slirp/tcp_input.c index d073ef9525..09bdf9b482 100644 --- a/slirp/tcp_input.c +++ b/slirp/tcp_input.c @@ -74,7 +74,7 @@ if (so->so_emu) { \ if (tcp_emu((so),(m))) sbappend((so), (m)); \ } else \ - sbappend((so), (m)); \ + sbappend((so), (m)); \ } else {\ (flags) = tcp_reass((tp), (ti), (m)); \ tp->t_flags |= TF_ACKNOW; \ @@ -1175,7 +1175,7 @@ trimthenstep6: } break; - /* + /* * In CLOSING STATE in addition to the processing for * the ESTABLISHED state if the ACK acknowledges our FIN * then enter the TIME-WAIT state, otherwise ignore @@ -1325,7 +1325,7 @@ dodata: } switch (tp->t_state) { - /* + /* * In SYN_RECEIVED and ESTABLISHED STATES * enter the CLOSE_WAIT state. */ @@ -1337,7 +1337,7 @@ dodata: tp->t_state = TCPS_CLOSE_WAIT; break; - /* + /* * If still in FIN_WAIT_1 STATE FIN has not been acked so * enter the CLOSING state. */ @@ -1345,7 +1345,7 @@ dodata: tp->t_state = TCPS_CLOSING; break; - /* + /* * In FIN_WAIT_2 state enter the TIME_WAIT state, * starting the time-wait timer, turning off the other * standard timers. diff --git a/slirp/tcp_output.c b/slirp/tcp_output.c index 90b5c376f7..c835432812 100644 --- a/slirp/tcp_output.c +++ b/slirp/tcp_output.c @@ -275,9 +275,9 @@ send: memcpy((caddr_t)(opt + 2), (caddr_t)&mss, sizeof(mss)); optlen = 4; } - } + } - hdrlen += optlen; + hdrlen += optlen; /* * Adjust data length if insertion of options will diff --git a/slirp/tcp_timer.c b/slirp/tcp_timer.c index 52ef5f9100..dc8288b511 100644 --- a/slirp/tcp_timer.c +++ b/slirp/tcp_timer.c @@ -263,7 +263,7 @@ tcp_timers(register struct tcpcb *tp, int timer) goto dropit; if ((SO_OPTIONS) && tp->t_state <= TCPS_CLOSE_WAIT) { - if (tp->t_idle >= TCPTV_KEEP_IDLE + TCP_MAXIDLE) + if (tp->t_idle >= TCPTV_KEEP_IDLE + TCP_MAXIDLE) goto dropit; /* * Send a packet designed to force a response diff --git a/slirp/udp.c b/slirp/udp.c index c47870a61b..5bb196c907 100644 --- a/slirp/udp.c +++ b/slirp/udp.c @@ -310,7 +310,7 @@ udp_tos(struct socket *so) while(udptos[i].tos) { if ((udptos[i].fport && ntohs(so->so_fport) == udptos[i].fport) || (udptos[i].lport && ntohs(so->so_lport) == udptos[i].lport)) { - so->so_emu = udptos[i].emu; + so->so_emu = udptos[i].emu; return udptos[i].tos; } i++; diff --git a/target/alpha/translate.c b/target/alpha/translate.c index e5d62850c5..9d8f9b3eea 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -804,7 +804,7 @@ static void gen_cvttq(DisasContext *ctx, int rb, int rc, int fn11) static void gen_ieee_intcvt(DisasContext *ctx, void (*helper)(TCGv, TCGv_ptr, TCGv), - int rb, int rc, int fn11) + int rb, int rc, int fn11) { TCGv vb, vc; diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 44dd0ce6ce..e00ccf9c98 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -206,7 +206,7 @@ typedef struct KVMDevice { int dev_fd; } KVMDevice; -static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head; +static QSLIST_HEAD(, KVMDevice) kvm_devices_head; static void kvm_arm_devlistener_add(MemoryListener *listener, MemoryRegionSection *section) diff --git a/target/cris/helper.c b/target/cris/helper.c index d2ec349191..b2dbb2075c 100644 --- a/target/cris/helper.c +++ b/target/cris/helper.c @@ -240,7 +240,7 @@ void cris_cpu_do_interrupt(CPUState *cs) /* Exception starts with dslot cleared. */ env->dslot = 0; } - + if (env->pregs[PR_CCS] & U_FLAG) { /* Swap stack pointers. */ env->pregs[PR_USP] = env->regs[R_SP]; diff --git a/target/cris/mmu.h b/target/cris/mmu.h index 8e249e812b..0217f476de 100644 --- a/target/cris/mmu.h +++ b/target/cris/mmu.h @@ -5,13 +5,13 @@ struct cris_mmu_result { - uint32_t phy; - int prot; - int bf_vec; + uint32_t phy; + int prot; + int bf_vec; }; void cris_mmu_init(CPUCRISState *env); void cris_mmu_flush_pid(CPUCRISState *env, uint32_t pid); int cris_mmu_translate(struct cris_mmu_result *res, - CPUCRISState *env, uint32_t vaddr, - int rw, int mmu_idx, int debug); + CPUCRISState *env, uint32_t vaddr, + int rw, int mmu_idx, int debug); diff --git a/target/cris/translate_v10.inc.c b/target/cris/translate_v10.inc.c index fce78825cc..a87b8bb281 100644 --- a/target/cris/translate_v10.inc.c +++ b/target/cris/translate_v10.inc.c @@ -384,7 +384,7 @@ static unsigned int dec10_setclrf(DisasContext *dc) } static inline void dec10_reg_prep_sext(DisasContext *dc, int size, int sext, - TCGv dd, TCGv ds, TCGv sd, TCGv ss) + TCGv dd, TCGv ds, TCGv sd, TCGv ss) { if (sext) { t_gen_sext(dd, sd, size); diff --git a/target/i386/Makefile.objs b/target/i386/Makefile.objs index 32bf966300..cb9c265525 100644 --- a/target/i386/Makefile.objs +++ b/target/i386/Makefile.objs @@ -12,10 +12,10 @@ obj-$(call lnot,$(CONFIG_HYPERV)) += hyperv-stub.o ifeq ($(CONFIG_WIN32),y) obj-$(CONFIG_HAX) += hax-all.o hax-mem.o hax-windows.o endif -ifeq ($(CONFIG_DARWIN),y) -obj-$(CONFIG_HAX) += hax-all.o hax-mem.o hax-darwin.o -obj-$(CONFIG_HVF) += hvf/ +ifeq ($(CONFIG_POSIX),y) +obj-$(CONFIG_HAX) += hax-all.o hax-mem.o hax-posix.o endif +obj-$(CONFIG_HVF) += hvf/ obj-$(CONFIG_WHPX) += whpx-all.o endif obj-$(CONFIG_SEV) += sev.o diff --git a/target/i386/hax-i386.h b/target/i386/hax-i386.h index 6abc156f88..f13fa4638f 100644 --- a/target/i386/hax-i386.h +++ b/target/i386/hax-i386.h @@ -16,7 +16,7 @@ #include "cpu.h" #include "sysemu/hax.h" -#ifdef CONFIG_DARWIN +#ifdef CONFIG_POSIX typedef int hax_fd; #endif @@ -82,8 +82,8 @@ hax_fd hax_mod_open(void); void hax_memory_init(void); -#ifdef CONFIG_DARWIN -#include "target/i386/hax-darwin.h" +#ifdef CONFIG_POSIX +#include "target/i386/hax-posix.h" #endif #ifdef CONFIG_WIN32 diff --git a/target/i386/hax-mem.c b/target/i386/hax-mem.c index 5c37e94caa..6bb5a24917 100644 --- a/target/i386/hax-mem.c +++ b/target/i386/hax-mem.c @@ -56,7 +56,7 @@ typedef struct HAXMapping { * send to the kernel only the removal of the pages from the MMIO hole after * having computed locally the result of the deletion and additions. */ -static QTAILQ_HEAD(HAXMappingListHead, HAXMapping) mappings = +static QTAILQ_HEAD(, HAXMapping) mappings = QTAILQ_HEAD_INITIALIZER(mappings); /** diff --git a/target/i386/hax-darwin.c b/target/i386/hax-posix.c index a5426a6dac..a5426a6dac 100644 --- a/target/i386/hax-darwin.c +++ b/target/i386/hax-posix.c diff --git a/target/i386/hax-darwin.h b/target/i386/hax-posix.h index 51af0e8c88..51af0e8c88 100644 --- a/target/i386/hax-darwin.h +++ b/target/i386/hax-posix.h diff --git a/target/i386/translate.c b/target/i386/translate.c index 0dd5fbe45c..49cd298374 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -3445,7 +3445,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, case 0x172: case 0x173: if (b1 >= 2) { - goto unknown_op; + goto unknown_op; } val = x86_ldub_code(env, s); if (is_xmm) { @@ -6400,7 +6400,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes)); if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); - } + } tcg_gen_movi_i32(s->tmp2_i32, val); gen_helper_in_func(ot, s->T1, s->tmp2_i32); gen_op_mov_reg_v(s, ot, R_EAX, s->T1); @@ -6421,7 +6421,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); - } + } tcg_gen_movi_i32(s->tmp2_i32, val); tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1); gen_helper_out_func(ot, s->tmp2_i32, s->tmp3_i32); @@ -6439,7 +6439,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes)); if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); - } + } tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); gen_helper_in_func(ot, s->T1, s->tmp2_i32); gen_op_mov_reg_v(s, ot, R_EAX, s->T1); @@ -6459,7 +6459,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); - } + } tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1); gen_helper_out_func(ot, s->tmp2_i32, s->tmp3_i32); @@ -7166,7 +7166,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) gen_jmp_im(s, pc_start - s->cs_base); if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); - } + } gen_helper_rdtsc(cpu_env); if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_end(); diff --git a/target/mips/translate.c b/target/mips/translate.c index 2636e8c022..057aaf9a44 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -7036,7 +7036,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) /* Mark as an IO operation because we read the time. */ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { gen_io_start(); - } + } gen_helper_mfc0_count(arg, cpu_env); if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { gen_io_end(); diff --git a/target/ppc/arch_dump.c b/target/ppc/arch_dump.c index cc1460e4e3..3a00606d01 100644 --- a/target/ppc/arch_dump.c +++ b/target/ppc/arch_dump.c @@ -140,7 +140,8 @@ static void ppc_write_elf_fpregset(NoteFuncArg *arg, PowerPCCPU *cpu) memset(fpregset, 0, sizeof(*fpregset)); for (i = 0; i < 32; i++) { - fpregset->fpr[i] = cpu_to_dump64(s, cpu->env.fpr[i]); + uint64_t *fpr = cpu_fpr_ptr(&cpu->env, i); + fpregset->fpr[i] = cpu_to_dump64(s, *fpr); } fpregset->fpscr = cpu_to_dump_reg(s, cpu->env.fpscr); } @@ -158,6 +159,7 @@ static void ppc_write_elf_vmxregset(NoteFuncArg *arg, PowerPCCPU *cpu) for (i = 0; i < 32; i++) { bool needs_byteswap; + ppc_avr_t *avr = cpu_avr_ptr(&cpu->env, i); #ifdef HOST_WORDS_BIGENDIAN needs_byteswap = s->dump_info.d_endian == ELFDATA2LSB; @@ -166,11 +168,11 @@ static void ppc_write_elf_vmxregset(NoteFuncArg *arg, PowerPCCPU *cpu) #endif if (needs_byteswap) { - vmxregset->avr[i].u64[0] = bswap64(cpu->env.avr[i].u64[1]); - vmxregset->avr[i].u64[1] = bswap64(cpu->env.avr[i].u64[0]); + vmxregset->avr[i].u64[0] = bswap64(avr->u64[1]); + vmxregset->avr[i].u64[1] = bswap64(avr->u64[0]); } else { - vmxregset->avr[i].u64[0] = cpu->env.avr[i].u64[0]; - vmxregset->avr[i].u64[1] = cpu->env.avr[i].u64[1]; + vmxregset->avr[i].u64[0] = avr->u64[0]; + vmxregset->avr[i].u64[1] = avr->u64[1]; } } vmxregset->vscr.u32[3] = cpu_to_dump32(s, cpu->env.vscr); @@ -188,7 +190,8 @@ static void ppc_write_elf_vsxregset(NoteFuncArg *arg, PowerPCCPU *cpu) memset(vsxregset, 0, sizeof(*vsxregset)); for (i = 0; i < 32; i++) { - vsxregset->vsr[i] = cpu_to_dump64(s, cpu->env.vsr[i]); + uint64_t *vsrl = cpu_vsrl_ptr(&cpu->env, i); + vsxregset->vsr[i] = cpu_to_dump64(s, *vsrl); } } diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index d5f99f1fc7..486abaf99b 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -218,7 +218,6 @@ typedef struct opc_handler_t opc_handler_t; /* Types used to describe some PowerPC registers etc. */ typedef struct DisasContext DisasContext; typedef struct ppc_spr_t ppc_spr_t; -typedef union ppc_avr_t ppc_avr_t; typedef union ppc_tlb_t ppc_tlb_t; typedef struct ppc_hash_pte64 ppc_hash_pte64_t; @@ -242,22 +241,26 @@ struct ppc_spr_t { #endif }; -/* Altivec registers (128 bits) */ -union ppc_avr_t { - float32 f[4]; +/* VSX/Altivec registers (128 bits) */ +typedef union _ppc_vsr_t { uint8_t u8[16]; uint16_t u16[8]; uint32_t u32[4]; + uint64_t u64[2]; int8_t s8[16]; int16_t s16[8]; int32_t s32[4]; - uint64_t u64[2]; int64_t s64[2]; + float32 f32[4]; + float64 f64[2]; + float128 f128; #ifdef CONFIG_INT128 __uint128_t u128; #endif - Int128 s128; -}; + Int128 s128; +} ppc_vsr_t; + +typedef ppc_vsr_t ppc_avr_t; #if !defined(CONFIG_USER_ONLY) /* Software TLB cache */ @@ -1001,8 +1004,6 @@ struct CPUPPCState { /* Floating point execution context */ float_status fp_status; - /* floating point registers */ - float64 fpr[32]; /* floating point status and control register */ target_ulong fpscr; @@ -1052,11 +1053,10 @@ struct CPUPPCState { /* Special purpose registers */ target_ulong spr[1024]; ppc_spr_t spr_cb[1024]; - /* Altivec registers */ - ppc_avr_t avr[32]; + /* Vector status and control register */ uint32_t vscr; - /* VSX registers */ - uint64_t vsr[32]; + /* VSX registers (including FP and AVR) */ + ppc_vsr_t vsr[64] QEMU_ALIGNED(16); /* SPE registers */ uint64_t spe_acc; uint32_t spe_fscr; @@ -1177,6 +1177,8 @@ do { \ typedef struct PPCVirtualHypervisor PPCVirtualHypervisor; typedef struct PPCVirtualHypervisorClass PPCVirtualHypervisorClass; +typedef struct XiveTCTX XiveTCTX; +typedef struct ICPState ICPState; /** * PowerPCCPU: @@ -1195,7 +1197,8 @@ struct PowerPCCPU { int vcpu_id; uint32_t compat_pvr; PPCVirtualHypervisor *vhyp; - Object *intc; + ICPState *icp; + XiveTCTX *tctx; void *machine_data; int32_t node_id; /* NUMA node this CPU belongs to */ PPCHash64Options *hash64_opts; @@ -2537,6 +2540,22 @@ static inline bool lsw_reg_in_range(int start, int nregs, int rx) (start + nregs > 32 && (rx >= start || rx < start + nregs - 32)); } +/* Accessors for FP, VMX and VSX registers */ +static inline uint64_t *cpu_fpr_ptr(CPUPPCState *env, int i) +{ + return &env->vsr[i].u64[0]; +} + +static inline uint64_t *cpu_vsrl_ptr(CPUPPCState *env, int i) +{ + return &env->vsr[i].u64[1]; +} + +static inline ppc_avr_t *cpu_avr_ptr(CPUPPCState *env, int i) +{ + return &env->vsr[32 + i]; +} + void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env); void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len); diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c index b6f6693583..19565b584d 100644 --- a/target/ppc/gdbstub.c +++ b/target/ppc/gdbstub.c @@ -126,7 +126,7 @@ int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) gdb_get_regl(mem_buf, env->gpr[n]); } else if (n < 64) { /* fprs */ - stfq_p(mem_buf, env->fpr[n-32]); + stfq_p(mem_buf, *cpu_fpr_ptr(env, n - 32)); } else { switch (n) { case 64: @@ -178,7 +178,7 @@ int ppc_cpu_gdb_read_register_apple(CPUState *cs, uint8_t *mem_buf, int n) gdb_get_reg64(mem_buf, env->gpr[n]); } else if (n < 64) { /* fprs */ - stfq_p(mem_buf, env->fpr[n-32]); + stfq_p(mem_buf, *cpu_fpr_ptr(env, n - 32)); } else if (n < 96) { /* Altivec */ stq_p(mem_buf, n - 64); @@ -234,7 +234,7 @@ int ppc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) env->gpr[n] = ldtul_p(mem_buf); } else if (n < 64) { /* fprs */ - env->fpr[n-32] = ldfq_p(mem_buf); + *cpu_fpr_ptr(env, n - 32) = ldfq_p(mem_buf); } else { switch (n) { case 64: @@ -284,7 +284,7 @@ int ppc_cpu_gdb_write_register_apple(CPUState *cs, uint8_t *mem_buf, int n) env->gpr[n] = ldq_p(mem_buf); } else if (n < 64) { /* fprs */ - env->fpr[n-32] = ldfq_p(mem_buf); + *cpu_fpr_ptr(env, n - 32) = ldfq_p(mem_buf); } else { switch (n) { case 64 + 32: diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index fcac90a4a9..598731d47a 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -391,13 +391,9 @@ target_ulong helper_602_mfrom(target_ulong arg) #if defined(HOST_WORDS_BIGENDIAN) #define HI_IDX 0 #define LO_IDX 1 -#define AVRB(i) u8[i] -#define AVRW(i) u32[i] #else #define HI_IDX 1 #define LO_IDX 0 -#define AVRB(i) u8[15-(i)] -#define AVRW(i) u32[3-(i)] #endif #if defined(HOST_WORDS_BIGENDIAN) @@ -548,8 +544,8 @@ VARITH_DO(muluwm, *, u32) { \ int i; \ \ - for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ - r->f[i] = func(a->f[i], b->f[i], &env->vec_status); \ + for (i = 0; i < ARRAY_SIZE(r->f32); i++) { \ + r->f32[i] = func(a->f32[i], b->f32[i], &env->vec_status); \ } \ } VARITHFP(addfp, float32_add) @@ -563,9 +559,9 @@ VARITHFP(maxfp, float32_max) ppc_avr_t *b, ppc_avr_t *c) \ { \ int i; \ - for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ - r->f[i] = float32_muladd(a->f[i], c->f[i], b->f[i], \ - type, &env->vec_status); \ + for (i = 0; i < ARRAY_SIZE(r->f32); i++) { \ + r->f32[i] = float32_muladd(a->f32[i], c->f32[i], b->f32[i], \ + type, &env->vec_status); \ } \ } VARITHFPFMA(maddfp, 0); @@ -670,9 +666,9 @@ VABSDU(w, u32) { \ int i; \ \ - for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ + for (i = 0; i < ARRAY_SIZE(r->f32); i++) { \ float32 t = cvt(b->element[i], &env->vec_status); \ - r->f[i] = float32_scalbn(t, -uim, &env->vec_status); \ + r->f32[i] = float32_scalbn(t, -uim, &env->vec_status); \ } \ } VCF(ux, uint32_to_float32, u32) @@ -782,9 +778,9 @@ VCMPNE(w, u32, uint32_t, 0) uint32_t none = 0; \ int i; \ \ - for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ + for (i = 0; i < ARRAY_SIZE(r->f32); i++) { \ uint32_t result; \ - int rel = float32_compare_quiet(a->f[i], b->f[i], \ + int rel = float32_compare_quiet(a->f32[i], b->f32[i], \ &env->vec_status); \ if (rel == float_relation_unordered) { \ result = 0; \ @@ -816,14 +812,16 @@ static inline void vcmpbfp_internal(CPUPPCState *env, ppc_avr_t *r, int i; int all_in = 0; - for (i = 0; i < ARRAY_SIZE(r->f); i++) { - int le_rel = float32_compare_quiet(a->f[i], b->f[i], &env->vec_status); + for (i = 0; i < ARRAY_SIZE(r->f32); i++) { + int le_rel = float32_compare_quiet(a->f32[i], b->f32[i], + &env->vec_status); if (le_rel == float_relation_unordered) { r->u32[i] = 0xc0000000; all_in = 1; } else { - float32 bneg = float32_chs(b->f[i]); - int ge_rel = float32_compare_quiet(a->f[i], bneg, &env->vec_status); + float32 bneg = float32_chs(b->f32[i]); + int ge_rel = float32_compare_quiet(a->f32[i], bneg, + &env->vec_status); int le = le_rel != float_relation_greater; int ge = ge_rel != float_relation_less; @@ -856,11 +854,11 @@ void helper_vcmpbfp_dot(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, float_status s = env->vec_status; \ \ set_float_rounding_mode(float_round_to_zero, &s); \ - for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ - if (float32_is_any_nan(b->f[i])) { \ + for (i = 0; i < ARRAY_SIZE(r->f32); i++) { \ + if (float32_is_any_nan(b->f32[i])) { \ r->element[i] = 0; \ } else { \ - float64 t = float32_to_float64(b->f[i], &s); \ + float64 t = float32_to_float64(b->f32[i], &s); \ int64_t j; \ \ t = float64_scalbn(t, uim, &s); \ @@ -1661,8 +1659,8 @@ void helper_vrefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b) { int i; - for (i = 0; i < ARRAY_SIZE(r->f); i++) { - r->f[i] = float32_div(float32_one, b->f[i], &env->vec_status); + for (i = 0; i < ARRAY_SIZE(r->f32); i++) { + r->f32[i] = float32_div(float32_one, b->f32[i], &env->vec_status); } } @@ -1674,8 +1672,8 @@ void helper_vrefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b) float_status s = env->vec_status; \ \ set_float_rounding_mode(rounding, &s); \ - for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ - r->f[i] = float32_round_to_int (b->f[i], &s); \ + for (i = 0; i < ARRAY_SIZE(r->f32); i++) { \ + r->f32[i] = float32_round_to_int (b->f32[i], &s); \ } \ } VRFI(n, float_round_nearest_even) @@ -1705,10 +1703,10 @@ void helper_vrsqrtefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b) { int i; - for (i = 0; i < ARRAY_SIZE(r->f); i++) { - float32 t = float32_sqrt(b->f[i], &env->vec_status); + for (i = 0; i < ARRAY_SIZE(r->f32); i++) { + float32 t = float32_sqrt(b->f32[i], &env->vec_status); - r->f[i] = float32_div(float32_one, t, &env->vec_status); + r->f32[i] = float32_div(float32_one, t, &env->vec_status); } } @@ -1751,8 +1749,8 @@ void helper_vexptefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b) { int i; - for (i = 0; i < ARRAY_SIZE(r->f); i++) { - r->f[i] = float32_exp2(b->f[i], &env->vec_status); + for (i = 0; i < ARRAY_SIZE(r->f32); i++) { + r->f32[i] = float32_exp2(b->f32[i], &env->vec_status); } } @@ -1760,8 +1758,8 @@ void helper_vlogefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b) { int i; - for (i = 0; i < ARRAY_SIZE(r->f); i++) { - r->f[i] = float32_log2(b->f[i], &env->vec_status); + for (i = 0; i < ARRAY_SIZE(r->f32); i++) { + r->f32[i] = float32_log2(b->f32[i], &env->vec_status); } } @@ -3275,11 +3273,11 @@ void helper_vcipher(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) int i; VECTOR_FOR_INORDER_I(i, u32) { - result.AVRW(i) = b->AVRW(i) ^ - (AES_Te0[a->AVRB(AES_shifts[4*i + 0])] ^ - AES_Te1[a->AVRB(AES_shifts[4*i + 1])] ^ - AES_Te2[a->AVRB(AES_shifts[4*i + 2])] ^ - AES_Te3[a->AVRB(AES_shifts[4*i + 3])]); + result.VsrW(i) = b->VsrW(i) ^ + (AES_Te0[a->VsrB(AES_shifts[4 * i + 0])] ^ + AES_Te1[a->VsrB(AES_shifts[4 * i + 1])] ^ + AES_Te2[a->VsrB(AES_shifts[4 * i + 2])] ^ + AES_Te3[a->VsrB(AES_shifts[4 * i + 3])]); } *r = result; } @@ -3290,7 +3288,7 @@ void helper_vcipherlast(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) int i; VECTOR_FOR_INORDER_I(i, u8) { - result.AVRB(i) = b->AVRB(i) ^ (AES_sbox[a->AVRB(AES_shifts[i])]); + result.VsrB(i) = b->VsrB(i) ^ (AES_sbox[a->VsrB(AES_shifts[i])]); } *r = result; } @@ -3303,15 +3301,15 @@ void helper_vncipher(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) ppc_avr_t tmp; VECTOR_FOR_INORDER_I(i, u8) { - tmp.AVRB(i) = b->AVRB(i) ^ AES_isbox[a->AVRB(AES_ishifts[i])]; + tmp.VsrB(i) = b->VsrB(i) ^ AES_isbox[a->VsrB(AES_ishifts[i])]; } VECTOR_FOR_INORDER_I(i, u32) { - r->AVRW(i) = - AES_imc[tmp.AVRB(4*i + 0)][0] ^ - AES_imc[tmp.AVRB(4*i + 1)][1] ^ - AES_imc[tmp.AVRB(4*i + 2)][2] ^ - AES_imc[tmp.AVRB(4*i + 3)][3]; + r->VsrW(i) = + AES_imc[tmp.VsrB(4 * i + 0)][0] ^ + AES_imc[tmp.VsrB(4 * i + 1)][1] ^ + AES_imc[tmp.VsrB(4 * i + 2)][2] ^ + AES_imc[tmp.VsrB(4 * i + 3)][3]; } } @@ -3321,7 +3319,7 @@ void helper_vncipherlast(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) int i; VECTOR_FOR_INORDER_I(i, u8) { - result.AVRB(i) = b->AVRB(i) ^ (AES_isbox[a->AVRB(AES_ishifts[i])]); + result.VsrB(i) = b->VsrB(i) ^ (AES_isbox[a->VsrB(AES_ishifts[i])]); } *r = result; } diff --git a/target/ppc/internal.h b/target/ppc/internal.h index a9bcadff42..c7c0f77dd6 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -52,20 +52,20 @@ FUNC_MASK(mask_u64, uint64_t, 64, UINT64_MAX); #define EXTRACT_HELPER(name, shift, nb) \ static inline uint32_t name(uint32_t opcode) \ { \ - return (opcode >> (shift)) & ((1 << (nb)) - 1); \ + return extract32(opcode, shift, nb); \ } #define EXTRACT_SHELPER(name, shift, nb) \ static inline int32_t name(uint32_t opcode) \ { \ - return (int16_t)((opcode >> (shift)) & ((1 << (nb)) - 1)); \ + return sextract32(opcode, shift, nb); \ } #define EXTRACT_HELPER_SPLIT(name, shift1, nb1, shift2, nb2) \ static inline uint32_t name(uint32_t opcode) \ { \ - return (((opcode >> (shift1)) & ((1 << (nb1)) - 1)) << nb2) | \ - ((opcode >> (shift2)) & ((1 << (nb2)) - 1)); \ + return extract32(opcode, shift1, nb1) << nb2 | \ + extract32(opcode, shift2, nb2); \ } #define EXTRACT_HELPER_SPLIT_3(name, \ @@ -124,7 +124,7 @@ EXTRACT_SHELPER(SIMM, 0, 16); /* 16 bits unsigned immediate value */ EXTRACT_HELPER(UIMM, 0, 16); /* 5 bits signed immediate value */ -EXTRACT_HELPER(SIMM5, 16, 5); +EXTRACT_SHELPER(SIMM5, 16, 5); /* 5 bits signed immediate value */ EXTRACT_HELPER(UIMM5, 16, 5); /* 4 bits unsigned immediate value */ @@ -204,17 +204,6 @@ EXTRACT_HELPER(IMM8, 11, 8); EXTRACT_HELPER(DCMX, 16, 7); EXTRACT_HELPER_SPLIT_3(DCMX_XV, 5, 16, 0, 1, 2, 5, 1, 6, 6); -typedef union _ppc_vsr_t { - uint8_t u8[16]; - uint16_t u16[8]; - uint32_t u32[4]; - uint64_t u64[2]; - float32 f32[4]; - float64 f64[2]; - float128 f128; - Int128 s128; -} ppc_vsr_t; - #if defined(HOST_WORDS_BIGENDIAN) #define VsrB(i) u8[i] #define VsrH(i) u16[i] @@ -229,24 +218,14 @@ typedef union _ppc_vsr_t { static inline void getVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env) { - if (n < 32) { - vsr->VsrD(0) = env->fpr[n]; - vsr->VsrD(1) = env->vsr[n]; - } else { - vsr->u64[0] = env->avr[n - 32].u64[0]; - vsr->u64[1] = env->avr[n - 32].u64[1]; - } + vsr->VsrD(0) = env->vsr[n].u64[0]; + vsr->VsrD(1) = env->vsr[n].u64[1]; } static inline void putVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env) { - if (n < 32) { - env->fpr[n] = vsr->VsrD(0); - env->vsr[n] = vsr->VsrD(1); - } else { - env->avr[n - 32].u64[0] = vsr->u64[0]; - env->avr[n - 32].u64[1] = vsr->u64[1]; - } + env->vsr[n].u64[0] = vsr->VsrD(0); + env->vsr[n].u64[1] = vsr->VsrD(1); } void helper_compute_fprf_float16(CPUPPCState *env, float16 arg); diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index f81327d6cd..ebbb48c42f 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -629,13 +629,15 @@ static int kvm_put_fp(CPUState *cs) for (i = 0; i < 32; i++) { uint64_t vsr[2]; + uint64_t *fpr = cpu_fpr_ptr(&cpu->env, i); + uint64_t *vsrl = cpu_vsrl_ptr(&cpu->env, i); #ifdef HOST_WORDS_BIGENDIAN - vsr[0] = float64_val(env->fpr[i]); - vsr[1] = env->vsr[i]; + vsr[0] = float64_val(*fpr); + vsr[1] = *vsrl; #else - vsr[0] = env->vsr[i]; - vsr[1] = float64_val(env->fpr[i]); + vsr[0] = *vsrl; + vsr[1] = float64_val(*fpr); #endif reg.addr = (uintptr_t) &vsr; reg.id = vsx ? KVM_REG_PPC_VSR(i) : KVM_REG_PPC_FPR(i); @@ -660,7 +662,7 @@ static int kvm_put_fp(CPUState *cs) for (i = 0; i < 32; i++) { reg.id = KVM_REG_PPC_VR(i); - reg.addr = (uintptr_t)&env->avr[i]; + reg.addr = (uintptr_t)cpu_avr_ptr(env, i); ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); if (ret < 0) { DPRINTF("Unable to set VR%d to KVM: %s\n", i, strerror(errno)); @@ -696,6 +698,8 @@ static int kvm_get_fp(CPUState *cs) for (i = 0; i < 32; i++) { uint64_t vsr[2]; + uint64_t *fpr = cpu_fpr_ptr(&cpu->env, i); + uint64_t *vsrl = cpu_vsrl_ptr(&cpu->env, i); reg.addr = (uintptr_t) &vsr; reg.id = vsx ? KVM_REG_PPC_VSR(i) : KVM_REG_PPC_FPR(i); @@ -707,14 +711,14 @@ static int kvm_get_fp(CPUState *cs) return ret; } else { #ifdef HOST_WORDS_BIGENDIAN - env->fpr[i] = vsr[0]; + *fpr = vsr[0]; if (vsx) { - env->vsr[i] = vsr[1]; + *vsrl = vsr[1]; } #else - env->fpr[i] = vsr[1]; + *fpr = vsr[1]; if (vsx) { - env->vsr[i] = vsr[0]; + *vsrl = vsr[0]; } #endif } @@ -732,7 +736,7 @@ static int kvm_get_fp(CPUState *cs) for (i = 0; i < 32; i++) { reg.id = KVM_REG_PPC_VR(i); - reg.addr = (uintptr_t)&env->avr[i]; + reg.addr = (uintptr_t)cpu_avr_ptr(env, i); ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); if (ret < 0) { DPRINTF("Unable to get VR%d from KVM: %s\n", diff --git a/target/ppc/machine.c b/target/ppc/machine.c index e7b3725273..eff30053b0 100644 --- a/target/ppc/machine.c +++ b/target/ppc/machine.c @@ -45,7 +45,7 @@ static int cpu_load_old(QEMUFile *f, void *opaque, int version_id) uint64_t l; } u; u.l = qemu_get_be64(f); - env->fpr[i] = u.d; + *cpu_fpr_ptr(env, i) = u.d; } qemu_get_be32s(f, &fpscr); env->fpscr = fpscr; @@ -138,11 +138,73 @@ static const VMStateInfo vmstate_info_avr = { }; #define VMSTATE_AVR_ARRAY_V(_f, _s, _n, _v) \ - VMSTATE_ARRAY(_f, _s, _n, _v, vmstate_info_avr, ppc_avr_t) + VMSTATE_SUB_ARRAY(_f, _s, 32, _n, _v, vmstate_info_avr, ppc_avr_t) #define VMSTATE_AVR_ARRAY(_f, _s, _n) \ VMSTATE_AVR_ARRAY_V(_f, _s, _n, 0) +static int get_fpr(QEMUFile *f, void *pv, size_t size, + const VMStateField *field) +{ + ppc_vsr_t *v = pv; + + v->u64[0] = qemu_get_be64(f); + + return 0; +} + +static int put_fpr(QEMUFile *f, void *pv, size_t size, + const VMStateField *field, QJSON *vmdesc) +{ + ppc_vsr_t *v = pv; + + qemu_put_be64(f, v->u64[0]); + return 0; +} + +static const VMStateInfo vmstate_info_fpr = { + .name = "fpr", + .get = get_fpr, + .put = put_fpr, +}; + +#define VMSTATE_FPR_ARRAY_V(_f, _s, _n, _v) \ + VMSTATE_SUB_ARRAY(_f, _s, 0, _n, _v, vmstate_info_fpr, ppc_vsr_t) + +#define VMSTATE_FPR_ARRAY(_f, _s, _n) \ + VMSTATE_FPR_ARRAY_V(_f, _s, _n, 0) + +static int get_vsr(QEMUFile *f, void *pv, size_t size, + const VMStateField *field) +{ + ppc_vsr_t *v = pv; + + v->u64[1] = qemu_get_be64(f); + + return 0; +} + +static int put_vsr(QEMUFile *f, void *pv, size_t size, + const VMStateField *field, QJSON *vmdesc) +{ + ppc_vsr_t *v = pv; + + qemu_put_be64(f, v->u64[1]); + return 0; +} + +static const VMStateInfo vmstate_info_vsr = { + .name = "vsr", + .get = get_vsr, + .put = put_vsr, +}; + +#define VMSTATE_VSR_ARRAY_V(_f, _s, _n, _v) \ + VMSTATE_SUB_ARRAY(_f, _s, 0, _n, _v, vmstate_info_vsr, ppc_vsr_t) + +#define VMSTATE_VSR_ARRAY(_f, _s, _n) \ + VMSTATE_VSR_ARRAY_V(_f, _s, _n, 0) + static bool cpu_pre_2_8_migration(void *opaque, int version_id) { PowerPCCPU *cpu = opaque; @@ -354,7 +416,7 @@ static const VMStateDescription vmstate_fpu = { .minimum_version_id = 1, .needed = fpu_needed, .fields = (VMStateField[]) { - VMSTATE_FLOAT64_ARRAY(env.fpr, PowerPCCPU, 32), + VMSTATE_FPR_ARRAY(env.vsr, PowerPCCPU, 32), VMSTATE_UINTTL(env.fpscr, PowerPCCPU), VMSTATE_END_OF_LIST() }, @@ -373,7 +435,7 @@ static const VMStateDescription vmstate_altivec = { .minimum_version_id = 1, .needed = altivec_needed, .fields = (VMStateField[]) { - VMSTATE_AVR_ARRAY(env.avr, PowerPCCPU, 32), + VMSTATE_AVR_ARRAY(env.vsr, PowerPCCPU, 32), VMSTATE_UINT32(env.vscr, PowerPCCPU), VMSTATE_END_OF_LIST() }, @@ -392,7 +454,7 @@ static const VMStateDescription vmstate_vsx = { .minimum_version_id = 1, .needed = vsx_needed, .fields = (VMStateField[]) { - VMSTATE_UINT64_ARRAY(env.vsr, PowerPCCPU, 32), + VMSTATE_VSR_ARRAY(env.vsr, PowerPCCPU, 32), VMSTATE_END_OF_LIST() }, }; diff --git a/target/ppc/monitor.c b/target/ppc/monitor.c index 14915119fc..04deec8030 100644 --- a/target/ppc/monitor.c +++ b/target/ppc/monitor.c @@ -123,8 +123,8 @@ int target_get_monitor_def(CPUState *cs, const char *name, uint64_t *pval) /* Floating point registers */ if ((qemu_tolower(name[0]) == 'f') && - ppc_cpu_get_reg_num(name + 1, ARRAY_SIZE(env->fpr), ®num)) { - *pval = env->fpr[regnum]; + ppc_cpu_get_reg_num(name + 1, 32, ®num)) { + *pval = *cpu_fpr_ptr(env, regnum); return 0; } diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 96894ab9a8..e169c43643 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -55,15 +55,9 @@ /* global register indexes */ static char cpu_reg_names[10*3 + 22*4 /* GPR */ + 10*4 + 22*5 /* SPE GPRh */ - + 10*4 + 22*5 /* FPR */ - + 2*(10*6 + 22*7) /* AVRh, AVRl */ - + 10*5 + 22*6 /* VSR */ + 8*5 /* CRF */]; static TCGv cpu_gpr[32]; static TCGv cpu_gprh[32]; -static TCGv_i64 cpu_fpr[32]; -static TCGv_i64 cpu_avrh[32], cpu_avrl[32]; -static TCGv_i64 cpu_vsr[32]; static TCGv_i32 cpu_crf[8]; static TCGv cpu_nip; static TCGv cpu_msr; @@ -108,39 +102,6 @@ void ppc_translate_init(void) offsetof(CPUPPCState, gprh[i]), p); p += (i < 10) ? 4 : 5; cpu_reg_names_size -= (i < 10) ? 4 : 5; - - snprintf(p, cpu_reg_names_size, "fp%d", i); - cpu_fpr[i] = tcg_global_mem_new_i64(cpu_env, - offsetof(CPUPPCState, fpr[i]), p); - p += (i < 10) ? 4 : 5; - cpu_reg_names_size -= (i < 10) ? 4 : 5; - - snprintf(p, cpu_reg_names_size, "avr%dH", i); -#ifdef HOST_WORDS_BIGENDIAN - cpu_avrh[i] = tcg_global_mem_new_i64(cpu_env, - offsetof(CPUPPCState, avr[i].u64[0]), p); -#else - cpu_avrh[i] = tcg_global_mem_new_i64(cpu_env, - offsetof(CPUPPCState, avr[i].u64[1]), p); -#endif - p += (i < 10) ? 6 : 7; - cpu_reg_names_size -= (i < 10) ? 6 : 7; - - snprintf(p, cpu_reg_names_size, "avr%dL", i); -#ifdef HOST_WORDS_BIGENDIAN - cpu_avrl[i] = tcg_global_mem_new_i64(cpu_env, - offsetof(CPUPPCState, avr[i].u64[1]), p); -#else - cpu_avrl[i] = tcg_global_mem_new_i64(cpu_env, - offsetof(CPUPPCState, avr[i].u64[0]), p); -#endif - p += (i < 10) ? 6 : 7; - cpu_reg_names_size -= (i < 10) ? 6 : 7; - snprintf(p, cpu_reg_names_size, "vsr%d", i); - cpu_vsr[i] = tcg_global_mem_new_i64(cpu_env, - offsetof(CPUPPCState, vsr[i]), p); - p += (i < 10) ? 5 : 6; - cpu_reg_names_size -= (i < 10) ? 5 : 6; } cpu_nip = tcg_global_mem_new(cpu_env, @@ -6699,6 +6660,38 @@ static inline void gen_##name(DisasContext *ctx) \ GEN_TM_PRIV_NOOP(treclaim); GEN_TM_PRIV_NOOP(trechkpt); +static inline void get_fpr(TCGv_i64 dst, int regno) +{ + tcg_gen_ld_i64(dst, cpu_env, offsetof(CPUPPCState, vsr[regno].u64[0])); +} + +static inline void set_fpr(int regno, TCGv_i64 src) +{ + tcg_gen_st_i64(src, cpu_env, offsetof(CPUPPCState, vsr[regno].u64[0])); +} + +static inline void get_avr64(TCGv_i64 dst, int regno, bool high) +{ +#ifdef HOST_WORDS_BIGENDIAN + tcg_gen_ld_i64(dst, cpu_env, offsetof(CPUPPCState, + vsr[32 + regno].u64[(high ? 0 : 1)])); +#else + tcg_gen_ld_i64(dst, cpu_env, offsetof(CPUPPCState, + vsr[32 + regno].u64[(high ? 1 : 0)])); +#endif +} + +static inline void set_avr64(int regno, TCGv_i64 src, bool high) +{ +#ifdef HOST_WORDS_BIGENDIAN + tcg_gen_st_i64(src, cpu_env, offsetof(CPUPPCState, + vsr[32 + regno].u64[(high ? 0 : 1)])); +#else + tcg_gen_st_i64(src, cpu_env, offsetof(CPUPPCState, + vsr[32 + regno].u64[(high ? 1 : 0)])); +#endif +} + #include "translate/fp-impl.inc.c" #include "translate/vmx-impl.inc.c" @@ -7447,7 +7440,7 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, if ((i & (RFPL - 1)) == 0) { cpu_fprintf(f, "FPR%02d", i); } - cpu_fprintf(f, " %016" PRIx64, *((uint64_t *)&env->fpr[i])); + cpu_fprintf(f, " %016" PRIx64, *cpu_fpr_ptr(env, i)); if ((i & (RFPL - 1)) == (RFPL - 1)) { cpu_fprintf(f, "\n"); } diff --git a/target/ppc/translate/dfp-impl.inc.c b/target/ppc/translate/dfp-impl.inc.c index 634ef73b8a..6c556dc2e1 100644 --- a/target/ppc/translate/dfp-impl.inc.c +++ b/target/ppc/translate/dfp-impl.inc.c @@ -3,7 +3,7 @@ static inline TCGv_ptr gen_fprp_ptr(int reg) { TCGv_ptr r = tcg_temp_new_ptr(); - tcg_gen_addi_ptr(r, cpu_env, offsetof(CPUPPCState, fpr[reg])); + tcg_gen_addi_ptr(r, cpu_env, offsetof(CPUPPCState, vsr[reg].u64[0])); return r; } diff --git a/target/ppc/translate/fp-impl.inc.c b/target/ppc/translate/fp-impl.inc.c index 08770ba9f5..0f21a4e477 100644 --- a/target/ppc/translate/fp-impl.inc.c +++ b/target/ppc/translate/fp-impl.inc.c @@ -34,24 +34,37 @@ static void gen_set_cr1_from_fpscr(DisasContext *ctx) #define _GEN_FLOAT_ACB(name, op, op1, op2, isfloat, set_fprf, type) \ static void gen_f##name(DisasContext *ctx) \ { \ + TCGv_i64 t0; \ + TCGv_i64 t1; \ + TCGv_i64 t2; \ + TCGv_i64 t3; \ if (unlikely(!ctx->fpu_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ + t0 = tcg_temp_new_i64(); \ + t1 = tcg_temp_new_i64(); \ + t2 = tcg_temp_new_i64(); \ + t3 = tcg_temp_new_i64(); \ gen_reset_fpstatus(); \ - gen_helper_f##op(cpu_fpr[rD(ctx->opcode)], cpu_env, \ - cpu_fpr[rA(ctx->opcode)], \ - cpu_fpr[rC(ctx->opcode)], cpu_fpr[rB(ctx->opcode)]); \ + get_fpr(t0, rA(ctx->opcode)); \ + get_fpr(t1, rC(ctx->opcode)); \ + get_fpr(t2, rB(ctx->opcode)); \ + gen_helper_f##op(t3, cpu_env, t0, t1, t2); \ if (isfloat) { \ - gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env, \ - cpu_fpr[rD(ctx->opcode)]); \ + gen_helper_frsp(t3, cpu_env, t3); \ } \ + set_fpr(rD(ctx->opcode), t3); \ if (set_fprf) { \ - gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \ + gen_compute_fprf_float64(t3); \ } \ if (unlikely(Rc(ctx->opcode) != 0)) { \ gen_set_cr1_from_fpscr(ctx); \ } \ + tcg_temp_free_i64(t0); \ + tcg_temp_free_i64(t1); \ + tcg_temp_free_i64(t2); \ + tcg_temp_free_i64(t3); \ } #define GEN_FLOAT_ACB(name, op2, set_fprf, type) \ @@ -61,24 +74,33 @@ _GEN_FLOAT_ACB(name##s, name, 0x3B, op2, 1, set_fprf, type); #define _GEN_FLOAT_AB(name, op, op1, op2, inval, isfloat, set_fprf, type) \ static void gen_f##name(DisasContext *ctx) \ { \ + TCGv_i64 t0; \ + TCGv_i64 t1; \ + TCGv_i64 t2; \ if (unlikely(!ctx->fpu_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ + t0 = tcg_temp_new_i64(); \ + t1 = tcg_temp_new_i64(); \ + t2 = tcg_temp_new_i64(); \ gen_reset_fpstatus(); \ - gen_helper_f##op(cpu_fpr[rD(ctx->opcode)], cpu_env, \ - cpu_fpr[rA(ctx->opcode)], \ - cpu_fpr[rB(ctx->opcode)]); \ + get_fpr(t0, rA(ctx->opcode)); \ + get_fpr(t1, rB(ctx->opcode)); \ + gen_helper_f##op(t2, cpu_env, t0, t1); \ if (isfloat) { \ - gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env, \ - cpu_fpr[rD(ctx->opcode)]); \ + gen_helper_frsp(t2, cpu_env, t2); \ } \ + set_fpr(rD(ctx->opcode), t2); \ if (set_fprf) { \ - gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \ + gen_compute_fprf_float64(t2); \ } \ if (unlikely(Rc(ctx->opcode) != 0)) { \ gen_set_cr1_from_fpscr(ctx); \ } \ + tcg_temp_free_i64(t0); \ + tcg_temp_free_i64(t1); \ + tcg_temp_free_i64(t2); \ } #define GEN_FLOAT_AB(name, op2, inval, set_fprf, type) \ _GEN_FLOAT_AB(name, name, 0x3F, op2, inval, 0, set_fprf, type); \ @@ -87,24 +109,33 @@ _GEN_FLOAT_AB(name##s, name, 0x3B, op2, inval, 1, set_fprf, type); #define _GEN_FLOAT_AC(name, op, op1, op2, inval, isfloat, set_fprf, type) \ static void gen_f##name(DisasContext *ctx) \ { \ + TCGv_i64 t0; \ + TCGv_i64 t1; \ + TCGv_i64 t2; \ if (unlikely(!ctx->fpu_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ + t0 = tcg_temp_new_i64(); \ + t1 = tcg_temp_new_i64(); \ + t2 = tcg_temp_new_i64(); \ gen_reset_fpstatus(); \ - gen_helper_f##op(cpu_fpr[rD(ctx->opcode)], cpu_env, \ - cpu_fpr[rA(ctx->opcode)], \ - cpu_fpr[rC(ctx->opcode)]); \ + get_fpr(t0, rA(ctx->opcode)); \ + get_fpr(t1, rC(ctx->opcode)); \ + gen_helper_f##op(t2, cpu_env, t0, t1); \ if (isfloat) { \ - gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env, \ - cpu_fpr[rD(ctx->opcode)]); \ + gen_helper_frsp(t2, cpu_env, t2); \ } \ + set_fpr(rD(ctx->opcode), t2); \ if (set_fprf) { \ - gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \ + gen_compute_fprf_float64(t2); \ } \ if (unlikely(Rc(ctx->opcode) != 0)) { \ gen_set_cr1_from_fpscr(ctx); \ } \ + tcg_temp_free_i64(t0); \ + tcg_temp_free_i64(t1); \ + tcg_temp_free_i64(t2); \ } #define GEN_FLOAT_AC(name, op2, inval, set_fprf, type) \ _GEN_FLOAT_AC(name, name, 0x3F, op2, inval, 0, set_fprf, type); \ @@ -113,37 +144,51 @@ _GEN_FLOAT_AC(name##s, name, 0x3B, op2, inval, 1, set_fprf, type); #define GEN_FLOAT_B(name, op2, op3, set_fprf, type) \ static void gen_f##name(DisasContext *ctx) \ { \ + TCGv_i64 t0; \ + TCGv_i64 t1; \ if (unlikely(!ctx->fpu_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ + t0 = tcg_temp_new_i64(); \ + t1 = tcg_temp_new_i64(); \ gen_reset_fpstatus(); \ - gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \ - cpu_fpr[rB(ctx->opcode)]); \ + get_fpr(t0, rB(ctx->opcode)); \ + gen_helper_f##name(t1, cpu_env, t0); \ + set_fpr(rD(ctx->opcode), t1); \ if (set_fprf) { \ - gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \ + gen_compute_fprf_float64(t1); \ } \ if (unlikely(Rc(ctx->opcode) != 0)) { \ gen_set_cr1_from_fpscr(ctx); \ } \ + tcg_temp_free_i64(t0); \ + tcg_temp_free_i64(t1); \ } #define GEN_FLOAT_BS(name, op1, op2, set_fprf, type) \ static void gen_f##name(DisasContext *ctx) \ { \ + TCGv_i64 t0; \ + TCGv_i64 t1; \ if (unlikely(!ctx->fpu_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ + t0 = tcg_temp_new_i64(); \ + t1 = tcg_temp_new_i64(); \ gen_reset_fpstatus(); \ - gen_helper_f##name(cpu_fpr[rD(ctx->opcode)], cpu_env, \ - cpu_fpr[rB(ctx->opcode)]); \ + get_fpr(t0, rB(ctx->opcode)); \ + gen_helper_f##name(t1, cpu_env, t0); \ + set_fpr(rD(ctx->opcode), t1); \ if (set_fprf) { \ - gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); \ + gen_compute_fprf_float64(t1); \ } \ if (unlikely(Rc(ctx->opcode) != 0)) { \ gen_set_cr1_from_fpscr(ctx); \ } \ + tcg_temp_free_i64(t0); \ + tcg_temp_free_i64(t1); \ } /* fadd - fadds */ @@ -165,19 +210,25 @@ GEN_FLOAT_BS(rsqrte, 0x3F, 0x1A, 1, PPC_FLOAT_FRSQRTE); /* frsqrtes */ static void gen_frsqrtes(DisasContext *ctx) { + TCGv_i64 t0; + TCGv_i64 t1; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); gen_reset_fpstatus(); - gen_helper_frsqrte(cpu_fpr[rD(ctx->opcode)], cpu_env, - cpu_fpr[rB(ctx->opcode)]); - gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env, - cpu_fpr[rD(ctx->opcode)]); - gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); + get_fpr(t0, rB(ctx->opcode)); + gen_helper_frsqrte(t1, cpu_env, t0); + gen_helper_frsp(t1, cpu_env, t1); + set_fpr(rD(ctx->opcode), t1); + gen_compute_fprf_float64(t1); if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_cr1_from_fpscr(ctx); } + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); } /* fsel */ @@ -189,34 +240,47 @@ GEN_FLOAT_AB(sub, 0x14, 0x000007C0, 1, PPC_FLOAT); /* fsqrt */ static void gen_fsqrt(DisasContext *ctx) { + TCGv_i64 t0; + TCGv_i64 t1; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); gen_reset_fpstatus(); - gen_helper_fsqrt(cpu_fpr[rD(ctx->opcode)], cpu_env, - cpu_fpr[rB(ctx->opcode)]); - gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); + get_fpr(t0, rB(ctx->opcode)); + gen_helper_fsqrt(t1, cpu_env, t0); + set_fpr(rD(ctx->opcode), t1); + gen_compute_fprf_float64(t1); if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_cr1_from_fpscr(ctx); } + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); } static void gen_fsqrts(DisasContext *ctx) { + TCGv_i64 t0; + TCGv_i64 t1; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); gen_reset_fpstatus(); - gen_helper_fsqrt(cpu_fpr[rD(ctx->opcode)], cpu_env, - cpu_fpr[rB(ctx->opcode)]); - gen_helper_frsp(cpu_fpr[rD(ctx->opcode)], cpu_env, - cpu_fpr[rD(ctx->opcode)]); - gen_compute_fprf_float64(cpu_fpr[rD(ctx->opcode)]); + get_fpr(t0, rB(ctx->opcode)); + gen_helper_fsqrt(t1, cpu_env, t0); + gen_helper_frsp(t1, cpu_env, t1); + set_fpr(rD(ctx->opcode), t1); + gen_compute_fprf_float64(t1); if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_cr1_from_fpscr(ctx); } + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); } /*** Floating-Point multiply-and-add ***/ @@ -268,21 +332,32 @@ GEN_FLOAT_B(rim, 0x08, 0x0F, 1, PPC_FLOAT_EXT); static void gen_ftdiv(DisasContext *ctx) { + TCGv_i64 t0; + TCGv_i64 t1; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } - gen_helper_ftdiv(cpu_crf[crfD(ctx->opcode)], cpu_fpr[rA(ctx->opcode)], - cpu_fpr[rB(ctx->opcode)]); + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + get_fpr(t0, rA(ctx->opcode)); + get_fpr(t1, rB(ctx->opcode)); + gen_helper_ftdiv(cpu_crf[crfD(ctx->opcode)], t0, t1); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); } static void gen_ftsqrt(DisasContext *ctx) { + TCGv_i64 t0; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } - gen_helper_ftsqrt(cpu_crf[crfD(ctx->opcode)], cpu_fpr[rB(ctx->opcode)]); + t0 = tcg_temp_new_i64(); + get_fpr(t0, rB(ctx->opcode)); + gen_helper_ftsqrt(cpu_crf[crfD(ctx->opcode)], t0); + tcg_temp_free_i64(t0); } @@ -293,32 +368,46 @@ static void gen_ftsqrt(DisasContext *ctx) static void gen_fcmpo(DisasContext *ctx) { TCGv_i32 crf; + TCGv_i64 t0; + TCGv_i64 t1; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); gen_reset_fpstatus(); crf = tcg_const_i32(crfD(ctx->opcode)); - gen_helper_fcmpo(cpu_env, cpu_fpr[rA(ctx->opcode)], - cpu_fpr[rB(ctx->opcode)], crf); + get_fpr(t0, rA(ctx->opcode)); + get_fpr(t1, rB(ctx->opcode)); + gen_helper_fcmpo(cpu_env, t0, t1, crf); tcg_temp_free_i32(crf); gen_helper_float_check_status(cpu_env); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); } /* fcmpu */ static void gen_fcmpu(DisasContext *ctx) { TCGv_i32 crf; + TCGv_i64 t0; + TCGv_i64 t1; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); gen_reset_fpstatus(); crf = tcg_const_i32(crfD(ctx->opcode)); - gen_helper_fcmpu(cpu_env, cpu_fpr[rA(ctx->opcode)], - cpu_fpr[rB(ctx->opcode)], crf); + get_fpr(t0, rA(ctx->opcode)); + get_fpr(t1, rB(ctx->opcode)); + gen_helper_fcmpu(cpu_env, t0, t1, crf); tcg_temp_free_i32(crf); gen_helper_float_check_status(cpu_env); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); } /*** Floating-point move ***/ @@ -326,100 +415,153 @@ static void gen_fcmpu(DisasContext *ctx) /* XXX: beware that fabs never checks for NaNs nor update FPSCR */ static void gen_fabs(DisasContext *ctx) { + TCGv_i64 t0; + TCGv_i64 t1; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } - tcg_gen_andi_i64(cpu_fpr[rD(ctx->opcode)], cpu_fpr[rB(ctx->opcode)], - ~(1ULL << 63)); + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + get_fpr(t0, rB(ctx->opcode)); + tcg_gen_andi_i64(t1, t0, ~(1ULL << 63)); + set_fpr(rD(ctx->opcode), t1); if (unlikely(Rc(ctx->opcode))) { gen_set_cr1_from_fpscr(ctx); } + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); } /* fmr - fmr. */ /* XXX: beware that fmr never checks for NaNs nor update FPSCR */ static void gen_fmr(DisasContext *ctx) { + TCGv_i64 t0; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } - tcg_gen_mov_i64(cpu_fpr[rD(ctx->opcode)], cpu_fpr[rB(ctx->opcode)]); + t0 = tcg_temp_new_i64(); + get_fpr(t0, rB(ctx->opcode)); + set_fpr(rD(ctx->opcode), t0); if (unlikely(Rc(ctx->opcode))) { gen_set_cr1_from_fpscr(ctx); } + tcg_temp_free_i64(t0); } /* fnabs */ /* XXX: beware that fnabs never checks for NaNs nor update FPSCR */ static void gen_fnabs(DisasContext *ctx) { + TCGv_i64 t0; + TCGv_i64 t1; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } - tcg_gen_ori_i64(cpu_fpr[rD(ctx->opcode)], cpu_fpr[rB(ctx->opcode)], - 1ULL << 63); + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + get_fpr(t0, rB(ctx->opcode)); + tcg_gen_ori_i64(t1, t0, 1ULL << 63); + set_fpr(rD(ctx->opcode), t1); if (unlikely(Rc(ctx->opcode))) { gen_set_cr1_from_fpscr(ctx); } + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); } /* fneg */ /* XXX: beware that fneg never checks for NaNs nor update FPSCR */ static void gen_fneg(DisasContext *ctx) { + TCGv_i64 t0; + TCGv_i64 t1; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } - tcg_gen_xori_i64(cpu_fpr[rD(ctx->opcode)], cpu_fpr[rB(ctx->opcode)], - 1ULL << 63); + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + get_fpr(t0, rB(ctx->opcode)); + tcg_gen_xori_i64(t1, t0, 1ULL << 63); + set_fpr(rD(ctx->opcode), t1); if (unlikely(Rc(ctx->opcode))) { gen_set_cr1_from_fpscr(ctx); } + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); } /* fcpsgn: PowerPC 2.05 specification */ /* XXX: beware that fcpsgn never checks for NaNs nor update FPSCR */ static void gen_fcpsgn(DisasContext *ctx) { + TCGv_i64 t0; + TCGv_i64 t1; + TCGv_i64 t2; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } - tcg_gen_deposit_i64(cpu_fpr[rD(ctx->opcode)], cpu_fpr[rA(ctx->opcode)], - cpu_fpr[rB(ctx->opcode)], 0, 63); + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + t2 = tcg_temp_new_i64(); + get_fpr(t0, rA(ctx->opcode)); + get_fpr(t1, rB(ctx->opcode)); + tcg_gen_deposit_i64(t2, t0, t1, 0, 63); + set_fpr(rD(ctx->opcode), t2); if (unlikely(Rc(ctx->opcode))) { gen_set_cr1_from_fpscr(ctx); } + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + tcg_temp_free_i64(t2); } static void gen_fmrgew(DisasContext *ctx) { TCGv_i64 b0; + TCGv_i64 t0; + TCGv_i64 t1; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } b0 = tcg_temp_new_i64(); - tcg_gen_shri_i64(b0, cpu_fpr[rB(ctx->opcode)], 32); - tcg_gen_deposit_i64(cpu_fpr[rD(ctx->opcode)], cpu_fpr[rA(ctx->opcode)], - b0, 0, 32); + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + get_fpr(t0, rB(ctx->opcode)); + tcg_gen_shri_i64(b0, t0, 32); + get_fpr(t0, rA(ctx->opcode)); + tcg_gen_deposit_i64(t1, t0, b0, 0, 32); + set_fpr(rD(ctx->opcode), t1); tcg_temp_free_i64(b0); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); } static void gen_fmrgow(DisasContext *ctx) { + TCGv_i64 t0; + TCGv_i64 t1; + TCGv_i64 t2; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } - tcg_gen_deposit_i64(cpu_fpr[rD(ctx->opcode)], - cpu_fpr[rB(ctx->opcode)], - cpu_fpr[rA(ctx->opcode)], - 32, 32); + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + t2 = tcg_temp_new_i64(); + get_fpr(t0, rB(ctx->opcode)); + get_fpr(t1, rA(ctx->opcode)); + tcg_gen_deposit_i64(t2, t0, t1, 32, 32); + set_fpr(rD(ctx->opcode), t2); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + tcg_temp_free_i64(t2); } /*** Floating-Point status & ctrl register ***/ @@ -458,15 +600,19 @@ static void gen_mcrfs(DisasContext *ctx) /* mffs */ static void gen_mffs(DisasContext *ctx) { + TCGv_i64 t0; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } + t0 = tcg_temp_new_i64(); gen_reset_fpstatus(); - tcg_gen_extu_tl_i64(cpu_fpr[rD(ctx->opcode)], cpu_fpscr); + tcg_gen_extu_tl_i64(t0, cpu_fpscr); + set_fpr(rD(ctx->opcode), t0); if (unlikely(Rc(ctx->opcode))) { gen_set_cr1_from_fpscr(ctx); } + tcg_temp_free_i64(t0); } /* mtfsb0 */ @@ -522,6 +668,7 @@ static void gen_mtfsb1(DisasContext *ctx) static void gen_mtfsf(DisasContext *ctx) { TCGv_i32 t0; + TCGv_i64 t1; int flm, l, w; if (unlikely(!ctx->fpu_enabled)) { @@ -541,7 +688,9 @@ static void gen_mtfsf(DisasContext *ctx) } else { t0 = tcg_const_i32(flm << (w * 8)); } - gen_helper_store_fpscr(cpu_env, cpu_fpr[rB(ctx->opcode)], t0); + t1 = tcg_temp_new_i64(); + get_fpr(t1, rB(ctx->opcode)); + gen_helper_store_fpscr(cpu_env, t1, t0); tcg_temp_free_i32(t0); if (unlikely(Rc(ctx->opcode) != 0)) { tcg_gen_trunc_tl_i32(cpu_crf[1], cpu_fpscr); @@ -549,6 +698,7 @@ static void gen_mtfsf(DisasContext *ctx) } /* We can raise a differed exception */ gen_helper_float_check_status(cpu_env); + tcg_temp_free_i64(t1); } /* mtfsfi */ @@ -588,21 +738,26 @@ static void gen_mtfsfi(DisasContext *ctx) static void glue(gen_, name)(DisasContext *ctx) \ { \ TCGv EA; \ + TCGv_i64 t0; \ if (unlikely(!ctx->fpu_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ gen_set_access_type(ctx, ACCESS_FLOAT); \ EA = tcg_temp_new(); \ + t0 = tcg_temp_new_i64(); \ gen_addr_imm_index(ctx, EA, 0); \ - gen_qemu_##ldop(ctx, cpu_fpr[rD(ctx->opcode)], EA); \ + gen_qemu_##ldop(ctx, t0, EA); \ + set_fpr(rD(ctx->opcode), t0); \ tcg_temp_free(EA); \ + tcg_temp_free_i64(t0); \ } #define GEN_LDUF(name, ldop, opc, type) \ static void glue(gen_, name##u)(DisasContext *ctx) \ { \ TCGv EA; \ + TCGv_i64 t0; \ if (unlikely(!ctx->fpu_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ @@ -613,20 +768,25 @@ static void glue(gen_, name##u)(DisasContext *ctx) } \ gen_set_access_type(ctx, ACCESS_FLOAT); \ EA = tcg_temp_new(); \ + t0 = tcg_temp_new_i64(); \ gen_addr_imm_index(ctx, EA, 0); \ - gen_qemu_##ldop(ctx, cpu_fpr[rD(ctx->opcode)], EA); \ + gen_qemu_##ldop(ctx, t0, EA); \ + set_fpr(rD(ctx->opcode), t0); \ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ tcg_temp_free(EA); \ + tcg_temp_free_i64(t0); \ } #define GEN_LDUXF(name, ldop, opc, type) \ static void glue(gen_, name##ux)(DisasContext *ctx) \ { \ TCGv EA; \ + TCGv_i64 t0; \ if (unlikely(!ctx->fpu_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ + t0 = tcg_temp_new_i64(); \ if (unlikely(rA(ctx->opcode) == 0)) { \ gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); \ return; \ @@ -634,24 +794,30 @@ static void glue(gen_, name##ux)(DisasContext *ctx) gen_set_access_type(ctx, ACCESS_FLOAT); \ EA = tcg_temp_new(); \ gen_addr_reg_index(ctx, EA); \ - gen_qemu_##ldop(ctx, cpu_fpr[rD(ctx->opcode)], EA); \ + gen_qemu_##ldop(ctx, t0, EA); \ + set_fpr(rD(ctx->opcode), t0); \ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ tcg_temp_free(EA); \ + tcg_temp_free_i64(t0); \ } #define GEN_LDXF(name, ldop, opc2, opc3, type) \ static void glue(gen_, name##x)(DisasContext *ctx) \ { \ TCGv EA; \ + TCGv_i64 t0; \ if (unlikely(!ctx->fpu_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ gen_set_access_type(ctx, ACCESS_FLOAT); \ EA = tcg_temp_new(); \ + t0 = tcg_temp_new_i64(); \ gen_addr_reg_index(ctx, EA); \ - gen_qemu_##ldop(ctx, cpu_fpr[rD(ctx->opcode)], EA); \ + gen_qemu_##ldop(ctx, t0, EA); \ + set_fpr(rD(ctx->opcode), t0); \ tcg_temp_free(EA); \ + tcg_temp_free_i64(t0); \ } #define GEN_LDFS(name, ldop, op, type) \ @@ -677,6 +843,7 @@ GEN_LDFS(lfs, ld32fs, 0x10, PPC_FLOAT); static void gen_lfdepx(DisasContext *ctx) { TCGv EA; + TCGv_i64 t0; CHK_SV; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); @@ -684,16 +851,19 @@ static void gen_lfdepx(DisasContext *ctx) } gen_set_access_type(ctx, ACCESS_FLOAT); EA = tcg_temp_new(); + t0 = tcg_temp_new_i64(); gen_addr_reg_index(ctx, EA); - tcg_gen_qemu_ld_i64(cpu_fpr[rD(ctx->opcode)], EA, PPC_TLB_EPID_LOAD, - DEF_MEMOP(MO_Q)); + tcg_gen_qemu_ld_i64(t0, EA, PPC_TLB_EPID_LOAD, DEF_MEMOP(MO_Q)); + set_fpr(rD(ctx->opcode), t0); tcg_temp_free(EA); + tcg_temp_free_i64(t0); } /* lfdp */ static void gen_lfdp(DisasContext *ctx) { TCGv EA; + TCGv_i64 t0; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; @@ -701,24 +871,31 @@ static void gen_lfdp(DisasContext *ctx) gen_set_access_type(ctx, ACCESS_FLOAT); EA = tcg_temp_new(); gen_addr_imm_index(ctx, EA, 0); + t0 = tcg_temp_new_i64(); /* We only need to swap high and low halves. gen_qemu_ld64_i64 does necessary 64-bit byteswap already. */ if (unlikely(ctx->le_mode)) { - gen_qemu_ld64_i64(ctx, cpu_fpr[rD(ctx->opcode) + 1], EA); + gen_qemu_ld64_i64(ctx, t0, EA); + set_fpr(rD(ctx->opcode) + 1, t0); tcg_gen_addi_tl(EA, EA, 8); - gen_qemu_ld64_i64(ctx, cpu_fpr[rD(ctx->opcode)], EA); + gen_qemu_ld64_i64(ctx, t0, EA); + set_fpr(rD(ctx->opcode), t0); } else { - gen_qemu_ld64_i64(ctx, cpu_fpr[rD(ctx->opcode)], EA); + gen_qemu_ld64_i64(ctx, t0, EA); + set_fpr(rD(ctx->opcode), t0); tcg_gen_addi_tl(EA, EA, 8); - gen_qemu_ld64_i64(ctx, cpu_fpr[rD(ctx->opcode) + 1], EA); + gen_qemu_ld64_i64(ctx, t0, EA); + set_fpr(rD(ctx->opcode) + 1, t0); } tcg_temp_free(EA); + tcg_temp_free_i64(t0); } /* lfdpx */ static void gen_lfdpx(DisasContext *ctx) { TCGv EA; + TCGv_i64 t0; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; @@ -726,18 +903,24 @@ static void gen_lfdpx(DisasContext *ctx) gen_set_access_type(ctx, ACCESS_FLOAT); EA = tcg_temp_new(); gen_addr_reg_index(ctx, EA); + t0 = tcg_temp_new_i64(); /* We only need to swap high and low halves. gen_qemu_ld64_i64 does necessary 64-bit byteswap already. */ if (unlikely(ctx->le_mode)) { - gen_qemu_ld64_i64(ctx, cpu_fpr[rD(ctx->opcode) + 1], EA); + gen_qemu_ld64_i64(ctx, t0, EA); + set_fpr(rD(ctx->opcode) + 1, t0); tcg_gen_addi_tl(EA, EA, 8); - gen_qemu_ld64_i64(ctx, cpu_fpr[rD(ctx->opcode)], EA); + gen_qemu_ld64_i64(ctx, t0, EA); + set_fpr(rD(ctx->opcode), t0); } else { - gen_qemu_ld64_i64(ctx, cpu_fpr[rD(ctx->opcode)], EA); + gen_qemu_ld64_i64(ctx, t0, EA); + set_fpr(rD(ctx->opcode), t0); tcg_gen_addi_tl(EA, EA, 8); - gen_qemu_ld64_i64(ctx, cpu_fpr[rD(ctx->opcode) + 1], EA); + gen_qemu_ld64_i64(ctx, t0, EA); + set_fpr(rD(ctx->opcode) + 1, t0); } tcg_temp_free(EA); + tcg_temp_free_i64(t0); } /* lfiwax */ @@ -745,6 +928,7 @@ static void gen_lfiwax(DisasContext *ctx) { TCGv EA; TCGv t0; + TCGv_i64 t1; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; @@ -752,47 +936,59 @@ static void gen_lfiwax(DisasContext *ctx) gen_set_access_type(ctx, ACCESS_FLOAT); EA = tcg_temp_new(); t0 = tcg_temp_new(); + t1 = tcg_temp_new_i64(); gen_addr_reg_index(ctx, EA); gen_qemu_ld32s(ctx, t0, EA); - tcg_gen_ext_tl_i64(cpu_fpr[rD(ctx->opcode)], t0); + tcg_gen_ext_tl_i64(t1, t0); + set_fpr(rD(ctx->opcode), t1); tcg_temp_free(EA); tcg_temp_free(t0); + tcg_temp_free_i64(t1); } /* lfiwzx */ static void gen_lfiwzx(DisasContext *ctx) { TCGv EA; + TCGv_i64 t0; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } gen_set_access_type(ctx, ACCESS_FLOAT); EA = tcg_temp_new(); + t0 = tcg_temp_new_i64(); gen_addr_reg_index(ctx, EA); - gen_qemu_ld32u_i64(ctx, cpu_fpr[rD(ctx->opcode)], EA); + gen_qemu_ld32u_i64(ctx, t0, EA); + set_fpr(rD(ctx->opcode), t0); tcg_temp_free(EA); + tcg_temp_free_i64(t0); } /*** Floating-point store ***/ #define GEN_STF(name, stop, opc, type) \ static void glue(gen_, name)(DisasContext *ctx) \ { \ TCGv EA; \ + TCGv_i64 t0; \ if (unlikely(!ctx->fpu_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ gen_set_access_type(ctx, ACCESS_FLOAT); \ EA = tcg_temp_new(); \ + t0 = tcg_temp_new_i64(); \ gen_addr_imm_index(ctx, EA, 0); \ - gen_qemu_##stop(ctx, cpu_fpr[rS(ctx->opcode)], EA); \ + get_fpr(t0, rS(ctx->opcode)); \ + gen_qemu_##stop(ctx, t0, EA); \ tcg_temp_free(EA); \ + tcg_temp_free_i64(t0); \ } #define GEN_STUF(name, stop, opc, type) \ static void glue(gen_, name##u)(DisasContext *ctx) \ { \ TCGv EA; \ + TCGv_i64 t0; \ if (unlikely(!ctx->fpu_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ @@ -803,16 +999,20 @@ static void glue(gen_, name##u)(DisasContext *ctx) } \ gen_set_access_type(ctx, ACCESS_FLOAT); \ EA = tcg_temp_new(); \ + t0 = tcg_temp_new_i64(); \ gen_addr_imm_index(ctx, EA, 0); \ - gen_qemu_##stop(ctx, cpu_fpr[rS(ctx->opcode)], EA); \ + get_fpr(t0, rS(ctx->opcode)); \ + gen_qemu_##stop(ctx, t0, EA); \ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ tcg_temp_free(EA); \ + tcg_temp_free_i64(t0); \ } #define GEN_STUXF(name, stop, opc, type) \ static void glue(gen_, name##ux)(DisasContext *ctx) \ { \ TCGv EA; \ + TCGv_i64 t0; \ if (unlikely(!ctx->fpu_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ @@ -823,25 +1023,32 @@ static void glue(gen_, name##ux)(DisasContext *ctx) } \ gen_set_access_type(ctx, ACCESS_FLOAT); \ EA = tcg_temp_new(); \ + t0 = tcg_temp_new_i64(); \ gen_addr_reg_index(ctx, EA); \ - gen_qemu_##stop(ctx, cpu_fpr[rS(ctx->opcode)], EA); \ + get_fpr(t0, rS(ctx->opcode)); \ + gen_qemu_##stop(ctx, t0, EA); \ tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); \ tcg_temp_free(EA); \ + tcg_temp_free_i64(t0); \ } #define GEN_STXF(name, stop, opc2, opc3, type) \ static void glue(gen_, name##x)(DisasContext *ctx) \ { \ TCGv EA; \ + TCGv_i64 t0; \ if (unlikely(!ctx->fpu_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_FPU); \ return; \ } \ gen_set_access_type(ctx, ACCESS_FLOAT); \ EA = tcg_temp_new(); \ + t0 = tcg_temp_new_i64(); \ gen_addr_reg_index(ctx, EA); \ - gen_qemu_##stop(ctx, cpu_fpr[rS(ctx->opcode)], EA); \ + get_fpr(t0, rS(ctx->opcode)); \ + gen_qemu_##stop(ctx, t0, EA); \ tcg_temp_free(EA); \ + tcg_temp_free_i64(t0); \ } #define GEN_STFS(name, stop, op, type) \ @@ -867,6 +1074,7 @@ GEN_STFS(stfs, st32fs, 0x14, PPC_FLOAT); static void gen_stfdepx(DisasContext *ctx) { TCGv EA; + TCGv_i64 t0; CHK_SV; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); @@ -874,60 +1082,76 @@ static void gen_stfdepx(DisasContext *ctx) } gen_set_access_type(ctx, ACCESS_FLOAT); EA = tcg_temp_new(); + t0 = tcg_temp_new_i64(); gen_addr_reg_index(ctx, EA); - tcg_gen_qemu_st_i64(cpu_fpr[rD(ctx->opcode)], EA, PPC_TLB_EPID_STORE, - DEF_MEMOP(MO_Q)); + get_fpr(t0, rD(ctx->opcode)); + tcg_gen_qemu_st_i64(t0, EA, PPC_TLB_EPID_STORE, DEF_MEMOP(MO_Q)); tcg_temp_free(EA); + tcg_temp_free_i64(t0); } /* stfdp */ static void gen_stfdp(DisasContext *ctx) { TCGv EA; + TCGv_i64 t0; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } gen_set_access_type(ctx, ACCESS_FLOAT); EA = tcg_temp_new(); + t0 = tcg_temp_new_i64(); gen_addr_imm_index(ctx, EA, 0); /* We only need to swap high and low halves. gen_qemu_st64_i64 does necessary 64-bit byteswap already. */ if (unlikely(ctx->le_mode)) { - gen_qemu_st64_i64(ctx, cpu_fpr[rD(ctx->opcode) + 1], EA); + get_fpr(t0, rD(ctx->opcode) + 1); + gen_qemu_st64_i64(ctx, t0, EA); tcg_gen_addi_tl(EA, EA, 8); - gen_qemu_st64_i64(ctx, cpu_fpr[rD(ctx->opcode)], EA); + get_fpr(t0, rD(ctx->opcode)); + gen_qemu_st64_i64(ctx, t0, EA); } else { - gen_qemu_st64_i64(ctx, cpu_fpr[rD(ctx->opcode)], EA); + get_fpr(t0, rD(ctx->opcode)); + gen_qemu_st64_i64(ctx, t0, EA); tcg_gen_addi_tl(EA, EA, 8); - gen_qemu_st64_i64(ctx, cpu_fpr[rD(ctx->opcode) + 1], EA); + get_fpr(t0, rD(ctx->opcode) + 1); + gen_qemu_st64_i64(ctx, t0, EA); } tcg_temp_free(EA); + tcg_temp_free_i64(t0); } /* stfdpx */ static void gen_stfdpx(DisasContext *ctx) { TCGv EA; + TCGv_i64 t0; if (unlikely(!ctx->fpu_enabled)) { gen_exception(ctx, POWERPC_EXCP_FPU); return; } gen_set_access_type(ctx, ACCESS_FLOAT); EA = tcg_temp_new(); + t0 = tcg_temp_new_i64(); gen_addr_reg_index(ctx, EA); /* We only need to swap high and low halves. gen_qemu_st64_i64 does necessary 64-bit byteswap already. */ if (unlikely(ctx->le_mode)) { - gen_qemu_st64_i64(ctx, cpu_fpr[rD(ctx->opcode) + 1], EA); + get_fpr(t0, rD(ctx->opcode) + 1); + gen_qemu_st64_i64(ctx, t0, EA); tcg_gen_addi_tl(EA, EA, 8); - gen_qemu_st64_i64(ctx, cpu_fpr[rD(ctx->opcode)], EA); + get_fpr(t0, rD(ctx->opcode)); + gen_qemu_st64_i64(ctx, t0, EA); } else { - gen_qemu_st64_i64(ctx, cpu_fpr[rD(ctx->opcode)], EA); + get_fpr(t0, rD(ctx->opcode)); + gen_qemu_st64_i64(ctx, t0, EA); tcg_gen_addi_tl(EA, EA, 8); - gen_qemu_st64_i64(ctx, cpu_fpr[rD(ctx->opcode) + 1], EA); + get_fpr(t0, rD(ctx->opcode) + 1); + gen_qemu_st64_i64(ctx, t0, EA); } tcg_temp_free(EA); + tcg_temp_free_i64(t0); } /* Optional: */ @@ -949,13 +1173,18 @@ static void gen_lfq(DisasContext *ctx) { int rd = rD(ctx->opcode); TCGv t0; + TCGv_i64 t1; gen_set_access_type(ctx, ACCESS_FLOAT); t0 = tcg_temp_new(); + t1 = tcg_temp_new_i64(); gen_addr_imm_index(ctx, t0, 0); - gen_qemu_ld64_i64(ctx, cpu_fpr[rd], t0); + gen_qemu_ld64_i64(ctx, t1, t0); + set_fpr(rd, t1); gen_addr_add(ctx, t0, t0, 8); - gen_qemu_ld64_i64(ctx, cpu_fpr[(rd + 1) % 32], t0); + gen_qemu_ld64_i64(ctx, t1, t0); + set_fpr((rd + 1) % 32, t1); tcg_temp_free(t0); + tcg_temp_free_i64(t1); } /* lfqu */ @@ -964,17 +1193,22 @@ static void gen_lfqu(DisasContext *ctx) int ra = rA(ctx->opcode); int rd = rD(ctx->opcode); TCGv t0, t1; + TCGv_i64 t2; gen_set_access_type(ctx, ACCESS_FLOAT); t0 = tcg_temp_new(); t1 = tcg_temp_new(); + t2 = tcg_temp_new_i64(); gen_addr_imm_index(ctx, t0, 0); - gen_qemu_ld64_i64(ctx, cpu_fpr[rd], t0); + gen_qemu_ld64_i64(ctx, t2, t0); + set_fpr(rd, t2); gen_addr_add(ctx, t1, t0, 8); - gen_qemu_ld64_i64(ctx, cpu_fpr[(rd + 1) % 32], t1); + gen_qemu_ld64_i64(ctx, t2, t1); + set_fpr((rd + 1) % 32, t2); if (ra != 0) tcg_gen_mov_tl(cpu_gpr[ra], t0); tcg_temp_free(t0); tcg_temp_free(t1); + tcg_temp_free_i64(t2); } /* lfqux */ @@ -984,16 +1218,21 @@ static void gen_lfqux(DisasContext *ctx) int rd = rD(ctx->opcode); gen_set_access_type(ctx, ACCESS_FLOAT); TCGv t0, t1; + TCGv_i64 t2; + t2 = tcg_temp_new_i64(); t0 = tcg_temp_new(); gen_addr_reg_index(ctx, t0); - gen_qemu_ld64_i64(ctx, cpu_fpr[rd], t0); + gen_qemu_ld64_i64(ctx, t2, t0); + set_fpr(rd, t2); t1 = tcg_temp_new(); gen_addr_add(ctx, t1, t0, 8); - gen_qemu_ld64_i64(ctx, cpu_fpr[(rd + 1) % 32], t1); + gen_qemu_ld64_i64(ctx, t2, t1); + set_fpr((rd + 1) % 32, t2); tcg_temp_free(t1); if (ra != 0) tcg_gen_mov_tl(cpu_gpr[ra], t0); tcg_temp_free(t0); + tcg_temp_free_i64(t2); } /* lfqx */ @@ -1001,13 +1240,18 @@ static void gen_lfqx(DisasContext *ctx) { int rd = rD(ctx->opcode); TCGv t0; + TCGv_i64 t1; gen_set_access_type(ctx, ACCESS_FLOAT); t0 = tcg_temp_new(); + t1 = tcg_temp_new_i64(); gen_addr_reg_index(ctx, t0); - gen_qemu_ld64_i64(ctx, cpu_fpr[rd], t0); + gen_qemu_ld64_i64(ctx, t1, t0); + set_fpr(rd, t1); gen_addr_add(ctx, t0, t0, 8); - gen_qemu_ld64_i64(ctx, cpu_fpr[(rd + 1) % 32], t0); + gen_qemu_ld64_i64(ctx, t1, t0); + set_fpr((rd + 1) % 32, t1); tcg_temp_free(t0); + tcg_temp_free_i64(t1); } /* stfq */ @@ -1015,13 +1259,18 @@ static void gen_stfq(DisasContext *ctx) { int rd = rD(ctx->opcode); TCGv t0; + TCGv_i64 t1; gen_set_access_type(ctx, ACCESS_FLOAT); t0 = tcg_temp_new(); + t1 = tcg_temp_new_i64(); gen_addr_imm_index(ctx, t0, 0); - gen_qemu_st64_i64(ctx, cpu_fpr[rd], t0); + get_fpr(t1, rd); + gen_qemu_st64_i64(ctx, t1, t0); gen_addr_add(ctx, t0, t0, 8); - gen_qemu_st64_i64(ctx, cpu_fpr[(rd + 1) % 32], t0); + get_fpr(t1, (rd + 1) % 32); + gen_qemu_st64_i64(ctx, t1, t0); tcg_temp_free(t0); + tcg_temp_free_i64(t1); } /* stfqu */ @@ -1030,17 +1279,23 @@ static void gen_stfqu(DisasContext *ctx) int ra = rA(ctx->opcode); int rd = rD(ctx->opcode); TCGv t0, t1; + TCGv_i64 t2; gen_set_access_type(ctx, ACCESS_FLOAT); + t2 = tcg_temp_new_i64(); t0 = tcg_temp_new(); gen_addr_imm_index(ctx, t0, 0); - gen_qemu_st64_i64(ctx, cpu_fpr[rd], t0); + get_fpr(t2, rd); + gen_qemu_st64_i64(ctx, t2, t0); t1 = tcg_temp_new(); gen_addr_add(ctx, t1, t0, 8); - gen_qemu_st64_i64(ctx, cpu_fpr[(rd + 1) % 32], t1); + get_fpr(t2, (rd + 1) % 32); + gen_qemu_st64_i64(ctx, t2, t1); tcg_temp_free(t1); - if (ra != 0) + if (ra != 0) { tcg_gen_mov_tl(cpu_gpr[ra], t0); + } tcg_temp_free(t0); + tcg_temp_free_i64(t2); } /* stfqux */ @@ -1049,17 +1304,23 @@ static void gen_stfqux(DisasContext *ctx) int ra = rA(ctx->opcode); int rd = rD(ctx->opcode); TCGv t0, t1; + TCGv_i64 t2; gen_set_access_type(ctx, ACCESS_FLOAT); + t2 = tcg_temp_new_i64(); t0 = tcg_temp_new(); gen_addr_reg_index(ctx, t0); - gen_qemu_st64_i64(ctx, cpu_fpr[rd], t0); + get_fpr(t2, rd); + gen_qemu_st64_i64(ctx, t2, t0); t1 = tcg_temp_new(); gen_addr_add(ctx, t1, t0, 8); - gen_qemu_st64_i64(ctx, cpu_fpr[(rd + 1) % 32], t1); + get_fpr(t2, (rd + 1) % 32); + gen_qemu_st64_i64(ctx, t2, t1); tcg_temp_free(t1); - if (ra != 0) + if (ra != 0) { tcg_gen_mov_tl(cpu_gpr[ra], t0); + } tcg_temp_free(t0); + tcg_temp_free_i64(t2); } /* stfqx */ @@ -1067,13 +1328,18 @@ static void gen_stfqx(DisasContext *ctx) { int rd = rD(ctx->opcode); TCGv t0; + TCGv_i64 t1; gen_set_access_type(ctx, ACCESS_FLOAT); + t1 = tcg_temp_new_i64(); t0 = tcg_temp_new(); gen_addr_reg_index(ctx, t0); - gen_qemu_st64_i64(ctx, cpu_fpr[rd], t0); + get_fpr(t1, rd); + gen_qemu_st64_i64(ctx, t1, t0); gen_addr_add(ctx, t0, t0, 8); - gen_qemu_st64_i64(ctx, cpu_fpr[(rd + 1) % 32], t0); + get_fpr(t1, (rd + 1) % 32); + gen_qemu_st64_i64(ctx, t1, t0); tcg_temp_free(t0); + tcg_temp_free_i64(t1); } #undef _GEN_FLOAT_ACB diff --git a/target/ppc/translate/vmx-impl.inc.c b/target/ppc/translate/vmx-impl.inc.c index 3cb6fc2926..f99d0284c2 100644 --- a/target/ppc/translate/vmx-impl.inc.c +++ b/target/ppc/translate/vmx-impl.inc.c @@ -10,60 +10,79 @@ static inline TCGv_ptr gen_avr_ptr(int reg) { TCGv_ptr r = tcg_temp_new_ptr(); - tcg_gen_addi_ptr(r, cpu_env, offsetof(CPUPPCState, avr[reg])); + tcg_gen_addi_ptr(r, cpu_env, offsetof(CPUPPCState, vsr[32 + reg].u64[0])); return r; } +static inline long avr64_offset(int reg, bool high) +{ + return offsetof(CPUPPCState, vsr[32 + reg].u64[(high ? 0 : 1)]); +} + #define GEN_VR_LDX(name, opc2, opc3) \ static void glue(gen_, name)(DisasContext *ctx) \ { \ TCGv EA; \ + TCGv_i64 avr; \ if (unlikely(!ctx->altivec_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_VPU); \ return; \ } \ gen_set_access_type(ctx, ACCESS_INT); \ + avr = tcg_temp_new_i64(); \ EA = tcg_temp_new(); \ gen_addr_reg_index(ctx, EA); \ tcg_gen_andi_tl(EA, EA, ~0xf); \ /* We only need to swap high and low halves. gen_qemu_ld64_i64 does \ necessary 64-bit byteswap already. */ \ if (ctx->le_mode) { \ - gen_qemu_ld64_i64(ctx, cpu_avrl[rD(ctx->opcode)], EA); \ + gen_qemu_ld64_i64(ctx, avr, EA); \ + set_avr64(rD(ctx->opcode), avr, false); \ tcg_gen_addi_tl(EA, EA, 8); \ - gen_qemu_ld64_i64(ctx, cpu_avrh[rD(ctx->opcode)], EA); \ + gen_qemu_ld64_i64(ctx, avr, EA); \ + set_avr64(rD(ctx->opcode), avr, true); \ } else { \ - gen_qemu_ld64_i64(ctx, cpu_avrh[rD(ctx->opcode)], EA); \ + gen_qemu_ld64_i64(ctx, avr, EA); \ + set_avr64(rD(ctx->opcode), avr, true); \ tcg_gen_addi_tl(EA, EA, 8); \ - gen_qemu_ld64_i64(ctx, cpu_avrl[rD(ctx->opcode)], EA); \ + gen_qemu_ld64_i64(ctx, avr, EA); \ + set_avr64(rD(ctx->opcode), avr, false); \ } \ tcg_temp_free(EA); \ + tcg_temp_free_i64(avr); \ } #define GEN_VR_STX(name, opc2, opc3) \ static void gen_st##name(DisasContext *ctx) \ { \ TCGv EA; \ + TCGv_i64 avr; \ if (unlikely(!ctx->altivec_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_VPU); \ return; \ } \ gen_set_access_type(ctx, ACCESS_INT); \ + avr = tcg_temp_new_i64(); \ EA = tcg_temp_new(); \ gen_addr_reg_index(ctx, EA); \ tcg_gen_andi_tl(EA, EA, ~0xf); \ /* We only need to swap high and low halves. gen_qemu_st64_i64 does \ necessary 64-bit byteswap already. */ \ if (ctx->le_mode) { \ - gen_qemu_st64_i64(ctx, cpu_avrl[rD(ctx->opcode)], EA); \ + get_avr64(avr, rD(ctx->opcode), false); \ + gen_qemu_st64_i64(ctx, avr, EA); \ tcg_gen_addi_tl(EA, EA, 8); \ - gen_qemu_st64_i64(ctx, cpu_avrh[rD(ctx->opcode)], EA); \ + get_avr64(avr, rD(ctx->opcode), true); \ + gen_qemu_st64_i64(ctx, avr, EA); \ } else { \ - gen_qemu_st64_i64(ctx, cpu_avrh[rD(ctx->opcode)], EA); \ + get_avr64(avr, rD(ctx->opcode), true); \ + gen_qemu_st64_i64(ctx, avr, EA); \ tcg_gen_addi_tl(EA, EA, 8); \ - gen_qemu_st64_i64(ctx, cpu_avrl[rD(ctx->opcode)], EA); \ + get_avr64(avr, rD(ctx->opcode), false); \ + gen_qemu_st64_i64(ctx, avr, EA); \ } \ tcg_temp_free(EA); \ + tcg_temp_free_i64(avr); \ } #define GEN_VR_LVE(name, opc2, opc3, size) \ @@ -159,15 +178,20 @@ static void gen_lvsr(DisasContext *ctx) static void gen_mfvscr(DisasContext *ctx) { TCGv_i32 t; + TCGv_i64 avr; if (unlikely(!ctx->altivec_enabled)) { gen_exception(ctx, POWERPC_EXCP_VPU); return; } - tcg_gen_movi_i64(cpu_avrh[rD(ctx->opcode)], 0); + avr = tcg_temp_new_i64(); + tcg_gen_movi_i64(avr, 0); + set_avr64(rD(ctx->opcode), avr, true); t = tcg_temp_new_i32(); tcg_gen_ld_i32(t, cpu_env, offsetof(CPUPPCState, vscr)); - tcg_gen_extu_i32_i64(cpu_avrl[rD(ctx->opcode)], t); + tcg_gen_extu_i32_i64(avr, t); + set_avr64(rD(ctx->opcode), avr, false); tcg_temp_free_i32(t); + tcg_temp_free_i64(avr); } static void gen_mtvscr(DisasContext *ctx) @@ -185,9 +209,10 @@ static void gen_mtvscr(DisasContext *ctx) #define GEN_VX_VMUL10(name, add_cin, ret_carry) \ static void glue(gen_, name)(DisasContext *ctx) \ { \ - TCGv_i64 t0 = tcg_temp_new_i64(); \ - TCGv_i64 t1 = tcg_temp_new_i64(); \ - TCGv_i64 t2 = tcg_temp_new_i64(); \ + TCGv_i64 t0; \ + TCGv_i64 t1; \ + TCGv_i64 t2; \ + TCGv_i64 avr; \ TCGv_i64 ten, z; \ \ if (unlikely(!ctx->altivec_enabled)) { \ @@ -195,30 +220,43 @@ static void glue(gen_, name)(DisasContext *ctx) \ return; \ } \ \ + t0 = tcg_temp_new_i64(); \ + t1 = tcg_temp_new_i64(); \ + t2 = tcg_temp_new_i64(); \ + avr = tcg_temp_new_i64(); \ ten = tcg_const_i64(10); \ z = tcg_const_i64(0); \ \ if (add_cin) { \ - tcg_gen_mulu2_i64(t0, t1, cpu_avrl[rA(ctx->opcode)], ten); \ - tcg_gen_andi_i64(t2, cpu_avrl[rB(ctx->opcode)], 0xF); \ - tcg_gen_add2_i64(cpu_avrl[rD(ctx->opcode)], t2, t0, t1, t2, z); \ + get_avr64(avr, rA(ctx->opcode), false); \ + tcg_gen_mulu2_i64(t0, t1, avr, ten); \ + get_avr64(avr, rB(ctx->opcode), false); \ + tcg_gen_andi_i64(t2, avr, 0xF); \ + tcg_gen_add2_i64(avr, t2, t0, t1, t2, z); \ + set_avr64(rD(ctx->opcode), avr, false); \ } else { \ - tcg_gen_mulu2_i64(cpu_avrl[rD(ctx->opcode)], t2, \ - cpu_avrl[rA(ctx->opcode)], ten); \ + get_avr64(avr, rA(ctx->opcode), false); \ + tcg_gen_mulu2_i64(avr, t2, avr, ten); \ + set_avr64(rD(ctx->opcode), avr, false); \ } \ \ if (ret_carry) { \ - tcg_gen_mulu2_i64(t0, t1, cpu_avrh[rA(ctx->opcode)], ten); \ - tcg_gen_add2_i64(t0, cpu_avrl[rD(ctx->opcode)], t0, t1, t2, z); \ - tcg_gen_movi_i64(cpu_avrh[rD(ctx->opcode)], 0); \ + get_avr64(avr, rA(ctx->opcode), true); \ + tcg_gen_mulu2_i64(t0, t1, avr, ten); \ + tcg_gen_add2_i64(t0, avr, t0, t1, t2, z); \ + set_avr64(rD(ctx->opcode), avr, false); \ + set_avr64(rD(ctx->opcode), z, true); \ } else { \ - tcg_gen_mul_i64(t0, cpu_avrh[rA(ctx->opcode)], ten); \ - tcg_gen_add_i64(cpu_avrh[rD(ctx->opcode)], t0, t2); \ + get_avr64(avr, rA(ctx->opcode), true); \ + tcg_gen_mul_i64(t0, avr, ten); \ + tcg_gen_add_i64(avr, t0, t2); \ + set_avr64(rD(ctx->opcode), avr, true); \ } \ \ tcg_temp_free_i64(t0); \ tcg_temp_free_i64(t1); \ tcg_temp_free_i64(t2); \ + tcg_temp_free_i64(avr); \ tcg_temp_free_i64(ten); \ tcg_temp_free_i64(z); \ } \ @@ -232,12 +270,31 @@ GEN_VX_VMUL10(vmul10ecuq, 1, 1); #define GEN_VX_LOGICAL(name, tcg_op, opc2, opc3) \ static void glue(gen_, name)(DisasContext *ctx) \ { \ + TCGv_i64 t0; \ + TCGv_i64 t1; \ + TCGv_i64 avr; \ + \ if (unlikely(!ctx->altivec_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_VPU); \ return; \ } \ - tcg_op(cpu_avrh[rD(ctx->opcode)], cpu_avrh[rA(ctx->opcode)], cpu_avrh[rB(ctx->opcode)]); \ - tcg_op(cpu_avrl[rD(ctx->opcode)], cpu_avrl[rA(ctx->opcode)], cpu_avrl[rB(ctx->opcode)]); \ + t0 = tcg_temp_new_i64(); \ + t1 = tcg_temp_new_i64(); \ + avr = tcg_temp_new_i64(); \ + \ + get_avr64(t0, rA(ctx->opcode), true); \ + get_avr64(t1, rB(ctx->opcode), true); \ + tcg_op(avr, t0, t1); \ + set_avr64(rD(ctx->opcode), avr, true); \ + \ + get_avr64(t0, rA(ctx->opcode), false); \ + get_avr64(t1, rB(ctx->opcode), false); \ + tcg_op(avr, t0, t1); \ + set_avr64(rD(ctx->opcode), avr, false); \ + \ + tcg_temp_free_i64(t0); \ + tcg_temp_free_i64(t1); \ + tcg_temp_free_i64(avr); \ } GEN_VX_LOGICAL(vand, tcg_gen_and_i64, 2, 16); @@ -406,6 +463,7 @@ GEN_VXFORM(vmrglw, 6, 6); static void gen_vmrgew(DisasContext *ctx) { TCGv_i64 tmp; + TCGv_i64 avr; int VT, VA, VB; if (unlikely(!ctx->altivec_enabled)) { gen_exception(ctx, POWERPC_EXCP_VPU); @@ -415,15 +473,28 @@ static void gen_vmrgew(DisasContext *ctx) VA = rA(ctx->opcode); VB = rB(ctx->opcode); tmp = tcg_temp_new_i64(); - tcg_gen_shri_i64(tmp, cpu_avrh[VB], 32); - tcg_gen_deposit_i64(cpu_avrh[VT], cpu_avrh[VA], tmp, 0, 32); - tcg_gen_shri_i64(tmp, cpu_avrl[VB], 32); - tcg_gen_deposit_i64(cpu_avrl[VT], cpu_avrl[VA], tmp, 0, 32); + avr = tcg_temp_new_i64(); + + get_avr64(avr, VB, true); + tcg_gen_shri_i64(tmp, avr, 32); + get_avr64(avr, VA, true); + tcg_gen_deposit_i64(avr, avr, tmp, 0, 32); + set_avr64(VT, avr, true); + + get_avr64(avr, VB, false); + tcg_gen_shri_i64(tmp, avr, 32); + get_avr64(avr, VA, false); + tcg_gen_deposit_i64(avr, avr, tmp, 0, 32); + set_avr64(VT, avr, false); + tcg_temp_free_i64(tmp); + tcg_temp_free_i64(avr); } static void gen_vmrgow(DisasContext *ctx) { + TCGv_i64 t0, t1; + TCGv_i64 avr; int VT, VA, VB; if (unlikely(!ctx->altivec_enabled)) { gen_exception(ctx, POWERPC_EXCP_VPU); @@ -432,9 +503,23 @@ static void gen_vmrgow(DisasContext *ctx) VT = rD(ctx->opcode); VA = rA(ctx->opcode); VB = rB(ctx->opcode); - - tcg_gen_deposit_i64(cpu_avrh[VT], cpu_avrh[VB], cpu_avrh[VA], 32, 32); - tcg_gen_deposit_i64(cpu_avrl[VT], cpu_avrl[VB], cpu_avrl[VA], 32, 32); + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); + avr = tcg_temp_new_i64(); + + get_avr64(t0, VB, true); + get_avr64(t1, VA, true); + tcg_gen_deposit_i64(avr, t0, t1, 32, 32); + set_avr64(VT, avr, true); + + get_avr64(t0, VB, false); + get_avr64(t1, VA, false); + tcg_gen_deposit_i64(avr, t0, t1, 32, 32); + set_avr64(VT, avr, false); + + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + tcg_temp_free_i64(avr); } GEN_VXFORM(vmuloub, 4, 0); @@ -790,7 +875,7 @@ static void glue(gen_, name)(DisasContext *ctx) \ { \ TCGv_ptr rb, rd; \ uint8_t uimm = UIMM4(ctx->opcode); \ - TCGv_i32 t0 = tcg_temp_new_i32(); \ + TCGv_i32 t0; \ if (unlikely(!ctx->altivec_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_VPU); \ return; \ @@ -798,6 +883,7 @@ static void glue(gen_, name)(DisasContext *ctx) \ if (uimm > splat_max) { \ uimm = 0; \ } \ + t0 = tcg_temp_new_i32(); \ tcg_gen_movi_i32(t0, uimm); \ rb = gen_avr_ptr(rB(ctx->opcode)); \ rd = gen_avr_ptr(rD(ctx->opcode)); \ diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c index 85ed135d44..ed4fdceacf 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -1,20 +1,48 @@ /*** VSX extension ***/ -static inline TCGv_i64 cpu_vsrh(int n) +static inline void get_vsr(TCGv_i64 dst, int n) +{ + tcg_gen_ld_i64(dst, cpu_env, offsetof(CPUPPCState, vsr[n].u64[1])); +} + +static inline void set_vsr(int n, TCGv_i64 src) +{ + tcg_gen_st_i64(src, cpu_env, offsetof(CPUPPCState, vsr[n].u64[1])); +} + +static inline void get_cpu_vsrh(TCGv_i64 dst, int n) +{ + if (n < 32) { + get_fpr(dst, n); + } else { + get_avr64(dst, n - 32, true); + } +} + +static inline void get_cpu_vsrl(TCGv_i64 dst, int n) +{ + if (n < 32) { + get_vsr(dst, n); + } else { + get_avr64(dst, n - 32, false); + } +} + +static inline void set_cpu_vsrh(int n, TCGv_i64 src) { if (n < 32) { - return cpu_fpr[n]; + set_fpr(n, src); } else { - return cpu_avrh[n-32]; + set_avr64(n - 32, src, true); } } -static inline TCGv_i64 cpu_vsrl(int n) +static inline void set_cpu_vsrl(int n, TCGv_i64 src) { if (n < 32) { - return cpu_vsr[n]; + set_vsr(n, src); } else { - return cpu_avrl[n-32]; + set_avr64(n - 32, src, false); } } @@ -22,16 +50,20 @@ static inline TCGv_i64 cpu_vsrl(int n) static void gen_##name(DisasContext *ctx) \ { \ TCGv EA; \ + TCGv_i64 t0; \ if (unlikely(!ctx->vsx_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_VSXU); \ return; \ } \ + t0 = tcg_temp_new_i64(); \ gen_set_access_type(ctx, ACCESS_INT); \ EA = tcg_temp_new(); \ gen_addr_reg_index(ctx, EA); \ - gen_qemu_##operation(ctx, cpu_vsrh(xT(ctx->opcode)), EA); \ + gen_qemu_##operation(ctx, t0, EA); \ + set_cpu_vsrh(xT(ctx->opcode), t0); \ /* NOTE: cpu_vsrl is undefined */ \ tcg_temp_free(EA); \ + tcg_temp_free_i64(t0); \ } VSX_LOAD_SCALAR(lxsdx, ld64_i64) @@ -44,43 +76,60 @@ VSX_LOAD_SCALAR(lxsspx, ld32fs) static void gen_lxvd2x(DisasContext *ctx) { TCGv EA; + TCGv_i64 t0; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + t0 = tcg_temp_new_i64(); gen_set_access_type(ctx, ACCESS_INT); EA = tcg_temp_new(); gen_addr_reg_index(ctx, EA); - gen_qemu_ld64_i64(ctx, cpu_vsrh(xT(ctx->opcode)), EA); + gen_qemu_ld64_i64(ctx, t0, EA); + set_cpu_vsrh(xT(ctx->opcode), t0); tcg_gen_addi_tl(EA, EA, 8); - gen_qemu_ld64_i64(ctx, cpu_vsrl(xT(ctx->opcode)), EA); + gen_qemu_ld64_i64(ctx, t0, EA); + set_cpu_vsrl(xT(ctx->opcode), t0); tcg_temp_free(EA); + tcg_temp_free_i64(t0); } static void gen_lxvdsx(DisasContext *ctx) { TCGv EA; + TCGv_i64 t0; + TCGv_i64 t1; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); gen_set_access_type(ctx, ACCESS_INT); EA = tcg_temp_new(); gen_addr_reg_index(ctx, EA); - gen_qemu_ld64_i64(ctx, cpu_vsrh(xT(ctx->opcode)), EA); - tcg_gen_mov_i64(cpu_vsrl(xT(ctx->opcode)), cpu_vsrh(xT(ctx->opcode))); + gen_qemu_ld64_i64(ctx, t0, EA); + set_cpu_vsrh(xT(ctx->opcode), t0); + tcg_gen_mov_i64(t1, t0); + set_cpu_vsrl(xT(ctx->opcode), t1); tcg_temp_free(EA); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); } static void gen_lxvw4x(DisasContext *ctx) { TCGv EA; - TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); - TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); + TCGv_i64 xth; + TCGv_i64 xtl; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xth = tcg_temp_new_i64(); + xtl = tcg_temp_new_i64(); + get_cpu_vsrh(xth, xT(ctx->opcode)); + get_cpu_vsrl(xtl, xT(ctx->opcode)); gen_set_access_type(ctx, ACCESS_INT); EA = tcg_temp_new(); @@ -104,6 +153,8 @@ static void gen_lxvw4x(DisasContext *ctx) tcg_gen_qemu_ld_i64(xtl, EA, ctx->mem_idx, MO_BEQ); } tcg_temp_free(EA); + tcg_temp_free_i64(xth); + tcg_temp_free_i64(xtl); } static void gen_bswap16x8(TCGv_i64 outh, TCGv_i64 outl, @@ -151,13 +202,17 @@ static void gen_bswap32x4(TCGv_i64 outh, TCGv_i64 outl, static void gen_lxvh8x(DisasContext *ctx) { TCGv EA; - TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); - TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); + TCGv_i64 xth; + TCGv_i64 xtl; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xth = tcg_temp_new_i64(); + xtl = tcg_temp_new_i64(); + get_cpu_vsrh(xth, xT(ctx->opcode)); + get_cpu_vsrl(xtl, xT(ctx->opcode)); gen_set_access_type(ctx, ACCESS_INT); EA = tcg_temp_new(); @@ -169,18 +224,24 @@ static void gen_lxvh8x(DisasContext *ctx) gen_bswap16x8(xth, xtl, xth, xtl); } tcg_temp_free(EA); + tcg_temp_free_i64(xth); + tcg_temp_free_i64(xtl); } static void gen_lxvb16x(DisasContext *ctx) { TCGv EA; - TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); - TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); + TCGv_i64 xth; + TCGv_i64 xtl; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xth = tcg_temp_new_i64(); + xtl = tcg_temp_new_i64(); + get_cpu_vsrh(xth, xT(ctx->opcode)); + get_cpu_vsrl(xtl, xT(ctx->opcode)); gen_set_access_type(ctx, ACCESS_INT); EA = tcg_temp_new(); gen_addr_reg_index(ctx, EA); @@ -188,6 +249,8 @@ static void gen_lxvb16x(DisasContext *ctx) tcg_gen_addi_tl(EA, EA, 8); tcg_gen_qemu_ld_i64(xtl, EA, ctx->mem_idx, MO_BEQ); tcg_temp_free(EA); + tcg_temp_free_i64(xth); + tcg_temp_free_i64(xtl); } #define VSX_VECTOR_LOAD_STORE(name, op, indexed) \ @@ -195,15 +258,14 @@ static void gen_##name(DisasContext *ctx) \ { \ int xt; \ TCGv EA; \ - TCGv_i64 xth, xtl; \ + TCGv_i64 xth; \ + TCGv_i64 xtl; \ \ if (indexed) { \ xt = xT(ctx->opcode); \ } else { \ xt = DQxT(ctx->opcode); \ } \ - xth = cpu_vsrh(xt); \ - xtl = cpu_vsrl(xt); \ \ if (xt < 32) { \ if (unlikely(!ctx->vsx_enabled)) { \ @@ -216,6 +278,10 @@ static void gen_##name(DisasContext *ctx) \ return; \ } \ } \ + xth = tcg_temp_new_i64(); \ + xtl = tcg_temp_new_i64(); \ + get_cpu_vsrh(xth, xt); \ + get_cpu_vsrl(xtl, xt); \ gen_set_access_type(ctx, ACCESS_INT); \ EA = tcg_temp_new(); \ if (indexed) { \ @@ -225,14 +291,20 @@ static void gen_##name(DisasContext *ctx) \ } \ if (ctx->le_mode) { \ tcg_gen_qemu_##op(xtl, EA, ctx->mem_idx, MO_LEQ); \ + set_cpu_vsrl(xt, xtl); \ tcg_gen_addi_tl(EA, EA, 8); \ tcg_gen_qemu_##op(xth, EA, ctx->mem_idx, MO_LEQ); \ + set_cpu_vsrh(xt, xth); \ } else { \ tcg_gen_qemu_##op(xth, EA, ctx->mem_idx, MO_BEQ); \ + set_cpu_vsrh(xt, xth); \ tcg_gen_addi_tl(EA, EA, 8); \ tcg_gen_qemu_##op(xtl, EA, ctx->mem_idx, MO_BEQ); \ + set_cpu_vsrl(xt, xtl); \ } \ tcg_temp_free(EA); \ + tcg_temp_free_i64(xth); \ + tcg_temp_free_i64(xtl); \ } VSX_VECTOR_LOAD_STORE(lxv, ld_i64, 0) @@ -276,18 +348,22 @@ VSX_VECTOR_LOAD_STORE_LENGTH(stxvll) static void gen_##name(DisasContext *ctx) \ { \ TCGv EA; \ - TCGv_i64 xth = cpu_vsrh(rD(ctx->opcode) + 32); \ + TCGv_i64 xth; \ \ if (unlikely(!ctx->altivec_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_VPU); \ return; \ } \ + xth = tcg_temp_new_i64(); \ + get_cpu_vsrh(xth, rD(ctx->opcode) + 32); \ gen_set_access_type(ctx, ACCESS_INT); \ EA = tcg_temp_new(); \ gen_addr_imm_index(ctx, EA, 0x03); \ gen_qemu_##operation(ctx, xth, EA); \ + set_cpu_vsrh(rD(ctx->opcode) + 32, xth); \ /* NOTE: cpu_vsrl is undefined */ \ tcg_temp_free(EA); \ + tcg_temp_free_i64(xth); \ } VSX_LOAD_SCALAR_DS(lxsd, ld64_i64) @@ -297,15 +373,19 @@ VSX_LOAD_SCALAR_DS(lxssp, ld32fs) static void gen_##name(DisasContext *ctx) \ { \ TCGv EA; \ + TCGv_i64 t0; \ if (unlikely(!ctx->vsx_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_VSXU); \ return; \ } \ + t0 = tcg_temp_new_i64(); \ gen_set_access_type(ctx, ACCESS_INT); \ EA = tcg_temp_new(); \ gen_addr_reg_index(ctx, EA); \ - gen_qemu_##operation(ctx, cpu_vsrh(xS(ctx->opcode)), EA); \ + gen_qemu_##operation(ctx, t0, EA); \ + set_cpu_vsrh(xS(ctx->opcode), t0); \ tcg_temp_free(EA); \ + tcg_temp_free_i64(t0); \ } VSX_STORE_SCALAR(stxsdx, st64_i64) @@ -318,28 +398,38 @@ VSX_STORE_SCALAR(stxsspx, st32fs) static void gen_stxvd2x(DisasContext *ctx) { TCGv EA; + TCGv_i64 t0; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + t0 = tcg_temp_new_i64(); gen_set_access_type(ctx, ACCESS_INT); EA = tcg_temp_new(); gen_addr_reg_index(ctx, EA); - gen_qemu_st64_i64(ctx, cpu_vsrh(xS(ctx->opcode)), EA); + get_cpu_vsrh(t0, xS(ctx->opcode)); + gen_qemu_st64_i64(ctx, t0, EA); tcg_gen_addi_tl(EA, EA, 8); - gen_qemu_st64_i64(ctx, cpu_vsrl(xS(ctx->opcode)), EA); + get_cpu_vsrl(t0, xS(ctx->opcode)); + gen_qemu_st64_i64(ctx, t0, EA); tcg_temp_free(EA); + tcg_temp_free_i64(t0); } static void gen_stxvw4x(DisasContext *ctx) { - TCGv_i64 xsh = cpu_vsrh(xS(ctx->opcode)); - TCGv_i64 xsl = cpu_vsrl(xS(ctx->opcode)); TCGv EA; + TCGv_i64 xsh; + TCGv_i64 xsl; + if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xsh = tcg_temp_new_i64(); + xsl = tcg_temp_new_i64(); + get_cpu_vsrh(xsh, xS(ctx->opcode)); + get_cpu_vsrl(xsl, xS(ctx->opcode)); gen_set_access_type(ctx, ACCESS_INT); EA = tcg_temp_new(); gen_addr_reg_index(ctx, EA); @@ -362,18 +452,24 @@ static void gen_stxvw4x(DisasContext *ctx) tcg_gen_qemu_st_i64(xsl, EA, ctx->mem_idx, MO_BEQ); } tcg_temp_free(EA); + tcg_temp_free_i64(xsh); + tcg_temp_free_i64(xsl); } static void gen_stxvh8x(DisasContext *ctx) { - TCGv_i64 xsh = cpu_vsrh(xS(ctx->opcode)); - TCGv_i64 xsl = cpu_vsrl(xS(ctx->opcode)); TCGv EA; + TCGv_i64 xsh; + TCGv_i64 xsl; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xsh = tcg_temp_new_i64(); + xsl = tcg_temp_new_i64(); + get_cpu_vsrh(xsh, xS(ctx->opcode)); + get_cpu_vsrl(xsl, xS(ctx->opcode)); gen_set_access_type(ctx, ACCESS_INT); EA = tcg_temp_new(); gen_addr_reg_index(ctx, EA); @@ -393,18 +489,24 @@ static void gen_stxvh8x(DisasContext *ctx) tcg_gen_qemu_st_i64(xsl, EA, ctx->mem_idx, MO_BEQ); } tcg_temp_free(EA); + tcg_temp_free_i64(xsh); + tcg_temp_free_i64(xsl); } static void gen_stxvb16x(DisasContext *ctx) { - TCGv_i64 xsh = cpu_vsrh(xS(ctx->opcode)); - TCGv_i64 xsl = cpu_vsrl(xS(ctx->opcode)); TCGv EA; + TCGv_i64 xsh; + TCGv_i64 xsl; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xsh = tcg_temp_new_i64(); + xsl = tcg_temp_new_i64(); + get_cpu_vsrh(xsh, xS(ctx->opcode)); + get_cpu_vsrl(xsl, xS(ctx->opcode)); gen_set_access_type(ctx, ACCESS_INT); EA = tcg_temp_new(); gen_addr_reg_index(ctx, EA); @@ -412,80 +514,144 @@ static void gen_stxvb16x(DisasContext *ctx) tcg_gen_addi_tl(EA, EA, 8); tcg_gen_qemu_st_i64(xsl, EA, ctx->mem_idx, MO_BEQ); tcg_temp_free(EA); + tcg_temp_free_i64(xsh); + tcg_temp_free_i64(xsl); } #define VSX_STORE_SCALAR_DS(name, operation) \ static void gen_##name(DisasContext *ctx) \ { \ TCGv EA; \ - TCGv_i64 xth = cpu_vsrh(rD(ctx->opcode) + 32); \ + TCGv_i64 xth; \ \ if (unlikely(!ctx->altivec_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_VPU); \ return; \ } \ + xth = tcg_temp_new_i64(); \ + get_cpu_vsrh(xth, rD(ctx->opcode) + 32); \ gen_set_access_type(ctx, ACCESS_INT); \ EA = tcg_temp_new(); \ gen_addr_imm_index(ctx, EA, 0x03); \ gen_qemu_##operation(ctx, xth, EA); \ /* NOTE: cpu_vsrl is undefined */ \ tcg_temp_free(EA); \ + tcg_temp_free_i64(xth); \ } VSX_LOAD_SCALAR_DS(stxsd, st64_i64) VSX_LOAD_SCALAR_DS(stxssp, st32fs) -#define MV_VSRW(name, tcgop1, tcgop2, target, source) \ -static void gen_##name(DisasContext *ctx) \ -{ \ - if (xS(ctx->opcode) < 32) { \ - if (unlikely(!ctx->fpu_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_FPU); \ - return; \ - } \ - } else { \ - if (unlikely(!ctx->altivec_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_VPU); \ - return; \ - } \ - } \ - TCGv_i64 tmp = tcg_temp_new_i64(); \ - tcg_gen_##tcgop1(tmp, source); \ - tcg_gen_##tcgop2(target, tmp); \ - tcg_temp_free_i64(tmp); \ +static void gen_mfvsrwz(DisasContext *ctx) +{ + if (xS(ctx->opcode) < 32) { + if (unlikely(!ctx->fpu_enabled)) { + gen_exception(ctx, POWERPC_EXCP_FPU); + return; + } + } else { + if (unlikely(!ctx->altivec_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VPU); + return; + } + } + TCGv_i64 tmp = tcg_temp_new_i64(); + TCGv_i64 xsh = tcg_temp_new_i64(); + get_cpu_vsrh(xsh, xS(ctx->opcode)); + tcg_gen_ext32u_i64(tmp, xsh); + tcg_gen_trunc_i64_tl(cpu_gpr[rA(ctx->opcode)], tmp); + tcg_temp_free_i64(tmp); + tcg_temp_free_i64(xsh); } +static void gen_mtvsrwa(DisasContext *ctx) +{ + if (xS(ctx->opcode) < 32) { + if (unlikely(!ctx->fpu_enabled)) { + gen_exception(ctx, POWERPC_EXCP_FPU); + return; + } + } else { + if (unlikely(!ctx->altivec_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VPU); + return; + } + } + TCGv_i64 tmp = tcg_temp_new_i64(); + TCGv_i64 xsh = tcg_temp_new_i64(); + tcg_gen_extu_tl_i64(tmp, cpu_gpr[rA(ctx->opcode)]); + tcg_gen_ext32s_i64(xsh, tmp); + set_cpu_vsrh(xT(ctx->opcode), xsh); + tcg_temp_free_i64(tmp); + tcg_temp_free_i64(xsh); +} -MV_VSRW(mfvsrwz, ext32u_i64, trunc_i64_tl, cpu_gpr[rA(ctx->opcode)], \ - cpu_vsrh(xS(ctx->opcode))) -MV_VSRW(mtvsrwa, extu_tl_i64, ext32s_i64, cpu_vsrh(xT(ctx->opcode)), \ - cpu_gpr[rA(ctx->opcode)]) -MV_VSRW(mtvsrwz, extu_tl_i64, ext32u_i64, cpu_vsrh(xT(ctx->opcode)), \ - cpu_gpr[rA(ctx->opcode)]) +static void gen_mtvsrwz(DisasContext *ctx) +{ + if (xS(ctx->opcode) < 32) { + if (unlikely(!ctx->fpu_enabled)) { + gen_exception(ctx, POWERPC_EXCP_FPU); + return; + } + } else { + if (unlikely(!ctx->altivec_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VPU); + return; + } + } + TCGv_i64 tmp = tcg_temp_new_i64(); + TCGv_i64 xsh = tcg_temp_new_i64(); + tcg_gen_extu_tl_i64(tmp, cpu_gpr[rA(ctx->opcode)]); + tcg_gen_ext32u_i64(xsh, tmp); + set_cpu_vsrh(xT(ctx->opcode), xsh); + tcg_temp_free_i64(tmp); + tcg_temp_free_i64(xsh); +} #if defined(TARGET_PPC64) -#define MV_VSRD(name, target, source) \ -static void gen_##name(DisasContext *ctx) \ -{ \ - if (xS(ctx->opcode) < 32) { \ - if (unlikely(!ctx->fpu_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_FPU); \ - return; \ - } \ - } else { \ - if (unlikely(!ctx->altivec_enabled)) { \ - gen_exception(ctx, POWERPC_EXCP_VPU); \ - return; \ - } \ - } \ - tcg_gen_mov_i64(target, source); \ +static void gen_mfvsrd(DisasContext *ctx) +{ + TCGv_i64 t0; + if (xS(ctx->opcode) < 32) { + if (unlikely(!ctx->fpu_enabled)) { + gen_exception(ctx, POWERPC_EXCP_FPU); + return; + } + } else { + if (unlikely(!ctx->altivec_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VPU); + return; + } + } + t0 = tcg_temp_new_i64(); + get_cpu_vsrh(t0, xS(ctx->opcode)); + tcg_gen_mov_i64(cpu_gpr[rA(ctx->opcode)], t0); + tcg_temp_free_i64(t0); } -MV_VSRD(mfvsrd, cpu_gpr[rA(ctx->opcode)], cpu_vsrh(xS(ctx->opcode))) -MV_VSRD(mtvsrd, cpu_vsrh(xT(ctx->opcode)), cpu_gpr[rA(ctx->opcode)]) +static void gen_mtvsrd(DisasContext *ctx) +{ + TCGv_i64 t0; + if (xS(ctx->opcode) < 32) { + if (unlikely(!ctx->fpu_enabled)) { + gen_exception(ctx, POWERPC_EXCP_FPU); + return; + } + } else { + if (unlikely(!ctx->altivec_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VPU); + return; + } + } + t0 = tcg_temp_new_i64(); + tcg_gen_mov_i64(t0, cpu_gpr[rA(ctx->opcode)]); + set_cpu_vsrh(xT(ctx->opcode), t0); + tcg_temp_free_i64(t0); +} static void gen_mfvsrld(DisasContext *ctx) { + TCGv_i64 t0; if (xS(ctx->opcode) < 32) { if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); @@ -497,12 +663,15 @@ static void gen_mfvsrld(DisasContext *ctx) return; } } - - tcg_gen_mov_i64(cpu_gpr[rA(ctx->opcode)], cpu_vsrl(xS(ctx->opcode))); + t0 = tcg_temp_new_i64(); + get_cpu_vsrl(t0, xS(ctx->opcode)); + tcg_gen_mov_i64(cpu_gpr[rA(ctx->opcode)], t0); + tcg_temp_free_i64(t0); } static void gen_mtvsrdd(DisasContext *ctx) { + TCGv_i64 t0; if (xT(ctx->opcode) < 32) { if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); @@ -515,17 +684,22 @@ static void gen_mtvsrdd(DisasContext *ctx) } } + t0 = tcg_temp_new_i64(); if (!rA(ctx->opcode)) { - tcg_gen_movi_i64(cpu_vsrh(xT(ctx->opcode)), 0); + tcg_gen_movi_i64(t0, 0); } else { - tcg_gen_mov_i64(cpu_vsrh(xT(ctx->opcode)), cpu_gpr[rA(ctx->opcode)]); + tcg_gen_mov_i64(t0, cpu_gpr[rA(ctx->opcode)]); } + set_cpu_vsrh(xT(ctx->opcode), t0); - tcg_gen_mov_i64(cpu_vsrl(xT(ctx->opcode)), cpu_gpr[rB(ctx->opcode)]); + tcg_gen_mov_i64(t0, cpu_gpr[rB(ctx->opcode)]); + set_cpu_vsrl(xT(ctx->opcode), t0); + tcg_temp_free_i64(t0); } static void gen_mtvsrws(DisasContext *ctx) { + TCGv_i64 t0; if (xT(ctx->opcode) < 32) { if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); @@ -538,55 +712,61 @@ static void gen_mtvsrws(DisasContext *ctx) } } - tcg_gen_deposit_i64(cpu_vsrl(xT(ctx->opcode)), cpu_gpr[rA(ctx->opcode)], + t0 = tcg_temp_new_i64(); + tcg_gen_deposit_i64(t0, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 32, 32); - tcg_gen_mov_i64(cpu_vsrh(xT(ctx->opcode)), cpu_vsrl(xT(ctx->opcode))); + set_cpu_vsrl(xT(ctx->opcode), t0); + set_cpu_vsrh(xT(ctx->opcode), t0); + tcg_temp_free_i64(t0); } #endif static void gen_xxpermdi(DisasContext *ctx) { + TCGv_i64 xh, xl; + if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xh = tcg_temp_new_i64(); + xl = tcg_temp_new_i64(); + if (unlikely((xT(ctx->opcode) == xA(ctx->opcode)) || (xT(ctx->opcode) == xB(ctx->opcode)))) { - TCGv_i64 xh, xl; - - xh = tcg_temp_new_i64(); - xl = tcg_temp_new_i64(); - if ((DM(ctx->opcode) & 2) == 0) { - tcg_gen_mov_i64(xh, cpu_vsrh(xA(ctx->opcode))); + get_cpu_vsrh(xh, xA(ctx->opcode)); } else { - tcg_gen_mov_i64(xh, cpu_vsrl(xA(ctx->opcode))); + get_cpu_vsrl(xh, xA(ctx->opcode)); } if ((DM(ctx->opcode) & 1) == 0) { - tcg_gen_mov_i64(xl, cpu_vsrh(xB(ctx->opcode))); + get_cpu_vsrh(xl, xB(ctx->opcode)); } else { - tcg_gen_mov_i64(xl, cpu_vsrl(xB(ctx->opcode))); + get_cpu_vsrl(xl, xB(ctx->opcode)); } - tcg_gen_mov_i64(cpu_vsrh(xT(ctx->opcode)), xh); - tcg_gen_mov_i64(cpu_vsrl(xT(ctx->opcode)), xl); - - tcg_temp_free_i64(xh); - tcg_temp_free_i64(xl); + set_cpu_vsrh(xT(ctx->opcode), xh); + set_cpu_vsrl(xT(ctx->opcode), xl); } else { if ((DM(ctx->opcode) & 2) == 0) { - tcg_gen_mov_i64(cpu_vsrh(xT(ctx->opcode)), cpu_vsrh(xA(ctx->opcode))); + get_cpu_vsrh(xh, xA(ctx->opcode)); + set_cpu_vsrh(xT(ctx->opcode), xh); } else { - tcg_gen_mov_i64(cpu_vsrh(xT(ctx->opcode)), cpu_vsrl(xA(ctx->opcode))); + get_cpu_vsrl(xh, xA(ctx->opcode)); + set_cpu_vsrh(xT(ctx->opcode), xh); } if ((DM(ctx->opcode) & 1) == 0) { - tcg_gen_mov_i64(cpu_vsrl(xT(ctx->opcode)), cpu_vsrh(xB(ctx->opcode))); + get_cpu_vsrh(xl, xB(ctx->opcode)); + set_cpu_vsrl(xT(ctx->opcode), xl); } else { - tcg_gen_mov_i64(cpu_vsrl(xT(ctx->opcode)), cpu_vsrl(xB(ctx->opcode))); + get_cpu_vsrl(xl, xB(ctx->opcode)); + set_cpu_vsrl(xT(ctx->opcode), xl); } } + tcg_temp_free_i64(xh); + tcg_temp_free_i64(xl); } #define OP_ABS 1 @@ -606,7 +786,7 @@ static void glue(gen_, name)(DisasContext * ctx) \ } \ xb = tcg_temp_new_i64(); \ sgm = tcg_temp_new_i64(); \ - tcg_gen_mov_i64(xb, cpu_vsrh(xB(ctx->opcode))); \ + get_cpu_vsrh(xb, xB(ctx->opcode)); \ tcg_gen_movi_i64(sgm, sgn_mask); \ switch (op) { \ case OP_ABS: { \ @@ -623,7 +803,7 @@ static void glue(gen_, name)(DisasContext * ctx) \ } \ case OP_CPSGN: { \ TCGv_i64 xa = tcg_temp_new_i64(); \ - tcg_gen_mov_i64(xa, cpu_vsrh(xA(ctx->opcode))); \ + get_cpu_vsrh(xa, xA(ctx->opcode)); \ tcg_gen_and_i64(xa, xa, sgm); \ tcg_gen_andc_i64(xb, xb, sgm); \ tcg_gen_or_i64(xb, xb, xa); \ @@ -631,7 +811,7 @@ static void glue(gen_, name)(DisasContext * ctx) \ break; \ } \ } \ - tcg_gen_mov_i64(cpu_vsrh(xT(ctx->opcode)), xb); \ + set_cpu_vsrh(xT(ctx->opcode), xb); \ tcg_temp_free_i64(xb); \ tcg_temp_free_i64(sgm); \ } @@ -647,7 +827,7 @@ static void glue(gen_, name)(DisasContext *ctx) \ int xa; \ int xt = rD(ctx->opcode) + 32; \ int xb = rB(ctx->opcode) + 32; \ - TCGv_i64 xah, xbh, xbl, sgm; \ + TCGv_i64 xah, xbh, xbl, sgm, tmp; \ \ if (unlikely(!ctx->vsx_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_VSXU); \ @@ -656,8 +836,9 @@ static void glue(gen_, name)(DisasContext *ctx) \ xbh = tcg_temp_new_i64(); \ xbl = tcg_temp_new_i64(); \ sgm = tcg_temp_new_i64(); \ - tcg_gen_mov_i64(xbh, cpu_vsrh(xb)); \ - tcg_gen_mov_i64(xbl, cpu_vsrl(xb)); \ + tmp = tcg_temp_new_i64(); \ + get_cpu_vsrh(xbh, xb); \ + get_cpu_vsrl(xbl, xb); \ tcg_gen_movi_i64(sgm, sgn_mask); \ switch (op) { \ case OP_ABS: \ @@ -672,17 +853,19 @@ static void glue(gen_, name)(DisasContext *ctx) \ case OP_CPSGN: \ xah = tcg_temp_new_i64(); \ xa = rA(ctx->opcode) + 32; \ - tcg_gen_and_i64(xah, cpu_vsrh(xa), sgm); \ + get_cpu_vsrh(tmp, xa); \ + tcg_gen_and_i64(xah, tmp, sgm); \ tcg_gen_andc_i64(xbh, xbh, sgm); \ tcg_gen_or_i64(xbh, xbh, xah); \ tcg_temp_free_i64(xah); \ break; \ } \ - tcg_gen_mov_i64(cpu_vsrh(xt), xbh); \ - tcg_gen_mov_i64(cpu_vsrl(xt), xbl); \ + set_cpu_vsrh(xt, xbh); \ + set_cpu_vsrl(xt, xbl); \ tcg_temp_free_i64(xbl); \ tcg_temp_free_i64(xbh); \ tcg_temp_free_i64(sgm); \ + tcg_temp_free_i64(tmp); \ } VSX_SCALAR_MOVE_QP(xsabsqp, OP_ABS, SGN_MASK_DP) @@ -701,8 +884,8 @@ static void glue(gen_, name)(DisasContext * ctx) \ xbh = tcg_temp_new_i64(); \ xbl = tcg_temp_new_i64(); \ sgm = tcg_temp_new_i64(); \ - tcg_gen_mov_i64(xbh, cpu_vsrh(xB(ctx->opcode))); \ - tcg_gen_mov_i64(xbl, cpu_vsrl(xB(ctx->opcode))); \ + set_cpu_vsrh(xB(ctx->opcode), xbh); \ + set_cpu_vsrl(xB(ctx->opcode), xbl); \ tcg_gen_movi_i64(sgm, sgn_mask); \ switch (op) { \ case OP_ABS: { \ @@ -723,8 +906,8 @@ static void glue(gen_, name)(DisasContext * ctx) \ case OP_CPSGN: { \ TCGv_i64 xah = tcg_temp_new_i64(); \ TCGv_i64 xal = tcg_temp_new_i64(); \ - tcg_gen_mov_i64(xah, cpu_vsrh(xA(ctx->opcode))); \ - tcg_gen_mov_i64(xal, cpu_vsrl(xA(ctx->opcode))); \ + get_cpu_vsrh(xah, xA(ctx->opcode)); \ + get_cpu_vsrl(xal, xA(ctx->opcode)); \ tcg_gen_and_i64(xah, xah, sgm); \ tcg_gen_and_i64(xal, xal, sgm); \ tcg_gen_andc_i64(xbh, xbh, sgm); \ @@ -736,8 +919,8 @@ static void glue(gen_, name)(DisasContext * ctx) \ break; \ } \ } \ - tcg_gen_mov_i64(cpu_vsrh(xT(ctx->opcode)), xbh); \ - tcg_gen_mov_i64(cpu_vsrl(xT(ctx->opcode)), xbl); \ + set_cpu_vsrh(xT(ctx->opcode), xbh); \ + set_cpu_vsrl(xT(ctx->opcode), xbl); \ tcg_temp_free_i64(xbh); \ tcg_temp_free_i64(xbl); \ tcg_temp_free_i64(sgm); \ @@ -768,12 +951,19 @@ static void gen_##name(DisasContext * ctx) \ #define GEN_VSX_HELPER_XT_XB_ENV(name, op1, op2, inval, type) \ static void gen_##name(DisasContext * ctx) \ { \ + TCGv_i64 t0; \ + TCGv_i64 t1; \ if (unlikely(!ctx->vsx_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_VSXU); \ return; \ } \ - gen_helper_##name(cpu_vsrh(xT(ctx->opcode)), cpu_env, \ - cpu_vsrh(xB(ctx->opcode))); \ + t0 = tcg_temp_new_i64(); \ + t1 = tcg_temp_new_i64(); \ + get_cpu_vsrh(t0, xB(ctx->opcode)); \ + gen_helper_##name(t1, cpu_env, t0); \ + set_cpu_vsrh(xT(ctx->opcode), t1); \ + tcg_temp_free_i64(t0); \ + tcg_temp_free_i64(t1); \ } GEN_VSX_HELPER_2(xsadddp, 0x00, 0x04, 0, PPC2_VSX) @@ -949,76 +1139,146 @@ GEN_VSX_HELPER_2(xxpermr, 0x08, 0x07, 0, PPC2_ISA300) static void gen_xxbrd(DisasContext *ctx) { - TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); - TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); - TCGv_i64 xbh = cpu_vsrh(xB(ctx->opcode)); - TCGv_i64 xbl = cpu_vsrl(xB(ctx->opcode)); + TCGv_i64 xth; + TCGv_i64 xtl; + TCGv_i64 xbh; + TCGv_i64 xbl; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xth = tcg_temp_new_i64(); + xtl = tcg_temp_new_i64(); + xbh = tcg_temp_new_i64(); + xbl = tcg_temp_new_i64(); + get_cpu_vsrh(xbh, xB(ctx->opcode)); + get_cpu_vsrl(xbl, xB(ctx->opcode)); + tcg_gen_bswap64_i64(xth, xbh); tcg_gen_bswap64_i64(xtl, xbl); + set_cpu_vsrh(xT(ctx->opcode), xth); + set_cpu_vsrl(xT(ctx->opcode), xtl); + + tcg_temp_free_i64(xth); + tcg_temp_free_i64(xtl); + tcg_temp_free_i64(xbh); + tcg_temp_free_i64(xbl); } static void gen_xxbrh(DisasContext *ctx) { - TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); - TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); - TCGv_i64 xbh = cpu_vsrh(xB(ctx->opcode)); - TCGv_i64 xbl = cpu_vsrl(xB(ctx->opcode)); + TCGv_i64 xth; + TCGv_i64 xtl; + TCGv_i64 xbh; + TCGv_i64 xbl; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xth = tcg_temp_new_i64(); + xtl = tcg_temp_new_i64(); + xbh = tcg_temp_new_i64(); + xbl = tcg_temp_new_i64(); + get_cpu_vsrh(xbh, xB(ctx->opcode)); + get_cpu_vsrl(xbl, xB(ctx->opcode)); + gen_bswap16x8(xth, xtl, xbh, xbl); + set_cpu_vsrh(xT(ctx->opcode), xth); + set_cpu_vsrl(xT(ctx->opcode), xtl); + + tcg_temp_free_i64(xth); + tcg_temp_free_i64(xtl); + tcg_temp_free_i64(xbh); + tcg_temp_free_i64(xbl); } static void gen_xxbrq(DisasContext *ctx) { - TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); - TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); - TCGv_i64 xbh = cpu_vsrh(xB(ctx->opcode)); - TCGv_i64 xbl = cpu_vsrl(xB(ctx->opcode)); - TCGv_i64 t0 = tcg_temp_new_i64(); + TCGv_i64 xth; + TCGv_i64 xtl; + TCGv_i64 xbh; + TCGv_i64 xbl; + TCGv_i64 t0; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xth = tcg_temp_new_i64(); + xtl = tcg_temp_new_i64(); + xbh = tcg_temp_new_i64(); + xbl = tcg_temp_new_i64(); + get_cpu_vsrh(xbh, xB(ctx->opcode)); + get_cpu_vsrl(xbl, xB(ctx->opcode)); + t0 = tcg_temp_new_i64(); + tcg_gen_bswap64_i64(t0, xbl); tcg_gen_bswap64_i64(xtl, xbh); + set_cpu_vsrl(xT(ctx->opcode), xtl); tcg_gen_mov_i64(xth, t0); + set_cpu_vsrl(xT(ctx->opcode), xth); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(xth); + tcg_temp_free_i64(xtl); + tcg_temp_free_i64(xbh); + tcg_temp_free_i64(xbl); } static void gen_xxbrw(DisasContext *ctx) { - TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); - TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); - TCGv_i64 xbh = cpu_vsrh(xB(ctx->opcode)); - TCGv_i64 xbl = cpu_vsrl(xB(ctx->opcode)); + TCGv_i64 xth; + TCGv_i64 xtl; + TCGv_i64 xbh; + TCGv_i64 xbl; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xth = tcg_temp_new_i64(); + xtl = tcg_temp_new_i64(); + xbh = tcg_temp_new_i64(); + xbl = tcg_temp_new_i64(); + get_cpu_vsrh(xbh, xB(ctx->opcode)); + get_cpu_vsrl(xbl, xB(ctx->opcode)); + gen_bswap32x4(xth, xtl, xbh, xbl); + set_cpu_vsrl(xT(ctx->opcode), xth); + set_cpu_vsrl(xT(ctx->opcode), xtl); + + tcg_temp_free_i64(xth); + tcg_temp_free_i64(xtl); + tcg_temp_free_i64(xbh); + tcg_temp_free_i64(xbl); } #define VSX_LOGICAL(name, tcg_op) \ static void glue(gen_, name)(DisasContext * ctx) \ { \ + TCGv_i64 t0; \ + TCGv_i64 t1; \ + TCGv_i64 t2; \ if (unlikely(!ctx->vsx_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_VSXU); \ return; \ } \ - tcg_op(cpu_vsrh(xT(ctx->opcode)), cpu_vsrh(xA(ctx->opcode)), \ - cpu_vsrh(xB(ctx->opcode))); \ - tcg_op(cpu_vsrl(xT(ctx->opcode)), cpu_vsrl(xA(ctx->opcode)), \ - cpu_vsrl(xB(ctx->opcode))); \ + t0 = tcg_temp_new_i64(); \ + t1 = tcg_temp_new_i64(); \ + t2 = tcg_temp_new_i64(); \ + get_cpu_vsrh(t0, xA(ctx->opcode)); \ + get_cpu_vsrh(t1, xB(ctx->opcode)); \ + tcg_op(t2, t0, t1); \ + set_cpu_vsrh(xT(ctx->opcode), t2); \ + get_cpu_vsrl(t0, xA(ctx->opcode)); \ + get_cpu_vsrl(t1, xB(ctx->opcode)); \ + tcg_op(t2, t0, t1); \ + set_cpu_vsrl(xT(ctx->opcode), t2); \ + tcg_temp_free_i64(t0); \ + tcg_temp_free_i64(t1); \ + tcg_temp_free_i64(t2); \ } VSX_LOGICAL(xxland, tcg_gen_and_i64) @@ -1033,7 +1293,7 @@ VSX_LOGICAL(xxlorc, tcg_gen_orc_i64) #define VSX_XXMRG(name, high) \ static void glue(gen_, name)(DisasContext * ctx) \ { \ - TCGv_i64 a0, a1, b0, b1; \ + TCGv_i64 a0, a1, b0, b1, tmp; \ if (unlikely(!ctx->vsx_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_VSXU); \ return; \ @@ -1042,27 +1302,29 @@ static void glue(gen_, name)(DisasContext * ctx) \ a1 = tcg_temp_new_i64(); \ b0 = tcg_temp_new_i64(); \ b1 = tcg_temp_new_i64(); \ + tmp = tcg_temp_new_i64(); \ if (high) { \ - tcg_gen_mov_i64(a0, cpu_vsrh(xA(ctx->opcode))); \ - tcg_gen_mov_i64(a1, cpu_vsrh(xA(ctx->opcode))); \ - tcg_gen_mov_i64(b0, cpu_vsrh(xB(ctx->opcode))); \ - tcg_gen_mov_i64(b1, cpu_vsrh(xB(ctx->opcode))); \ + get_cpu_vsrh(a0, xA(ctx->opcode)); \ + get_cpu_vsrh(a1, xA(ctx->opcode)); \ + get_cpu_vsrh(b0, xB(ctx->opcode)); \ + get_cpu_vsrh(b1, xB(ctx->opcode)); \ } else { \ - tcg_gen_mov_i64(a0, cpu_vsrl(xA(ctx->opcode))); \ - tcg_gen_mov_i64(a1, cpu_vsrl(xA(ctx->opcode))); \ - tcg_gen_mov_i64(b0, cpu_vsrl(xB(ctx->opcode))); \ - tcg_gen_mov_i64(b1, cpu_vsrl(xB(ctx->opcode))); \ + get_cpu_vsrl(a0, xA(ctx->opcode)); \ + get_cpu_vsrl(a1, xA(ctx->opcode)); \ + get_cpu_vsrl(b0, xB(ctx->opcode)); \ + get_cpu_vsrl(b1, xB(ctx->opcode)); \ } \ tcg_gen_shri_i64(a0, a0, 32); \ tcg_gen_shri_i64(b0, b0, 32); \ - tcg_gen_deposit_i64(cpu_vsrh(xT(ctx->opcode)), \ - b0, a0, 32, 32); \ - tcg_gen_deposit_i64(cpu_vsrl(xT(ctx->opcode)), \ - b1, a1, 32, 32); \ + tcg_gen_deposit_i64(tmp, b0, a0, 32, 32); \ + set_cpu_vsrh(xT(ctx->opcode), tmp); \ + tcg_gen_deposit_i64(tmp, b1, a1, 32, 32); \ + set_cpu_vsrl(xT(ctx->opcode), tmp); \ tcg_temp_free_i64(a0); \ tcg_temp_free_i64(a1); \ tcg_temp_free_i64(b0); \ tcg_temp_free_i64(b1); \ + tcg_temp_free_i64(tmp); \ } VSX_XXMRG(xxmrghw, 1) @@ -1070,7 +1332,7 @@ VSX_XXMRG(xxmrglw, 0) static void gen_xxsel(DisasContext * ctx) { - TCGv_i64 a, b, c; + TCGv_i64 a, b, c, tmp; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; @@ -1078,40 +1340,49 @@ static void gen_xxsel(DisasContext * ctx) a = tcg_temp_new_i64(); b = tcg_temp_new_i64(); c = tcg_temp_new_i64(); + tmp = tcg_temp_new_i64(); - tcg_gen_mov_i64(a, cpu_vsrh(xA(ctx->opcode))); - tcg_gen_mov_i64(b, cpu_vsrh(xB(ctx->opcode))); - tcg_gen_mov_i64(c, cpu_vsrh(xC(ctx->opcode))); + get_cpu_vsrh(a, xA(ctx->opcode)); + get_cpu_vsrh(b, xB(ctx->opcode)); + get_cpu_vsrh(c, xC(ctx->opcode)); tcg_gen_and_i64(b, b, c); tcg_gen_andc_i64(a, a, c); - tcg_gen_or_i64(cpu_vsrh(xT(ctx->opcode)), a, b); + tcg_gen_or_i64(tmp, a, b); + set_cpu_vsrh(xT(ctx->opcode), tmp); - tcg_gen_mov_i64(a, cpu_vsrl(xA(ctx->opcode))); - tcg_gen_mov_i64(b, cpu_vsrl(xB(ctx->opcode))); - tcg_gen_mov_i64(c, cpu_vsrl(xC(ctx->opcode))); + get_cpu_vsrl(a, xA(ctx->opcode)); + get_cpu_vsrl(b, xB(ctx->opcode)); + get_cpu_vsrl(c, xC(ctx->opcode)); tcg_gen_and_i64(b, b, c); tcg_gen_andc_i64(a, a, c); - tcg_gen_or_i64(cpu_vsrl(xT(ctx->opcode)), a, b); + tcg_gen_or_i64(tmp, a, b); + set_cpu_vsrl(xT(ctx->opcode), tmp); tcg_temp_free_i64(a); tcg_temp_free_i64(b); tcg_temp_free_i64(c); + tcg_temp_free_i64(tmp); } static void gen_xxspltw(DisasContext *ctx) { TCGv_i64 b, b2; - TCGv_i64 vsr = (UIM(ctx->opcode) & 2) ? - cpu_vsrl(xB(ctx->opcode)) : - cpu_vsrh(xB(ctx->opcode)); + TCGv_i64 vsr; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + vsr = tcg_temp_new_i64(); + if (UIM(ctx->opcode) & 2) { + get_cpu_vsrl(vsr, xB(ctx->opcode)); + } else { + get_cpu_vsrh(vsr, xB(ctx->opcode)); + } + b = tcg_temp_new_i64(); b2 = tcg_temp_new_i64(); @@ -1122,9 +1393,11 @@ static void gen_xxspltw(DisasContext *ctx) } tcg_gen_shli_i64(b2, b, 32); - tcg_gen_or_i64(cpu_vsrh(xT(ctx->opcode)), b, b2); - tcg_gen_mov_i64(cpu_vsrl(xT(ctx->opcode)), cpu_vsrh(xT(ctx->opcode))); + tcg_gen_or_i64(vsr, b, b2); + set_cpu_vsrh(xT(ctx->opcode), vsr); + set_cpu_vsrl(xT(ctx->opcode), vsr); + tcg_temp_free_i64(vsr); tcg_temp_free_i64(b); tcg_temp_free_i64(b2); } @@ -1134,6 +1407,7 @@ static void gen_xxspltw(DisasContext *ctx) static void gen_xxspltib(DisasContext *ctx) { unsigned char uim8 = IMM8(ctx->opcode); + TCGv_i64 vsr; if (xS(ctx->opcode) < 32) { if (unlikely(!ctx->altivec_enabled)) { gen_exception(ctx, POWERPC_EXCP_VPU); @@ -1145,8 +1419,11 @@ static void gen_xxspltib(DisasContext *ctx) return; } } - tcg_gen_movi_i64(cpu_vsrh(xT(ctx->opcode)), pattern(uim8)); - tcg_gen_movi_i64(cpu_vsrl(xT(ctx->opcode)), pattern(uim8)); + vsr = tcg_temp_new_i64(); + tcg_gen_movi_i64(vsr, pattern(uim8)); + set_cpu_vsrh(xT(ctx->opcode), vsr); + set_cpu_vsrl(xT(ctx->opcode), vsr); + tcg_temp_free_i64(vsr); } static void gen_xxsldwi(DisasContext *ctx) @@ -1161,40 +1438,40 @@ static void gen_xxsldwi(DisasContext *ctx) switch (SHW(ctx->opcode)) { case 0: { - tcg_gen_mov_i64(xth, cpu_vsrh(xA(ctx->opcode))); - tcg_gen_mov_i64(xtl, cpu_vsrl(xA(ctx->opcode))); + get_cpu_vsrh(xth, xA(ctx->opcode)); + get_cpu_vsrl(xtl, xA(ctx->opcode)); break; } case 1: { TCGv_i64 t0 = tcg_temp_new_i64(); - tcg_gen_mov_i64(xth, cpu_vsrh(xA(ctx->opcode))); + get_cpu_vsrh(xth, xA(ctx->opcode)); tcg_gen_shli_i64(xth, xth, 32); - tcg_gen_mov_i64(t0, cpu_vsrl(xA(ctx->opcode))); + get_cpu_vsrl(t0, xA(ctx->opcode)); tcg_gen_shri_i64(t0, t0, 32); tcg_gen_or_i64(xth, xth, t0); - tcg_gen_mov_i64(xtl, cpu_vsrl(xA(ctx->opcode))); + get_cpu_vsrl(xtl, xA(ctx->opcode)); tcg_gen_shli_i64(xtl, xtl, 32); - tcg_gen_mov_i64(t0, cpu_vsrh(xB(ctx->opcode))); + get_cpu_vsrh(t0, xB(ctx->opcode)); tcg_gen_shri_i64(t0, t0, 32); tcg_gen_or_i64(xtl, xtl, t0); tcg_temp_free_i64(t0); break; } case 2: { - tcg_gen_mov_i64(xth, cpu_vsrl(xA(ctx->opcode))); - tcg_gen_mov_i64(xtl, cpu_vsrh(xB(ctx->opcode))); + get_cpu_vsrl(xth, xA(ctx->opcode)); + get_cpu_vsrh(xtl, xB(ctx->opcode)); break; } case 3: { TCGv_i64 t0 = tcg_temp_new_i64(); - tcg_gen_mov_i64(xth, cpu_vsrl(xA(ctx->opcode))); + get_cpu_vsrl(xth, xA(ctx->opcode)); tcg_gen_shli_i64(xth, xth, 32); - tcg_gen_mov_i64(t0, cpu_vsrh(xB(ctx->opcode))); + get_cpu_vsrh(t0, xB(ctx->opcode)); tcg_gen_shri_i64(t0, t0, 32); tcg_gen_or_i64(xth, xth, t0); - tcg_gen_mov_i64(xtl, cpu_vsrh(xB(ctx->opcode))); + get_cpu_vsrh(xtl, xB(ctx->opcode)); tcg_gen_shli_i64(xtl, xtl, 32); - tcg_gen_mov_i64(t0, cpu_vsrl(xB(ctx->opcode))); + get_cpu_vsrl(t0, xB(ctx->opcode)); tcg_gen_shri_i64(t0, t0, 32); tcg_gen_or_i64(xtl, xtl, t0); tcg_temp_free_i64(t0); @@ -1202,8 +1479,8 @@ static void gen_xxsldwi(DisasContext *ctx) } } - tcg_gen_mov_i64(cpu_vsrh(xT(ctx->opcode)), xth); - tcg_gen_mov_i64(cpu_vsrl(xT(ctx->opcode)), xtl); + set_cpu_vsrh(xT(ctx->opcode), xth); + set_cpu_vsrl(xT(ctx->opcode), xtl); tcg_temp_free_i64(xth); tcg_temp_free_i64(xtl); @@ -1213,7 +1490,8 @@ static void gen_xxsldwi(DisasContext *ctx) static void gen_##name(DisasContext *ctx) \ { \ TCGv xt, xb; \ - TCGv_i32 t0 = tcg_temp_new_i32(); \ + TCGv_i32 t0; \ + TCGv_i64 t1; \ uint8_t uimm = UIMM4(ctx->opcode); \ \ if (unlikely(!ctx->vsx_enabled)) { \ @@ -1222,12 +1500,15 @@ static void gen_##name(DisasContext *ctx) \ } \ xt = tcg_const_tl(xT(ctx->opcode)); \ xb = tcg_const_tl(xB(ctx->opcode)); \ + t0 = tcg_temp_new_i32(); \ + t1 = tcg_temp_new_i64(); \ /* uimm > 15 out of bound and for \ * uimm > 12 handle as per hardware in helper \ */ \ if (uimm > 15) { \ - tcg_gen_movi_i64(cpu_vsrh(xT(ctx->opcode)), 0); \ - tcg_gen_movi_i64(cpu_vsrl(xT(ctx->opcode)), 0); \ + tcg_gen_movi_i64(t1, 0); \ + set_cpu_vsrh(xT(ctx->opcode), t1); \ + set_cpu_vsrl(xT(ctx->opcode), t1); \ return; \ } \ tcg_gen_movi_i32(t0, uimm); \ @@ -1235,6 +1516,7 @@ static void gen_##name(DisasContext *ctx) \ tcg_temp_free(xb); \ tcg_temp_free(xt); \ tcg_temp_free_i32(t0); \ + tcg_temp_free_i64(t1); \ } VSX_EXTRACT_INSERT(xxextractuw) @@ -1244,30 +1526,45 @@ VSX_EXTRACT_INSERT(xxinsertw) static void gen_xsxexpdp(DisasContext *ctx) { TCGv rt = cpu_gpr[rD(ctx->opcode)]; + TCGv_i64 t0; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } - tcg_gen_extract_i64(rt, cpu_vsrh(xB(ctx->opcode)), 52, 11); + t0 = tcg_temp_new_i64(); + get_cpu_vsrh(t0, xB(ctx->opcode)); + tcg_gen_extract_i64(rt, t0, 52, 11); + tcg_temp_free_i64(t0); } static void gen_xsxexpqp(DisasContext *ctx) { - TCGv_i64 xth = cpu_vsrh(rD(ctx->opcode) + 32); - TCGv_i64 xtl = cpu_vsrl(rD(ctx->opcode) + 32); - TCGv_i64 xbh = cpu_vsrh(rB(ctx->opcode) + 32); + TCGv_i64 xth; + TCGv_i64 xtl; + TCGv_i64 xbh; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xth = tcg_temp_new_i64(); + xtl = tcg_temp_new_i64(); + xbh = tcg_temp_new_i64(); + get_cpu_vsrh(xbh, rB(ctx->opcode) + 32); + tcg_gen_extract_i64(xth, xbh, 48, 15); + set_cpu_vsrh(rD(ctx->opcode) + 32, xth); tcg_gen_movi_i64(xtl, 0); + set_cpu_vsrl(rD(ctx->opcode) + 32, xtl); + + tcg_temp_free_i64(xbh); + tcg_temp_free_i64(xth); + tcg_temp_free_i64(xtl); } static void gen_xsiexpdp(DisasContext *ctx) { - TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); + TCGv_i64 xth; TCGv ra = cpu_gpr[rA(ctx->opcode)]; TCGv rb = cpu_gpr[rB(ctx->opcode)]; TCGv_i64 t0; @@ -1277,40 +1574,60 @@ static void gen_xsiexpdp(DisasContext *ctx) return; } t0 = tcg_temp_new_i64(); + xth = tcg_temp_new_i64(); tcg_gen_andi_i64(xth, ra, 0x800FFFFFFFFFFFFF); tcg_gen_andi_i64(t0, rb, 0x7FF); tcg_gen_shli_i64(t0, t0, 52); tcg_gen_or_i64(xth, xth, t0); + set_cpu_vsrh(xT(ctx->opcode), xth); /* dword[1] is undefined */ tcg_temp_free_i64(t0); + tcg_temp_free_i64(xth); } static void gen_xsiexpqp(DisasContext *ctx) { - TCGv_i64 xth = cpu_vsrh(rD(ctx->opcode) + 32); - TCGv_i64 xtl = cpu_vsrl(rD(ctx->opcode) + 32); - TCGv_i64 xah = cpu_vsrh(rA(ctx->opcode) + 32); - TCGv_i64 xal = cpu_vsrl(rA(ctx->opcode) + 32); - TCGv_i64 xbh = cpu_vsrh(rB(ctx->opcode) + 32); + TCGv_i64 xth; + TCGv_i64 xtl; + TCGv_i64 xah; + TCGv_i64 xal; + TCGv_i64 xbh; TCGv_i64 t0; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xth = tcg_temp_new_i64(); + xtl = tcg_temp_new_i64(); + xah = tcg_temp_new_i64(); + xal = tcg_temp_new_i64(); + get_cpu_vsrh(xah, rA(ctx->opcode) + 32); + get_cpu_vsrl(xal, rA(ctx->opcode) + 32); + xbh = tcg_temp_new_i64(); + get_cpu_vsrh(xbh, rB(ctx->opcode) + 32); t0 = tcg_temp_new_i64(); + tcg_gen_andi_i64(xth, xah, 0x8000FFFFFFFFFFFF); tcg_gen_andi_i64(t0, xbh, 0x7FFF); tcg_gen_shli_i64(t0, t0, 48); tcg_gen_or_i64(xth, xth, t0); + set_cpu_vsrh(rD(ctx->opcode) + 32, xth); tcg_gen_mov_i64(xtl, xal); + set_cpu_vsrl(rD(ctx->opcode) + 32, xtl); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(xth); + tcg_temp_free_i64(xtl); + tcg_temp_free_i64(xah); + tcg_temp_free_i64(xal); + tcg_temp_free_i64(xbh); } static void gen_xsxsigdp(DisasContext *ctx) { TCGv rt = cpu_gpr[rD(ctx->opcode)]; - TCGv_i64 t0, zr, nan, exp; + TCGv_i64 t0, t1, zr, nan, exp; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); @@ -1318,17 +1635,21 @@ static void gen_xsxsigdp(DisasContext *ctx) } exp = tcg_temp_new_i64(); t0 = tcg_temp_new_i64(); + t1 = tcg_temp_new_i64(); zr = tcg_const_i64(0); nan = tcg_const_i64(2047); - tcg_gen_extract_i64(exp, cpu_vsrh(xB(ctx->opcode)), 52, 11); + get_cpu_vsrh(t1, xB(ctx->opcode)); + tcg_gen_extract_i64(exp, t1, 52, 11); tcg_gen_movi_i64(t0, 0x0010000000000000); tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, zr, zr, t0); tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, nan, zr, t0); - tcg_gen_andi_i64(rt, cpu_vsrh(xB(ctx->opcode)), 0x000FFFFFFFFFFFFF); + get_cpu_vsrh(t1, xB(ctx->opcode)); + tcg_gen_andi_i64(rt, t1, 0x000FFFFFFFFFFFFF); tcg_gen_or_i64(rt, rt, t0); tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); tcg_temp_free_i64(exp); tcg_temp_free_i64(zr); tcg_temp_free_i64(nan); @@ -1337,132 +1658,219 @@ static void gen_xsxsigdp(DisasContext *ctx) static void gen_xsxsigqp(DisasContext *ctx) { TCGv_i64 t0, zr, nan, exp; - TCGv_i64 xth = cpu_vsrh(rD(ctx->opcode) + 32); - TCGv_i64 xtl = cpu_vsrl(rD(ctx->opcode) + 32); + TCGv_i64 xth; + TCGv_i64 xtl; + TCGv_i64 xbh; + TCGv_i64 xbl; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xth = tcg_temp_new_i64(); + xtl = tcg_temp_new_i64(); + xbh = tcg_temp_new_i64(); + xbl = tcg_temp_new_i64(); + get_cpu_vsrh(xbh, rB(ctx->opcode) + 32); + get_cpu_vsrl(xbl, rB(ctx->opcode) + 32); exp = tcg_temp_new_i64(); t0 = tcg_temp_new_i64(); zr = tcg_const_i64(0); nan = tcg_const_i64(32767); - tcg_gen_extract_i64(exp, cpu_vsrh(rB(ctx->opcode) + 32), 48, 15); + tcg_gen_extract_i64(exp, xbh, 48, 15); tcg_gen_movi_i64(t0, 0x0001000000000000); tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, zr, zr, t0); tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, nan, zr, t0); - tcg_gen_andi_i64(xth, cpu_vsrh(rB(ctx->opcode) + 32), 0x0000FFFFFFFFFFFF); + tcg_gen_andi_i64(xth, xbh, 0x0000FFFFFFFFFFFF); tcg_gen_or_i64(xth, xth, t0); - tcg_gen_mov_i64(xtl, cpu_vsrl(rB(ctx->opcode) + 32)); + set_cpu_vsrh(rD(ctx->opcode) + 32, xth); + tcg_gen_mov_i64(xtl, xbl); + set_cpu_vsrl(rD(ctx->opcode) + 32, xtl); tcg_temp_free_i64(t0); tcg_temp_free_i64(exp); tcg_temp_free_i64(zr); tcg_temp_free_i64(nan); + tcg_temp_free_i64(xth); + tcg_temp_free_i64(xtl); + tcg_temp_free_i64(xbh); + tcg_temp_free_i64(xbl); } #endif static void gen_xviexpsp(DisasContext *ctx) { - TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); - TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); - TCGv_i64 xah = cpu_vsrh(xA(ctx->opcode)); - TCGv_i64 xal = cpu_vsrl(xA(ctx->opcode)); - TCGv_i64 xbh = cpu_vsrh(xB(ctx->opcode)); - TCGv_i64 xbl = cpu_vsrl(xB(ctx->opcode)); + TCGv_i64 xth; + TCGv_i64 xtl; + TCGv_i64 xah; + TCGv_i64 xal; + TCGv_i64 xbh; + TCGv_i64 xbl; TCGv_i64 t0; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xth = tcg_temp_new_i64(); + xtl = tcg_temp_new_i64(); + xah = tcg_temp_new_i64(); + xal = tcg_temp_new_i64(); + xbh = tcg_temp_new_i64(); + xbl = tcg_temp_new_i64(); + get_cpu_vsrh(xah, xA(ctx->opcode)); + get_cpu_vsrl(xal, xA(ctx->opcode)); + get_cpu_vsrh(xbh, xB(ctx->opcode)); + get_cpu_vsrl(xbl, xB(ctx->opcode)); t0 = tcg_temp_new_i64(); + tcg_gen_andi_i64(xth, xah, 0x807FFFFF807FFFFF); tcg_gen_andi_i64(t0, xbh, 0xFF000000FF); tcg_gen_shli_i64(t0, t0, 23); tcg_gen_or_i64(xth, xth, t0); + set_cpu_vsrh(xT(ctx->opcode), xth); tcg_gen_andi_i64(xtl, xal, 0x807FFFFF807FFFFF); tcg_gen_andi_i64(t0, xbl, 0xFF000000FF); tcg_gen_shli_i64(t0, t0, 23); tcg_gen_or_i64(xtl, xtl, t0); + set_cpu_vsrl(xT(ctx->opcode), xtl); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(xth); + tcg_temp_free_i64(xtl); + tcg_temp_free_i64(xah); + tcg_temp_free_i64(xal); + tcg_temp_free_i64(xbh); + tcg_temp_free_i64(xbl); } static void gen_xviexpdp(DisasContext *ctx) { - TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); - TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); - TCGv_i64 xah = cpu_vsrh(xA(ctx->opcode)); - TCGv_i64 xal = cpu_vsrl(xA(ctx->opcode)); - TCGv_i64 xbh = cpu_vsrh(xB(ctx->opcode)); - TCGv_i64 xbl = cpu_vsrl(xB(ctx->opcode)); + TCGv_i64 xth; + TCGv_i64 xtl; + TCGv_i64 xah; + TCGv_i64 xal; + TCGv_i64 xbh; + TCGv_i64 xbl; TCGv_i64 t0; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xth = tcg_temp_new_i64(); + xtl = tcg_temp_new_i64(); + xah = tcg_temp_new_i64(); + xal = tcg_temp_new_i64(); + xbh = tcg_temp_new_i64(); + xbl = tcg_temp_new_i64(); + get_cpu_vsrh(xah, xA(ctx->opcode)); + get_cpu_vsrl(xal, xA(ctx->opcode)); + get_cpu_vsrh(xbh, xB(ctx->opcode)); + get_cpu_vsrl(xbl, xB(ctx->opcode)); t0 = tcg_temp_new_i64(); + tcg_gen_andi_i64(xth, xah, 0x800FFFFFFFFFFFFF); tcg_gen_andi_i64(t0, xbh, 0x7FF); tcg_gen_shli_i64(t0, t0, 52); tcg_gen_or_i64(xth, xth, t0); + set_cpu_vsrh(xT(ctx->opcode), xth); tcg_gen_andi_i64(xtl, xal, 0x800FFFFFFFFFFFFF); tcg_gen_andi_i64(t0, xbl, 0x7FF); tcg_gen_shli_i64(t0, t0, 52); tcg_gen_or_i64(xtl, xtl, t0); + set_cpu_vsrl(xT(ctx->opcode), xtl); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(xth); + tcg_temp_free_i64(xtl); + tcg_temp_free_i64(xah); + tcg_temp_free_i64(xal); + tcg_temp_free_i64(xbh); + tcg_temp_free_i64(xbl); } static void gen_xvxexpsp(DisasContext *ctx) { - TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); - TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); - TCGv_i64 xbh = cpu_vsrh(xB(ctx->opcode)); - TCGv_i64 xbl = cpu_vsrl(xB(ctx->opcode)); + TCGv_i64 xth; + TCGv_i64 xtl; + TCGv_i64 xbh; + TCGv_i64 xbl; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xth = tcg_temp_new_i64(); + xtl = tcg_temp_new_i64(); + xbh = tcg_temp_new_i64(); + xbl = tcg_temp_new_i64(); + get_cpu_vsrh(xbh, xB(ctx->opcode)); + get_cpu_vsrl(xbl, xB(ctx->opcode)); + tcg_gen_shri_i64(xth, xbh, 23); tcg_gen_andi_i64(xth, xth, 0xFF000000FF); + set_cpu_vsrh(xT(ctx->opcode), xth); tcg_gen_shri_i64(xtl, xbl, 23); tcg_gen_andi_i64(xtl, xtl, 0xFF000000FF); + set_cpu_vsrl(xT(ctx->opcode), xtl); + + tcg_temp_free_i64(xth); + tcg_temp_free_i64(xtl); + tcg_temp_free_i64(xbh); + tcg_temp_free_i64(xbl); } static void gen_xvxexpdp(DisasContext *ctx) { - TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); - TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); - TCGv_i64 xbh = cpu_vsrh(xB(ctx->opcode)); - TCGv_i64 xbl = cpu_vsrl(xB(ctx->opcode)); + TCGv_i64 xth; + TCGv_i64 xtl; + TCGv_i64 xbh; + TCGv_i64 xbl; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xth = tcg_temp_new_i64(); + xtl = tcg_temp_new_i64(); + xbh = tcg_temp_new_i64(); + xbl = tcg_temp_new_i64(); + get_cpu_vsrh(xbh, xB(ctx->opcode)); + get_cpu_vsrl(xbl, xB(ctx->opcode)); + tcg_gen_extract_i64(xth, xbh, 52, 11); + set_cpu_vsrh(xT(ctx->opcode), xth); tcg_gen_extract_i64(xtl, xbl, 52, 11); + set_cpu_vsrl(xT(ctx->opcode), xtl); + + tcg_temp_free_i64(xth); + tcg_temp_free_i64(xtl); + tcg_temp_free_i64(xbh); + tcg_temp_free_i64(xbl); } GEN_VSX_HELPER_2(xvxsigsp, 0x00, 0x04, 0, PPC2_ISA300) static void gen_xvxsigdp(DisasContext *ctx) { - TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode)); - TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode)); - TCGv_i64 xbh = cpu_vsrh(xB(ctx->opcode)); - TCGv_i64 xbl = cpu_vsrl(xB(ctx->opcode)); - + TCGv_i64 xth; + TCGv_i64 xtl; + TCGv_i64 xbh; + TCGv_i64 xbl; TCGv_i64 t0, zr, nan, exp; if (unlikely(!ctx->vsx_enabled)) { gen_exception(ctx, POWERPC_EXCP_VSXU); return; } + xth = tcg_temp_new_i64(); + xtl = tcg_temp_new_i64(); + xbh = tcg_temp_new_i64(); + xbl = tcg_temp_new_i64(); + get_cpu_vsrh(xbh, xB(ctx->opcode)); + get_cpu_vsrl(xbl, xB(ctx->opcode)); exp = tcg_temp_new_i64(); t0 = tcg_temp_new_i64(); zr = tcg_const_i64(0); @@ -1474,6 +1882,7 @@ static void gen_xvxsigdp(DisasContext *ctx) tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, nan, zr, t0); tcg_gen_andi_i64(xth, xbh, 0x000FFFFFFFFFFFFF); tcg_gen_or_i64(xth, xth, t0); + set_cpu_vsrh(xT(ctx->opcode), xth); tcg_gen_extract_i64(exp, xbl, 52, 11); tcg_gen_movi_i64(t0, 0x0010000000000000); @@ -1481,11 +1890,16 @@ static void gen_xvxsigdp(DisasContext *ctx) tcg_gen_movcond_i64(TCG_COND_EQ, t0, exp, nan, zr, t0); tcg_gen_andi_i64(xtl, xbl, 0x000FFFFFFFFFFFFF); tcg_gen_or_i64(xtl, xtl, t0); + set_cpu_vsrl(xT(ctx->opcode), xtl); tcg_temp_free_i64(t0); tcg_temp_free_i64(exp); tcg_temp_free_i64(zr); tcg_temp_free_i64(nan); + tcg_temp_free_i64(xth); + tcg_temp_free_i64(xtl); + tcg_temp_free_i64(xbh); + tcg_temp_free_i64(xbl); } #undef GEN_XX2FORM diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c index 03f1d34a97..ade06cc773 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -9486,7 +9486,7 @@ static bool avr_need_swap(CPUPPCState *env) static int gdb_get_float_reg(CPUPPCState *env, uint8_t *mem_buf, int n) { if (n < 32) { - stfq_p(mem_buf, env->fpr[n]); + stfq_p(mem_buf, *cpu_fpr_ptr(env, n)); ppc_maybe_bswap_register(env, mem_buf, 8); return 8; } @@ -9502,7 +9502,7 @@ static int gdb_set_float_reg(CPUPPCState *env, uint8_t *mem_buf, int n) { if (n < 32) { ppc_maybe_bswap_register(env, mem_buf, 8); - env->fpr[n] = ldfq_p(mem_buf); + *cpu_fpr_ptr(env, n) = ldfq_p(mem_buf); return 8; } if (n == 32) { @@ -9516,12 +9516,13 @@ static int gdb_set_float_reg(CPUPPCState *env, uint8_t *mem_buf, int n) static int gdb_get_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n) { if (n < 32) { + ppc_avr_t *avr = cpu_avr_ptr(env, n); if (!avr_need_swap(env)) { - stq_p(mem_buf, env->avr[n].u64[0]); - stq_p(mem_buf+8, env->avr[n].u64[1]); + stq_p(mem_buf, avr->u64[0]); + stq_p(mem_buf + 8, avr->u64[1]); } else { - stq_p(mem_buf, env->avr[n].u64[1]); - stq_p(mem_buf+8, env->avr[n].u64[0]); + stq_p(mem_buf, avr->u64[1]); + stq_p(mem_buf + 8, avr->u64[0]); } ppc_maybe_bswap_register(env, mem_buf, 8); ppc_maybe_bswap_register(env, mem_buf + 8, 8); @@ -9543,14 +9544,15 @@ static int gdb_get_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n) static int gdb_set_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n) { if (n < 32) { + ppc_avr_t *avr = cpu_avr_ptr(env, n); ppc_maybe_bswap_register(env, mem_buf, 8); ppc_maybe_bswap_register(env, mem_buf + 8, 8); if (!avr_need_swap(env)) { - env->avr[n].u64[0] = ldq_p(mem_buf); - env->avr[n].u64[1] = ldq_p(mem_buf+8); + avr->u64[0] = ldq_p(mem_buf); + avr->u64[1] = ldq_p(mem_buf + 8); } else { - env->avr[n].u64[1] = ldq_p(mem_buf); - env->avr[n].u64[0] = ldq_p(mem_buf+8); + avr->u64[1] = ldq_p(mem_buf); + avr->u64[0] = ldq_p(mem_buf + 8); } return 16; } @@ -9623,7 +9625,7 @@ static int gdb_set_spe_reg(CPUPPCState *env, uint8_t *mem_buf, int n) static int gdb_get_vsx_reg(CPUPPCState *env, uint8_t *mem_buf, int n) { if (n < 32) { - stq_p(mem_buf, env->vsr[n]); + stq_p(mem_buf, *cpu_vsrl_ptr(env, n)); ppc_maybe_bswap_register(env, mem_buf, 8); return 8; } @@ -9634,7 +9636,7 @@ static int gdb_set_vsx_reg(CPUPPCState *env, uint8_t *mem_buf, int n) { if (n < 32) { ppc_maybe_bswap_register(env, mem_buf, 8); - env->vsr[n] = ldq_p(mem_buf); + *cpu_vsrl_ptr(env, n) = ldq_p(mem_buf); return 8; } return 0; diff --git a/target/tilegx/translate.c b/target/tilegx/translate.c index f201150fc7..df1e4d0fef 100644 --- a/target/tilegx/translate.c +++ b/target/tilegx/translate.c @@ -297,7 +297,7 @@ static TileExcp gen_st_opcode(DisasContext *dc, unsigned dest, unsigned srca, } tcg_gen_qemu_st_tl(load_gr(dc, srcb), load_gr(dc, srca), - dc->mmuidx, memop); + dc->mmuidx, memop); qemu_log_mask(CPU_LOG_TB_IN_ASM, "%s %s, %s", name, reg_names[srca], reg_names[srcb]); diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c index c21c3272f2..1b4e3b80e1 100644 --- a/tcg/i386/tcg-target.inc.c +++ b/tcg/i386/tcg-target.inc.c @@ -3392,8 +3392,8 @@ static void tcg_target_qemu_prologue(TCGContext *s) tcg_out_addi(s, TCG_REG_ESP, -stack_addend); /* jmp *tb. */ tcg_out_modrm_offset(s, OPC_GRP5, EXT5_JMPN_Ev, TCG_REG_ESP, - (ARRAY_SIZE(tcg_target_callee_save_regs) + 2) * 4 - + stack_addend); + (ARRAY_SIZE(tcg_target_callee_save_regs) + 2) * 4 + + stack_addend); #else # if !defined(CONFIG_SOFTMMU) && TCG_TARGET_REG_BITS == 64 if (guest_base) { diff --git a/tcg/tcg.c b/tcg/tcg.c index c54b119020..f34f52fbdb 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -2319,7 +2319,7 @@ static void reachable_code_pass(TCGContext *s) * wait until the dead code in between them was removed. */ if (label->refs == 1) { - TCGOp *op_prev = QTAILQ_PREV(op, TCGOpHead, link); + TCGOp *op_prev = QTAILQ_PREV(op, link); if (op_prev->opc == INDEX_op_br && label == arg_label(op_prev->args[0])) { tcg_op_remove(s, op_prev); @@ -2481,7 +2481,7 @@ static void liveness_pass_1(TCGContext *s) /* ??? Should be redundant with the exit_tb that ends the TB. */ la_func_end(s, nb_globals, nb_temps); - QTAILQ_FOREACH_REVERSE_SAFE(op, &s->ops, TCGOpHead, link, op_prev) { + QTAILQ_FOREACH_REVERSE_SAFE(op, &s->ops, link, op_prev) { int nb_iargs, nb_oargs; TCGOpcode opc_new, opc_new2; bool have_opc_new2; diff --git a/tcg/tcg.h b/tcg/tcg.h index 3a629991ca..f8ec265027 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -708,7 +708,7 @@ struct TCGContext { /* These structures are private to tcg-target.inc.c. */ #ifdef TCG_TARGET_NEED_LDST_LABELS - QSIMPLEQ_HEAD(ldst_labels, TCGLabelQemuLdst) ldst_labels; + QSIMPLEQ_HEAD(, TCGLabelQemuLdst) ldst_labels; #endif #ifdef TCG_TARGET_NEED_POOL_LABELS struct TCGLabelPoolData *pool_labels; @@ -719,7 +719,7 @@ struct TCGContext { TCGTempSet free_temps[TCG_TYPE_COUNT * 2]; TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */ - QTAILQ_HEAD(TCGOpHead, TCGOp) ops, free_ops; + QTAILQ_HEAD(, TCGOp) ops, free_ops; /* Tells which temporary holds a given register. It does not take into account fixed registers */ @@ -847,7 +847,7 @@ static inline void tcg_set_insn_start_param(TCGOp *op, int arg, target_ulong v) /* The last op that was emitted. */ static inline TCGOp *tcg_last_op(void) { - return QTAILQ_LAST(&tcg_ctx->ops, TCGOpHead); + return QTAILQ_LAST(&tcg_ctx->ops); } /* Test for whether to terminate the TB for using too many opcodes. */ diff --git a/tests/Makefile.include b/tests/Makefile.include index 9c84bbd829..601ef4f64c 100644 --- a/tests/Makefile.include +++ b/tests/Makefile.include @@ -88,7 +88,8 @@ check-unit-y += tests/test-rcu-simpleq$(EXESUF) check-unit-y += tests/test-rcu-tailq$(EXESUF) check-unit-y += tests/test-qdist$(EXESUF) check-unit-y += tests/test-qht$(EXESUF) -check-unit-y += tests/test-qht-par$(EXESUF) +# FIXME: {test-qht-par + gprof} often break on Travis CI +check-unit-$(call lnot,$(CONFIG_GPROF)) += tests/test-qht-par$(EXESUF) check-unit-y += tests/test-bitops$(EXESUF) check-unit-y += tests/test-bitcnt$(EXESUF) check-unit-y += tests/test-qdev-global-props$(EXESUF) @@ -222,18 +223,23 @@ check-qtest-x86_64-y += $(check-qtest-i386-y) check-qtest-x86_64-$(CONFIG_SDHCI) += tests/sdhci-test$(EXESUF) check-qtest-alpha-y += tests/boot-serial-test$(EXESUF) +check-qtest-alpha-$(CONFIG_VGA) += tests/display-vga-test$(EXESUF) check-qtest-hppa-y += tests/boot-serial-test$(EXESUF) +check-qtest-hppa-$(CONFIG_VGA) += tests/display-vga-test$(EXESUF) check-qtest-m68k-y = tests/boot-serial-test$(EXESUF) check-qtest-microblaze-y += tests/boot-serial-test$(EXESUF) check-qtest-mips-$(CONFIG_ISA_TESTDEV) = tests/endianness-test$(EXESUF) +check-qtest-mips-$(CONFIG_VGA) += tests/display-vga-test$(EXESUF) check-qtest-mips64-$(CONFIG_ISA_TESTDEV) = tests/endianness-test$(EXESUF) +check-qtest-mips64-$(CONFIG_VGA) += tests/display-vga-test$(EXESUF) check-qtest-mips64el-$(CONFIG_ISA_TESTDEV) = tests/endianness-test$(EXESUF) +check-qtest-mips64el-$(CONFIG_VGA) += tests/display-vga-test$(EXESUF) check-qtest-moxie-y += tests/boot-serial-test$(EXESUF) @@ -810,41 +816,68 @@ tests/test-qga$(EXESUF): qemu-ga$(EXESUF) tests/test-qga$(EXESUF): tests/test-qga.o $(qtest-obj-y) SPEED = quick -GTESTER_OPTIONS = -k $(if $(V),--verbose,-q) -GCOV_OPTIONS = -n $(if $(V),-f,) # gtester tests, possibly with verbose output +# do_test_tap runs all tests, even if some of them fail, while do_test_human +# stops at the first failure unless -k is given on the command line + +define do_test_human_k + $(quiet-@)rc=0; $(foreach COMMAND, $1, \ + $(call quiet-command-run, \ + export MALLOC_PERTURB_=$${MALLOC_PERTURB_:-$$(( $${RANDOM:-0} % 255 + 1))} $2; \ + $(COMMAND) -m=$(SPEED) -k --tap < /dev/null \ + | ./scripts/tap-driver.pl --test-name="$(notdir $(COMMAND))" $(if $(V),, --show-failures-only) \ + || rc=$$?;, "TEST", "$@: $(COMMAND)")) exit $$rc +endef +define do_test_human_no_k + $(foreach COMMAND, $1, \ + $(call quiet-command, \ + MALLOC_PERTURB_=$${MALLOC_PERTURB_:-$$(( $${RANDOM:-0} % 255 + 1))} $2 \ + $(COMMAND) -m=$(SPEED) -k --tap < /dev/null \ + | ./scripts/tap-driver.pl --test-name="$(notdir $(COMMAND))" $(if $(V),, --show-failures-only), \ + "TEST", "$@: $(COMMAND)") +) +endef +do_test_human = \ + $(if $(findstring k, $(MAKEFLAGS)), $(do_test_human_k), $(do_test_human_no_k)) + +define do_test_tap + $(call quiet-command, \ + { export MALLOC_PERTURB_=$${MALLOC_PERTURB_:-$$(( $${RANDOM:-0} % 255 + 1))} $2; \ + $(foreach COMMAND, $1, \ + $(COMMAND) -m=$(SPEED) -k --tap < /dev/null \ + | sed "s/^[a-z][a-z]* [0-9]* /&$(notdir $(COMMAND)) /" || true; ) } \ + | ./scripts/tap-merge.pl | tee "$@" \ + | ./scripts/tap-driver.pl $(if $(V),, --show-failures-only), \ + "TAP","$@") +endef .PHONY: $(patsubst %, check-qtest-%, $(QTEST_TARGETS)) $(patsubst %, check-qtest-%, $(QTEST_TARGETS)): check-qtest-%: subdir-%-softmmu $(check-qtest-y) - $(call quiet-command,QTEST_QEMU_BINARY=$*-softmmu/qemu-system-$* \ - QTEST_QEMU_IMG=qemu-img$(EXESUF) \ - MALLOC_PERTURB_=$${MALLOC_PERTURB_:-$$(( $${RANDOM:-0} % 255 + 1))} \ - gtester $(GTESTER_OPTIONS) -m=$(SPEED) $(check-qtest-$*-y) $(check-qtest-generic-y),"GTESTER","$@") + $(call do_test_human,$(check-qtest-$*-y) $(check-qtest-generic-y), \ + QTEST_QEMU_BINARY=$*-softmmu/qemu-system-$* \ + QTEST_QEMU_IMG=qemu-img$(EXESUF)) -.PHONY: $(patsubst %, check-%, $(check-unit-y) $(check-speed-y)) -$(patsubst %, check-%, $(check-unit-y) $(check-speed-y)): check-%: % - $(call quiet-command, \ - MALLOC_PERTURB_=$${MALLOC_PERTURB_:-$$(( $${RANDOM:-0} % 255 + 1))} \ - gtester $(GTESTER_OPTIONS) -m=$(SPEED) $*,"GTESTER","$*") +check-unit: $(check-unit-y) + $(call do_test_human, $^) -# gtester tests with XML output +check-speed: $(check-speed-y) + $(call do_test_human, $^) -$(patsubst %, check-report-qtest-%.xml, $(QTEST_TARGETS)): check-report-qtest-%.xml: $(check-qtest-y) - $(call quiet-command,QTEST_QEMU_BINARY=$*-softmmu/qemu-system-$* \ - QTEST_QEMU_IMG=qemu-img$(EXESUF) \ - gtester -q $(GTESTER_OPTIONS) -o $@ -m=$(SPEED) $(check-qtest-$*-y) $(check-qtest-generic-y),"GTESTER","$@") +# gtester tests with TAP output -check-report-unit.xml: $(check-unit-y) - $(call quiet-command,gtester -q $(GTESTER_OPTIONS) -o $@ -m=$(SPEED) $^,"GTESTER","$@") +$(patsubst %, check-report-qtest-%.tap, $(QTEST_TARGETS)): check-report-qtest-%.tap: $(check-qtest-y) + $(call do_test_tap, $(check-qtest-$*-y) $(check-qtest-generic-y), \ + QTEST_QEMU_BINARY=$*-softmmu/qemu-system-$* \ + QTEST_QEMU_IMG=qemu-img$(EXESUF)) -# Reports and overall runs +check-report-unit.tap: $(check-unit-y) + $(call do_test_tap,$^) -check-report.xml: $(patsubst %,check-report-qtest-%.xml, $(QTEST_TARGETS)) check-report-unit.xml - $(call quiet-command,$(SRC_PATH)/scripts/gtester-cat $^ > $@,"GEN","$@") +# Reports and overall runs -check-report.html: check-report.xml - $(call quiet-command,gtester-report $< > $@,"GEN","$@") +check-report.tap: $(patsubst %,check-report-qtest-%.tap, $(QTEST_TARGETS)) check-report-unit.tap + $(call quiet-command,./scripts/tap-merge.py $^ > $@,"GEN","$@") # Per guest TCG tests @@ -959,8 +992,6 @@ check-acceptance: check-venv $(TESTS_RESULTS_DIR) .PHONY: check-qapi-schema check-qtest check-unit check check-clean check-qapi-schema: $(patsubst %,check-%, $(check-qapi-schema-y)) check-tests/qapi-schema/doc-good.texi check-qtest: $(patsubst %,check-qtest-%, $(QTEST_TARGETS)) -check-unit: $(patsubst %,check-%, $(check-unit-y)) -check-speed: $(patsubst %,check-%, $(check-speed-y)) check-block: $(patsubst %,check-%, $(check-block-y)) check: check-qapi-schema check-unit check-qtest check-decodetree check-clean: diff --git a/tests/cdrom-test.c b/tests/cdrom-test.c index 9b43dc9ab4..14bd981336 100644 --- a/tests/cdrom-test.c +++ b/tests/cdrom-test.c @@ -169,7 +169,7 @@ int main(int argc, char **argv) if (exec_genisoimg(genisocheck)) { /* genisoimage not available - so can't run tests */ - return 0; + return g_test_run(); } ret = prepare_image(arch, isoimage); diff --git a/tests/display-vga-test.c b/tests/display-vga-test.c index 2d7d24eee0..bd176dcf3a 100644 --- a/tests/display-vga-test.c +++ b/tests/display-vga-test.c @@ -40,13 +40,11 @@ static void pci_virtio_gpu(void) qtest_end(); } -#ifdef CONFIG_VIRTIO_VGA static void pci_virtio_vga(void) { qtest_start("-vga none -device virtio-vga"); qtest_end(); } -#endif int main(int argc, char **argv) { @@ -62,8 +60,10 @@ int main(int argc, char **argv) qtest_add_func("/display/pci/secondary", pci_secondary); qtest_add_func("/display/pci/multihead", pci_multihead); qtest_add_func("/display/pci/virtio-gpu", pci_virtio_gpu); -#ifdef CONFIG_VIRTIO_VGA - qtest_add_func("/display/pci/virtio-vga", pci_virtio_vga); -#endif + if (g_str_equal(arch, "i386") || g_str_equal(arch, "x86_64") || + g_str_equal(arch, "hppa") || g_str_equal(arch, "ppc64")) { + qtest_add_func("/display/pci/virtio-vga", pci_virtio_vga); + } + return g_test_run(); } diff --git a/tests/docker/dockerfiles/centos7.docker b/tests/docker/dockerfiles/centos7.docker index 0a04bfbed8..e0f18f5a41 100644 --- a/tests/docker/dockerfiles/centos7.docker +++ b/tests/docker/dockerfiles/centos7.docker @@ -22,6 +22,7 @@ ENV PACKAGES \ mesa-libEGL-devel \ mesa-libgbm-devel \ nettle-devel \ + perl-Test-Harness \ pixman-devel \ SDL-devel \ spice-glib-devel \ diff --git a/tests/docker/dockerfiles/debian-sid.docker b/tests/docker/dockerfiles/debian-sid.docker index 9a3d168705..4e4cda0ba5 100644 --- a/tests/docker/dockerfiles/debian-sid.docker +++ b/tests/docker/dockerfiles/debian-sid.docker @@ -13,6 +13,10 @@ FROM debian:sid-slim +# Use a snapshot known to work (see http://snapshot.debian.org/#Usage) +ENV DEBIAN_SNAPSHOT_DATE "20181030" +RUN sed -i "s%^deb \(https\?://\)deb.debian.org/debian/\? \(.*\)%deb [check-valid-until=no] \1snapshot.debian.org/archive/debian/${DEBIAN_SNAPSHOT_DATE} \2%" /etc/apt/sources.list + # Duplicate deb line as deb-src RUN cat /etc/apt/sources.list | sed "s/^deb\ /deb-src /" >> /etc/apt/sources.list diff --git a/tests/docker/dockerfiles/fedora.docker b/tests/docker/dockerfiles/fedora.docker index 0c4eb9e49c..1d0e3dc4ec 100644 --- a/tests/docker/dockerfiles/fedora.docker +++ b/tests/docker/dockerfiles/fedora.docker @@ -70,6 +70,7 @@ ENV PACKAGES \ nss-devel \ numactl-devel \ perl \ + perl-Test-Harness \ pixman-devel \ python3 \ PyYAML \ diff --git a/tests/ivshmem-test.c b/tests/ivshmem-test.c index 089e268154..fe5eb304b1 100644 --- a/tests/ivshmem-test.c +++ b/tests/ivshmem-test.c @@ -492,7 +492,7 @@ int main(int argc, char **argv) /* shm */ tmpshm = mktempshm(TMPSHMSIZE, &fd); if (!tmpshm) { - return 0; + goto out; } tmpshmem = mmap(0, TMPSHMSIZE, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0); g_assert(tmpshmem != MAP_FAILED); @@ -514,9 +514,8 @@ int main(int argc, char **argv) } } +out: ret = g_test_run(); - cleanup(); - return ret; } diff --git a/tests/libqos/malloc.c b/tests/libqos/malloc.c index ac05874b0a..f7bae47a08 100644 --- a/tests/libqos/malloc.c +++ b/tests/libqos/malloc.c @@ -104,7 +104,7 @@ static void mlist_coalesce(MemList *head, MemBlock *node) do { merge = 0; - left = QTAILQ_PREV(node, MemList, MLIST_ENTNAME); + left = QTAILQ_PREV(node, MLIST_ENTNAME); right = QTAILQ_NEXT(node, MLIST_ENTNAME); /* clowns to the left of me */ diff --git a/tests/migration-test.c b/tests/migration-test.c index 06ca5068d8..8352612364 100644 --- a/tests/migration-test.c +++ b/tests/migration-test.c @@ -789,7 +789,7 @@ int main(int argc, char **argv) g_test_init(&argc, &argv, NULL); if (!ufd_version_check()) { - return 0; + return g_test_run(); } /* @@ -800,7 +800,7 @@ int main(int argc, char **argv) if (g_str_equal(qtest_get_arch(), "ppc64") && access("/sys/module/kvm_hv", F_OK)) { g_test_message("Skipping test: kvm_hv not available"); - return 0; + return g_test_run(); } /* @@ -811,11 +811,11 @@ int main(int argc, char **argv) #if defined(HOST_S390X) if (access("/dev/kvm", R_OK | W_OK)) { g_test_message("Skipping test: kvm not available"); - return 0; + return g_test_run(); } #else g_test_message("Skipping test: Need s390x host to work properly"); - return 0; + return g_test_run(); #endif } diff --git a/tests/tcg/alpha/test-cond.c b/tests/tcg/alpha/test-cond.c index e625313b3e..3e11c4c105 100644 --- a/tests/tcg/alpha/test-cond.c +++ b/tests/tcg/alpha/test-cond.c @@ -6,7 +6,7 @@ int test_##N (long a) \ { \ int res = 1; \ - \ + \ asm ("cmov"#N" %1,$31,%0" \ : "+r" (res) : "r" (a)); \ return !res; \ @@ -18,7 +18,7 @@ int test_##N (long a) \ int test_##N (long a) \ { \ int res = 1; \ - \ + \ asm ("b"#N" %1,1f\n\t" \ "addq $31,$31,%0\n\t" \ "1: unop\n" \ diff --git a/tests/tcg/arm/hello-arm.c b/tests/tcg/arm/hello-arm.c index e0daa7ad98..e33edf949f 100644 --- a/tests/tcg/arm/hello-arm.c +++ b/tests/tcg/arm/hello-arm.c @@ -11,7 +11,7 @@ #define __syscall_return(type, res) \ do { \ - return (type) (res); \ + return (type) (res); \ } while (0) #define _syscall0(type,name) \ @@ -33,7 +33,7 @@ type name(type1 arg1) { \ "mov %0,r0" \ : "=r" (__res) \ : "r" ((long)(arg1)) \ - : "r0","lr"); \ + : "r0","lr"); \ __syscall_return(type,__res); \ } @@ -47,7 +47,7 @@ type name(type1 arg1,type2 arg2) { \ "mov\t%0,r0" \ : "=r" (__res) \ : "r" ((long)(arg1)),"r" ((long)(arg2)) \ - : "r0","r1","lr"); \ + : "r0","r1","lr"); \ __syscall_return(type,__res); \ } @@ -78,9 +78,9 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \ "mov\tr3,%4\n\t" \ __syscall(name) \ "mov\t%0,r0" \ - : "=r" (__res) \ - : "r" ((long)(arg1)),"r" ((long)(arg2)),"r" ((long)(arg3)),"r" ((long)(arg4)) \ - : "r0","r1","r2","r3","lr"); \ + : "=r" (__res) \ + : "r" ((long)(arg1)),"r" ((long)(arg2)),"r" ((long)(arg3)),"r" ((long)(arg4)) \ + : "r0","r1","r2","r3","lr"); \ __syscall_return(type,__res); \ } @@ -96,10 +96,10 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \ "mov\tr4,%5\n\t" \ __syscall(name) \ "mov\t%0,r0" \ - : "=r" (__res) \ - : "r" ((long)(arg1)),"r" ((long)(arg2)),"r" ((long)(arg3)),"r" ((long)(arg4)), \ - "r" ((long)(arg5)) \ - : "r0","r1","r2","r3","r4","lr"); \ + : "=r" (__res) \ + : "r" ((long)(arg1)),"r" ((long)(arg2)),"r" ((long)(arg3)),"r" ((long)(arg4)), \ + "r" ((long)(arg5)) \ + : "r0","r1","r2","r3","r4","lr"); \ __syscall_return(type,__res); \ } diff --git a/tests/tcg/cris/check_glibc_kernelversion.c b/tests/tcg/cris/check_glibc_kernelversion.c index 07448722c0..7aada89911 100644 --- a/tests/tcg/cris/check_glibc_kernelversion.c +++ b/tests/tcg/cris/check_glibc_kernelversion.c @@ -109,8 +109,8 @@ int main(void) if (parts < 3) version <<= 8 * (3 - parts); - if (version < __LINUX_KERNEL_VERSION) - err(); - pass(); - exit(0); + if (version < __LINUX_KERNEL_VERSION) + err(); + pass(); + exit(0); } diff --git a/tests/tcg/cris/check_mmap3.c b/tests/tcg/cris/check_mmap3.c index 34401fa0c9..cb890ef120 100644 --- a/tests/tcg/cris/check_mmap3.c +++ b/tests/tcg/cris/check_mmap3.c @@ -17,7 +17,7 @@ int main (int argc, char *argv[]) /* Check that we can map a non-multiple of a page and still get a full page. */ a = mmap (NULL, 0x4c, PROT_READ | PROT_WRITE | PROT_EXEC, - MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); + MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); if (a == NULL || a == (unsigned char *) -1) abort (); diff --git a/tests/tcg/cris/check_openpf1.c b/tests/tcg/cris/check_openpf1.c index fdcf4c5c3f..251d26eec2 100644 --- a/tests/tcg/cris/check_openpf1.c +++ b/tests/tcg/cris/check_openpf1.c @@ -19,7 +19,7 @@ int main (int argc, char *argv[]) { fnam = malloc (strlen (argv[0]) + 2); if (fnam == NULL) - abort (); + abort (); strcpy (fnam, "/"); strcat (fnam, argv[0]); } diff --git a/tests/tcg/cris/check_settls1.c b/tests/tcg/cris/check_settls1.c index 69d202652a..3abc3a9ea8 100644 --- a/tests/tcg/cris/check_settls1.c +++ b/tests/tcg/cris/check_settls1.c @@ -35,7 +35,7 @@ int main (void) syscall (SYS_set_thread_area, old_tp); if (tp != 0xeddeed00) { - * (volatile int *) 0 = 0; + * (volatile int *) 0 = 0; perror ("tls2"); abort (); } diff --git a/tests/tcg/i386/hello-i386.c b/tests/tcg/i386/hello-i386.c index cfeb24b2f5..59196dd0b7 100644 --- a/tests/tcg/i386/hello-i386.c +++ b/tests/tcg/i386/hello-i386.c @@ -4,19 +4,19 @@ static inline void exit(int status) { int __res; __asm__ volatile ("movl %%ecx,%%ebx\n"\ - "int $0x80" \ - : "=a" (__res) : "0" (__NR_exit),"c" ((long)(status))); + "int $0x80" \ + : "=a" (__res) : "0" (__NR_exit),"c" ((long)(status))); } static inline int write(int fd, const char * buf, int len) { int status; __asm__ volatile ("pushl %%ebx\n"\ - "movl %%esi,%%ebx\n"\ - "int $0x80\n" \ - "popl %%ebx\n"\ - : "=a" (status) \ - : "0" (__NR_write),"S" ((long)(fd)),"c" ((long)(buf)),"d" ((long)(len))); + "movl %%esi,%%ebx\n"\ + "int $0x80\n" \ + "popl %%ebx\n"\ + : "=a" (status) \ + : "0" (__NR_write),"S" ((long)(fd)),"c" ((long)(buf)),"d" ((long)(len))); return status; } diff --git a/tests/tcg/mips/hello-mips.c b/tests/tcg/mips/hello-mips.c index f8256730dd..c7052fdf2e 100644 --- a/tests/tcg/mips/hello-mips.c +++ b/tests/tcg/mips/hello-mips.c @@ -24,9 +24,9 @@ static inline void exit1(int status) " syscall \n" " .set pop " : - : "i" (__NR_exit), "r" (__a0) - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", - "memory"); + : "i" (__NR_exit), "r" (__a0) + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", + "memory"); } static inline int write(int fd, const char *buf, int len) @@ -46,8 +46,8 @@ static inline int write(int fd, const char *buf, int len) " .set pop " : "=r" (__v0), "=r" (__a3) : "i" (__NR_write), "r" (__a0), "r" (__a1), "r" (__a2) - : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", - "memory"); + : "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", + "memory"); /* if (__a3 == 0) */ return (int) __v0; diff --git a/tests/tcg/multiarch/sha1.c b/tests/tcg/multiarch/sha1.c index 93b7c8e808..87bfbcdf52 100644 --- a/tests/tcg/multiarch/sha1.c +++ b/tests/tcg/multiarch/sha1.c @@ -152,7 +152,7 @@ uint32_t j; j = context->count[0]; if ((context->count[0] += len << 3) < j) - context->count[1]++; + context->count[1]++; context->count[1] += (len>>29); j = (j >> 3) & 63; if ((j + len) > 63) { @@ -186,11 +186,11 @@ unsigned char c; for (i = 0; i < 2; i++) { - uint32_t t = context->count[i]; - int j; + uint32_t t = context->count[i]; + int j; - for (j = 0; j < 4; t >>= 8, j++) - *--fcp = (unsigned char) t; + for (j = 0; j < 4; t >>= 8, j++) + *--fcp = (unsigned char) t; } #else for (i = 0; i < 8; i++) { @@ -201,7 +201,7 @@ unsigned char c; c = 0200; SHA1Update(context, &c, 1); while ((context->count[0] & 504) != 448) { - c = 0000; + c = 0000; SHA1Update(context, &c, 1); } SHA1Update(context, finalcount, 8); /* Should cause a SHA1Transform() */ diff --git a/tests/test-crypto-pbkdf.c b/tests/test-crypto-pbkdf.c index d937aff6b2..85ed1f9b33 100644 --- a/tests/test-crypto-pbkdf.c +++ b/tests/test-crypto-pbkdf.c @@ -440,6 +440,7 @@ int main(int argc, char **argv) #else int main(int argc, char **argv) { - return 0; + g_test_init(&argc, &argv, NULL); + return g_test_run(); } #endif diff --git a/tests/test-rcu-list.c b/tests/test-rcu-list.c index 2e6f70bd59..6f076473e0 100644 --- a/tests/test-rcu-list.c +++ b/tests/test-rcu-list.c @@ -108,7 +108,7 @@ static void reclaim_list_el(struct rcu_head *prcu) } #if TEST_LIST_TYPE == 1 -static QLIST_HEAD(q_list_head, list_element) Q_list_head; +static QLIST_HEAD(, list_element) Q_list_head; #define TEST_NAME "qlist" #define TEST_LIST_REMOVE_RCU QLIST_REMOVE_RCU diff --git a/tests/test-vmstate.c b/tests/test-vmstate.c index 37a7a93784..0ab29a8216 100644 --- a/tests/test-vmstate.c +++ b/tests/test-vmstate.c @@ -630,7 +630,7 @@ struct TestQtailqElement { typedef struct TestQtailq { int16_t i16; - QTAILQ_HEAD(TestQtailqHead, TestQtailqElement) q; + QTAILQ_HEAD(, TestQtailqElement) q; int32_t i32; } TestQtailq; @@ -735,9 +735,9 @@ static void test_load_q(void) g_assert_cmpint(eof, ==, QEMU_VM_EOF); TestQtailqElement *qele_from = QTAILQ_FIRST(&obj_q.q); - TestQtailqElement *qlast_from = QTAILQ_LAST(&obj_q.q, TestQtailqHead); + TestQtailqElement *qlast_from = QTAILQ_LAST(&obj_q.q); TestQtailqElement *qele_to = QTAILQ_FIRST(&tgt.q); - TestQtailqElement *qlast_to = QTAILQ_LAST(&tgt.q, TestQtailqHead); + TestQtailqElement *qlast_to = QTAILQ_LAST(&tgt.q); while (1) { g_assert_cmpint(qele_to->b, ==, qele_from->b); @@ -755,7 +755,7 @@ static void test_load_q(void) /* clean up */ TestQtailqElement *qele; while (!QTAILQ_EMPTY(&tgt.q)) { - qele = QTAILQ_LAST(&tgt.q, TestQtailqHead); + qele = QTAILQ_LAST(&tgt.q); QTAILQ_REMOVE(&tgt.q, qele, next); free(qele); qele = NULL; diff --git a/tests/vhost-user-test.c b/tests/vhost-user-test.c index 45d58d8ea2..54982f68e7 100644 --- a/tests/vhost-user-test.c +++ b/tests/vhost-user-test.c @@ -354,8 +354,8 @@ static void chr_read(void *opaque, const uint8_t *buf, int size) break; case VHOST_USER_SET_FEATURES: - g_assert_cmpint(msg.payload.u64 & (0x1ULL << VHOST_USER_F_PROTOCOL_FEATURES), - !=, 0ULL); + g_assert_cmpint(msg.payload.u64 & (0x1ULL << VHOST_USER_F_PROTOCOL_FEATURES), + !=, 0ULL); if (s->test_flags == TEST_FLAGS_DISCONNECT) { qemu_chr_fe_disconnect(chr); s->test_flags = TEST_FLAGS_BAD; diff --git a/ui/console.c b/ui/console.c index 3a285bae00..6d2282d3e9 100644 --- a/ui/console.c +++ b/ui/console.c @@ -182,7 +182,7 @@ struct DisplayState { static DisplayState *display_state; static QemuConsole *active_console; -static QTAILQ_HEAD(consoles_head, QemuConsole) consoles = +static QTAILQ_HEAD(, QemuConsole) consoles = QTAILQ_HEAD_INITIALIZER(consoles); static bool cursor_visible_phase; static QEMUTimer *cursor_timer; @@ -1303,7 +1303,7 @@ static QemuConsole *new_console(DisplayState *ds, console_type_t console_type, s->index = 0; QTAILQ_INSERT_TAIL(&consoles, s, next); } else if (console_type != GRAPHIC_CONSOLE || qdev_hotplug) { - QemuConsole *last = QTAILQ_LAST(&consoles, consoles_head); + QemuConsole *last = QTAILQ_LAST(&consoles); s->index = last->index + 1; QTAILQ_INSERT_TAIL(&consoles, s, next); } else { @@ -1385,42 +1385,6 @@ DisplaySurface *qemu_create_displaysurface_pixman(pixman_image_t *image) return surface; } -static void qemu_unmap_displaysurface_guestmem(pixman_image_t *image, - void *unused) -{ - void *data = pixman_image_get_data(image); - uint32_t size = pixman_image_get_stride(image) * - pixman_image_get_height(image); - cpu_physical_memory_unmap(data, size, 0, 0); -} - -DisplaySurface *qemu_create_displaysurface_guestmem(int width, int height, - pixman_format_code_t format, - int linesize, uint64_t addr) -{ - DisplaySurface *surface; - hwaddr size; - void *data; - - if (linesize == 0) { - linesize = width * PIXMAN_FORMAT_BPP(format) / 8; - } - - size = (hwaddr)linesize * height; - data = cpu_physical_memory_map(addr, &size, 0); - if (size != (hwaddr)linesize * height) { - cpu_physical_memory_unmap(data, size, 0, 0); - return NULL; - } - - surface = qemu_create_displaysurface_from - (width, height, format, linesize, data); - pixman_image_set_destroy_function - (surface->image, qemu_unmap_displaysurface_guestmem, NULL); - - return surface; -} - DisplaySurface *qemu_create_message_surface(int w, int h, const char *msg) { diff --git a/ui/egl-headless.c b/ui/egl-headless.c index 4cf3bbc0e4..519e7bad32 100644 --- a/ui/egl-headless.c +++ b/ui/egl-headless.c @@ -38,6 +38,14 @@ static void egl_gfx_switch(DisplayChangeListener *dcl, edpy->ds = new_surface; } +static QEMUGLContext egl_create_context(DisplayChangeListener *dcl, + QEMUGLParams *params) +{ + eglMakeCurrent(qemu_egl_display, EGL_NO_SURFACE, EGL_NO_SURFACE, + qemu_egl_rn_ctx); + return qemu_egl_create_context(dcl, params); +} + static void egl_scanout_disable(DisplayChangeListener *dcl) { egl_dpy *edpy = container_of(dcl, egl_dpy, dcl); @@ -150,7 +158,7 @@ static const DisplayChangeListenerOps egl_ops = { .dpy_gfx_update = egl_gfx_update, .dpy_gfx_switch = egl_gfx_switch, - .dpy_gl_ctx_create = qemu_egl_create_context, + .dpy_gl_ctx_create = egl_create_context, .dpy_gl_ctx_destroy = qemu_egl_destroy_context, .dpy_gl_ctx_make_current = qemu_egl_make_context_current, .dpy_gl_ctx_get_current = qemu_egl_get_current_context, diff --git a/ui/input.c b/ui/input.c index 7c9a4109c4..9494688295 100644 --- a/ui/input.c +++ b/ui/input.c @@ -19,6 +19,9 @@ struct QemuInputHandlerState { }; typedef struct QemuInputEventQueue QemuInputEventQueue; +typedef QTAILQ_HEAD(QemuInputEventQueueHead, QemuInputEventQueue) + QemuInputEventQueueHead; + struct QemuInputEventQueue { enum { QEMU_INPUT_QUEUE_DELAY = 1, @@ -37,8 +40,7 @@ static QTAILQ_HEAD(, QemuInputHandlerState) handlers = static NotifierList mouse_mode_notifiers = NOTIFIER_LIST_INITIALIZER(mouse_mode_notifiers); -static QTAILQ_HEAD(QemuInputEventQueueHead, QemuInputEventQueue) kbd_queue = - QTAILQ_HEAD_INITIALIZER(kbd_queue); +static QemuInputEventQueueHead kbd_queue = QTAILQ_HEAD_INITIALIZER(kbd_queue); static QEMUTimer *kbd_timer; static uint32_t kbd_default_delay_ms = 10; static uint32_t queue_count; @@ -257,7 +259,7 @@ static void qemu_input_event_trace(QemuConsole *src, InputEvent *evt) static void qemu_input_queue_process(void *opaque) { - struct QemuInputEventQueueHead *queue = opaque; + QemuInputEventQueueHead *queue = opaque; QemuInputEventQueue *item; g_assert(!QTAILQ_EMPTY(queue)); @@ -288,7 +290,7 @@ static void qemu_input_queue_process(void *opaque) } } -static void qemu_input_queue_delay(struct QemuInputEventQueueHead *queue, +static void qemu_input_queue_delay(QemuInputEventQueueHead *queue, QEMUTimer *timer, uint32_t delay_ms) { QemuInputEventQueue *item = g_new0(QemuInputEventQueue, 1); @@ -306,7 +308,7 @@ static void qemu_input_queue_delay(struct QemuInputEventQueueHead *queue, } } -static void qemu_input_queue_event(struct QemuInputEventQueueHead *queue, +static void qemu_input_queue_event(QemuInputEventQueueHead *queue, QemuConsole *src, InputEvent *evt) { QemuInputEventQueue *item = g_new0(QemuInputEventQueue, 1); @@ -318,7 +320,7 @@ static void qemu_input_queue_event(struct QemuInputEventQueueHead *queue, queue_count++; } -static void qemu_input_queue_sync(struct QemuInputEventQueueHead *queue) +static void qemu_input_queue_sync(QemuInputEventQueueHead *queue) { QemuInputEventQueue *item = g_new0(QemuInputEventQueue, 1); @@ -458,22 +460,18 @@ void qemu_input_event_send_key_delay(uint32_t delay_ms) } } -InputEvent *qemu_input_event_new_btn(InputButton btn, bool down) -{ - InputEvent *evt = g_new0(InputEvent, 1); - evt->u.btn.data = g_new0(InputBtnEvent, 1); - evt->type = INPUT_EVENT_KIND_BTN; - evt->u.btn.data->button = btn; - evt->u.btn.data->down = down; - return evt; -} - void qemu_input_queue_btn(QemuConsole *src, InputButton btn, bool down) { - InputEvent *evt; - evt = qemu_input_event_new_btn(btn, down); - qemu_input_event_send(src, evt); - qapi_free_InputEvent(evt); + InputBtnEvent bevt = { + .button = btn, + .down = down, + }; + InputEvent evt = { + .type = INPUT_EVENT_KIND_BTN, + .u.btn.data = &bevt, + }; + + qemu_input_event_send(src, &evt); } void qemu_input_update_buttons(QemuConsole *src, uint32_t *button_map, @@ -513,37 +511,35 @@ int qemu_input_scale_axis(int value, return ((int64_t)value - min_in) * range_out / range_in + min_out; } -InputEvent *qemu_input_event_new_move(InputEventKind kind, - InputAxis axis, int value) -{ - InputEvent *evt = g_new0(InputEvent, 1); - InputMoveEvent *move = g_new0(InputMoveEvent, 1); - - evt->type = kind; - evt->u.rel.data = move; /* evt->u.rel is the same as evt->u.abs */ - move->axis = axis; - move->value = value; - return evt; -} - void qemu_input_queue_rel(QemuConsole *src, InputAxis axis, int value) { - InputEvent *evt; - evt = qemu_input_event_new_move(INPUT_EVENT_KIND_REL, axis, value); - qemu_input_event_send(src, evt); - qapi_free_InputEvent(evt); + InputMoveEvent move = { + .axis = axis, + .value = value, + }; + InputEvent evt = { + .type = INPUT_EVENT_KIND_REL, + .u.rel.data = &move, + }; + + qemu_input_event_send(src, &evt); } void qemu_input_queue_abs(QemuConsole *src, InputAxis axis, int value, int min_in, int max_in) { - InputEvent *evt; - int scaled = qemu_input_scale_axis(value, min_in, max_in, + InputMoveEvent move = { + .axis = axis, + .value = qemu_input_scale_axis(value, min_in, max_in, INPUT_EVENT_ABS_MIN, - INPUT_EVENT_ABS_MAX); - evt = qemu_input_event_new_move(INPUT_EVENT_KIND_ABS, axis, scaled); - qemu_input_event_send(src, evt); - qapi_free_InputEvent(evt); + INPUT_EVENT_ABS_MAX), + }; + InputEvent evt = { + .type = INPUT_EVENT_KIND_ABS, + .u.abs.data = &move, + }; + + qemu_input_event_send(src, &evt); } void qemu_input_check_mode_change(void) diff --git a/ui/keymaps.c b/ui/keymaps.c index 085889b555..6e44f738ed 100644 --- a/ui/keymaps.c +++ b/ui/keymaps.c @@ -115,10 +115,9 @@ static int parse_keyboard_layout(kbd_layout_t *k, continue; } if (!strncmp(line, "include ", 8)) { - if (parse_keyboard_layout(k, table, line + 8, errp) < 0) { - ret = -1; - goto out; - } + error_setg(errp, "keymap include files are not supported any more"); + ret = -1; + goto out; } else { int offset = 0; while (line[offset] != 0 && diff --git a/ui/keymaps.h b/ui/keymaps.h index 98213a4191..4e9c87fb8f 100644 --- a/ui/keymaps.h +++ b/ui/keymaps.h @@ -28,8 +28,8 @@ #include "qemu-common.h" typedef struct { - const char* name; - int keysym; + const char* name; + int keysym; } name2keysym_t; /* scancode without modifiers */ diff --git a/ui/qemu-pixman.c b/ui/qemu-pixman.c index 3e52abd92d..1429cf08d5 100644 --- a/ui/qemu-pixman.c +++ b/ui/qemu-pixman.c @@ -36,7 +36,7 @@ PixelFormat qemu_pixelformat_from_pixman(pixman_format_code_t format) pf.rshift = 0; break; case PIXMAN_TYPE_BGRA: - pf.bshift = bpp - pf.bbits; + pf.bshift = bpp - pf.bbits; pf.gshift = bpp - (pf.bbits + pf.gbits); pf.rshift = bpp - (pf.bbits + pf.gbits + pf.rbits); pf.ashift = 0; diff --git a/ui/spice-core.c b/ui/spice-core.c index ebaae24643..a40fb2c00d 100644 --- a/ui/spice-core.c +++ b/ui/spice-core.c @@ -18,7 +18,6 @@ #include "qemu/osdep.h" #include <spice.h> -#include <netdb.h> #include "sysemu/sysemu.h" #include "ui/qemu-spice.h" @@ -745,13 +744,7 @@ void qemu_spice_init(void) } if (qemu_opt_get_bool(opts, "disable-agent-file-xfer", 0)) { -#if SPICE_SERVER_VERSION >= 0x000c04 spice_server_set_agent_file_xfer(spice_server, false); -#else - error_report("this qemu build does not support the " - "\"disable-agent-file-xfer\" option"); - exit(1); -#endif } compression = SPICE_IMAGE_COMPRESS_AUTO_GLZ; @@ -817,9 +810,7 @@ void qemu_spice_init(void) g_free(x509_cert_file); g_free(x509_cacert_file); -#if SPICE_SERVER_VERSION >= 0x000c02 qemu_spice_register_ports(); -#endif #ifdef HAVE_SPICE_GL if (qemu_opt_get_bool(opts, "gl", 0)) { diff --git a/ui/vnc-enc-zywrle-template.c b/ui/vnc-enc-zywrle-template.c index b446380a7a..e9be55966e 100644 --- a/ui/vnc-enc-zywrle-template.c +++ b/ui/vnc-enc-zywrle-template.c @@ -44,8 +44,8 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. /* Change Log: V0.02 : 2008/02/04 : Fix mis encode/decode when width != scanline - (Thanks Johannes Schindelin, author of LibVNC - Server/Client) + (Thanks Johannes Schindelin, author of LibVNC + Server/Client) V0.01 : 2007/02/06 : Initial release */ diff --git a/ui/vnc.c b/ui/vnc.c index 0c1b477425..9e4b2beb71 100644 --- a/ui/vnc.c +++ b/ui/vnc.c @@ -3097,8 +3097,8 @@ static void vnc_connect(VncDisplay *vd, QIOChannelSocket *sioc, buffer_init(&vs->zrle.zlib, "vnc-zrle-zlib/%p", sioc); if (skipauth) { - vs->auth = VNC_AUTH_NONE; - vs->subauth = VNC_AUTH_INVALID; + vs->auth = VNC_AUTH_NONE; + vs->subauth = VNC_AUTH_INVALID; } else { if (websocket) { vs->auth = vd->ws_auth; diff --git a/util/bitops.c b/util/bitops.c index f2364015c4..3fe6b1c4f1 100644 --- a/util/bitops.c +++ b/util/bitops.c @@ -18,7 +18,7 @@ * Find the next set bit in a memory region. */ unsigned long find_next_bit(const unsigned long *addr, unsigned long size, - unsigned long offset) + unsigned long offset) { const unsigned long *p = addr + BIT_WORD(offset); unsigned long result = offset & ~(BITS_PER_LONG-1); @@ -83,7 +83,7 @@ found_middle: * Linus' asm-alpha/bitops.h. */ unsigned long find_next_zero_bit(const unsigned long *addr, unsigned long size, - unsigned long offset) + unsigned long offset) { const unsigned long *p = addr + BIT_WORD(offset); unsigned long result = offset & ~(BITS_PER_LONG-1); diff --git a/util/osdep.c b/util/osdep.c index 1c8d1e2ee0..4b5dc7287d 100644 --- a/util/osdep.c +++ b/util/osdep.c @@ -470,8 +470,8 @@ void fips_set_state(bool requested) #ifdef _FIPS_DEBUG fprintf(stderr, "FIPS mode %s (requested %s)\n", - (fips_enabled ? "enabled" : "disabled"), - (requested ? "enabled" : "disabled")); + (fips_enabled ? "enabled" : "disabled"), + (requested ? "enabled" : "disabled")); #endif } diff --git a/util/qemu-option.c b/util/qemu-option.c index de42e2a406..ef60af70fc 100644 --- a/util/qemu-option.c +++ b/util/qemu-option.c @@ -280,7 +280,7 @@ QemuOpt *qemu_opt_find(QemuOpts *opts, const char *name) { QemuOpt *opt; - QTAILQ_FOREACH_REVERSE(opt, &opts->head, QemuOptHead, next) { + QTAILQ_FOREACH_REVERSE(opt, &opts->head, next) { if (strcmp(opt->name, name) != 0) continue; return opt; @@ -379,7 +379,7 @@ bool qemu_opt_has_help_opt(QemuOpts *opts) { QemuOpt *opt; - QTAILQ_FOREACH_REVERSE(opt, &opts->head, QemuOptHead, next) { + QTAILQ_FOREACH_REVERSE(opt, &opts->head, next) { if (is_help_option(opt->name)) { return true; } diff --git a/util/qemu-sockets.c b/util/qemu-sockets.c index 8bd8bb64eb..9705051690 100644 --- a/util/qemu-sockets.c +++ b/util/qemu-sockets.c @@ -270,8 +270,8 @@ static int inet_listen_saddr(InetSocketAddress *saddr, /* create socket + bind/listen */ for (e = res; e != NULL; e = e->ai_next) { getnameinfo((struct sockaddr*)e->ai_addr,e->ai_addrlen, - uaddr,INET6_ADDRSTRLEN,uport,32, - NI_NUMERICHOST | NI_NUMERICSERV); + uaddr,INET6_ADDRSTRLEN,uport,32, + NI_NUMERICHOST | NI_NUMERICSERV); port_min = inet_getport(e); port_max = saddr->has_to ? saddr->to + port_offset : port_min; diff --git a/util/qemu-thread-win32.c b/util/qemu-thread-win32.c index 4a363ca675..572f88535d 100644 --- a/util/qemu-thread-win32.c +++ b/util/qemu-thread-win32.c @@ -11,10 +11,6 @@ * */ -#ifndef _WIN32_WINNT -#define _WIN32_WINNT 0x0600 -#endif - #include "qemu/osdep.h" #include "qemu-common.h" #include "qemu/thread.h" diff --git a/vl.c b/vl.c index 064872cc98..9b8ea3f654 100644 --- a/vl.c +++ b/vl.c @@ -1529,7 +1529,7 @@ struct vm_change_state_entry { QLIST_ENTRY (vm_change_state_entry) entries; }; -static QLIST_HEAD(vm_change_state_head, vm_change_state_entry) vm_change_state_head; +static QLIST_HEAD(, vm_change_state_entry) vm_change_state_head; VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb, void *opaque) @@ -4329,7 +4329,7 @@ int main(int argc, char **argv, char **envp) qemu_opt_foreach(machine_opts, machine_set_property, current_machine, &error_fatal); - configure_accelerator(current_machine); + configure_accelerator(current_machine, argv[0]); if (!qtest_enabled() && machine_class->deprecation_reason) { error_report("Machine type '%s' is deprecated: %s", |