diff options
| -rw-r--r-- | docs/conf.py | 9 | ||||
| -rw-r--r-- | hw/arm/orangepi.c | 2 | ||||
| -rw-r--r-- | hw/arm/xlnx-zynqmp.c | 27 | ||||
| -rw-r--r-- | hw/misc/allwinner-h3-dramc.c | 4 | ||||
| -rw-r--r-- | target/arm/helper.c | 5 |
5 files changed, 38 insertions, 9 deletions
diff --git a/docs/conf.py b/docs/conf.py index af55f506d5..7768611e89 100644 --- a/docs/conf.py +++ b/docs/conf.py @@ -29,14 +29,15 @@ import os import sys import sphinx -from sphinx.errors import VersionRequirementError +from sphinx.errors import ConfigError # Make Sphinx fail cleanly if using an old Python, rather than obscurely # failing because some code in one of our extensions doesn't work there. -# Unfortunately this doesn't display very neatly (there's an unavoidable -# Python backtrace) but at least the information gets printed... +# In newer versions of Sphinx this will display nicely; in older versions +# Sphinx will also produce a Python backtrace but at least the information +# gets printed... if sys.version_info < (3,5): - raise VersionRequirementError( + raise ConfigError( "QEMU requires a Sphinx that uses Python 3.5 or better\n") # The per-manual conf.py will set qemu_docdir for a single-manual build; diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index 181f5badab..a9f64c5680 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -104,7 +104,7 @@ static void orangepi_init(MachineState *machine) machine->ram); /* Load target kernel or start using BootROM */ - if (!machine->kernel_filename && blk_is_available(blk)) { + if (!machine->kernel_filename && blk && blk_is_available(blk)) { /* Use Boot ROM to copy data from SD card to SRAM */ allwinner_h3_bootrom_setup(h3, blk); } diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 49f1c8d0de..b84d153d56 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -520,7 +520,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, gic_spi[SATA_INTR]); for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) { - char *bus_name = g_strdup_printf("sd-bus%d", i); + char *bus_name; SysBusDevice *sbd = SYS_BUS_DEVICE(&s->sdhci[i]); Object *sdhci = OBJECT(&s->sdhci[i]); @@ -530,8 +530,20 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) * - eMMC Specification Version 4.51 */ object_property_set_uint(sdhci, 3, "sd-spec-version", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_uint(sdhci, SDHCI_CAPABILITIES, "capareg", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_uint(sdhci, UHS_I, "uhs", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(sdhci, true, "realized", &err); if (err) { error_propagate(errp, err); @@ -541,6 +553,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(sbd, 0, gic_spi[sdhci_intr[i]]); /* Alias controller SD bus to the SoC itself */ + bus_name = g_strdup_printf("sd-bus%d", i); object_property_add_alias(OBJECT(s), bus_name, sdhci, "sd-bus", &error_abort); g_free(bus_name); @@ -550,6 +563,10 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) gchar *bus_name; object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_addr[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0, @@ -564,6 +581,10 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) } object_property_set_bool(OBJECT(&s->qspi), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 0, QSPI_ADDR); sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 1, LQSPI_ADDR); sysbus_connect_irq(SYS_BUS_DEVICE(&s->qspi), 0, gic_spi[QSPI_IRQ]); @@ -618,6 +639,10 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) { object_property_set_uint(OBJECT(&s->gdma[i]), 128, "bus-width", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->gdma[i]), true, "realized", &err); if (err) { error_propagate(errp, err); diff --git a/hw/misc/allwinner-h3-dramc.c b/hw/misc/allwinner-h3-dramc.c index 2b5260260e..1d37cf422c 100644 --- a/hw/misc/allwinner-h3-dramc.c +++ b/hw/misc/allwinner-h3-dramc.c @@ -85,8 +85,8 @@ static void allwinner_h3_dramc_map_rows(AwH3DramCtlState *s, uint8_t row_bits, } else if (row_bits_actual) { /* Row bits not matching ram_size, install the rows mirror */ - hwaddr row_mirror = s->ram_addr + ((1 << (row_bits_actual + - bank_bits)) * page_size); + hwaddr row_mirror = s->ram_addr + ((1ULL << (row_bits_actual + + bank_bits)) * page_size); memory_region_set_enabled(&s->row_mirror_alias, true); memory_region_set_address(&s->row_mirror_alias, row_mirror); diff --git a/target/arm/helper.c b/target/arm/helper.c index b7b6887241..163c91a1cc 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -9172,7 +9172,6 @@ static void take_aarch32_exception(CPUARMState *env, int new_mode, /* Change the CPU state so as to actually take the exception. */ switch_mode(env, new_mode); - new_el = arm_current_el(env); /* * For exceptions taken to AArch32 we must clear the SS bit in both @@ -9184,6 +9183,10 @@ static void take_aarch32_exception(CPUARMState *env, int new_mode, env->condexec_bits = 0; /* Switch to the new mode, and to the correct instruction set. */ env->uncached_cpsr = (env->uncached_cpsr & ~CPSR_M) | new_mode; + + /* This must be after mode switching. */ + new_el = arm_current_el(env); + /* Set new mode endianness */ env->uncached_cpsr &= ~CPSR_E; if (env->cp15.sctlr_el[new_el] & SCTLR_EE) { |