diff options
1089 files changed, 28855 insertions, 12207 deletions
diff --git a/.gitignore b/.gitignore index 77522561b8..fd6e6c38c7 100644 --- a/.gitignore +++ b/.gitignore @@ -6,6 +6,7 @@ /config-target.* /config.status /config-temp +/elf2dmp /trace-events-all /trace/generated-events.h /trace/generated-events.c @@ -96,6 +97,7 @@ *.gcno *.gcov /pc-bios/bios-pq/status +/pc-bios/edk2-*.fd /pc-bios/vgabios-pq/status /pc-bios/optionrom/linuxboot.asm /pc-bios/optionrom/linuxboot.bin @@ -119,6 +121,7 @@ /pc-bios/optionrom/kvmvapic.img /pc-bios/s390-ccw/s390-ccw.elf /pc-bios/s390-ccw/s390-ccw.img +/docs/built /docs/interop/qemu-ga-qapi.texi /docs/interop/qemu-ga-ref.html /docs/interop/qemu-ga-ref.info* diff --git a/.travis.yml b/.travis.yml index e942175dd3..2e06aee9d0 100644 --- a/.travis.yml +++ b/.travis.yml @@ -61,7 +61,8 @@ env: - BUILD_DIR="." - BASE_CONFIG="--disable-docs --disable-tools" - TEST_CMD="make check -j3 V=1" - + # This is broadly a list of "mainline" softmmu targets which have support across the major distros + - MAIN_SOFTMMU_TARGETS="aarch64-softmmu,arm-softmmu,i386-softmmu,mips-softmmu,mips64-softmmu,ppc64-softmmu,riscv64-softmmu,s390x-softmmu,x86_64-softmmu" git: # we want to do this ourselves @@ -81,9 +82,20 @@ matrix: - CONFIG="--disable-system" + # we split the system builds as it takes a while to build them all + - env: + - CONFIG="--disable-user --target-list=${MAIN_SOFTMMU_TARGETS}" + + - env: - - CONFIG="--disable-user" + - CONFIG="--disable-user --target-list-exclude=${MAIN_SOFTMMU_TARGETS}" + + # Just build tools and run minimal unit and softfloat checks + - env: + - BASE_CONFIG="--enable-tools" + - CONFIG="--disable-user --disable-system" + - TEST_CMD="make check-unit check-softfloat -j3" - env: - CONFIG="--enable-debug --enable-debug-tcg --disable-user" @@ -95,11 +107,12 @@ matrix: - env: - - CONFIG="--disable-linux-aio --disable-cap-ng --disable-attr --disable-brlapi --disable-libusb --disable-user --disable-replication" + - CONFIG="--disable-linux-aio --disable-cap-ng --disable-attr --disable-brlapi --disable-libusb --disable-replication --target-list=${MAIN_SOFTMMU_TARGETS}" + # Module builds are mostly of interest to major distros - env: - - CONFIG="--enable-modules --disable-linux-user" + - CONFIG="--enable-modules --target-list=${MAIN_SOFTMMU_TARGETS}" # Alternate coroutines implementations are only really of interest to KVM users @@ -114,8 +127,9 @@ matrix: - TEST_CMD="make check-unit -j3 V=1" - # Check we can build docs and tools + # Check we can build docs and tools (out of tree) - env: + - BUILD_DIR="out-of-tree/build/dir" SRC_DIR="../../.." - BASE_CONFIG="--enable-tools --enable-docs" - CONFIG="--target-list=x86_64-softmmu,aarch64-linux-user" addons: @@ -125,11 +139,6 @@ matrix: - texinfo - perl - # Test out-of-tree builds - - env: - - CONFIG="--enable-debug --enable-debug-tcg" - - BUILD_DIR="out-of-tree/build/dir" SRC_DIR="../../.." - # Test with Clang for compile portability (Travis uses clang-5.0) - env: @@ -138,20 +147,25 @@ matrix: - env: - - CONFIG="--disable-user" + - CONFIG="--disable-user --target-list=${MAIN_SOFTMMU_TARGETS}" + compiler: clang + + + - env: + - CONFIG="--disable-user --target-list-exclude=${MAIN_SOFTMMU_TARGETS}" compiler: clang # gprof/gcov are GCC features - env: - - CONFIG="--enable-gprof --enable-gcov --disable-pie --target-list=aarch64-softmmu,arm-softmmu,i386-softmmu,mips-softmmu,mips64-softmmu,ppc64-softmmu,riscv64-softmmu,s390x-softmmu,x86_64-softmmu" + - CONFIG="--enable-gprof --enable-gcov --disable-pie --target-list=${MAIN_SOFTMMU_TARGETS}" after_success: - ${SRC_DIR}/scripts/travis/coverage-summary.sh # We manually include builds which we disable "make check" for - env: - - CONFIG="--without-default-devices" + - CONFIG="--without-default-devices --disable-user" - TEST_CMD="" @@ -179,12 +193,19 @@ matrix: # MacOSX builds - env: - - CONFIG="--target-list=aarch64-softmmu,arm-softmmu,i386-softmmu,mips-softmmu,mips64-softmmu,ppc64-softmmu,riscv64-softmmu,s390x-softmmu,x86_64-softmmu" + - CONFIG="--target-list=${MAIN_SOFTMMU_TARGETS}" os: osx osx_image: xcode9.4 compiler: clang + - env: + - CONFIG="--target-list=i386-softmmu,ppc-softmmu,ppc64-softmmu,m68k-softmmu,x86_64-softmmu" + os: osx + osx_image: xcode10.2 + compiler: clang + + # Python builds - env: - CONFIG="--target-list=x86_64-softmmu" @@ -255,6 +276,12 @@ matrix: - ./configure ${CONFIG} --extra-cflags="-g3 -O0 -fsanitize=thread -fuse-ld=gold" || { cat config.log && exit 1; } + # Run check-tcg against linux-user - env: - CONFIG="--disable-system" - TEST_CMD="make -j3 check-tcg V=1" + + # Run check-tcg against softmmu targets + - env: + - CONFIG="--target-list=xtensa-softmmu,arm-softmmu" + - TEST_CMD="make -j3 check-tcg V=1" diff --git a/Kconfig.host b/Kconfig.host index add5b179f7..aec95365ff 100644 --- a/Kconfig.host +++ b/Kconfig.host @@ -31,3 +31,6 @@ config XEN config VIRTFS bool + +config PVRDMA + bool diff --git a/MAINTAINERS b/MAINTAINERS index d326756079..7dd71e0a2d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -117,6 +117,8 @@ F: cpus.c F: exec.c F: accel/tcg/ F: accel/stubs/tcg-stub.c +F: scripts/decodetree.py +F: docs/devel/decodetree.rst F: include/exec/cpu*.h F: include/exec/exec-all.h F: include/exec/helper*.h @@ -661,10 +663,14 @@ M: Peter Maydell <peter.maydell@linaro.org> L: qemu-arm@nongnu.org S: Odd Fixes F: hw/arm/nseries.c +F: hw/display/blizzard.c F: hw/input/lm832x.c F: hw/input/tsc2005.c F: hw/misc/cbus.c F: hw/timer/twl92230.c +F: include/hw/display/blizzard.h +F: include/hw/input/tsc2xxx.h +F: include/hw/misc/cbus.h Palm M: Andrzej Zaborowski <balrogg@gmail.com> @@ -673,6 +679,7 @@ L: qemu-arm@nongnu.org S: Odd Fixes F: hw/arm/palm.c F: hw/input/tsc210x.c +F: include/hw/input/tsc2xxx.h Raspberry Pi M: Peter Maydell <peter.maydell@linaro.org> @@ -712,6 +719,7 @@ F: hw/misc/mst_fpga.c F: hw/misc/max111x.c F: include/hw/arm/pxa.h F: include/hw/arm/sharpsl.h +F: include/hw/display/tc6393xb.h SABRELITE / i.MX6 M: Peter Maydell <peter.maydell@linaro.org> @@ -738,6 +746,7 @@ M: Peter Maydell <peter.maydell@linaro.org> L: qemu-arm@nongnu.org S: Maintained F: hw/*/stellaris* +F: include/hw/input/gamepad.h Versatile Express M: Peter Maydell <peter.maydell@linaro.org> @@ -1059,7 +1068,6 @@ F: include/hw/*/xics* F: pc-bios/spapr-rtas/* F: pc-bios/spapr-rtas.bin F: pc-bios/slof.bin -F: pc-bios/skiboot.lid F: docs/specs/ppc-spapr-hcalls.txt F: docs/specs/ppc-spapr-hotplug.txt F: tests/spapr* @@ -1067,6 +1075,18 @@ F: tests/libqos/*spapr* F: tests/rtas* F: tests/libqos/rtas* +PowerNV (Non-Virtualized) +M: Cédric Le Goater <clg@kaod.org> +M: David Gibson <david@gibson.dropbear.id.au> +L: qemu-ppc@nongnu.org +S: Maintained +F: hw/ppc/pnv* +F: hw/intc/pnv* +F: hw/intc/xics_pnv.c +F: include/hw/ppc/pnv* +F: pc-bios/skiboot.lid +F: tests/pnv* + virtex_ml507 M: Edgar E. Iglesias <edgar.iglesias@gmail.com> L: qemu-ppc@nongnu.org @@ -1168,6 +1188,7 @@ S: Supported F: hw/s390x/ipl.* F: pc-bios/s390-ccw/ F: pc-bios/s390-ccw.img +F: docs/devel/s390-dasd-ipl.txt T: git https://github.com/borntraeger/qemu.git s390-next L: qemu-s390x@nongnu.org @@ -1432,6 +1453,7 @@ S: Supported F: hw/vfio/ccw.c F: hw/s390x/s390-ccw.c F: include/hw/s390x/s390-ccw.h +F: include/hw/s390x/vfio-ccw.h T: git https://github.com/cohuck/qemu.git s390-next L: qemu-s390x@nongnu.org @@ -1453,6 +1475,7 @@ vhost M: Michael S. Tsirkin <mst@redhat.com> S: Supported F: hw/*/*vhost* +F: docs/interop/vhost-user.json F: docs/interop/vhost-user.txt F: contrib/vhost-user-*/ @@ -1799,7 +1822,8 @@ F: qom/cpu.c F: include/qom/cpu.h Device Tree -M: Alexander Graf <agraf@suse.de> +M: Alistair Francis <alistair.francis@wdc.com> +R: David Gibson <david@gibson.dropbear.id.au> S: Maintained F: device_tree.c F: include/sysemu/device_tree.h @@ -1880,6 +1904,8 @@ F: hmp.[ch] F: hmp-commands*.hx F: include/monitor/hmp-target.h F: tests/test-hmp.c +F: include/qemu/qemu-print.h +F: util/qemu-print.c Network device backends M: Jason Wang <jasowang@redhat.com> @@ -2164,7 +2190,7 @@ F: include/migration/failover.h F: docs/COLO-FT.txt COLO Proxy -M: Zhang Chen <zhangckid@gmail.com> +M: Zhang Chen <chen.zhang@intel.com> M: Li Zhijian <lizhijian@cn.fujitsu.com> S: Supported F: docs/colo-proxy.txt @@ -2207,6 +2233,18 @@ F: include/hw/i2c/smbus_master.h F: include/hw/i2c/smbus_slave.h F: include/hw/i2c/smbus_eeprom.h +EDK2 Firmware +M: Laszlo Ersek <lersek@redhat.com> +M: Philippe Mathieu-Daudé <philmd@redhat.com> +S: Supported +F: pc-bios/descriptors/??-edk2-*.json +F: pc-bios/edk2-* +F: roms/Makefile.edk2 +F: roms/edk2 +F: roms/edk2-* +F: tests/data/uefi-boot-images/ +F: tests/uefi-test-tools/ + Usermode Emulation ------------------ Overall diff --git a/Makefile b/Makefile index f1325947f6..1211e78c91 100644 --- a/Makefile +++ b/Makefile @@ -296,6 +296,10 @@ ui/input-keymap-%.c: $(KEYCODEMAP_GEN) $(KEYCODEMAP_CSV) $(SRC_PATH)/ui/Makefile $(KEYCODEMAP_GEN): .git-submodule-status $(KEYCODEMAP_CSV): .git-submodule-status +edk2-decompressed = $(basename $(wildcard pc-bios/edk2-*.fd.bz2)) +pc-bios/edk2-%.fd: pc-bios/edk2-%.fd.bz2 + $(call quiet-command,bzip2 -d -c $< > $@,"BUNZIP2",$<) + # Don't try to regenerate Makefile or configure # We don't generate any of them Makefile: ; @@ -331,10 +335,10 @@ SUBDIR_DEVICES_MAK=$(patsubst %, %/config-devices.mak, $(filter %-softmmu, $(TAR SUBDIR_DEVICES_MAK_DEP=$(patsubst %, %.d, $(SUBDIR_DEVICES_MAK)) ifeq ($(SUBDIR_DEVICES_MAK),) -config-all-devices.mak: +config-all-devices.mak: config-host.mak $(call quiet-command,echo '# no devices' > $@,"GEN","$@") else -config-all-devices.mak: $(SUBDIR_DEVICES_MAK) +config-all-devices.mak: $(SUBDIR_DEVICES_MAK) config-host.mak $(call quiet-command, sed -n \ 's|^\([^=]*\)=\(.*\)$$|\1:=$$(findstring y,$$(\1)\2)|p' \ $(SUBDIR_DEVICES_MAK) | sort -u > $@, \ @@ -356,7 +360,8 @@ MINIKCONF_ARGS = \ CONFIG_X11=$(CONFIG_X11) \ CONFIG_VHOST_USER=$(CONFIG_VHOST_USER) \ CONFIG_VIRTFS=$(CONFIG_VIRTFS) \ - CONFIG_LINUX=$(CONFIG_LINUX) + CONFIG_LINUX=$(CONFIG_LINUX) \ + CONFIG_PVRDMA=$(CONFIG_PVRDMA) MINIKCONF_INPUTS = $(SRC_PATH)/Kconfig.host $(SRC_PATH)/hw/Kconfig MINIKCONF = $(PYTHON) $(SRC_PATH)/scripts/minikconf.py \ @@ -444,6 +449,7 @@ $(SOFTMMU_SUBDIR_RULES): $(block-obj-y) $(SOFTMMU_SUBDIR_RULES): $(crypto-obj-y) $(SOFTMMU_SUBDIR_RULES): $(io-obj-y) $(SOFTMMU_SUBDIR_RULES): config-all-devices.mak +$(SOFTMMU_SUBDIR_RULES): $(edk2-decompressed) subdir-%: $(call quiet-command,$(MAKE) $(SUBDIR_MAKEFLAGS) -C $* V="$(V)" TARGET_DIR="$*/" all,) @@ -497,7 +503,7 @@ Makefile: $(version-obj-y) # Build libraries libqemuutil.a: $(util-obj-y) $(trace-obj-y) $(stub-obj-y) -libvhost-user.a: $(libvhost-user-obj-y) +libvhost-user.a: $(libvhost-user-obj-y) $(util-obj-y) $(stub-obj-y) ###################################################################### @@ -632,6 +638,7 @@ clean: ! -path ./roms/edk2/ArmPkg/Library/GccLto/liblto-arm.a \ ! -path ./roms/edk2/BaseTools/Source/Python/UPT/Dll/sqlite3.dll \ -exec rm {} + + rm -f $(edk2-decompressed) rm -f $(filter-out %.tlb,$(TOOLS)) $(HELPERS-y) qemu-ga TAGS cscope.* *.pod *~ */*~ rm -f fsdev/*.pod scsi/*.pod rm -f qemu-img-cmds.h @@ -722,9 +729,14 @@ spapr-rtas.bin slof.bin skiboot.lid \ palcode-clipper \ u-boot.e500 u-boot-sam460-20100605.bin \ qemu_vga.ndrv \ +edk2-licenses.txt \ hppa-firmware.img + +DESCS=50-edk2-i386-secure.json 50-edk2-x86_64-secure.json \ +60-edk2-aarch64.json 60-edk2-arm.json 60-edk2-i386.json 60-edk2-x86_64.json else BLOBS= +DESCS= endif # Note that we manually filter-out the non-Sphinx documentation which @@ -785,7 +797,8 @@ endif ICON_SIZES=16x16 24x24 32x32 48x48 64x64 128x128 256x256 512x512 -install: all $(if $(BUILD_DOCS),install-doc) install-datadir install-localstatedir +install: all $(if $(BUILD_DOCS),install-doc) install-datadir install-localstatedir \ + $(if $(INSTALL_BLOBS),$(edk2-decompressed)) ifneq ($(TOOLS),) $(call install-prog,$(subst qemu-ga,qemu-ga$(EXESUF),$(TOOLS)),$(DESTDIR)$(bindir)) endif @@ -808,6 +821,21 @@ ifneq ($(BLOBS),) $(INSTALL_DATA) $(SRC_PATH)/pc-bios/$$x "$(DESTDIR)$(qemu_datadir)"; \ done endif +ifdef INSTALL_BLOBS + set -e; for x in $(edk2-decompressed); do \ + $(INSTALL_DATA) $$x "$(DESTDIR)$(qemu_datadir)"; \ + done +endif +ifneq ($(DESCS),) + $(INSTALL_DIR) "$(DESTDIR)$(qemu_datadir)/firmware" + set -e; tmpf=$$(mktemp); trap 'rm -f -- "$$tmpf"' EXIT; \ + for x in $(DESCS); do \ + sed -e 's,@DATADIR@,$(DESTDIR)$(qemu_datadir),' \ + "$(SRC_PATH)/pc-bios/descriptors/$$x" > "$$tmpf"; \ + $(INSTALL_DATA) "$$tmpf" \ + "$(DESTDIR)$(qemu_datadir)/firmware/$$x"; \ + done +endif for s in $(ICON_SIZES); do \ mkdir -p "$(DESTDIR)/$(qemu_icondir)/hicolor/$${s}/apps"; \ $(INSTALL_DATA) $(SRC_PATH)/ui/icons/qemu_$${s}.png \ @@ -964,7 +992,8 @@ $(filter %.1 %.7 %.8,$(DOCS)): scripts/texi2pod.pl %/coverage-report.html: @mkdir -p $* $(call quiet-command,\ - gcovr -p --html --html-details -o $@, \ + gcovr -r $(SRC_PATH) --object-directory $(BUILD_PATH) \ + -p --html --html-details -o $@, \ "GEN", "coverage-report.html") .PHONY: coverage-report diff --git a/Makefile.objs b/Makefile.objs index 31a84b7d41..cf065de5ed 100644 --- a/Makefile.objs +++ b/Makefile.objs @@ -182,9 +182,11 @@ trace-events-subdirs += qapi trace-events-subdirs += qom trace-events-subdirs += scsi trace-events-subdirs += target/arm +trace-events-subdirs += target/hppa trace-events-subdirs += target/i386 trace-events-subdirs += target/mips trace-events-subdirs += target/ppc +trace-events-subdirs += target/riscv trace-events-subdirs += target/s390x trace-events-subdirs += target/sparc trace-events-subdirs += ui diff --git a/Makefile.target b/Makefile.target index d8048aab8f..ae02495951 100644 --- a/Makefile.target +++ b/Makefile.target @@ -40,9 +40,7 @@ PROGS=$(QEMU_PROG) $(QEMU_PROGW) STPFILES= # Makefile Tests -ifdef CONFIG_USER_ONLY include $(SRC_PATH)/tests/tcg/Makefile.include -endif config-target.h: config-target.h-timestamp config-target.h-timestamp: config-target.mak diff --git a/VERSION b/VERSION index 0bc4611411..93896ac9f0 100644 --- a/VERSION +++ b/VERSION @@ -1 +1 @@ -3.1.50 +4.0.50 diff --git a/accel/accel.c b/accel/accel.c index 8deb475b5d..454fef9d92 100644 --- a/accel/accel.c +++ b/accel/accel.c @@ -65,8 +65,9 @@ static int accel_init_machine(AccelClass *acc, MachineState *ms) ms->accelerator = NULL; *(acc->allowed) = false; object_unref(OBJECT(accel)); + } else { + object_set_accelerator_compat_props(acc->compat_props); } - object_set_accelerator_compat_props(acc->compat_props); return ret; } diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index 241db496c3..524c4ddfbd 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -1798,7 +1798,7 @@ static int kvm_handle_internal_error(CPUState *cpu, struct kvm_run *run) if (run->internal.suberror == KVM_INTERNAL_ERROR_EMULATION) { fprintf(stderr, "emulation failure\n"); if (!kvm_arch_stop_on_emulation_error(cpu)) { - cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_CODE); + cpu_dump_state(cpu, stderr, CPU_DUMP_CODE); return EXCP_INTERRUPT; } } @@ -2089,7 +2089,7 @@ int kvm_cpu_exec(CPUState *cpu) qemu_mutex_lock_iothread(); if (ret < 0) { - cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_CODE); + cpu_dump_state(cpu, stderr, CPU_DUMP_CODE); vm_stop(RUN_STATE_INTERNAL_ERROR); } diff --git a/accel/kvm/trace-events b/accel/kvm/trace-events index 8841025d68..33c5b1b3af 100644 --- a/accel/kvm/trace-events +++ b/accel/kvm/trace-events @@ -1,4 +1,4 @@ -# Trace events for debugging and performance instrumentation +# See docs/devel/tracing.txt for syntax documentation. # kvm-all.c kvm_ioctl(int type, void *arg) "type 0x%x, arg %p" diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 88cc8389e9..f2f618217d 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -878,10 +878,11 @@ static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry, CPUTLBEntry *entry; target_ulong tlb_addr; - tlb_fill(cpu, addr, size, MMU_DATA_LOAD, mmu_idx, retaddr); + tlb_fill(cpu, addr, size, access_type, mmu_idx, retaddr); entry = tlb_entry(env, mmu_idx, addr); - tlb_addr = entry->addr_read; + tlb_addr = (access_type == MMU_DATA_LOAD ? + entry->addr_read : entry->addr_code); if (!(tlb_addr & ~(TARGET_PAGE_MASK | TLB_RECHECK))) { /* RAM access */ uintptr_t haddr = addr + entry->addend; diff --git a/accel/tcg/trace-events b/accel/tcg/trace-events index c22ad60af7..01852217a6 100644 --- a/accel/tcg/trace-events +++ b/accel/tcg/trace-events @@ -1,4 +1,4 @@ -# Trace events for debugging and performance instrumentation +# See docs/devel/tracing.txt for syntax documentation. # TCG related tracing (mostly disabled by default) # cpu-exec.c diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 8f593b926f..20b59f93f4 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -50,6 +50,7 @@ #include "translate-all.h" #include "qemu/bitmap.h" #include "qemu/error-report.h" +#include "qemu/qemu-print.h" #include "qemu/timer.h" #include "qemu/main-loop.h" #include "exec/log.h" @@ -1673,7 +1674,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, tb_page_addr_t phys_pc, phys_page2; target_ulong virt_page2; tcg_insn_unit *gen_code_buf; - int gen_code_size, search_size; + int gen_code_size, search_size, max_insns; #ifdef CONFIG_PROFILER TCGProfile *prof = &tcg_ctx->prof; int64_t ti; @@ -1691,6 +1692,17 @@ TranslationBlock *tb_gen_code(CPUState *cpu, cflags &= ~CF_CLUSTER_MASK; cflags |= cpu->cluster_index << CF_CLUSTER_SHIFT; + max_insns = cflags & CF_COUNT_MASK; + if (max_insns == 0) { + max_insns = CF_COUNT_MASK; + } + if (max_insns > TCG_MAX_INSNS) { + max_insns = TCG_MAX_INSNS; + } + if (cpu->singlestep_enabled || singlestep) { + max_insns = 1; + } + buffer_overflow: tb = tb_alloc(pc); if (unlikely(!tb)) { @@ -1710,6 +1722,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, tb->cflags = cflags; tb->trace_vcpu_dstate = *cpu->trace_dstate; tcg_ctx->tb_cflags = cflags; + tb_overflow: #ifdef CONFIG_PROFILER /* includes aborted translations because of exceptions */ @@ -1720,7 +1733,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, tcg_func_start(tcg_ctx); tcg_ctx->cpu = ENV_GET_CPU(env); - gen_intermediate_code(cpu, tb); + gen_intermediate_code(cpu, tb, max_insns); tcg_ctx->cpu = NULL; trace_translate_block(tb, tb->pc, tb->tc.ptr); @@ -1743,14 +1756,39 @@ TranslationBlock *tb_gen_code(CPUState *cpu, ti = profile_getclock(); #endif - /* ??? Overflow could be handled better here. In particular, we - don't need to re-do gen_intermediate_code, nor should we re-do - the tcg optimization currently hidden inside tcg_gen_code. All - that should be required is to flush the TBs, allocate a new TB, - re-initialize it per above, and re-do the actual code generation. */ gen_code_size = tcg_gen_code(tcg_ctx, tb); if (unlikely(gen_code_size < 0)) { - goto buffer_overflow; + switch (gen_code_size) { + case -1: + /* + * Overflow of code_gen_buffer, or the current slice of it. + * + * TODO: We don't need to re-do gen_intermediate_code, nor + * should we re-do the tcg optimization currently hidden + * inside tcg_gen_code. All that should be required is to + * flush the TBs, allocate a new TB, re-initialize it per + * above, and re-do the actual code generation. + */ + goto buffer_overflow; + + case -2: + /* + * The code generated for the TranslationBlock is too large. + * The maximum size allowed by the unwind info is 64k. + * There may be stricter constraints from relocations + * in the tcg backend. + * + * Try again with half as many insns as we attempted this time. + * If a single insn overflows, there's a bug somewhere... + */ + max_insns = tb->icount; + assert(max_insns > 1); + max_insns /= 2; + goto tb_overflow; + + default: + g_assert_not_reached(); + } } search_size = encode_search(tb, (void *)gen_code_buf + gen_code_size); if (unlikely(search_size < 0)) { @@ -2214,8 +2252,7 @@ void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr) tb_jmp_cache_clear_page(cpu, addr); } -static void print_qht_statistics(FILE *f, fprintf_function cpu_fprintf, - struct qht_stats hst) +static void print_qht_statistics(struct qht_stats hst) { uint32_t hgram_opts; size_t hgram_bins; @@ -2224,7 +2261,7 @@ static void print_qht_statistics(FILE *f, fprintf_function cpu_fprintf, if (!hst.head_buckets) { return; } - cpu_fprintf(f, "TB hash buckets %zu/%zu (%0.2f%% head buckets used)\n", + qemu_printf("TB hash buckets %zu/%zu (%0.2f%% head buckets used)\n", hst.used_head_buckets, hst.head_buckets, (double)hst.used_head_buckets / hst.head_buckets * 100); @@ -2234,7 +2271,7 @@ static void print_qht_statistics(FILE *f, fprintf_function cpu_fprintf, hgram_opts |= QDIST_PR_NODECIMAL; } hgram = qdist_pr(&hst.occupancy, 10, hgram_opts); - cpu_fprintf(f, "TB hash occupancy %0.2f%% avg chain occ. Histogram: %s\n", + qemu_printf("TB hash occupancy %0.2f%% avg chain occ. Histogram: %s\n", qdist_avg(&hst.occupancy) * 100, hgram); g_free(hgram); @@ -2247,7 +2284,7 @@ static void print_qht_statistics(FILE *f, fprintf_function cpu_fprintf, hgram_opts |= QDIST_PR_NODECIMAL | QDIST_PR_NOBINRANGE; } hgram = qdist_pr(&hst.chain, hgram_bins, hgram_opts); - cpu_fprintf(f, "TB hash avg chain %0.3f buckets. Histogram: %s\n", + qemu_printf("TB hash avg chain %0.3f buckets. Histogram: %s\n", qdist_avg(&hst.chain), hgram); g_free(hgram); } @@ -2285,7 +2322,7 @@ static gboolean tb_tree_stats_iter(gpointer key, gpointer value, gpointer data) return false; } -void dump_exec_info(FILE *f, fprintf_function cpu_fprintf) +void dump_exec_info(void) { struct tb_tree_stats tst = {}; struct qht_stats hst; @@ -2294,48 +2331,49 @@ void dump_exec_info(FILE *f, fprintf_function cpu_fprintf) tcg_tb_foreach(tb_tree_stats_iter, &tst); nb_tbs = tst.nb_tbs; /* XXX: avoid using doubles ? */ - cpu_fprintf(f, "Translation buffer state:\n"); + qemu_printf("Translation buffer state:\n"); /* * Report total code size including the padding and TB structs; * otherwise users might think "-tb-size" is not honoured. * For avg host size we use the precise numbers from tb_tree_stats though. */ - cpu_fprintf(f, "gen code size %zu/%zu\n", + qemu_printf("gen code size %zu/%zu\n", tcg_code_size(), tcg_code_capacity()); - cpu_fprintf(f, "TB count %zu\n", nb_tbs); - cpu_fprintf(f, "TB avg target size %zu max=%zu bytes\n", + qemu_printf("TB count %zu\n", nb_tbs); + qemu_printf("TB avg target size %zu max=%zu bytes\n", nb_tbs ? tst.target_size / nb_tbs : 0, tst.max_target_size); - cpu_fprintf(f, "TB avg host size %zu bytes (expansion ratio: %0.1f)\n", + qemu_printf("TB avg host size %zu bytes (expansion ratio: %0.1f)\n", nb_tbs ? tst.host_size / nb_tbs : 0, tst.target_size ? (double)tst.host_size / tst.target_size : 0); - cpu_fprintf(f, "cross page TB count %zu (%zu%%)\n", tst.cross_page, - nb_tbs ? (tst.cross_page * 100) / nb_tbs : 0); - cpu_fprintf(f, "direct jump count %zu (%zu%%) (2 jumps=%zu %zu%%)\n", + qemu_printf("cross page TB count %zu (%zu%%)\n", tst.cross_page, + nb_tbs ? (tst.cross_page * 100) / nb_tbs : 0); + qemu_printf("direct jump count %zu (%zu%%) (2 jumps=%zu %zu%%)\n", tst.direct_jmp_count, nb_tbs ? (tst.direct_jmp_count * 100) / nb_tbs : 0, tst.direct_jmp2_count, nb_tbs ? (tst.direct_jmp2_count * 100) / nb_tbs : 0); qht_statistics_init(&tb_ctx.htable, &hst); - print_qht_statistics(f, cpu_fprintf, hst); + print_qht_statistics(hst); qht_statistics_destroy(&hst); - cpu_fprintf(f, "\nStatistics:\n"); - cpu_fprintf(f, "TB flush count %u\n", + qemu_printf("\nStatistics:\n"); + qemu_printf("TB flush count %u\n", atomic_read(&tb_ctx.tb_flush_count)); - cpu_fprintf(f, "TB invalidate count %zu\n", tcg_tb_phys_invalidate_count()); + qemu_printf("TB invalidate count %zu\n", + tcg_tb_phys_invalidate_count()); tlb_flush_counts(&flush_full, &flush_part, &flush_elide); - cpu_fprintf(f, "TLB full flushes %zu\n", flush_full); - cpu_fprintf(f, "TLB partial flushes %zu\n", flush_part); - cpu_fprintf(f, "TLB elided flushes %zu\n", flush_elide); - tcg_dump_info(f, cpu_fprintf); + qemu_printf("TLB full flushes %zu\n", flush_full); + qemu_printf("TLB partial flushes %zu\n", flush_part); + qemu_printf("TLB elided flushes %zu\n", flush_elide); + tcg_dump_info(); } -void dump_opcount_info(FILE *f, fprintf_function cpu_fprintf) +void dump_opcount_info(void) { - tcg_dump_op_count(f, cpu_fprintf); + tcg_dump_op_count(); } #else /* CONFIG_USER_ONLY */ diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index afd0a49ea6..8d65ead708 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -32,7 +32,7 @@ void translator_loop_temp_check(DisasContextBase *db) } void translator_loop(const TranslatorOps *ops, DisasContextBase *db, - CPUState *cpu, TranslationBlock *tb) + CPUState *cpu, TranslationBlock *tb, int max_insns) { int bp_insn = 0; @@ -42,20 +42,9 @@ void translator_loop(const TranslatorOps *ops, DisasContextBase *db, db->pc_next = db->pc_first; db->is_jmp = DISAS_NEXT; db->num_insns = 0; + db->max_insns = max_insns; db->singlestep_enabled = cpu->singlestep_enabled; - /* Instruction counting */ - db->max_insns = tb_cflags(db->tb) & CF_COUNT_MASK; - if (db->max_insns == 0) { - db->max_insns = CF_COUNT_MASK; - } - if (db->max_insns > TCG_MAX_INSNS) { - db->max_insns = TCG_MAX_INSNS; - } - if (db->singlestep_enabled || singlestep) { - db->max_insns = 1; - } - ops->init_disas_context(db, cpu); tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ diff --git a/audio/Makefile.objs b/audio/Makefile.objs index db4fa7f18f..dca87f6347 100644 --- a/audio/Makefile.objs +++ b/audio/Makefile.objs @@ -1,4 +1,4 @@ -common-obj-y = audio.o noaudio.o wavaudio.o mixeng.o +common-obj-y = audio.o audio_legacy.o noaudio.o wavaudio.o mixeng.o common-obj-$(CONFIG_SPICE) += spiceaudio.o common-obj-$(CONFIG_AUDIO_COREAUDIO) += coreaudio.o common-obj-$(CONFIG_AUDIO_DSOUND) += dsoundaudio.o diff --git a/audio/alsaaudio.c b/audio/alsaaudio.c index 635be73bf4..49e6884309 100644 --- a/audio/alsaaudio.c +++ b/audio/alsaaudio.c @@ -33,28 +33,9 @@ #define AUDIO_CAP "alsa" #include "audio_int.h" -typedef struct ALSAConf { - int size_in_usec_in; - int size_in_usec_out; - const char *pcm_name_in; - const char *pcm_name_out; - unsigned int buffer_size_in; - unsigned int period_size_in; - unsigned int buffer_size_out; - unsigned int period_size_out; - unsigned int threshold; - - int buffer_size_in_overridden; - int period_size_in_overridden; - - int buffer_size_out_overridden; - int period_size_out_overridden; -} ALSAConf; - struct pollhlp { snd_pcm_t *handle; struct pollfd *pfds; - ALSAConf *conf; int count; int mask; }; @@ -66,6 +47,7 @@ typedef struct ALSAVoiceOut { void *pcm_buf; snd_pcm_t *handle; struct pollhlp pollhlp; + Audiodev *dev; } ALSAVoiceOut; typedef struct ALSAVoiceIn { @@ -73,21 +55,18 @@ typedef struct ALSAVoiceIn { snd_pcm_t *handle; void *pcm_buf; struct pollhlp pollhlp; + Audiodev *dev; } ALSAVoiceIn; struct alsa_params_req { int freq; snd_pcm_format_t fmt; int nchannels; - int size_in_usec; - int override_mask; - unsigned int buffer_size; - unsigned int period_size; }; struct alsa_params_obt { int freq; - audfmt_e fmt; + AudioFormat fmt; int endianness; int nchannels; snd_pcm_uframes_t samples; @@ -294,16 +273,16 @@ static int alsa_write (SWVoiceOut *sw, void *buf, int len) return audio_pcm_sw_write (sw, buf, len); } -static snd_pcm_format_t aud_to_alsafmt (audfmt_e fmt, int endianness) +static snd_pcm_format_t aud_to_alsafmt (AudioFormat fmt, int endianness) { switch (fmt) { - case AUD_FMT_S8: + case AUDIO_FORMAT_S8: return SND_PCM_FORMAT_S8; - case AUD_FMT_U8: + case AUDIO_FORMAT_U8: return SND_PCM_FORMAT_U8; - case AUD_FMT_S16: + case AUDIO_FORMAT_S16: if (endianness) { return SND_PCM_FORMAT_S16_BE; } @@ -311,7 +290,7 @@ static snd_pcm_format_t aud_to_alsafmt (audfmt_e fmt, int endianness) return SND_PCM_FORMAT_S16_LE; } - case AUD_FMT_U16: + case AUDIO_FORMAT_U16: if (endianness) { return SND_PCM_FORMAT_U16_BE; } @@ -319,7 +298,7 @@ static snd_pcm_format_t aud_to_alsafmt (audfmt_e fmt, int endianness) return SND_PCM_FORMAT_U16_LE; } - case AUD_FMT_S32: + case AUDIO_FORMAT_S32: if (endianness) { return SND_PCM_FORMAT_S32_BE; } @@ -327,7 +306,7 @@ static snd_pcm_format_t aud_to_alsafmt (audfmt_e fmt, int endianness) return SND_PCM_FORMAT_S32_LE; } - case AUD_FMT_U32: + case AUDIO_FORMAT_U32: if (endianness) { return SND_PCM_FORMAT_U32_BE; } @@ -344,58 +323,58 @@ static snd_pcm_format_t aud_to_alsafmt (audfmt_e fmt, int endianness) } } -static int alsa_to_audfmt (snd_pcm_format_t alsafmt, audfmt_e *fmt, +static int alsa_to_audfmt (snd_pcm_format_t alsafmt, AudioFormat *fmt, int *endianness) { switch (alsafmt) { case SND_PCM_FORMAT_S8: *endianness = 0; - *fmt = AUD_FMT_S8; + *fmt = AUDIO_FORMAT_S8; break; case SND_PCM_FORMAT_U8: *endianness = 0; - *fmt = AUD_FMT_U8; + *fmt = AUDIO_FORMAT_U8; break; case SND_PCM_FORMAT_S16_LE: *endianness = 0; - *fmt = AUD_FMT_S16; + *fmt = AUDIO_FORMAT_S16; break; case SND_PCM_FORMAT_U16_LE: *endianness = 0; - *fmt = AUD_FMT_U16; + *fmt = AUDIO_FORMAT_U16; break; case SND_PCM_FORMAT_S16_BE: *endianness = 1; - *fmt = AUD_FMT_S16; + *fmt = AUDIO_FORMAT_S16; break; case SND_PCM_FORMAT_U16_BE: *endianness = 1; - *fmt = AUD_FMT_U16; + *fmt = AUDIO_FORMAT_U16; break; case SND_PCM_FORMAT_S32_LE: *endianness = 0; - *fmt = AUD_FMT_S32; + *fmt = AUDIO_FORMAT_S32; break; case SND_PCM_FORMAT_U32_LE: *endianness = 0; - *fmt = AUD_FMT_U32; + *fmt = AUDIO_FORMAT_U32; break; case SND_PCM_FORMAT_S32_BE: *endianness = 1; - *fmt = AUD_FMT_S32; + *fmt = AUDIO_FORMAT_S32; break; case SND_PCM_FORMAT_U32_BE: *endianness = 1; - *fmt = AUD_FMT_U32; + *fmt = AUDIO_FORMAT_U32; break; default: @@ -408,17 +387,18 @@ static int alsa_to_audfmt (snd_pcm_format_t alsafmt, audfmt_e *fmt, static void alsa_dump_info (struct alsa_params_req *req, struct alsa_params_obt *obt, - snd_pcm_format_t obtfmt) + snd_pcm_format_t obtfmt, + AudiodevAlsaPerDirectionOptions *apdo) { - dolog ("parameter | requested value | obtained value\n"); - dolog ("format | %10d | %10d\n", req->fmt, obtfmt); - dolog ("channels | %10d | %10d\n", - req->nchannels, obt->nchannels); - dolog ("frequency | %10d | %10d\n", req->freq, obt->freq); - dolog ("============================================\n"); - dolog ("requested: buffer size %d period size %d\n", - req->buffer_size, req->period_size); - dolog ("obtained: samples %ld\n", obt->samples); + dolog("parameter | requested value | obtained value\n"); + dolog("format | %10d | %10d\n", req->fmt, obtfmt); + dolog("channels | %10d | %10d\n", + req->nchannels, obt->nchannels); + dolog("frequency | %10d | %10d\n", req->freq, obt->freq); + dolog("============================================\n"); + dolog("requested: buffer len %" PRId32 " period len %" PRId32 "\n", + apdo->buffer_length, apdo->period_length); + dolog("obtained: samples %ld\n", obt->samples); } static void alsa_set_threshold (snd_pcm_t *handle, snd_pcm_uframes_t threshold) @@ -451,23 +431,23 @@ static void alsa_set_threshold (snd_pcm_t *handle, snd_pcm_uframes_t threshold) } } -static int alsa_open (int in, struct alsa_params_req *req, - struct alsa_params_obt *obt, snd_pcm_t **handlep, - ALSAConf *conf) +static int alsa_open(bool in, struct alsa_params_req *req, + struct alsa_params_obt *obt, snd_pcm_t **handlep, + Audiodev *dev) { + AudiodevAlsaOptions *aopts = &dev->u.alsa; + AudiodevAlsaPerDirectionOptions *apdo = in ? aopts->in : aopts->out; snd_pcm_t *handle; snd_pcm_hw_params_t *hw_params; int err; - int size_in_usec; unsigned int freq, nchannels; - const char *pcm_name = in ? conf->pcm_name_in : conf->pcm_name_out; + const char *pcm_name = apdo->has_dev ? apdo->dev : "default"; snd_pcm_uframes_t obt_buffer_size; const char *typ = in ? "ADC" : "DAC"; snd_pcm_format_t obtfmt; freq = req->freq; nchannels = req->nchannels; - size_in_usec = req->size_in_usec; snd_pcm_hw_params_alloca (&hw_params); @@ -527,79 +507,42 @@ static int alsa_open (int in, struct alsa_params_req *req, goto err; } - if (req->buffer_size) { - unsigned long obt; + if (apdo->buffer_length) { + int dir = 0; + unsigned int btime = apdo->buffer_length; - if (size_in_usec) { - int dir = 0; - unsigned int btime = req->buffer_size; + err = snd_pcm_hw_params_set_buffer_time_near( + handle, hw_params, &btime, &dir); - err = snd_pcm_hw_params_set_buffer_time_near ( - handle, - hw_params, - &btime, - &dir - ); - obt = btime; - } - else { - snd_pcm_uframes_t bsize = req->buffer_size; - - err = snd_pcm_hw_params_set_buffer_size_near ( - handle, - hw_params, - &bsize - ); - obt = bsize; - } if (err < 0) { - alsa_logerr2 (err, typ, "Failed to set buffer %s to %d\n", - size_in_usec ? "time" : "size", req->buffer_size); + alsa_logerr2(err, typ, "Failed to set buffer time to %" PRId32 "\n", + apdo->buffer_length); goto err; } - if ((req->override_mask & 2) && (obt - req->buffer_size)) - dolog ("Requested buffer %s %u was rejected, using %lu\n", - size_in_usec ? "time" : "size", req->buffer_size, obt); + if (apdo->has_buffer_length && btime != apdo->buffer_length) { + dolog("Requested buffer time %" PRId32 + " was rejected, using %u\n", apdo->buffer_length, btime); + } } - if (req->period_size) { - unsigned long obt; + if (apdo->period_length) { + int dir = 0; + unsigned int ptime = apdo->period_length; - if (size_in_usec) { - int dir = 0; - unsigned int ptime = req->period_size; - - err = snd_pcm_hw_params_set_period_time_near ( - handle, - hw_params, - &ptime, - &dir - ); - obt = ptime; - } - else { - int dir = 0; - snd_pcm_uframes_t psize = req->period_size; - - err = snd_pcm_hw_params_set_period_size_near ( - handle, - hw_params, - &psize, - &dir - ); - obt = psize; - } + err = snd_pcm_hw_params_set_period_time_near(handle, hw_params, &ptime, + &dir); if (err < 0) { - alsa_logerr2 (err, typ, "Failed to set period %s to %d\n", - size_in_usec ? "time" : "size", req->period_size); + alsa_logerr2(err, typ, "Failed to set period time to %" PRId32 "\n", + apdo->period_length); goto err; } - if (((req->override_mask & 1) && (obt - req->period_size))) - dolog ("Requested period %s %u was rejected, using %lu\n", - size_in_usec ? "time" : "size", req->period_size, obt); + if (apdo->has_period_length && ptime != apdo->period_length) { + dolog("Requested period time %" PRId32 " was rejected, using %d\n", + apdo->period_length, ptime); + } } err = snd_pcm_hw_params (handle, hw_params); @@ -631,30 +574,12 @@ static int alsa_open (int in, struct alsa_params_req *req, goto err; } - if (!in && conf->threshold) { - snd_pcm_uframes_t threshold; - int bytes_per_sec; - - bytes_per_sec = freq << (nchannels == 2); - - switch (obt->fmt) { - case AUD_FMT_S8: - case AUD_FMT_U8: - break; - - case AUD_FMT_S16: - case AUD_FMT_U16: - bytes_per_sec <<= 1; - break; - - case AUD_FMT_S32: - case AUD_FMT_U32: - bytes_per_sec <<= 2; - break; - } - - threshold = (conf->threshold * bytes_per_sec) / 1000; - alsa_set_threshold (handle, threshold); + if (!in && aopts->has_threshold && aopts->threshold) { + struct audsettings as = { .freq = freq }; + alsa_set_threshold( + handle, + audio_buffer_frames(qapi_AudiodevAlsaPerDirectionOptions_base(apdo), + &as, aopts->threshold)); } obt->nchannels = nchannels; @@ -667,11 +592,11 @@ static int alsa_open (int in, struct alsa_params_req *req, obt->nchannels != req->nchannels || obt->freq != req->freq) { dolog ("Audio parameters for %s\n", typ); - alsa_dump_info (req, obt, obtfmt); + alsa_dump_info(req, obt, obtfmt, apdo); } #ifdef DEBUG - alsa_dump_info (req, obt, obtfmt); + alsa_dump_info(req, obt, obtfmt, pdo); #endif return 0; @@ -797,19 +722,13 @@ static int alsa_init_out(HWVoiceOut *hw, struct audsettings *as, struct alsa_params_obt obt; snd_pcm_t *handle; struct audsettings obt_as; - ALSAConf *conf = drv_opaque; + Audiodev *dev = drv_opaque; req.fmt = aud_to_alsafmt (as->fmt, as->endianness); req.freq = as->freq; req.nchannels = as->nchannels; - req.period_size = conf->period_size_out; - req.buffer_size = conf->buffer_size_out; - req.size_in_usec = conf->size_in_usec_out; - req.override_mask = - (conf->period_size_out_overridden ? 1 : 0) | - (conf->buffer_size_out_overridden ? 2 : 0); - - if (alsa_open (0, &req, &obt, &handle, conf)) { + + if (alsa_open(0, &req, &obt, &handle, dev)) { return -1; } @@ -830,7 +749,7 @@ static int alsa_init_out(HWVoiceOut *hw, struct audsettings *as, } alsa->handle = handle; - alsa->pollhlp.conf = conf; + alsa->dev = dev; return 0; } @@ -870,16 +789,12 @@ static int alsa_voice_ctl (snd_pcm_t *handle, const char *typ, int ctl) static int alsa_ctl_out (HWVoiceOut *hw, int cmd, ...) { ALSAVoiceOut *alsa = (ALSAVoiceOut *) hw; + AudiodevAlsaPerDirectionOptions *apdo = alsa->dev->u.alsa.out; switch (cmd) { case VOICE_ENABLE: { - va_list ap; - int poll_mode; - - va_start (ap, cmd); - poll_mode = va_arg (ap, int); - va_end (ap); + bool poll_mode = apdo->try_poll; ldebug ("enabling voice\n"); if (poll_mode && alsa_poll_out (hw)) { @@ -908,19 +823,13 @@ static int alsa_init_in(HWVoiceIn *hw, struct audsettings *as, void *drv_opaque) struct alsa_params_obt obt; snd_pcm_t *handle; struct audsettings obt_as; - ALSAConf *conf = drv_opaque; + Audiodev *dev = drv_opaque; req.fmt = aud_to_alsafmt (as->fmt, as->endianness); req.freq = as->freq; req.nchannels = as->nchannels; - req.period_size = conf->period_size_in; - req.buffer_size = conf->buffer_size_in; - req.size_in_usec = conf->size_in_usec_in; - req.override_mask = - (conf->period_size_in_overridden ? 1 : 0) | - (conf->buffer_size_in_overridden ? 2 : 0); - - if (alsa_open (1, &req, &obt, &handle, conf)) { + + if (alsa_open(1, &req, &obt, &handle, dev)) { return -1; } @@ -941,7 +850,7 @@ static int alsa_init_in(HWVoiceIn *hw, struct audsettings *as, void *drv_opaque) } alsa->handle = handle; - alsa->pollhlp.conf = conf; + alsa->dev = dev; return 0; } @@ -1083,16 +992,12 @@ static int alsa_read (SWVoiceIn *sw, void *buf, int size) static int alsa_ctl_in (HWVoiceIn *hw, int cmd, ...) { ALSAVoiceIn *alsa = (ALSAVoiceIn *) hw; + AudiodevAlsaPerDirectionOptions *apdo = alsa->dev->u.alsa.in; switch (cmd) { case VOICE_ENABLE: { - va_list ap; - int poll_mode; - - va_start (ap, cmd); - poll_mode = va_arg (ap, int); - va_end (ap); + bool poll_mode = apdo->try_poll; ldebug ("enabling voice\n"); if (poll_mode && alsa_poll_in (hw)) { @@ -1115,88 +1020,54 @@ static int alsa_ctl_in (HWVoiceIn *hw, int cmd, ...) return -1; } -static ALSAConf glob_conf = { - .buffer_size_out = 4096, - .period_size_out = 1024, - .pcm_name_out = "default", - .pcm_name_in = "default", -}; +static void alsa_init_per_direction(AudiodevAlsaPerDirectionOptions *apdo) +{ + if (!apdo->has_try_poll) { + apdo->try_poll = true; + apdo->has_try_poll = true; + } +} -static void *alsa_audio_init (void) +static void *alsa_audio_init(Audiodev *dev) { - ALSAConf *conf = g_malloc(sizeof(ALSAConf)); - *conf = glob_conf; - return conf; + AudiodevAlsaOptions *aopts; + assert(dev->driver == AUDIODEV_DRIVER_ALSA); + + aopts = &dev->u.alsa; + alsa_init_per_direction(aopts->in); + alsa_init_per_direction(aopts->out); + + /* + * need to define them, as otherwise alsa produces no sound + * doesn't set has_* so alsa_open can identify it wasn't set by the user + */ + if (!dev->u.alsa.out->has_period_length) { + /* 1024 frames assuming 44100Hz */ + dev->u.alsa.out->period_length = 1024 * 1000000 / 44100; + } + if (!dev->u.alsa.out->has_buffer_length) { + /* 4096 frames assuming 44100Hz */ + dev->u.alsa.out->buffer_length = 4096ll * 1000000 / 44100; + } + + /* + * OptsVisitor sets unspecified optional fields to zero, but do not depend + * on it... + */ + if (!dev->u.alsa.in->has_period_length) { + dev->u.alsa.in->period_length = 0; + } + if (!dev->u.alsa.in->has_buffer_length) { + dev->u.alsa.in->buffer_length = 0; + } + + return dev; } static void alsa_audio_fini (void *opaque) { - g_free(opaque); } -static struct audio_option alsa_options[] = { - { - .name = "DAC_SIZE_IN_USEC", - .tag = AUD_OPT_BOOL, - .valp = &glob_conf.size_in_usec_out, - .descr = "DAC period/buffer size in microseconds (otherwise in frames)" - }, - { - .name = "DAC_PERIOD_SIZE", - .tag = AUD_OPT_INT, - .valp = &glob_conf.period_size_out, - .descr = "DAC period size (0 to go with system default)", - .overriddenp = &glob_conf.period_size_out_overridden - }, - { - .name = "DAC_BUFFER_SIZE", - .tag = AUD_OPT_INT, - .valp = &glob_conf.buffer_size_out, - .descr = "DAC buffer size (0 to go with system default)", - .overriddenp = &glob_conf.buffer_size_out_overridden - }, - { - .name = "ADC_SIZE_IN_USEC", - .tag = AUD_OPT_BOOL, - .valp = &glob_conf.size_in_usec_in, - .descr = - "ADC period/buffer size in microseconds (otherwise in frames)" - }, - { - .name = "ADC_PERIOD_SIZE", - .tag = AUD_OPT_INT, - .valp = &glob_conf.period_size_in, - .descr = "ADC period size (0 to go with system default)", - .overriddenp = &glob_conf.period_size_in_overridden - }, - { - .name = "ADC_BUFFER_SIZE", - .tag = AUD_OPT_INT, - .valp = &glob_conf.buffer_size_in, - .descr = "ADC buffer size (0 to go with system default)", - .overriddenp = &glob_conf.buffer_size_in_overridden - }, - { - .name = "THRESHOLD", - .tag = AUD_OPT_INT, - .valp = &glob_conf.threshold, - .descr = "(undocumented)" - }, - { - .name = "DAC_DEV", - .tag = AUD_OPT_STR, - .valp = &glob_conf.pcm_name_out, - .descr = "DAC device name (for instance dmix)" - }, - { - .name = "ADC_DEV", - .tag = AUD_OPT_STR, - .valp = &glob_conf.pcm_name_in, - .descr = "ADC device name" - }, - { /* End of list */ } -}; - static struct audio_pcm_ops alsa_pcm_ops = { .init_out = alsa_init_out, .fini_out = alsa_fini_out, @@ -1214,7 +1085,6 @@ static struct audio_pcm_ops alsa_pcm_ops = { static struct audio_driver alsa_audio_driver = { .name = "alsa", .descr = "ALSA http://www.alsa-project.org", - .options = alsa_options, .init = alsa_audio_init, .fini = alsa_audio_fini, .pcm_ops = &alsa_pcm_ops, diff --git a/audio/audio.c b/audio/audio.c index 909c817103..2040762fef 100644 --- a/audio/audio.c +++ b/audio/audio.c @@ -26,6 +26,9 @@ #include "audio.h" #include "monitor/monitor.h" #include "qemu/timer.h" +#include "qapi/error.h" +#include "qapi/qobject-input-visitor.h" +#include "qapi/qapi-visit-audio.h" #include "sysemu/sysemu.h" #include "qemu/cutils.h" #include "sysemu/replay.h" @@ -46,14 +49,16 @@ The 1st one is the one used by default, that is the reason that we generate the list. */ -static const char *audio_prio_list[] = { +const char *audio_prio_list[] = { "spice", CONFIG_AUDIO_DRIVERS "none", "wav", + NULL }; static QLIST_HEAD(, audio_driver) audio_drivers; +static AudiodevListHead audiodevs = QSIMPLEQ_HEAD_INITIALIZER(audiodevs); void audio_driver_register(audio_driver *drv) { @@ -80,61 +85,6 @@ audio_driver *audio_driver_lookup(const char *name) return NULL; } -static void audio_module_load_all(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(audio_prio_list); i++) { - audio_driver_lookup(audio_prio_list[i]); - } -} - -struct fixed_settings { - int enabled; - int nb_voices; - int greedy; - struct audsettings settings; -}; - -static struct { - struct fixed_settings fixed_out; - struct fixed_settings fixed_in; - union { - int hertz; - int64_t ticks; - } period; - int try_poll_in; - int try_poll_out; -} conf = { - .fixed_out = { /* DAC fixed settings */ - .enabled = 1, - .nb_voices = 1, - .greedy = 1, - .settings = { - .freq = 44100, - .nchannels = 2, - .fmt = AUD_FMT_S16, - .endianness = AUDIO_HOST_ENDIANNESS, - } - }, - - .fixed_in = { /* ADC fixed settings */ - .enabled = 1, - .nb_voices = 1, - .greedy = 1, - .settings = { - .freq = 44100, - .nchannels = 2, - .fmt = AUD_FMT_S16, - .endianness = AUDIO_HOST_ENDIANNESS, - } - }, - - .period = { .hertz = 100 }, - .try_poll_in = 1, - .try_poll_out = 1, -}; - static AudioState glob_audio_state; const struct mixeng_volume nominal_volume = { @@ -151,9 +101,6 @@ const struct mixeng_volume nominal_volume = { #ifdef AUDIO_IS_FLAWLESS_AND_NO_CHECKS_ARE_REQURIED #error No its not #else -static void audio_print_options (const char *prefix, - struct audio_option *opt); - int audio_bug (const char *funcname, int cond) { if (cond) { @@ -161,16 +108,9 @@ int audio_bug (const char *funcname, int cond) AUD_log (NULL, "A bug was just triggered in %s\n", funcname); if (!shown) { - struct audio_driver *d; - shown = 1; AUD_log (NULL, "Save all your work and restart without audio\n"); - AUD_log (NULL, "Please send bug report to av1474@comtv.ru\n"); AUD_log (NULL, "I am sorry\n"); - d = glob_audio_state.drv; - if (d) { - audio_print_options (d->name, d->options); - } } AUD_log (NULL, "Context:\n"); @@ -232,135 +172,6 @@ void *audio_calloc (const char *funcname, int nmemb, size_t size) return g_malloc0 (len); } -static char *audio_alloc_prefix (const char *s) -{ - const char qemu_prefix[] = "QEMU_"; - size_t len, i; - char *r, *u; - - if (!s) { - return NULL; - } - - len = strlen (s); - r = g_malloc (len + sizeof (qemu_prefix)); - - u = r + sizeof (qemu_prefix) - 1; - - pstrcpy (r, len + sizeof (qemu_prefix), qemu_prefix); - pstrcat (r, len + sizeof (qemu_prefix), s); - - for (i = 0; i < len; ++i) { - u[i] = qemu_toupper(u[i]); - } - - return r; -} - -static const char *audio_audfmt_to_string (audfmt_e fmt) -{ - switch (fmt) { - case AUD_FMT_U8: - return "U8"; - - case AUD_FMT_U16: - return "U16"; - - case AUD_FMT_S8: - return "S8"; - - case AUD_FMT_S16: - return "S16"; - - case AUD_FMT_U32: - return "U32"; - - case AUD_FMT_S32: - return "S32"; - } - - dolog ("Bogus audfmt %d returning S16\n", fmt); - return "S16"; -} - -static audfmt_e audio_string_to_audfmt (const char *s, audfmt_e defval, - int *defaultp) -{ - if (!strcasecmp (s, "u8")) { - *defaultp = 0; - return AUD_FMT_U8; - } - else if (!strcasecmp (s, "u16")) { - *defaultp = 0; - return AUD_FMT_U16; - } - else if (!strcasecmp (s, "u32")) { - *defaultp = 0; - return AUD_FMT_U32; - } - else if (!strcasecmp (s, "s8")) { - *defaultp = 0; - return AUD_FMT_S8; - } - else if (!strcasecmp (s, "s16")) { - *defaultp = 0; - return AUD_FMT_S16; - } - else if (!strcasecmp (s, "s32")) { - *defaultp = 0; - return AUD_FMT_S32; - } - else { - dolog ("Bogus audio format `%s' using %s\n", - s, audio_audfmt_to_string (defval)); - *defaultp = 1; - return defval; - } -} - -static audfmt_e audio_get_conf_fmt (const char *envname, - audfmt_e defval, - int *defaultp) -{ - const char *var = getenv (envname); - if (!var) { - *defaultp = 1; - return defval; - } - return audio_string_to_audfmt (var, defval, defaultp); -} - -static int audio_get_conf_int (const char *key, int defval, int *defaultp) -{ - int val; - char *strval; - - strval = getenv (key); - if (strval && !qemu_strtoi(strval, NULL, 10, &val)) { - *defaultp = 0; - return val; - } - else { - *defaultp = 1; - return defval; - } -} - -static const char *audio_get_conf_str (const char *key, - const char *defval, - int *defaultp) -{ - const char *val = getenv (key); - if (!val) { - *defaultp = 1; - return defval; - } - else { - *defaultp = 0; - return val; - } -} - void AUD_vlog (const char *cap, const char *fmt, va_list ap) { if (cap) { @@ -379,167 +190,27 @@ void AUD_log (const char *cap, const char *fmt, ...) va_end (ap); } -static void audio_print_options (const char *prefix, - struct audio_option *opt) -{ - char *uprefix; - - if (!prefix) { - dolog ("No prefix specified\n"); - return; - } - - if (!opt) { - dolog ("No options\n"); - return; - } - - uprefix = audio_alloc_prefix (prefix); - - for (; opt->name; opt++) { - const char *state = "default"; - printf (" %s_%s: ", uprefix, opt->name); - - if (opt->overriddenp && *opt->overriddenp) { - state = "current"; - } - - switch (opt->tag) { - case AUD_OPT_BOOL: - { - int *intp = opt->valp; - printf ("boolean, %s = %d\n", state, *intp ? 1 : 0); - } - break; - - case AUD_OPT_INT: - { - int *intp = opt->valp; - printf ("integer, %s = %d\n", state, *intp); - } - break; - - case AUD_OPT_FMT: - { - audfmt_e *fmtp = opt->valp; - printf ( - "format, %s = %s, (one of: U8 S8 U16 S16 U32 S32)\n", - state, - audio_audfmt_to_string (*fmtp) - ); - } - break; - - case AUD_OPT_STR: - { - const char **strp = opt->valp; - printf ("string, %s = %s\n", - state, - *strp ? *strp : "(not set)"); - } - break; - - default: - printf ("???\n"); - dolog ("Bad value tag for option %s_%s %d\n", - uprefix, opt->name, opt->tag); - break; - } - printf (" %s\n", opt->descr); - } - - g_free (uprefix); -} - -static void audio_process_options (const char *prefix, - struct audio_option *opt) -{ - gchar *prefix_upper; - - if (audio_bug(__func__, !prefix)) { - dolog ("prefix = NULL\n"); - return; - } - - if (audio_bug(__func__, !opt)) { - dolog ("opt = NULL\n"); - return; - } - - prefix_upper = g_utf8_strup(prefix, -1); - - for (; opt->name; opt++) { - char *optname; - int def; - - if (!opt->valp) { - dolog ("Option value pointer for `%s' is not set\n", - opt->name); - continue; - } - - optname = g_strdup_printf("QEMU_%s_%s", prefix_upper, opt->name); - - def = 1; - switch (opt->tag) { - case AUD_OPT_BOOL: - case AUD_OPT_INT: - { - int *intp = opt->valp; - *intp = audio_get_conf_int (optname, *intp, &def); - } - break; - - case AUD_OPT_FMT: - { - audfmt_e *fmtp = opt->valp; - *fmtp = audio_get_conf_fmt (optname, *fmtp, &def); - } - break; - - case AUD_OPT_STR: - { - const char **strp = opt->valp; - *strp = audio_get_conf_str (optname, *strp, &def); - } - break; - - default: - dolog ("Bad value tag for option `%s' - %d\n", - optname, opt->tag); - break; - } - - if (!opt->overriddenp) { - opt->overriddenp = &opt->overridden; - } - *opt->overriddenp = !def; - g_free (optname); - } - g_free(prefix_upper); -} - static void audio_print_settings (struct audsettings *as) { dolog ("frequency=%d nchannels=%d fmt=", as->freq, as->nchannels); switch (as->fmt) { - case AUD_FMT_S8: + case AUDIO_FORMAT_S8: AUD_log (NULL, "S8"); break; - case AUD_FMT_U8: + case AUDIO_FORMAT_U8: AUD_log (NULL, "U8"); break; - case AUD_FMT_S16: + case AUDIO_FORMAT_S16: AUD_log (NULL, "S16"); break; - case AUD_FMT_U16: + case AUDIO_FORMAT_U16: AUD_log (NULL, "U16"); break; - case AUD_FMT_S32: + case AUDIO_FORMAT_S32: AUD_log (NULL, "S32"); break; - case AUD_FMT_U32: + case AUDIO_FORMAT_U32: AUD_log (NULL, "U32"); break; default: @@ -570,12 +241,12 @@ static int audio_validate_settings (struct audsettings *as) invalid |= as->endianness != 0 && as->endianness != 1; switch (as->fmt) { - case AUD_FMT_S8: - case AUD_FMT_U8: - case AUD_FMT_S16: - case AUD_FMT_U16: - case AUD_FMT_S32: - case AUD_FMT_U32: + case AUDIO_FORMAT_S8: + case AUDIO_FORMAT_U8: + case AUDIO_FORMAT_S16: + case AUDIO_FORMAT_U16: + case AUDIO_FORMAT_S32: + case AUDIO_FORMAT_U32: break; default: invalid = 1; @@ -591,25 +262,28 @@ static int audio_pcm_info_eq (struct audio_pcm_info *info, struct audsettings *a int bits = 8, sign = 0; switch (as->fmt) { - case AUD_FMT_S8: + case AUDIO_FORMAT_S8: sign = 1; /* fall through */ - case AUD_FMT_U8: + case AUDIO_FORMAT_U8: break; - case AUD_FMT_S16: + case AUDIO_FORMAT_S16: sign = 1; /* fall through */ - case AUD_FMT_U16: + case AUDIO_FORMAT_U16: bits = 16; break; - case AUD_FMT_S32: + case AUDIO_FORMAT_S32: sign = 1; /* fall through */ - case AUD_FMT_U32: + case AUDIO_FORMAT_U32: bits = 32; break; + + default: + abort(); } return info->freq == as->freq && info->nchannels == as->nchannels @@ -623,24 +297,27 @@ void audio_pcm_init_info (struct audio_pcm_info *info, struct audsettings *as) int bits = 8, sign = 0, shift = 0; switch (as->fmt) { - case AUD_FMT_S8: + case AUDIO_FORMAT_S8: sign = 1; - case AUD_FMT_U8: + case AUDIO_FORMAT_U8: break; - case AUD_FMT_S16: + case AUDIO_FORMAT_S16: sign = 1; - case AUD_FMT_U16: + case AUDIO_FORMAT_U16: bits = 16; shift = 1; break; - case AUD_FMT_S32: + case AUDIO_FORMAT_S32: sign = 1; - case AUD_FMT_U32: + case AUDIO_FORMAT_U32: bits = 32; shift = 2; break; + + default: + abort(); } info->freq = as->freq; @@ -1132,11 +809,11 @@ static void audio_reset_timer (AudioState *s) { if (audio_is_timer_needed ()) { timer_mod_anticipate_ns(s->ts, - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + conf.period.ticks); + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->period_ticks); if (!audio_timer_running) { audio_timer_running = true; audio_timer_last = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); - trace_audio_timer_start(conf.period.ticks / SCALE_MS); + trace_audio_timer_start(s->period_ticks / SCALE_MS); } } else { timer_del(s->ts); @@ -1150,16 +827,17 @@ static void audio_reset_timer (AudioState *s) static void audio_timer (void *opaque) { int64_t now, diff; + AudioState *s = opaque; now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); diff = now - audio_timer_last; - if (diff > conf.period.ticks * 3 / 2) { + if (diff > s->period_ticks * 3 / 2) { trace_audio_timer_delayed(diff / SCALE_MS); } audio_timer_last = now; - audio_run ("timer"); - audio_reset_timer (opaque); + audio_run("timer"); + audio_reset_timer(s); } /* @@ -1219,7 +897,7 @@ void AUD_set_active_out (SWVoiceOut *sw, int on) if (!hw->enabled) { hw->enabled = 1; if (s->vm_running) { - hw->pcm_ops->ctl_out (hw, VOICE_ENABLE, conf.try_poll_out); + hw->pcm_ops->ctl_out(hw, VOICE_ENABLE); audio_reset_timer (s); } } @@ -1264,7 +942,7 @@ void AUD_set_active_in (SWVoiceIn *sw, int on) if (!hw->enabled) { hw->enabled = 1; if (s->vm_running) { - hw->pcm_ops->ctl_in (hw, VOICE_ENABLE, conf.try_poll_in); + hw->pcm_ops->ctl_in(hw, VOICE_ENABLE); audio_reset_timer (s); } } @@ -1585,169 +1263,10 @@ void audio_run (const char *msg) #endif } -static struct audio_option audio_options[] = { - /* DAC */ - { - .name = "DAC_FIXED_SETTINGS", - .tag = AUD_OPT_BOOL, - .valp = &conf.fixed_out.enabled, - .descr = "Use fixed settings for host DAC" - }, - { - .name = "DAC_FIXED_FREQ", - .tag = AUD_OPT_INT, - .valp = &conf.fixed_out.settings.freq, - .descr = "Frequency for fixed host DAC" - }, - { - .name = "DAC_FIXED_FMT", - .tag = AUD_OPT_FMT, - .valp = &conf.fixed_out.settings.fmt, - .descr = "Format for fixed host DAC" - }, - { - .name = "DAC_FIXED_CHANNELS", - .tag = AUD_OPT_INT, - .valp = &conf.fixed_out.settings.nchannels, - .descr = "Number of channels for fixed DAC (1 - mono, 2 - stereo)" - }, - { - .name = "DAC_VOICES", - .tag = AUD_OPT_INT, - .valp = &conf.fixed_out.nb_voices, - .descr = "Number of voices for DAC" - }, - { - .name = "DAC_TRY_POLL", - .tag = AUD_OPT_BOOL, - .valp = &conf.try_poll_out, - .descr = "Attempt using poll mode for DAC" - }, - /* ADC */ - { - .name = "ADC_FIXED_SETTINGS", - .tag = AUD_OPT_BOOL, - .valp = &conf.fixed_in.enabled, - .descr = "Use fixed settings for host ADC" - }, - { - .name = "ADC_FIXED_FREQ", - .tag = AUD_OPT_INT, - .valp = &conf.fixed_in.settings.freq, - .descr = "Frequency for fixed host ADC" - }, - { - .name = "ADC_FIXED_FMT", - .tag = AUD_OPT_FMT, - .valp = &conf.fixed_in.settings.fmt, - .descr = "Format for fixed host ADC" - }, - { - .name = "ADC_FIXED_CHANNELS", - .tag = AUD_OPT_INT, - .valp = &conf.fixed_in.settings.nchannels, - .descr = "Number of channels for fixed ADC (1 - mono, 2 - stereo)" - }, - { - .name = "ADC_VOICES", - .tag = AUD_OPT_INT, - .valp = &conf.fixed_in.nb_voices, - .descr = "Number of voices for ADC" - }, - { - .name = "ADC_TRY_POLL", - .tag = AUD_OPT_BOOL, - .valp = &conf.try_poll_in, - .descr = "Attempt using poll mode for ADC" - }, - /* Misc */ - { - .name = "TIMER_PERIOD", - .tag = AUD_OPT_INT, - .valp = &conf.period.hertz, - .descr = "Timer period in HZ (0 - use lowest possible)" - }, - { /* End of list */ } -}; - -static void audio_pp_nb_voices (const char *typ, int nb) -{ - switch (nb) { - case 0: - printf ("Does not support %s\n", typ); - break; - case 1: - printf ("One %s voice\n", typ); - break; - case INT_MAX: - printf ("Theoretically supports many %s voices\n", typ); - break; - default: - printf ("Theoretically supports up to %d %s voices\n", nb, typ); - break; - } - -} - -void AUD_help (void) -{ - struct audio_driver *d; - - /* make sure we print the help text for modular drivers too */ - audio_module_load_all(); - - audio_process_options ("AUDIO", audio_options); - QLIST_FOREACH(d, &audio_drivers, next) { - if (d->options) { - audio_process_options (d->name, d->options); - } - } - - printf ("Audio options:\n"); - audio_print_options ("AUDIO", audio_options); - printf ("\n"); - - printf ("Available drivers:\n"); - - QLIST_FOREACH(d, &audio_drivers, next) { - - printf ("Name: %s\n", d->name); - printf ("Description: %s\n", d->descr); - - audio_pp_nb_voices ("playback", d->max_voices_out); - audio_pp_nb_voices ("capture", d->max_voices_in); - - if (d->options) { - printf ("Options:\n"); - audio_print_options (d->name, d->options); - } - else { - printf ("No options\n"); - } - printf ("\n"); - } - - printf ( - "Options are settable through environment variables.\n" - "Example:\n" -#ifdef _WIN32 - " set QEMU_AUDIO_DRV=wav\n" - " set QEMU_WAV_PATH=c:\\tune.wav\n" -#else - " export QEMU_AUDIO_DRV=wav\n" - " export QEMU_WAV_PATH=$HOME/tune.wav\n" - "(for csh replace export with setenv in the above)\n" -#endif - " qemu ...\n\n" - ); -} - -static int audio_driver_init(AudioState *s, struct audio_driver *drv, bool msg) +static int audio_driver_init(AudioState *s, struct audio_driver *drv, + bool msg, Audiodev *dev) { - if (drv->options) { - audio_process_options (drv->name, drv->options); - } - s->drv_opaque = drv->init (); + s->drv_opaque = drv->init(dev); if (s->drv_opaque) { audio_init_nb_voices_out (drv); @@ -1773,11 +1292,11 @@ static void audio_vm_change_state_handler (void *opaque, int running, s->vm_running = running; while ((hwo = audio_pcm_hw_find_any_enabled_out (hwo))) { - hwo->pcm_ops->ctl_out (hwo, op, conf.try_poll_out); + hwo->pcm_ops->ctl_out(hwo, op); } while ((hwi = audio_pcm_hw_find_any_enabled_in (hwi))) { - hwi->pcm_ops->ctl_in (hwi, op, conf.try_poll_in); + hwi->pcm_ops->ctl_in(hwi, op); } audio_reset_timer (s); } @@ -1827,6 +1346,11 @@ void audio_cleanup(void) s->drv->fini (s->drv_opaque); s->drv = NULL; } + + if (s->dev) { + qapi_free_Audiodev(s->dev); + s->dev = NULL; + } } static const VMStateDescription vmstate_audio = { @@ -1838,19 +1362,58 @@ static const VMStateDescription vmstate_audio = { } }; -static void audio_init (void) +static void audio_validate_opts(Audiodev *dev, Error **errp); + +static AudiodevListEntry *audiodev_find( + AudiodevListHead *head, const char *drvname) +{ + AudiodevListEntry *e; + QSIMPLEQ_FOREACH(e, head, next) { + if (strcmp(AudiodevDriver_str(e->dev->driver), drvname) == 0) { + return e; + } + } + + return NULL; +} + +static int audio_init(Audiodev *dev) { size_t i; int done = 0; - const char *drvname; + const char *drvname = NULL; VMChangeStateEntry *e; AudioState *s = &glob_audio_state; struct audio_driver *driver; + /* silence gcc warning about uninitialized variable */ + AudiodevListHead head = QSIMPLEQ_HEAD_INITIALIZER(head); if (s->drv) { - return; + if (dev) { + dolog("Cannot create more than one audio backend, sorry\n"); + qapi_free_Audiodev(dev); + } + return -1; } + if (dev) { + /* -audiodev option */ + drvname = AudiodevDriver_str(dev->driver); + } else { + /* legacy implicit initialization */ + head = audio_handle_legacy_opts(); + /* + * In case of legacy initialization, all Audiodevs in the list will have + * the same configuration (except the driver), so it does't matter which + * one we chose. We need an Audiodev to set up AudioState before we can + * init a driver. Also note that dev at this point is still in the + * list. + */ + dev = QSIMPLEQ_FIRST(&head)->dev; + audio_validate_opts(dev, &error_abort); + } + s->dev = dev; + QLIST_INIT (&s->hw_head_out); QLIST_INIT (&s->hw_head_in); QLIST_INIT (&s->cap_head); @@ -1858,10 +1421,8 @@ static void audio_init (void) s->ts = timer_new_ns(QEMU_CLOCK_VIRTUAL, audio_timer, s); - audio_process_options ("AUDIO", audio_options); - - s->nb_hw_voices_out = conf.fixed_out.nb_voices; - s->nb_hw_voices_in = conf.fixed_in.nb_voices; + s->nb_hw_voices_out = audio_get_pdo_out(dev)->voices; + s->nb_hw_voices_in = audio_get_pdo_in(dev)->voices; if (s->nb_hw_voices_out <= 0) { dolog ("Bogus number of playback voices %d, setting to 1\n", @@ -1875,46 +1436,42 @@ static void audio_init (void) s->nb_hw_voices_in = 0; } - { - int def; - drvname = audio_get_conf_str ("QEMU_AUDIO_DRV", NULL, &def); - } - if (drvname) { driver = audio_driver_lookup(drvname); if (driver) { - done = !audio_driver_init(s, driver, true); + done = !audio_driver_init(s, driver, true, dev); } else { dolog ("Unknown audio driver `%s'\n", drvname); - dolog ("Run with -audio-help to list available drivers\n"); } - } - - if (!done) { - for (i = 0; !done && i < ARRAY_SIZE(audio_prio_list); i++) { + } else { + for (i = 0; audio_prio_list[i]; i++) { + AudiodevListEntry *e = audiodev_find(&head, audio_prio_list[i]); driver = audio_driver_lookup(audio_prio_list[i]); - if (driver && driver->can_be_default) { - done = !audio_driver_init(s, driver, false); + + if (e && driver) { + s->dev = dev = e->dev; + audio_validate_opts(dev, &error_abort); + done = !audio_driver_init(s, driver, false, dev); + if (done) { + e->dev = NULL; + break; + } } } } + audio_free_audiodev_list(&head); if (!done) { driver = audio_driver_lookup("none"); - done = !audio_driver_init(s, driver, false); + done = !audio_driver_init(s, driver, false, dev); assert(done); dolog("warning: Using timer based audio emulation\n"); } - if (conf.period.hertz <= 0) { - if (conf.period.hertz < 0) { - dolog ("warning: Timer period is negative - %d " - "treating as zero\n", - conf.period.hertz); - } - conf.period.ticks = 1; + if (dev->timer_period <= 0) { + s->period_ticks = 1; } else { - conf.period.ticks = NANOSECONDS_PER_SECOND / conf.period.hertz; + s->period_ticks = dev->timer_period * SCALE_US; } e = qemu_add_vm_change_state_handler (audio_vm_change_state_handler, s); @@ -1925,11 +1482,22 @@ static void audio_init (void) QLIST_INIT (&s->card_head); vmstate_register (NULL, 0, &vmstate_audio, s); + return 0; +} + +void audio_free_audiodev_list(AudiodevListHead *head) +{ + AudiodevListEntry *e; + while ((e = QSIMPLEQ_FIRST(head))) { + QSIMPLEQ_REMOVE_HEAD(head, next); + qapi_free_Audiodev(e->dev); + g_free(e); + } } void AUD_register_card (const char *name, QEMUSoundCard *card) { - audio_init (); + audio_init(NULL); card->name = g_strdup (name); memset (&card->entries, 0, sizeof (card->entries)); QLIST_INSERT_HEAD (&glob_audio_state.card_head, card, entries); @@ -2069,3 +1637,174 @@ void AUD_set_volume_in (SWVoiceIn *sw, int mute, uint8_t lvol, uint8_t rvol) } } } + +void audio_create_pdos(Audiodev *dev) +{ + switch (dev->driver) { +#define CASE(DRIVER, driver, pdo_name) \ + case AUDIODEV_DRIVER_##DRIVER: \ + if (!dev->u.driver.has_in) { \ + dev->u.driver.in = g_malloc0( \ + sizeof(Audiodev##pdo_name##PerDirectionOptions)); \ + dev->u.driver.has_in = true; \ + } \ + if (!dev->u.driver.has_out) { \ + dev->u.driver.out = g_malloc0( \ + sizeof(AudiodevAlsaPerDirectionOptions)); \ + dev->u.driver.has_out = true; \ + } \ + break + + CASE(NONE, none, ); + CASE(ALSA, alsa, Alsa); + CASE(COREAUDIO, coreaudio, Coreaudio); + CASE(DSOUND, dsound, ); + CASE(OSS, oss, Oss); + CASE(PA, pa, Pa); + CASE(SDL, sdl, ); + CASE(SPICE, spice, ); + CASE(WAV, wav, ); + + case AUDIODEV_DRIVER__MAX: + abort(); + }; +} + +static void audio_validate_per_direction_opts( + AudiodevPerDirectionOptions *pdo, Error **errp) +{ + if (!pdo->has_fixed_settings) { + pdo->has_fixed_settings = true; + pdo->fixed_settings = true; + } + if (!pdo->fixed_settings && + (pdo->has_frequency || pdo->has_channels || pdo->has_format)) { + error_setg(errp, + "You can't use frequency, channels or format with fixed-settings=off"); + return; + } + + if (!pdo->has_frequency) { + pdo->has_frequency = true; + pdo->frequency = 44100; + } + if (!pdo->has_channels) { + pdo->has_channels = true; + pdo->channels = 2; + } + if (!pdo->has_voices) { + pdo->has_voices = true; + pdo->voices = 1; + } + if (!pdo->has_format) { + pdo->has_format = true; + pdo->format = AUDIO_FORMAT_S16; + } +} + +static void audio_validate_opts(Audiodev *dev, Error **errp) +{ + Error *err = NULL; + + audio_create_pdos(dev); + + audio_validate_per_direction_opts(audio_get_pdo_in(dev), &err); + if (err) { + error_propagate(errp, err); + return; + } + + audio_validate_per_direction_opts(audio_get_pdo_out(dev), &err); + if (err) { + error_propagate(errp, err); + return; + } + + if (!dev->has_timer_period) { + dev->has_timer_period = true; + dev->timer_period = 10000; /* 100Hz -> 10ms */ + } +} + +void audio_parse_option(const char *opt) +{ + AudiodevListEntry *e; + Audiodev *dev = NULL; + + Visitor *v = qobject_input_visitor_new_str(opt, "driver", &error_fatal); + visit_type_Audiodev(v, NULL, &dev, &error_fatal); + visit_free(v); + + audio_validate_opts(dev, &error_fatal); + + e = g_malloc0(sizeof(AudiodevListEntry)); + e->dev = dev; + QSIMPLEQ_INSERT_TAIL(&audiodevs, e, next); +} + +void audio_init_audiodevs(void) +{ + AudiodevListEntry *e; + + QSIMPLEQ_FOREACH(e, &audiodevs, next) { + audio_init(e->dev); + } +} + +audsettings audiodev_to_audsettings(AudiodevPerDirectionOptions *pdo) +{ + return (audsettings) { + .freq = pdo->frequency, + .nchannels = pdo->channels, + .fmt = pdo->format, + .endianness = AUDIO_HOST_ENDIANNESS, + }; +} + +int audioformat_bytes_per_sample(AudioFormat fmt) +{ + switch (fmt) { + case AUDIO_FORMAT_U8: + case AUDIO_FORMAT_S8: + return 1; + + case AUDIO_FORMAT_U16: + case AUDIO_FORMAT_S16: + return 2; + + case AUDIO_FORMAT_U32: + case AUDIO_FORMAT_S32: + return 4; + + case AUDIO_FORMAT__MAX: + ; + } + abort(); +} + + +/* frames = freq * usec / 1e6 */ +int audio_buffer_frames(AudiodevPerDirectionOptions *pdo, + audsettings *as, int def_usecs) +{ + uint64_t usecs = pdo->has_buffer_length ? pdo->buffer_length : def_usecs; + return (as->freq * usecs + 500000) / 1000000; +} + +/* samples = channels * frames = channels * freq * usec / 1e6 */ +int audio_buffer_samples(AudiodevPerDirectionOptions *pdo, + audsettings *as, int def_usecs) +{ + return as->nchannels * audio_buffer_frames(pdo, as, def_usecs); +} + +/* + * bytes = bytes_per_sample * samples = + * bytes_per_sample * channels * freq * usec / 1e6 + */ +int audio_buffer_bytes(AudiodevPerDirectionOptions *pdo, + audsettings *as, int def_usecs) +{ + return audio_buffer_samples(pdo, as, def_usecs) * + audioformat_bytes_per_sample(as->fmt); +} diff --git a/audio/audio.h b/audio/audio.h index f4339a185e..64b0f761bc 100644 --- a/audio/audio.h +++ b/audio/audio.h @@ -26,30 +26,31 @@ #define QEMU_AUDIO_H #include "qemu/queue.h" +#include "qapi/qapi-types-audio.h" typedef void (*audio_callback_fn) (void *opaque, int avail); -typedef enum { - AUD_FMT_U8, - AUD_FMT_S8, - AUD_FMT_U16, - AUD_FMT_S16, - AUD_FMT_U32, - AUD_FMT_S32 -} audfmt_e; - #ifdef HOST_WORDS_BIGENDIAN #define AUDIO_HOST_ENDIANNESS 1 #else #define AUDIO_HOST_ENDIANNESS 0 #endif -struct audsettings { +typedef struct audsettings { int freq; int nchannels; - audfmt_e fmt; + AudioFormat fmt; int endianness; -}; +} audsettings; + +audsettings audiodev_to_audsettings(AudiodevPerDirectionOptions *pdo); +int audioformat_bytes_per_sample(AudioFormat fmt); +int audio_buffer_frames(AudiodevPerDirectionOptions *pdo, + audsettings *as, int def_usecs); +int audio_buffer_samples(AudiodevPerDirectionOptions *pdo, + audsettings *as, int def_usecs); +int audio_buffer_bytes(AudiodevPerDirectionOptions *pdo, + audsettings *as, int def_usecs); typedef enum { AUD_CNOTIFY_ENABLE, @@ -89,7 +90,6 @@ typedef struct QEMUAudioTimeStamp { void AUD_vlog (const char *cap, const char *fmt, va_list ap) GCC_FMT_ATTR(2, 0); void AUD_log (const char *cap, const char *fmt, ...) GCC_FMT_ATTR(2, 3); -void AUD_help (void); void AUD_register_card (const char *name, QEMUSoundCard *card); void AUD_remove_card (QEMUSoundCard *card); CaptureVoiceOut *AUD_add_capture ( @@ -171,4 +171,8 @@ void audio_sample_to_uint64(void *samples, int pos, void audio_sample_from_uint64(void *samples, int pos, uint64_t left, uint64_t right); +void audio_parse_option(const char *opt); +void audio_init_audiodevs(void); +void audio_legacy_help(void); + #endif /* QEMU_AUDIO_H */ diff --git a/audio/audio_int.h b/audio/audio_int.h index 6c451b995c..3f14842709 100644 --- a/audio/audio_int.h +++ b/audio/audio_int.h @@ -33,22 +33,6 @@ struct audio_pcm_ops; -typedef enum { - AUD_OPT_INT, - AUD_OPT_FMT, - AUD_OPT_STR, - AUD_OPT_BOOL -} audio_option_tag_e; - -struct audio_option { - const char *name; - audio_option_tag_e tag; - void *valp; - const char *descr; - int *overriddenp; - int overridden; -}; - struct audio_callback { void *opaque; audio_callback_fn fn; @@ -145,8 +129,7 @@ typedef struct audio_driver audio_driver; struct audio_driver { const char *name; const char *descr; - struct audio_option *options; - void *(*init) (void); + void *(*init) (Audiodev *); void (*fini) (void *); struct audio_pcm_ops *pcm_ops; int can_be_default; @@ -193,6 +176,7 @@ struct SWVoiceCap { typedef struct AudioState { struct audio_driver *drv; + Audiodev *dev; void *drv_opaque; QEMUTimer *ts; @@ -203,10 +187,13 @@ typedef struct AudioState { int nb_hw_voices_out; int nb_hw_voices_in; int vm_running; + int64_t period_ticks; } AudioState; extern const struct mixeng_volume nominal_volume; +extern const char *audio_prio_list[]; + void audio_driver_register(audio_driver *drv); audio_driver *audio_driver_lookup(const char *name); @@ -248,4 +235,18 @@ static inline int audio_ring_dist (int dst, int src, int len) #define AUDIO_STRINGIFY_(n) #n #define AUDIO_STRINGIFY(n) AUDIO_STRINGIFY_(n) +typedef struct AudiodevListEntry { + Audiodev *dev; + QSIMPLEQ_ENTRY(AudiodevListEntry) next; +} AudiodevListEntry; + +typedef QSIMPLEQ_HEAD(, AudiodevListEntry) AudiodevListHead; +AudiodevListHead audio_handle_legacy_opts(void); + +void audio_free_audiodev_list(AudiodevListHead *head); + +void audio_create_pdos(Audiodev *dev); +AudiodevPerDirectionOptions *audio_get_pdo_in(Audiodev *dev); +AudiodevPerDirectionOptions *audio_get_pdo_out(Audiodev *dev); + #endif /* QEMU_AUDIO_INT_H */ diff --git a/audio/audio_legacy.c b/audio/audio_legacy.c new file mode 100644 index 0000000000..2fd58cb8ef --- /dev/null +++ b/audio/audio_legacy.c @@ -0,0 +1,550 @@ +/* + * QEMU Audio subsystem: legacy configuration handling + * + * Copyright (c) 2015-2019 Zoltán KÅ‘vágó <DirtY.iCE.hu@gmail.com> + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "qemu/osdep.h" +#include "audio.h" +#include "audio_int.h" +#include "qemu-common.h" +#include "qemu/cutils.h" +#include "qemu/timer.h" +#include "qapi/error.h" +#include "qapi/qapi-visit-audio.h" +#include "qapi/visitor-impl.h" + +#define AUDIO_CAP "audio-legacy" +#include "audio_int.h" + +static uint32_t toui32(const char *str) +{ + unsigned long long ret; + if (parse_uint_full(str, &ret, 10) || ret > UINT32_MAX) { + dolog("Invalid integer value `%s'\n", str); + exit(1); + } + return ret; +} + +/* helper functions to convert env variables */ +static void get_bool(const char *env, bool *dst, bool *has_dst) +{ + const char *val = getenv(env); + if (val) { + *dst = toui32(val) != 0; + *has_dst = true; + } +} + +static void get_int(const char *env, uint32_t *dst, bool *has_dst) +{ + const char *val = getenv(env); + if (val) { + *dst = toui32(val); + *has_dst = true; + } +} + +static void get_str(const char *env, char **dst, bool *has_dst) +{ + const char *val = getenv(env); + if (val) { + if (*has_dst) { + g_free(*dst); + } + *dst = g_strdup(val); + *has_dst = true; + } +} + +static void get_fmt(const char *env, AudioFormat *dst, bool *has_dst) +{ + const char *val = getenv(env); + if (val) { + size_t i; + for (i = 0; AudioFormat_lookup.size; ++i) { + if (strcasecmp(val, AudioFormat_lookup.array[i]) == 0) { + *dst = i; + *has_dst = true; + return; + } + } + + dolog("Invalid audio format `%s'\n", val); + exit(1); + } +} + + +static void get_millis_to_usecs(const char *env, uint32_t *dst, bool *has_dst) +{ + const char *val = getenv(env); + if (val) { + *dst = toui32(val) * 1000; + *has_dst = true; + } +} + +static uint32_t frames_to_usecs(uint32_t frames, + AudiodevPerDirectionOptions *pdo) +{ + uint32_t freq = pdo->has_frequency ? pdo->frequency : 44100; + return (frames * 1000000 + freq / 2) / freq; +} + + +static void get_frames_to_usecs(const char *env, uint32_t *dst, bool *has_dst, + AudiodevPerDirectionOptions *pdo) +{ + const char *val = getenv(env); + if (val) { + *dst = frames_to_usecs(toui32(val), pdo); + *has_dst = true; + } +} + +static uint32_t samples_to_usecs(uint32_t samples, + AudiodevPerDirectionOptions *pdo) +{ + uint32_t channels = pdo->has_channels ? pdo->channels : 2; + return frames_to_usecs(samples / channels, pdo); +} + +static void get_samples_to_usecs(const char *env, uint32_t *dst, bool *has_dst, + AudiodevPerDirectionOptions *pdo) +{ + const char *val = getenv(env); + if (val) { + *dst = samples_to_usecs(toui32(val), pdo); + *has_dst = true; + } +} + +static uint32_t bytes_to_usecs(uint32_t bytes, AudiodevPerDirectionOptions *pdo) +{ + AudioFormat fmt = pdo->has_format ? pdo->format : AUDIO_FORMAT_S16; + uint32_t bytes_per_sample = audioformat_bytes_per_sample(fmt); + return samples_to_usecs(bytes / bytes_per_sample, pdo); +} + +static void get_bytes_to_usecs(const char *env, uint32_t *dst, bool *has_dst, + AudiodevPerDirectionOptions *pdo) +{ + const char *val = getenv(env); + if (val) { + *dst = bytes_to_usecs(toui32(val), pdo); + *has_dst = true; + } +} + +/* backend specific functions */ +/* ALSA */ +static void handle_alsa_per_direction( + AudiodevAlsaPerDirectionOptions *apdo, const char *prefix) +{ + char buf[64]; + size_t len = strlen(prefix); + bool size_in_usecs = false; + bool dummy; + + memcpy(buf, prefix, len); + strcpy(buf + len, "TRY_POLL"); + get_bool(buf, &apdo->try_poll, &apdo->has_try_poll); + + strcpy(buf + len, "DEV"); + get_str(buf, &apdo->dev, &apdo->has_dev); + + strcpy(buf + len, "SIZE_IN_USEC"); + get_bool(buf, &size_in_usecs, &dummy); + + strcpy(buf + len, "PERIOD_SIZE"); + get_int(buf, &apdo->period_length, &apdo->has_period_length); + if (apdo->has_period_length && !size_in_usecs) { + apdo->period_length = frames_to_usecs( + apdo->period_length, + qapi_AudiodevAlsaPerDirectionOptions_base(apdo)); + } + + strcpy(buf + len, "BUFFER_SIZE"); + get_int(buf, &apdo->buffer_length, &apdo->has_buffer_length); + if (apdo->has_buffer_length && !size_in_usecs) { + apdo->buffer_length = frames_to_usecs( + apdo->buffer_length, + qapi_AudiodevAlsaPerDirectionOptions_base(apdo)); + } +} + +static void handle_alsa(Audiodev *dev) +{ + AudiodevAlsaOptions *aopt = &dev->u.alsa; + handle_alsa_per_direction(aopt->in, "QEMU_ALSA_ADC_"); + handle_alsa_per_direction(aopt->out, "QEMU_ALSA_DAC_"); + + get_millis_to_usecs("QEMU_ALSA_THRESHOLD", + &aopt->threshold, &aopt->has_threshold); +} + +/* coreaudio */ +static void handle_coreaudio(Audiodev *dev) +{ + get_frames_to_usecs( + "QEMU_COREAUDIO_BUFFER_SIZE", + &dev->u.coreaudio.out->buffer_length, + &dev->u.coreaudio.out->has_buffer_length, + qapi_AudiodevCoreaudioPerDirectionOptions_base(dev->u.coreaudio.out)); + get_int("QEMU_COREAUDIO_BUFFER_COUNT", + &dev->u.coreaudio.out->buffer_count, + &dev->u.coreaudio.out->has_buffer_count); +} + +/* dsound */ +static void handle_dsound(Audiodev *dev) +{ + get_millis_to_usecs("QEMU_DSOUND_LATENCY_MILLIS", + &dev->u.dsound.latency, &dev->u.dsound.has_latency); + get_bytes_to_usecs("QEMU_DSOUND_BUFSIZE_OUT", + &dev->u.dsound.out->buffer_length, + &dev->u.dsound.out->has_buffer_length, + dev->u.dsound.out); + get_bytes_to_usecs("QEMU_DSOUND_BUFSIZE_IN", + &dev->u.dsound.in->buffer_length, + &dev->u.dsound.in->has_buffer_length, + dev->u.dsound.in); +} + +/* OSS */ +static void handle_oss_per_direction( + AudiodevOssPerDirectionOptions *opdo, const char *try_poll_env, + const char *dev_env) +{ + get_bool(try_poll_env, &opdo->try_poll, &opdo->has_try_poll); + get_str(dev_env, &opdo->dev, &opdo->has_dev); + + get_bytes_to_usecs("QEMU_OSS_FRAGSIZE", + &opdo->buffer_length, &opdo->has_buffer_length, + qapi_AudiodevOssPerDirectionOptions_base(opdo)); + get_int("QEMU_OSS_NFRAGS", &opdo->buffer_count, + &opdo->has_buffer_count); +} + +static void handle_oss(Audiodev *dev) +{ + AudiodevOssOptions *oopt = &dev->u.oss; + handle_oss_per_direction(oopt->in, "QEMU_AUDIO_ADC_TRY_POLL", + "QEMU_OSS_ADC_DEV"); + handle_oss_per_direction(oopt->out, "QEMU_AUDIO_DAC_TRY_POLL", + "QEMU_OSS_DAC_DEV"); + + get_bool("QEMU_OSS_MMAP", &oopt->try_mmap, &oopt->has_try_mmap); + get_bool("QEMU_OSS_EXCLUSIVE", &oopt->exclusive, &oopt->has_exclusive); + get_int("QEMU_OSS_POLICY", &oopt->dsp_policy, &oopt->has_dsp_policy); +} + +/* pulseaudio */ +static void handle_pa_per_direction( + AudiodevPaPerDirectionOptions *ppdo, const char *env) +{ + get_str(env, &ppdo->name, &ppdo->has_name); +} + +static void handle_pa(Audiodev *dev) +{ + handle_pa_per_direction(dev->u.pa.in, "QEMU_PA_SOURCE"); + handle_pa_per_direction(dev->u.pa.out, "QEMU_PA_SINK"); + + get_samples_to_usecs( + "QEMU_PA_SAMPLES", &dev->u.pa.in->buffer_length, + &dev->u.pa.in->has_buffer_length, + qapi_AudiodevPaPerDirectionOptions_base(dev->u.pa.in)); + get_samples_to_usecs( + "QEMU_PA_SAMPLES", &dev->u.pa.out->buffer_length, + &dev->u.pa.out->has_buffer_length, + qapi_AudiodevPaPerDirectionOptions_base(dev->u.pa.out)); + + get_str("QEMU_PA_SERVER", &dev->u.pa.server, &dev->u.pa.has_server); +} + +/* SDL */ +static void handle_sdl(Audiodev *dev) +{ + /* SDL is output only */ + get_samples_to_usecs("QEMU_SDL_SAMPLES", &dev->u.sdl.out->buffer_length, + &dev->u.sdl.out->has_buffer_length, dev->u.sdl.out); +} + +/* wav */ +static void handle_wav(Audiodev *dev) +{ + get_int("QEMU_WAV_FREQUENCY", + &dev->u.wav.out->frequency, &dev->u.wav.out->has_frequency); + get_fmt("QEMU_WAV_FORMAT", &dev->u.wav.out->format, + &dev->u.wav.out->has_format); + get_int("QEMU_WAV_DAC_FIXED_CHANNELS", + &dev->u.wav.out->channels, &dev->u.wav.out->has_channels); + get_str("QEMU_WAV_PATH", &dev->u.wav.path, &dev->u.wav.has_path); +} + +/* general */ +static void handle_per_direction( + AudiodevPerDirectionOptions *pdo, const char *prefix) +{ + char buf[64]; + size_t len = strlen(prefix); + + memcpy(buf, prefix, len); + strcpy(buf + len, "FIXED_SETTINGS"); + get_bool(buf, &pdo->fixed_settings, &pdo->has_fixed_settings); + + strcpy(buf + len, "FIXED_FREQ"); + get_int(buf, &pdo->frequency, &pdo->has_frequency); + + strcpy(buf + len, "FIXED_FMT"); + get_fmt(buf, &pdo->format, &pdo->has_format); + + strcpy(buf + len, "FIXED_CHANNELS"); + get_int(buf, &pdo->channels, &pdo->has_channels); + + strcpy(buf + len, "VOICES"); + get_int(buf, &pdo->voices, &pdo->has_voices); +} + +static AudiodevListEntry *legacy_opt(const char *drvname) +{ + AudiodevListEntry *e = g_malloc0(sizeof(AudiodevListEntry)); + e->dev = g_malloc0(sizeof(Audiodev)); + e->dev->id = g_strdup(drvname); + e->dev->driver = qapi_enum_parse( + &AudiodevDriver_lookup, drvname, -1, &error_abort); + + audio_create_pdos(e->dev); + + handle_per_direction(audio_get_pdo_in(e->dev), "QEMU_AUDIO_ADC_"); + handle_per_direction(audio_get_pdo_out(e->dev), "QEMU_AUDIO_DAC_"); + + /* Original description: Timer period in HZ (0 - use lowest possible) */ + get_int("QEMU_AUDIO_TIMER_PERIOD", + &e->dev->timer_period, &e->dev->has_timer_period); + if (e->dev->has_timer_period && e->dev->timer_period) { + e->dev->timer_period = NANOSECONDS_PER_SECOND / 1000 / + e->dev->timer_period; + } + + switch (e->dev->driver) { + case AUDIODEV_DRIVER_ALSA: + handle_alsa(e->dev); + break; + + case AUDIODEV_DRIVER_COREAUDIO: + handle_coreaudio(e->dev); + break; + + case AUDIODEV_DRIVER_DSOUND: + handle_dsound(e->dev); + break; + + case AUDIODEV_DRIVER_OSS: + handle_oss(e->dev); + break; + + case AUDIODEV_DRIVER_PA: + handle_pa(e->dev); + break; + + case AUDIODEV_DRIVER_SDL: + handle_sdl(e->dev); + break; + + case AUDIODEV_DRIVER_WAV: + handle_wav(e->dev); + break; + + default: + break; + } + + return e; +} + +AudiodevListHead audio_handle_legacy_opts(void) +{ + const char *drvname = getenv("QEMU_AUDIO_DRV"); + AudiodevListHead head = QSIMPLEQ_HEAD_INITIALIZER(head); + + if (drvname) { + AudiodevListEntry *e; + audio_driver *driver = audio_driver_lookup(drvname); + if (!driver) { + dolog("Unknown audio driver `%s'\n", drvname); + exit(1); + } + e = legacy_opt(drvname); + QSIMPLEQ_INSERT_TAIL(&head, e, next); + } else { + for (int i = 0; audio_prio_list[i]; i++) { + audio_driver *driver = audio_driver_lookup(audio_prio_list[i]); + if (driver && driver->can_be_default) { + AudiodevListEntry *e = legacy_opt(driver->name); + QSIMPLEQ_INSERT_TAIL(&head, e, next); + } + } + if (QSIMPLEQ_EMPTY(&head)) { + dolog("Internal error: no default audio driver available\n"); + exit(1); + } + } + + return head; +} + +/* visitor to print -audiodev option */ +typedef struct { + Visitor visitor; + + bool comma; + GList *path; +} LegacyPrintVisitor; + +static void lv_start_struct(Visitor *v, const char *name, void **obj, + size_t size, Error **errp) +{ + LegacyPrintVisitor *lv = (LegacyPrintVisitor *) v; + lv->path = g_list_append(lv->path, g_strdup(name)); +} + +static void lv_end_struct(Visitor *v, void **obj) +{ + LegacyPrintVisitor *lv = (LegacyPrintVisitor *) v; + lv->path = g_list_delete_link(lv->path, g_list_last(lv->path)); +} + +static void lv_print_key(Visitor *v, const char *name) +{ + GList *e; + LegacyPrintVisitor *lv = (LegacyPrintVisitor *) v; + if (lv->comma) { + putchar(','); + } else { + lv->comma = true; + } + + for (e = lv->path; e; e = e->next) { + if (e->data) { + printf("%s.", (const char *) e->data); + } + } + + printf("%s=", name); +} + +static void lv_type_int64(Visitor *v, const char *name, int64_t *obj, + Error **errp) +{ + lv_print_key(v, name); + printf("%" PRIi64, *obj); +} + +static void lv_type_uint64(Visitor *v, const char *name, uint64_t *obj, + Error **errp) +{ + lv_print_key(v, name); + printf("%" PRIu64, *obj); +} + +static void lv_type_bool(Visitor *v, const char *name, bool *obj, Error **errp) +{ + lv_print_key(v, name); + printf("%s", *obj ? "on" : "off"); +} + +static void lv_type_str(Visitor *v, const char *name, char **obj, Error **errp) +{ + const char *str = *obj; + lv_print_key(v, name); + + while (*str) { + if (*str == ',') { + putchar(','); + } + putchar(*str++); + } +} + +static void lv_complete(Visitor *v, void *opaque) +{ + LegacyPrintVisitor *lv = (LegacyPrintVisitor *) v; + assert(lv->path == NULL); +} + +static void lv_free(Visitor *v) +{ + LegacyPrintVisitor *lv = (LegacyPrintVisitor *) v; + + g_list_free_full(lv->path, g_free); + g_free(lv); +} + +static Visitor *legacy_visitor_new(void) +{ + LegacyPrintVisitor *lv = g_malloc0(sizeof(LegacyPrintVisitor)); + + lv->visitor.start_struct = lv_start_struct; + lv->visitor.end_struct = lv_end_struct; + /* lists not supported */ + lv->visitor.type_int64 = lv_type_int64; + lv->visitor.type_uint64 = lv_type_uint64; + lv->visitor.type_bool = lv_type_bool; + lv->visitor.type_str = lv_type_str; + + lv->visitor.type = VISITOR_OUTPUT; + lv->visitor.complete = lv_complete; + lv->visitor.free = lv_free; + + return &lv->visitor; +} + +void audio_legacy_help(void) +{ + AudiodevListHead head; + AudiodevListEntry *e; + + printf("Environment variable based configuration deprecated.\n"); + printf("Please use the new -audiodev option.\n"); + + head = audio_handle_legacy_opts(); + printf("\nEquivalent -audiodev to your current environment variables:\n"); + if (!getenv("QEMU_AUDIO_DRV")) { + printf("(Since you didn't specify QEMU_AUDIO_DRV, I'll list all " + "possibilities)\n"); + } + + QSIMPLEQ_FOREACH(e, &head, next) { + Visitor *v; + Audiodev *dev = e->dev; + printf("-audiodev "); + + v = legacy_visitor_new(); + visit_type_Audiodev(v, NULL, &dev, &error_abort); + visit_free(v); + + printf("\n"); + } + audio_free_audiodev_list(&head); +} diff --git a/audio/audio_template.h b/audio/audio_template.h index 7de227d2d1..1232bb54db 100644 --- a/audio/audio_template.h +++ b/audio/audio_template.h @@ -299,11 +299,42 @@ static HW *glue (audio_pcm_hw_add_new_, TYPE) (struct audsettings *as) return NULL; } +AudiodevPerDirectionOptions *glue(audio_get_pdo_, TYPE)(Audiodev *dev) +{ + switch (dev->driver) { + case AUDIODEV_DRIVER_NONE: + return dev->u.none.TYPE; + case AUDIODEV_DRIVER_ALSA: + return qapi_AudiodevAlsaPerDirectionOptions_base(dev->u.alsa.TYPE); + case AUDIODEV_DRIVER_COREAUDIO: + return qapi_AudiodevCoreaudioPerDirectionOptions_base( + dev->u.coreaudio.TYPE); + case AUDIODEV_DRIVER_DSOUND: + return dev->u.dsound.TYPE; + case AUDIODEV_DRIVER_OSS: + return qapi_AudiodevOssPerDirectionOptions_base(dev->u.oss.TYPE); + case AUDIODEV_DRIVER_PA: + return qapi_AudiodevPaPerDirectionOptions_base(dev->u.pa.TYPE); + case AUDIODEV_DRIVER_SDL: + return dev->u.sdl.TYPE; + case AUDIODEV_DRIVER_SPICE: + return dev->u.spice.TYPE; + case AUDIODEV_DRIVER_WAV: + return dev->u.wav.TYPE; + + case AUDIODEV_DRIVER__MAX: + break; + } + abort(); +} + static HW *glue (audio_pcm_hw_add_, TYPE) (struct audsettings *as) { HW *hw; + AudioState *s = &glob_audio_state; + AudiodevPerDirectionOptions *pdo = glue(audio_get_pdo_, TYPE)(s->dev); - if (glue (conf.fixed_, TYPE).enabled && glue (conf.fixed_, TYPE).greedy) { + if (pdo->fixed_settings) { hw = glue (audio_pcm_hw_add_new_, TYPE) (as); if (hw) { return hw; @@ -331,9 +362,11 @@ static SW *glue (audio_pcm_create_voice_pair_, TYPE) ( SW *sw; HW *hw; struct audsettings hw_as; + AudioState *s = &glob_audio_state; + AudiodevPerDirectionOptions *pdo = glue(audio_get_pdo_, TYPE)(s->dev); - if (glue (conf.fixed_, TYPE).enabled) { - hw_as = glue (conf.fixed_, TYPE).settings; + if (pdo->fixed_settings) { + hw_as = audiodev_to_audsettings(pdo); } else { hw_as = *as; @@ -398,6 +431,7 @@ SW *glue (AUD_open_, TYPE) ( ) { AudioState *s = &glob_audio_state; + AudiodevPerDirectionOptions *pdo = glue(audio_get_pdo_, TYPE)(s->dev); if (audio_bug(__func__, !card || !name || !callback_fn || !as)) { dolog ("card=%p name=%p callback_fn=%p as=%p\n", @@ -422,7 +456,7 @@ SW *glue (AUD_open_, TYPE) ( return sw; } - if (!glue (conf.fixed_, TYPE).enabled && sw) { + if (!pdo->fixed_settings && sw) { glue (AUD_close_, TYPE) (card, sw); sw = NULL; } diff --git a/audio/audio_win_int.c b/audio/audio_win_int.c index 6900008d0c..b938fd667b 100644 --- a/audio/audio_win_int.c +++ b/audio/audio_win_int.c @@ -24,20 +24,20 @@ int waveformat_from_audio_settings (WAVEFORMATEX *wfx, wfx->cbSize = 0; switch (as->fmt) { - case AUD_FMT_S8: - case AUD_FMT_U8: + case AUDIO_FORMAT_S8: + case AUDIO_FORMAT_U8: wfx->wBitsPerSample = 8; break; - case AUD_FMT_S16: - case AUD_FMT_U16: + case AUDIO_FORMAT_S16: + case AUDIO_FORMAT_U16: wfx->wBitsPerSample = 16; wfx->nAvgBytesPerSec <<= 1; wfx->nBlockAlign <<= 1; break; - case AUD_FMT_S32: - case AUD_FMT_U32: + case AUDIO_FORMAT_S32: + case AUDIO_FORMAT_U32: wfx->wBitsPerSample = 32; wfx->nAvgBytesPerSec <<= 2; wfx->nBlockAlign <<= 2; @@ -85,15 +85,15 @@ int waveformat_to_audio_settings (WAVEFORMATEX *wfx, switch (wfx->wBitsPerSample) { case 8: - as->fmt = AUD_FMT_U8; + as->fmt = AUDIO_FORMAT_U8; break; case 16: - as->fmt = AUD_FMT_S16; + as->fmt = AUDIO_FORMAT_S16; break; case 32: - as->fmt = AUD_FMT_S32; + as->fmt = AUDIO_FORMAT_S32; break; default: diff --git a/audio/coreaudio.c b/audio/coreaudio.c index 638c60b300..1ee43b7d5f 100644 --- a/audio/coreaudio.c +++ b/audio/coreaudio.c @@ -36,11 +36,6 @@ #define MAC_OS_X_VERSION_10_6 1060 #endif -typedef struct { - int buffer_frames; - int nbuffers; -} CoreaudioConf; - typedef struct coreaudioVoiceOut { HWVoiceOut hw; pthread_mutex_t mutex; @@ -507,7 +502,9 @@ static int coreaudio_init_out(HWVoiceOut *hw, struct audsettings *as, int err; const char *typ = "playback"; AudioValueRange frameRange; - CoreaudioConf *conf = drv_opaque; + Audiodev *dev = drv_opaque; + AudiodevCoreaudioPerDirectionOptions *cpdo = dev->u.coreaudio.out; + int frames; /* create mutex */ err = pthread_mutex_init(&core->mutex, NULL); @@ -538,16 +535,17 @@ static int coreaudio_init_out(HWVoiceOut *hw, struct audsettings *as, return -1; } - if (frameRange.mMinimum > conf->buffer_frames) { + frames = audio_buffer_frames( + qapi_AudiodevCoreaudioPerDirectionOptions_base(cpdo), as, 11610); + if (frameRange.mMinimum > frames) { core->audioDevicePropertyBufferFrameSize = (UInt32) frameRange.mMinimum; dolog ("warning: Upsizing Buffer Frames to %f\n", frameRange.mMinimum); - } - else if (frameRange.mMaximum < conf->buffer_frames) { + } else if (frameRange.mMaximum < frames) { core->audioDevicePropertyBufferFrameSize = (UInt32) frameRange.mMaximum; dolog ("warning: Downsizing Buffer Frames to %f\n", frameRange.mMaximum); } else { - core->audioDevicePropertyBufferFrameSize = conf->buffer_frames; + core->audioDevicePropertyBufferFrameSize = frames; } /* set Buffer Frame Size */ @@ -568,7 +566,8 @@ static int coreaudio_init_out(HWVoiceOut *hw, struct audsettings *as, "Could not get device buffer frame size\n"); return -1; } - hw->samples = conf->nbuffers * core->audioDevicePropertyBufferFrameSize; + hw->samples = (cpdo->has_buffer_count ? cpdo->buffer_count : 4) * + core->audioDevicePropertyBufferFrameSize; /* get StreamFormat */ status = coreaudio_get_streamformat(core->outputDeviceID, @@ -680,40 +679,15 @@ static int coreaudio_ctl_out (HWVoiceOut *hw, int cmd, ...) return 0; } -static CoreaudioConf glob_conf = { - .buffer_frames = 512, - .nbuffers = 4, -}; - -static void *coreaudio_audio_init (void) +static void *coreaudio_audio_init(Audiodev *dev) { - CoreaudioConf *conf = g_malloc(sizeof(CoreaudioConf)); - *conf = glob_conf; - - return conf; + return dev; } static void coreaudio_audio_fini (void *opaque) { - g_free(opaque); } -static struct audio_option coreaudio_options[] = { - { - .name = "BUFFER_SIZE", - .tag = AUD_OPT_INT, - .valp = &glob_conf.buffer_frames, - .descr = "Size of the buffer in frames" - }, - { - .name = "BUFFER_COUNT", - .tag = AUD_OPT_INT, - .valp = &glob_conf.nbuffers, - .descr = "Number of buffers" - }, - { /* End of list */ } -}; - static struct audio_pcm_ops coreaudio_pcm_ops = { .init_out = coreaudio_init_out, .fini_out = coreaudio_fini_out, @@ -725,7 +699,6 @@ static struct audio_pcm_ops coreaudio_pcm_ops = { static struct audio_driver coreaudio_audio_driver = { .name = "coreaudio", .descr = "CoreAudio http://developer.apple.com/audio/coreaudio.html", - .options = coreaudio_options, .init = coreaudio_audio_init, .fini = coreaudio_audio_fini, .pcm_ops = &coreaudio_pcm_ops, diff --git a/audio/dsound_template.h b/audio/dsound_template.h index b439f33f58..8ece870c9e 100644 --- a/audio/dsound_template.h +++ b/audio/dsound_template.h @@ -167,17 +167,18 @@ static int dsound_init_out(HWVoiceOut *hw, struct audsettings *as, dsound *s = drv_opaque; WAVEFORMATEX wfx; struct audsettings obt_as; - DSoundConf *conf = &s->conf; #ifdef DSBTYPE_IN const char *typ = "ADC"; DSoundVoiceIn *ds = (DSoundVoiceIn *) hw; DSCBUFFERDESC bd; DSCBCAPS bc; + AudiodevPerDirectionOptions *pdo = s->dev->u.dsound.in; #else const char *typ = "DAC"; DSoundVoiceOut *ds = (DSoundVoiceOut *) hw; DSBUFFERDESC bd; DSBCAPS bc; + AudiodevPerDirectionOptions *pdo = s->dev->u.dsound.out; #endif if (!s->FIELD2) { @@ -193,8 +194,8 @@ static int dsound_init_out(HWVoiceOut *hw, struct audsettings *as, memset (&bd, 0, sizeof (bd)); bd.dwSize = sizeof (bd); bd.lpwfxFormat = &wfx; + bd.dwBufferBytes = audio_buffer_bytes(pdo, as, 92880); #ifdef DSBTYPE_IN - bd.dwBufferBytes = conf->bufsize_in; hr = IDirectSoundCapture_CreateCaptureBuffer ( s->dsound_capture, &bd, @@ -203,7 +204,6 @@ static int dsound_init_out(HWVoiceOut *hw, struct audsettings *as, ); #else bd.dwFlags = DSBCAPS_STICKYFOCUS | DSBCAPS_GETCURRENTPOSITION2; - bd.dwBufferBytes = conf->bufsize_out; hr = IDirectSound_CreateSoundBuffer ( s->dsound, &bd, diff --git a/audio/dsoundaudio.c b/audio/dsoundaudio.c index 3ed73a30d1..a7d04b5033 100644 --- a/audio/dsoundaudio.c +++ b/audio/dsoundaudio.c @@ -32,6 +32,7 @@ #define AUDIO_CAP "dsound" #include "audio_int.h" +#include "qemu/host-utils.h" #include <windows.h> #include <mmsystem.h> @@ -43,16 +44,10 @@ /* #define DEBUG_DSOUND */ typedef struct { - int bufsize_in; - int bufsize_out; - int latency_millis; -} DSoundConf; - -typedef struct { LPDIRECTSOUND dsound; LPDIRECTSOUNDCAPTURE dsound_capture; struct audsettings settings; - DSoundConf conf; + Audiodev *dev; } dsound; typedef struct { @@ -248,9 +243,9 @@ static void GCC_FMT_ATTR (3, 4) dsound_logerr2 ( dsound_log_hresult (hr); } -static DWORD millis_to_bytes (struct audio_pcm_info *info, DWORD millis) +static uint64_t usecs_to_bytes(struct audio_pcm_info *info, uint32_t usecs) { - return (millis * info->bytes_per_second) / 1000; + return muldiv64(usecs, info->bytes_per_second, 1000000); } #ifdef DEBUG_DSOUND @@ -478,7 +473,7 @@ static int dsound_run_out (HWVoiceOut *hw, int live) LPVOID p1, p2; int bufsize; dsound *s = ds->s; - DSoundConf *conf = &s->conf; + AudiodevDsoundOptions *dso = &s->dev->u.dsound; if (!dsb) { dolog ("Attempt to run empty with playback buffer\n"); @@ -501,14 +496,14 @@ static int dsound_run_out (HWVoiceOut *hw, int live) len = live << hwshift; if (ds->first_time) { - if (conf->latency_millis) { + if (dso->latency) { DWORD cur_blat; cur_blat = audio_ring_dist (wpos, ppos, bufsize); ds->first_time = 0; old_pos = wpos; old_pos += - millis_to_bytes (&hw->info, conf->latency_millis) - cur_blat; + usecs_to_bytes(&hw->info, dso->latency) - cur_blat; old_pos %= bufsize; old_pos &= ~hw->info.align; } @@ -747,12 +742,6 @@ static int dsound_run_in (HWVoiceIn *hw) return decr; } -static DSoundConf glob_conf = { - .bufsize_in = 16384, - .bufsize_out = 16384, - .latency_millis = 10 -}; - static void dsound_audio_fini (void *opaque) { HRESULT hr; @@ -783,13 +772,22 @@ static void dsound_audio_fini (void *opaque) g_free(s); } -static void *dsound_audio_init (void) +static void *dsound_audio_init(Audiodev *dev) { int err; HRESULT hr; dsound *s = g_malloc0(sizeof(dsound)); + AudiodevDsoundOptions *dso; + + assert(dev->driver == AUDIODEV_DRIVER_DSOUND); + s->dev = dev; + dso = &dev->u.dsound; + + if (!dso->has_latency) { + dso->has_latency = true; + dso->latency = 10000; /* 10 ms */ + } - s->conf = glob_conf; hr = CoInitialize (NULL); if (FAILED (hr)) { dsound_logerr (hr, "Could not initialize COM\n"); @@ -854,28 +852,6 @@ static void *dsound_audio_init (void) return s; } -static struct audio_option dsound_options[] = { - { - .name = "LATENCY_MILLIS", - .tag = AUD_OPT_INT, - .valp = &glob_conf.latency_millis, - .descr = "(undocumented)" - }, - { - .name = "BUFSIZE_OUT", - .tag = AUD_OPT_INT, - .valp = &glob_conf.bufsize_out, - .descr = "(undocumented)" - }, - { - .name = "BUFSIZE_IN", - .tag = AUD_OPT_INT, - .valp = &glob_conf.bufsize_in, - .descr = "(undocumented)" - }, - { /* End of list */ } -}; - static struct audio_pcm_ops dsound_pcm_ops = { .init_out = dsound_init_out, .fini_out = dsound_fini_out, @@ -893,7 +869,6 @@ static struct audio_pcm_ops dsound_pcm_ops = { static struct audio_driver dsound_audio_driver = { .name = "dsound", .descr = "DirectSound http://wikipedia.org/wiki/DirectSound", - .options = dsound_options, .init = dsound_audio_init, .fini = dsound_audio_fini, .pcm_ops = &dsound_pcm_ops, diff --git a/audio/noaudio.c b/audio/noaudio.c index 1bfebeca7d..ccc611fc84 100644 --- a/audio/noaudio.c +++ b/audio/noaudio.c @@ -136,7 +136,7 @@ static int no_ctl_in (HWVoiceIn *hw, int cmd, ...) return 0; } -static void *no_audio_init (void) +static void *no_audio_init(Audiodev *dev) { return &no_audio_init; } @@ -163,7 +163,6 @@ static struct audio_pcm_ops no_pcm_ops = { static struct audio_driver no_audio_driver = { .name = "none", .descr = "Timer based audio emulation", - .options = NULL, .init = no_audio_init, .fini = no_audio_fini, .pcm_ops = &no_pcm_ops, diff --git a/audio/ossaudio.c b/audio/ossaudio.c index 6c69622b4c..fc28981a39 100644 --- a/audio/ossaudio.c +++ b/audio/ossaudio.c @@ -37,16 +37,6 @@ #define USE_DSP_POLICY #endif -typedef struct OSSConf { - int try_mmap; - int nfrags; - int fragsize; - const char *devpath_out; - const char *devpath_in; - int exclusive; - int policy; -} OSSConf; - typedef struct OSSVoiceOut { HWVoiceOut hw; void *pcm_buf; @@ -56,7 +46,7 @@ typedef struct OSSVoiceOut { int fragsize; int mmapped; int pending; - OSSConf *conf; + Audiodev *dev; } OSSVoiceOut; typedef struct OSSVoiceIn { @@ -65,12 +55,12 @@ typedef struct OSSVoiceIn { int fd; int nfrags; int fragsize; - OSSConf *conf; + Audiodev *dev; } OSSVoiceIn; struct oss_params { int freq; - audfmt_e fmt; + int fmt; int nchannels; int nfrags; int fragsize; @@ -148,16 +138,16 @@ static int oss_write (SWVoiceOut *sw, void *buf, int len) return audio_pcm_sw_write (sw, buf, len); } -static int aud_to_ossfmt (audfmt_e fmt, int endianness) +static int aud_to_ossfmt (AudioFormat fmt, int endianness) { switch (fmt) { - case AUD_FMT_S8: + case AUDIO_FORMAT_S8: return AFMT_S8; - case AUD_FMT_U8: + case AUDIO_FORMAT_U8: return AFMT_U8; - case AUD_FMT_S16: + case AUDIO_FORMAT_S16: if (endianness) { return AFMT_S16_BE; } @@ -165,7 +155,7 @@ static int aud_to_ossfmt (audfmt_e fmt, int endianness) return AFMT_S16_LE; } - case AUD_FMT_U16: + case AUDIO_FORMAT_U16: if (endianness) { return AFMT_U16_BE; } @@ -182,37 +172,37 @@ static int aud_to_ossfmt (audfmt_e fmt, int endianness) } } -static int oss_to_audfmt (int ossfmt, audfmt_e *fmt, int *endianness) +static int oss_to_audfmt (int ossfmt, AudioFormat *fmt, int *endianness) { switch (ossfmt) { case AFMT_S8: *endianness = 0; - *fmt = AUD_FMT_S8; + *fmt = AUDIO_FORMAT_S8; break; case AFMT_U8: *endianness = 0; - *fmt = AUD_FMT_U8; + *fmt = AUDIO_FORMAT_U8; break; case AFMT_S16_LE: *endianness = 0; - *fmt = AUD_FMT_S16; + *fmt = AUDIO_FORMAT_S16; break; case AFMT_U16_LE: *endianness = 0; - *fmt = AUD_FMT_U16; + *fmt = AUDIO_FORMAT_U16; break; case AFMT_S16_BE: *endianness = 1; - *fmt = AUD_FMT_S16; + *fmt = AUDIO_FORMAT_S16; break; case AFMT_U16_BE: *endianness = 1; - *fmt = AUD_FMT_U16; + *fmt = AUDIO_FORMAT_U16; break; default: @@ -262,19 +252,25 @@ static int oss_get_version (int fd, int *version, const char *typ) } #endif -static int oss_open (int in, struct oss_params *req, - struct oss_params *obt, int *pfd, OSSConf* conf) +static int oss_open(int in, struct oss_params *req, audsettings *as, + struct oss_params *obt, int *pfd, Audiodev *dev) { + AudiodevOssOptions *oopts = &dev->u.oss; + AudiodevOssPerDirectionOptions *opdo = in ? oopts->in : oopts->out; int fd; - int oflags = conf->exclusive ? O_EXCL : 0; + int oflags = (oopts->has_exclusive && oopts->exclusive) ? O_EXCL : 0; audio_buf_info abinfo; int fmt, freq, nchannels; int setfragment = 1; - const char *dspname = in ? conf->devpath_in : conf->devpath_out; + const char *dspname = opdo->has_dev ? opdo->dev : "/dev/dsp"; const char *typ = in ? "ADC" : "DAC"; +#ifdef USE_DSP_POLICY + int policy = oopts->has_dsp_policy ? oopts->dsp_policy : 5; +#endif /* Kludge needed to have working mmap on Linux */ - oflags |= conf->try_mmap ? O_RDWR : (in ? O_RDONLY : O_WRONLY); + oflags |= (oopts->has_try_mmap && oopts->try_mmap) ? + O_RDWR : (in ? O_RDONLY : O_WRONLY); fd = open (dspname, oflags | O_NONBLOCK); if (-1 == fd) { @@ -285,6 +281,9 @@ static int oss_open (int in, struct oss_params *req, freq = req->freq; nchannels = req->nchannels; fmt = req->fmt; + req->nfrags = opdo->has_buffer_count ? opdo->buffer_count : 4; + req->fragsize = audio_buffer_bytes( + qapi_AudiodevOssPerDirectionOptions_base(opdo), as, 23220); if (ioctl (fd, SNDCTL_DSP_SAMPLESIZE, &fmt)) { oss_logerr2 (errno, typ, "Failed to set sample size %d\n", req->fmt); @@ -308,18 +307,18 @@ static int oss_open (int in, struct oss_params *req, } #ifdef USE_DSP_POLICY - if (conf->policy >= 0) { + if (policy >= 0) { int version; if (!oss_get_version (fd, &version, typ)) { trace_oss_version(version); if (version >= 0x040000) { - int policy = conf->policy; - if (ioctl (fd, SNDCTL_DSP_POLICY, &policy)) { + int policy2 = policy; + if (ioctl(fd, SNDCTL_DSP_POLICY, &policy2)) { oss_logerr2 (errno, typ, "Failed to set timing policy to %d\n", - conf->policy); + policy); goto err; } setfragment = 0; @@ -500,19 +499,18 @@ static int oss_init_out(HWVoiceOut *hw, struct audsettings *as, int endianness; int err; int fd; - audfmt_e effective_fmt; + AudioFormat effective_fmt; struct audsettings obt_as; - OSSConf *conf = drv_opaque; + Audiodev *dev = drv_opaque; + AudiodevOssOptions *oopts = &dev->u.oss; oss->fd = -1; req.fmt = aud_to_ossfmt (as->fmt, as->endianness); req.freq = as->freq; req.nchannels = as->nchannels; - req.fragsize = conf->fragsize; - req.nfrags = conf->nfrags; - if (oss_open (0, &req, &obt, &fd, conf)) { + if (oss_open(0, &req, as, &obt, &fd, dev)) { return -1; } @@ -539,7 +537,7 @@ static int oss_init_out(HWVoiceOut *hw, struct audsettings *as, hw->samples = (obt.nfrags * obt.fragsize) >> hw->info.shift; oss->mmapped = 0; - if (conf->try_mmap) { + if (oopts->has_try_mmap && oopts->try_mmap) { oss->pcm_buf = mmap ( NULL, hw->samples << hw->info.shift, @@ -597,7 +595,7 @@ static int oss_init_out(HWVoiceOut *hw, struct audsettings *as, } oss->fd = fd; - oss->conf = conf; + oss->dev = dev; return 0; } @@ -605,16 +603,12 @@ static int oss_ctl_out (HWVoiceOut *hw, int cmd, ...) { int trig; OSSVoiceOut *oss = (OSSVoiceOut *) hw; + AudiodevOssPerDirectionOptions *opdo = oss->dev->u.oss.out; switch (cmd) { case VOICE_ENABLE: { - va_list ap; - int poll_mode; - - va_start (ap, cmd); - poll_mode = va_arg (ap, int); - va_end (ap); + bool poll_mode = opdo->try_poll; ldebug ("enabling voice\n"); if (poll_mode) { @@ -667,18 +661,16 @@ static int oss_init_in(HWVoiceIn *hw, struct audsettings *as, void *drv_opaque) int endianness; int err; int fd; - audfmt_e effective_fmt; + AudioFormat effective_fmt; struct audsettings obt_as; - OSSConf *conf = drv_opaque; + Audiodev *dev = drv_opaque; oss->fd = -1; req.fmt = aud_to_ossfmt (as->fmt, as->endianness); req.freq = as->freq; req.nchannels = as->nchannels; - req.fragsize = conf->fragsize; - req.nfrags = conf->nfrags; - if (oss_open (1, &req, &obt, &fd, conf)) { + if (oss_open(1, &req, as, &obt, &fd, dev)) { return -1; } @@ -712,7 +704,7 @@ static int oss_init_in(HWVoiceIn *hw, struct audsettings *as, void *drv_opaque) } oss->fd = fd; - oss->conf = conf; + oss->dev = dev; return 0; } @@ -803,16 +795,12 @@ static int oss_read (SWVoiceIn *sw, void *buf, int size) static int oss_ctl_in (HWVoiceIn *hw, int cmd, ...) { OSSVoiceIn *oss = (OSSVoiceIn *) hw; + AudiodevOssPerDirectionOptions *opdo = oss->dev->u.oss.out; switch (cmd) { case VOICE_ENABLE: { - va_list ap; - int poll_mode; - - va_start (ap, cmd); - poll_mode = va_arg (ap, int); - va_end (ap); + bool poll_mode = opdo->try_poll; if (poll_mode) { oss_poll_in (hw); @@ -832,82 +820,36 @@ static int oss_ctl_in (HWVoiceIn *hw, int cmd, ...) return 0; } -static OSSConf glob_conf = { - .try_mmap = 0, - .nfrags = 4, - .fragsize = 4096, - .devpath_out = "/dev/dsp", - .devpath_in = "/dev/dsp", - .exclusive = 0, - .policy = 5 -}; +static void oss_init_per_direction(AudiodevOssPerDirectionOptions *opdo) +{ + if (!opdo->has_try_poll) { + opdo->try_poll = true; + opdo->has_try_poll = true; + } +} -static void *oss_audio_init (void) +static void *oss_audio_init(Audiodev *dev) { - OSSConf *conf = g_malloc(sizeof(OSSConf)); - *conf = glob_conf; + AudiodevOssOptions *oopts; + assert(dev->driver == AUDIODEV_DRIVER_OSS); + + oopts = &dev->u.oss; + oss_init_per_direction(oopts->in); + oss_init_per_direction(oopts->out); - if (access(conf->devpath_in, R_OK | W_OK) < 0 || - access(conf->devpath_out, R_OK | W_OK) < 0) { - g_free(conf); + if (access(oopts->in->has_dev ? oopts->in->dev : "/dev/dsp", + R_OK | W_OK) < 0 || + access(oopts->out->has_dev ? oopts->out->dev : "/dev/dsp", + R_OK | W_OK) < 0) { return NULL; } - return conf; + return dev; } static void oss_audio_fini (void *opaque) { - g_free(opaque); } -static struct audio_option oss_options[] = { - { - .name = "FRAGSIZE", - .tag = AUD_OPT_INT, - .valp = &glob_conf.fragsize, - .descr = "Fragment size in bytes" - }, - { - .name = "NFRAGS", - .tag = AUD_OPT_INT, - .valp = &glob_conf.nfrags, - .descr = "Number of fragments" - }, - { - .name = "MMAP", - .tag = AUD_OPT_BOOL, - .valp = &glob_conf.try_mmap, - .descr = "Try using memory mapped access" - }, - { - .name = "DAC_DEV", - .tag = AUD_OPT_STR, - .valp = &glob_conf.devpath_out, - .descr = "Path to DAC device" - }, - { - .name = "ADC_DEV", - .tag = AUD_OPT_STR, - .valp = &glob_conf.devpath_in, - .descr = "Path to ADC device" - }, - { - .name = "EXCLUSIVE", - .tag = AUD_OPT_BOOL, - .valp = &glob_conf.exclusive, - .descr = "Open device in exclusive mode (vmix won't work)" - }, -#ifdef USE_DSP_POLICY - { - .name = "POLICY", - .tag = AUD_OPT_INT, - .valp = &glob_conf.policy, - .descr = "Set the timing policy of the device, -1 to use fragment mode", - }, -#endif - { /* End of list */ } -}; - static struct audio_pcm_ops oss_pcm_ops = { .init_out = oss_init_out, .fini_out = oss_fini_out, @@ -925,7 +867,6 @@ static struct audio_pcm_ops oss_pcm_ops = { static struct audio_driver oss_audio_driver = { .name = "oss", .descr = "OSS http://www.opensound.com", - .options = oss_options, .init = oss_audio_init, .fini = oss_audio_fini, .pcm_ops = &oss_pcm_ops, diff --git a/audio/paaudio.c b/audio/paaudio.c index 6153b908da..45295b4e5e 100644 --- a/audio/paaudio.c +++ b/audio/paaudio.c @@ -2,6 +2,7 @@ #include "qemu/osdep.h" #include "qemu-common.h" #include "audio.h" +#include "qapi/opts-visitor.h" #include <pulse/pulseaudio.h> @@ -10,14 +11,7 @@ #include "audio_pt_int.h" typedef struct { - int samples; - char *server; - char *sink; - char *source; -} PAConf; - -typedef struct { - PAConf conf; + Audiodev *dev; pa_threaded_mainloop *mainloop; pa_context *context; } paaudio; @@ -32,6 +26,7 @@ typedef struct { void *pcm_buf; struct audio_pt pt; paaudio *g; + int samples; } PAVoiceOut; typedef struct { @@ -46,6 +41,7 @@ typedef struct { const void *read_data; size_t read_index, read_length; paaudio *g; + int samples; } PAVoiceIn; static void qpa_audio_fini(void *opaque); @@ -227,7 +223,7 @@ static void *qpa_thread_out (void *arg) } } - decr = to_mix = audio_MIN(pa->live, pa->g->conf.samples >> 5); + decr = to_mix = audio_MIN(pa->live, pa->samples >> 5); rpos = pa->rpos; if (audio_pt_unlock(&pa->pt, __func__)) { @@ -319,7 +315,7 @@ static void *qpa_thread_in (void *arg) } } - incr = to_grab = audio_MIN(pa->dead, pa->g->conf.samples >> 5); + incr = to_grab = audio_MIN(pa->dead, pa->samples >> 5); wpos = pa->wpos; if (audio_pt_unlock(&pa->pt, __func__)) { @@ -385,21 +381,21 @@ static int qpa_read (SWVoiceIn *sw, void *buf, int len) return audio_pcm_sw_read (sw, buf, len); } -static pa_sample_format_t audfmt_to_pa (audfmt_e afmt, int endianness) +static pa_sample_format_t audfmt_to_pa (AudioFormat afmt, int endianness) { int format; switch (afmt) { - case AUD_FMT_S8: - case AUD_FMT_U8: + case AUDIO_FORMAT_S8: + case AUDIO_FORMAT_U8: format = PA_SAMPLE_U8; break; - case AUD_FMT_S16: - case AUD_FMT_U16: + case AUDIO_FORMAT_S16: + case AUDIO_FORMAT_U16: format = endianness ? PA_SAMPLE_S16BE : PA_SAMPLE_S16LE; break; - case AUD_FMT_S32: - case AUD_FMT_U32: + case AUDIO_FORMAT_S32: + case AUDIO_FORMAT_U32: format = endianness ? PA_SAMPLE_S32BE : PA_SAMPLE_S32LE; break; default: @@ -410,26 +406,26 @@ static pa_sample_format_t audfmt_to_pa (audfmt_e afmt, int endianness) return format; } -static audfmt_e pa_to_audfmt (pa_sample_format_t fmt, int *endianness) +static AudioFormat pa_to_audfmt (pa_sample_format_t fmt, int *endianness) { switch (fmt) { case PA_SAMPLE_U8: - return AUD_FMT_U8; + return AUDIO_FORMAT_U8; case PA_SAMPLE_S16BE: *endianness = 1; - return AUD_FMT_S16; + return AUDIO_FORMAT_S16; case PA_SAMPLE_S16LE: *endianness = 0; - return AUD_FMT_S16; + return AUDIO_FORMAT_S16; case PA_SAMPLE_S32BE: *endianness = 1; - return AUD_FMT_S32; + return AUDIO_FORMAT_S32; case PA_SAMPLE_S32LE: *endianness = 0; - return AUD_FMT_S32; + return AUDIO_FORMAT_S32; default: dolog ("Internal logic error: Bad pa_sample_format %d\n", fmt); - return AUD_FMT_U8; + return AUDIO_FORMAT_U8; } } @@ -546,17 +542,15 @@ static int qpa_init_out(HWVoiceOut *hw, struct audsettings *as, struct audsettings obt_as = *as; PAVoiceOut *pa = (PAVoiceOut *) hw; paaudio *g = pa->g = drv_opaque; + AudiodevPaOptions *popts = &g->dev->u.pa; + AudiodevPaPerDirectionOptions *ppdo = popts->out; ss.format = audfmt_to_pa (as->fmt, as->endianness); ss.channels = as->nchannels; ss.rate = as->freq; - /* - * qemu audio tick runs at 100 Hz (by default), so processing - * data chunks worth 10 ms of sound should be a good fit. - */ - ba.tlength = pa_usec_to_bytes (10 * 1000, &ss); - ba.minreq = pa_usec_to_bytes (5 * 1000, &ss); + ba.tlength = pa_usec_to_bytes(ppdo->latency, &ss); + ba.minreq = -1; ba.maxlength = -1; ba.prebuf = -1; @@ -566,7 +560,7 @@ static int qpa_init_out(HWVoiceOut *hw, struct audsettings *as, g, "qemu", PA_STREAM_PLAYBACK, - g->conf.sink, + ppdo->has_name ? ppdo->name : NULL, &ss, NULL, /* channel map */ &ba, /* buffering attributes */ @@ -578,7 +572,9 @@ static int qpa_init_out(HWVoiceOut *hw, struct audsettings *as, } audio_pcm_init_info (&hw->info, &obt_as); - hw->samples = g->conf.samples; + hw->samples = pa->samples = audio_buffer_samples( + qapi_AudiodevPaPerDirectionOptions_base(ppdo), + &obt_as, ppdo->buffer_length); pa->pcm_buf = audio_calloc(__func__, hw->samples, 1 << hw->info.shift); pa->rpos = hw->rpos; if (!pa->pcm_buf) { @@ -609,24 +605,32 @@ static int qpa_init_in(HWVoiceIn *hw, struct audsettings *as, void *drv_opaque) { int error; pa_sample_spec ss; + pa_buffer_attr ba; struct audsettings obt_as = *as; PAVoiceIn *pa = (PAVoiceIn *) hw; paaudio *g = pa->g = drv_opaque; + AudiodevPaOptions *popts = &g->dev->u.pa; + AudiodevPaPerDirectionOptions *ppdo = popts->in; ss.format = audfmt_to_pa (as->fmt, as->endianness); ss.channels = as->nchannels; ss.rate = as->freq; + ba.fragsize = pa_usec_to_bytes(ppdo->latency, &ss); + ba.maxlength = -1; + ba.minreq = -1; + ba.prebuf = -1; + obt_as.fmt = pa_to_audfmt (ss.format, &obt_as.endianness); pa->stream = qpa_simple_new ( g, "qemu", PA_STREAM_RECORD, - g->conf.source, + ppdo->has_name ? ppdo->name : NULL, &ss, NULL, /* channel map */ - NULL, /* buffering attributes */ + &ba, /* buffering attributes */ &error ); if (!pa->stream) { @@ -635,7 +639,9 @@ static int qpa_init_in(HWVoiceIn *hw, struct audsettings *as, void *drv_opaque) } audio_pcm_init_info (&hw->info, &obt_as); - hw->samples = g->conf.samples; + hw->samples = pa->samples = audio_buffer_samples( + qapi_AudiodevPaPerDirectionOptions_base(ppdo), + &obt_as, ppdo->buffer_length); pa->pcm_buf = audio_calloc(__func__, hw->samples, 1 << hw->info.shift); pa->wpos = hw->wpos; if (!pa->pcm_buf) { @@ -807,14 +813,27 @@ static int qpa_ctl_in (HWVoiceIn *hw, int cmd, ...) return 0; } -/* common */ -static PAConf glob_conf = { - .samples = 4096, -}; +static int qpa_validate_per_direction_opts(Audiodev *dev, + AudiodevPaPerDirectionOptions *pdo) +{ + if (!pdo->has_buffer_length) { + pdo->has_buffer_length = true; + pdo->buffer_length = 46440; + } + if (!pdo->has_latency) { + pdo->has_latency = true; + pdo->latency = 15000; + } + return 1; +} -static void *qpa_audio_init (void) +static void *qpa_audio_init(Audiodev *dev) { - if (glob_conf.server == NULL) { + paaudio *g; + AudiodevPaOptions *popts = &dev->u.pa; + const char *server; + + if (!popts->has_server) { char pidfile[64]; char *runtime; struct stat st; @@ -829,8 +848,19 @@ static void *qpa_audio_init (void) } } - paaudio *g = g_malloc(sizeof(paaudio)); - g->conf = glob_conf; + assert(dev->driver == AUDIODEV_DRIVER_PA); + + g = g_malloc(sizeof(paaudio)); + server = popts->has_server ? popts->server : NULL; + + if (!qpa_validate_per_direction_opts(dev, popts->in)) { + goto fail; + } + if (!qpa_validate_per_direction_opts(dev, popts->out)) { + goto fail; + } + + g->dev = dev; g->mainloop = NULL; g->context = NULL; @@ -840,14 +870,14 @@ static void *qpa_audio_init (void) } g->context = pa_context_new (pa_threaded_mainloop_get_api (g->mainloop), - g->conf.server); + server); if (!g->context) { goto fail; } pa_context_set_state_callback (g->context, context_state_cb, g); - if (pa_context_connect (g->context, g->conf.server, 0, NULL) < 0) { + if (pa_context_connect(g->context, server, 0, NULL) < 0) { qpa_logerr (pa_context_errno (g->context), "pa_context_connect() failed\n"); goto fail; @@ -910,34 +940,6 @@ static void qpa_audio_fini (void *opaque) g_free(g); } -struct audio_option qpa_options[] = { - { - .name = "SAMPLES", - .tag = AUD_OPT_INT, - .valp = &glob_conf.samples, - .descr = "buffer size in samples" - }, - { - .name = "SERVER", - .tag = AUD_OPT_STR, - .valp = &glob_conf.server, - .descr = "server address" - }, - { - .name = "SINK", - .tag = AUD_OPT_STR, - .valp = &glob_conf.sink, - .descr = "sink device name" - }, - { - .name = "SOURCE", - .tag = AUD_OPT_STR, - .valp = &glob_conf.source, - .descr = "source device name" - }, - { /* End of list */ } -}; - static struct audio_pcm_ops qpa_pcm_ops = { .init_out = qpa_init_out, .fini_out = qpa_fini_out, @@ -955,7 +957,6 @@ static struct audio_pcm_ops qpa_pcm_ops = { static struct audio_driver pa_audio_driver = { .name = "pa", .descr = "http://www.pulseaudio.org/", - .options = qpa_options, .init = qpa_audio_init, .fini = qpa_audio_fini, .pcm_ops = &qpa_pcm_ops, diff --git a/audio/sdlaudio.c b/audio/sdlaudio.c index f7ee70b153..ff9248ba68 100644 --- a/audio/sdlaudio.c +++ b/audio/sdlaudio.c @@ -44,16 +44,11 @@ typedef struct SDLVoiceOut { int decr; } SDLVoiceOut; -static struct { - int nb_samples; -} conf = { - .nb_samples = 1024 -}; - static struct SDLAudioState { int exit; int initialized; bool driver_created; + Audiodev *dev; } glob_sdl; typedef struct SDLAudioState SDLAudioState; @@ -68,19 +63,19 @@ static void GCC_FMT_ATTR (1, 2) sdl_logerr (const char *fmt, ...) AUD_log (AUDIO_CAP, "Reason: %s\n", SDL_GetError ()); } -static int aud_to_sdlfmt (audfmt_e fmt) +static int aud_to_sdlfmt (AudioFormat fmt) { switch (fmt) { - case AUD_FMT_S8: + case AUDIO_FORMAT_S8: return AUDIO_S8; - case AUD_FMT_U8: + case AUDIO_FORMAT_U8: return AUDIO_U8; - case AUD_FMT_S16: + case AUDIO_FORMAT_S16: return AUDIO_S16LSB; - case AUD_FMT_U16: + case AUDIO_FORMAT_U16: return AUDIO_U16LSB; default: @@ -92,37 +87,37 @@ static int aud_to_sdlfmt (audfmt_e fmt) } } -static int sdl_to_audfmt(int sdlfmt, audfmt_e *fmt, int *endianness) +static int sdl_to_audfmt(int sdlfmt, AudioFormat *fmt, int *endianness) { switch (sdlfmt) { case AUDIO_S8: *endianness = 0; - *fmt = AUD_FMT_S8; + *fmt = AUDIO_FORMAT_S8; break; case AUDIO_U8: *endianness = 0; - *fmt = AUD_FMT_U8; + *fmt = AUDIO_FORMAT_U8; break; case AUDIO_S16LSB: *endianness = 0; - *fmt = AUD_FMT_S16; + *fmt = AUDIO_FORMAT_S16; break; case AUDIO_U16LSB: *endianness = 0; - *fmt = AUD_FMT_U16; + *fmt = AUDIO_FORMAT_U16; break; case AUDIO_S16MSB: *endianness = 1; - *fmt = AUD_FMT_S16; + *fmt = AUDIO_FORMAT_S16; break; case AUDIO_U16MSB: *endianness = 1; - *fmt = AUD_FMT_U16; + *fmt = AUDIO_FORMAT_U16; break; default: @@ -265,13 +260,13 @@ static int sdl_init_out(HWVoiceOut *hw, struct audsettings *as, SDL_AudioSpec req, obt; int endianness; int err; - audfmt_e effective_fmt; + AudioFormat effective_fmt; struct audsettings obt_as; req.freq = as->freq; req.format = aud_to_sdlfmt (as->fmt); req.channels = as->nchannels; - req.samples = conf.nb_samples; + req.samples = audio_buffer_samples(s->dev->u.sdl.out, as, 11610); req.callback = sdl_callback; req.userdata = sdl; @@ -315,7 +310,7 @@ static int sdl_ctl_out (HWVoiceOut *hw, int cmd, ...) return 0; } -static void *sdl_audio_init (void) +static void *sdl_audio_init(Audiodev *dev) { SDLAudioState *s = &glob_sdl; if (s->driver_created) { @@ -329,6 +324,7 @@ static void *sdl_audio_init (void) } s->driver_created = true; + s->dev = dev; return s; } @@ -338,18 +334,9 @@ static void sdl_audio_fini (void *opaque) sdl_close (s); SDL_QuitSubSystem (SDL_INIT_AUDIO); s->driver_created = false; + s->dev = NULL; } -static struct audio_option sdl_options[] = { - { - .name = "SAMPLES", - .tag = AUD_OPT_INT, - .valp = &conf.nb_samples, - .descr = "Size of SDL buffer in samples" - }, - { /* End of list */ } -}; - static struct audio_pcm_ops sdl_pcm_ops = { .init_out = sdl_init_out, .fini_out = sdl_fini_out, @@ -361,7 +348,6 @@ static struct audio_pcm_ops sdl_pcm_ops = { static struct audio_driver sdl_audio_driver = { .name = "sdl", .descr = "SDL http://www.libsdl.org", - .options = sdl_options, .init = sdl_audio_init, .fini = sdl_audio_fini, .pcm_ops = &sdl_pcm_ops, diff --git a/audio/spiceaudio.c b/audio/spiceaudio.c index 6ad0eafbc6..4f7873af5a 100644 --- a/audio/spiceaudio.c +++ b/audio/spiceaudio.c @@ -77,7 +77,7 @@ static const SpiceRecordInterface record_sif = { .base.minor_version = SPICE_INTERFACE_RECORD_MINOR, }; -static void *spice_audio_init (void) +static void *spice_audio_init(Audiodev *dev) { if (!using_spice) { return NULL; @@ -130,7 +130,7 @@ static int line_out_init(HWVoiceOut *hw, struct audsettings *as, settings.freq = SPICE_INTERFACE_PLAYBACK_FREQ; #endif settings.nchannels = SPICE_INTERFACE_PLAYBACK_CHAN; - settings.fmt = AUD_FMT_S16; + settings.fmt = AUDIO_FORMAT_S16; settings.endianness = AUDIO_HOST_ENDIANNESS; audio_pcm_init_info (&hw->info, &settings); @@ -258,7 +258,7 @@ static int line_in_init(HWVoiceIn *hw, struct audsettings *as, void *drv_opaque) settings.freq = SPICE_INTERFACE_RECORD_FREQ; #endif settings.nchannels = SPICE_INTERFACE_RECORD_CHAN; - settings.fmt = AUD_FMT_S16; + settings.fmt = AUDIO_FORMAT_S16; settings.endianness = AUDIO_HOST_ENDIANNESS; audio_pcm_init_info (&hw->info, &settings); @@ -373,10 +373,6 @@ static int line_in_ctl (HWVoiceIn *hw, int cmd, ...) return 0; } -static struct audio_option audio_options[] = { - { /* end of list */ }, -}; - static struct audio_pcm_ops audio_callbacks = { .init_out = line_out_init, .fini_out = line_out_fini, @@ -394,7 +390,6 @@ static struct audio_pcm_ops audio_callbacks = { static struct audio_driver spice_audio_driver = { .name = "spice", .descr = "spice audio driver", - .options = audio_options, .init = spice_audio_init, .fini = spice_audio_fini, .pcm_ops = &audio_callbacks, diff --git a/audio/trace-events b/audio/trace-events index c986469319..a1d1eccb8a 100644 --- a/audio/trace-events +++ b/audio/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# audio/alsaaudio.c +# alsaaudio.c alsa_revents(int revents) "revents = %d" alsa_pollout(int i, int fd) "i = %d fd = %d" alsa_set_handler(int events, int index, int fd, int err) "events=0x%x index=%d fd=%d err=%d" @@ -12,11 +12,11 @@ alsa_resume_out(void) "Resuming suspended output stream" alsa_resume_in(void) "Resuming suspended input stream" alsa_no_frames(int state) "No frames available and ALSA state is %d" -# audio/ossaudio.c +# ossaudio.c oss_version(int version) "OSS version = 0x%x" oss_invalid_available_size(int size, int bufsize) "Invalid available size, size=%d bufsize=%d" -# audio/audio.c +# audio.c audio_timer_start(int interval) "interval %d ms" audio_timer_stop(void) "" audio_timer_delayed(int interval) "interval %d ms" diff --git a/audio/wavaudio.c b/audio/wavaudio.c index 40adfa30c3..8d30f57296 100644 --- a/audio/wavaudio.c +++ b/audio/wavaudio.c @@ -24,6 +24,7 @@ #include "qemu/osdep.h" #include "qemu/host-utils.h" #include "qemu/timer.h" +#include "qapi/opts-visitor.h" #include "audio.h" #define AUDIO_CAP "wav" @@ -37,11 +38,6 @@ typedef struct WAVVoiceOut { int total_samples; } WAVVoiceOut; -typedef struct { - struct audsettings settings; - const char *wav_path; -} WAVConf; - static int wav_run_out (HWVoiceOut *hw, int live) { WAVVoiceOut *wav = (WAVVoiceOut *) hw; @@ -112,25 +108,30 @@ static int wav_init_out(HWVoiceOut *hw, struct audsettings *as, 0x02, 0x00, 0x44, 0xac, 0x00, 0x00, 0x10, 0xb1, 0x02, 0x00, 0x04, 0x00, 0x10, 0x00, 0x64, 0x61, 0x74, 0x61, 0x00, 0x00, 0x00, 0x00 }; - WAVConf *conf = drv_opaque; - struct audsettings wav_as = conf->settings; + Audiodev *dev = drv_opaque; + AudiodevWavOptions *wopts = &dev->u.wav; + struct audsettings wav_as = audiodev_to_audsettings(dev->u.wav.out); + const char *wav_path = wopts->has_path ? wopts->path : "qemu.wav"; stereo = wav_as.nchannels == 2; switch (wav_as.fmt) { - case AUD_FMT_S8: - case AUD_FMT_U8: + case AUDIO_FORMAT_S8: + case AUDIO_FORMAT_U8: bits16 = 0; break; - case AUD_FMT_S16: - case AUD_FMT_U16: + case AUDIO_FORMAT_S16: + case AUDIO_FORMAT_U16: bits16 = 1; break; - case AUD_FMT_S32: - case AUD_FMT_U32: + case AUDIO_FORMAT_S32: + case AUDIO_FORMAT_U32: dolog ("WAVE files can not handle 32bit formats\n"); return -1; + + default: + abort(); } hdr[34] = bits16 ? 0x10 : 0x08; @@ -151,10 +152,10 @@ static int wav_init_out(HWVoiceOut *hw, struct audsettings *as, le_store (hdr + 28, hw->info.freq << (bits16 + stereo), 4); le_store (hdr + 32, 1 << (bits16 + stereo), 2); - wav->f = fopen (conf->wav_path, "wb"); + wav->f = fopen(wav_path, "wb"); if (!wav->f) { dolog ("Failed to open wave file `%s'\nReason: %s\n", - conf->wav_path, strerror (errno)); + wav_path, strerror(errno)); g_free (wav->pcm_buf); wav->pcm_buf = NULL; return -1; @@ -222,54 +223,17 @@ static int wav_ctl_out (HWVoiceOut *hw, int cmd, ...) return 0; } -static WAVConf glob_conf = { - .settings.freq = 44100, - .settings.nchannels = 2, - .settings.fmt = AUD_FMT_S16, - .wav_path = "qemu.wav" -}; - -static void *wav_audio_init (void) +static void *wav_audio_init(Audiodev *dev) { - WAVConf *conf = g_malloc(sizeof(WAVConf)); - *conf = glob_conf; - return conf; + assert(dev->driver == AUDIODEV_DRIVER_WAV); + return dev; } static void wav_audio_fini (void *opaque) { ldebug ("wav_fini"); - g_free(opaque); } -static struct audio_option wav_options[] = { - { - .name = "FREQUENCY", - .tag = AUD_OPT_INT, - .valp = &glob_conf.settings.freq, - .descr = "Frequency" - }, - { - .name = "FORMAT", - .tag = AUD_OPT_FMT, - .valp = &glob_conf.settings.fmt, - .descr = "Format" - }, - { - .name = "DAC_FIXED_CHANNELS", - .tag = AUD_OPT_INT, - .valp = &glob_conf.settings.nchannels, - .descr = "Number of channels (1 - mono, 2 - stereo)" - }, - { - .name = "PATH", - .tag = AUD_OPT_STR, - .valp = &glob_conf.wav_path, - .descr = "Path to wave file" - }, - { /* End of list */ } -}; - static struct audio_pcm_ops wav_pcm_ops = { .init_out = wav_init_out, .fini_out = wav_fini_out, @@ -281,7 +245,6 @@ static struct audio_pcm_ops wav_pcm_ops = { static struct audio_driver wav_audio_driver = { .name = "wav", .descr = "WAV renderer http://wikipedia.org/wiki/WAV", - .options = wav_options, .init = wav_audio_init, .fini = wav_audio_fini, .pcm_ops = &wav_pcm_ops, diff --git a/audio/wavcapture.c b/audio/wavcapture.c index cd24570aa7..74320dfecc 100644 --- a/audio/wavcapture.c +++ b/audio/wavcapture.c @@ -136,7 +136,7 @@ int wav_start_capture (CaptureState *s, const char *path, int freq, as.freq = freq; as.nchannels = 1 << stereo; - as.fmt = bits16 ? AUD_FMT_S16 : AUD_FMT_U8; + as.fmt = bits16 ? AUDIO_FORMAT_S16 : AUDIO_FORMAT_U8; as.endianness = 0; ops.notify = wav_notify; diff --git a/authz/listfile.c b/authz/listfile.c index d4579767e7..bc2b58ef6d 100644 --- a/authz/listfile.c +++ b/authz/listfile.c @@ -93,7 +93,7 @@ qauthz_list_file_load(QAuthZListFile *fauthz, Error **errp) static void -qauthz_list_file_event(int wd G_GNUC_UNUSED, +qauthz_list_file_event(int64_t wd G_GNUC_UNUSED, QFileMonitorEvent ev G_GNUC_UNUSED, const char *name G_GNUC_UNUSED, void *opaque) diff --git a/authz/trace-events b/authz/trace-events index 72c411927d..e62ebb36b7 100644 --- a/authz/trace-events +++ b/authz/trace-events @@ -1,18 +1,18 @@ # See docs/devel/tracing.txt for syntax documentation. -# authz/base.c +# base.c qauthz_is_allowed(void *authz, const char *identity, bool allowed) "AuthZ %p check identity=%s allowed=%d" -# auth/simple.c +# simple.c qauthz_simple_is_allowed(void *authz, const char *wantidentity, const char *gotidentity) "AuthZ simple %p check want identity=%s got identity=%s" -# auth/list.c +# list.c qauthz_list_check_rule(void *authz, const char *identity, const char *rule, int format, int policy) "AuthZ list %p check rule=%s identity=%s format=%d policy=%d" qauthz_list_default_policy(void *authz, const char *identity, int policy) "AuthZ list %p default identity=%s policy=%d" -# auth/listfile.c +# listfile.c qauthz_list_file_load(void *authz, const char *filename) "AuthZ file %p load filename=%s" qauthz_list_file_refresh(void *authz, const char *filename, int success) "AuthZ file %p load filename=%s success=%d" -# auth/pam.c +# pamacct.c qauthz_pam_check(void *authz, const char *identity, const char *service) "AuthZ PAM %p identity=%s service=%s" diff --git a/backends/cryptodev-vhost-user.c b/backends/cryptodev-vhost-user.c index d539f14d59..1052a5d0e9 100644 --- a/backends/cryptodev-vhost-user.c +++ b/backends/cryptodev-vhost-user.c @@ -47,7 +47,7 @@ typedef struct CryptoDevBackendVhostUser { CryptoDevBackend parent_obj; - VhostUserState *vhost_user; + VhostUserState vhost_user; CharBackend chr; char *chr_name; bool opened; @@ -104,7 +104,7 @@ cryptodev_vhost_user_start(int queues, continue; } - options.opaque = s->vhost_user; + options.opaque = &s->vhost_user; options.backend_type = VHOST_BACKEND_TYPE_USER; options.cc = b->conf.peers.ccs[i]; s->vhost_crypto[i] = cryptodev_vhost_init(&options); @@ -182,7 +182,6 @@ static void cryptodev_vhost_user_init( size_t i; Error *local_err = NULL; Chardev *chr; - VhostUserState *user; CryptoDevBackendClient *cc; CryptoDevBackendVhostUser *s = CRYPTODEV_BACKEND_VHOST_USER(backend); @@ -213,15 +212,10 @@ static void cryptodev_vhost_user_init( } } - user = vhost_user_init(); - if (!user) { - error_setg(errp, "Failed to init vhost_user"); + if (!vhost_user_init(&s->vhost_user, &s->chr, errp)) { return; } - user->chr = &s->chr; - s->vhost_user = user; - qemu_chr_fe_set_handlers(&s->chr, NULL, NULL, cryptodev_vhost_user_event, NULL, s, NULL, true); @@ -307,11 +301,7 @@ static void cryptodev_vhost_user_cleanup( } } - if (s->vhost_user) { - vhost_user_cleanup(s->vhost_user); - g_free(s->vhost_user); - s->vhost_user = NULL; - } + vhost_user_cleanup(&s->vhost_user); } static void cryptodev_vhost_user_set_chardev(Object *obj, diff --git a/backends/hostmem-file.c b/backends/hostmem-file.c index ce54788048..37ac6445d2 100644 --- a/backends/hostmem-file.c +++ b/backends/hostmem-file.c @@ -56,6 +56,29 @@ file_backend_memory_alloc(HostMemoryBackend *backend, Error **errp) error_setg(errp, "mem-path property not set"); return; } + + /* + * Verify pmem file size since starting a guest with an incorrect size + * leads to confusing failures inside the guest. + */ + if (fb->is_pmem) { + Error *local_err = NULL; + uint64_t size; + + size = qemu_get_pmem_size(fb->mem_path, &local_err); + if (!size) { + error_propagate(errp, local_err); + return; + } + + if (backend->size > size) { + error_setg(errp, "size property %" PRIu64 " is larger than " + "pmem file \"%s\" size %" PRIu64, backend->size, + fb->mem_path, size); + return; + } + } + backend->force_prealloc = mem_prealloc; name = host_memory_backend_get_name(backend); memory_region_init_ram_from_file(&backend->mr, OBJECT(backend), diff --git a/backends/hostmem-memfd.c b/backends/hostmem-memfd.c index 98c9bf3240..46b15b916a 100644 --- a/backends/hostmem-memfd.c +++ b/backends/hostmem-memfd.c @@ -154,15 +154,13 @@ memfd_backend_class_init(ObjectClass *oc, void *data) "Huge pages size (ex: 2M, 1G)", &error_abort); } - if (qemu_memfd_check(MFD_ALLOW_SEALING)) { - object_class_property_add_bool(oc, "seal", - memfd_backend_get_seal, - memfd_backend_set_seal, - &error_abort); - object_class_property_set_description(oc, "seal", - "Seal growing & shrinking", - &error_abort); - } + object_class_property_add_bool(oc, "seal", + memfd_backend_get_seal, + memfd_backend_set_seal, + &error_abort); + object_class_property_set_description(oc, "seal", + "Seal growing & shrinking", + &error_abort); } static const TypeInfo memfd_backend_info = { @@ -175,7 +173,7 @@ static const TypeInfo memfd_backend_info = { static void register_types(void) { - if (qemu_memfd_check(0)) { + if (qemu_memfd_check(MFD_ALLOW_SEALING)) { type_register_static(&memfd_backend_info); } } diff --git a/block.c b/block.c index ccf008c177..9ae5c0ed2f 100644 --- a/block.c +++ b/block.c @@ -950,8 +950,9 @@ static void bdrv_temp_snapshot_options(int *child_flags, QDict *child_options, qdict_set_default_str(child_options, BDRV_OPT_CACHE_DIRECT, "off"); qdict_set_default_str(child_options, BDRV_OPT_CACHE_NO_FLUSH, "on"); - /* Copy the read-only option from the parent */ + /* Copy the read-only and discard options from the parent */ qdict_copy_default(child_options, parent_options, BDRV_OPT_READ_ONLY); + qdict_copy_default(child_options, parent_options, BDRV_OPT_DISCARD); /* aio=native doesn't work for cache.direct=off, so disable it for the * temporary snapshot */ @@ -1163,13 +1164,6 @@ static int bdrv_open_flags(BlockDriverState *bs, int flags) */ open_flags &= ~(BDRV_O_SNAPSHOT | BDRV_O_NO_BACKING | BDRV_O_PROTOCOL); - /* - * Snapshots should be writable. - */ - if (flags & BDRV_O_TEMPORARY) { - open_flags |= BDRV_O_RDWR; - } - return open_flags; } @@ -1698,6 +1692,7 @@ static void bdrv_child_set_perm(BdrvChild *c, uint64_t perm, uint64_t shared); typedef struct BlockReopenQueueEntry { bool prepared; + bool perms_checked; BDRVReopenState state; QSIMPLEQ_ENTRY(BlockReopenQueueEntry) entry; } BlockReopenQueueEntry; @@ -2132,6 +2127,8 @@ static void bdrv_replace_child_noperm(BdrvChild *child, BlockDriverState *old_bs = child->bs; int i; + assert(!child->frozen); + if (old_bs && new_bs) { assert(bdrv_get_aio_context(old_bs) == bdrv_get_aio_context(new_bs)); } @@ -2348,6 +2345,10 @@ void bdrv_set_backing_hd(BlockDriverState *bs, BlockDriverState *backing_hd, bool update_inherits_from = bdrv_chain_contains(bs, backing_hd) && bdrv_inherits_from_recursive(backing_hd, bs); + if (bdrv_is_backing_chain_frozen(bs, backing_bs(bs), errp)) { + return; + } + if (backing_hd) { bdrv_ref(backing_hd); } @@ -2983,6 +2984,74 @@ BlockDriverState *bdrv_open(const char *filename, const char *reference, NULL, errp); } +/* Return true if the NULL-terminated @list contains @str */ +static bool is_str_in_list(const char *str, const char *const *list) +{ + if (str && list) { + int i; + for (i = 0; list[i] != NULL; i++) { + if (!strcmp(str, list[i])) { + return true; + } + } + } + return false; +} + +/* + * Check that every option set in @bs->options is also set in + * @new_opts. + * + * Options listed in the common_options list and in + * @bs->drv->mutable_opts are skipped. + * + * Return 0 on success, otherwise return -EINVAL and set @errp. + */ +static int bdrv_reset_options_allowed(BlockDriverState *bs, + const QDict *new_opts, Error **errp) +{ + const QDictEntry *e; + /* These options are common to all block drivers and are handled + * in bdrv_reopen_prepare() so they can be left out of @new_opts */ + const char *const common_options[] = { + "node-name", "discard", "cache.direct", "cache.no-flush", + "read-only", "auto-read-only", "detect-zeroes", NULL + }; + + for (e = qdict_first(bs->options); e; e = qdict_next(bs->options, e)) { + if (!qdict_haskey(new_opts, e->key) && + !is_str_in_list(e->key, common_options) && + !is_str_in_list(e->key, bs->drv->mutable_opts)) { + error_setg(errp, "Option '%s' cannot be reset " + "to its default value", e->key); + return -EINVAL; + } + } + + return 0; +} + +/* + * Returns true if @child can be reached recursively from @bs + */ +static bool bdrv_recurse_has_child(BlockDriverState *bs, + BlockDriverState *child) +{ + BdrvChild *c; + + if (bs == child) { + return true; + } + + QLIST_FOREACH(c, &bs->children, next) { + if (bdrv_recurse_has_child(c->bs, child)) { + return true; + } + } + + return false; +} + /* * Adds a BlockDriverState to a simple queue for an atomic, transactional * reopen of multiple devices. @@ -3010,7 +3079,8 @@ static BlockReopenQueue *bdrv_reopen_queue_child(BlockReopenQueue *bs_queue, QDict *options, const BdrvChildRole *role, QDict *parent_options, - int parent_flags) + int parent_flags, + bool keep_old_opts) { assert(bs != NULL); @@ -3050,13 +3120,13 @@ static BlockReopenQueue *bdrv_reopen_queue_child(BlockReopenQueue *bs_queue, */ /* Old explicitly set values (don't overwrite by inherited value) */ - if (bs_entry) { - old_options = qdict_clone_shallow(bs_entry->state.explicit_options); - } else { - old_options = qdict_clone_shallow(bs->explicit_options); + if (bs_entry || keep_old_opts) { + old_options = qdict_clone_shallow(bs_entry ? + bs_entry->state.explicit_options : + bs->explicit_options); + bdrv_join_options(bs, options, old_options); + qobject_unref(old_options); } - bdrv_join_options(bs, options, old_options); - qobject_unref(old_options); explicit_options = qdict_clone_shallow(options); @@ -3068,10 +3138,12 @@ static BlockReopenQueue *bdrv_reopen_queue_child(BlockReopenQueue *bs_queue, flags = bdrv_get_flags(bs); } - /* Old values are used for options that aren't set yet */ - old_options = qdict_clone_shallow(bs->options); - bdrv_join_options(bs, options, old_options); - qobject_unref(old_options); + if (keep_old_opts) { + /* Old values are used for options that aren't set yet */ + old_options = qdict_clone_shallow(bs->options); + bdrv_join_options(bs, options, old_options); + qobject_unref(old_options); + } /* We have the final set of options so let's update the flags */ options_copy = qdict_clone_shallow(options); @@ -3104,9 +3176,21 @@ static BlockReopenQueue *bdrv_reopen_queue_child(BlockReopenQueue *bs_queue, bs_entry->state.perm = UINT64_MAX; bs_entry->state.shared_perm = 0; + /* + * If keep_old_opts is false then it means that unspecified + * options must be reset to their original value. We don't allow + * resetting 'backing' but we need to know if the option is + * missing in order to decide if we have to return an error. + */ + if (!keep_old_opts) { + bs_entry->state.backing_missing = + !qdict_haskey(options, "backing") && + !qdict_haskey(options, "backing.driver"); + } + QLIST_FOREACH(child, &bs->children, next) { - QDict *new_child_options; - char *child_key_dot; + QDict *new_child_options = NULL; + bool child_keep_old = keep_old_opts; /* reopen can only change the options of block devices that were * implicitly created and inherited options. For other (referenced) @@ -3115,13 +3199,32 @@ static BlockReopenQueue *bdrv_reopen_queue_child(BlockReopenQueue *bs_queue, continue; } - child_key_dot = g_strdup_printf("%s.", child->name); - qdict_extract_subqdict(explicit_options, NULL, child_key_dot); - qdict_extract_subqdict(options, &new_child_options, child_key_dot); - g_free(child_key_dot); + /* Check if the options contain a child reference */ + if (qdict_haskey(options, child->name)) { + const char *childref = qdict_get_try_str(options, child->name); + /* + * The current child must not be reopened if the child + * reference is null or points to a different node. + */ + if (g_strcmp0(childref, child->bs->node_name)) { + continue; + } + /* + * If the child reference points to the current child then + * reopen it with its existing set of options (note that + * it can still inherit new options from the parent). + */ + child_keep_old = true; + } else { + /* Extract child options ("child-name.*") */ + char *child_key_dot = g_strdup_printf("%s.", child->name); + qdict_extract_subqdict(explicit_options, NULL, child_key_dot); + qdict_extract_subqdict(options, &new_child_options, child_key_dot); + g_free(child_key_dot); + } bdrv_reopen_queue_child(bs_queue, child->bs, new_child_options, - child->role, options, flags); + child->role, options, flags, child_keep_old); } return bs_queue; @@ -3129,9 +3232,10 @@ static BlockReopenQueue *bdrv_reopen_queue_child(BlockReopenQueue *bs_queue, BlockReopenQueue *bdrv_reopen_queue(BlockReopenQueue *bs_queue, BlockDriverState *bs, - QDict *options) + QDict *options, bool keep_old_opts) { - return bdrv_reopen_queue_child(bs_queue, bs, options, NULL, NULL, 0); + return bdrv_reopen_queue_child(bs_queue, bs, options, NULL, NULL, 0, + keep_old_opts); } /* @@ -3151,23 +3255,44 @@ BlockReopenQueue *bdrv_reopen_queue(BlockReopenQueue *bs_queue, * All affected nodes must be drained between bdrv_reopen_queue() and * bdrv_reopen_multiple(). */ -int bdrv_reopen_multiple(AioContext *ctx, BlockReopenQueue *bs_queue, Error **errp) +int bdrv_reopen_multiple(BlockReopenQueue *bs_queue, Error **errp) { int ret = -1; BlockReopenQueueEntry *bs_entry, *next; - Error *local_err = NULL; assert(bs_queue != NULL); QSIMPLEQ_FOREACH(bs_entry, bs_queue, entry) { assert(bs_entry->state.bs->quiesce_counter > 0); - if (bdrv_reopen_prepare(&bs_entry->state, bs_queue, &local_err)) { - error_propagate(errp, local_err); + if (bdrv_reopen_prepare(&bs_entry->state, bs_queue, errp)) { goto cleanup; } bs_entry->prepared = true; } + QSIMPLEQ_FOREACH(bs_entry, bs_queue, entry) { + BDRVReopenState *state = &bs_entry->state; + ret = bdrv_check_perm(state->bs, bs_queue, state->perm, + state->shared_perm, NULL, errp); + if (ret < 0) { + goto cleanup_perm; + } + /* Check if new_backing_bs would accept the new permissions */ + if (state->replace_backing_bs && state->new_backing_bs) { + uint64_t nperm, nshared; + bdrv_child_perm(state->bs, state->new_backing_bs, + NULL, &child_backing, bs_queue, + state->perm, state->shared_perm, + &nperm, &nshared); + ret = bdrv_check_update_perm(state->new_backing_bs, NULL, + nperm, nshared, NULL, errp); + if (ret < 0) { + goto cleanup_perm; + } + } + bs_entry->perms_checked = true; + } + /* If we reach this point, we have success and just need to apply the * changes */ @@ -3176,7 +3301,23 @@ int bdrv_reopen_multiple(AioContext *ctx, BlockReopenQueue *bs_queue, Error **er } ret = 0; +cleanup_perm: + QSIMPLEQ_FOREACH_SAFE(bs_entry, bs_queue, entry, next) { + BDRVReopenState *state = &bs_entry->state; + if (!bs_entry->perms_checked) { + continue; + } + + if (ret == 0) { + bdrv_set_perm(state->bs, state->perm, state->shared_perm); + } else { + bdrv_abort_perm_update(state->bs); + if (state->replace_backing_bs && state->new_backing_bs) { + bdrv_abort_perm_update(state->new_backing_bs); + } + } + } cleanup: QSIMPLEQ_FOREACH_SAFE(bs_entry, bs_queue, entry, next) { if (ret) { @@ -3186,6 +3327,9 @@ cleanup: qobject_unref(bs_entry->state.explicit_options); qobject_unref(bs_entry->state.options); } + if (bs_entry->state.new_backing_bs) { + bdrv_unref(bs_entry->state.new_backing_bs); + } g_free(bs_entry); } g_free(bs_queue); @@ -3203,8 +3347,8 @@ int bdrv_reopen_set_read_only(BlockDriverState *bs, bool read_only, qdict_put_bool(opts, BDRV_OPT_READ_ONLY, read_only); bdrv_subtree_drained_begin(bs); - queue = bdrv_reopen_queue(NULL, bs, opts); - ret = bdrv_reopen_multiple(bdrv_get_aio_context(bs), queue, errp); + queue = bdrv_reopen_queue(NULL, bs, opts, true); + ret = bdrv_reopen_multiple(queue, errp); bdrv_subtree_drained_end(bs); return ret; @@ -3258,6 +3402,101 @@ static void bdrv_reopen_perm(BlockReopenQueue *q, BlockDriverState *bs, } /* + * Take a BDRVReopenState and check if the value of 'backing' in the + * reopen_state->options QDict is valid or not. + * + * If 'backing' is missing from the QDict then return 0. + * + * If 'backing' contains the node name of the backing file of + * reopen_state->bs then return 0. + * + * If 'backing' contains a different node name (or is null) then check + * whether the current backing file can be replaced with the new one. + * If that's the case then reopen_state->replace_backing_bs is set to + * true and reopen_state->new_backing_bs contains a pointer to the new + * backing BlockDriverState (or NULL). + * + * Return 0 on success, otherwise return < 0 and set @errp. + */ +static int bdrv_reopen_parse_backing(BDRVReopenState *reopen_state, + Error **errp) +{ + BlockDriverState *bs = reopen_state->bs; + BlockDriverState *overlay_bs, *new_backing_bs; + QObject *value; + const char *str; + + value = qdict_get(reopen_state->options, "backing"); + if (value == NULL) { + return 0; + } + + switch (qobject_type(value)) { + case QTYPE_QNULL: + new_backing_bs = NULL; + break; + case QTYPE_QSTRING: + str = qobject_get_try_str(value); + new_backing_bs = bdrv_lookup_bs(NULL, str, errp); + if (new_backing_bs == NULL) { + return -EINVAL; + } else if (bdrv_recurse_has_child(new_backing_bs, bs)) { + error_setg(errp, "Making '%s' a backing file of '%s' " + "would create a cycle", str, bs->node_name); + return -EINVAL; + } + break; + default: + /* 'backing' does not allow any other data type */ + g_assert_not_reached(); + } + + /* + * TODO: before removing the x- prefix from x-blockdev-reopen we + * should move the new backing file into the right AioContext + * instead of returning an error. + */ + if (new_backing_bs) { + if (bdrv_get_aio_context(new_backing_bs) != bdrv_get_aio_context(bs)) { + error_setg(errp, "Cannot use a new backing file " + "with a different AioContext"); + return -EINVAL; + } + } + + /* + * Find the "actual" backing file by skipping all links that point + * to an implicit node, if any (e.g. a commit filter node). + */ + overlay_bs = bs; + while (backing_bs(overlay_bs) && backing_bs(overlay_bs)->implicit) { + overlay_bs = backing_bs(overlay_bs); + } + + /* If we want to replace the backing file we need some extra checks */ + if (new_backing_bs != backing_bs(overlay_bs)) { + /* Check for implicit nodes between bs and its backing file */ + if (bs != overlay_bs) { + error_setg(errp, "Cannot change backing link if '%s' has " + "an implicit backing file", bs->node_name); + return -EPERM; + } + /* Check if the backing link that we want to replace is frozen */ + if (bdrv_is_backing_chain_frozen(overlay_bs, backing_bs(overlay_bs), + errp)) { + return -EPERM; + } + reopen_state->replace_backing_bs = true; + if (new_backing_bs) { + bdrv_ref(new_backing_bs); + reopen_state->new_backing_bs = new_backing_bs; + } + } + + return 0; +} + +/* * Prepares a BlockDriverState for reopen. All changes are staged in the * 'opaque' field of the BDRVReopenState, which is used and allocated by * the block driver layer .bdrv_reopen_prepare() @@ -3355,6 +3594,17 @@ int bdrv_reopen_prepare(BDRVReopenState *reopen_state, BlockReopenQueue *queue, } if (drv->bdrv_reopen_prepare) { + /* + * If a driver-specific option is missing, it means that we + * should reset it to its default value. + * But not all options allow that, so we need to check it first. + */ + ret = bdrv_reset_options_allowed(reopen_state->bs, + reopen_state->options, errp); + if (ret) { + goto error; + } + ret = drv->bdrv_reopen_prepare(reopen_state, queue, &local_err); if (ret) { if (local_err != NULL) { @@ -3378,6 +3628,30 @@ int bdrv_reopen_prepare(BDRVReopenState *reopen_state, BlockReopenQueue *queue, drv_prepared = true; + /* + * We must provide the 'backing' option if the BDS has a backing + * file or if the image file has a backing file name as part of + * its metadata. Otherwise the 'backing' option can be omitted. + */ + if (drv->supports_backing && reopen_state->backing_missing && + (backing_bs(reopen_state->bs) || reopen_state->bs->backing_file[0])) { + error_setg(errp, "backing is missing for '%s'", + reopen_state->bs->node_name); + ret = -EINVAL; + goto error; + } + + /* + * Allow changing the 'backing' option. The new value can be + * either a reference to an existing node (using its node name) + * or NULL to simply detach the current backing file. + */ + ret = bdrv_reopen_parse_backing(reopen_state, errp); + if (ret < 0) { + goto error; + } + qdict_del(reopen_state->options, "backing"); + /* Options that are not handled are only okay if they are unchanged * compared to the old state. It is expected that some options are only * used for the initial open, but not reopen (e.g. filename) */ @@ -3430,12 +3704,6 @@ int bdrv_reopen_prepare(BDRVReopenState *reopen_state, BlockReopenQueue *queue, } while ((entry = qdict_next(reopen_state->options, entry))); } - ret = bdrv_check_perm(reopen_state->bs, queue, reopen_state->perm, - reopen_state->shared_perm, NULL, errp); - if (ret < 0) { - goto error; - } - ret = 0; /* Restore the original reopen_state->options QDict */ @@ -3493,6 +3761,11 @@ void bdrv_reopen_commit(BDRVReopenState *reopen_state) bs->read_only = !(reopen_state->flags & BDRV_O_RDWR); bs->detect_zeroes = reopen_state->detect_zeroes; + if (reopen_state->replace_backing_bs) { + qdict_del(bs->explicit_options, "backing"); + qdict_del(bs->options, "backing"); + } + /* Remove child references from bs->options and bs->explicit_options. * Child options were already removed in bdrv_reopen_queue_child() */ QLIST_FOREACH(child, &bs->children, next) { @@ -3500,10 +3773,22 @@ void bdrv_reopen_commit(BDRVReopenState *reopen_state) qdict_del(bs->options, child->name); } - bdrv_refresh_limits(bs, NULL); + /* + * Change the backing file if a new one was specified. We do this + * after updating bs->options, so bdrv_refresh_filename() (called + * from bdrv_set_backing_hd()) has the new values. + */ + if (reopen_state->replace_backing_bs) { + BlockDriverState *old_backing_bs = backing_bs(bs); + assert(!old_backing_bs || !old_backing_bs->implicit); + /* Abort the permission update on the backing bs we're detaching */ + if (old_backing_bs) { + bdrv_abort_perm_update(old_backing_bs); + } + bdrv_set_backing_hd(bs, reopen_state->new_backing_bs, &error_abort); + } - bdrv_set_perm(reopen_state->bs, reopen_state->perm, - reopen_state->shared_perm); + bdrv_refresh_limits(bs, NULL); new_can_write = !bdrv_is_read_only(bs) && !(bdrv_get_flags(bs) & BDRV_O_INACTIVE); @@ -3536,8 +3821,6 @@ void bdrv_reopen_abort(BDRVReopenState *reopen_state) if (drv->bdrv_reopen_abort) { drv->bdrv_reopen_abort(reopen_state); } - - bdrv_abort_perm_update(reopen_state->bs); } @@ -3717,6 +4000,11 @@ void bdrv_replace_node(BlockDriverState *from, BlockDriverState *to, if (!should_update_child(c, to)) { continue; } + if (c->frozen) { + error_setg(errp, "Cannot change '%s' link to '%s'", + c->name, from->node_name); + goto out; + } list = g_slist_prepend(list, c); perm |= c->perm; shared &= c->shared_perm; @@ -3929,6 +4217,70 @@ BlockDriverState *bdrv_find_base(BlockDriverState *bs) } /* + * Return true if at least one of the backing links between @bs and + * @base is frozen. @errp is set if that's the case. + * @base must be reachable from @bs, or NULL. + */ +bool bdrv_is_backing_chain_frozen(BlockDriverState *bs, BlockDriverState *base, + Error **errp) +{ + BlockDriverState *i; + + for (i = bs; i != base; i = backing_bs(i)) { + if (i->backing && i->backing->frozen) { + error_setg(errp, "Cannot change '%s' link from '%s' to '%s'", + i->backing->name, i->node_name, + backing_bs(i)->node_name); + return true; + } + } + + return false; +} + +/* + * Freeze all backing links between @bs and @base. + * If any of the links is already frozen the operation is aborted and + * none of the links are modified. + * @base must be reachable from @bs, or NULL. + * Returns 0 on success. On failure returns < 0 and sets @errp. + */ +int bdrv_freeze_backing_chain(BlockDriverState *bs, BlockDriverState *base, + Error **errp) +{ + BlockDriverState *i; + + if (bdrv_is_backing_chain_frozen(bs, base, errp)) { + return -EPERM; + } + + for (i = bs; i != base; i = backing_bs(i)) { + if (i->backing) { + i->backing->frozen = true; + } + } + + return 0; +} + +/* + * Unfreeze all backing links between @bs and @base. The caller must + * ensure that all links are frozen before using this function. + * @base must be reachable from @bs, or NULL. + */ +void bdrv_unfreeze_backing_chain(BlockDriverState *bs, BlockDriverState *base) +{ + BlockDriverState *i; + + for (i = bs; i != base; i = backing_bs(i)) { + if (i->backing) { + assert(i->backing->frozen); + i->backing->frozen = false; + } + } +} + +/* * Drops images above 'base' up to and including 'top', and sets the image * above 'top' to have base as its backing file. * @@ -3977,6 +4329,14 @@ int bdrv_drop_intermediate(BlockDriverState *top, BlockDriverState *base, goto exit; } + /* This function changes all links that point to top and makes + * them point to base. Check that none of them is frozen. */ + QLIST_FOREACH(c, &top->parents, next_parent) { + if (c->frozen) { + goto exit; + } + } + /* If 'base' recursively inherits from 'top' then we should set * base->inherits_from to top->inherits_from after 'top' and all * other intermediate nodes have been dropped. @@ -3998,11 +4358,10 @@ int bdrv_drop_intermediate(BlockDriverState *top, BlockDriverState *base, QLIST_FOREACH_SAFE(c, &top->parents, next_parent, next) { /* Check whether we are allowed to switch c from top to base */ GSList *ignore_children = g_slist_prepend(NULL, c); - bdrv_check_update_perm(base, NULL, c->perm, c->shared_perm, - ignore_children, &local_err); + ret = bdrv_check_update_perm(base, NULL, c->perm, c->shared_perm, + ignore_children, &local_err); g_slist_free(ignore_children); - if (local_err) { - ret = -EPERM; + if (ret < 0) { error_report_err(local_err); goto exit; } @@ -5313,10 +5672,6 @@ void bdrv_detach_aio_context(BlockDriverState *bs) BdrvAioNotifier *baf, *baf_tmp; BdrvChild *child; - if (!bs->drv) { - return; - } - assert(!bs->walking_aio_notifiers); bs->walking_aio_notifiers = true; QLIST_FOREACH_SAFE(baf, &bs->aio_notifiers, list, baf_tmp) { @@ -5331,7 +5686,7 @@ void bdrv_detach_aio_context(BlockDriverState *bs) */ bs->walking_aio_notifiers = false; - if (bs->drv->bdrv_detach_aio_context) { + if (bs->drv && bs->drv->bdrv_detach_aio_context) { bs->drv->bdrv_detach_aio_context(bs); } QLIST_FOREACH(child, &bs->children, next) { @@ -5350,10 +5705,6 @@ void bdrv_attach_aio_context(BlockDriverState *bs, BdrvAioNotifier *ban, *ban_tmp; BdrvChild *child; - if (!bs->drv) { - return; - } - if (bs->quiesce_counter) { aio_disable_external(new_context); } @@ -5363,7 +5714,7 @@ void bdrv_attach_aio_context(BlockDriverState *bs, QLIST_FOREACH(child, &bs->children, next) { bdrv_attach_aio_context(child->bs, new_context); } - if (bs->drv->bdrv_attach_aio_context) { + if (bs->drv && bs->drv->bdrv_attach_aio_context) { bs->drv->bdrv_attach_aio_context(bs, new_context); } diff --git a/block/backup.c b/block/backup.c index 9988753249..910ed764aa 100644 --- a/block/backup.c +++ b/block/backup.c @@ -107,7 +107,6 @@ static int coroutine_fn backup_cow_with_bounce_buffer(BackupBlockJob *job, void **bounce_buffer) { int ret; - QEMUIOVector qiov; BlockBackend *blk = job->common.blk; int nbytes; int read_flags = is_write_notifier ? BDRV_REQ_NO_SERIALISING : 0; @@ -118,9 +117,8 @@ static int coroutine_fn backup_cow_with_bounce_buffer(BackupBlockJob *job, if (!*bounce_buffer) { *bounce_buffer = blk_blockalign(blk, job->cluster_size); } - qemu_iovec_init_buf(&qiov, *bounce_buffer, nbytes); - ret = blk_co_preadv(blk, start, qiov.size, &qiov, read_flags); + ret = blk_co_pread(blk, start, nbytes, *bounce_buffer, read_flags); if (ret < 0) { trace_backup_do_cow_read_fail(job, start, ret); if (error_is_read) { @@ -129,13 +127,13 @@ static int coroutine_fn backup_cow_with_bounce_buffer(BackupBlockJob *job, goto fail; } - if (qemu_iovec_is_zero(&qiov)) { + if (buffer_is_zero(*bounce_buffer, nbytes)) { ret = blk_co_pwrite_zeroes(job->target, start, - qiov.size, write_flags | BDRV_REQ_MAY_UNMAP); + nbytes, write_flags | BDRV_REQ_MAY_UNMAP); } else { - ret = blk_co_pwritev(job->target, start, - qiov.size, &qiov, write_flags | - (job->compress ? BDRV_REQ_WRITE_COMPRESSED : 0)); + ret = blk_co_pwrite(job->target, start, + nbytes, *bounce_buffer, write_flags | + (job->compress ? BDRV_REQ_WRITE_COMPRESSED : 0)); } if (ret < 0) { trace_backup_do_cow_write_fail(job, start, ret); diff --git a/block/blkdebug.c b/block/blkdebug.c index 1ea835c2b9..efd9441625 100644 --- a/block/blkdebug.c +++ b/block/blkdebug.c @@ -401,7 +401,7 @@ static int blkdebug_open(BlockDriverState *bs, QDict *options, int flags, bs->supported_write_flags = BDRV_REQ_WRITE_UNCHANGED | (BDRV_REQ_FUA & bs->file->bs->supported_write_flags); bs->supported_zero_flags = BDRV_REQ_WRITE_UNCHANGED | - ((BDRV_REQ_FUA | BDRV_REQ_MAY_UNMAP) & + ((BDRV_REQ_FUA | BDRV_REQ_MAY_UNMAP | BDRV_REQ_NO_FALLBACK) & bs->file->bs->supported_zero_flags); ret = -EINVAL; diff --git a/block/block-backend.c b/block/block-backend.c index edad02a0f2..f78e82a707 100644 --- a/block/block-backend.c +++ b/block/block-backend.c @@ -1764,6 +1764,13 @@ int blk_get_flags(BlockBackend *blk) } } +/* Returns the minimum request alignment, in bytes; guaranteed nonzero */ +uint32_t blk_get_request_alignment(BlockBackend *blk) +{ + BlockDriverState *bs = blk_bs(blk); + return bs ? bs->bl.request_alignment : BDRV_SECTOR_SIZE; +} + /* Returns the maximum transfer length, in bytes; guaranteed nonzero */ uint32_t blk_get_max_transfer(BlockBackend *blk) { diff --git a/block/commit.c b/block/commit.c index 3b46ca7f97..27537d995b 100644 --- a/block/commit.c +++ b/block/commit.c @@ -39,6 +39,7 @@ typedef struct CommitBlockJob { BlockDriverState *base_bs; BlockdevOnError on_error; bool base_read_only; + bool chain_frozen; char *backing_file_str; } CommitBlockJob; @@ -47,16 +48,15 @@ static int coroutine_fn commit_populate(BlockBackend *bs, BlockBackend *base, void *buf) { int ret = 0; - QEMUIOVector qiov = QEMU_IOVEC_INIT_BUF(qiov, buf, bytes); assert(bytes < SIZE_MAX); - ret = blk_co_preadv(bs, offset, qiov.size, &qiov, 0); + ret = blk_co_pread(bs, offset, bytes, buf, 0); if (ret < 0) { return ret; } - ret = blk_co_pwritev(base, offset, qiov.size, &qiov, 0); + ret = blk_co_pwrite(base, offset, bytes, buf, 0); if (ret < 0) { return ret; } @@ -68,6 +68,9 @@ static int commit_prepare(Job *job) { CommitBlockJob *s = container_of(job, CommitBlockJob, common.job); + bdrv_unfreeze_backing_chain(s->commit_top_bs, s->base_bs); + s->chain_frozen = false; + /* Remove base node parent that still uses BLK_PERM_WRITE/RESIZE before * the normal backing chain can be restored. */ blk_unref(s->base); @@ -84,6 +87,10 @@ static void commit_abort(Job *job) CommitBlockJob *s = container_of(job, CommitBlockJob, common.job); BlockDriverState *top_bs = blk_bs(s->top); + if (s->chain_frozen) { + bdrv_unfreeze_backing_chain(s->commit_top_bs, s->base_bs); + } + /* Make sure commit_top_bs and top stay around until bdrv_replace_node() */ bdrv_ref(top_bs); bdrv_ref(s->commit_top_bs); @@ -330,6 +337,11 @@ void commit_start(const char *job_id, BlockDriverState *bs, } } + if (bdrv_freeze_backing_chain(commit_top_bs, base, errp) < 0) { + goto fail; + } + s->chain_frozen = true; + ret = block_job_add_bdrv(&s->common, "base", base, 0, BLK_PERM_ALL, errp); if (ret < 0) { goto fail; @@ -362,12 +374,18 @@ void commit_start(const char *job_id, BlockDriverState *bs, return; fail: + if (s->chain_frozen) { + bdrv_unfreeze_backing_chain(commit_top_bs, base); + } if (s->base) { blk_unref(s->base); } if (s->top) { blk_unref(s->top); } + if (s->base_read_only) { + bdrv_reopen_set_read_only(base, true, NULL); + } job_early_fail(&s->common.job); /* commit_top_bs has to be replaced after deleting the block job, * otherwise this would fail because of lack of permissions. */ diff --git a/block/copy-on-read.c b/block/copy-on-read.c index 64dcc424b5..53972b1da3 100644 --- a/block/copy-on-read.c +++ b/block/copy-on-read.c @@ -34,12 +34,11 @@ static int cor_open(BlockDriverState *bs, QDict *options, int flags, } bs->supported_write_flags = BDRV_REQ_WRITE_UNCHANGED | - (BDRV_REQ_FUA & - bs->file->bs->supported_write_flags); + (BDRV_REQ_FUA & bs->file->bs->supported_write_flags); bs->supported_zero_flags = BDRV_REQ_WRITE_UNCHANGED | - ((BDRV_REQ_FUA | BDRV_REQ_MAY_UNMAP) & - bs->file->bs->supported_zero_flags); + ((BDRV_REQ_FUA | BDRV_REQ_MAY_UNMAP | BDRV_REQ_NO_FALLBACK) & + bs->file->bs->supported_zero_flags); return 0; } @@ -134,7 +133,7 @@ static bool cor_recurse_is_first_non_filter(BlockDriverState *bs, } -BlockDriver bdrv_copy_on_read = { +static BlockDriver bdrv_copy_on_read = { .format_name = "copy-on-read", .bdrv_open = cor_open, diff --git a/block/crypto.c b/block/crypto.c index fd8c7cfac6..3af46b805f 100644 --- a/block/crypto.c +++ b/block/crypto.c @@ -625,7 +625,7 @@ static const char *const block_crypto_strong_runtime_opts[] = { NULL }; -BlockDriver bdrv_crypto_luks = { +static BlockDriver bdrv_crypto_luks = { .format_name = "luks", .instance_size = sizeof(BlockCrypto), .bdrv_probe = block_crypto_probe_luks, diff --git a/block/dirty-bitmap.c b/block/dirty-bitmap.c index c6d4acebfa..59e6ebb861 100644 --- a/block/dirty-bitmap.c +++ b/block/dirty-bitmap.c @@ -28,29 +28,12 @@ #include "block/block_int.h" #include "block/blockjob.h" -/** - * A BdrvDirtyBitmap can be in four possible user-visible states: - * (1) Active: successor is NULL, and disabled is false: full r/w mode - * (2) Disabled: successor is NULL, and disabled is true: qualified r/w mode, - * guest writes are dropped, but monitor writes are possible, - * through commands like merge and clear. - * (3) Frozen: successor is not NULL. - * A frozen bitmap cannot be renamed, deleted, cleared, set, - * enabled, merged to, etc. A frozen bitmap can only abdicate() - * or reclaim(). - * In this state, the anonymous successor bitmap may be either - * Active and recording writes from the guest (e.g. backup jobs), - * but it can be Disabled and not recording writes. - * (4) Locked: Whether Active or Disabled, the user cannot modify this bitmap - * in any way from the monitor. - */ struct BdrvDirtyBitmap { QemuMutex *mutex; HBitmap *bitmap; /* Dirty bitmap implementation */ HBitmap *meta; /* Meta dirty bitmap */ - bool qmp_locked; /* Bitmap is locked, it can't be modified - through QMP */ - BdrvDirtyBitmap *successor; /* Anonymous child; implies frozen status */ + bool busy; /* Bitmap is busy, it can't be used via QMP */ + BdrvDirtyBitmap *successor; /* Anonymous child, if any. */ char *name; /* Optional non-empty unique ID */ int64_t size; /* Size of the bitmap, in bytes */ bool disabled; /* Bitmap is disabled. It ignores all writes to @@ -63,6 +46,9 @@ struct BdrvDirtyBitmap { and this bitmap must remain unchanged while this flag is set. */ bool persistent; /* bitmap must be saved to owner disk image */ + bool inconsistent; /* bitmap is persistent, but inconsistent. + It cannot be used at all in any way, except + a QMP user can remove it. */ bool migration; /* Bitmap is selected for migration, it should not be stored on the next inactivation (persistent flag doesn't matter until next @@ -183,41 +169,58 @@ const char *bdrv_dirty_bitmap_name(const BdrvDirtyBitmap *bitmap) } /* Called with BQL taken. */ -bool bdrv_dirty_bitmap_frozen(BdrvDirtyBitmap *bitmap) +bool bdrv_dirty_bitmap_has_successor(BdrvDirtyBitmap *bitmap) { return bitmap->successor; } -/* Both conditions disallow user-modification via QMP. */ -bool bdrv_dirty_bitmap_user_locked(BdrvDirtyBitmap *bitmap) { - return bdrv_dirty_bitmap_frozen(bitmap) || - bdrv_dirty_bitmap_qmp_locked(bitmap); +static bool bdrv_dirty_bitmap_busy(const BdrvDirtyBitmap *bitmap) +{ + return bitmap->busy; } -void bdrv_dirty_bitmap_set_qmp_locked(BdrvDirtyBitmap *bitmap, bool qmp_locked) +void bdrv_dirty_bitmap_set_busy(BdrvDirtyBitmap *bitmap, bool busy) { qemu_mutex_lock(bitmap->mutex); - bitmap->qmp_locked = qmp_locked; + bitmap->busy = busy; qemu_mutex_unlock(bitmap->mutex); } -bool bdrv_dirty_bitmap_qmp_locked(BdrvDirtyBitmap *bitmap) -{ - return bitmap->qmp_locked; -} - /* Called with BQL taken. */ bool bdrv_dirty_bitmap_enabled(BdrvDirtyBitmap *bitmap) { - return !(bitmap->disabled || bitmap->successor); + return !bitmap->disabled; } -/* Called with BQL taken. */ +/** + * bdrv_dirty_bitmap_status: This API is now deprecated. + * Called with BQL taken. + * + * A BdrvDirtyBitmap can be in four possible user-visible states: + * (1) Active: successor is NULL, and disabled is false: full r/w mode + * (2) Disabled: successor is NULL, and disabled is true: qualified r/w mode, + * guest writes are dropped, but monitor writes are possible, + * through commands like merge and clear. + * (3) Frozen: successor is not NULL. + * A frozen bitmap cannot be renamed, deleted, cleared, set, + * enabled, merged to, etc. A frozen bitmap can only abdicate() + * or reclaim(). + * In this state, the anonymous successor bitmap may be either + * Active and recording writes from the guest (e.g. backup jobs), + * or it can be Disabled and not recording writes. + * (4) Locked: Whether Active or Disabled, the user cannot modify this bitmap + * in any way from the monitor. + * (5) Inconsistent: This is a persistent bitmap whose "in use" bit is set, and + * is unusable by QEMU. It can be deleted to remove it from + * the qcow2. + */ DirtyBitmapStatus bdrv_dirty_bitmap_status(BdrvDirtyBitmap *bitmap) { - if (bdrv_dirty_bitmap_frozen(bitmap)) { + if (bdrv_dirty_bitmap_inconsistent(bitmap)) { + return DIRTY_BITMAP_STATUS_INCONSISTENT; + } else if (bdrv_dirty_bitmap_has_successor(bitmap)) { return DIRTY_BITMAP_STATUS_FROZEN; - } else if (bdrv_dirty_bitmap_qmp_locked(bitmap)) { + } else if (bdrv_dirty_bitmap_busy(bitmap)) { return DIRTY_BITMAP_STATUS_LOCKED; } else if (!bdrv_dirty_bitmap_enabled(bitmap)) { return DIRTY_BITMAP_STATUS_DISABLED; @@ -226,9 +229,44 @@ DirtyBitmapStatus bdrv_dirty_bitmap_status(BdrvDirtyBitmap *bitmap) } } +/* Called with BQL taken. */ +static bool bdrv_dirty_bitmap_recording(BdrvDirtyBitmap *bitmap) +{ + return !bitmap->disabled || (bitmap->successor && + !bitmap->successor->disabled); +} + +int bdrv_dirty_bitmap_check(const BdrvDirtyBitmap *bitmap, uint32_t flags, + Error **errp) +{ + if ((flags & BDRV_BITMAP_BUSY) && bdrv_dirty_bitmap_busy(bitmap)) { + error_setg(errp, "Bitmap '%s' is currently in use by another" + " operation and cannot be used", bitmap->name); + return -1; + } + + if ((flags & BDRV_BITMAP_RO) && bdrv_dirty_bitmap_readonly(bitmap)) { + error_setg(errp, "Bitmap '%s' is readonly and cannot be modified", + bitmap->name); + return -1; + } + + if ((flags & BDRV_BITMAP_INCONSISTENT) && + bdrv_dirty_bitmap_inconsistent(bitmap)) { + error_setg(errp, "Bitmap '%s' is inconsistent and cannot be used", + bitmap->name); + error_append_hint(errp, "Try block-dirty-bitmap-remove to delete" + " this bitmap from disk"); + return -1; + } + + return 0; +} + /** * Create a successor bitmap destined to replace this bitmap after an operation. - * Requires that the bitmap is not frozen and has no successor. + * Requires that the bitmap is not marked busy and has no successor. + * The successor will be enabled if the parent bitmap was. * Called with BQL taken. */ int bdrv_dirty_bitmap_create_successor(BlockDriverState *bs, @@ -237,12 +275,14 @@ int bdrv_dirty_bitmap_create_successor(BlockDriverState *bs, uint64_t granularity; BdrvDirtyBitmap *child; - if (bdrv_dirty_bitmap_frozen(bitmap)) { - error_setg(errp, "Cannot create a successor for a bitmap that is " - "currently frozen"); + if (bdrv_dirty_bitmap_check(bitmap, BDRV_BITMAP_BUSY, errp)) { + return -1; + } + if (bdrv_dirty_bitmap_has_successor(bitmap)) { + error_setg(errp, "Cannot create a successor for a bitmap that already " + "has one"); return -1; } - assert(!bitmap->successor); /* Create an anonymous successor */ granularity = bdrv_dirty_bitmap_granularity(bitmap); @@ -253,15 +293,16 @@ int bdrv_dirty_bitmap_create_successor(BlockDriverState *bs, /* Successor will be on or off based on our current state. */ child->disabled = bitmap->disabled; + bitmap->disabled = true; - /* Install the successor and freeze the parent */ + /* Install the successor and mark the parent as busy */ bitmap->successor = child; + bitmap->busy = true; return 0; } void bdrv_enable_dirty_bitmap_locked(BdrvDirtyBitmap *bitmap) { - assert(!bdrv_dirty_bitmap_frozen(bitmap)); bitmap->disabled = false; } @@ -278,7 +319,8 @@ void bdrv_dirty_bitmap_enable_successor(BdrvDirtyBitmap *bitmap) static void bdrv_release_dirty_bitmap_locked(BdrvDirtyBitmap *bitmap) { assert(!bitmap->active_iterators); - assert(!bdrv_dirty_bitmap_frozen(bitmap)); + assert(!bdrv_dirty_bitmap_busy(bitmap)); + assert(!bdrv_dirty_bitmap_has_successor(bitmap)); assert(!bitmap->meta); QLIST_REMOVE(bitmap, list); hbitmap_free(bitmap->bitmap); @@ -310,6 +352,7 @@ BdrvDirtyBitmap *bdrv_dirty_bitmap_abdicate(BlockDriverState *bs, bitmap->successor = NULL; successor->persistent = bitmap->persistent; bitmap->persistent = false; + bitmap->busy = false; bdrv_release_dirty_bitmap(bs, bitmap); return successor; @@ -318,7 +361,8 @@ BdrvDirtyBitmap *bdrv_dirty_bitmap_abdicate(BlockDriverState *bs, /** * In cases of failure where we can no longer safely delete the parent, * we may wish to re-join the parent and child/successor. - * The merged parent will be un-frozen, but not explicitly re-enabled. + * The merged parent will be marked as not busy. + * The marged parent will be enabled if and only if the successor was enabled. * Called within bdrv_dirty_bitmap_lock..unlock and with BQL taken. */ BdrvDirtyBitmap *bdrv_reclaim_dirty_bitmap_locked(BlockDriverState *bs, @@ -336,6 +380,9 @@ BdrvDirtyBitmap *bdrv_reclaim_dirty_bitmap_locked(BlockDriverState *bs, error_setg(errp, "Merging of parent and successor bitmap failed"); return NULL; } + + parent->disabled = successor->disabled; + parent->busy = false; bdrv_release_dirty_bitmap_locked(successor); parent->successor = NULL; @@ -366,7 +413,8 @@ void bdrv_dirty_bitmap_truncate(BlockDriverState *bs, int64_t bytes) bdrv_dirty_bitmaps_lock(bs); QLIST_FOREACH(bitmap, &bs->dirty_bitmaps, list) { - assert(!bdrv_dirty_bitmap_frozen(bitmap)); + assert(!bdrv_dirty_bitmap_busy(bitmap)); + assert(!bdrv_dirty_bitmap_has_successor(bitmap)); assert(!bitmap->active_iterators); hbitmap_truncate(bitmap->bitmap, bytes); bitmap->size = bytes; @@ -384,7 +432,7 @@ void bdrv_release_dirty_bitmap(BlockDriverState *bs, BdrvDirtyBitmap *bitmap) /** * Release all named dirty bitmaps attached to a BDS (for use in bdrv_close()). - * There must not be any frozen bitmaps attached. + * There must not be any busy bitmaps attached. * This function does not remove persistent bitmaps from the storage. * Called with BQL taken. */ @@ -421,7 +469,6 @@ void bdrv_remove_persistent_dirty_bitmap(BlockDriverState *bs, void bdrv_disable_dirty_bitmap(BdrvDirtyBitmap *bitmap) { bdrv_dirty_bitmap_lock(bitmap); - assert(!bdrv_dirty_bitmap_frozen(bitmap)); bitmap->disabled = true; bdrv_dirty_bitmap_unlock(bitmap); } @@ -448,7 +495,11 @@ BlockDirtyInfoList *bdrv_query_dirty_bitmaps(BlockDriverState *bs) info->has_name = !!bm->name; info->name = g_strdup(bm->name); info->status = bdrv_dirty_bitmap_status(bm); + info->recording = bdrv_dirty_bitmap_recording(bm); + info->busy = bdrv_dirty_bitmap_busy(bm); info->persistent = bm->persistent; + info->has_inconsistent = bm->inconsistent; + info->inconsistent = bm->inconsistent; entry->value = info; *plist = entry; plist = &entry->next; @@ -531,7 +582,6 @@ int64_t bdrv_dirty_iter_next(BdrvDirtyBitmapIter *iter) void bdrv_set_dirty_bitmap_locked(BdrvDirtyBitmap *bitmap, int64_t offset, int64_t bytes) { - assert(bdrv_dirty_bitmap_enabled(bitmap)); assert(!bdrv_dirty_bitmap_readonly(bitmap)); hbitmap_set(bitmap->bitmap, offset, bytes); } @@ -548,7 +598,6 @@ void bdrv_set_dirty_bitmap(BdrvDirtyBitmap *bitmap, void bdrv_reset_dirty_bitmap_locked(BdrvDirtyBitmap *bitmap, int64_t offset, int64_t bytes) { - assert(bdrv_dirty_bitmap_enabled(bitmap)); assert(!bdrv_dirty_bitmap_readonly(bitmap)); hbitmap_reset(bitmap->bitmap, offset, bytes); } @@ -691,7 +740,7 @@ bool bdrv_has_readonly_bitmaps(BlockDriverState *bs) } /* Called with BQL taken. */ -void bdrv_dirty_bitmap_set_persistance(BdrvDirtyBitmap *bitmap, bool persistent) +void bdrv_dirty_bitmap_set_persistence(BdrvDirtyBitmap *bitmap, bool persistent) { qemu_mutex_lock(bitmap->mutex); bitmap->persistent = persistent; @@ -699,6 +748,16 @@ void bdrv_dirty_bitmap_set_persistance(BdrvDirtyBitmap *bitmap, bool persistent) } /* Called with BQL taken. */ +void bdrv_dirty_bitmap_set_inconsistent(BdrvDirtyBitmap *bitmap) +{ + qemu_mutex_lock(bitmap->mutex); + assert(bitmap->persistent == true); + bitmap->inconsistent = true; + bitmap->disabled = true; + qemu_mutex_unlock(bitmap->mutex); +} + +/* Called with BQL taken. */ void bdrv_dirty_bitmap_set_migration(BdrvDirtyBitmap *bitmap, bool migration) { qemu_mutex_lock(bitmap->mutex); @@ -706,11 +765,16 @@ void bdrv_dirty_bitmap_set_migration(BdrvDirtyBitmap *bitmap, bool migration) qemu_mutex_unlock(bitmap->mutex); } -bool bdrv_dirty_bitmap_get_persistance(BdrvDirtyBitmap *bitmap) +bool bdrv_dirty_bitmap_get_persistence(BdrvDirtyBitmap *bitmap) { return bitmap->persistent && !bitmap->migration; } +bool bdrv_dirty_bitmap_inconsistent(const BdrvDirtyBitmap *bitmap) +{ + return bitmap->inconsistent; +} + bool bdrv_has_changed_persistent_bitmaps(BlockDriverState *bs) { BdrvDirtyBitmap *bm; @@ -757,15 +821,11 @@ void bdrv_merge_dirty_bitmap(BdrvDirtyBitmap *dest, const BdrvDirtyBitmap *src, qemu_mutex_lock(dest->mutex); - if (bdrv_dirty_bitmap_user_locked(dest)) { - error_setg(errp, "Bitmap '%s' is currently in use by another" - " operation and cannot be modified", dest->name); + if (bdrv_dirty_bitmap_check(dest, BDRV_BITMAP_DEFAULT, errp)) { goto out; } - if (bdrv_dirty_bitmap_readonly(dest)) { - error_setg(errp, "Bitmap '%s' is readonly and cannot be modified", - dest->name); + if (bdrv_dirty_bitmap_check(src, BDRV_BITMAP_ALLOW_RO, errp)) { goto out; } diff --git a/block/file-posix.c b/block/file-posix.c index ba6ab62a38..1cf4ee49eb 100644 --- a/block/file-posix.c +++ b/block/file-posix.c @@ -144,6 +144,9 @@ typedef struct BDRVRawState { uint64_t locked_perm; uint64_t locked_shared_perm; + int perm_change_fd; + BDRVReopenState *reopen_state; + #ifdef CONFIG_XFS bool is_xfs:1; #endif @@ -154,6 +157,7 @@ typedef struct BDRVRawState { bool page_cache_inconsistent:1; bool has_fallocate; bool needs_alignment; + bool drop_cache; bool check_cache_dropped; PRManager *pr_mgr; @@ -162,6 +166,7 @@ typedef struct BDRVRawState { typedef struct BDRVRawReopenState { int fd; int open_flags; + bool drop_cache; bool check_cache_dropped; } BDRVRawReopenState; @@ -373,13 +378,21 @@ static void raw_probe_alignment(BlockDriverState *bs, int fd, Error **errp) } } -static void raw_parse_flags(int bdrv_flags, int *open_flags) +static void raw_parse_flags(int bdrv_flags, int *open_flags, bool has_writers) { + bool read_write = false; assert(open_flags != NULL); *open_flags |= O_BINARY; *open_flags &= ~O_ACCMODE; - if (bdrv_flags & BDRV_O_RDWR) { + + if (bdrv_flags & BDRV_O_AUTO_RDONLY) { + read_write = has_writers; + } else if (bdrv_flags & BDRV_O_RDWR) { + read_write = true; + } + + if (read_write) { *open_flags |= O_RDWR; } else { *open_flags |= O_RDONLY; @@ -422,6 +435,13 @@ static QemuOptsList raw_runtime_opts = { .type = QEMU_OPT_STRING, .help = "id of persistent reservation manager object (default: none)", }, +#if defined(__linux__) + { + .name = "drop-cache", + .type = QEMU_OPT_BOOL, + .help = "invalidate page cache during live migration (default: on)", + }, +#endif { .name = "x-check-cache-dropped", .type = QEMU_OPT_BOOL, @@ -431,6 +451,8 @@ static QemuOptsList raw_runtime_opts = { }, }; +static const char *const mutable_opts[] = { "x-check-cache-dropped", NULL }; + static int raw_open_common(BlockDriverState *bs, QDict *options, int bdrv_flags, int open_flags, bool device, Error **errp) @@ -511,28 +533,17 @@ static int raw_open_common(BlockDriverState *bs, QDict *options, } } + s->drop_cache = qemu_opt_get_bool(opts, "drop-cache", true); s->check_cache_dropped = qemu_opt_get_bool(opts, "x-check-cache-dropped", false); s->open_flags = open_flags; - raw_parse_flags(bdrv_flags, &s->open_flags); + raw_parse_flags(bdrv_flags, &s->open_flags, false); s->fd = -1; fd = qemu_open(filename, s->open_flags, 0644); ret = fd < 0 ? -errno : 0; - if (ret == -EACCES || ret == -EROFS) { - /* Try to degrade to read-only, but if it doesn't work, still use the - * normal error message. */ - if (bdrv_apply_auto_read_only(bs, NULL, NULL) == 0) { - bdrv_flags &= ~BDRV_O_RDWR; - raw_parse_flags(bdrv_flags, &s->open_flags); - assert(!(s->open_flags & O_CREAT)); - fd = qemu_open(filename, s->open_flags); - ret = fd < 0 ? -errno : 0; - } - } - if (ret < 0) { error_setg_errno(errp, -ret, "Could not open '%s'", filename); if (ret == -EROFS) { @@ -641,7 +652,7 @@ static int raw_open_common(BlockDriverState *bs, QDict *options, } #endif - bs->supported_zero_flags = BDRV_REQ_MAY_UNMAP; + bs->supported_zero_flags = BDRV_REQ_MAY_UNMAP | BDRV_REQ_NO_FALLBACK; ret = 0; fail: if (filename && (bdrv_flags & BDRV_O_TEMPORARY)) { @@ -804,6 +815,18 @@ static int raw_handle_perm_lock(BlockDriverState *bs, switch (op) { case RAW_PL_PREPARE: + if ((s->perm | new_perm) == s->perm && + (s->shared_perm & new_shared) == s->shared_perm) + { + /* + * We are going to unlock bytes, it should not fail. If it fail due + * to some fs-dependent permission-unrelated reasons (which occurs + * sometimes on NFS and leads to abort in bdrv_replace_child) we + * can't prevent such errors by any check here. And we ignore them + * anyway in ABORT and COMMIT. + */ + return 0; + } ret = raw_apply_lock_bytes(s, s->fd, s->perm | new_perm, ~s->shared_perm | ~new_shared, false, errp); @@ -842,13 +865,77 @@ static int raw_handle_perm_lock(BlockDriverState *bs, return ret; } +static int raw_reconfigure_getfd(BlockDriverState *bs, int flags, + int *open_flags, uint64_t perm, bool force_dup, + Error **errp) +{ + BDRVRawState *s = bs->opaque; + int fd = -1; + int ret; + bool has_writers = perm & + (BLK_PERM_WRITE | BLK_PERM_WRITE_UNCHANGED | BLK_PERM_RESIZE); + int fcntl_flags = O_APPEND | O_NONBLOCK; +#ifdef O_NOATIME + fcntl_flags |= O_NOATIME; +#endif + + *open_flags = 0; + if (s->type == FTYPE_CD) { + *open_flags |= O_NONBLOCK; + } + + raw_parse_flags(flags, open_flags, has_writers); + +#ifdef O_ASYNC + /* Not all operating systems have O_ASYNC, and those that don't + * will not let us track the state into rs->open_flags (typically + * you achieve the same effect with an ioctl, for example I_SETSIG + * on Solaris). But we do not use O_ASYNC, so that's fine. + */ + assert((s->open_flags & O_ASYNC) == 0); +#endif + + if (!force_dup && *open_flags == s->open_flags) { + /* We're lucky, the existing fd is fine */ + return s->fd; + } + + if ((*open_flags & ~fcntl_flags) == (s->open_flags & ~fcntl_flags)) { + /* dup the original fd */ + fd = qemu_dup(s->fd); + if (fd >= 0) { + ret = fcntl_setfl(fd, *open_flags); + if (ret) { + qemu_close(fd); + fd = -1; + } + } + } + + /* If we cannot use fcntl, or fcntl failed, fall back to qemu_open() */ + if (fd == -1) { + const char *normalized_filename = bs->filename; + ret = raw_normalize_devicepath(&normalized_filename, errp); + if (ret >= 0) { + assert(!(*open_flags & O_CREAT)); + fd = qemu_open(normalized_filename, *open_flags); + if (fd == -1) { + error_setg_errno(errp, errno, "Could not reopen file"); + return -1; + } + } + } + + return fd; +} + static int raw_reopen_prepare(BDRVReopenState *state, BlockReopenQueue *queue, Error **errp) { BDRVRawState *s; BDRVRawReopenState *rs; QemuOpts *opts; - int ret = 0; + int ret; Error *local_err = NULL; assert(state != NULL); @@ -858,7 +945,6 @@ static int raw_reopen_prepare(BDRVReopenState *state, state->opaque = g_new0(BDRVRawReopenState, 1); rs = state->opaque; - rs->fd = -1; /* Handle options changes */ opts = qemu_opts_create(&raw_runtime_opts, NULL, 0, &error_abort); @@ -869,6 +955,7 @@ static int raw_reopen_prepare(BDRVReopenState *state, goto out; } + rs->drop_cache = qemu_opt_get_bool_del(opts, "drop-cache", true); rs->check_cache_dropped = qemu_opt_get_bool_del(opts, "x-check-cache-dropped", false); @@ -877,50 +964,12 @@ static int raw_reopen_prepare(BDRVReopenState *state, * bdrv_reopen_prepare() will detect changes and complain. */ qemu_opts_to_qdict(opts, state->options); - if (s->type == FTYPE_CD) { - rs->open_flags |= O_NONBLOCK; - } - - raw_parse_flags(state->flags, &rs->open_flags); - - int fcntl_flags = O_APPEND | O_NONBLOCK; -#ifdef O_NOATIME - fcntl_flags |= O_NOATIME; -#endif - -#ifdef O_ASYNC - /* Not all operating systems have O_ASYNC, and those that don't - * will not let us track the state into rs->open_flags (typically - * you achieve the same effect with an ioctl, for example I_SETSIG - * on Solaris). But we do not use O_ASYNC, so that's fine. - */ - assert((s->open_flags & O_ASYNC) == 0); -#endif - - if ((rs->open_flags & ~fcntl_flags) == (s->open_flags & ~fcntl_flags)) { - /* dup the original fd */ - rs->fd = qemu_dup(s->fd); - if (rs->fd >= 0) { - ret = fcntl_setfl(rs->fd, rs->open_flags); - if (ret) { - qemu_close(rs->fd); - rs->fd = -1; - } - } - } - - /* If we cannot use fcntl, or fcntl failed, fall back to qemu_open() */ - if (rs->fd == -1) { - const char *normalized_filename = state->bs->filename; - ret = raw_normalize_devicepath(&normalized_filename, errp); - if (ret >= 0) { - assert(!(rs->open_flags & O_CREAT)); - rs->fd = qemu_open(normalized_filename, rs->open_flags); - if (rs->fd == -1) { - error_setg_errno(errp, errno, "Could not reopen file"); - ret = -1; - } - } + rs->fd = raw_reconfigure_getfd(state->bs, state->flags, &rs->open_flags, + state->perm, true, &local_err); + if (local_err) { + error_propagate(errp, local_err); + ret = -1; + goto out; } /* Fail already reopen_prepare() if we can't get a working O_DIRECT @@ -928,13 +977,19 @@ static int raw_reopen_prepare(BDRVReopenState *state, if (rs->fd != -1) { raw_probe_alignment(state->bs, rs->fd, &local_err); if (local_err) { - qemu_close(rs->fd); - rs->fd = -1; error_propagate(errp, local_err); ret = -EINVAL; + goto out_fd; } } + s->reopen_state = state; + ret = 0; +out_fd: + if (ret < 0) { + qemu_close(rs->fd); + rs->fd = -1; + } out: qemu_opts_del(opts); return ret; @@ -944,29 +999,26 @@ static void raw_reopen_commit(BDRVReopenState *state) { BDRVRawReopenState *rs = state->opaque; BDRVRawState *s = state->bs->opaque; - Error *local_err = NULL; + s->drop_cache = rs->drop_cache; s->check_cache_dropped = rs->check_cache_dropped; s->open_flags = rs->open_flags; - /* Copy locks to the new fd before closing the old one. */ - raw_apply_lock_bytes(NULL, rs->fd, s->locked_perm, - s->locked_shared_perm, false, &local_err); - if (local_err) { - /* shouldn't fail in a sane host, but report it just in case. */ - error_report_err(local_err); - } qemu_close(s->fd); s->fd = rs->fd; g_free(state->opaque); state->opaque = NULL; + + assert(s->reopen_state == state); + s->reopen_state = NULL; } static void raw_reopen_abort(BDRVReopenState *state) { BDRVRawReopenState *rs = state->opaque; + BDRVRawState *s = state->bs->opaque; /* nothing to do if NULL, we didn't get far enough */ if (rs == NULL) { @@ -979,6 +1031,9 @@ static void raw_reopen_abort(BDRVReopenState *state) } g_free(state->opaque); state->opaque = NULL; + + assert(s->reopen_state == state); + s->reopen_state = NULL; } static int hdev_get_max_transfer_length(BlockDriverState *bs, int fd) @@ -1457,14 +1512,19 @@ static ssize_t handle_aiocb_write_zeroes_block(RawPosixAIOData *aiocb) } #ifdef BLKZEROOUT - do { - uint64_t range[2] = { aiocb->aio_offset, aiocb->aio_nbytes }; - if (ioctl(aiocb->aio_fildes, BLKZEROOUT, range) == 0) { - return 0; - } - } while (errno == EINTR); + /* The BLKZEROOUT implementation in the kernel doesn't set + * BLKDEV_ZERO_NOFALLBACK, so we can't call this if we have to avoid slow + * fallbacks. */ + if (!(aiocb->aio_type & QEMU_AIO_NO_FALLBACK)) { + do { + uint64_t range[2] = { aiocb->aio_offset, aiocb->aio_nbytes }; + if (ioctl(aiocb->aio_fildes, BLKZEROOUT, range) == 0) { + return 0; + } + } while (errno == EINTR); - ret = translate_err(-errno); + ret = translate_err(-errno); + } #endif if (ret == -ENOTSUP) { @@ -2531,6 +2591,10 @@ static void coroutine_fn raw_co_invalidate_cache(BlockDriverState *bs, return; } + if (!s->drop_cache) { + return; + } + if (s->open_flags & O_DIRECT) { return; /* No host kernel page cache */ } @@ -2612,6 +2676,9 @@ raw_do_pwrite_zeroes(BlockDriverState *bs, int64_t offset, int bytes, if (blkdev) { acb.aio_type |= QEMU_AIO_BLKDEV; } + if (flags & BDRV_REQ_NO_FALLBACK) { + acb.aio_type |= QEMU_AIO_NO_FALLBACK; + } if (flags & BDRV_REQ_MAY_UNMAP) { acb.aio_type |= QEMU_AIO_DISCARD; @@ -2664,12 +2731,78 @@ static QemuOptsList raw_create_opts = { static int raw_check_perm(BlockDriverState *bs, uint64_t perm, uint64_t shared, Error **errp) { - return raw_handle_perm_lock(bs, RAW_PL_PREPARE, perm, shared, errp); + BDRVRawState *s = bs->opaque; + BDRVRawReopenState *rs = NULL; + int open_flags; + int ret; + + if (s->perm_change_fd) { + /* + * In the context of reopen, this function may be called several times + * (directly and recursively while change permissions of the parent). + * This is even true for children that don't inherit from the original + * reopen node, so s->reopen_state is not set. + * + * Ignore all but the first call. + */ + return 0; + } + + if (s->reopen_state) { + /* We already have a new file descriptor to set permissions for */ + assert(s->reopen_state->perm == perm); + assert(s->reopen_state->shared_perm == shared); + rs = s->reopen_state->opaque; + s->perm_change_fd = rs->fd; + } else { + /* We may need a new fd if auto-read-only switches the mode */ + ret = raw_reconfigure_getfd(bs, bs->open_flags, &open_flags, perm, + false, errp); + if (ret < 0) { + return ret; + } else if (ret != s->fd) { + s->perm_change_fd = ret; + } + } + + /* Prepare permissions on old fd to avoid conflicts between old and new, + * but keep everything locked that new will need. */ + ret = raw_handle_perm_lock(bs, RAW_PL_PREPARE, perm, shared, errp); + if (ret < 0) { + goto fail; + } + + /* Copy locks to the new fd */ + if (s->perm_change_fd) { + ret = raw_apply_lock_bytes(NULL, s->perm_change_fd, perm, ~shared, + false, errp); + if (ret < 0) { + raw_handle_perm_lock(bs, RAW_PL_ABORT, 0, 0, NULL); + goto fail; + } + } + return 0; + +fail: + if (s->perm_change_fd && !s->reopen_state) { + qemu_close(s->perm_change_fd); + } + s->perm_change_fd = 0; + return ret; } static void raw_set_perm(BlockDriverState *bs, uint64_t perm, uint64_t shared) { BDRVRawState *s = bs->opaque; + + /* For reopen, we have already switched to the new fd (.bdrv_set_perm is + * called after .bdrv_reopen_commit) */ + if (s->perm_change_fd && s->fd != s->perm_change_fd) { + qemu_close(s->fd); + s->fd = s->perm_change_fd; + } + s->perm_change_fd = 0; + raw_handle_perm_lock(bs, RAW_PL_COMMIT, perm, shared, NULL); s->perm = perm; s->shared_perm = shared; @@ -2677,6 +2810,15 @@ static void raw_set_perm(BlockDriverState *bs, uint64_t perm, uint64_t shared) static void raw_abort_perm_update(BlockDriverState *bs) { + BDRVRawState *s = bs->opaque; + + /* For reopen, .bdrv_reopen_abort is called afterwards and will close + * the file descriptor. */ + if (s->perm_change_fd && !s->reopen_state) { + qemu_close(s->perm_change_fd); + } + s->perm_change_fd = 0; + raw_handle_perm_lock(bs, RAW_PL_ABORT, 0, 0, NULL); } @@ -2766,6 +2908,7 @@ BlockDriver bdrv_file = { .bdrv_set_perm = raw_set_perm, .bdrv_abort_perm_update = raw_abort_perm_update, .create_opts = &raw_create_opts, + .mutable_opts = mutable_opts, }; /***********************************************/ @@ -3217,6 +3360,7 @@ static BlockDriver bdrv_host_device = { .bdrv_reopen_abort = raw_reopen_abort, .bdrv_co_create_opts = hdev_co_create_opts, .create_opts = &raw_create_opts, + .mutable_opts = mutable_opts, .bdrv_co_invalidate_cache = raw_co_invalidate_cache, .bdrv_co_pwrite_zeroes = hdev_co_pwrite_zeroes, @@ -3343,6 +3487,7 @@ static BlockDriver bdrv_host_cdrom = { .bdrv_reopen_abort = raw_reopen_abort, .bdrv_co_create_opts = hdev_co_create_opts, .create_opts = &raw_create_opts, + .mutable_opts = mutable_opts, .bdrv_co_invalidate_cache = raw_co_invalidate_cache, @@ -3476,6 +3621,7 @@ static BlockDriver bdrv_host_cdrom = { .bdrv_reopen_abort = raw_reopen_abort, .bdrv_co_create_opts = hdev_co_create_opts, .create_opts = &raw_create_opts, + .mutable_opts = mutable_opts, .bdrv_co_preadv = raw_co_preadv, .bdrv_co_pwritev = raw_co_pwritev, diff --git a/block/gluster.c b/block/gluster.c index af64330211..e664ca4462 100644 --- a/block/gluster.c +++ b/block/gluster.c @@ -9,6 +9,7 @@ */ #include "qemu/osdep.h" +#include "qemu/units.h" #include <glusterfs/api/glfs.h> #include "block/block_int.h" #include "block/qdict.h" @@ -20,6 +21,10 @@ #include "qemu/option.h" #include "qemu/cutils.h" +#ifdef CONFIG_GLUSTERFS_FTRUNCATE_HAS_STAT +# define glfs_ftruncate(fd, offset) glfs_ftruncate(fd, offset, NULL, NULL) +#endif + #define GLUSTER_OPT_FILENAME "filename" #define GLUSTER_OPT_VOLUME "volume" #define GLUSTER_OPT_PATH "path" @@ -37,6 +42,12 @@ #define GLUSTER_DEBUG_MAX 9 #define GLUSTER_OPT_LOGFILE "logfile" #define GLUSTER_LOGFILE_DEFAULT "-" /* handled in libgfapi as /dev/stderr */ +/* + * Several versions of GlusterFS (3.12? -> 6.0.1) fail when the transfer size + * is greater or equal to 1024 MiB, so we are limiting the transfer size to 512 + * MiB to avoid this rare issue. + */ +#define GLUSTER_MAX_TRANSFER (512 * MiB) #define GERR_INDEX_HINT "hint: check in 'server' array index '%d'\n" @@ -725,7 +736,11 @@ static struct glfs *qemu_gluster_init(BlockdevOptionsGluster *gconf, /* * AIO callback routine called from GlusterFS thread. */ -static void gluster_finish_aiocb(struct glfs_fd *fd, ssize_t ret, void *arg) +static void gluster_finish_aiocb(struct glfs_fd *fd, ssize_t ret, +#ifdef CONFIG_GLUSTERFS_IOCB_HAS_STAT + struct glfs_stat *pre, struct glfs_stat *post, +#endif + void *arg) { GlusterAIOCB *acb = (GlusterAIOCB *)arg; @@ -879,6 +894,11 @@ out: return ret; } +static void qemu_gluster_refresh_limits(BlockDriverState *bs, Error **errp) +{ + bs->bl.max_transfer = GLUSTER_MAX_TRANSFER; +} + static int qemu_gluster_reopen_prepare(BDRVReopenState *state, BlockReopenQueue *queue, Error **errp) { @@ -1536,6 +1556,7 @@ static BlockDriver bdrv_gluster = { .bdrv_co_pwrite_zeroes = qemu_gluster_co_pwrite_zeroes, #endif .bdrv_co_block_status = qemu_gluster_co_block_status, + .bdrv_refresh_limits = qemu_gluster_refresh_limits, .create_opts = &qemu_gluster_create_opts, .strong_runtime_opts = gluster_strong_open_opts, }; @@ -1566,6 +1587,7 @@ static BlockDriver bdrv_gluster_tcp = { .bdrv_co_pwrite_zeroes = qemu_gluster_co_pwrite_zeroes, #endif .bdrv_co_block_status = qemu_gluster_co_block_status, + .bdrv_refresh_limits = qemu_gluster_refresh_limits, .create_opts = &qemu_gluster_create_opts, .strong_runtime_opts = gluster_strong_open_opts, }; @@ -1596,6 +1618,7 @@ static BlockDriver bdrv_gluster_unix = { .bdrv_co_pwrite_zeroes = qemu_gluster_co_pwrite_zeroes, #endif .bdrv_co_block_status = qemu_gluster_co_block_status, + .bdrv_refresh_limits = qemu_gluster_refresh_limits, .create_opts = &qemu_gluster_create_opts, .strong_runtime_opts = gluster_strong_open_opts, }; @@ -1632,6 +1655,7 @@ static BlockDriver bdrv_gluster_rdma = { .bdrv_co_pwrite_zeroes = qemu_gluster_co_pwrite_zeroes, #endif .bdrv_co_block_status = qemu_gluster_co_block_status, + .bdrv_refresh_limits = qemu_gluster_refresh_limits, .create_opts = &qemu_gluster_create_opts, .strong_runtime_opts = gluster_strong_open_opts, }; diff --git a/block/io.c b/block/io.c index 2ba603c7bc..dfc153b8d8 100644 --- a/block/io.c +++ b/block/io.c @@ -909,8 +909,6 @@ int bdrv_make_zero(BdrvChild *child, BdrvRequestFlags flags) } ret = bdrv_block_status(bs, offset, bytes, &bytes, NULL, NULL); if (ret < 0) { - error_report("error getting block status at offset %" PRId64 ": %s", - offset, strerror(-ret)); return ret; } if (ret & BDRV_BLOCK_ZERO) { @@ -919,8 +917,6 @@ int bdrv_make_zero(BdrvChild *child, BdrvRequestFlags flags) } ret = bdrv_pwrite_zeroes(child, offset, bytes, flags); if (ret < 0) { - error_report("error writing zeroes at offset %" PRId64 ": %s", - offset, strerror(-ret)); return ret; } offset += bytes; @@ -1019,6 +1015,7 @@ static int coroutine_fn bdrv_driver_preadv(BlockDriverState *bs, unsigned int nb_sectors; assert(!(flags & ~BDRV_REQ_MASK)); + assert(!(flags & BDRV_REQ_NO_FALLBACK)); if (!drv) { return -ENOMEDIUM; @@ -1065,6 +1062,7 @@ static int coroutine_fn bdrv_driver_pwritev(BlockDriverState *bs, int ret; assert(!(flags & ~BDRV_REQ_MASK)); + assert(!(flags & BDRV_REQ_NO_FALLBACK)); if (!drv) { return -ENOMEDIUM; @@ -1471,6 +1469,10 @@ static int coroutine_fn bdrv_co_do_pwrite_zeroes(BlockDriverState *bs, return -ENOMEDIUM; } + if ((flags & ~bs->supported_zero_flags) & BDRV_REQ_NO_FALLBACK) { + return -ENOTSUP; + } + assert(alignment % bs->bl.request_alignment == 0); head = offset % alignment; tail = (offset + bytes) % alignment; @@ -1514,7 +1516,7 @@ static int coroutine_fn bdrv_co_do_pwrite_zeroes(BlockDriverState *bs, assert(!bs->supported_zero_flags); } - if (ret == -ENOTSUP) { + if (ret == -ENOTSUP && !(flags & BDRV_REQ_NO_FALLBACK)) { /* Fall back to bounce buffer if write zeroes is unsupported */ BdrvRequestFlags write_flags = flags & ~BDRV_REQ_ZERO_WRITE; @@ -2953,6 +2955,10 @@ static int coroutine_fn bdrv_co_copy_range_internal( BdrvTrackedRequest req; int ret; + /* TODO We can support BDRV_REQ_NO_FALLBACK here */ + assert(!(read_flags & BDRV_REQ_NO_FALLBACK)); + assert(!(write_flags & BDRV_REQ_NO_FALLBACK)); + if (!dst || !dst->bs) { return -ENOMEDIUM; } diff --git a/block/mirror.c b/block/mirror.c index 726d3c27fb..ff15cfb197 100644 --- a/block/mirror.c +++ b/block/mirror.c @@ -80,6 +80,7 @@ typedef struct MirrorBlockJob { bool initial_zeroing_ongoing; int in_active_write_counter; bool prepared; + bool in_drain; } MirrorBlockJob; typedef struct MirrorBDSOpaque { @@ -630,6 +631,10 @@ static int mirror_exit_common(Job *job) } s->prepared = true; + if (bdrv_chain_contains(src, target_bs)) { + bdrv_unfreeze_backing_chain(mirror_top_bs, target_bs); + } + bdrv_release_dirty_bitmap(src, s->dirty_bitmap); /* Make sure that the source BDS doesn't go away during bdrv_replace_node, @@ -679,6 +684,7 @@ static int mirror_exit_common(Job *job) /* The mirror job has no requests in flight any more, but we need to * drain potential other users of the BDS before changing the graph. */ + assert(s->in_drain); bdrv_drained_begin(target_bs); bdrv_replace_node(to_replace, target_bs, &local_err); bdrv_drained_end(target_bs); @@ -717,6 +723,7 @@ static int mirror_exit_common(Job *job) bs_opaque->job = NULL; bdrv_drained_end(src); + s->in_drain = false; bdrv_unref(mirror_top_bs); bdrv_unref(src); @@ -1000,10 +1007,12 @@ static int coroutine_fn mirror_run(Job *job, Error **errp) */ trace_mirror_before_drain(s, cnt); + s->in_drain = true; bdrv_drained_begin(bs); cnt = bdrv_get_dirty_count(s->dirty_bitmap); if (cnt > 0 || mirror_flush(s) < 0) { bdrv_drained_end(bs); + s->in_drain = false; continue; } @@ -1051,6 +1060,7 @@ immediate_exit: bdrv_dirty_iter_free(s->dbi); if (need_drain) { + s->in_drain = true; bdrv_drained_begin(bs); } @@ -1119,6 +1129,16 @@ static void coroutine_fn mirror_pause(Job *job) static bool mirror_drained_poll(BlockJob *job) { MirrorBlockJob *s = container_of(job, MirrorBlockJob, common); + + /* If the job isn't paused nor cancelled, we can't be sure that it won't + * issue more requests. We make an exception if we've reached this point + * from one of our own drain sections, to avoid a deadlock waiting for + * ourselves. + */ + if (!s->common.job.paused && !s->common.job.cancelled && !s->in_drain) { + return true; + } + return !!s->in_flight; } @@ -1528,7 +1548,8 @@ static void mirror_start_job(const char *job_id, BlockDriverState *bs, } mirror_top_bs->total_sectors = bs->total_sectors; mirror_top_bs->supported_write_flags = BDRV_REQ_WRITE_UNCHANGED; - mirror_top_bs->supported_zero_flags = BDRV_REQ_WRITE_UNCHANGED; + mirror_top_bs->supported_zero_flags = BDRV_REQ_WRITE_UNCHANGED | + BDRV_REQ_NO_FALLBACK; bs_opaque = g_new0(MirrorBDSOpaque, 1); mirror_top_bs->opaque = bs_opaque; bdrv_set_aio_context(mirror_top_bs, bdrv_get_aio_context(bs)); @@ -1639,6 +1660,10 @@ static void mirror_start_job(const char *job_id, BlockDriverState *bs, goto fail; } } + + if (bdrv_freeze_backing_chain(mirror_top_bs, target, errp) < 0) { + goto fail; + } } QTAILQ_INIT(&s->ops_in_flight); diff --git a/block/nbd-client.c b/block/nbd-client.c index bfbaf7ebe9..790ecc1ee1 100644 --- a/block/nbd-client.c +++ b/block/nbd-client.c @@ -211,7 +211,8 @@ static inline uint64_t payload_advance64(uint8_t **payload) return ldq_be_p(*payload - 8); } -static int nbd_parse_offset_hole_payload(NBDStructuredReplyChunk *chunk, +static int nbd_parse_offset_hole_payload(NBDClientSession *client, + NBDStructuredReplyChunk *chunk, uint8_t *payload, uint64_t orig_offset, QEMUIOVector *qiov, Error **errp) { @@ -233,6 +234,10 @@ static int nbd_parse_offset_hole_payload(NBDStructuredReplyChunk *chunk, " region"); return -EINVAL; } + if (client->info.min_block && + !QEMU_IS_ALIGNED(hole_size, client->info.min_block)) { + trace_nbd_structured_read_compliance("hole"); + } qemu_iovec_memset(qiov, offset - orig_offset, 0, hole_size); @@ -240,8 +245,8 @@ static int nbd_parse_offset_hole_payload(NBDStructuredReplyChunk *chunk, } /* nbd_parse_blockstatus_payload - * support only one extent in reply and only for - * base:allocation context + * Based on our request, we expect only one extent in reply, for the + * base:allocation context. */ static int nbd_parse_blockstatus_payload(NBDClientSession *client, NBDStructuredReplyChunk *chunk, @@ -250,7 +255,8 @@ static int nbd_parse_blockstatus_payload(NBDClientSession *client, { uint32_t context_id; - if (chunk->length != sizeof(context_id) + sizeof(*extent)) { + /* The server succeeded, so it must have sent [at least] one extent */ + if (chunk->length < sizeof(context_id) + sizeof(*extent)) { error_setg(errp, "Protocol error: invalid payload for " "NBD_REPLY_TYPE_BLOCK_STATUS"); return -EINVAL; @@ -268,18 +274,50 @@ static int nbd_parse_blockstatus_payload(NBDClientSession *client, extent->length = payload_advance32(&payload); extent->flags = payload_advance32(&payload); - if (extent->length == 0 || - (client->info.min_block && !QEMU_IS_ALIGNED(extent->length, - client->info.min_block))) { + if (extent->length == 0) { error_setg(errp, "Protocol error: server sent status chunk with " - "invalid length"); + "zero length"); return -EINVAL; } - /* The server is allowed to send us extra information on the final - * extent; just clamp it to the length we requested. */ + /* + * A server sending unaligned block status is in violation of the + * protocol, but as qemu-nbd 3.1 is such a server (at least for + * POSIX files that are not a multiple of 512 bytes, since qemu + * rounds files up to 512-byte multiples but lseek(SEEK_HOLE) + * still sees an implicit hole beyond the real EOF), it's nicer to + * work around the misbehaving server. If the request included + * more than the final unaligned block, truncate it back to an + * aligned result; if the request was only the final block, round + * up to the full block and change the status to fully-allocated + * (always a safe status, even if it loses information). + */ + if (client->info.min_block && !QEMU_IS_ALIGNED(extent->length, + client->info.min_block)) { + trace_nbd_parse_blockstatus_compliance("extent length is unaligned"); + if (extent->length > client->info.min_block) { + extent->length = QEMU_ALIGN_DOWN(extent->length, + client->info.min_block); + } else { + extent->length = client->info.min_block; + extent->flags = 0; + } + } + + /* + * We used NBD_CMD_FLAG_REQ_ONE, so the server should not have + * sent us any more than one extent, nor should it have included + * status beyond our request in that extent. However, it's easy + * enough to ignore the server's noncompliance without killing the + * connection; just ignore trailing extents, and clamp things to + * the length of our request. + */ + if (chunk->length > sizeof(context_id) + sizeof(*extent)) { + trace_nbd_parse_blockstatus_compliance("more than one extent"); + } if (extent->length > orig_length) { extent->length = orig_length; + trace_nbd_parse_blockstatus_compliance("extent length too large"); } return 0; @@ -357,6 +395,9 @@ static int nbd_co_receive_offset_data_payload(NBDClientSession *s, " region"); return -EINVAL; } + if (s->info.min_block && !QEMU_IS_ALIGNED(data_size, s->info.min_block)) { + trace_nbd_structured_read_compliance("data"); + } qemu_iovec_init(&sub_qiov, qiov->niov); qemu_iovec_concat(&sub_qiov, qiov, offset - orig_offset, data_size); @@ -679,7 +720,7 @@ static int nbd_co_receive_cmdread_reply(NBDClientSession *s, uint64_t handle, * in qiov */ break; case NBD_REPLY_TYPE_OFFSET_HOLE: - ret = nbd_parse_offset_hole_payload(&reply.structured, payload, + ret = nbd_parse_offset_hole_payload(s, &reply.structured, payload, offset, qiov, &local_err); if (ret < 0) { s->quit = true; @@ -718,9 +759,7 @@ static int nbd_co_receive_blockstatus_reply(NBDClientSession *s, bool received = false; assert(!extent->length); - NBD_FOREACH_REPLY_CHUNK(s, iter, handle, s->info.structured_reply, - NULL, &reply, &payload) - { + NBD_FOREACH_REPLY_CHUNK(s, iter, handle, false, NULL, &reply, &payload) { int ret; NBDStructuredReplyChunk *chunk = &reply.structured; @@ -758,12 +797,9 @@ static int nbd_co_receive_blockstatus_reply(NBDClientSession *s, payload = NULL; } - if (!extent->length && !iter.err) { - error_setg(&iter.err, - "Server did not reply with any status extents"); - if (!iter.ret) { - iter.ret = -EIO; - } + if (!extent->length && !iter.request_ret) { + error_setg(&local_err, "Server did not reply with any status extents"); + nbd_iter_channel_error(&iter, -EIO, &local_err); } error_propagate(errp, iter.err); @@ -820,6 +856,25 @@ int nbd_client_co_preadv(BlockDriverState *bs, uint64_t offset, if (!bytes) { return 0; } + /* + * Work around the fact that the block layer doesn't do + * byte-accurate sizing yet - if the read exceeds the server's + * advertised size because the block layer rounded size up, then + * truncate the request to the server and tail-pad with zero. + */ + if (offset >= client->info.size) { + assert(bytes < BDRV_SECTOR_SIZE); + qemu_iovec_memset(qiov, 0, 0, bytes); + return 0; + } + if (offset + bytes > client->info.size) { + uint64_t slop = offset + bytes - client->info.size; + + assert(slop < BDRV_SECTOR_SIZE); + qemu_iovec_memset(qiov, bytes - slop, 0, slop); + request.len -= slop; + } + ret = nbd_co_send_request(bs, &request, NULL); if (ret < 0) { return ret; @@ -938,15 +993,35 @@ int coroutine_fn nbd_client_co_block_status(BlockDriverState *bs, .from = offset, .len = MIN(MIN_NON_ZERO(QEMU_ALIGN_DOWN(INT_MAX, bs->bl.request_alignment), - client->info.max_block), bytes), + client->info.max_block), + MIN(bytes, client->info.size - offset)), .flags = NBD_CMD_FLAG_REQ_ONE, }; if (!client->info.base_allocation) { *pnum = bytes; - return BDRV_BLOCK_DATA; + *map = offset; + *file = bs; + return BDRV_BLOCK_DATA | BDRV_BLOCK_OFFSET_VALID; } + /* + * Work around the fact that the block layer doesn't do + * byte-accurate sizing yet - if the status request exceeds the + * server's advertised size because the block layer rounded size + * up, we truncated the request to the server (above), or are + * called on just the hole. + */ + if (offset >= client->info.size) { + *pnum = bytes; + assert(bytes < BDRV_SECTOR_SIZE); + /* Intentionally don't report offset_valid for the hole */ + return BDRV_BLOCK_ZERO; + } + + if (client->info.min_block) { + assert(QEMU_IS_ALIGNED(request.len, client->info.min_block)); + } ret = nbd_co_send_request(bs, &request, NULL); if (ret < 0) { return ret; @@ -967,8 +1042,11 @@ int coroutine_fn nbd_client_co_block_status(BlockDriverState *bs, assert(extent.length); *pnum = extent.length; + *map = offset; + *file = bs; return (extent.flags & NBD_STATE_HOLE ? 0 : BDRV_BLOCK_DATA) | - (extent.flags & NBD_STATE_ZERO ? BDRV_BLOCK_ZERO : 0); + (extent.flags & NBD_STATE_ZERO ? BDRV_BLOCK_ZERO : 0) | + BDRV_BLOCK_OFFSET_VALID; } void nbd_client_detach_aio_context(BlockDriverState *bs) diff --git a/block/nbd.c b/block/nbd.c index 2e72df528a..208be59602 100644 --- a/block/nbd.c +++ b/block/nbd.c @@ -437,7 +437,24 @@ static void nbd_refresh_limits(BlockDriverState *bs, Error **errp) uint32_t min = s->info.min_block; uint32_t max = MIN_NON_ZERO(NBD_MAX_BUFFER_SIZE, s->info.max_block); - bs->bl.request_alignment = min ? min : BDRV_SECTOR_SIZE; + /* + * If the server did not advertise an alignment: + * - a size that is not sector-aligned implies that an alignment + * of 1 can be used to access those tail bytes + * - advertisement of block status requires an alignment of 1, so + * that we don't violate block layer constraints that block + * status is always aligned (as we can't control whether the + * server will report sub-sector extents, such as a hole at EOF + * on an unaligned POSIX file) + * - otherwise, assume the server is so old that we are safer avoiding + * sub-sector requests + */ + if (!min) { + min = (!QEMU_IS_ALIGNED(s->info.size, BDRV_SECTOR_SIZE) || + s->info.base_allocation) ? 1 : BDRV_SECTOR_SIZE; + } + + bs->bl.request_alignment = min; bs->bl.max_pdiscard = max; bs->bl.max_pwrite_zeroes = max; bs->bl.max_transfer = max; diff --git a/block/parallels.c b/block/parallels.c index 15bc97b759..2747400577 100644 --- a/block/parallels.c +++ b/block/parallels.c @@ -220,20 +220,18 @@ static int64_t allocate_clusters(BlockDriverState *bs, int64_t sector_num, if (bs->backing) { int64_t nb_cow_sectors = to_allocate * s->tracks; int64_t nb_cow_bytes = nb_cow_sectors << BDRV_SECTOR_BITS; - QEMUIOVector qiov = - QEMU_IOVEC_INIT_BUF(qiov, qemu_blockalign(bs, nb_cow_bytes), - nb_cow_bytes); + void *buf = qemu_blockalign(bs, nb_cow_bytes); - ret = bdrv_co_preadv(bs->backing, idx * s->tracks * BDRV_SECTOR_SIZE, - nb_cow_bytes, &qiov, 0); + ret = bdrv_co_pread(bs->backing, idx * s->tracks * BDRV_SECTOR_SIZE, + nb_cow_bytes, buf, 0); if (ret < 0) { - qemu_vfree(qemu_iovec_buf(&qiov)); + qemu_vfree(buf); return ret; } ret = bdrv_co_pwritev(bs->file, s->data_end * BDRV_SECTOR_SIZE, - nb_cow_bytes, &qiov, 0); - qemu_vfree(qemu_iovec_buf(&qiov)); + nb_cow_bytes, buf, 0); + qemu_vfree(buf); if (ret < 0) { return ret; } diff --git a/block/qapi.c b/block/qapi.c index 6002a768f8..0c13c86f4e 100644 --- a/block/qapi.c +++ b/block/qapi.c @@ -36,6 +36,7 @@ #include "qapi/qmp/qlist.h" #include "qapi/qmp/qnum.h" #include "qapi/qmp/qstring.h" +#include "qemu/qemu-print.h" #include "sysemu/block-backend.h" #include "qemu/cutils.h" @@ -493,14 +494,14 @@ static void bdrv_query_blk_stats(BlockDeviceStats *ds, BlockBackend *blk) } bdrv_latency_histogram_stats(&stats->latency_histogram[BLOCK_ACCT_READ], - &ds->has_x_rd_latency_histogram, - &ds->x_rd_latency_histogram); + &ds->has_rd_latency_histogram, + &ds->rd_latency_histogram); bdrv_latency_histogram_stats(&stats->latency_histogram[BLOCK_ACCT_WRITE], - &ds->has_x_wr_latency_histogram, - &ds->x_wr_latency_histogram); + &ds->has_wr_latency_histogram, + &ds->wr_latency_histogram); bdrv_latency_histogram_stats(&stats->latency_histogram[BLOCK_ACCT_FLUSH], - &ds->has_x_flush_latency_histogram, - &ds->x_flush_latency_histogram); + &ds->has_flush_latency_histogram, + &ds->flush_latency_histogram); } static BlockStats *bdrv_query_bds_stats(BlockDriverState *bs, @@ -630,48 +631,17 @@ BlockStatsList *qmp_query_blockstats(bool has_query_nodes, return head; } -#define NB_SUFFIXES 4 - -static char *get_human_readable_size(char *buf, int buf_size, int64_t size) +void bdrv_snapshot_dump(QEMUSnapshotInfo *sn) { - static const char suffixes[NB_SUFFIXES] = {'K', 'M', 'G', 'T'}; - int64_t base; - int i; - - if (size <= 999) { - snprintf(buf, buf_size, "%" PRId64, size); - } else { - base = 1024; - for (i = 0; i < NB_SUFFIXES; i++) { - if (size < (10 * base)) { - snprintf(buf, buf_size, "%0.1f%c", - (double)size / base, - suffixes[i]); - break; - } else if (size < (1000 * base) || i == (NB_SUFFIXES - 1)) { - snprintf(buf, buf_size, "%" PRId64 "%c", - ((size + (base >> 1)) / base), - suffixes[i]); - break; - } - base = base * 1024; - } - } - return buf; -} - -void bdrv_snapshot_dump(fprintf_function func_fprintf, void *f, - QEMUSnapshotInfo *sn) -{ - char buf1[128], date_buf[128], clock_buf[128]; + char date_buf[128], clock_buf[128]; struct tm tm; time_t ti; int64_t secs; + char *sizing = NULL; if (!sn) { - func_fprintf(f, - "%-10s%-20s%7s%20s%15s", - "ID", "TAG", "VM SIZE", "DATE", "VM CLOCK"); + qemu_printf("%-10s%-20s%7s%20s%15s", + "ID", "TAG", "VM SIZE", "DATE", "VM CLOCK"); } else { ti = sn->date_sec; localtime_r(&ti, &tm); @@ -684,50 +654,47 @@ void bdrv_snapshot_dump(fprintf_function func_fprintf, void *f, (int)((secs / 60) % 60), (int)(secs % 60), (int)((sn->vm_clock_nsec / 1000000) % 1000)); - func_fprintf(f, - "%-10s%-20s%7s%20s%15s", - sn->id_str, sn->name, - get_human_readable_size(buf1, sizeof(buf1), - sn->vm_state_size), - date_buf, - clock_buf); - } + sizing = size_to_str(sn->vm_state_size); + qemu_printf("%-10s%-20s%7s%20s%15s", + sn->id_str, sn->name, + sizing, + date_buf, + clock_buf); + } + g_free(sizing); } -static void dump_qdict(fprintf_function func_fprintf, void *f, int indentation, - QDict *dict); -static void dump_qlist(fprintf_function func_fprintf, void *f, int indentation, - QList *list); +static void dump_qdict(int indentation, QDict *dict); +static void dump_qlist(int indentation, QList *list); -static void dump_qobject(fprintf_function func_fprintf, void *f, - int comp_indent, QObject *obj) +static void dump_qobject(int comp_indent, QObject *obj) { switch (qobject_type(obj)) { case QTYPE_QNUM: { QNum *value = qobject_to(QNum, obj); char *tmp = qnum_to_string(value); - func_fprintf(f, "%s", tmp); + qemu_printf("%s", tmp); g_free(tmp); break; } case QTYPE_QSTRING: { QString *value = qobject_to(QString, obj); - func_fprintf(f, "%s", qstring_get_str(value)); + qemu_printf("%s", qstring_get_str(value)); break; } case QTYPE_QDICT: { QDict *value = qobject_to(QDict, obj); - dump_qdict(func_fprintf, f, comp_indent, value); + dump_qdict(comp_indent, value); break; } case QTYPE_QLIST: { QList *value = qobject_to(QList, obj); - dump_qlist(func_fprintf, f, comp_indent, value); + dump_qlist(comp_indent, value); break; } case QTYPE_QBOOL: { QBool *value = qobject_to(QBool, obj); - func_fprintf(f, "%s", qbool_get_bool(value) ? "true" : "false"); + qemu_printf("%s", qbool_get_bool(value) ? "true" : "false"); break; } default: @@ -735,8 +702,7 @@ static void dump_qobject(fprintf_function func_fprintf, void *f, } } -static void dump_qlist(fprintf_function func_fprintf, void *f, int indentation, - QList *list) +static void dump_qlist(int indentation, QList *list) { const QListEntry *entry; int i = 0; @@ -744,17 +710,16 @@ static void dump_qlist(fprintf_function func_fprintf, void *f, int indentation, for (entry = qlist_first(list); entry; entry = qlist_next(entry), i++) { QType type = qobject_type(entry->value); bool composite = (type == QTYPE_QDICT || type == QTYPE_QLIST); - func_fprintf(f, "%*s[%i]:%c", indentation * 4, "", i, - composite ? '\n' : ' '); - dump_qobject(func_fprintf, f, indentation + 1, entry->value); + qemu_printf("%*s[%i]:%c", indentation * 4, "", i, + composite ? '\n' : ' '); + dump_qobject(indentation + 1, entry->value); if (!composite) { - func_fprintf(f, "\n"); + qemu_printf("\n"); } } } -static void dump_qdict(fprintf_function func_fprintf, void *f, int indentation, - QDict *dict) +static void dump_qdict(int indentation, QDict *dict) { const QDictEntry *entry; @@ -769,18 +734,17 @@ static void dump_qdict(fprintf_function func_fprintf, void *f, int indentation, key[i] = entry->key[i] == '-' ? ' ' : entry->key[i]; } key[i] = 0; - func_fprintf(f, "%*s%s:%c", indentation * 4, "", key, - composite ? '\n' : ' '); - dump_qobject(func_fprintf, f, indentation + 1, entry->value); + qemu_printf("%*s%s:%c", indentation * 4, "", key, + composite ? '\n' : ' '); + dump_qobject(indentation + 1, entry->value); if (!composite) { - func_fprintf(f, "\n"); + qemu_printf("\n"); } g_free(key); } } -void bdrv_image_info_specific_dump(fprintf_function func_fprintf, void *f, - ImageInfoSpecific *info_spec) +void bdrv_image_info_specific_dump(ImageInfoSpecific *info_spec) { QObject *obj, *data; Visitor *v = qobject_output_visitor_new(&obj); @@ -788,65 +752,64 @@ void bdrv_image_info_specific_dump(fprintf_function func_fprintf, void *f, visit_type_ImageInfoSpecific(v, NULL, &info_spec, &error_abort); visit_complete(v, &obj); data = qdict_get(qobject_to(QDict, obj), "data"); - dump_qobject(func_fprintf, f, 1, data); + dump_qobject(1, data); qobject_unref(obj); visit_free(v); } -void bdrv_image_info_dump(fprintf_function func_fprintf, void *f, - ImageInfo *info) +void bdrv_image_info_dump(ImageInfo *info) { - char size_buf[128], dsize_buf[128]; + char *size_buf, *dsize_buf; if (!info->has_actual_size) { - snprintf(dsize_buf, sizeof(dsize_buf), "unavailable"); + dsize_buf = g_strdup("unavailable"); } else { - get_human_readable_size(dsize_buf, sizeof(dsize_buf), - info->actual_size); - } - get_human_readable_size(size_buf, sizeof(size_buf), info->virtual_size); - func_fprintf(f, - "image: %s\n" - "file format: %s\n" - "virtual size: %s (%" PRId64 " bytes)\n" - "disk size: %s\n", - info->filename, info->format, size_buf, - info->virtual_size, - dsize_buf); + dsize_buf = size_to_str(info->actual_size); + } + size_buf = size_to_str(info->virtual_size); + qemu_printf("image: %s\n" + "file format: %s\n" + "virtual size: %s (%" PRId64 " bytes)\n" + "disk size: %s\n", + info->filename, info->format, size_buf, + info->virtual_size, + dsize_buf); + g_free(size_buf); + g_free(dsize_buf); if (info->has_encrypted && info->encrypted) { - func_fprintf(f, "encrypted: yes\n"); + qemu_printf("encrypted: yes\n"); } if (info->has_cluster_size) { - func_fprintf(f, "cluster_size: %" PRId64 "\n", - info->cluster_size); + qemu_printf("cluster_size: %" PRId64 "\n", + info->cluster_size); } if (info->has_dirty_flag && info->dirty_flag) { - func_fprintf(f, "cleanly shut down: no\n"); + qemu_printf("cleanly shut down: no\n"); } if (info->has_backing_filename) { - func_fprintf(f, "backing file: %s", info->backing_filename); + qemu_printf("backing file: %s", info->backing_filename); if (!info->has_full_backing_filename) { - func_fprintf(f, " (cannot determine actual path)"); + qemu_printf(" (cannot determine actual path)"); } else if (strcmp(info->backing_filename, info->full_backing_filename) != 0) { - func_fprintf(f, " (actual path: %s)", info->full_backing_filename); + qemu_printf(" (actual path: %s)", info->full_backing_filename); } - func_fprintf(f, "\n"); + qemu_printf("\n"); if (info->has_backing_filename_format) { - func_fprintf(f, "backing file format: %s\n", - info->backing_filename_format); + qemu_printf("backing file format: %s\n", + info->backing_filename_format); } } if (info->has_snapshots) { SnapshotInfoList *elem; - func_fprintf(f, "Snapshot list:\n"); - bdrv_snapshot_dump(func_fprintf, f, NULL); - func_fprintf(f, "\n"); + qemu_printf("Snapshot list:\n"); + bdrv_snapshot_dump(NULL); + qemu_printf("\n"); /* Ideally bdrv_snapshot_dump() would operate on SnapshotInfoList but * we convert to the block layer's native QEMUSnapshotInfo for now. @@ -862,13 +825,13 @@ void bdrv_image_info_dump(fprintf_function func_fprintf, void *f, pstrcpy(sn.id_str, sizeof(sn.id_str), elem->value->id); pstrcpy(sn.name, sizeof(sn.name), elem->value->name); - bdrv_snapshot_dump(func_fprintf, f, &sn); - func_fprintf(f, "\n"); + bdrv_snapshot_dump(&sn); + qemu_printf("\n"); } } if (info->has_format_specific) { - func_fprintf(f, "Format specific information:\n"); - bdrv_image_info_specific_dump(func_fprintf, f, info->format_specific); + qemu_printf("Format specific information:\n"); + bdrv_image_info_specific_dump(info->format_specific); } } diff --git a/block/qcow.c b/block/qcow.c index 10d2cf14b3..1bb8fd05e2 100644 --- a/block/qcow.c +++ b/block/qcow.c @@ -631,7 +631,6 @@ static coroutine_fn int qcow_co_preadv(BlockDriverState *bs, uint64_t offset, int offset_in_cluster; int ret = 0, n; uint64_t cluster_offset; - QEMUIOVector hd_qiov; uint8_t *buf; void *orig_buf; @@ -663,11 +662,10 @@ static coroutine_fn int qcow_co_preadv(BlockDriverState *bs, uint64_t offset, if (!cluster_offset) { if (bs->backing) { /* read from the base image */ - qemu_iovec_init_buf(&hd_qiov, buf, n); qemu_co_mutex_unlock(&s->lock); /* qcow2 emits this on bs->file instead of bs->backing */ BLKDBG_EVENT(bs->file, BLKDBG_READ_BACKING_AIO); - ret = bdrv_co_preadv(bs->backing, offset, n, &hd_qiov, 0); + ret = bdrv_co_pread(bs->backing, offset, n, buf, 0); qemu_co_mutex_lock(&s->lock); if (ret < 0) { break; @@ -688,11 +686,10 @@ static coroutine_fn int qcow_co_preadv(BlockDriverState *bs, uint64_t offset, ret = -EIO; break; } - qemu_iovec_init_buf(&hd_qiov, buf, n); qemu_co_mutex_unlock(&s->lock); BLKDBG_EVENT(bs->file, BLKDBG_READ_AIO); - ret = bdrv_co_preadv(bs->file, cluster_offset + offset_in_cluster, - n, &hd_qiov, 0); + ret = bdrv_co_pread(bs->file, cluster_offset + offset_in_cluster, + n, buf, 0); qemu_co_mutex_lock(&s->lock); if (ret < 0) { break; @@ -731,7 +728,6 @@ static coroutine_fn int qcow_co_pwritev(BlockDriverState *bs, uint64_t offset, int offset_in_cluster; uint64_t cluster_offset; int ret = 0, n; - QEMUIOVector hd_qiov; uint8_t *buf; void *orig_buf; @@ -776,11 +772,10 @@ static coroutine_fn int qcow_co_pwritev(BlockDriverState *bs, uint64_t offset, } } - qemu_iovec_init_buf(&hd_qiov, buf, n); qemu_co_mutex_unlock(&s->lock); BLKDBG_EVENT(bs->file, BLKDBG_WRITE_AIO); - ret = bdrv_co_pwritev(bs->file, cluster_offset + offset_in_cluster, - n, &hd_qiov, 0); + ret = bdrv_co_pwrite(bs->file, cluster_offset + offset_in_cluster, + n, buf, 0); qemu_co_mutex_lock(&s->lock); if (ret < 0) { break; @@ -1056,7 +1051,6 @@ qcow_co_pwritev_compressed(BlockDriverState *bs, uint64_t offset, uint64_t bytes, QEMUIOVector *qiov) { BDRVQcowState *s = bs->opaque; - QEMUIOVector hd_qiov; z_stream strm; int ret, out_len; uint8_t *buf, *out_buf; @@ -1122,9 +1116,8 @@ qcow_co_pwritev_compressed(BlockDriverState *bs, uint64_t offset, } cluster_offset &= s->cluster_offset_mask; - qemu_iovec_init_buf(&hd_qiov, out_buf, out_len); BLKDBG_EVENT(bs->file, BLKDBG_WRITE_COMPRESSED); - ret = bdrv_co_pwritev(bs->file, cluster_offset, out_len, &hd_qiov, 0); + ret = bdrv_co_pwrite(bs->file, cluster_offset, out_len, out_buf, 0); if (ret < 0) { goto fail; } diff --git a/block/qcow2-bitmap.c b/block/qcow2-bitmap.c index 9d968bdcda..e53a1609d7 100644 --- a/block/qcow2-bitmap.c +++ b/block/qcow2-bitmap.c @@ -343,11 +343,17 @@ static BdrvDirtyBitmap *load_bitmap(BlockDriverState *bs, uint32_t granularity; BdrvDirtyBitmap *bitmap = NULL; - if (bm->flags & BME_FLAG_IN_USE) { - error_setg(errp, "Bitmap '%s' is in use", bm->name); + granularity = 1U << bm->granularity_bits; + bitmap = bdrv_create_dirty_bitmap(bs, granularity, bm->name, errp); + if (bitmap == NULL) { goto fail; } + if (bm->flags & BME_FLAG_IN_USE) { + /* Data is unusable, skip loading it */ + return bitmap; + } + ret = bitmap_table_load(bs, &bm->table, &bitmap_table); if (ret < 0) { error_setg_errno(errp, -ret, @@ -356,12 +362,6 @@ static BdrvDirtyBitmap *load_bitmap(BlockDriverState *bs, goto fail; } - granularity = 1U << bm->granularity_bits; - bitmap = bdrv_create_dirty_bitmap(bs, granularity, bm->name, errp); - if (bitmap == NULL) { - goto fail; - } - ret = load_bitmap_data(bs, bitmap_table, bm->table.size, bitmap); if (ret < 0) { error_setg_errno(errp, -ret, "Could not read bitmap '%s' from image", @@ -462,10 +462,25 @@ static int check_dir_entry(BlockDriverState *bs, Qcow2BitmapDirEntry *entry) return len; } - fail = (phys_bitmap_bytes > BME_MAX_PHYS_SIZE) || - (len > ((phys_bitmap_bytes * 8) << entry->granularity_bits)); + if (phys_bitmap_bytes > BME_MAX_PHYS_SIZE) { + return -EINVAL; + } + + if (!(entry->flags & BME_FLAG_IN_USE) && + (len > ((phys_bitmap_bytes * 8) << entry->granularity_bits))) + { + /* + * We've loaded a valid bitmap (IN_USE not set) or we are going to + * store a valid bitmap, but the allocated bitmap table size is not + * enough to store this bitmap. + * + * Note, that it's OK to have an invalid bitmap with invalid size due + * to a bitmap that was not correctly saved after image resize. + */ + return -EINVAL; + } - return fail ? -EINVAL : 0; + return 0; } static inline void bitmap_directory_to_be(uint8_t *dir, size_t size) @@ -950,6 +965,7 @@ bool qcow2_load_dirty_bitmaps(BlockDriverState *bs, Error **errp) Qcow2Bitmap *bm; GSList *created_dirty_bitmaps = NULL; bool header_updated = false; + bool needs_update = false; if (s->nb_bitmaps == 0) { /* No bitmaps - nothing to do */ @@ -963,35 +979,39 @@ bool qcow2_load_dirty_bitmaps(BlockDriverState *bs, Error **errp) } QSIMPLEQ_FOREACH(bm, bm_list, entry) { - if (!(bm->flags & BME_FLAG_IN_USE)) { - BdrvDirtyBitmap *bitmap = load_bitmap(bs, bm, errp); - if (bitmap == NULL) { - goto fail; - } + BdrvDirtyBitmap *bitmap = load_bitmap(bs, bm, errp); + if (bitmap == NULL) { + goto fail; + } - if (!(bm->flags & BME_FLAG_AUTO)) { - bdrv_disable_dirty_bitmap(bitmap); - } - bdrv_dirty_bitmap_set_persistance(bitmap, true); + bdrv_dirty_bitmap_set_persistence(bitmap, true); + if (bm->flags & BME_FLAG_IN_USE) { + bdrv_dirty_bitmap_set_inconsistent(bitmap); + } else { + /* NB: updated flags only get written if can_write(bs) is true. */ bm->flags |= BME_FLAG_IN_USE; - created_dirty_bitmaps = - g_slist_append(created_dirty_bitmaps, bitmap); + needs_update = true; + } + if (!(bm->flags & BME_FLAG_AUTO)) { + bdrv_disable_dirty_bitmap(bitmap); } + created_dirty_bitmaps = + g_slist_append(created_dirty_bitmaps, bitmap); } - if (created_dirty_bitmaps != NULL) { - if (can_write(bs)) { - /* in_use flags must be updated */ - int ret = update_ext_header_and_dir_in_place(bs, bm_list); - if (ret < 0) { - error_setg_errno(errp, -ret, "Can't update bitmap directory"); - goto fail; - } - header_updated = true; - } else { - g_slist_foreach(created_dirty_bitmaps, set_readonly_helper, - (gpointer)true); + if (needs_update && can_write(bs)) { + /* in_use flags must be updated */ + int ret = update_ext_header_and_dir_in_place(bs, bm_list); + if (ret < 0) { + error_setg_errno(errp, -ret, "Can't update bitmap directory"); + goto fail; } + header_updated = true; + } + + if (!can_write(bs)) { + g_slist_foreach(created_dirty_bitmaps, set_readonly_helper, + (gpointer)true); } g_slist_free(created_dirty_bitmaps); @@ -1113,23 +1133,21 @@ int qcow2_reopen_bitmaps_rw_hint(BlockDriverState *bs, bool *header_updated, } QSIMPLEQ_FOREACH(bm, bm_list, entry) { - if (!(bm->flags & BME_FLAG_IN_USE)) { - BdrvDirtyBitmap *bitmap = bdrv_find_dirty_bitmap(bs, bm->name); - if (bitmap == NULL) { - continue; - } - - if (!bdrv_dirty_bitmap_readonly(bitmap)) { - error_setg(errp, "Bitmap %s is not readonly but not marked" - "'IN_USE' in the image. Something went wrong," - "all the bitmaps may be corrupted", bm->name); - ret = -EINVAL; - goto out; - } + BdrvDirtyBitmap *bitmap = bdrv_find_dirty_bitmap(bs, bm->name); + if (bitmap == NULL) { + continue; + } - bm->flags |= BME_FLAG_IN_USE; - ro_dirty_bitmaps = g_slist_append(ro_dirty_bitmaps, bitmap); + if (!bdrv_dirty_bitmap_readonly(bitmap)) { + error_setg(errp, "Bitmap %s was loaded prior to rw-reopen, but was " + "not marked as readonly. This is a bug, something went " + "wrong. All of the bitmaps may be corrupted", bm->name); + ret = -EINVAL; + goto out; } + + bm->flags |= BME_FLAG_IN_USE; + ro_dirty_bitmaps = g_slist_append(ro_dirty_bitmaps, bitmap); } if (ro_dirty_bitmaps != NULL) { @@ -1157,6 +1175,52 @@ int qcow2_reopen_bitmaps_rw(BlockDriverState *bs, Error **errp) return qcow2_reopen_bitmaps_rw_hint(bs, NULL, errp); } +/* Checks to see if it's safe to resize bitmaps */ +int qcow2_truncate_bitmaps_check(BlockDriverState *bs, Error **errp) +{ + BDRVQcow2State *s = bs->opaque; + Qcow2BitmapList *bm_list; + Qcow2Bitmap *bm; + int ret = 0; + + if (s->nb_bitmaps == 0) { + return 0; + } + + bm_list = bitmap_list_load(bs, s->bitmap_directory_offset, + s->bitmap_directory_size, errp); + if (bm_list == NULL) { + return -EINVAL; + } + + QSIMPLEQ_FOREACH(bm, bm_list, entry) { + BdrvDirtyBitmap *bitmap = bdrv_find_dirty_bitmap(bs, bm->name); + if (bitmap == NULL) { + /* + * We rely on all bitmaps being in-memory to be able to resize them, + * Otherwise, we'd need to resize them on disk explicitly + */ + error_setg(errp, "Cannot resize qcow2 with persistent bitmaps that " + "were not loaded into memory"); + ret = -ENOTSUP; + goto out; + } + + /* + * The checks against readonly and busy are redundant, but certainly + * do no harm. checks against inconsistent are crucial: + */ + if (bdrv_dirty_bitmap_check(bitmap, BDRV_BITMAP_DEFAULT, errp)) { + ret = -ENOTSUP; + goto out; + } + } + +out: + bitmap_list_free(bm_list); + return ret; +} + /* store_bitmap_data() * Store bitmap to image, filling bitmap table accordingly. */ @@ -1424,9 +1488,9 @@ void qcow2_store_persistent_dirty_bitmaps(BlockDriverState *bs, Error **errp) uint32_t granularity = bdrv_dirty_bitmap_granularity(bitmap); Qcow2Bitmap *bm; - if (!bdrv_dirty_bitmap_get_persistance(bitmap) || - bdrv_dirty_bitmap_readonly(bitmap)) - { + if (!bdrv_dirty_bitmap_get_persistence(bitmap) || + bdrv_dirty_bitmap_readonly(bitmap) || + bdrv_dirty_bitmap_inconsistent(bitmap)) { continue; } @@ -1542,7 +1606,7 @@ int qcow2_reopen_bitmaps_ro(BlockDriverState *bs, Error **errp) for (bitmap = bdrv_dirty_bitmap_next(bs, NULL); bitmap != NULL; bitmap = bdrv_dirty_bitmap_next(bs, bitmap)) { - if (bdrv_dirty_bitmap_get_persistance(bitmap)) { + if (bdrv_dirty_bitmap_get_persistence(bitmap)) { bdrv_dirty_bitmap_set_readonly(bitmap, true); } } diff --git a/block/qcow2.c b/block/qcow2.c index c4dd876fb4..a520d116ef 100644 --- a/block/qcow2.c +++ b/block/qcow2.c @@ -627,6 +627,30 @@ int qcow2_validate_table(BlockDriverState *bs, uint64_t offset, return 0; } +static const char *const mutable_opts[] = { + QCOW2_OPT_LAZY_REFCOUNTS, + QCOW2_OPT_DISCARD_REQUEST, + QCOW2_OPT_DISCARD_SNAPSHOT, + QCOW2_OPT_DISCARD_OTHER, + QCOW2_OPT_OVERLAP, + QCOW2_OPT_OVERLAP_TEMPLATE, + QCOW2_OPT_OVERLAP_MAIN_HEADER, + QCOW2_OPT_OVERLAP_ACTIVE_L1, + QCOW2_OPT_OVERLAP_ACTIVE_L2, + QCOW2_OPT_OVERLAP_REFCOUNT_TABLE, + QCOW2_OPT_OVERLAP_REFCOUNT_BLOCK, + QCOW2_OPT_OVERLAP_SNAPSHOT_TABLE, + QCOW2_OPT_OVERLAP_INACTIVE_L1, + QCOW2_OPT_OVERLAP_INACTIVE_L2, + QCOW2_OPT_OVERLAP_BITMAP_DIRECTORY, + QCOW2_OPT_CACHE_SIZE, + QCOW2_OPT_L2_CACHE_SIZE, + QCOW2_OPT_L2_CACHE_ENTRY_SIZE, + QCOW2_OPT_REFCOUNT_CACHE_SIZE, + QCOW2_OPT_CACHE_CLEAN_INTERVAL, + NULL +}; + static QemuOptsList qcow2_runtime_opts = { .name = "qcow2", .head = QTAILQ_HEAD_INITIALIZER(qcow2_runtime_opts.head), @@ -2697,10 +2721,13 @@ static int qcow2_set_up_encryption(BlockDriverState *bs, * Returns: 0 on success, -errno on failure. */ static int coroutine_fn preallocate_co(BlockDriverState *bs, uint64_t offset, - uint64_t new_length) + uint64_t new_length, PreallocMode mode, + Error **errp) { + BDRVQcow2State *s = bs->opaque; uint64_t bytes; uint64_t host_offset = 0; + int64_t file_length; unsigned int cur_bytes; int ret; QCowL2Meta *meta; @@ -2709,10 +2736,11 @@ static int coroutine_fn preallocate_co(BlockDriverState *bs, uint64_t offset, bytes = new_length - offset; while (bytes) { - cur_bytes = MIN(bytes, INT_MAX); + cur_bytes = MIN(bytes, QEMU_ALIGN_DOWN(INT_MAX, s->cluster_size)); ret = qcow2_alloc_cluster_offset(bs, offset, &cur_bytes, &host_offset, &meta); if (ret < 0) { + error_setg_errno(errp, -ret, "Allocating clusters failed"); return ret; } @@ -2721,6 +2749,7 @@ static int coroutine_fn preallocate_co(BlockDriverState *bs, uint64_t offset, ret = qcow2_alloc_cluster_link_l2(bs, meta); if (ret < 0) { + error_setg_errno(errp, -ret, "Mapping clusters failed"); qcow2_free_any_clusters(bs, meta->alloc_offset, meta->nb_clusters, QCOW2_DISCARD_NEVER); return ret; @@ -2745,10 +2774,18 @@ static int coroutine_fn preallocate_co(BlockDriverState *bs, uint64_t offset, * all of the allocated clusters (otherwise we get failing reads after * EOF). Extend the image to the last allocated sector. */ - if (host_offset != 0) { - uint8_t data = 0; - ret = bdrv_pwrite(bs->file, (host_offset + cur_bytes) - 1, - &data, 1); + file_length = bdrv_getlength(s->data_file->bs); + if (file_length < 0) { + error_setg_errno(errp, -file_length, "Could not get file size"); + return file_length; + } + + if (host_offset + cur_bytes > file_length) { + if (mode == PREALLOC_MODE_METADATA) { + mode = PREALLOC_MODE_OFF; + } + ret = bdrv_co_truncate(s->data_file, host_offset + cur_bytes, mode, + errp); if (ret < 0) { return ret; } @@ -3049,7 +3086,7 @@ qcow2_co_create(BlockdevCreateOptions *create_options, Error **errp) goto out; } data_bs = bdrv_open_blockdev_ref(qcow2_opts->data_file, errp); - if (bs == NULL) { + if (data_bs == NULL) { ret = -EIO; goto out; } @@ -3646,9 +3683,7 @@ static int coroutine_fn qcow2_co_truncate(BlockDriverState *bs, int64_t offset, } /* cannot proceed if image has bitmaps */ - if (s->nb_bitmaps) { - /* TODO: resize bitmaps in the image */ - error_setg(errp, "Can't resize an image which has bitmaps"); + if (qcow2_truncate_bitmaps_check(bs, errp)) { ret = -ENOTSUP; goto fail; } @@ -3722,12 +3757,17 @@ static int coroutine_fn qcow2_co_truncate(BlockDriverState *bs, int64_t offset, switch (prealloc) { case PREALLOC_MODE_OFF: + if (has_data_file(bs)) { + ret = bdrv_co_truncate(s->data_file, offset, prealloc, errp); + if (ret < 0) { + goto fail; + } + } break; case PREALLOC_MODE_METADATA: - ret = preallocate_co(bs, old_length, offset); + ret = preallocate_co(bs, old_length, offset, prealloc, errp); if (ret < 0) { - error_setg_errno(errp, -ret, "Preallocation failed"); goto fail; } break; @@ -3743,9 +3783,8 @@ static int coroutine_fn qcow2_co_truncate(BlockDriverState *bs, int64_t offset, /* With a data file, preallocation means just allocating the metadata * and forwarding the truncate request to the data file */ if (has_data_file(bs)) { - ret = preallocate_co(bs, old_length, offset); + ret = preallocate_co(bs, old_length, offset, prealloc, errp); if (ret < 0) { - error_setg_errno(errp, -ret, "Preallocation failed"); goto fail; } break; @@ -3859,16 +3898,6 @@ static int coroutine_fn qcow2_co_truncate(BlockDriverState *bs, int64_t offset, bs->total_sectors = offset / BDRV_SECTOR_SIZE; - if (has_data_file(bs)) { - if (prealloc == PREALLOC_MODE_METADATA) { - prealloc = PREALLOC_MODE_OFF; - } - ret = bdrv_co_truncate(s->data_file, offset, prealloc, errp); - if (ret < 0) { - goto fail; - } - } - /* write updated header.size */ offset = cpu_to_be64(offset); ret = bdrv_pwrite_sync(bs->file, offsetof(QCowHeader, size), @@ -3900,8 +3929,8 @@ fail: * @src - source buffer, @src_size bytes * * Returns: compressed size on success - * -1 destination buffer is not enough to store compressed data - * -2 on any other error + * -ENOMEM destination buffer is not enough to store compressed data + * -EIO on any other error */ static ssize_t qcow2_compress(void *dest, size_t dest_size, const void *src, size_t src_size) @@ -3914,7 +3943,7 @@ static ssize_t qcow2_compress(void *dest, size_t dest_size, ret = deflateInit2(&strm, Z_DEFAULT_COMPRESSION, Z_DEFLATED, -12, 9, Z_DEFAULT_STRATEGY); if (ret != Z_OK) { - return -2; + return -EIO; } /* strm.next_in is not const in old zlib versions, such as those used on @@ -3928,7 +3957,7 @@ static ssize_t qcow2_compress(void *dest, size_t dest_size, if (ret == Z_STREAM_END) { ret = dest_size - strm.avail_out; } else { - ret = (ret == Z_OK ? -1 : -2); + ret = (ret == Z_OK ? -ENOMEM : -EIO); } deflateEnd(&strm); @@ -4065,9 +4094,8 @@ qcow2_co_pwritev_compressed(BlockDriverState *bs, uint64_t offset, uint64_t bytes, QEMUIOVector *qiov) { BDRVQcow2State *s = bs->opaque; - QEMUIOVector hd_qiov; int ret; - size_t out_len; + ssize_t out_len; uint8_t *buf, *out_buf; uint64_t cluster_offset; @@ -4106,16 +4134,16 @@ qcow2_co_pwritev_compressed(BlockDriverState *bs, uint64_t offset, out_len = qcow2_co_compress(bs, out_buf, s->cluster_size - 1, buf, s->cluster_size); - if (out_len == -2) { - ret = -EINVAL; - goto fail; - } else if (out_len == -1) { + if (out_len == -ENOMEM) { /* could not compress: write normal cluster */ ret = qcow2_co_pwritev(bs, offset, bytes, qiov, 0); if (ret < 0) { goto fail; } goto success; + } else if (out_len < 0) { + ret = -EINVAL; + goto fail; } qemu_co_mutex_lock(&s->lock); @@ -4132,10 +4160,8 @@ qcow2_co_pwritev_compressed(BlockDriverState *bs, uint64_t offset, goto fail; } - qemu_iovec_init_buf(&hd_qiov, out_buf, out_len); - BLKDBG_EVENT(s->data_file, BLKDBG_WRITE_COMPRESSED); - ret = bdrv_co_pwritev(s->data_file, cluster_offset, out_len, &hd_qiov, 0); + ret = bdrv_co_pwrite(s->data_file, cluster_offset, out_len, out_buf, 0); if (ret < 0) { goto fail; } @@ -4158,7 +4184,6 @@ qcow2_co_preadv_compressed(BlockDriverState *bs, int ret = 0, csize, nb_csectors; uint64_t coffset; uint8_t *buf, *out_buf; - QEMUIOVector local_qiov; int offset_in_cluster = offset_into_cluster(s, offset); coffset = file_cluster_offset & s->cluster_offset_mask; @@ -4169,12 +4194,11 @@ qcow2_co_preadv_compressed(BlockDriverState *bs, if (!buf) { return -ENOMEM; } - qemu_iovec_init_buf(&local_qiov, buf, csize); out_buf = qemu_blockalign(bs, s->cluster_size); BLKDBG_EVENT(bs->file, BLKDBG_READ_COMPRESSED); - ret = bdrv_co_preadv(bs->file, coffset, csize, &local_qiov, 0); + ret = bdrv_co_pread(bs->file, coffset, csize, buf, 0); if (ret < 0) { goto fail; } @@ -4355,14 +4379,17 @@ static int qcow2_make_empty(BlockDriverState *bs) if (s->qcow_version >= 3 && !s->snapshots && !s->nb_bitmaps && 3 + l1_clusters <= s->refcount_block_size && - s->crypt_method_header != QCOW_CRYPT_LUKS) { + s->crypt_method_header != QCOW_CRYPT_LUKS && + !has_data_file(bs)) { /* The following function only works for qcow2 v3 images (it * requires the dirty flag) and only as long as there are no * features that reserve extra clusters (such as snapshots, * LUKS header, or persistent bitmaps), because it completely * empties the image. Furthermore, the L1 table and three * additional clusters (image header, refcount table, one - * refcount block) have to fit inside one refcount block. */ + * refcount block) have to fit inside one refcount block. It + * only resets the image file, i.e. does not work with an + * external data file. */ return make_completely_empty(bs); } @@ -5275,6 +5302,7 @@ BlockDriver bdrv_qcow2 = { .create_opts = &qcow2_create_opts, .strong_runtime_opts = qcow2_strong_runtime_opts, + .mutable_opts = mutable_opts, .bdrv_co_check = qcow2_co_check, .bdrv_amend_options = qcow2_amend_options, diff --git a/block/qcow2.h b/block/qcow2.h index de2a3bdfc5..fdee297f33 100644 --- a/block/qcow2.h +++ b/block/qcow2.h @@ -723,6 +723,7 @@ Qcow2BitmapInfoList *qcow2_get_bitmap_info_list(BlockDriverState *bs, int qcow2_reopen_bitmaps_rw_hint(BlockDriverState *bs, bool *header_updated, Error **errp); int qcow2_reopen_bitmaps_rw(BlockDriverState *bs, Error **errp); +int qcow2_truncate_bitmaps_check(BlockDriverState *bs, Error **errp); void qcow2_store_persistent_dirty_bitmaps(BlockDriverState *bs, Error **errp); int qcow2_reopen_bitmaps_ro(BlockDriverState *bs, Error **errp); bool qcow2_can_store_new_dirty_bitmap(BlockDriverState *bs, diff --git a/block/qed-check.c b/block/qed-check.c index 0edac03159..418033ee24 100644 --- a/block/qed-check.c +++ b/block/qed-check.c @@ -106,7 +106,7 @@ static unsigned int qed_check_l2_table(QEDCheck *check, QEDTable *table) /** * Descend tables and check each cluster is referenced once only */ -static int qed_check_l1_table(QEDCheck *check, QEDTable *table) +static int coroutine_fn qed_check_l1_table(QEDCheck *check, QEDTable *table) { BDRVQEDState *s = check->s; unsigned int i, num_invalid_l1 = 0; @@ -218,7 +218,7 @@ static void qed_check_mark_clean(BDRVQEDState *s, BdrvCheckResult *result) } /* Called with table_lock held. */ -int qed_check(BDRVQEDState *s, BdrvCheckResult *result, bool fix) +int coroutine_fn qed_check(BDRVQEDState *s, BdrvCheckResult *result, bool fix) { QEDCheck check = { .s = s, diff --git a/block/qed-table.c b/block/qed-table.c index c497bd4aec..405d446cbe 100644 --- a/block/qed-table.c +++ b/block/qed-table.c @@ -19,24 +19,25 @@ #include "qemu/bswap.h" /* Called with table_lock held. */ -static int qed_read_table(BDRVQEDState *s, uint64_t offset, QEDTable *table) +static int coroutine_fn qed_read_table(BDRVQEDState *s, uint64_t offset, + QEDTable *table) { - QEMUIOVector qiov = QEMU_IOVEC_INIT_BUF( - qiov, table->offsets, s->header.cluster_size * s->header.table_size); + unsigned int bytes = s->header.cluster_size * s->header.table_size; + int noffsets; int i, ret; trace_qed_read_table(s, offset, table); qemu_co_mutex_unlock(&s->table_lock); - ret = bdrv_preadv(s->bs->file, offset, &qiov); + ret = bdrv_co_pread(s->bs->file, offset, bytes, table->offsets, 0); qemu_co_mutex_lock(&s->table_lock); if (ret < 0) { goto out; } /* Byteswap offsets */ - noffsets = qiov.size / sizeof(uint64_t); + noffsets = bytes / sizeof(uint64_t); for (i = 0; i < noffsets; i++) { table->offsets[i] = le64_to_cpu(table->offsets[i]); } @@ -60,13 +61,13 @@ out: * * Called with table_lock held. */ -static int qed_write_table(BDRVQEDState *s, uint64_t offset, QEDTable *table, - unsigned int index, unsigned int n, bool flush) +static int coroutine_fn qed_write_table(BDRVQEDState *s, uint64_t offset, + QEDTable *table, unsigned int index, + unsigned int n, bool flush) { unsigned int sector_mask = BDRV_SECTOR_SIZE / sizeof(uint64_t) - 1; unsigned int start, end, i; QEDTable *new_table; - QEMUIOVector qiov; size_t len_bytes; int ret; @@ -79,7 +80,6 @@ static int qed_write_table(BDRVQEDState *s, uint64_t offset, QEDTable *table, len_bytes = (end - start) * sizeof(uint64_t); new_table = qemu_blockalign(s->bs, len_bytes); - qemu_iovec_init_buf(&qiov, new_table->offsets, len_bytes); /* Byteswap table */ for (i = start; i < end; i++) { @@ -91,7 +91,7 @@ static int qed_write_table(BDRVQEDState *s, uint64_t offset, QEDTable *table, offset += start * sizeof(uint64_t); qemu_co_mutex_unlock(&s->table_lock); - ret = bdrv_pwritev(s->bs->file, offset, &qiov); + ret = bdrv_co_pwrite(s->bs->file, offset, len_bytes, new_table->offsets, 0); qemu_co_mutex_lock(&s->table_lock); trace_qed_write_table_cb(s, table, flush, ret); if (ret < 0) { @@ -111,27 +111,29 @@ out: return ret; } -int qed_read_l1_table_sync(BDRVQEDState *s) +int coroutine_fn qed_read_l1_table_sync(BDRVQEDState *s) { return qed_read_table(s, s->header.l1_table_offset, s->l1_table); } /* Called with table_lock held. */ -int qed_write_l1_table(BDRVQEDState *s, unsigned int index, unsigned int n) +int coroutine_fn qed_write_l1_table(BDRVQEDState *s, unsigned int index, + unsigned int n) { BLKDBG_EVENT(s->bs->file, BLKDBG_L1_UPDATE); return qed_write_table(s, s->header.l1_table_offset, s->l1_table, index, n, false); } -int qed_write_l1_table_sync(BDRVQEDState *s, unsigned int index, - unsigned int n) +int coroutine_fn qed_write_l1_table_sync(BDRVQEDState *s, unsigned int index, + unsigned int n) { return qed_write_l1_table(s, index, n); } /* Called with table_lock held. */ -int qed_read_l2_table(BDRVQEDState *s, QEDRequest *request, uint64_t offset) +int coroutine_fn qed_read_l2_table(BDRVQEDState *s, QEDRequest *request, + uint64_t offset) { int ret; @@ -168,22 +170,25 @@ int qed_read_l2_table(BDRVQEDState *s, QEDRequest *request, uint64_t offset) return ret; } -int qed_read_l2_table_sync(BDRVQEDState *s, QEDRequest *request, uint64_t offset) +int coroutine_fn qed_read_l2_table_sync(BDRVQEDState *s, QEDRequest *request, + uint64_t offset) { return qed_read_l2_table(s, request, offset); } /* Called with table_lock held. */ -int qed_write_l2_table(BDRVQEDState *s, QEDRequest *request, - unsigned int index, unsigned int n, bool flush) +int coroutine_fn qed_write_l2_table(BDRVQEDState *s, QEDRequest *request, + unsigned int index, unsigned int n, + bool flush) { BLKDBG_EVENT(s->bs->file, BLKDBG_L2_UPDATE); return qed_write_table(s, request->l2_table->offset, request->l2_table->table, index, n, flush); } -int qed_write_l2_table_sync(BDRVQEDState *s, QEDRequest *request, - unsigned int index, unsigned int n, bool flush) +int coroutine_fn qed_write_l2_table_sync(BDRVQEDState *s, QEDRequest *request, + unsigned int index, unsigned int n, + bool flush) { return qed_write_l2_table(s, request, index, n, flush); } diff --git a/block/qed.c b/block/qed.c index 89af05d524..dcdcd62b4a 100644 --- a/block/qed.c +++ b/block/qed.c @@ -113,15 +113,13 @@ static int coroutine_fn qed_write_header(BDRVQEDState *s) int nsectors = DIV_ROUND_UP(sizeof(QEDHeader), BDRV_SECTOR_SIZE); size_t len = nsectors * BDRV_SECTOR_SIZE; uint8_t *buf; - QEMUIOVector qiov; int ret; assert(s->allocating_acb || s->allocating_write_reqs_plugged); buf = qemu_blockalign(s->bs, len); - qemu_iovec_init_buf(&qiov, buf, len); - ret = bdrv_co_preadv(s->bs->file, 0, qiov.size, &qiov, 0); + ret = bdrv_co_pread(s->bs->file, 0, len, buf, 0); if (ret < 0) { goto out; } @@ -129,7 +127,7 @@ static int coroutine_fn qed_write_header(BDRVQEDState *s) /* Update header */ qed_header_cpu_to_le(&s->header, (QEDHeader *) buf); - ret = bdrv_co_pwritev(s->bs->file, 0, qiov.size, &qiov, 0); + ret = bdrv_co_pwrite(s->bs->file, 0, len, buf, 0); if (ret < 0) { goto out; } @@ -1606,8 +1604,9 @@ static void coroutine_fn bdrv_qed_co_invalidate_cache(BlockDriverState *bs, } } -static int bdrv_qed_co_check(BlockDriverState *bs, BdrvCheckResult *result, - BdrvCheckMode fix) +static int coroutine_fn bdrv_qed_co_check(BlockDriverState *bs, + BdrvCheckResult *result, + BdrvCheckMode fix) { BDRVQEDState *s = bs->opaque; int ret; diff --git a/block/qed.h b/block/qed.h index f35341f134..42c115d822 100644 --- a/block/qed.h +++ b/block/qed.h @@ -201,17 +201,21 @@ void qed_commit_l2_cache_entry(L2TableCache *l2_cache, CachedL2Table *l2_table); /** * Table I/O functions */ -int qed_read_l1_table_sync(BDRVQEDState *s); -int qed_write_l1_table(BDRVQEDState *s, unsigned int index, unsigned int n); -int qed_write_l1_table_sync(BDRVQEDState *s, unsigned int index, - unsigned int n); -int qed_read_l2_table_sync(BDRVQEDState *s, QEDRequest *request, - uint64_t offset); -int qed_read_l2_table(BDRVQEDState *s, QEDRequest *request, uint64_t offset); -int qed_write_l2_table(BDRVQEDState *s, QEDRequest *request, - unsigned int index, unsigned int n, bool flush); -int qed_write_l2_table_sync(BDRVQEDState *s, QEDRequest *request, - unsigned int index, unsigned int n, bool flush); +int coroutine_fn qed_read_l1_table_sync(BDRVQEDState *s); +int coroutine_fn qed_write_l1_table(BDRVQEDState *s, unsigned int index, + unsigned int n); +int coroutine_fn qed_write_l1_table_sync(BDRVQEDState *s, unsigned int index, + unsigned int n); +int coroutine_fn qed_read_l2_table_sync(BDRVQEDState *s, QEDRequest *request, + uint64_t offset); +int coroutine_fn qed_read_l2_table(BDRVQEDState *s, QEDRequest *request, + uint64_t offset); +int coroutine_fn qed_write_l2_table(BDRVQEDState *s, QEDRequest *request, + unsigned int index, unsigned int n, + bool flush); +int coroutine_fn qed_write_l2_table_sync(BDRVQEDState *s, QEDRequest *request, + unsigned int index, unsigned int n, + bool flush); /** * Cluster functions @@ -223,7 +227,7 @@ int coroutine_fn qed_find_cluster(BDRVQEDState *s, QEDRequest *request, /** * Consistency check */ -int qed_check(BDRVQEDState *s, BdrvCheckResult *result, bool fix); +int coroutine_fn qed_check(BDRVQEDState *s, BdrvCheckResult *result, bool fix); QEDTable *qed_alloc_table(BDRVQEDState *s); diff --git a/block/raw-format.c b/block/raw-format.c index e3e5ba2c8a..385cdc2490 100644 --- a/block/raw-format.c +++ b/block/raw-format.c @@ -37,6 +37,8 @@ typedef struct BDRVRawState { bool has_size; } BDRVRawState; +static const char *const mutable_opts[] = { "offset", "size", NULL }; + static QemuOptsList raw_runtime_opts = { .name = "raw", .head = QTAILQ_HEAD_INITIALIZER(raw_runtime_opts.head), @@ -432,7 +434,7 @@ static int raw_open(BlockDriverState *bs, QDict *options, int flags, bs->supported_write_flags = BDRV_REQ_WRITE_UNCHANGED | (BDRV_REQ_FUA & bs->file->bs->supported_write_flags); bs->supported_zero_flags = BDRV_REQ_WRITE_UNCHANGED | - ((BDRV_REQ_FUA | BDRV_REQ_MAY_UNMAP) & + ((BDRV_REQ_FUA | BDRV_REQ_MAY_UNMAP | BDRV_REQ_NO_FALLBACK) & bs->file->bs->supported_zero_flags); if (bs->probed && !bdrv_is_read_only(bs)) { @@ -570,6 +572,7 @@ BlockDriver bdrv_raw = { .create_opts = &raw_create_opts, .bdrv_has_zero_init = &raw_has_zero_init, .strong_runtime_opts = raw_strong_runtime_opts, + .mutable_opts = mutable_opts, }; static void bdrv_raw_init(void) diff --git a/block/replication.c b/block/replication.c index 4c80b54daf..3d4dedddfc 100644 --- a/block/replication.c +++ b/block/replication.c @@ -374,19 +374,18 @@ static void reopen_backing_file(BlockDriverState *bs, bool writable, QDict *opts = qdict_new(); qdict_put_bool(opts, BDRV_OPT_READ_ONLY, !writable); reopen_queue = bdrv_reopen_queue(reopen_queue, s->hidden_disk->bs, - opts); + opts, true); } if (s->orig_secondary_read_only) { QDict *opts = qdict_new(); qdict_put_bool(opts, BDRV_OPT_READ_ONLY, !writable); reopen_queue = bdrv_reopen_queue(reopen_queue, s->secondary_disk->bs, - opts); + opts, true); } if (reopen_queue) { - bdrv_reopen_multiple(bdrv_get_aio_context(bs), - reopen_queue, &local_err); + bdrv_reopen_multiple(reopen_queue, &local_err); error_propagate(errp, local_err); } @@ -683,7 +682,7 @@ static const char *const replication_strong_runtime_opts[] = { NULL }; -BlockDriver bdrv_replication = { +static BlockDriver bdrv_replication = { .format_name = "replication", .instance_size = sizeof(BDRVReplicationState), diff --git a/block/ssh.c b/block/ssh.c index 190ef95300..859249113d 100644 --- a/block/ssh.c +++ b/block/ssh.c @@ -159,31 +159,19 @@ sftp_error_setg(Error **errp, BDRVSSHState *s, const char *fs, ...) g_free(msg); } -static void GCC_FMT_ATTR(2, 3) -sftp_error_report(BDRVSSHState *s, const char *fs, ...) +static void sftp_error_trace(BDRVSSHState *s, const char *op) { - va_list args; - - va_start(args, fs); - error_vprintf(fs, args); + char *ssh_err; + int ssh_err_code; + unsigned long sftp_err_code; - if ((s)->sftp) { - char *ssh_err; - int ssh_err_code; - unsigned long sftp_err_code; + /* This is not an errno. See <libssh2.h>. */ + ssh_err_code = libssh2_session_last_error(s->session, + &ssh_err, NULL, 0); + /* See <libssh2_sftp.h>. */ + sftp_err_code = libssh2_sftp_last_error((s)->sftp); - /* This is not an errno. See <libssh2.h>. */ - ssh_err_code = libssh2_session_last_error(s->session, - &ssh_err, NULL, 0); - /* See <libssh2_sftp.h>. */ - sftp_err_code = libssh2_sftp_last_error((s)->sftp); - - error_printf(": %s (libssh2 error code: %d, sftp error code: %lu)", - ssh_err, ssh_err_code, sftp_err_code); - } - - va_end(args); - error_printf("\n"); + trace_sftp_error(op, ssh_err, ssh_err_code, sftp_err_code); } static int parse_uri(const char *filename, QDict *options, Error **errp) @@ -1035,7 +1023,7 @@ static coroutine_fn int ssh_read(BDRVSSHState *s, BlockDriverState *bs, goto again; } if (r < 0) { - sftp_error_report(s, "read failed"); + sftp_error_trace(s, "read"); s->offset = -1; return -EIO; } @@ -1105,7 +1093,7 @@ static int ssh_write(BDRVSSHState *s, BlockDriverState *bs, goto again; } if (r < 0) { - sftp_error_report(s, "write failed"); + sftp_error_trace(s, "write"); s->offset = -1; return -EIO; } @@ -1188,7 +1176,7 @@ static coroutine_fn int ssh_flush(BDRVSSHState *s, BlockDriverState *bs) return 0; } if (r < 0) { - sftp_error_report(s, "fsync failed"); + sftp_error_trace(s, "fsync"); return -EIO; } diff --git a/block/stream.c b/block/stream.c index e14579ff80..1a906fd860 100644 --- a/block/stream.c +++ b/block/stream.c @@ -35,18 +35,27 @@ typedef struct StreamBlockJob { BlockdevOnError on_error; char *backing_file_str; bool bs_read_only; + bool chain_frozen; } StreamBlockJob; static int coroutine_fn stream_populate(BlockBackend *blk, int64_t offset, uint64_t bytes, void *buf) { - QEMUIOVector qiov = QEMU_IOVEC_INIT_BUF(qiov, buf, bytes); - assert(bytes < SIZE_MAX); /* Copy-on-read the unallocated clusters */ - return blk_co_preadv(blk, offset, qiov.size, &qiov, BDRV_REQ_COPY_ON_READ); + return blk_co_pread(blk, offset, bytes, buf, BDRV_REQ_COPY_ON_READ); +} + +static void stream_abort(Job *job) +{ + StreamBlockJob *s = container_of(job, StreamBlockJob, common.job); + + if (s->chain_frozen) { + BlockJob *bjob = &s->common; + bdrv_unfreeze_backing_chain(blk_bs(bjob->blk), s->base); + } } static int stream_prepare(Job *job) @@ -58,6 +67,9 @@ static int stream_prepare(Job *job) Error *local_err = NULL; int ret = 0; + bdrv_unfreeze_backing_chain(bs, base); + s->chain_frozen = false; + if (bs->backing) { const char *base_id = NULL, *base_fmt = NULL; if (base) { @@ -208,6 +220,7 @@ static const BlockJobDriver stream_job_driver = { .free = block_job_free, .run = stream_run, .prepare = stream_prepare, + .abort = stream_abort, .clean = stream_clean, .user_resume = block_job_user_resume, .drain = block_job_drain, @@ -223,11 +236,16 @@ void stream_start(const char *job_id, BlockDriverState *bs, BlockDriverState *iter; bool bs_read_only; + if (bdrv_freeze_backing_chain(bs, base, errp) < 0) { + return; + } + /* Make sure that the image is opened in read-write mode */ bs_read_only = bdrv_is_read_only(bs); if (bs_read_only) { if (bdrv_reopen_set_read_only(bs, false, errp) != 0) { - return; + bs_read_only = false; + goto fail; } } @@ -257,6 +275,7 @@ void stream_start(const char *job_id, BlockDriverState *bs, s->base = base; s->backing_file_str = g_strdup(backing_file_str); s->bs_read_only = bs_read_only; + s->chain_frozen = true; s->on_error = on_error; trace_stream_start(bs, base, s); @@ -267,4 +286,5 @@ fail: if (bs_read_only) { bdrv_reopen_set_read_only(bs, true, NULL); } + bdrv_unfreeze_backing_chain(bs, base); } diff --git a/block/trace-events b/block/trace-events index 70056eafd2..79ccd8d824 100644 --- a/block/trace-events +++ b/block/trace-events @@ -1,16 +1,16 @@ # See docs/devel/tracing.txt for syntax documentation. -# block.c +# ../block.c bdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) "bs %p filename \"%s\" flags 0x%x format_name \"%s\"" bdrv_lock_medium(void *bs, bool locked) "bs %p locked %d" -# block/block-backend.c +# block-backend.c blk_co_preadv(void *blk, void *bs, int64_t offset, unsigned int bytes, int flags) "blk %p bs %p offset %"PRId64" bytes %u flags 0x%x" blk_co_pwritev(void *blk, void *bs, int64_t offset, unsigned int bytes, int flags) "blk %p bs %p offset %"PRId64" bytes %u flags 0x%x" blk_root_attach(void *child, void *blk, void *bs) "child %p blk %p bs %p" blk_root_detach(void *child, void *blk, void *bs) "child %p blk %p bs %p" -# block/io.c +# io.c bdrv_co_preadv(void *bs, int64_t offset, int64_t nbytes, unsigned int flags) "bs %p offset %"PRId64" nbytes %"PRId64" flags 0x%x" bdrv_co_pwritev(void *bs, int64_t offset, int64_t nbytes, unsigned int flags) "bs %p offset %"PRId64" nbytes %"PRId64" flags 0x%x" bdrv_co_pwrite_zeroes(void *bs, int64_t offset, int count, int flags) "bs %p offset %"PRId64" count %d flags 0x%x" @@ -18,15 +18,15 @@ bdrv_co_do_copy_on_readv(void *bs, int64_t offset, unsigned int bytes, int64_t c bdrv_co_copy_range_from(void *src, uint64_t src_offset, void *dst, uint64_t dst_offset, uint64_t bytes, int read_flags, int write_flags) "src %p offset %"PRIu64" dst %p offset %"PRIu64" bytes %"PRIu64" rw flags 0x%x 0x%x" bdrv_co_copy_range_to(void *src, uint64_t src_offset, void *dst, uint64_t dst_offset, uint64_t bytes, int read_flags, int write_flags) "src %p offset %"PRIu64" dst %p offset %"PRIu64" bytes %"PRIu64" rw flags 0x%x 0x%x" -# block/stream.c +# stream.c stream_one_iteration(void *s, int64_t offset, uint64_t bytes, int is_allocated) "s %p offset %" PRId64 " bytes %" PRIu64 " is_allocated %d" stream_start(void *bs, void *base, void *s) "bs %p base %p s %p" -# block/commit.c +# commit.c commit_one_iteration(void *s, int64_t offset, uint64_t bytes, int is_allocated) "s %p offset %" PRId64 " bytes %" PRIu64 " is_allocated %d" commit_start(void *bs, void *base, void *top, void *s) "bs %p base %p top %p s %p" -# block/mirror.c +# mirror.c mirror_start(void *bs, void *s, void *opaque) "bs %p s %p opaque %p" mirror_restart_iter(void *s, int64_t cnt) "s %p dirty count %"PRId64 mirror_before_flush(void *s) "s %p" @@ -37,7 +37,7 @@ mirror_iteration_done(void *s, int64_t offset, uint64_t bytes, int ret) "s %p of mirror_yield(void *s, int64_t cnt, int buf_free_count, int in_flight) "s %p dirty count %"PRId64" free buffers %d in_flight %d" mirror_yield_in_flight(void *s, int64_t offset, int in_flight) "s %p offset %" PRId64 " in_flight %d" -# block/backup.c +# backup.c backup_do_cow_enter(void *job, int64_t start, int64_t offset, uint64_t bytes) "job %p start %" PRId64 " offset %" PRId64 " bytes %" PRIu64 backup_do_cow_return(void *job, int64_t offset, uint64_t bytes, int ret) "job %p offset %" PRId64 " bytes %" PRIu64 " ret %d" backup_do_cow_skip(void *job, int64_t start) "job %p start %"PRId64 @@ -46,7 +46,7 @@ backup_do_cow_read_fail(void *job, int64_t start, int ret) "job %p start %"PRId6 backup_do_cow_write_fail(void *job, int64_t start, int ret) "job %p start %"PRId64" ret %d" backup_do_cow_copy_range_fail(void *job, int64_t start, int ret) "job %p start %"PRId64" ret %d" -# blockdev.c +# ../blockdev.c qmp_block_job_cancel(void *job) "job %p" qmp_block_job_pause(void *job) "job %p" qmp_block_job_resume(void *job) "job %p" @@ -55,13 +55,12 @@ qmp_block_job_finalize(void *job) "job %p" qmp_block_job_dismiss(void *job) "job %p" qmp_block_stream(void *bs, void *job) "bs %p job %p" -# block/file-win32.c -# block/file-posix.c -file_paio_submit_co(int64_t offset, int count, int type) "offset %"PRId64" count %d type %d" +# file-posix.c +# file-win32.c file_paio_submit(void *acb, void *opaque, int64_t offset, int count, int type) "acb %p opaque %p offset %"PRId64" count %d type %d" file_copy_file_range(void *bs, int src, int64_t src_off, int dst, int64_t dst_off, int64_t bytes, int flags, int64_t ret) "bs %p src_fd %d offset %"PRIu64" dst_fd %d offset %"PRIu64" bytes %"PRIu64" flags %d ret %"PRId64 -# block/qcow2.c +# qcow2.c qcow2_writev_start_req(void *co, int64_t offset, int bytes) "co %p offset 0x%" PRIx64 " bytes %d" qcow2_writev_done_req(void *co, int ret) "co %p ret %d" qcow2_writev_start_part(void *co) "co %p" @@ -70,7 +69,7 @@ qcow2_writev_data(void *co, uint64_t offset) "co %p offset 0x%" PRIx64 qcow2_pwrite_zeroes_start_req(void *co, int64_t offset, int count) "co %p offset 0x%" PRIx64 " count %d" qcow2_pwrite_zeroes(void *co, int64_t offset, int count) "co %p offset 0x%" PRIx64 " count %d" -# block/qcow2-cluster.c +# qcow2-cluster.c qcow2_alloc_clusters_offset(void *co, uint64_t offset, int bytes) "co %p offset 0x%" PRIx64 " bytes %d" qcow2_handle_copied(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offset 0x%" PRIx64 " host_offset 0x%" PRIx64 " bytes 0x%" PRIx64 qcow2_handle_alloc(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offset 0x%" PRIx64 " host_offset 0x%" PRIx64 " bytes 0x%" PRIx64 @@ -84,7 +83,7 @@ qcow2_l2_allocate_write_l2(void *bs, int l1_index) "bs %p l1_index %d" qcow2_l2_allocate_write_l1(void *bs, int l1_index) "bs %p l1_index %d" qcow2_l2_allocate_done(void *bs, int l1_index, int ret) "bs %p l1_index %d ret %d" -# block/qcow2-cache.c +# qcow2-cache.c qcow2_cache_get(void *co, int c, uint64_t offset, bool read_from_disk) "co %p is_l2_cache %d offset 0x%" PRIx64 " read_from_disk %d" qcow2_cache_get_replace_entry(void *co, int c, int i) "co %p is_l2_cache %d index %d" qcow2_cache_get_read(void *co, int c, int i) "co %p is_l2_cache %d index %d" @@ -92,18 +91,18 @@ qcow2_cache_get_done(void *co, int c, int i) "co %p is_l2_cache %d index %d" qcow2_cache_flush(void *co, int c) "co %p is_l2_cache %d" qcow2_cache_entry_flush(void *co, int c, int i) "co %p is_l2_cache %d index %d" -# block/qed-l2-cache.c +# qed-l2-cache.c qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p" qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d" qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d" -# block/qed-table.c +# qed-table.c qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p" qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d" qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u" qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d" -# block/qed.c +# qed.c qed_need_check_timer_cb(void *s) "s %p" qed_start_need_check_timer(void *s) "s %p" qed_cancel_need_check_timer(void *s) "s %p" @@ -116,7 +115,7 @@ qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t o qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64 qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" -# block/vxhs.c +# vxhs.c vxhs_iio_callback(int error) "ctx is NULL: error %d" vxhs_iio_callback_chnfail(int err, int error) "QNIO channel failed, no i/o %d, %d" vxhs_iio_callback_unknwn(int opcode, int err) "unexpected opcode %d, errno %d" @@ -133,7 +132,7 @@ vxhs_parse_uri_hostinfo(char *host, int port) "Host: IP %s, Port %d" vxhs_close(char *vdisk_guid) "Closing vdisk %s" vxhs_get_creds(const char *cacert, const char *client_key, const char *client_cert) "cacert %s, client_key %s, client_cert %s" -# block/nvme.c +# nvme.c nvme_kick(void *s, int queue) "s %p queue %d" nvme_dma_flush_queue_wait(void *s) "s %p" nvme_error(int cmd_specific, int sq_head, int sqid, int cid, int status) "cmd_specific %d sq_head %d sqid %d cid %d status 0x%x" @@ -154,14 +153,16 @@ nvme_cmd_map_qiov(void *s, void *cmd, void *req, void *qiov, int entries) "s %p nvme_cmd_map_qiov_pages(void *s, int i, uint64_t page) "s %p page[%d] 0x%"PRIx64 nvme_cmd_map_qiov_iov(void *s, int i, void *page, int pages) "s %p iov[%d] %p pages %d" -# block/iscsi.c +# iscsi.c iscsi_xcopy(void *src_lun, uint64_t src_off, void *dst_lun, uint64_t dst_off, uint64_t bytes, int ret) "src_lun %p offset %"PRIu64" dst_lun %p offset %"PRIu64" bytes %"PRIu64" ret %d" -# block/nbd-client.c +# nbd-client.c +nbd_parse_blockstatus_compliance(const char *err) "ignoring extra data from non-compliant server: %s" +nbd_structured_read_compliance(const char *type) "server sent non-compliant unaligned read %s chunk" nbd_read_reply_entry_fail(int ret, const char *err) "ret = %d, err: %s" nbd_co_request_fail(uint64_t from, uint32_t len, uint64_t handle, uint16_t flags, uint16_t type, const char *name, int ret, const char *err) "Request failed { .from = %" PRIu64", .len = %" PRIu32 ", .handle = %" PRIu64 ", .flags = 0x%" PRIx16 ", .type = %" PRIu16 " (%s) } ret = %d, err: %s" -# block/ssh.c +# ssh.c ssh_restart_coroutine(void *co) "co=%p" ssh_flush(void) "fsync" ssh_check_host_key_knownhosts(const char *key) "host key OK: %s" @@ -178,7 +179,7 @@ ssh_write_buf(void *buf, size_t size) "sftp_write buf=%p size=%zu" ssh_write_return(ssize_t ret) "sftp_write returned %zd" ssh_seek(int64_t offset) "seeking to offset=%" PRIi64 -# block/curl.c +# curl.c curl_timer_cb(long timeout_ms) "timer callback timeout_ms %ld" curl_sock_cb(int action, int fd) "sock action %d on fd %d" curl_read_cb(size_t realsize) "just reading %zu bytes" @@ -187,14 +188,14 @@ curl_open_size(uint64_t size) "size = %" PRIu64 curl_setup_preadv(uint64_t bytes, uint64_t start, const char *range) "reading %" PRIu64 " at %" PRIu64 " (%s)" curl_close(void) "close" -# block/file-posix.c +# file-posix.c file_xfs_write_zeroes(const char *error) "cannot write zero range (%s)" file_xfs_discard(const char *error) "cannot punch hole (%s)" file_FindEjectableOpticalMedia(const char *media) "Matching using %s" file_setup_cdrom(const char *partition) "Using %s as optical disc" file_hdev_is_sg(int type, int version) "SG device found: type=%d, version=%d" -# block/sheepdog.c +# sheepdog.c sheepdog_reconnect_to_sdog(void) "Wait for connection to be established" sheepdog_aio_read_response(void) "disable cache since the server doesn't support it" sheepdog_open(uint32_t vid) "0x%" PRIx32 " snapshot inode was open" @@ -207,3 +208,6 @@ sheepdog_co_rw_vector_new(uint64_t oid) "new oid 0x%" PRIx64 sheepdog_snapshot_create_info(const char *sn_name, const char *id, const char *name, int64_t size, int is_snapshot) "sn_info: name %s id_str %s s: name %s vm_state_size %" PRId64 " " "is_snapshot %d" sheepdog_snapshot_create(const char *sn_name, const char *id) "%s %s" sheepdog_snapshot_create_inode(const char *name, uint32_t snap, uint32_t vdi) "s->inode: name %s snap_id 0x%" PRIx32 " vdi 0x%" PRIx32 + +# ssh.c +sftp_error(const char *op, const char *ssh_err, int ssh_err_code, unsigned long sftp_err_code) "%s failed: %s (libssh2 error code: %d, sftp error code: %lu)" diff --git a/block/vhdx-log.c b/block/vhdx-log.c index 3149ff08d8..5e946846f1 100644 --- a/block/vhdx-log.c +++ b/block/vhdx-log.c @@ -551,7 +551,7 @@ static int vhdx_log_flush(BlockDriverState *bs, BDRVVHDXState *s, } if (file_length < desc_entries->hdr.last_file_offset) { new_file_size = desc_entries->hdr.last_file_offset; - if (new_file_size % (1024*1024)) { + if (new_file_size % (1 * MiB)) { /* round up to nearest 1MB boundary */ new_file_size = QEMU_ALIGN_UP(new_file_size, MiB); if (new_file_size > INT64_MAX) { diff --git a/block/vhdx.c b/block/vhdx.c index b785aef4b7..a143a57657 100644 --- a/block/vhdx.c +++ b/block/vhdx.c @@ -1175,7 +1175,7 @@ static int vhdx_allocate_block(BlockDriverState *bs, BDRVVHDXState *s, *new_offset = current_len; /* per the spec, the address for a block is in units of 1MB */ - *new_offset = ROUND_UP(*new_offset, 1024 * 1024); + *new_offset = ROUND_UP(*new_offset, 1 * MiB); if (*new_offset > INT64_MAX) { return -EINVAL; } @@ -1338,7 +1338,7 @@ static coroutine_fn int vhdx_co_writev(BlockDriverState *bs, int64_t sector_num, case PAYLOAD_BLOCK_FULLY_PRESENT: /* if the file offset address is in the header zone, * there is a problem */ - if (sinfo.file_offset < (1024 * 1024)) { + if (sinfo.file_offset < (1 * MiB)) { ret = -EFAULT; goto error_bat_restore; } @@ -1889,7 +1889,8 @@ static int coroutine_fn vhdx_co_create(BlockdevCreateOptions *opts, return -EINVAL; } if (block_size > VHDX_BLOCK_SIZE_MAX) { - error_setg(errp, "Block size must not exceed %d", VHDX_BLOCK_SIZE_MAX); + error_setg(errp, "Block size must not exceed %" PRId64, + VHDX_BLOCK_SIZE_MAX); return -EINVAL; } diff --git a/block/vhdx.h b/block/vhdx.h index 1bfb4e4f73..0b74924cee 100644 --- a/block/vhdx.h +++ b/block/vhdx.h @@ -17,13 +17,11 @@ #ifndef BLOCK_VHDX_H #define BLOCK_VHDX_H - -#define KiB (1 * 1024) -#define MiB (KiB * 1024) -#define GiB (MiB * 1024) -#define TiB ((uint64_t) GiB * 1024) +#include "qemu/units.h" #define DEFAULT_LOG_SIZE 1048576 /* 1MiB */ +/* Note: can't use 1 * MiB, because it's passed to stringify() */ + /* Structures and fields present in the VHDX file */ /* The header section has the following blocks, @@ -36,7 +34,7 @@ * 0.........64KB...........128KB........192KB..........256KB................1MB */ -#define VHDX_HEADER_BLOCK_SIZE (64 * 1024) +#define VHDX_HEADER_BLOCK_SIZE (64 * KiB) #define VHDX_FILE_ID_OFFSET 0 #define VHDX_HEADER1_OFFSET (VHDX_HEADER_BLOCK_SIZE * 1) @@ -85,7 +83,7 @@ typedef struct QEMU_PACKED MSGUID { #define guid_eq(a, b) \ (memcmp(&(a), &(b), sizeof(MSGUID)) == 0) -#define VHDX_HEADER_SIZE (4 * 1024) /* although the vhdx_header struct in disk +#define VHDX_HEADER_SIZE (4 * KiB) /* although the vhdx_header struct in disk is only 582 bytes, for purposes of crc the header is the first 4KB of the 64KB block */ @@ -161,8 +159,8 @@ typedef struct QEMU_PACKED VHDXRegionTableEntry { /* ---- LOG ENTRY STRUCTURES ---- */ -#define VHDX_LOG_MIN_SIZE (1024 * 1024) -#define VHDX_LOG_SECTOR_SIZE 4096 +#define VHDX_LOG_MIN_SIZE (1 * MiB) +#define VHDX_LOG_SECTOR_SIZE (4 * KiB) #define VHDX_LOG_HDR_SIZE 64 #define VHDX_LOG_SIGNATURE 0x65676f6c typedef struct QEMU_PACKED VHDXLogEntryHeader { diff --git a/block/vmdk.c b/block/vmdk.c index d8c0c50390..de8cb859f8 100644 --- a/block/vmdk.c +++ b/block/vmdk.c @@ -195,13 +195,15 @@ static int vmdk_probe(const uint8_t *buf, int buf_size, const char *filename) } if (end - p >= strlen("version=X\n")) { if (strncmp("version=1\n", p, strlen("version=1\n")) == 0 || - strncmp("version=2\n", p, strlen("version=2\n")) == 0) { + strncmp("version=2\n", p, strlen("version=2\n")) == 0 || + strncmp("version=3\n", p, strlen("version=3\n")) == 0) { return 100; } } if (end - p >= strlen("version=X\r\n")) { if (strncmp("version=1\r\n", p, strlen("version=1\r\n")) == 0 || - strncmp("version=2\r\n", p, strlen("version=2\r\n")) == 0) { + strncmp("version=2\r\n", p, strlen("version=2\r\n")) == 0 || + strncmp("version=3\r\n", p, strlen("version=3\r\n")) == 0) { return 100; } } @@ -395,6 +397,8 @@ static int vmdk_parent_open(BlockDriverState *bs) pstrcpy(bs->auto_backing_file, end_name - p_name + 1, p_name); pstrcpy(bs->backing_file, sizeof(bs->backing_file), bs->auto_backing_file); + pstrcpy(bs->backing_format, sizeof(bs->backing_format), + "vmdk"); } out: diff --git a/block/vpc.c b/block/vpc.c index a902a4c54d..0c279b87c8 100644 --- a/block/vpc.c +++ b/block/vpc.c @@ -639,8 +639,10 @@ vpc_co_preadv(BlockDriverState *bs, uint64_t offset, uint64_t bytes, qemu_iovec_reset(&local_qiov); qemu_iovec_concat(&local_qiov, qiov, bytes_done, n_bytes); + qemu_co_mutex_unlock(&s->lock); ret = bdrv_co_preadv(bs->file, image_offset, n_bytes, &local_qiov, 0); + qemu_co_mutex_lock(&s->lock); if (ret < 0) { goto fail; } @@ -697,8 +699,10 @@ vpc_co_pwritev(BlockDriverState *bs, uint64_t offset, uint64_t bytes, qemu_iovec_reset(&local_qiov); qemu_iovec_concat(&local_qiov, qiov, bytes_done, n_bytes); + qemu_co_mutex_unlock(&s->lock); ret = bdrv_co_pwritev(bs->file, image_offset, n_bytes, &local_qiov, 0); + qemu_co_mutex_lock(&s->lock); if (ret < 0) { goto fail; } diff --git a/blockdev.c b/blockdev.c index 871966ca13..79fbac8450 100644 --- a/blockdev.c +++ b/blockdev.c @@ -40,6 +40,7 @@ #include "monitor/monitor.h" #include "qemu/error-report.h" #include "qemu/option.h" +#include "qemu/qemu-print.h" #include "qemu/config-file.h" #include "qapi/qapi-commands-block.h" #include "qapi/qapi-commands-transaction.h" @@ -301,7 +302,7 @@ DriveInfo *drive_get_next(BlockInterfaceType type) static void bdrv_format_print(void *opaque, const char *name) { - error_printf(" %s", name); + qemu_printf(" %s", name); } typedef struct { @@ -530,11 +531,11 @@ static BlockBackend *blockdev_init(const char *file, QDict *bs_opts, if ((buf = qemu_opt_get(opts, "format")) != NULL) { if (is_help_option(buf)) { - error_printf("Supported formats:"); + qemu_printf("Supported formats:"); bdrv_iterate_format(bdrv_format_print, NULL, false); - error_printf("\nSupported formats (read-only):"); + qemu_printf("\nSupported formats (read-only):"); bdrv_iterate_format(bdrv_format_print, NULL, true); - error_printf("\n"); + qemu_printf("\n"); goto early_err; } @@ -1257,7 +1258,6 @@ out_aio_context: * @node: The name of the BDS node to search for bitmaps * @name: The name of the bitmap to search for * @pbs: Output pointer for BDS lookup, if desired. Can be NULL. - * @paio: Output pointer for aio_context acquisition, if desired. Can be NULL. * @errp: Output pointer for error information. Can be NULL. * * @return: A bitmap object on success, or NULL on failure. @@ -2011,11 +2011,7 @@ static void block_dirty_bitmap_clear_prepare(BlkActionState *common, return; } - if (bdrv_dirty_bitmap_user_locked(state->bitmap)) { - error_setg(errp, "Cannot modify a bitmap in use by another operation"); - return; - } else if (bdrv_dirty_bitmap_readonly(state->bitmap)) { - error_setg(errp, "Cannot clear a readonly bitmap"); + if (bdrv_dirty_bitmap_check(state->bitmap, BDRV_BITMAP_DEFAULT, errp)) { return; } @@ -2060,10 +2056,7 @@ static void block_dirty_bitmap_enable_prepare(BlkActionState *common, return; } - if (bdrv_dirty_bitmap_user_locked(state->bitmap)) { - error_setg(errp, - "Bitmap '%s' is currently in use by another operation" - " and cannot be enabled", action->name); + if (bdrv_dirty_bitmap_check(state->bitmap, BDRV_BITMAP_ALLOW_RO, errp)) { return; } @@ -2101,10 +2094,7 @@ static void block_dirty_bitmap_disable_prepare(BlkActionState *common, return; } - if (bdrv_dirty_bitmap_user_locked(state->bitmap)) { - error_setg(errp, - "Bitmap '%s' is currently in use by another operation" - " and cannot be disabled", action->name); + if (bdrv_dirty_bitmap_check(state->bitmap, BDRV_BITMAP_ALLOW_RO, errp)) { return; } @@ -2875,7 +2865,7 @@ void qmp_block_dirty_bitmap_add(const char *node, const char *name, bdrv_disable_dirty_bitmap(bitmap); } - bdrv_dirty_bitmap_set_persistance(bitmap, persistent); + bdrv_dirty_bitmap_set_persistence(bitmap, persistent); out: if (aio_context) { aio_context_release(aio_context); @@ -2895,14 +2885,12 @@ void qmp_block_dirty_bitmap_remove(const char *node, const char *name, return; } - if (bdrv_dirty_bitmap_user_locked(bitmap)) { - error_setg(errp, - "Bitmap '%s' is currently in use by another operation and" - " cannot be removed", name); + if (bdrv_dirty_bitmap_check(bitmap, BDRV_BITMAP_BUSY | BDRV_BITMAP_RO, + errp)) { return; } - if (bdrv_dirty_bitmap_get_persistance(bitmap)) { + if (bdrv_dirty_bitmap_get_persistence(bitmap)) { aio_context = bdrv_get_aio_context(bs); aio_context_acquire(aio_context); bdrv_remove_persistent_dirty_bitmap(bs, name, &local_err); @@ -2934,13 +2922,7 @@ void qmp_block_dirty_bitmap_clear(const char *node, const char *name, return; } - if (bdrv_dirty_bitmap_user_locked(bitmap)) { - error_setg(errp, - "Bitmap '%s' is currently in use by another operation" - " and cannot be cleared", name); - return; - } else if (bdrv_dirty_bitmap_readonly(bitmap)) { - error_setg(errp, "Bitmap '%s' is readonly and cannot be cleared", name); + if (bdrv_dirty_bitmap_check(bitmap, BDRV_BITMAP_DEFAULT, errp)) { return; } @@ -2958,10 +2940,7 @@ void qmp_block_dirty_bitmap_enable(const char *node, const char *name, return; } - if (bdrv_dirty_bitmap_user_locked(bitmap)) { - error_setg(errp, - "Bitmap '%s' is currently in use by another operation" - " and cannot be enabled", name); + if (bdrv_dirty_bitmap_check(bitmap, BDRV_BITMAP_ALLOW_RO, errp)) { return; } @@ -2979,10 +2958,7 @@ void qmp_block_dirty_bitmap_disable(const char *node, const char *name, return; } - if (bdrv_dirty_bitmap_user_locked(bitmap)) { - error_setg(errp, - "Bitmap '%s' is currently in use by another operation" - " and cannot be disabled", name); + if (bdrv_dirty_bitmap_check(bitmap, BDRV_BITMAP_ALLOW_RO, errp)) { return; } @@ -3561,10 +3537,7 @@ static BlockJob *do_drive_backup(DriveBackup *backup, JobTxn *txn, bdrv_unref(target_bs); goto out; } - if (bdrv_dirty_bitmap_user_locked(bmap)) { - error_setg(errp, - "Bitmap '%s' is currently in use by another operation" - " and cannot be used for backup", backup->bitmap); + if (bdrv_dirty_bitmap_check(bmap, BDRV_BITMAP_DEFAULT, errp)) { goto out; } } @@ -3674,10 +3647,7 @@ BlockJob *do_blockdev_backup(BlockdevBackup *backup, JobTxn *txn, error_setg(errp, "Bitmap '%s' could not be found", backup->bitmap); goto out; } - if (bdrv_dirty_bitmap_user_locked(bmap)) { - error_setg(errp, - "Bitmap '%s' is currently in use by another operation" - " and cannot be used for backup", backup->bitmap); + if (bdrv_dirty_bitmap_check(bmap, BDRV_BITMAP_DEFAULT, errp)) { goto out; } } @@ -3787,6 +3757,39 @@ static void blockdev_mirror_common(const char *job_id, BlockDriverState *bs, sync = MIRROR_SYNC_MODE_FULL; } + if (has_replaces) { + BlockDriverState *to_replace_bs; + AioContext *replace_aio_context; + int64_t bs_size, replace_size; + + bs_size = bdrv_getlength(bs); + if (bs_size < 0) { + error_setg_errno(errp, -bs_size, "Failed to query device's size"); + return; + } + + to_replace_bs = check_to_replace_node(bs, replaces, errp); + if (!to_replace_bs) { + return; + } + + replace_aio_context = bdrv_get_aio_context(to_replace_bs); + aio_context_acquire(replace_aio_context); + replace_size = bdrv_getlength(to_replace_bs); + aio_context_release(replace_aio_context); + + if (replace_size < 0) { + error_setg_errno(errp, -replace_size, + "Failed to query the replacement node's size"); + return; + } + if (bs_size != replace_size) { + error_setg(errp, "cannot replace image with a mirror image of " + "different size"); + return; + } + } + /* pass the node name to replace to mirror start since it's loose coupling * and will allow to check whether the node still exist at mirror completion */ @@ -3847,33 +3850,11 @@ void qmp_drive_mirror(DriveMirror *arg, Error **errp) } if (arg->has_replaces) { - BlockDriverState *to_replace_bs; - AioContext *replace_aio_context; - int64_t replace_size; - if (!arg->has_node_name) { error_setg(errp, "a node-name must be provided when replacing a" " named node of the graph"); goto out; } - - to_replace_bs = check_to_replace_node(bs, arg->replaces, &local_err); - - if (!to_replace_bs) { - error_propagate(errp, local_err); - goto out; - } - - replace_aio_context = bdrv_get_aio_context(to_replace_bs); - aio_context_acquire(replace_aio_context); - replace_size = bdrv_getlength(to_replace_bs); - aio_context_release(replace_aio_context); - - if (size != replace_size) { - error_setg(errp, "cannot replace image with a mirror image of " - "different size"); - goto out; - } } if (arg->mode == NEW_IMAGE_MODE_ABSOLUTE_PATHS) { @@ -4287,6 +4268,53 @@ fail: visit_free(v); } +void qmp_x_blockdev_reopen(BlockdevOptions *options, Error **errp) +{ + BlockDriverState *bs; + AioContext *ctx; + QObject *obj; + Visitor *v = qobject_output_visitor_new(&obj); + Error *local_err = NULL; + BlockReopenQueue *queue; + QDict *qdict; + + /* Check for the selected node name */ + if (!options->has_node_name) { + error_setg(errp, "Node name not specified"); + goto fail; + } + + bs = bdrv_find_node(options->node_name); + if (!bs) { + error_setg(errp, "Cannot find node named '%s'", options->node_name); + goto fail; + } + + /* Put all options in a QDict and flatten it */ + visit_type_BlockdevOptions(v, NULL, &options, &local_err); + if (local_err) { + error_propagate(errp, local_err); + goto fail; + } + + visit_complete(v, &obj); + qdict = qobject_to(QDict, obj); + + qdict_flatten(qdict); + + /* Perform the reopen operation */ + ctx = bdrv_get_aio_context(bs); + aio_context_acquire(ctx); + bdrv_subtree_drained_begin(bs); + queue = bdrv_reopen_queue(NULL, bs, qdict, false); + bdrv_reopen_multiple(queue, errp); + bdrv_subtree_drained_end(bs); + aio_context_release(ctx); + +fail: + visit_free(v); +} + void qmp_blockdev_del(const char *node_name, Error **errp) { AioContext *aio_context; @@ -4452,22 +4480,22 @@ void qmp_x_blockdev_set_iothread(const char *node_name, StrOrNull *iothread, aio_context_release(old_context); } -void qmp_x_block_latency_histogram_set( - const char *device, +void qmp_block_latency_histogram_set( + const char *id, bool has_boundaries, uint64List *boundaries, bool has_boundaries_read, uint64List *boundaries_read, bool has_boundaries_write, uint64List *boundaries_write, bool has_boundaries_flush, uint64List *boundaries_flush, Error **errp) { - BlockBackend *blk = blk_by_name(device); + BlockBackend *blk = qmp_get_blk(NULL, id, errp); BlockAcctStats *stats; int ret; if (!blk) { - error_setg(errp, "Device '%s' not found", device); return; } + stats = blk_get_stats(blk); if (!has_boundaries && !has_boundaries_read && !has_boundaries_write && @@ -4482,7 +4510,7 @@ void qmp_x_block_latency_histogram_set( stats, BLOCK_ACCT_READ, has_boundaries_read ? boundaries_read : boundaries); if (ret) { - error_setg(errp, "Device '%s' set read boundaries fail", device); + error_setg(errp, "Device '%s' set read boundaries fail", id); return; } } @@ -4492,7 +4520,7 @@ void qmp_x_block_latency_histogram_set( stats, BLOCK_ACCT_WRITE, has_boundaries_write ? boundaries_write : boundaries); if (ret) { - error_setg(errp, "Device '%s' set write boundaries fail", device); + error_setg(errp, "Device '%s' set write boundaries fail", id); return; } } @@ -4502,7 +4530,7 @@ void qmp_x_block_latency_histogram_set( stats, BLOCK_ACCT_FLUSH, has_boundaries_flush ? boundaries_flush : boundaries); if (ret) { - error_setg(errp, "Device '%s' set flush boundaries fail", device); + error_setg(errp, "Device '%s' set flush boundaries fail", id); return; } } diff --git a/blockjob.c b/blockjob.c index 58de8cb024..730101d282 100644 --- a/blockjob.c +++ b/blockjob.c @@ -501,9 +501,11 @@ BlockErrorAction block_job_error_action(BlockJob *job, BlockdevOnError on_err, action); } if (action == BLOCK_ERROR_ACTION_STOP) { - job_pause(&job->job); - /* make the pause user visible, which will be resumed from QMP. */ - job->job.user_paused = true; + if (!job->job.user_paused) { + job_pause(&job->job); + /* make the pause user visible, which will be resumed from QMP. */ + job->job.user_paused = true; + } block_job_iostatus_set_err(job, error); } return action; diff --git a/bsd-user/main.c b/bsd-user/main.c index 0d3156974c..6192e9d91e 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -24,6 +24,7 @@ #include "qapi/error.h" #include "qemu.h" #include "qemu/config-file.h" +#include "qemu/error-report.h" #include "qemu/path.h" #include "qemu/help_option.h" #include "cpu.h" @@ -639,7 +640,7 @@ void cpu_loop(CPUSPARCState *env) badtrap: #endif printf ("Unhandled trap: 0x%x\n", trapnr); - cpu_dump_state(cs, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, 0); exit (1); } process_pending_signals (env); @@ -743,6 +744,7 @@ int main(int argc, char **argv) if (argc <= 1) usage(); + error_init(argv[0]); module_call_init(MODULE_INIT_TRACE); qemu_init_cpu_list(); module_call_init(MODULE_INIT_QOM); @@ -817,7 +819,7 @@ int main(int argc, char **argv) if (is_help_option(cpu_model)) { /* XXX: implement xxx_cpu_list for targets that still miss it */ #if defined(cpu_list) - cpu_list(stdout, &fprintf); + cpu_list(); #endif exit(1); } @@ -903,7 +905,7 @@ int main(int argc, char **argv) /* init tcg before creating CPUs and to get qemu_host_page_size */ tcg_exec_init(0); - cpu_type = parse_cpu_model(cpu_model); + cpu_type = parse_cpu_option(cpu_model); cpu = cpu_create(cpu_type); env = cpu->env_ptr; #if defined(TARGET_SPARC) || defined(TARGET_PPC) diff --git a/chardev/char-pty.c b/chardev/char-pty.c index b034332edd..04759b0ef9 100644 --- a/chardev/char-pty.c +++ b/chardev/char-pty.c @@ -28,6 +28,7 @@ #include "io/channel-file.h" #include "qemu/sockets.h" #include "qemu/error-report.h" +#include "qemu/qemu-print.h" #include "chardev/char-io.h" @@ -211,8 +212,8 @@ static void char_pty_open(Chardev *chr, qemu_set_nonblock(master_fd); chr->filename = g_strdup_printf("pty:%s", pty_name); - error_printf("char device redirected to %s (label %s)\n", - pty_name, chr->label); + qemu_printf("char device redirected to %s (label %s)\n", + pty_name, chr->label); s = PTY_CHARDEV(chr); s->ioc = QIO_CHANNEL(qio_channel_file_new_fd(master_fd)); diff --git a/chardev/char-socket.c b/chardev/char-socket.c index 3916505d67..b2cf593107 100644 --- a/chardev/char-socket.c +++ b/chardev/char-socket.c @@ -1263,10 +1263,14 @@ static bool qmp_chardev_validate_socket(ChardevSocket *sock, return false; } if (sock->has_wait) { - error_setg(errp, "%s", - "'wait' option is incompatible with " - "socket in client connect mode"); - return false; + warn_report("'wait' option is deprecated with " + "socket in client connect mode"); + if (sock->wait) { + error_setg(errp, "%s", + "'wait' option is incompatible with " + "socket in client connect mode"); + return false; + } } } diff --git a/chardev/char.c b/chardev/char.c index 514cd6b0c3..54724a56b1 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -28,6 +28,7 @@ #include "sysemu/sysemu.h" #include "qemu/config-file.h" #include "qemu/error-report.h" +#include "qemu/qemu-print.h" #include "chardev/char.h" #include "qapi/error.h" #include "qapi/qapi-commands-char.h" @@ -651,7 +652,7 @@ Chardev *qemu_chr_new_from_opts(QemuOpts *opts, GMainContext *context, chardev_name_foreach(help_string_append, str); - error_printf("Available chardev backend types: %s\n", str->str); + qemu_printf("Available chardev backend types: %s\n", str->str); g_string_free(str, true); return NULL; } diff --git a/chardev/trace-events b/chardev/trace-events index b8a7596344..5ea4408207 100644 --- a/chardev/trace-events +++ b/chardev/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# chardev/wctablet.c +# wctablet.c wct_init(void) "" wct_cmd_re(void) "" wct_cmd_st(void) "" @@ -9,7 +9,7 @@ wct_cmd_ts(int input) "0x%02x" wct_cmd_other(const char *cmd) "%s" wct_speed(int speed) "%d" -# chardev/spice.c +# spice.c spice_chr_discard_write(int len) "spice chr write discarded %d" spice_vmc_write(ssize_t out, int len) "spice wrote %zd of requested %d" spice_vmc_read(int bytes, int len) "spice read %d of requested %d" diff --git a/configure b/configure index cab830a4c9..60719ddcc5 100755 --- a/configure +++ b/configure @@ -278,6 +278,8 @@ ld_has() { # default parameters source_path=$(dirname "$0") +# make source path absolute +source_path=$(cd "$source_path"; pwd) cpu="" iasl="iasl" interp_prefix="/usr/gnemul/qemu-%M" @@ -327,6 +329,7 @@ git="git" # Don't accept a target_list environment variable. unset target_list +unset target_list_exclude # Default value for a variable defining feature "foo". # * foo="no" feature will only be used if --enable-foo arg is given @@ -456,6 +459,8 @@ glusterfs_xlator_opt="no" glusterfs_discard="no" glusterfs_fallocate="no" glusterfs_zerofill="no" +glusterfs_ftruncate_has_stat="no" +glusterfs_iocb_has_stat="no" gtk="" gtk_gl="no" tls_priority="NORMAL" @@ -517,8 +522,6 @@ for opt do ;; --cxx=*) CXX="$optarg" ;; - --source-path=*) source_path="$optarg" - ;; --cpu=*) cpu="$optarg" ;; --extra-cflags=*) QEMU_CFLAGS="$QEMU_CFLAGS $optarg" @@ -597,9 +600,6 @@ if test "$debug_info" = "yes"; then LDFLAGS="-g $LDFLAGS" fi -# make source path absolute -source_path=$(cd "$source_path"; pwd) - # running configure in the source tree? # we know that's the case if configure is there. if test -f "./configure"; then @@ -943,8 +943,6 @@ for opt do ;; --interp-prefix=*) interp_prefix="$optarg" ;; - --source-path=*) - ;; --cross-prefix=*) ;; --cc=*) @@ -988,6 +986,14 @@ for opt do --cpu=*) ;; --target-list=*) target_list="$optarg" + if test "$target_list_exclude"; then + error_exit "Can't mix --target-list with --target-list-exclude" + fi + ;; + --target-list-exclude=*) target_list_exclude="$optarg" + if test "$target_list"; then + error_exit "Can't mix --target-list-exclude with --target-list" + fi ;; --enable-trace-backends=*) trace_backends="$optarg" ;; @@ -1109,8 +1115,6 @@ for opt do ;; --disable-slirp) slirp="no" ;; - --enable-slirp=git) slirp="git" - ;; --enable-slirp=system) slirp="system" ;; --disable-vde) vde="no" @@ -1222,6 +1226,10 @@ for opt do ;; --enable-curses) curses="yes" ;; + --disable-iconv) iconv="no" + ;; + --enable-iconv) iconv="yes" + ;; --disable-curl) curl="no" ;; --enable-curl) curl="yes" @@ -1597,9 +1605,26 @@ if [ "$bsd_user" = "yes" ]; then mak_wilds="${mak_wilds} $source_path/default-configs/*-bsd-user.mak" fi -for config in $mak_wilds; do - default_target_list="${default_target_list} $(basename "$config" .mak)" -done +if test -z "$target_list_exclude"; then + for config in $mak_wilds; do + default_target_list="${default_target_list} $(basename "$config" .mak)" + done +else + exclude_list=$(echo "$target_list_exclude" | sed -e 's/,/ /g') + for config in $mak_wilds; do + target="$(basename "$config" .mak)" + exclude="no" + for excl in $exclude_list; do + if test "$excl" = "$target"; then + exclude="yes" + break; + fi + done + if test "$exclude" = "no"; then + default_target_list="${default_target_list} $target" + fi + done +fi # Enumerate public trace backends for --help output trace_backend_list=$(echo $(grep -le '^PUBLIC = True$' "$source_path"/scripts/tracetool/backend/*.py | sed -e 's/^.*\/\(.*\)\.py$/\1/')) @@ -1618,9 +1643,9 @@ Standard options: --target-list=LIST set target list (default: build everything) $(echo Available targets: $default_target_list | \ fold -s -w 53 | sed -e 's/^/ /') + --target-list-exclude=LIST exclude a set of targets from the default target-list Advanced options (experts only): - --source-path=PATH path of source code [$source_path] --cross-prefix=PREFIX use PREFIX for compile tools [$cross_prefix] --cc=CC use C compiler CC [$cc] --iasl=IASL use ACPI compiler IASL [$iasl] @@ -1711,6 +1736,7 @@ disabled with --disable-FEATURE, default is enabled if available: gtk gtk UI vte vte support for the gtk UI curses curses UI + iconv font glyph conversion support vnc VNC UI support vnc-sasl SASL encryption for VNC server vnc-jpeg JPEG lossy compression for VNC server @@ -3433,7 +3459,51 @@ EOF fi ########################################## +# iconv probe +if test "$iconv" != "no" ; then + cat > $TMPC << EOF +#include <iconv.h> +int main(void) { + iconv_t conv = iconv_open("WCHAR_T", "UCS-2"); + return conv != (iconv_t) -1; +} +EOF + iconv_prefix_list="/usr/local:/usr" + iconv_lib_list=":-liconv" + IFS=: + for iconv_prefix in $iconv_prefix_list; do + IFS=: + iconv_cflags="-I$iconv_prefix/include" + iconv_ldflags="-L$iconv_prefix/lib" + for iconv_link in $iconv_lib_list; do + unset IFS + iconv_lib="$iconv_ldflags $iconv_link" + echo "looking at iconv in '$iconv_cflags' '$iconv_lib'" >> config.log + if compile_prog "$iconv_cflags" "$iconv_lib" ; then + iconv_found=yes + break + fi + done + if test "$iconv_found" = yes ; then + break + fi + done + if test "$iconv_found" = "yes" ; then + iconv=yes + else + if test "$iconv" = "yes" ; then + feature_not_found "iconv" "Install iconv devel" + fi + iconv=no + fi +fi + +########################################## # curses probe +if test "$iconv" = "no" ; then + # curses will need iconv + curses=no +fi if test "$curses" != "no" ; then if test "$mingw32" = "yes" ; then curses_inc_list="$($pkg_config --cflags ncurses 2>/dev/null):" @@ -3447,14 +3517,17 @@ if test "$curses" != "no" ; then #include <locale.h> #include <curses.h> #include <wchar.h> +#include <langinfo.h> int main(void) { + const char *codeset; wchar_t wch = L'w'; setlocale(LC_ALL, ""); resize_term(0, 0); addwstr(L"wide chars\n"); addnwstr(&wch, 1); add_wch(WACS_DEGREE); - return 0; + codeset = nl_langinfo(CODESET); + return codeset != 0; } EOF IFS=: @@ -4091,6 +4164,38 @@ if test "$glusterfs" != "no" ; then glusterfs_fallocate="yes" glusterfs_zerofill="yes" fi + cat > $TMPC << EOF +#include <glusterfs/api/glfs.h> + +int +main(void) +{ + /* new glfs_ftruncate() passes two additional args */ + return glfs_ftruncate(NULL, 0, NULL, NULL); +} +EOF + if compile_prog "$glusterfs_cflags" "$glusterfs_libs" ; then + glusterfs_ftruncate_has_stat="yes" + fi + cat > $TMPC << EOF +#include <glusterfs/api/glfs.h> + +/* new glfs_io_cbk() passes two additional glfs_stat structs */ +static void +glusterfs_iocb(glfs_fd_t *fd, ssize_t ret, struct glfs_stat *prestat, struct glfs_stat *poststat, void *data) +{} + +int +main(void) +{ + glfs_io_cbk iocb = &glusterfs_iocb; + iocb(NULL, 0 , NULL, NULL, NULL); + return 0; +} +EOF + if compile_prog "$glusterfs_cflags" "$glusterfs_libs" ; then + glusterfs_iocb_has_stat="yes" + fi else if test "$glusterfs" = "yes" ; then feature_not_found "GlusterFS backend support" \ @@ -4850,7 +4955,7 @@ int main(void) { EOF if compile_prog "" "" ; then guest_agent_ntddscsi=yes - libs_qga="-lsetupapi $libs_qga" + libs_qga="-lsetupapi -lcfgmgr32 $libs_qga" fi fi @@ -5780,8 +5885,6 @@ case "$slirp" in "" | yes) if $pkg_config slirp; then slirp=system - elif test -e "${source_path}/.git" && test $git_update = 'yes' ; then - slirp=git elif test -e "${source_path}/slirp/Makefile" ; then slirp=internal elif test -z "$slirp" ; then @@ -5799,10 +5902,7 @@ case "$slirp" in esac case "$slirp" in - git | internal) - if test "$slirp" = git; then - git_submodules="${git_submodules} slirp" - fi + internal) mkdir -p slirp slirp_cflags="-I\$(SRC_PATH)/slirp/src -I\$(BUILD_DIR)/slirp/src" slirp_libs="-L\$(BUILD_DIR)/slirp -lslirp" @@ -6217,6 +6317,7 @@ echo "libgcrypt $gcrypt" echo "nettle $nettle $(echo_version $nettle $nettle_version)" echo "libtasn1 $tasn1" echo "PAM $auth_pam" +echo "iconv support $iconv" echo "curses support $curses" echo "virgl support $virglrenderer $(echo_version $virglrenderer $virgl_version)" echo "curl support $curl" @@ -6464,7 +6565,7 @@ if test "$slirp" != "no"; then echo "SLIRP_CFLAGS=$slirp_cflags" >> $config_host_mak echo "SLIRP_LIBS=$slirp_libs" >> $config_host_mak fi -if [ "$slirp" = "git" -o "$slirp" = "internal" ]; then +if [ "$slirp" = "internal" ]; then echo "config-host.h: subdir-slirp" >> $config_host_mak fi if test "$vde" = "yes" ; then @@ -6552,6 +6653,11 @@ fi if test "$cocoa" = "yes" ; then echo "CONFIG_COCOA=y" >> $config_host_mak fi +if test "$iconv" = "yes" ; then + echo "CONFIG_ICONV=y" >> $config_host_mak + echo "ICONV_CFLAGS=$iconv_cflags" >> $config_host_mak + echo "ICONV_LIBS=$iconv_lib" >> $config_host_mak +fi if test "$curses" = "yes" ; then echo "CONFIG_CURSES=m" >> $config_host_mak echo "CURSES_CFLAGS=$curses_inc" >> $config_host_mak @@ -6976,6 +7082,14 @@ if test "$glusterfs_zerofill" = "yes" ; then echo "CONFIG_GLUSTERFS_ZEROFILL=y" >> $config_host_mak fi +if test "$glusterfs_ftruncate_has_stat" = "yes" ; then + echo "CONFIG_GLUSTERFS_FTRUNCATE_HAS_STAT=y" >> $config_host_mak +fi + +if test "$glusterfs_iocb_has_stat" = "yes" ; then + echo "CONFIG_GLUSTERFS_IOCB_HAS_STAT=y" >> $config_host_mak +fi + if test "$libssh2" = "yes" ; then echo "CONFIG_LIBSSH2=m" >> $config_host_mak echo "LIBSSH2_CFLAGS=$libssh2_cflags" >> $config_host_mak @@ -7421,12 +7535,14 @@ case "$target_name" in TARGET_BASE_ARCH=riscv TARGET_ABI_DIR=riscv mttcg=yes + gdb_xml_files="riscv-32bit-cpu.xml riscv-32bit-fpu.xml riscv-32bit-csr.xml" target_compiler=$cross_cc_riscv32 ;; riscv64) TARGET_BASE_ARCH=riscv TARGET_ABI_DIR=riscv mttcg=yes + gdb_xml_files="riscv-64bit-cpu.xml riscv-64bit-fpu.xml riscv-64bit-csr.xml" target_compiler=$cross_cc_riscv64 ;; sh4|sh4eb) @@ -7770,6 +7886,7 @@ for bios_file in \ $source_path/pc-bios/*.img \ $source_path/pc-bios/openbios-* \ $source_path/pc-bios/u-boot.* \ + $source_path/pc-bios/edk2-*.fd.bz2 \ $source_path/pc-bios/palcode-* do LINKS="$LINKS pc-bios/$(basename $bios_file)" diff --git a/contrib/gitdm/domain-map b/contrib/gitdm/domain-map index 0ab41ee27a..fa9d454473 100644 --- a/contrib/gitdm/domain-map +++ b/contrib/gitdm/domain-map @@ -5,10 +5,15 @@ # amd.com AMD +citrix.com Citrix greensocs.com GreenSocs +fujitsu.com Fujitsu +huawei.com Huawei ibm.com IBM igalia.com Igalia +intel.com Intel linaro.org Linaro +microsoft.com Microsoft nokia.com Nokia oracle.com Oracle proxmox.com Proxmox diff --git a/contrib/gitdm/group-map-ibm b/contrib/gitdm/group-map-ibm index 22727319b3..da62fa3f44 100644 --- a/contrib/gitdm/group-map-ibm +++ b/contrib/gitdm/group-map-ibm @@ -11,3 +11,4 @@ groug@kaod.org jcfaracco@gmail.com joel@jms.id.au sjitindarsingh@gmail.com +tommusta@gmail.com diff --git a/contrib/gitdm/group-map-individuals b/contrib/gitdm/group-map-individuals index afdbe7d460..05e355d30e 100644 --- a/contrib/gitdm/group-map-individuals +++ b/contrib/gitdm/group-map-individuals @@ -8,3 +8,8 @@ f4bug@amsat.org mjt@tls.msk.ru mark.cave-ayland@ilande.co.uk +rth@twiddle.net +noring@nocrew.org +samuel.thibault@ens-lyon.org +aurelien@aurel32.net +balaton@eik.bme.hu diff --git a/contrib/gitdm/group-map-janustech b/contrib/gitdm/group-map-janustech new file mode 100644 index 0000000000..4ae7cc24f2 --- /dev/null +++ b/contrib/gitdm/group-map-janustech @@ -0,0 +1,5 @@ +# +# Janus Technologies contributors using non-corporate email +# + +marcel.apfelbaum@gmail.com diff --git a/contrib/gitdm/group-map-wavecomp b/contrib/gitdm/group-map-wavecomp index 2801a966b6..c5c57f0eaf 100644 --- a/contrib/gitdm/group-map-wavecomp +++ b/contrib/gitdm/group-map-wavecomp @@ -5,13 +5,25 @@ aleksandar.markovic@imgtec.com aleksandar.markovic@mips.com +alex.smith@imgtec.com +andrew.bennett@imgtec.com amarkovic@wavecomp.com arikalo@wavecomp.com +chris@mips.com dnikolic@wavecomp.com +ericj@mips.com +goran.ferenc@imgtec.com +james.cowgill@mips.com +james.hogan@imgtec.com james.hogan@mips.com leon.alrae@imgtec.com +matt.redfearn@imgtec.com matthew.fortune@mips.com +miodrag.dinic@imgtec.com +paul@archlinuxmips.org paul.burton@imgtec.com +petar.jovanovic@imgtec.com +petarj@mips.com pburton@wavecomp.com smarkovic@wavecomp.com yongbok.kim@imgtec.com diff --git a/contrib/libvhost-user/libvhost-user-glib.c b/contrib/libvhost-user/libvhost-user-glib.c index 545f089587..42660a1b36 100644 --- a/contrib/libvhost-user/libvhost-user-glib.c +++ b/contrib/libvhost-user/libvhost-user-glib.c @@ -68,15 +68,16 @@ static GSourceFuncs vug_src_funcs = { NULL }; -static GSource * -vug_source_new(VuDev *dev, int fd, GIOCondition cond, +GSource * +vug_source_new(VugDev *gdev, int fd, GIOCondition cond, vu_watch_cb vu_cb, gpointer data) { + VuDev *dev = &gdev->parent; GSource *gsrc; VugSrc *src; guint id; - g_assert(dev); + g_assert(gdev); g_assert(fd >= 0); g_assert(vu_cb); @@ -106,7 +107,7 @@ set_watch(VuDev *vu_dev, int fd, int vu_evt, vu_watch_cb cb, void *pvt) g_assert(cb); dev = container_of(vu_dev, VugDev, parent); - src = vug_source_new(vu_dev, fd, vu_evt, cb, pvt); + src = vug_source_new(dev, fd, vu_evt, cb, pvt); g_hash_table_replace(dev->fdmap, GINT_TO_POINTER(fd), src); } @@ -141,7 +142,7 @@ vug_init(VugDev *dev, int socket, dev->fdmap = g_hash_table_new_full(NULL, NULL, NULL, (GDestroyNotify) g_source_destroy); - dev->src = vug_source_new(&dev->parent, socket, G_IO_IN, vug_watch, NULL); + dev->src = vug_source_new(dev, socket, G_IO_IN, vug_watch, NULL); } void diff --git a/contrib/libvhost-user/libvhost-user-glib.h b/contrib/libvhost-user/libvhost-user-glib.h index 6b2110b94c..d3200f3afc 100644 --- a/contrib/libvhost-user/libvhost-user-glib.h +++ b/contrib/libvhost-user/libvhost-user-glib.h @@ -29,4 +29,7 @@ void vug_init(VugDev *dev, int socket, vu_panic_cb panic, const VuDevIface *iface); void vug_deinit(VugDev *dev); +GSource *vug_source_new(VugDev *dev, int fd, GIOCondition cond, + vu_watch_cb vu_cb, gpointer data); + #endif /* LIBVHOST_USER_GLIB_H */ diff --git a/contrib/libvhost-user/libvhost-user.c b/contrib/libvhost-user/libvhost-user.c index 3f14b4138b..e08d6c7b97 100644 --- a/contrib/libvhost-user/libvhost-user.c +++ b/contrib/libvhost-user/libvhost-user.c @@ -41,6 +41,8 @@ #endif #include "qemu/atomic.h" +#include "qemu/osdep.h" +#include "qemu/memfd.h" #include "libvhost-user.h" @@ -53,6 +55,18 @@ _min1 < _min2 ? _min1 : _min2; }) #endif +/* Round number down to multiple */ +#define ALIGN_DOWN(n, m) ((n) / (m) * (m)) + +/* Round number up to multiple */ +#define ALIGN_UP(n, m) ALIGN_DOWN((n) + (m) - 1, (m)) + +/* Align each region to cache line size in inflight buffer */ +#define INFLIGHT_ALIGNMENT 64 + +/* The version of inflight buffer */ +#define INFLIGHT_VERSION 1 + #define VHOST_USER_HDR_SIZE offsetof(VhostUserMsg, payload.u64) /* The version of the protocol we support */ @@ -66,6 +80,20 @@ } \ } while (0) +static inline +bool has_feature(uint64_t features, unsigned int fbit) +{ + assert(fbit < 64); + return !!(features & (1ULL << fbit)); +} + +static inline +bool vu_has_feature(VuDev *dev, + unsigned int fbit) +{ + return has_feature(dev->features, fbit); +} + static const char * vu_request_to_string(unsigned int req) { @@ -100,6 +128,8 @@ vu_request_to_string(unsigned int req) REQ(VHOST_USER_POSTCOPY_ADVISE), REQ(VHOST_USER_POSTCOPY_LISTEN), REQ(VHOST_USER_POSTCOPY_END), + REQ(VHOST_USER_GET_INFLIGHT_FD), + REQ(VHOST_USER_SET_INFLIGHT_FD), REQ(VHOST_USER_MAX), }; #undef REQ @@ -890,6 +920,91 @@ vu_check_queue_msg_file(VuDev *dev, VhostUserMsg *vmsg) return true; } +static int +inflight_desc_compare(const void *a, const void *b) +{ + VuVirtqInflightDesc *desc0 = (VuVirtqInflightDesc *)a, + *desc1 = (VuVirtqInflightDesc *)b; + + if (desc1->counter > desc0->counter && + (desc1->counter - desc0->counter) < VIRTQUEUE_MAX_SIZE * 2) { + return 1; + } + + return -1; +} + +static int +vu_check_queue_inflights(VuDev *dev, VuVirtq *vq) +{ + int i = 0; + + if (!has_feature(dev->protocol_features, + VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD)) { + return 0; + } + + if (unlikely(!vq->inflight)) { + return -1; + } + + if (unlikely(!vq->inflight->version)) { + /* initialize the buffer */ + vq->inflight->version = INFLIGHT_VERSION; + return 0; + } + + vq->used_idx = vq->vring.used->idx; + vq->resubmit_num = 0; + vq->resubmit_list = NULL; + vq->counter = 0; + + if (unlikely(vq->inflight->used_idx != vq->used_idx)) { + vq->inflight->desc[vq->inflight->last_batch_head].inflight = 0; + + barrier(); + + vq->inflight->used_idx = vq->used_idx; + } + + for (i = 0; i < vq->inflight->desc_num; i++) { + if (vq->inflight->desc[i].inflight == 1) { + vq->inuse++; + } + } + + vq->shadow_avail_idx = vq->last_avail_idx = vq->inuse + vq->used_idx; + + if (vq->inuse) { + vq->resubmit_list = malloc(sizeof(VuVirtqInflightDesc) * vq->inuse); + if (!vq->resubmit_list) { + return -1; + } + + for (i = 0; i < vq->inflight->desc_num; i++) { + if (vq->inflight->desc[i].inflight) { + vq->resubmit_list[vq->resubmit_num].index = i; + vq->resubmit_list[vq->resubmit_num].counter = + vq->inflight->desc[i].counter; + vq->resubmit_num++; + } + } + + if (vq->resubmit_num > 1) { + qsort(vq->resubmit_list, vq->resubmit_num, + sizeof(VuVirtqInflightDesc), inflight_desc_compare); + } + vq->counter = vq->resubmit_list[0].counter + 1; + } + + /* in case of I/O hang after reconnecting */ + if (eventfd_write(vq->kick_fd, 1)) { + return -1; + } + + return 0; +} + static bool vu_set_vring_kick_exec(VuDev *dev, VhostUserMsg *vmsg) { @@ -907,10 +1022,8 @@ vu_set_vring_kick_exec(VuDev *dev, VhostUserMsg *vmsg) dev->vq[index].kick_fd = -1; } - if (!(vmsg->payload.u64 & VHOST_USER_VRING_NOFD_MASK)) { - dev->vq[index].kick_fd = vmsg->fds[0]; - DPRINT("Got kick_fd: %d for vq: %d\n", vmsg->fds[0], index); - } + dev->vq[index].kick_fd = vmsg->fds[0]; + DPRINT("Got kick_fd: %d for vq: %d\n", vmsg->fds[0], index); dev->vq[index].started = true; if (dev->iface->queue_set_started) { @@ -925,6 +1038,10 @@ vu_set_vring_kick_exec(VuDev *dev, VhostUserMsg *vmsg) dev->vq[index].kick_fd, index); } + if (vu_check_queue_inflights(dev, &dev->vq[index])) { + vu_panic(dev, "Failed to check inflights for vq: %d\n", index); + } + return false; } @@ -995,8 +1112,11 @@ vu_set_vring_call_exec(VuDev *dev, VhostUserMsg *vmsg) dev->vq[index].call_fd = -1; } - if (!(vmsg->payload.u64 & VHOST_USER_VRING_NOFD_MASK)) { - dev->vq[index].call_fd = vmsg->fds[0]; + dev->vq[index].call_fd = vmsg->fds[0]; + + /* in case of I/O hang after reconnecting */ + if (eventfd_write(vmsg->fds[0], 1)) { + return -1; } DPRINT("Got call_fd: %d for vq: %d\n", vmsg->fds[0], index); @@ -1020,9 +1140,7 @@ vu_set_vring_err_exec(VuDev *dev, VhostUserMsg *vmsg) dev->vq[index].err_fd = -1; } - if (!(vmsg->payload.u64 & VHOST_USER_VRING_NOFD_MASK)) { - dev->vq[index].err_fd = vmsg->fds[0]; - } + dev->vq[index].err_fd = vmsg->fds[0]; return false; } @@ -1215,6 +1333,116 @@ vu_set_postcopy_end(VuDev *dev, VhostUserMsg *vmsg) return true; } +static inline uint64_t +vu_inflight_queue_size(uint16_t queue_size) +{ + return ALIGN_UP(sizeof(VuDescStateSplit) * queue_size + + sizeof(uint16_t), INFLIGHT_ALIGNMENT); +} + +static bool +vu_get_inflight_fd(VuDev *dev, VhostUserMsg *vmsg) +{ + int fd; + void *addr; + uint64_t mmap_size; + uint16_t num_queues, queue_size; + + if (vmsg->size != sizeof(vmsg->payload.inflight)) { + vu_panic(dev, "Invalid get_inflight_fd message:%d", vmsg->size); + vmsg->payload.inflight.mmap_size = 0; + return true; + } + + num_queues = vmsg->payload.inflight.num_queues; + queue_size = vmsg->payload.inflight.queue_size; + + DPRINT("set_inflight_fd num_queues: %"PRId16"\n", num_queues); + DPRINT("set_inflight_fd queue_size: %"PRId16"\n", queue_size); + + mmap_size = vu_inflight_queue_size(queue_size) * num_queues; + + addr = qemu_memfd_alloc("vhost-inflight", mmap_size, + F_SEAL_GROW | F_SEAL_SHRINK | F_SEAL_SEAL, + &fd, NULL); + + if (!addr) { + vu_panic(dev, "Failed to alloc vhost inflight area"); + vmsg->payload.inflight.mmap_size = 0; + return true; + } + + memset(addr, 0, mmap_size); + + dev->inflight_info.addr = addr; + dev->inflight_info.size = vmsg->payload.inflight.mmap_size = mmap_size; + dev->inflight_info.fd = vmsg->fds[0] = fd; + vmsg->fd_num = 1; + vmsg->payload.inflight.mmap_offset = 0; + + DPRINT("send inflight mmap_size: %"PRId64"\n", + vmsg->payload.inflight.mmap_size); + DPRINT("send inflight mmap offset: %"PRId64"\n", + vmsg->payload.inflight.mmap_offset); + + return true; +} + +static bool +vu_set_inflight_fd(VuDev *dev, VhostUserMsg *vmsg) +{ + int fd, i; + uint64_t mmap_size, mmap_offset; + uint16_t num_queues, queue_size; + void *rc; + + if (vmsg->fd_num != 1 || + vmsg->size != sizeof(vmsg->payload.inflight)) { + vu_panic(dev, "Invalid set_inflight_fd message size:%d fds:%d", + vmsg->size, vmsg->fd_num); + return false; + } + + fd = vmsg->fds[0]; + mmap_size = vmsg->payload.inflight.mmap_size; + mmap_offset = vmsg->payload.inflight.mmap_offset; + num_queues = vmsg->payload.inflight.num_queues; + queue_size = vmsg->payload.inflight.queue_size; + + DPRINT("set_inflight_fd mmap_size: %"PRId64"\n", mmap_size); + DPRINT("set_inflight_fd mmap_offset: %"PRId64"\n", mmap_offset); + DPRINT("set_inflight_fd num_queues: %"PRId16"\n", num_queues); + DPRINT("set_inflight_fd queue_size: %"PRId16"\n", queue_size); + + rc = mmap(0, mmap_size, PROT_READ | PROT_WRITE, MAP_SHARED, + fd, mmap_offset); + + if (rc == MAP_FAILED) { + vu_panic(dev, "set_inflight_fd mmap error: %s", strerror(errno)); + return false; + } + + if (dev->inflight_info.fd) { + close(dev->inflight_info.fd); + } + + if (dev->inflight_info.addr) { + munmap(dev->inflight_info.addr, dev->inflight_info.size); + } + + dev->inflight_info.fd = fd; + dev->inflight_info.addr = rc; + dev->inflight_info.size = mmap_size; + + for (i = 0; i < num_queues; i++) { + dev->vq[i].inflight = (VuVirtqInflight *)rc; + dev->vq[i].inflight->desc_num = queue_size; + rc = (void *)((char *)rc + vu_inflight_queue_size(queue_size)); + } + + return false; +} + static bool vu_process_message(VuDev *dev, VhostUserMsg *vmsg) { @@ -1285,13 +1513,18 @@ vu_process_message(VuDev *dev, VhostUserMsg *vmsg) case VHOST_USER_SET_CONFIG: return vu_set_config(dev, vmsg); case VHOST_USER_NONE: - break; + /* if you need processing before exit, override iface->process_msg */ + exit(0); case VHOST_USER_POSTCOPY_ADVISE: return vu_set_postcopy_advise(dev, vmsg); case VHOST_USER_POSTCOPY_LISTEN: return vu_set_postcopy_listen(dev, vmsg); case VHOST_USER_POSTCOPY_END: return vu_set_postcopy_end(dev, vmsg); + case VHOST_USER_GET_INFLIGHT_FD: + return vu_get_inflight_fd(dev, vmsg); + case VHOST_USER_SET_INFLIGHT_FD: + return vu_set_inflight_fd(dev, vmsg); default: vmsg_close_fds(vmsg); vu_panic(dev, "Unhandled request: %d", vmsg->request); @@ -1359,8 +1592,24 @@ vu_deinit(VuDev *dev) close(vq->err_fd); vq->err_fd = -1; } + + if (vq->resubmit_list) { + free(vq->resubmit_list); + vq->resubmit_list = NULL; + } + + vq->inflight = NULL; } + if (dev->inflight_info.addr) { + munmap(dev->inflight_info.addr, dev->inflight_info.size); + dev->inflight_info.addr = NULL; + } + + if (dev->inflight_info.fd > 0) { + close(dev->inflight_info.fd); + dev->inflight_info.fd = -1; + } vu_close_log(dev); if (dev->slave_fd != -1) { @@ -1687,20 +1936,6 @@ vu_queue_empty(VuDev *dev, VuVirtq *vq) return vring_avail_idx(vq) == vq->last_avail_idx; } -static inline -bool has_feature(uint64_t features, unsigned int fbit) -{ - assert(fbit < 64); - return !!(features & (1ULL << fbit)); -} - -static inline -bool vu_has_feature(VuDev *dev, - unsigned int fbit) -{ - return has_feature(dev->features, fbit); -} - static bool vring_notify(VuDev *dev, VuVirtq *vq) { @@ -1829,12 +2064,6 @@ virtqueue_map_desc(VuDev *dev, *p_num_sg = num_sg; } -/* Round number down to multiple */ -#define ALIGN_DOWN(n, m) ((n) / (m) * (m)) - -/* Round number up to multiple */ -#define ALIGN_UP(n, m) ALIGN_DOWN((n) + (m) - 1, (m)) - static void * virtqueue_alloc_element(size_t sz, unsigned out_num, unsigned in_num) @@ -1853,49 +2082,20 @@ virtqueue_alloc_element(size_t sz, return elem; } -void * -vu_queue_pop(VuDev *dev, VuVirtq *vq, size_t sz) +static void * +vu_queue_map_desc(VuDev *dev, VuVirtq *vq, unsigned int idx, size_t sz) { - unsigned int i, head, max, desc_len; + struct vring_desc *desc = vq->vring.desc; uint64_t desc_addr, read_len; + unsigned int desc_len; + unsigned int max = vq->vring.num; + unsigned int i = idx; VuVirtqElement *elem; - unsigned out_num, in_num; + unsigned int out_num = 0, in_num = 0; struct iovec iov[VIRTQUEUE_MAX_SIZE]; struct vring_desc desc_buf[VIRTQUEUE_MAX_SIZE]; - struct vring_desc *desc; int rc; - if (unlikely(dev->broken) || - unlikely(!vq->vring.avail)) { - return NULL; - } - - if (vu_queue_empty(dev, vq)) { - return NULL; - } - /* Needed after virtio_queue_empty(), see comment in - * virtqueue_num_heads(). */ - smp_rmb(); - - /* When we start there are none of either input nor output. */ - out_num = in_num = 0; - - max = vq->vring.num; - if (vq->inuse >= vq->vring.num) { - vu_panic(dev, "Virtqueue size exceeded"); - return NULL; - } - - if (!virtqueue_get_head(dev, vq, vq->last_avail_idx++, &head)) { - return NULL; - } - - if (vu_has_feature(dev, VIRTIO_RING_F_EVENT_IDX)) { - vring_set_avail_event(vq, vq->last_avail_idx); - } - - i = head; - desc = vq->vring.desc; if (desc[i].flags & VRING_DESC_F_INDIRECT) { if (desc[i].len % sizeof(struct vring_desc)) { vu_panic(dev, "Invalid size for indirect buffer table"); @@ -1947,12 +2147,13 @@ vu_queue_pop(VuDev *dev, VuVirtq *vq, size_t sz) } while (rc == VIRTQUEUE_READ_DESC_MORE); if (rc == VIRTQUEUE_READ_DESC_ERROR) { + vu_panic(dev, "read descriptor error"); return NULL; } /* Now copy what we have collected and mapped */ elem = virtqueue_alloc_element(sz, out_num, in_num); - elem->index = head; + elem->index = idx; for (i = 0; i < out_num; i++) { elem->out_sg[i] = iov[i]; } @@ -1960,11 +2161,142 @@ vu_queue_pop(VuDev *dev, VuVirtq *vq, size_t sz) elem->in_sg[i] = iov[out_num + i]; } + return elem; +} + +static int +vu_queue_inflight_get(VuDev *dev, VuVirtq *vq, int desc_idx) +{ + if (!has_feature(dev->protocol_features, + VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD)) { + return 0; + } + + if (unlikely(!vq->inflight)) { + return -1; + } + + vq->inflight->desc[desc_idx].counter = vq->counter++; + vq->inflight->desc[desc_idx].inflight = 1; + + return 0; +} + +static int +vu_queue_inflight_pre_put(VuDev *dev, VuVirtq *vq, int desc_idx) +{ + if (!has_feature(dev->protocol_features, + VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD)) { + return 0; + } + + if (unlikely(!vq->inflight)) { + return -1; + } + + vq->inflight->last_batch_head = desc_idx; + + return 0; +} + +static int +vu_queue_inflight_post_put(VuDev *dev, VuVirtq *vq, int desc_idx) +{ + if (!has_feature(dev->protocol_features, + VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD)) { + return 0; + } + + if (unlikely(!vq->inflight)) { + return -1; + } + + barrier(); + + vq->inflight->desc[desc_idx].inflight = 0; + + barrier(); + + vq->inflight->used_idx = vq->used_idx; + + return 0; +} + +void * +vu_queue_pop(VuDev *dev, VuVirtq *vq, size_t sz) +{ + int i; + unsigned int head; + VuVirtqElement *elem; + + if (unlikely(dev->broken) || + unlikely(!vq->vring.avail)) { + return NULL; + } + + if (unlikely(vq->resubmit_list && vq->resubmit_num > 0)) { + i = (--vq->resubmit_num); + elem = vu_queue_map_desc(dev, vq, vq->resubmit_list[i].index, sz); + + if (!vq->resubmit_num) { + free(vq->resubmit_list); + vq->resubmit_list = NULL; + } + + return elem; + } + + if (vu_queue_empty(dev, vq)) { + return NULL; + } + /* + * Needed after virtio_queue_empty(), see comment in + * virtqueue_num_heads(). + */ + smp_rmb(); + + if (vq->inuse >= vq->vring.num) { + vu_panic(dev, "Virtqueue size exceeded"); + return NULL; + } + + if (!virtqueue_get_head(dev, vq, vq->last_avail_idx++, &head)) { + return NULL; + } + + if (vu_has_feature(dev, VIRTIO_RING_F_EVENT_IDX)) { + vring_set_avail_event(vq, vq->last_avail_idx); + } + + elem = vu_queue_map_desc(dev, vq, head, sz); + + if (!elem) { + return NULL; + } + vq->inuse++; + vu_queue_inflight_get(dev, vq, head); + return elem; } +static void +vu_queue_detach_element(VuDev *dev, VuVirtq *vq, VuVirtqElement *elem, + size_t len) +{ + vq->inuse--; + /* unmap, when DMA support is added */ +} + +void +vu_queue_unpop(VuDev *dev, VuVirtq *vq, VuVirtqElement *elem, + size_t len) +{ + vq->last_avail_idx--; + vu_queue_detach_element(dev, vq, elem, len); +} + bool vu_queue_rewind(VuDev *dev, VuVirtq *vq, unsigned int num) { @@ -2106,5 +2438,7 @@ vu_queue_push(VuDev *dev, VuVirtq *vq, const VuVirtqElement *elem, unsigned int len) { vu_queue_fill(dev, vq, elem, len, 0); + vu_queue_inflight_pre_put(dev, vq, elem->index); vu_queue_flush(dev, vq, 1); + vu_queue_inflight_post_put(dev, vq, elem->index); } diff --git a/contrib/libvhost-user/libvhost-user.h b/contrib/libvhost-user/libvhost-user.h index 4aa55b4d2d..414ceb0a2f 100644 --- a/contrib/libvhost-user/libvhost-user.h +++ b/contrib/libvhost-user/libvhost-user.h @@ -53,6 +53,7 @@ enum VhostUserProtocolFeature { VHOST_USER_PROTOCOL_F_CONFIG = 9, VHOST_USER_PROTOCOL_F_SLAVE_SEND_FD = 10, VHOST_USER_PROTOCOL_F_HOST_NOTIFIER = 11, + VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD = 12, VHOST_USER_PROTOCOL_F_MAX }; @@ -91,6 +92,8 @@ typedef enum VhostUserRequest { VHOST_USER_POSTCOPY_ADVISE = 28, VHOST_USER_POSTCOPY_LISTEN = 29, VHOST_USER_POSTCOPY_END = 30, + VHOST_USER_GET_INFLIGHT_FD = 31, + VHOST_USER_SET_INFLIGHT_FD = 32, VHOST_USER_MAX } VhostUserRequest; @@ -138,6 +141,13 @@ typedef struct VhostUserVringArea { uint64_t offset; } VhostUserVringArea; +typedef struct VhostUserInflight { + uint64_t mmap_size; + uint64_t mmap_offset; + uint16_t num_queues; + uint16_t queue_size; +} VhostUserInflight; + #if defined(_WIN32) # define VU_PACKED __attribute__((gcc_struct, packed)) #else @@ -145,7 +155,7 @@ typedef struct VhostUserVringArea { #endif typedef struct VhostUserMsg { - VhostUserRequest request; + int request; #define VHOST_USER_VERSION_MASK (0x3) #define VHOST_USER_REPLY_MASK (0x1 << 2) @@ -163,6 +173,7 @@ typedef struct VhostUserMsg { VhostUserLog log; VhostUserConfig config; VhostUserVringArea area; + VhostUserInflight inflight; } payload; int fds[VHOST_MEMORY_MAX_NREGIONS]; @@ -234,9 +245,61 @@ typedef struct VuRing { uint32_t flags; } VuRing; +typedef struct VuDescStateSplit { + /* Indicate whether this descriptor is inflight or not. + * Only available for head-descriptor. */ + uint8_t inflight; + + /* Padding */ + uint8_t padding[5]; + + /* Maintain a list for the last batch of used descriptors. + * Only available when batching is used for submitting */ + uint16_t next; + + /* Used to preserve the order of fetching available descriptors. + * Only available for head-descriptor. */ + uint64_t counter; +} VuDescStateSplit; + +typedef struct VuVirtqInflight { + /* The feature flags of this region. Now it's initialized to 0. */ + uint64_t features; + + /* The version of this region. It's 1 currently. + * Zero value indicates a vm reset happened. */ + uint16_t version; + + /* The size of VuDescStateSplit array. It's equal to the virtqueue + * size. Slave could get it from queue size field of VhostUserInflight. */ + uint16_t desc_num; + + /* The head of list that track the last batch of used descriptors. */ + uint16_t last_batch_head; + + /* Storing the idx value of used ring */ + uint16_t used_idx; + + /* Used to track the state of each descriptor in descriptor table */ + VuDescStateSplit desc[0]; +} VuVirtqInflight; + +typedef struct VuVirtqInflightDesc { + uint16_t index; + uint64_t counter; +} VuVirtqInflightDesc; + typedef struct VuVirtq { VuRing vring; + VuVirtqInflight *inflight; + + VuVirtqInflightDesc *resubmit_list; + + uint16_t resubmit_num; + + uint64_t counter; + /* Next head to pop */ uint16_t last_avail_idx; @@ -279,11 +342,18 @@ typedef void (*vu_set_watch_cb) (VuDev *dev, int fd, int condition, vu_watch_cb cb, void *data); typedef void (*vu_remove_watch_cb) (VuDev *dev, int fd); +typedef struct VuDevInflightInfo { + int fd; + void *addr; + uint64_t size; +} VuDevInflightInfo; + struct VuDev { int sock; uint32_t nregions; VuDevRegion regions[VHOST_MEMORY_MAX_NREGIONS]; VuVirtq vq[VHOST_MAX_NR_VIRTQUEUE]; + VuDevInflightInfo inflight_info; int log_call_fd; int slave_fd; uint64_t log_size; @@ -458,6 +528,20 @@ void vu_queue_notify(VuDev *dev, VuVirtq *vq); */ void *vu_queue_pop(VuDev *dev, VuVirtq *vq, size_t sz); + +/** + * vu_queue_unpop: + * @dev: a VuDev context + * @vq: a VuVirtq queue + * @elem: The #VuVirtqElement + * @len: number of bytes written + * + * Pretend the most recent element wasn't popped from the virtqueue. The next + * call to vu_queue_pop() will refetch the element. + */ +void vu_queue_unpop(VuDev *dev, VuVirtq *vq, VuVirtqElement *elem, + size_t len); + /** * vu_queue_rewind: * @dev: a VuDev context diff --git a/contrib/rdmacm-mux/main.c b/contrib/rdmacm-mux/main.c index ae88c77a1e..21cc804367 100644 --- a/contrib/rdmacm-mux/main.c +++ b/contrib/rdmacm-mux/main.c @@ -300,7 +300,7 @@ static void hash_tbl_remove_fd_ifid_pair(int fd) pthread_rwlock_unlock(&server.lock); } -static int get_fd(const char *mad, int *fd, __be64 *gid_ifid) +static int get_fd(const char *mad, int umad_len, int *fd, __be64 *gid_ifid) { struct umad_hdr *hdr = (struct umad_hdr *)mad; char *data = (char *)hdr + sizeof(*hdr); @@ -308,13 +308,35 @@ static int get_fd(const char *mad, int *fd, __be64 *gid_ifid) uint16_t attr_id = be16toh(hdr->attr_id); int rc = 0; + if (umad_len <= sizeof(*hdr)) { + rc = -EINVAL; + syslog(LOG_DEBUG, "Ignoring MAD packets with header only\n"); + goto out; + } + switch (attr_id) { case UMAD_CM_ATTR_REQ: + if (unlikely(umad_len < sizeof(*hdr) + CM_REQ_DGID_POS + + sizeof(*gid_ifid))) { + rc = -EINVAL; + syslog(LOG_WARNING, + "Invalid MAD packet size (%d) for attr_id 0x%x\n", umad_len, + attr_id); + goto out; + } memcpy(gid_ifid, data + CM_REQ_DGID_POS, sizeof(*gid_ifid)); rc = hash_tbl_search_fd_by_ifid(fd, gid_ifid); break; case UMAD_CM_ATTR_SIDR_REQ: + if (unlikely(umad_len < sizeof(*hdr) + CM_SIDR_REQ_DGID_POS + + sizeof(*gid_ifid))) { + rc = -EINVAL; + syslog(LOG_WARNING, + "Invalid MAD packet size (%d) for attr_id 0x%x\n", umad_len, + attr_id); + goto out; + } memcpy(gid_ifid, data + CM_SIDR_REQ_DGID_POS, sizeof(*gid_ifid)); rc = hash_tbl_search_fd_by_ifid(fd, gid_ifid); break; @@ -331,6 +353,13 @@ static int get_fd(const char *mad, int *fd, __be64 *gid_ifid) data += sizeof(comm_id); /* Fall through */ case UMAD_CM_ATTR_SIDR_REP: + if (unlikely(umad_len < sizeof(*hdr) + sizeof(comm_id))) { + rc = -EINVAL; + syslog(LOG_WARNING, + "Invalid MAD packet size (%d) for attr_id 0x%x\n", umad_len, + attr_id); + goto out; + } memcpy(&comm_id, data, sizeof(comm_id)); if (comm_id) { rc = hash_tbl_search_fd_by_comm_id(comm_id, fd, gid_ifid); @@ -344,6 +373,7 @@ static int get_fd(const char *mad, int *fd, __be64 *gid_ifid) syslog(LOG_DEBUG, "mad_to_vm: %d 0x%x 0x%x\n", *fd, attr_id, comm_id); +out: return rc; } @@ -372,7 +402,8 @@ static void *umad_recv_thread_func(void *args) } while (rc && server.run); if (server.run) { - rc = get_fd(msg.umad.mad, &fd, &msg.hdr.sgid.global.interface_id); + rc = get_fd(msg.umad.mad, msg.umad_len, &fd, + &msg.hdr.sgid.global.interface_id); if (rc) { continue; } diff --git a/cpus.c b/cpus.c index e83f72b48b..e58e7ab0f6 100644 --- a/cpus.c +++ b/cpus.c @@ -31,6 +31,7 @@ #include "qapi/qapi-events-run-state.h" #include "qapi/qmp/qerror.h" #include "qemu/error-report.h" +#include "qemu/qemu-print.h" #include "sysemu/sysemu.h" #include "sysemu/block-backend.h" #include "exec/gdbstub.h" @@ -1009,7 +1010,7 @@ void hw_error(const char *fmt, ...) fprintf(stderr, "\n"); CPU_FOREACH(cpu) { fprintf(stderr, "CPU #%d:\n", cpu->cpu_index); - cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU); + cpu_dump_state(cpu, stderr, CPU_DUMP_FPU); } va_end(ap); abort(); @@ -2180,11 +2181,11 @@ int vm_stop_force_state(RunState state) } } -void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg) +void list_cpus(const char *optarg) { /* XXX: implement xxx_cpu_list for targets that still miss it */ #if defined(cpu_list) - cpu_list(f, cpu_fprintf); + cpu_list(); #endif } @@ -2454,19 +2455,21 @@ void qmp_inject_nmi(Error **errp) nmi_monitor_handle(monitor_get_cpu_index(), errp); } -void dump_drift_info(FILE *f, fprintf_function cpu_fprintf) +void dump_drift_info(void) { if (!use_icount) { return; } - cpu_fprintf(f, "Host - Guest clock %"PRIi64" ms\n", + qemu_printf("Host - Guest clock %"PRIi64" ms\n", (cpu_get_clock() - cpu_get_icount())/SCALE_MS); if (icount_align_option) { - cpu_fprintf(f, "Max guest delay %"PRIi64" ms\n", -max_delay/SCALE_MS); - cpu_fprintf(f, "Max guest advance %"PRIi64" ms\n", max_advance/SCALE_MS); + qemu_printf("Max guest delay %"PRIi64" ms\n", + -max_delay / SCALE_MS); + qemu_printf("Max guest advance %"PRIi64" ms\n", + max_advance / SCALE_MS); } else { - cpu_fprintf(f, "Max guest delay NA\n"); - cpu_fprintf(f, "Max guest advance NA\n"); + qemu_printf("Max guest delay NA\n"); + qemu_printf("Max guest advance NA\n"); } } diff --git a/crypto/block-luks.c b/crypto/block-luks.c index 6bac79c3ab..5a69b3ce74 100644 --- a/crypto/block-luks.c +++ b/crypto/block-luks.c @@ -146,7 +146,7 @@ struct QCryptoBlockLUKSKeySlot { uint32_t key_offset; /* number of anti-forensic stripes */ uint32_t stripes; -} QEMU_PACKED; +}; QEMU_BUILD_BUG_ON(sizeof(struct QCryptoBlockLUKSKeySlot) != 48); @@ -191,7 +191,7 @@ struct QCryptoBlockLUKSHeader { /* key slots */ QCryptoBlockLUKSKeySlot key_slots[QCRYPTO_BLOCK_LUKS_NUM_KEY_SLOTS]; -} QEMU_PACKED; +}; QEMU_BUILD_BUG_ON(sizeof(struct QCryptoBlockLUKSHeader) != 592); diff --git a/crypto/trace-events b/crypto/trace-events index a38ad7b787..9e594d30e8 100644 --- a/crypto/trace-events +++ b/crypto/trace-events @@ -1,16 +1,16 @@ # See docs/devel/tracing.txt for syntax documentation. -# crypto/tlscreds.c +# tlscreds.c qcrypto_tls_creds_load_dh(void *creds, const char *filename) "TLS creds load DH creds=%p filename=%s" qcrypto_tls_creds_get_path(void *creds, const char *filename, const char *path) "TLS creds path creds=%p filename=%s path=%s" -# crypto/tlscredsanon.c +# tlscredsanon.c qcrypto_tls_creds_anon_load(void *creds, const char *dir) "TLS creds anon load creds=%p dir=%s" -# crypto/tlscredspsk.c +# tlscredspsk.c qcrypto_tls_creds_psk_load(void *creds, const char *dir) "TLS creds psk load creds=%p dir=%s" -# crypto/tlscredsx509.c +# tlscredsx509.c qcrypto_tls_creds_x509_load(void *creds, const char *dir) "TLS creds x509 load creds=%p dir=%s" qcrypto_tls_creds_x509_check_basic_constraints(void *creds, const char *file, int status) "TLS creds x509 check basic constraints creds=%p file=%s status=%d" qcrypto_tls_creds_x509_check_key_usage(void *creds, const char *file, int status, int usage, int critical) "TLS creds x509 check key usage creds=%p file=%s status=%d usage=%d critical=%d" @@ -18,6 +18,6 @@ qcrypto_tls_creds_x509_check_key_purpose(void *creds, const char *file, int stat qcrypto_tls_creds_x509_load_cert(void *creds, int isServer, const char *file) "TLS creds x509 load cert creds=%p isServer=%d file=%s" qcrypto_tls_creds_x509_load_cert_list(void *creds, const char *file) "TLS creds x509 load cert list creds=%p file=%s" -# crypto/tlssession.c +# tlssession.c qcrypto_tls_session_new(void *session, void *creds, const char *hostname, const char *authzid, int endpoint) "TLS session new session=%p creds=%p hostname=%s authzid=%s endpoint=%d" qcrypto_tls_session_check_creds(void *session, const char *status) "TLS session check creds session=%p status=%s" diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak index 2a7efc1167..613d19a06d 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -2,6 +2,7 @@ CONFIG_PCI=y CONFIG_PCI_DEVICES=y +CONFIG_PCI_TESTDEV=y CONFIG_VGA=y CONFIG_NAND=y CONFIG_ECC=y diff --git a/default-configs/mips-softmmu-common.mak b/default-configs/mips-softmmu-common.mak index 0795d522db..8e54a74b7a 100644 --- a/default-configs/mips-softmmu-common.mak +++ b/default-configs/mips-softmmu-common.mak @@ -35,6 +35,7 @@ CONFIG_MIPS_CPS=y CONFIG_MIPS_ITU=y CONFIG_R4K=y CONFIG_MALTA=y +CONFIG_PCNET_PCI=y CONFIG_MIPSSIM=y CONFIG_ACPI_SMBUS=y CONFIG_SMBUS_EEPROM=y diff --git a/default-configs/mips64el-softmmu.mak b/default-configs/mips64el-softmmu.mak index 8b255efc54..a67c9517a2 100644 --- a/default-configs/mips64el-softmmu.mak +++ b/default-configs/mips64el-softmmu.mak @@ -6,6 +6,8 @@ CONFIG_RC4030=y CONFIG_DP8393X=y CONFIG_DS1225Y=y CONFIG_FULONG=y +CONFIG_ATI_VGA=y +CONFIG_RTL8139_PCI=y CONFIG_JAZZ=y CONFIG_G364FB=y CONFIG_JAZZ_LED=y diff --git a/default-configs/nios2-softmmu.mak b/default-configs/nios2-softmmu.mak index e11dc54960..e130d024e6 100644 --- a/default-configs/nios2-softmmu.mak +++ b/default-configs/nios2-softmmu.mak @@ -3,3 +3,4 @@ # Boards: # CONFIG_NIOS2_10M50=y +CONFIG_NIOS2_GENERIC_NOMMU=y diff --git a/device-hotplug.c b/device-hotplug.c index 6090d5f1e9..6153259d71 100644 --- a/device-hotplug.c +++ b/device-hotplug.c @@ -48,7 +48,7 @@ static DriveInfo *add_init_drive(const char *optstr) mc = MACHINE_GET_CLASS(current_machine); dinfo = drive_new(opts, mc->block_default_type, &err); - if (!dinfo) { + if (err) { error_report_err(err); qemu_opts_del(opts); return NULL; diff --git a/device_tree.c b/device_tree.c index 296278e12a..f8b46b3c73 100644 --- a/device_tree.c +++ b/device_tree.c @@ -84,6 +84,10 @@ void *load_device_tree(const char *filename_path, int *sizep) filename_path); goto fail; } + if (dt_size > INT_MAX / 2 - 10000) { + error_report("Device tree file '%s' is too large", filename_path); + goto fail; + } /* Expand to 2x size to give enough room for manipulation. */ dt_size += 10000; diff --git a/disas.c b/disas.c index d9aa713a40..41ad0102e2 100644 --- a/disas.c +++ b/disas.c @@ -1,8 +1,9 @@ /* General "disassemble this chunk" code. Used for debugging. */ #include "qemu/osdep.h" #include "qemu-common.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" #include "elf.h" +#include "qemu/qemu-print.h" #include "cpu.h" #include "disas/disas.h" @@ -609,7 +610,7 @@ void monitor_disas(Monitor *mon, CPUState *cpu, int count, i; CPUDebug s; - INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf); + INIT_DISASSEMBLE_INFO(s.info, NULL, qemu_fprintf); s.cpu = cpu; s.info.read_memory_func diff --git a/disas/alpha.c b/disas/alpha.c index a0c9ecd49d..3db90fa665 100644 --- a/disas/alpha.c +++ b/disas/alpha.c @@ -20,7 +20,7 @@ along with this file; see the file COPYING. If not, see <http://www.gnu.org/licenses/>. */ #include "qemu/osdep.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" /* MAX is redefined below, so remove any previous definition. */ #undef MAX diff --git a/disas/arm-a64.cc b/disas/arm-a64.cc index 9280950ce3..9fa779e175 100644 --- a/disas/arm-a64.cc +++ b/disas/arm-a64.cc @@ -19,7 +19,7 @@ extern "C" { #include "qemu/osdep.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" } #include "vixl/a64/disasm-a64.h" diff --git a/disas/arm.c b/disas/arm.c index 17ea120b44..7d940f2396 100644 --- a/disas/arm.c +++ b/disas/arm.c @@ -23,7 +23,7 @@ for things we don't care about. */ #include "qemu/osdep.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" #define ARM_EXT_V1 0 #define ARM_EXT_V2 0 diff --git a/disas/cris.c b/disas/cris.c index 2dd56deea4..bf9eafc415 100644 --- a/disas/cris.c +++ b/disas/cris.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qemu-common.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" #include "target/cris/opcode-cris.h" #define CONST_STRNEQ(STR1,STR2) (strncmp ((STR1), (STR2), sizeof (STR2) - 1) == 0) diff --git a/disas/hppa.c b/disas/hppa.c index a2d371fdb1..2dbd1fc445 100644 --- a/disas/hppa.c +++ b/disas/hppa.c @@ -19,7 +19,7 @@ along with this program; if not, see <http://www.gnu.org/licenses/>. */ #include "qemu/osdep.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" /* HP PA-RISC SOM object file format: definitions internal to BFD. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, diff --git a/disas/i386.c b/disas/i386.c index fc03b9f06a..4c1f0f877b 100644 --- a/disas/i386.c +++ b/disas/i386.c @@ -32,7 +32,7 @@ the Intel manual for details. */ #include "qemu/osdep.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" #include "qemu/cutils.h" /* include/opcode/i386.h r1.78 */ diff --git a/disas/lm32.c b/disas/lm32.c index fcc2cde23d..c0ef8160fe 100644 --- a/disas/lm32.c +++ b/disas/lm32.c @@ -19,7 +19,7 @@ */ #include "qemu/osdep.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" typedef enum { LM32_OP_SRUI = 0, LM32_OP_NORI, LM32_OP_MULI, LM32_OP_SH, LM32_OP_LB, diff --git a/disas/m68k.c b/disas/m68k.c index e544c7137f..863409c67c 100644 --- a/disas/m68k.c +++ b/disas/m68k.c @@ -4,7 +4,7 @@ #include "qemu/osdep.h" #include <math.h> -#include "disas/bfd.h" +#include "disas/dis-asm.h" /* **** floatformat.h from sourceware.org CVS 2005-08-14. */ /* IEEE floating point support declarations, for GDB, the GNU Debugger. diff --git a/disas/microblaze.c b/disas/microblaze.c index c23605043a..0b89b9c4fa 100644 --- a/disas/microblaze.c +++ b/disas/microblaze.c @@ -577,7 +577,7 @@ static const char pvr_register_prefix[] = "rpvr"; #endif /* MICROBLAZE_OPC */ -#include "disas/bfd.h" +#include "disas/dis-asm.h" #define get_field_rd(instr) get_field(instr, RD_MASK, RD_LOW) #define get_field_r1(instr) get_field(instr, RA_MASK, RA_LOW) diff --git a/disas/mips.c b/disas/mips.c index 97f661a37e..dfefe5e589 100644 --- a/disas/mips.c +++ b/disas/mips.c @@ -20,7 +20,7 @@ You should have received a copy of the GNU General Public License along with this program; if not, see <http://www.gnu.org/licenses/>. */ #include "qemu/osdep.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" /* mips.h. Mips opcode list for GDB, the GNU debugger. Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 diff --git a/disas/moxie.c b/disas/moxie.c index 70b49ed74b..e94ab4c33d 100644 --- a/disas/moxie.c +++ b/disas/moxie.c @@ -18,7 +18,7 @@ #define STATIC_TABLE #define DEFINE_TABLE -#include "disas/bfd.h" +#include "disas/dis-asm.h" static void *stream; diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp index c8495b1a19..90e63b8367 100644 --- a/disas/nanomips.cpp +++ b/disas/nanomips.cpp @@ -29,7 +29,7 @@ extern "C" { #include "qemu/osdep.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" } #include <cstring> diff --git a/disas/nios2.c b/disas/nios2.c index de11f04cc4..c3e82140c7 100644 --- a/disas/nios2.c +++ b/disas/nios2.c @@ -36,7 +36,7 @@ /*#include "bfd.h"*/ #include "qemu/osdep.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" /**************************************************************************** diff --git a/disas/ppc.c b/disas/ppc.c index da1140ba2b..a545437de9 100644 --- a/disas/ppc.c +++ b/disas/ppc.c @@ -19,7 +19,7 @@ You should have received a copy of the GNU General Public License along with this file; see the file COPYING. If not, see <http://www.gnu.org/licenses/>. */ #include "qemu/osdep.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" #define BFD_DEFAULT_TARGET_SIZE 64 /* ppc.h -- Header file for PowerPC opcode table diff --git a/disas/riscv.c b/disas/riscv.c index 7fd1019623..59a9b0437a 100644 --- a/disas/riscv.c +++ b/disas/riscv.c @@ -18,7 +18,7 @@ */ #include "qemu/osdep.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" /* types */ @@ -87,33 +87,10 @@ typedef enum { typedef enum { rvc_end, - rvc_simm_6, - rvc_imm_6, - rvc_imm_7, - rvc_imm_8, - rvc_imm_9, - rvc_imm_10, - rvc_imm_12, - rvc_imm_18, - rvc_imm_nz, - rvc_imm_x2, - rvc_imm_x4, - rvc_imm_x8, - rvc_imm_x16, - rvc_rd_b3, - rvc_rs1_b3, - rvc_rs2_b3, - rvc_rd_eq_rs1, rvc_rd_eq_ra, - rvc_rd_eq_sp, rvc_rd_eq_x0, - rvc_rs1_eq_sp, rvc_rs1_eq_x0, rvc_rs2_eq_x0, - rvc_rd_ne_x0_x2, - rvc_rd_ne_x0, - rvc_rs1_ne_x0, - rvc_rs2_ne_x0, rvc_rs2_eq_rs1, rvc_rs1_eq_ra, rvc_imm_eq_zero, @@ -2522,111 +2499,16 @@ static bool check_constraints(rv_decode *dec, const rvc_constraint *c) uint8_t rd = dec->rd, rs1 = dec->rs1, rs2 = dec->rs2; while (*c != rvc_end) { switch (*c) { - case rvc_simm_6: - if (!(imm >= -32 && imm < 32)) { - return false; - } - break; - case rvc_imm_6: - if (!(imm <= 63)) { - return false; - } - break; - case rvc_imm_7: - if (!(imm <= 127)) { - return false; - } - break; - case rvc_imm_8: - if (!(imm <= 255)) { - return false; - } - break; - case rvc_imm_9: - if (!(imm <= 511)) { - return false; - } - break; - case rvc_imm_10: - if (!(imm <= 1023)) { - return false; - } - break; - case rvc_imm_12: - if (!(imm <= 4095)) { - return false; - } - break; - case rvc_imm_18: - if (!(imm <= 262143)) { - return false; - } - break; - case rvc_imm_nz: - if (!(imm != 0)) { - return false; - } - break; - case rvc_imm_x2: - if (!((imm & 0b1) == 0)) { - return false; - } - break; - case rvc_imm_x4: - if (!((imm & 0b11) == 0)) { - return false; - } - break; - case rvc_imm_x8: - if (!((imm & 0b111) == 0)) { - return false; - } - break; - case rvc_imm_x16: - if (!((imm & 0b1111) == 0)) { - return false; - } - break; - case rvc_rd_b3: - if (!(rd >= 8 && rd <= 15)) { - return false; - } - break; - case rvc_rs1_b3: - if (!(rs1 >= 8 && rs1 <= 15)) { - return false; - } - break; - case rvc_rs2_b3: - if (!(rs2 >= 8 && rs2 <= 15)) { - return false; - } - break; - case rvc_rd_eq_rs1: - if (!(rd == rs1)) { - return false; - } - break; case rvc_rd_eq_ra: if (!(rd == 1)) { return false; } break; - case rvc_rd_eq_sp: - if (!(rd == 2)) { - return false; - } - break; case rvc_rd_eq_x0: if (!(rd == 0)) { return false; } break; - case rvc_rs1_eq_sp: - if (!(rs1 == 2)) { - return false; - } - break; case rvc_rs1_eq_x0: if (!(rs1 == 0)) { return false; @@ -2637,26 +2519,6 @@ static bool check_constraints(rv_decode *dec, const rvc_constraint *c) return false; } break; - case rvc_rd_ne_x0_x2: - if (!(rd != 0 && rd != 2)) { - return false; - } - break; - case rvc_rd_ne_x0: - if (!(rd != 0)) { - return false; - } - break; - case rvc_rs1_ne_x0: - if (!(rs1 != 0)) { - return false; - } - break; - case rvc_rs2_ne_x0: - if (!(rs2 != 0)) { - return false; - } - break; case rvc_rs2_eq_rs1: if (!(rs2 == rs1)) { return false; diff --git a/disas/s390.c b/disas/s390.c index 6393860239..b1f4e2a0c1 100644 --- a/disas/s390.c +++ b/disas/s390.c @@ -22,7 +22,7 @@ #include "qemu/osdep.h" #include "qemu-common.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" /* include/opcode/s390.h revision 1.9 */ /* s390.h -- Header file for S390 opcode table diff --git a/disas/sh4.c b/disas/sh4.c index 6b66176bed..55ef865a36 100644 --- a/disas/sh4.c +++ b/disas/sh4.c @@ -16,7 +16,7 @@ along with this program; if not, see <http://www.gnu.org/licenses/>. */ #include "qemu/osdep.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" #define DEFINE_TABLE diff --git a/disas/sparc.c b/disas/sparc.c index f120f4e86d..5689533ce1 100644 --- a/disas/sparc.c +++ b/disas/sparc.c @@ -27,7 +27,7 @@ see <http://www.gnu.org/licenses/>. */ #include "qemu/osdep.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" /* The SPARC opcode table (and other related data) is defined in the opcodes library in sparc-opc.c. If you change anything here, make diff --git a/disas/tci.c b/disas/tci.c index 1cdf5eeafc..f1d6c6b469 100644 --- a/disas/tci.c +++ b/disas/tci.c @@ -19,7 +19,7 @@ #include "qemu/osdep.h" #include "qemu-common.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" #include "tcg/tcg.h" /* Disassemble TCI bytecode. */ diff --git a/disas/xtensa.c b/disas/xtensa.c index 5e3870b9ad..d7dda8c2d6 100644 --- a/disas/xtensa.c +++ b/disas/xtensa.c @@ -26,7 +26,7 @@ */ #include "qemu/osdep.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" #include "hw/xtensa/xtensa-isa.h" int print_insn_xtensa(bfd_vma memaddr, struct disassemble_info *info) diff --git a/docs/devel/decodetree.rst b/docs/devel/decodetree.rst new file mode 100644 index 0000000000..44ac621ea8 --- /dev/null +++ b/docs/devel/decodetree.rst @@ -0,0 +1,221 @@ +======================== +Decodetree Specification +======================== + +A *decodetree* is built from instruction *patterns*. A pattern may +represent a single architectural instruction or a group of same, depending +on what is convenient for further processing. + +Each pattern has both *fixedbits* and *fixedmask*, the combination of which +describes the condition under which the pattern is matched:: + + (insn & fixedmask) == fixedbits + +Each pattern may have *fields*, which are extracted from the insn and +passed along to the translator. Examples of such are registers, +immediates, and sub-opcodes. + +In support of patterns, one may declare *fields*, *argument sets*, and +*formats*, each of which may be re-used to simplify further definitions. + +Fields +====== + +Syntax:: + + field_def := '%' identifier ( unnamed_field )+ ( !function=identifier )? + unnamed_field := number ':' ( 's' ) number + +For *unnamed_field*, the first number is the least-significant bit position +of the field and the second number is the length of the field. If the 's' is +present, the field is considered signed. If multiple ``unnamed_fields`` are +present, they are concatenated. In this way one can define disjoint fields. + +If ``!function`` is specified, the concatenated result is passed through the +named function, taking and returning an integral value. + +FIXME: the fields of the structure into which this result will be stored +is restricted to ``int``. Which means that we cannot expand 64-bit items. + +Field examples: + ++---------------------------+---------------------------------------------+ +| Input | Generated code | ++===========================+=============================================+ +| %disp 0:s16 | sextract(i, 0, 16) | ++---------------------------+---------------------------------------------+ +| %imm9 16:6 10:3 | extract(i, 16, 6) << 3 | extract(i, 10, 3) | ++---------------------------+---------------------------------------------+ +| %disp12 0:s1 1:1 2:10 | sextract(i, 0, 1) << 11 | | +| | extract(i, 1, 1) << 10 | | +| | extract(i, 2, 10) | ++---------------------------+---------------------------------------------+ +| %shimm8 5:s8 13:1 | expand_shimm8(sextract(i, 5, 8) << 1 | | +| !function=expand_shimm8 | extract(i, 13, 1)) | ++---------------------------+---------------------------------------------+ + +Argument Sets +============= + +Syntax:: + + args_def := '&' identifier ( args_elt )+ ( !extern )? + args_elt := identifier + +Each *args_elt* defines an argument within the argument set. +Each argument set will be rendered as a C structure "arg_$name" +with each of the fields being one of the member arguments. + +If ``!extern`` is specified, the backing structure is assumed +to have been already declared, typically via a second decoder. + +Argument sets are useful when one wants to define helper functions +for the translator functions that can perform operations on a common +set of arguments. This can ensure, for instance, that the ``AND`` +pattern and the ``OR`` pattern put their operands into the same named +structure, so that a common ``gen_logic_insn`` may be able to handle +the operations common between the two. + +Argument set examples:: + + ®3 ra rb rc + &loadstore reg base offset + + +Formats +======= + +Syntax:: + + fmt_def := '@' identifier ( fmt_elt )+ + fmt_elt := fixedbit_elt | field_elt | field_ref | args_ref + fixedbit_elt := [01.-]+ + field_elt := identifier ':' 's'? number + field_ref := '%' identifier | identifier '=' '%' identifier + args_ref := '&' identifier + +Defining a format is a handy way to avoid replicating groups of fields +across many instruction patterns. + +A *fixedbit_elt* describes a contiguous sequence of bits that must +be 1, 0, or don't care. The difference between '.' and '-' +is that '.' means that the bit will be covered with a field or a +final 0 or 1 from the pattern, and '-' means that the bit is really +ignored by the cpu and will not be specified. + +A *field_elt* describes a simple field only given a width; the position of +the field is implied by its position with respect to other *fixedbit_elt* +and *field_elt*. + +If any *fixedbit_elt* or *field_elt* appear, then all bits must be defined. +Padding with a *fixedbit_elt* of all '.' is an easy way to accomplish that. + +A *field_ref* incorporates a field by reference. This is the only way to +add a complex field to a format. A field may be renamed in the process +via assignment to another identifier. This is intended to allow the +same argument set be used with disjoint named fields. + +A single *args_ref* may specify an argument set to use for the format. +The set of fields in the format must be a subset of the arguments in +the argument set. If an argument set is not specified, one will be +inferred from the set of fields. + +It is recommended, but not required, that all *field_ref* and *args_ref* +appear at the end of the line, not interleaving with *fixedbit_elf* or +*field_elt*. + +Format examples:: + + @opr ...... ra:5 rb:5 ... 0 ....... rc:5 + @opi ...... ra:5 lit:8 1 ....... rc:5 + +Patterns +======== + +Syntax:: + + pat_def := identifier ( pat_elt )+ + pat_elt := fixedbit_elt | field_elt | field_ref | args_ref | fmt_ref | const_elt + fmt_ref := '@' identifier + const_elt := identifier '=' number + +The *fixedbit_elt* and *field_elt* specifiers are unchanged from formats. +A pattern that does not specify a named format will have one inferred +from a referenced argument set (if present) and the set of fields. + +A *const_elt* allows a argument to be set to a constant value. This may +come in handy when fields overlap between patterns and one has to +include the values in the *fixedbit_elt* instead. + +The decoder will call a translator function for each pattern matched. + +Pattern examples:: + + addl_r 010000 ..... ..... .... 0000000 ..... @opr + addl_i 010000 ..... ..... .... 0000000 ..... @opi + +which will, in part, invoke:: + + trans_addl_r(ctx, &arg_opr, insn) + +and:: + + trans_addl_i(ctx, &arg_opi, insn) + +Pattern Groups +============== + +Syntax:: + + group := '{' ( pat_def | group )+ '}' + +A *group* begins with a lone open-brace, with all subsequent lines +indented two spaces, and ending with a lone close-brace. Groups +may be nested, increasing the required indentation of the lines +within the nested group to two spaces per nesting level. + +Unlike ungrouped patterns, grouped patterns are allowed to overlap. +Conflicts are resolved by selecting the patterns in order. If all +of the fixedbits for a pattern match, its translate function will +be called. If the translate function returns false, then subsequent +patterns within the group will be matched. + +The following example from PA-RISC shows specialization of the *or* +instruction:: + + { + { + nop 000010 ----- ----- 0000 001001 0 00000 + copy 000010 00000 r1:5 0000 001001 0 rt:5 + } + or 000010 rt2:5 r1:5 cf:4 001001 0 rt:5 + } + +When the *cf* field is zero, the instruction has no side effects, +and may be specialized. When the *rt* field is zero, the output +is discarded and so the instruction has no effect. When the *rt2* +field is zero, the operation is ``reg[rt] | 0`` and so encodes +the canonical register copy operation. + +The output from the generator might look like:: + + switch (insn & 0xfc000fe0) { + case 0x08000240: + /* 000010.. ........ ....0010 010..... */ + if ((insn & 0x0000f000) == 0x00000000) { + /* 000010.. ........ 00000010 010..... */ + if ((insn & 0x0000001f) == 0x00000000) { + /* 000010.. ........ 00000010 01000000 */ + extract_decode_Fmt_0(&u.f_decode0, insn); + if (trans_nop(ctx, &u.f_decode0)) return true; + } + if ((insn & 0x03e00000) == 0x00000000) { + /* 00001000 000..... 00000010 010..... */ + extract_decode_Fmt_1(&u.f_decode1, insn); + if (trans_copy(ctx, &u.f_decode1)) return true; + } + } + extract_decode_Fmt_2(&u.f_decode2, insn); + if (trans_or(ctx, &u.f_decode2)) return true; + return false; + } diff --git a/docs/devel/index.rst b/docs/devel/index.rst index 6b11e49caa..ebbab636ce 100644 --- a/docs/devel/index.rst +++ b/docs/devel/index.rst @@ -19,4 +19,4 @@ Contents: migration stable-process testing - + decodetree diff --git a/docs/devel/s390-dasd-ipl.txt b/docs/devel/s390-dasd-ipl.txt new file mode 100644 index 0000000000..9107e048e4 --- /dev/null +++ b/docs/devel/s390-dasd-ipl.txt @@ -0,0 +1,133 @@ +***************************** +***** s390 hardware IPL ***** +***************************** + +The s390 hardware IPL process consists of the following steps. + +1. A READ IPL ccw is constructed in memory location 0x0. + This ccw, by definition, reads the IPL1 record which is located on the disk + at cylinder 0 track 0 record 1. Note that the chain flag is on in this ccw + so when it is complete another ccw will be fetched and executed from memory + location 0x08. + +2. Execute the Read IPL ccw at 0x00, thereby reading IPL1 data into 0x00. + IPL1 data is 24 bytes in length and consists of the following pieces of + information: [psw][read ccw][tic ccw]. When the machine executes the Read + IPL ccw it read the 24-bytes of IPL1 to be read into memory starting at + location 0x0. Then the ccw program at 0x08 which consists of a read + ccw and a tic ccw is automatically executed because of the chain flag from + the original READ IPL ccw. The read ccw will read the IPL2 data into memory + and the TIC (Transfer In Channel) will transfer control to the channel + program contained in the IPL2 data. The TIC channel command is the + equivalent of a branch/jump/goto instruction for channel programs. + NOTE: The ccws in IPL1 are defined by the architecture to be format 0. + +3. Execute IPL2. + The TIC ccw instruction at the end of the IPL1 channel program will begin + the execution of the IPL2 channel program. IPL2 is stage-2 of the boot + process and will contain a larger channel program than IPL1. The point of + IPL2 is to find and load either the operating system or a small program that + loads the operating system from disk. At the end of this step all or some of + the real operating system is loaded into memory and we are ready to hand + control over to the guest operating system. At this point the guest + operating system is entirely responsible for loading any more data it might + need to function. NOTE: The IPL2 channel program might read data into memory + location 0 thereby overwriting the IPL1 psw and channel program. This is ok + as long as the data placed in location 0 contains a psw whose instruction + address points to the guest operating system code to execute at the end of + the IPL/boot process. + NOTE: The ccws in IPL2 are defined by the architecture to be format 0. + +4. Start executing the guest operating system. + The psw that was loaded into memory location 0 as part of the ipl process + should contain the needed flags for the operating system we have loaded. The + psw's instruction address will point to the location in memory where we want + to start executing the operating system. This psw is loaded (via LPSW + instruction) causing control to be passed to the operating system code. + +In a non-virtualized environment this process, handled entirely by the hardware, +is kicked off by the user initiating a "Load" procedure from the hardware +management console. This "Load" procedure crafts a special "Read IPL" ccw in +memory location 0x0 that reads IPL1. It then executes this ccw thereby kicking +off the reading of IPL1 data. Since the channel program from IPL1 will be +written immediately after the special "Read IPL" ccw, the IPL1 channel program +will be executed immediately (the special read ccw has the chaining bit turned +on). The TIC at the end of the IPL1 channel program will cause the IPL2 channel +program to be executed automatically. After this sequence completes the "Load" +procedure then loads the psw from 0x0. + +********************************************************** +***** How this all pertains to QEMU (and the kernel) ***** +********************************************************** + +In theory we should merely have to do the following to IPL/boot a guest +operating system from a DASD device: + +1. Place a "Read IPL" ccw into memory location 0x0 with chaining bit on. +2. Execute channel program at 0x0. +3. LPSW 0x0. + +However, our emulation of the machine's channel program logic within the kernel +is missing one key feature that is required for this process to work: +non-prefetch of ccw data. + +When we start a channel program we pass the channel subsystem parameters via an +ORB (Operation Request Block). One of those parameters is a prefetch bit. If the +bit is on then the vfio-ccw kernel driver is allowed to read the entire channel +program from guest memory before it starts executing it. This means that any +channel commands that read additional channel commands will not work as expected +because the newly read commands will only exist in guest memory and NOT within +the kernel's channel subsystem memory. The kernel vfio-ccw driver currently +requires this bit to be on for all channel programs. This is a problem because +the IPL process consists of transferring control from the "Read IPL" ccw +immediately to the IPL1 channel program that was read by "Read IPL". + +Not being able to turn off prefetch will also prevent the TIC at the end of the +IPL1 channel program from transferring control to the IPL2 channel program. + +Lastly, in some cases (the zipl bootloader for example) the IPL2 program also +transfers control to another channel program segment immediately after reading +it from the disk. So we need to be able to handle this case. + +************************** +***** What QEMU does ***** +************************** + +Since we are forced to live with prefetch we cannot use the very simple IPL +procedure we defined in the preceding section. So we compensate by doing the +following. + +1. Place "Read IPL" ccw into memory location 0x0, but turn off chaining bit. +2. Execute "Read IPL" at 0x0. + + So now IPL1's psw is at 0x0 and IPL1's channel program is at 0x08. + +4. Write a custom channel program that will seek to the IPL2 record and then + execute the READ and TIC ccws from IPL1. Normally the seek is not required + because after reading the IPL1 record the disk is automatically positioned + to read the very next record which will be IPL2. But since we are not reading + both IPL1 and IPL2 as part of the same channel program we must manually set + the position. + +5. Grab the target address of the TIC instruction from the IPL1 channel program. + This address is where the IPL2 channel program starts. + + Now IPL2 is loaded into memory somewhere, and we know the address. + +6. Execute the IPL2 channel program at the address obtained in step #5. + + Because this channel program can be dynamic, we must use a special algorithm + that detects a READ immediately followed by a TIC and breaks the ccw chain + by turning off the chain bit in the READ ccw. When control is returned from + the kernel/hardware to the QEMU bios code we immediately issue another start + subchannel to execute the remaining TIC instruction. This causes the entire + channel program (starting from the TIC) and all needed data to be refetched + thereby stepping around the limitation that would otherwise prevent this + channel program from executing properly. + + Now the operating system code is loaded somewhere in guest memory and the psw + in memory location 0x0 will point to entry code for the guest operating + system. + +7. LPSW 0x0. + LPSW transfers control to the guest operating system and we're done. diff --git a/docs/interop/qcow2.txt b/docs/interop/qcow2.txt index 8c3098d8d9..af5711e533 100644 --- a/docs/interop/qcow2.txt +++ b/docs/interop/qcow2.txt @@ -633,7 +633,10 @@ Structure of a bitmap directory entry: Bit 0: in_use The bitmap was not saved correctly and may be - inconsistent. + inconsistent. Although the bitmap metadata is still + well-formed from a qcow2 perspective, the metadata + (such as the auto flag or bitmap size) or data + contents may be outdated. 1: auto The bitmap must reflect all changes of the virtual @@ -761,8 +764,8 @@ corresponding range of the virtual disk (see above) was written to while the bitmap was 'enabled'. An unset bit means that this range was not written to. The software doesn't have to sync the bitmap in the image file with its -representation in RAM after each write. Flag 'in_use' should be set while the -bitmap is not synced. +representation in RAM after each write or metadata change. Flag 'in_use' +should be set while the bitmap is not synced. In the image file the 'enabled' state is reflected by the 'auto' flag. If this flag is set, the software must consider the bitmap as 'enabled' and start diff --git a/docs/interop/vhost-user.json b/docs/interop/vhost-user.json new file mode 100644 index 0000000000..ae88c03117 --- /dev/null +++ b/docs/interop/vhost-user.json @@ -0,0 +1,232 @@ +# -*- Mode: Python -*- +# +# Copyright (C) 2018 Red Hat, Inc. +# +# Authors: +# Marc-André Lureau <marcandre.lureau@redhat.com> +# +# This work is licensed under the terms of the GNU GPL, version 2 or +# later. See the COPYING file in the top-level directory. + +## +# = vhost user backend discovery & capabilities +## + +## +# @VHostUserBackendType: +# +# List the various vhost user backend types. +# +# @9p: 9p virtio console +# @balloon: virtio balloon +# @block: virtio block +# @caif: virtio caif +# @console: virtio console +# @crypto: virtio crypto +# @gpu: virtio gpu +# @input: virtio input +# @net: virtio net +# @rng: virtio rng +# @rpmsg: virtio remote processor messaging +# @rproc-serial: virtio remoteproc serial link +# @scsi: virtio scsi +# @vsock: virtio vsock transport +# +# Since: 4.0 +## +{ + 'enum': 'VHostUserBackendType', + 'data': [ + '9p', + 'balloon', + 'block', + 'caif', + 'console', + 'crypto', + 'gpu', + 'input', + 'net', + 'rng', + 'rpmsg', + 'rproc-serial', + 'scsi', + 'vsock' + ] +} + +## +# @VHostUserBackendInputFeature: +# +# List of vhost user "input" features. +# +# @evdev-path: The --evdev-path command line option is supported. +# @no-grab: The --no-grab command line option is supported. +# +# Since: 4.0 +## +{ + 'enum': 'VHostUserBackendInputFeature', + 'data': [ 'evdev-path', 'no-grab' ] +} + +## +# @VHostUserBackendCapabilitiesInput: +# +# Capabilities reported by vhost user "input" backends +# +# @features: list of supported features. +# +# Since: 4.0 +## +{ + 'struct': 'VHostUserBackendCapabilitiesInput', + 'data': { + 'features': [ 'VHostUserBackendInputFeature' ] + } +} + +## +# @VHostUserBackendGPUFeature: +# +# List of vhost user "gpu" features. +# +# @render-node: The --render-node command line option is supported. +# @virgl: The --virgl command line option is supported. +# +# Since: 4.0 +## +{ + 'enum': 'VHostUserBackendGPUFeature', + 'data': [ 'render-node', 'virgl' ] +} + +## +# @VHostUserBackendCapabilitiesGPU: +# +# Capabilities reported by vhost user "gpu" backends. +# +# @features: list of supported features. +# +# Since: 4.0 +## +{ + 'struct': 'VHostUserBackendCapabilitiesGPU', + 'data': { + 'features': [ 'VHostUserBackendGPUFeature' ] + } +} + +## +# @VHostUserBackendCapabilities: +# +# Capabilities reported by vhost user backends. +# +# @type: The vhost user backend type. +# +# Since: 4.0 +## +{ + 'union': 'VHostUserBackendCapabilities', + 'base': { 'type': 'VHostUserBackendType' }, + 'discriminator': 'type', + 'data': { + 'input': 'VHostUserBackendCapabilitiesInput', + 'gpu': 'VHostUserBackendCapabilitiesGPU' + } +} + +## +# @VhostUserBackend: +# +# Describes a vhost user backend to management software. +# +# It is possible for multiple @VhostUserBackend elements to match the +# search criteria of management software. Applications thus need rules +# to pick one of the many matches, and users need the ability to +# override distro defaults. +# +# It is recommended to create vhost user backend JSON files (each +# containing a single @VhostUserBackend root element) with a +# double-digit prefix, for example "50-qemu-gpu.json", +# "50-crosvm-gpu.json", etc, so they can be sorted in predictable +# order. The backend JSON files should be searched for in three +# directories: +# +# - /usr/share/qemu/vhost-user -- populated by distro-provided +# packages (XDG_DATA_DIRS covers +# /usr/share by default), +# +# - /etc/qemu/vhost-user -- exclusively for sysadmins' local additions, +# +# - $XDG_CONFIG_HOME/qemu/vhost-user -- exclusively for per-user local +# additions (XDG_CONFIG_HOME +# defaults to $HOME/.config). +# +# Top-down, the list of directories goes from general to specific. +# +# Management software should build a list of files from all three +# locations, then sort the list by filename (i.e., basename +# component). Management software should choose the first JSON file on +# the sorted list that matches the search criteria. If a more specific +# directory has a file with same name as a less specific directory, +# then the file in the more specific directory takes effect. If the +# more specific file is zero length, it hides the less specific one. +# +# For example, if a distro ships +# +# - /usr/share/qemu/vhost-user/50-qemu-gpu.json +# +# - /usr/share/qemu/vhost-user/50-crosvm-gpu.json +# +# then the sysadmin can prevent the default QEMU being used at all with +# +# $ touch /etc/qemu/vhost-user/50-qemu-gpu.json +# +# The sysadmin can replace/alter the distro default OVMF with +# +# $ vim /etc/qemu/vhost-user/50-qemu-gpu.json +# +# or they can provide a parallel QEMU GPU with higher priority +# +# $ vim /etc/qemu/vhost-user/10-qemu-gpu.json +# +# or they can provide a parallel OVMF with lower priority +# +# $ vim /etc/qemu/vhost-user/99-qemu-gpu.json +# +# @type: The vhost user backend type. +# +# @description: Provides a human-readable description of the backend. +# Management software may or may not display @description. +# +# @binary: Absolute path to the backend binary. +# +# @tags: An optional list of auxiliary strings associated with the +# backend for which @description is not appropriate, due to the +# latter's possible exposure to the end-user. @tags serves +# development and debugging purposes only, and management +# software shall explicitly ignore it. +# +# Since: 4.0 +# +# Example: +# +# { +# "description": "QEMU vhost-user-gpu", +# "type": "gpu", +# "binary": "/usr/libexec/qemu/vhost-user-gpu", +# "tags": [ +# "CONFIG_OPENGL_DMABUF=y" +# ] +# } +# +## +{ + 'struct' : 'VhostUserBackend', + 'data' : { + 'description': 'str', + 'type': 'VHostUserBackendType', + 'binary': 'str', + '*tags': [ 'str' ] + } +} diff --git a/docs/interop/vhost-user.txt b/docs/interop/vhost-user.txt index c2194711d9..4dbd530cb9 100644 --- a/docs/interop/vhost-user.txt +++ b/docs/interop/vhost-user.txt @@ -17,8 +17,13 @@ The protocol defines 2 sides of the communication, master and slave. Master is the application that shares its virtqueues, in our case QEMU. Slave is the consumer of the virtqueues. -In the current implementation QEMU is the Master, and the Slave is intended to -be a software Ethernet switch running in user space, such as Snabbswitch. +In the current implementation QEMU is the Master, and the Slave is the +external process consuming the virtio queues, for example a software +Ethernet switch running in user space, such as Snabbswitch, or a block +device backend processing read & write to a virtual disk. In order to +facilitate interoperability between various backend implementations, +it is recommended to follow the "Backend program conventions" +described in this document. Master and slave can be either a client (i.e. connecting) or server (listening) in the socket communication. @@ -142,6 +147,17 @@ Depending on the request type, payload can be: Offset: a 64-bit offset of this area from the start of the supplied file descriptor + * Inflight description + ----------------------------------------------------- + | mmap size | mmap offset | num queues | queue size | + ----------------------------------------------------- + + mmap size: a 64-bit size of area to track inflight I/O + mmap offset: a 64-bit offset of this area from the start + of the supplied file descriptor + num queues: a 16-bit number of virtqueues + queue size: a 16-bit size of virtqueues + In QEMU the vhost-user message is implemented with the following struct: typedef struct VhostUserMsg { @@ -157,6 +173,7 @@ typedef struct VhostUserMsg { struct vhost_iotlb_msg iotlb; VhostUserConfig config; VhostUserVringArea area; + VhostUserInflight inflight; }; } QEMU_PACKED VhostUserMsg; @@ -175,6 +192,7 @@ the ones that do: * VHOST_USER_GET_PROTOCOL_FEATURES * VHOST_USER_GET_VRING_BASE * VHOST_USER_SET_LOG_BASE (if VHOST_USER_PROTOCOL_F_LOG_SHMFD) + * VHOST_USER_GET_INFLIGHT_FD (if VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD) [ Also see the section on REPLY_ACK protocol extension. ] @@ -188,6 +206,7 @@ in the ancillary data: * VHOST_USER_SET_VRING_CALL * VHOST_USER_SET_VRING_ERR * VHOST_USER_SET_SLAVE_REQ_FD + * VHOST_USER_SET_INFLIGHT_FD (if VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD) If Master is unable to send the full message or receives a wrong reply it will close the connection. An optional reconnection mechanism can be implemented. @@ -382,6 +401,256 @@ If VHOST_USER_PROTOCOL_F_SLAVE_SEND_FD protocol feature is negotiated, slave can send file descriptors (at most 8 descriptors in each message) to master via ancillary data using this fd communication channel. +Inflight I/O tracking +--------------------- + +To support reconnecting after restart or crash, slave may need to resubmit +inflight I/Os. If virtqueue is processed in order, we can easily achieve +that by getting the inflight descriptors from descriptor table (split virtqueue) +or descriptor ring (packed virtqueue). However, it can't work when we process +descriptors out-of-order because some entries which store the information of +inflight descriptors in available ring (split virtqueue) or descriptor +ring (packed virtqueue) might be overrided by new entries. To solve this +problem, slave need to allocate an extra buffer to store this information of inflight +descriptors and share it with master for persistent. VHOST_USER_GET_INFLIGHT_FD and +VHOST_USER_SET_INFLIGHT_FD are used to transfer this buffer between master +and slave. And the format of this buffer is described below: + +------------------------------------------------------- +| queue0 region | queue1 region | ... | queueN region | +------------------------------------------------------- + +N is the number of available virtqueues. Slave could get it from num queues +field of VhostUserInflight. + +For split virtqueue, queue region can be implemented as: + +typedef struct DescStateSplit { + /* Indicate whether this descriptor is inflight or not. + * Only available for head-descriptor. */ + uint8_t inflight; + + /* Padding */ + uint8_t padding[5]; + + /* Maintain a list for the last batch of used descriptors. + * Only available when batching is used for submitting */ + uint16_t next; + + /* Used to preserve the order of fetching available descriptors. + * Only available for head-descriptor. */ + uint64_t counter; +} DescStateSplit; + +typedef struct QueueRegionSplit { + /* The feature flags of this region. Now it's initialized to 0. */ + uint64_t features; + + /* The version of this region. It's 1 currently. + * Zero value indicates an uninitialized buffer */ + uint16_t version; + + /* The size of DescStateSplit array. It's equal to the virtqueue + * size. Slave could get it from queue size field of VhostUserInflight. */ + uint16_t desc_num; + + /* The head of list that track the last batch of used descriptors. */ + uint16_t last_batch_head; + + /* Store the idx value of used ring */ + uint16_t used_idx; + + /* Used to track the state of each descriptor in descriptor table */ + DescStateSplit desc[0]; +} QueueRegionSplit; + +To track inflight I/O, the queue region should be processed as follows: + +When receiving available buffers from the driver: + + 1. Get the next available head-descriptor index from available ring, i + + 2. Set desc[i].counter to the value of global counter + + 3. Increase global counter by 1 + + 4. Set desc[i].inflight to 1 + +When supplying used buffers to the driver: + + 1. Get corresponding used head-descriptor index, i + + 2. Set desc[i].next to last_batch_head + + 3. Set last_batch_head to i + + 4. Steps 1,2,3 may be performed repeatedly if batching is possible + + 5. Increase the idx value of used ring by the size of the batch + + 6. Set the inflight field of each DescStateSplit entry in the batch to 0 + + 7. Set used_idx to the idx value of used ring + +When reconnecting: + + 1. If the value of used_idx does not match the idx value of used ring (means + the inflight field of DescStateSplit entries in last batch may be incorrect), + + (a) Subtract the value of used_idx from the idx value of used ring to get + last batch size of DescStateSplit entries + + (b) Set the inflight field of each DescStateSplit entry to 0 in last batch + list which starts from last_batch_head + + (c) Set used_idx to the idx value of used ring + + 2. Resubmit inflight DescStateSplit entries in order of their counter value + +For packed virtqueue, queue region can be implemented as: + +typedef struct DescStatePacked { + /* Indicate whether this descriptor is inflight or not. + * Only available for head-descriptor. */ + uint8_t inflight; + + /* Padding */ + uint8_t padding; + + /* Link to the next free entry */ + uint16_t next; + + /* Link to the last entry of descriptor list. + * Only available for head-descriptor. */ + uint16_t last; + + /* The length of descriptor list. + * Only available for head-descriptor. */ + uint16_t num; + + /* Used to preserve the order of fetching available descriptors. + * Only available for head-descriptor. */ + uint64_t counter; + + /* The buffer id */ + uint16_t id; + + /* The descriptor flags */ + uint16_t flags; + + /* The buffer length */ + uint32_t len; + + /* The buffer address */ + uint64_t addr; +} DescStatePacked; + +typedef struct QueueRegionPacked { + /* The feature flags of this region. Now it's initialized to 0. */ + uint64_t features; + + /* The version of this region. It's 1 currently. + * Zero value indicates an uninitialized buffer */ + uint16_t version; + + /* The size of DescStatePacked array. It's equal to the virtqueue + * size. Slave could get it from queue size field of VhostUserInflight. */ + uint16_t desc_num; + + /* The head of free DescStatePacked entry list */ + uint16_t free_head; + + /* The old head of free DescStatePacked entry list */ + uint16_t old_free_head; + + /* The used index of descriptor ring */ + uint16_t used_idx; + + /* The old used index of descriptor ring */ + uint16_t old_used_idx; + + /* Device ring wrap counter */ + uint8_t used_wrap_counter; + + /* The old device ring wrap counter */ + uint8_t old_used_wrap_counter; + + /* Padding */ + uint8_t padding[7]; + + /* Used to track the state of each descriptor fetched from descriptor ring */ + DescStatePacked desc[0]; +} QueueRegionPacked; + +To track inflight I/O, the queue region should be processed as follows: + +When receiving available buffers from the driver: + + 1. Get the next available descriptor entry from descriptor ring, d + + 2. If d is head descriptor, + + (a) Set desc[old_free_head].num to 0 + + (b) Set desc[old_free_head].counter to the value of global counter + + (c) Increase global counter by 1 + + (d) Set desc[old_free_head].inflight to 1 + + 3. If d is last descriptor, set desc[old_free_head].last to free_head + + 4. Increase desc[old_free_head].num by 1 + + 5. Set desc[free_head].addr, desc[free_head].len, desc[free_head].flags, + desc[free_head].id to d.addr, d.len, d.flags, d.id + + 6. Set free_head to desc[free_head].next + + 7. If d is last descriptor, set old_free_head to free_head + +When supplying used buffers to the driver: + + 1. Get corresponding used head-descriptor entry from descriptor ring, d + + 2. Get corresponding DescStatePacked entry, e + + 3. Set desc[e.last].next to free_head + + 4. Set free_head to the index of e + + 5. Steps 1,2,3,4 may be performed repeatedly if batching is possible + + 6. Increase used_idx by the size of the batch and update used_wrap_counter if needed + + 7. Update d.flags + + 8. Set the inflight field of each head DescStatePacked entry in the batch to 0 + + 9. Set old_free_head, old_used_idx, old_used_wrap_counter to free_head, used_idx, + used_wrap_counter + +When reconnecting: + + 1. If used_idx does not match old_used_idx (means the inflight field of DescStatePacked + entries in last batch may be incorrect), + + (a) Get the next descriptor ring entry through old_used_idx, d + + (b) Use old_used_wrap_counter to calculate the available flags + + (c) If d.flags is not equal to the calculated flags value (means slave has + submitted the buffer to guest driver before crash, so it has to commit the + in-progres update), set old_free_head, old_used_idx, old_used_wrap_counter + to free_head, used_idx, used_wrap_counter + + 2. Set free_head, used_idx, used_wrap_counter to old_free_head, old_used_idx, + old_used_wrap_counter (roll back any in-progress update) + + 3. Set the inflight field of each DescStatePacked entry in free list to 0 + + 4. Resubmit inflight DescStatePacked entries in order of their counter value + Protocol features ----------------- @@ -397,6 +666,7 @@ Protocol features #define VHOST_USER_PROTOCOL_F_CONFIG 9 #define VHOST_USER_PROTOCOL_F_SLAVE_SEND_FD 10 #define VHOST_USER_PROTOCOL_F_HOST_NOTIFIER 11 +#define VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD 12 Master message types -------------------- @@ -761,6 +1031,26 @@ Master message types was previously sent. The value returned is an error indication; 0 is success. + * VHOST_USER_GET_INFLIGHT_FD + Id: 31 + Equivalent ioctl: N/A + Master payload: inflight description + + When VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD protocol feature has been + successfully negotiated, this message is submitted by master to get + a shared buffer from slave. The shared buffer will be used to track + inflight I/O by slave. QEMU should retrieve a new one when vm reset. + + * VHOST_USER_SET_INFLIGHT_FD + Id: 32 + Equivalent ioctl: N/A + Master payload: inflight description + + When VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD protocol feature has been + successfully negotiated, this message is submitted by master to send + the shared inflight buffer back to slave so that slave could get + inflight I/O after a crash or restart. + Slave message types ------------------- @@ -835,3 +1125,95 @@ resilient for selective requests. For the message types that already solicit a reply from the client, the presence of VHOST_USER_PROTOCOL_F_REPLY_ACK or need_reply bit being set brings no behavioural change. (See the 'Communication' section for details.) + +Backend program conventions +--------------------------- + +vhost-user backends can provide various devices & services and may +need to be configured manually depending on the use case. However, it +is a good idea to follow the conventions listed here when +possible. Users, QEMU or libvirt, can then rely on some common +behaviour to avoid heterogenous configuration and management of the +backend programs and facilitate interoperability. + +Each backend installed on a host system should come with at least one +JSON file that conforms to the vhost-user.json schema. Each file +informs the management applications about the backend type, and binary +location. In addition, it defines rules for management apps for +picking the highest priority backend when multiple match the search +criteria (see @VhostUserBackend documentation in the schema file). + +If the backend is not capable of enabling a requested feature on the +host (such as 3D acceleration with virgl), or the initialization +failed, the backend should fail to start early and exit with a status +!= 0. It may also print a message to stderr for further details. + +The backend program must not daemonize itself, but it may be +daemonized by the management layer. It may also have a restricted +access to the system. + +File descriptors 0, 1 and 2 will exist, and have regular +stdin/stdout/stderr usage (they may have been redirected to /dev/null +by the management layer, or to a log handler). + +The backend program must end (as quickly and cleanly as possible) when +the SIGTERM signal is received. Eventually, it may receive SIGKILL by +the management layer after a few seconds. + +The following command line options have an expected behaviour. They +are mandatory, unless explicitly said differently: + +* --socket-path=PATH + +This option specify the location of the vhost-user Unix domain socket. +It is incompatible with --fd. + +* --fd=FDNUM + +When this argument is given, the backend program is started with the +vhost-user socket as file descriptor FDNUM. It is incompatible with +--socket-path. + +* --print-capabilities + +Output to stdout the backend capabilities in JSON format, and then +exit successfully. Other options and arguments should be ignored, and +the backend program should not perform its normal function. The +capabilities can be reported dynamically depending on the host +capabilities. + +The JSON output is described in the vhost-user.json schema, by +@VHostUserBackendCapabilities. Example: +{ + "type": "foo", + "features": [ + "feature-a", + "feature-b" + ] +} + +vhost-user-input +---------------- + +Command line options: + +* --evdev-path=PATH (optional) + +Specify the linux input device. + +* --no-grab (optional) + +Do no request exclusive access to the input device. + +vhost-user-gpu +-------------- + +Command line options: + +* --render-node=PATH (optional) + +Specify the GPU DRM render node. + +* --virgl (optional) + +Enable virgl rendering support. diff --git a/docs/nvdimm.txt b/docs/nvdimm.txt index 7231c2d78f..b531cacd35 100644 --- a/docs/nvdimm.txt +++ b/docs/nvdimm.txt @@ -144,9 +144,25 @@ Guest Data Persistence ---------------------- Though QEMU supports multiple types of vNVDIMM backends on Linux, -currently the only one that can guarantee the guest write persistence -is the device DAX on the real NVDIMM device (e.g., /dev/dax0.0), to -which all guest access do not involve any host-side kernel cache. +the only backend that can guarantee the guest write persistence is: + +A. DAX device (e.g., /dev/dax0.0, ) or +B. DAX file(mounted with dax option) + +When using B (A file supporting direct mapping of persistent memory) +as a backend, write persistence is guaranteed if the host kernel has +support for the MAP_SYNC flag in the mmap system call (available +since Linux 4.15 and on certain distro kernels) and additionally +both 'pmem' and 'share' flags are set to 'on' on the backend. + +If these conditions are not satisfied i.e. if either 'pmem' or 'share' +are not set, if the backend file does not support DAX or if MAP_SYNC +is not supported by the host kernel, write persistence is not +guaranteed after a system crash. For compatibility reasons, these +conditions are ignored if not satisfied. Currently, no way is +provided to test for them. +For more details, please reference mmap(2) man page: +http://man7.org/linux/man-pages/man2/mmap.2.html. When using other types of backends, it's suggested to set 'unarmed' option of '-device nvdimm' to 'on', which sets the unarmed flag of the diff --git a/docs/qemu-cpu-models.texi b/docs/qemu-cpu-models.texi index 1b72584161..23c11dc86f 100644 --- a/docs/qemu-cpu-models.texi +++ b/docs/qemu-cpu-models.texi @@ -158,8 +158,7 @@ support this feature. @item @code{spec-ctrl} -Required to enable the Spectre (CVE-2017-5753 and CVE-2017-5715) fix, -in cases where retpolines are not sufficient. +Required to enable the Spectre v2 (CVE-2017-5715) fix. Included by default in Intel CPU models with -IBRS suffix. @@ -169,6 +168,17 @@ Requires the host CPU microcode to support this feature before it can be used for guest CPUs. +@item @code{stibp} + +Required to enable stronger Spectre v2 (CVE-2017-5715) fixes in some +operating systems. + +Must be explicitly turned on for all Intel CPU models. + +Requires the host CPU microcode to support this feature before it +can be used for guest CPUs. + + @item @code{ssbd} Required to enable the CVE-2018-3639 fix @@ -249,8 +259,7 @@ included if using "Host passthrough" or "Host model". @item @code{ibpb} -Required to enable the Spectre (CVE-2017-5753 and CVE-2017-5715) fix, -in cases where retpolines are not sufficient. +Required to enable the Spectre v2 (CVE-2017-5715) fix. Included by default in AMD CPU models with -IBPB suffix. @@ -260,6 +269,17 @@ Requires the host CPU microcode to support this feature before it can be used for guest CPUs. +@item @code{stibp} + +Required to enable stronger Spectre v2 (CVE-2017-5715) fixes in some +operating systems. + +Must be explicitly turned on for all AMD CPU models. + +Requires the host CPU microcode to support this feature before it +can be used for guest CPUs. + + @item @code{virt-ssbd} Required to enable the CVE-2018-3639 fix diff --git a/exec.c b/exec.c index 86a38d3b3b..4e734770c2 100644 --- a/exec.c +++ b/exec.c @@ -35,6 +35,7 @@ #include "qemu/timer.h" #include "qemu/config-file.h" #include "qemu/error-report.h" +#include "qemu/qemu-print.h" #if defined(CONFIG_USER_ONLY) #include "qemu.h" #else /* !CONFIG_USER_ONLY */ @@ -982,14 +983,18 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) #endif } -const char *parse_cpu_model(const char *cpu_model) +const char *parse_cpu_option(const char *cpu_option) { ObjectClass *oc; CPUClass *cc; gchar **model_pieces; const char *cpu_type; - model_pieces = g_strsplit(cpu_model, ",", 2); + model_pieces = g_strsplit(cpu_option, ",", 2); + if (!model_pieces[0]) { + error_report("-cpu option cannot be empty"); + exit(1); + } oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]); if (oc == NULL) { @@ -1255,7 +1260,7 @@ void cpu_abort(CPUState *cpu, const char *fmt, ...) fprintf(stderr, "qemu: fatal: "); vfprintf(stderr, fmt, ap); fprintf(stderr, "\n"); - cpu_dump_state(cpu, stderr, fprintf, CPU_DUMP_FPU | CPU_DUMP_CCOP); + cpu_dump_state(cpu, stderr, CPU_DUMP_FPU | CPU_DUMP_CCOP); if (qemu_log_separate()) { qemu_log_lock(); qemu_log("qemu: fatal: "); @@ -1687,14 +1692,15 @@ void ram_block_dump(Monitor *mon) * when we actually open and map them. Iterate over the file * descriptors instead, and use qemu_fd_getpagesize(). */ -static int find_max_supported_pagesize(Object *obj, void *opaque) +static int find_min_backend_pagesize(Object *obj, void *opaque) { long *hpsize_min = opaque; if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) { - long hpsize = host_memory_backend_pagesize(MEMORY_BACKEND(obj)); + HostMemoryBackend *backend = MEMORY_BACKEND(obj); + long hpsize = host_memory_backend_pagesize(backend); - if (hpsize < *hpsize_min) { + if (host_memory_backend_is_mapped(backend) && (hpsize < *hpsize_min)) { *hpsize_min = hpsize; } } @@ -1702,7 +1708,27 @@ static int find_max_supported_pagesize(Object *obj, void *opaque) return 0; } -long qemu_getrampagesize(void) +static int find_max_backend_pagesize(Object *obj, void *opaque) +{ + long *hpsize_max = opaque; + + if (object_dynamic_cast(obj, TYPE_MEMORY_BACKEND)) { + HostMemoryBackend *backend = MEMORY_BACKEND(obj); + long hpsize = host_memory_backend_pagesize(backend); + + if (host_memory_backend_is_mapped(backend) && (hpsize > *hpsize_max)) { + *hpsize_max = hpsize; + } + } + + return 0; +} + +/* + * TODO: We assume right now that all mapped host memory backends are + * used as RAM, however some might be used for different purposes. + */ +long qemu_minrampagesize(void) { long hpsize = LONG_MAX; long mainrampagesize; @@ -1722,7 +1748,7 @@ long qemu_getrampagesize(void) */ memdev_root = object_resolve_path("/objects", NULL); if (memdev_root) { - object_child_foreach(memdev_root, find_max_supported_pagesize, &hpsize); + object_child_foreach(memdev_root, find_min_backend_pagesize, &hpsize); } if (hpsize == LONG_MAX) { /* No additional memory regions found ==> Report main RAM page size */ @@ -1745,8 +1771,24 @@ long qemu_getrampagesize(void) return hpsize; } + +long qemu_maxrampagesize(void) +{ + long pagesize = qemu_mempath_getpagesize(mem_path); + Object *memdev_root = object_resolve_path("/objects", NULL); + + if (memdev_root) { + object_child_foreach(memdev_root, find_max_backend_pagesize, + &pagesize); + } + return pagesize; +} #else -long qemu_getrampagesize(void) +long qemu_minrampagesize(void) +{ + return getpagesize(); +} +long qemu_maxrampagesize(void) { return getpagesize(); } @@ -1877,7 +1919,7 @@ static void *file_ram_alloc(RAMBlock *block, } area = qemu_ram_mmap(fd, memory, block->mr->align, - block->flags & RAM_SHARED); + block->flags & RAM_SHARED, block->flags & RAM_PMEM); if (area == MAP_FAILED) { error_setg_errno(errp, errno, "unable to map backing store for guest RAM"); @@ -4116,42 +4158,41 @@ void page_size_init(void) #if !defined(CONFIG_USER_ONLY) -static void mtree_print_phys_entries(fprintf_function mon, void *f, - int start, int end, int skip, int ptr) +static void mtree_print_phys_entries(int start, int end, int skip, int ptr) { if (start == end - 1) { - mon(f, "\t%3d ", start); + qemu_printf("\t%3d ", start); } else { - mon(f, "\t%3d..%-3d ", start, end - 1); + qemu_printf("\t%3d..%-3d ", start, end - 1); } - mon(f, " skip=%d ", skip); + qemu_printf(" skip=%d ", skip); if (ptr == PHYS_MAP_NODE_NIL) { - mon(f, " ptr=NIL"); + qemu_printf(" ptr=NIL"); } else if (!skip) { - mon(f, " ptr=#%d", ptr); + qemu_printf(" ptr=#%d", ptr); } else { - mon(f, " ptr=[%d]", ptr); + qemu_printf(" ptr=[%d]", ptr); } - mon(f, "\n"); + qemu_printf("\n"); } #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \ int128_sub((size), int128_one())) : 0) -void mtree_print_dispatch(fprintf_function mon, void *f, - AddressSpaceDispatch *d, MemoryRegion *root) +void mtree_print_dispatch(AddressSpaceDispatch *d, MemoryRegion *root) { int i; - mon(f, " Dispatch\n"); - mon(f, " Physical sections\n"); + qemu_printf(" Dispatch\n"); + qemu_printf(" Physical sections\n"); for (i = 0; i < d->map.sections_nb; ++i) { MemoryRegionSection *s = d->map.sections + i; const char *names[] = { " [unassigned]", " [not dirty]", " [ROM]", " [watch]" }; - mon(f, " #%d @" TARGET_FMT_plx ".." TARGET_FMT_plx " %s%s%s%s%s", + qemu_printf(" #%d @" TARGET_FMT_plx ".." TARGET_FMT_plx + " %s%s%s%s%s", i, s->offset_within_address_space, s->offset_within_address_space + MR_SIZE(s->mr->size), @@ -4162,20 +4203,20 @@ void mtree_print_dispatch(fprintf_function mon, void *f, s->mr->is_iommu ? " [iommu]" : ""); if (s->mr->alias) { - mon(f, " alias=%s", s->mr->alias->name ? + qemu_printf(" alias=%s", s->mr->alias->name ? s->mr->alias->name : "noname"); } - mon(f, "\n"); + qemu_printf("\n"); } - mon(f, " Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n", + qemu_printf(" Nodes (%d bits per level, %d levels) ptr=[%d] skip=%d\n", P_L2_BITS, P_L2_LEVELS, d->phys_map.ptr, d->phys_map.skip); for (i = 0; i < d->map.nodes_nb; ++i) { int j, jprev; PhysPageEntry prev; Node *n = d->map.nodes + i; - mon(f, " [%d]\n", i); + qemu_printf(" [%d]\n", i); for (j = 0, jprev = 0, prev = *n[0]; j < ARRAY_SIZE(*n); ++j) { PhysPageEntry *pe = *n + j; @@ -4184,14 +4225,14 @@ void mtree_print_dispatch(fprintf_function mon, void *f, continue; } - mtree_print_phys_entries(mon, f, jprev, j, prev.skip, prev.ptr); + mtree_print_phys_entries(jprev, j, prev.skip, prev.ptr); jprev = j; prev = *pe; } if (jprev != ARRAY_SIZE(*n)) { - mtree_print_phys_entries(mon, f, jprev, j, prev.skip, prev.ptr); + mtree_print_phys_entries(jprev, j, prev.skip, prev.ptr); } } } diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 16c0bcb6fa..7b8895726c 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -495,15 +495,15 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls, return 1; } #elif defined(TARGET_MIPS) - /* For MIPS, the (inf,zero,qnan) case sets InvalidOp and returns - * the default NaN - */ - if (infzero) { - float_raise(float_flag_invalid, status); - return 3; - } - if (snan_bit_is_one(status)) { + /* + * For MIPS systems that conform to IEEE754-1985, the (inf,zero,nan) + * case sets InvalidOp and returns the default NaN + */ + if (infzero) { + float_raise(float_flag_invalid, status); + return 3; + } /* Prefer sNaN over qNaN, in the a, b, c order. */ if (is_snan(a_cls)) { return 0; @@ -519,6 +519,14 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls, return 2; } } else { + /* + * For MIPS systems that conform to IEEE754-2008, the (inf,zero,nan) + * case sets InvalidOp and returns the input value 'c' + */ + if (infzero) { + float_raise(float_flag_invalid, status); + return 2; + } /* Prefer sNaN over qNaN, in the c, a, b order. */ if (is_snan(c_cls)) { return 2; diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 4610738ab1..2ba36ec370 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -1596,6 +1596,9 @@ float32_muladd(float32 xa, float32 xb, float32 xc, int flags, float_status *s) } ur.h = up.h + uc.h; } else { + union_float32 ua_orig = ua; + union_float32 uc_orig = uc; + if (flags & float_muladd_negate_product) { ua.h = -ua.h; } @@ -1608,6 +1611,8 @@ float32_muladd(float32 xa, float32 xb, float32 xc, int flags, float_status *s) if (unlikely(f32_is_inf(ur))) { s->float_exception_flags |= float_flag_overflow; } else if (unlikely(fabsf(ur.h) <= FLT_MIN)) { + ua = ua_orig; + uc = uc_orig; goto soft; } } @@ -1662,6 +1667,9 @@ float64_muladd(float64 xa, float64 xb, float64 xc, int flags, float_status *s) } ur.h = up.h + uc.h; } else { + union_float64 ua_orig = ua; + union_float64 uc_orig = uc; + if (flags & float_muladd_negate_product) { ua.h = -ua.h; } @@ -1674,6 +1682,8 @@ float64_muladd(float64 xa, float64 xb, float64 xc, int flags, float_status *s) if (unlikely(f64_is_inf(ur))) { s->float_exception_flags |= float_flag_overflow; } else if (unlikely(fabs(ur.h) <= FLT_MIN)) { + ua = ua_orig; + uc = uc_orig; goto soft; } } diff --git a/gdb-xml/riscv-32bit-cpu.xml b/gdb-xml/riscv-32bit-cpu.xml new file mode 100644 index 0000000000..0d07aaec85 --- /dev/null +++ b/gdb-xml/riscv-32bit-cpu.xml @@ -0,0 +1,47 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!-- Register numbers are hard-coded in order to maintain backward + compatibility with older versions of tools that didn't use xml + register descriptions. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.riscv.cpu"> + <reg name="zero" bitsize="32" type="int" regnum="0"/> + <reg name="ra" bitsize="32" type="code_ptr"/> + <reg name="sp" bitsize="32" type="data_ptr"/> + <reg name="gp" bitsize="32" type="data_ptr"/> + <reg name="tp" bitsize="32" type="data_ptr"/> + <reg name="t0" bitsize="32" type="int"/> + <reg name="t1" bitsize="32" type="int"/> + <reg name="t2" bitsize="32" type="int"/> + <reg name="fp" bitsize="32" type="data_ptr"/> + <reg name="s1" bitsize="32" type="int"/> + <reg name="a0" bitsize="32" type="int"/> + <reg name="a1" bitsize="32" type="int"/> + <reg name="a2" bitsize="32" type="int"/> + <reg name="a3" bitsize="32" type="int"/> + <reg name="a4" bitsize="32" type="int"/> + <reg name="a5" bitsize="32" type="int"/> + <reg name="a6" bitsize="32" type="int"/> + <reg name="a7" bitsize="32" type="int"/> + <reg name="s2" bitsize="32" type="int"/> + <reg name="s3" bitsize="32" type="int"/> + <reg name="s4" bitsize="32" type="int"/> + <reg name="s5" bitsize="32" type="int"/> + <reg name="s6" bitsize="32" type="int"/> + <reg name="s7" bitsize="32" type="int"/> + <reg name="s8" bitsize="32" type="int"/> + <reg name="s9" bitsize="32" type="int"/> + <reg name="s10" bitsize="32" type="int"/> + <reg name="s11" bitsize="32" type="int"/> + <reg name="t3" bitsize="32" type="int"/> + <reg name="t4" bitsize="32" type="int"/> + <reg name="t5" bitsize="32" type="int"/> + <reg name="t6" bitsize="32" type="int"/> + <reg name="pc" bitsize="32" type="code_ptr"/> +</feature> diff --git a/gdb-xml/riscv-32bit-csr.xml b/gdb-xml/riscv-32bit-csr.xml new file mode 100644 index 0000000000..da1bf19e2f --- /dev/null +++ b/gdb-xml/riscv-32bit-csr.xml @@ -0,0 +1,250 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.riscv.csr"> + <reg name="ustatus" bitsize="32"/> + <reg name="uie" bitsize="32"/> + <reg name="utvec" bitsize="32"/> + <reg name="uscratch" bitsize="32"/> + <reg name="uepc" bitsize="32"/> + <reg name="ucause" bitsize="32"/> + <reg name="utval" bitsize="32"/> + <reg name="uip" bitsize="32"/> + <reg name="fflags" bitsize="32"/> + <reg name="frm" bitsize="32"/> + <reg name="fcsr" bitsize="32"/> + <reg name="cycle" bitsize="32"/> + <reg name="time" bitsize="32"/> + <reg name="instret" bitsize="32"/> + <reg name="hpmcounter3" bitsize="32"/> + <reg name="hpmcounter4" bitsize="32"/> + <reg name="hpmcounter5" bitsize="32"/> + <reg name="hpmcounter6" bitsize="32"/> + <reg name="hpmcounter7" bitsize="32"/> + <reg name="hpmcounter8" bitsize="32"/> + <reg name="hpmcounter9" bitsize="32"/> + <reg name="hpmcounter10" bitsize="32"/> + <reg name="hpmcounter11" bitsize="32"/> + <reg name="hpmcounter12" bitsize="32"/> + <reg name="hpmcounter13" bitsize="32"/> + <reg name="hpmcounter14" bitsize="32"/> + <reg name="hpmcounter15" bitsize="32"/> + <reg name="hpmcounter16" bitsize="32"/> + <reg name="hpmcounter17" bitsize="32"/> + <reg name="hpmcounter18" bitsize="32"/> + <reg name="hpmcounter19" bitsize="32"/> + <reg name="hpmcounter20" bitsize="32"/> + <reg name="hpmcounter21" bitsize="32"/> + <reg name="hpmcounter22" bitsize="32"/> + <reg name="hpmcounter23" bitsize="32"/> + <reg name="hpmcounter24" bitsize="32"/> + <reg name="hpmcounter25" bitsize="32"/> + <reg name="hpmcounter26" bitsize="32"/> + <reg name="hpmcounter27" bitsize="32"/> + <reg name="hpmcounter28" bitsize="32"/> + <reg name="hpmcounter29" bitsize="32"/> + <reg name="hpmcounter30" bitsize="32"/> + <reg name="hpmcounter31" bitsize="32"/> + <reg name="cycleh" bitsize="32"/> + <reg name="timeh" bitsize="32"/> + <reg name="instreth" bitsize="32"/> + <reg name="hpmcounter3h" bitsize="32"/> + <reg name="hpmcounter4h" bitsize="32"/> + <reg name="hpmcounter5h" bitsize="32"/> + <reg name="hpmcounter6h" bitsize="32"/> + <reg name="hpmcounter7h" bitsize="32"/> + <reg name="hpmcounter8h" bitsize="32"/> + <reg name="hpmcounter9h" bitsize="32"/> + <reg name="hpmcounter10h" bitsize="32"/> + <reg name="hpmcounter11h" bitsize="32"/> + <reg name="hpmcounter12h" bitsize="32"/> + <reg name="hpmcounter13h" bitsize="32"/> + <reg name="hpmcounter14h" bitsize="32"/> + <reg name="hpmcounter15h" bitsize="32"/> + <reg name="hpmcounter16h" bitsize="32"/> + <reg name="hpmcounter17h" bitsize="32"/> + <reg name="hpmcounter18h" bitsize="32"/> + <reg name="hpmcounter19h" bitsize="32"/> + <reg name="hpmcounter20h" bitsize="32"/> + <reg name="hpmcounter21h" bitsize="32"/> + <reg name="hpmcounter22h" bitsize="32"/> + <reg name="hpmcounter23h" bitsize="32"/> + <reg name="hpmcounter24h" bitsize="32"/> + <reg name="hpmcounter25h" bitsize="32"/> + <reg name="hpmcounter26h" bitsize="32"/> + <reg name="hpmcounter27h" bitsize="32"/> + <reg name="hpmcounter28h" bitsize="32"/> + <reg name="hpmcounter29h" bitsize="32"/> + <reg name="hpmcounter30h" bitsize="32"/> + <reg name="hpmcounter31h" bitsize="32"/> + <reg name="sstatus" bitsize="32"/> + <reg name="sedeleg" bitsize="32"/> + <reg name="sideleg" bitsize="32"/> + <reg name="sie" bitsize="32"/> + <reg name="stvec" bitsize="32"/> + <reg name="scounteren" bitsize="32"/> + <reg name="sscratch" bitsize="32"/> + <reg name="sepc" bitsize="32"/> + <reg name="scause" bitsize="32"/> + <reg name="stval" bitsize="32"/> + <reg name="sip" bitsize="32"/> + <reg name="satp" bitsize="32"/> + <reg name="mvendorid" bitsize="32"/> + <reg name="marchid" bitsize="32"/> + <reg name="mimpid" bitsize="32"/> + <reg name="mhartid" bitsize="32"/> + <reg name="mstatus" bitsize="32"/> + <reg name="misa" bitsize="32"/> + <reg name="medeleg" bitsize="32"/> + <reg name="mideleg" bitsize="32"/> + <reg name="mie" bitsize="32"/> + <reg name="mtvec" bitsize="32"/> + <reg name="mcounteren" bitsize="32"/> + <reg name="mscratch" bitsize="32"/> + <reg name="mepc" bitsize="32"/> + <reg name="mcause" bitsize="32"/> + <reg name="mtval" bitsize="32"/> + <reg name="mip" bitsize="32"/> + <reg name="pmpcfg0" bitsize="32"/> + <reg name="pmpcfg1" bitsize="32"/> + <reg name="pmpcfg2" bitsize="32"/> + <reg name="pmpcfg3" bitsize="32"/> + <reg name="pmpaddr0" bitsize="32"/> + <reg name="pmpaddr1" bitsize="32"/> + <reg name="pmpaddr2" bitsize="32"/> + <reg name="pmpaddr3" bitsize="32"/> + <reg name="pmpaddr4" bitsize="32"/> + <reg name="pmpaddr5" bitsize="32"/> + <reg name="pmpaddr6" bitsize="32"/> + <reg name="pmpaddr7" bitsize="32"/> + <reg name="pmpaddr8" bitsize="32"/> + <reg name="pmpaddr9" bitsize="32"/> + <reg name="pmpaddr10" bitsize="32"/> + <reg name="pmpaddr11" bitsize="32"/> + <reg name="pmpaddr12" bitsize="32"/> + <reg name="pmpaddr13" bitsize="32"/> + <reg name="pmpaddr14" bitsize="32"/> + <reg name="pmpaddr15" bitsize="32"/> + <reg name="mcycle" bitsize="32"/> + <reg name="minstret" bitsize="32"/> + <reg name="mhpmcounter3" bitsize="32"/> + <reg name="mhpmcounter4" bitsize="32"/> + <reg name="mhpmcounter5" bitsize="32"/> + <reg name="mhpmcounter6" bitsize="32"/> + <reg name="mhpmcounter7" bitsize="32"/> + <reg name="mhpmcounter8" bitsize="32"/> + <reg name="mhpmcounter9" bitsize="32"/> + <reg name="mhpmcounter10" bitsize="32"/> + <reg name="mhpmcounter11" bitsize="32"/> + <reg name="mhpmcounter12" bitsize="32"/> + <reg name="mhpmcounter13" bitsize="32"/> + <reg name="mhpmcounter14" bitsize="32"/> + <reg name="mhpmcounter15" bitsize="32"/> + <reg name="mhpmcounter16" bitsize="32"/> + <reg name="mhpmcounter17" bitsize="32"/> + <reg name="mhpmcounter18" bitsize="32"/> + <reg name="mhpmcounter19" bitsize="32"/> + <reg name="mhpmcounter20" bitsize="32"/> + <reg name="mhpmcounter21" bitsize="32"/> + <reg name="mhpmcounter22" bitsize="32"/> + <reg name="mhpmcounter23" bitsize="32"/> + <reg name="mhpmcounter24" bitsize="32"/> + <reg name="mhpmcounter25" bitsize="32"/> + <reg name="mhpmcounter26" bitsize="32"/> + <reg name="mhpmcounter27" bitsize="32"/> + <reg name="mhpmcounter28" bitsize="32"/> + <reg name="mhpmcounter29" bitsize="32"/> + <reg name="mhpmcounter30" bitsize="32"/> + <reg name="mhpmcounter31" bitsize="32"/> + <reg name="mcycleh" bitsize="32"/> + <reg name="minstreth" bitsize="32"/> + <reg name="mhpmcounter3h" bitsize="32"/> + <reg name="mhpmcounter4h" bitsize="32"/> + <reg name="mhpmcounter5h" bitsize="32"/> + <reg name="mhpmcounter6h" bitsize="32"/> + <reg name="mhpmcounter7h" bitsize="32"/> + <reg name="mhpmcounter8h" bitsize="32"/> + <reg name="mhpmcounter9h" bitsize="32"/> + <reg name="mhpmcounter10h" bitsize="32"/> + <reg name="mhpmcounter11h" bitsize="32"/> + <reg name="mhpmcounter12h" bitsize="32"/> + <reg name="mhpmcounter13h" bitsize="32"/> + <reg name="mhpmcounter14h" bitsize="32"/> + <reg name="mhpmcounter15h" bitsize="32"/> + <reg name="mhpmcounter16h" bitsize="32"/> + <reg name="mhpmcounter17h" bitsize="32"/> + <reg name="mhpmcounter18h" bitsize="32"/> + <reg name="mhpmcounter19h" bitsize="32"/> + <reg name="mhpmcounter20h" bitsize="32"/> + <reg name="mhpmcounter21h" bitsize="32"/> + <reg name="mhpmcounter22h" bitsize="32"/> + <reg name="mhpmcounter23h" bitsize="32"/> + <reg name="mhpmcounter24h" bitsize="32"/> + <reg name="mhpmcounter25h" bitsize="32"/> + <reg name="mhpmcounter26h" bitsize="32"/> + <reg name="mhpmcounter27h" bitsize="32"/> + <reg name="mhpmcounter28h" bitsize="32"/> + <reg name="mhpmcounter29h" bitsize="32"/> + <reg name="mhpmcounter30h" bitsize="32"/> + <reg name="mhpmcounter31h" bitsize="32"/> + <reg name="mhpmevent3" bitsize="32"/> + <reg name="mhpmevent4" bitsize="32"/> + <reg name="mhpmevent5" bitsize="32"/> + <reg name="mhpmevent6" bitsize="32"/> + <reg name="mhpmevent7" bitsize="32"/> + <reg name="mhpmevent8" bitsize="32"/> + <reg name="mhpmevent9" bitsize="32"/> + <reg name="mhpmevent10" bitsize="32"/> + <reg name="mhpmevent11" bitsize="32"/> + <reg name="mhpmevent12" bitsize="32"/> + <reg name="mhpmevent13" bitsize="32"/> + <reg name="mhpmevent14" bitsize="32"/> + <reg name="mhpmevent15" bitsize="32"/> + <reg name="mhpmevent16" bitsize="32"/> + <reg name="mhpmevent17" bitsize="32"/> + <reg name="mhpmevent18" bitsize="32"/> + <reg name="mhpmevent19" bitsize="32"/> + <reg name="mhpmevent20" bitsize="32"/> + <reg name="mhpmevent21" bitsize="32"/> + <reg name="mhpmevent22" bitsize="32"/> + <reg name="mhpmevent23" bitsize="32"/> + <reg name="mhpmevent24" bitsize="32"/> + <reg name="mhpmevent25" bitsize="32"/> + <reg name="mhpmevent26" bitsize="32"/> + <reg name="mhpmevent27" bitsize="32"/> + <reg name="mhpmevent28" bitsize="32"/> + <reg name="mhpmevent29" bitsize="32"/> + <reg name="mhpmevent30" bitsize="32"/> + <reg name="mhpmevent31" bitsize="32"/> + <reg name="tselect" bitsize="32"/> + <reg name="tdata1" bitsize="32"/> + <reg name="tdata2" bitsize="32"/> + <reg name="tdata3" bitsize="32"/> + <reg name="dcsr" bitsize="32"/> + <reg name="dpc" bitsize="32"/> + <reg name="dscratch" bitsize="32"/> + <reg name="hstatus" bitsize="32"/> + <reg name="hedeleg" bitsize="32"/> + <reg name="hideleg" bitsize="32"/> + <reg name="hie" bitsize="32"/> + <reg name="htvec" bitsize="32"/> + <reg name="hscratch" bitsize="32"/> + <reg name="hepc" bitsize="32"/> + <reg name="hcause" bitsize="32"/> + <reg name="hbadaddr" bitsize="32"/> + <reg name="hip" bitsize="32"/> + <reg name="mbase" bitsize="32"/> + <reg name="mbound" bitsize="32"/> + <reg name="mibase" bitsize="32"/> + <reg name="mibound" bitsize="32"/> + <reg name="mdbase" bitsize="32"/> + <reg name="mdbound" bitsize="32"/> + <reg name="mucounteren" bitsize="32"/> + <reg name="mscounteren" bitsize="32"/> + <reg name="mhcounteren" bitsize="32"/> +</feature> diff --git a/gdb-xml/riscv-32bit-fpu.xml b/gdb-xml/riscv-32bit-fpu.xml new file mode 100644 index 0000000000..1eaae9119e --- /dev/null +++ b/gdb-xml/riscv-32bit-fpu.xml @@ -0,0 +1,50 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!-- Register numbers are hard-coded in order to maintain backward + compatibility with older versions of tools that didn't use xml + register descriptions. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.riscv.fpu"> + <reg name="ft0" bitsize="32" type="ieee_single" regnum="33"/> + <reg name="ft1" bitsize="32" type="ieee_single"/> + <reg name="ft2" bitsize="32" type="ieee_single"/> + <reg name="ft3" bitsize="32" type="ieee_single"/> + <reg name="ft4" bitsize="32" type="ieee_single"/> + <reg name="ft5" bitsize="32" type="ieee_single"/> + <reg name="ft6" bitsize="32" type="ieee_single"/> + <reg name="ft7" bitsize="32" type="ieee_single"/> + <reg name="fs0" bitsize="32" type="ieee_single"/> + <reg name="fs1" bitsize="32" type="ieee_single"/> + <reg name="fa0" bitsize="32" type="ieee_single"/> + <reg name="fa1" bitsize="32" type="ieee_single"/> + <reg name="fa2" bitsize="32" type="ieee_single"/> + <reg name="fa3" bitsize="32" type="ieee_single"/> + <reg name="fa4" bitsize="32" type="ieee_single"/> + <reg name="fa5" bitsize="32" type="ieee_single"/> + <reg name="fa6" bitsize="32" type="ieee_single"/> + <reg name="fa7" bitsize="32" type="ieee_single"/> + <reg name="fs2" bitsize="32" type="ieee_single"/> + <reg name="fs3" bitsize="32" type="ieee_single"/> + <reg name="fs4" bitsize="32" type="ieee_single"/> + <reg name="fs5" bitsize="32" type="ieee_single"/> + <reg name="fs6" bitsize="32" type="ieee_single"/> + <reg name="fs7" bitsize="32" type="ieee_single"/> + <reg name="fs8" bitsize="32" type="ieee_single"/> + <reg name="fs9" bitsize="32" type="ieee_single"/> + <reg name="fs10" bitsize="32" type="ieee_single"/> + <reg name="fs11" bitsize="32" type="ieee_single"/> + <reg name="ft8" bitsize="32" type="ieee_single"/> + <reg name="ft9" bitsize="32" type="ieee_single"/> + <reg name="ft10" bitsize="32" type="ieee_single"/> + <reg name="ft11" bitsize="32" type="ieee_single"/> + + <reg name="fflags" bitsize="32" type="int" regnum="66"/> + <reg name="frm" bitsize="32" type="int" regnum="67"/> + <reg name="fcsr" bitsize="32" type="int" regnum="68"/> +</feature> diff --git a/gdb-xml/riscv-64bit-cpu.xml b/gdb-xml/riscv-64bit-cpu.xml new file mode 100644 index 0000000000..b8aa424ae4 --- /dev/null +++ b/gdb-xml/riscv-64bit-cpu.xml @@ -0,0 +1,47 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!-- Register numbers are hard-coded in order to maintain backward + compatibility with older versions of tools that didn't use xml + register descriptions. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.riscv.cpu"> + <reg name="zero" bitsize="64" type="int" regnum="0"/> + <reg name="ra" bitsize="64" type="code_ptr"/> + <reg name="sp" bitsize="64" type="data_ptr"/> + <reg name="gp" bitsize="64" type="data_ptr"/> + <reg name="tp" bitsize="64" type="data_ptr"/> + <reg name="t0" bitsize="64" type="int"/> + <reg name="t1" bitsize="64" type="int"/> + <reg name="t2" bitsize="64" type="int"/> + <reg name="fp" bitsize="64" type="data_ptr"/> + <reg name="s1" bitsize="64" type="int"/> + <reg name="a0" bitsize="64" type="int"/> + <reg name="a1" bitsize="64" type="int"/> + <reg name="a2" bitsize="64" type="int"/> + <reg name="a3" bitsize="64" type="int"/> + <reg name="a4" bitsize="64" type="int"/> + <reg name="a5" bitsize="64" type="int"/> + <reg name="a6" bitsize="64" type="int"/> + <reg name="a7" bitsize="64" type="int"/> + <reg name="s2" bitsize="64" type="int"/> + <reg name="s3" bitsize="64" type="int"/> + <reg name="s4" bitsize="64" type="int"/> + <reg name="s5" bitsize="64" type="int"/> + <reg name="s6" bitsize="64" type="int"/> + <reg name="s7" bitsize="64" type="int"/> + <reg name="s8" bitsize="64" type="int"/> + <reg name="s9" bitsize="64" type="int"/> + <reg name="s10" bitsize="64" type="int"/> + <reg name="s11" bitsize="64" type="int"/> + <reg name="t3" bitsize="64" type="int"/> + <reg name="t4" bitsize="64" type="int"/> + <reg name="t5" bitsize="64" type="int"/> + <reg name="t6" bitsize="64" type="int"/> + <reg name="pc" bitsize="64" type="code_ptr"/> +</feature> diff --git a/gdb-xml/riscv-64bit-csr.xml b/gdb-xml/riscv-64bit-csr.xml new file mode 100644 index 0000000000..6aa4bed9f5 --- /dev/null +++ b/gdb-xml/riscv-64bit-csr.xml @@ -0,0 +1,250 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.riscv.csr"> + <reg name="ustatus" bitsize="64"/> + <reg name="uie" bitsize="64"/> + <reg name="utvec" bitsize="64"/> + <reg name="uscratch" bitsize="64"/> + <reg name="uepc" bitsize="64"/> + <reg name="ucause" bitsize="64"/> + <reg name="utval" bitsize="64"/> + <reg name="uip" bitsize="64"/> + <reg name="fflags" bitsize="64"/> + <reg name="frm" bitsize="64"/> + <reg name="fcsr" bitsize="64"/> + <reg name="cycle" bitsize="64"/> + <reg name="time" bitsize="64"/> + <reg name="instret" bitsize="64"/> + <reg name="hpmcounter3" bitsize="64"/> + <reg name="hpmcounter4" bitsize="64"/> + <reg name="hpmcounter5" bitsize="64"/> + <reg name="hpmcounter6" bitsize="64"/> + <reg name="hpmcounter7" bitsize="64"/> + <reg name="hpmcounter8" bitsize="64"/> + <reg name="hpmcounter9" bitsize="64"/> + <reg name="hpmcounter10" bitsize="64"/> + <reg name="hpmcounter11" bitsize="64"/> + <reg name="hpmcounter12" bitsize="64"/> + <reg name="hpmcounter13" bitsize="64"/> + <reg name="hpmcounter14" bitsize="64"/> + <reg name="hpmcounter15" bitsize="64"/> + <reg name="hpmcounter16" bitsize="64"/> + <reg name="hpmcounter17" bitsize="64"/> + <reg name="hpmcounter18" bitsize="64"/> + <reg name="hpmcounter19" bitsize="64"/> + <reg name="hpmcounter20" bitsize="64"/> + <reg name="hpmcounter21" bitsize="64"/> + <reg name="hpmcounter22" bitsize="64"/> + <reg name="hpmcounter23" bitsize="64"/> + <reg name="hpmcounter24" bitsize="64"/> + <reg name="hpmcounter25" bitsize="64"/> + <reg name="hpmcounter26" bitsize="64"/> + <reg name="hpmcounter27" bitsize="64"/> + <reg name="hpmcounter28" bitsize="64"/> + <reg name="hpmcounter29" bitsize="64"/> + <reg name="hpmcounter30" bitsize="64"/> + <reg name="hpmcounter31" bitsize="64"/> + <reg name="cycleh" bitsize="64"/> + <reg name="timeh" bitsize="64"/> + <reg name="instreth" bitsize="64"/> + <reg name="hpmcounter3h" bitsize="64"/> + <reg name="hpmcounter4h" bitsize="64"/> + <reg name="hpmcounter5h" bitsize="64"/> + <reg name="hpmcounter6h" bitsize="64"/> + <reg name="hpmcounter7h" bitsize="64"/> + <reg name="hpmcounter8h" bitsize="64"/> + <reg name="hpmcounter9h" bitsize="64"/> + <reg name="hpmcounter10h" bitsize="64"/> + <reg name="hpmcounter11h" bitsize="64"/> + <reg name="hpmcounter12h" bitsize="64"/> + <reg name="hpmcounter13h" bitsize="64"/> + <reg name="hpmcounter14h" bitsize="64"/> + <reg name="hpmcounter15h" bitsize="64"/> + <reg name="hpmcounter16h" bitsize="64"/> + <reg name="hpmcounter17h" bitsize="64"/> + <reg name="hpmcounter18h" bitsize="64"/> + <reg name="hpmcounter19h" bitsize="64"/> + <reg name="hpmcounter20h" bitsize="64"/> + <reg name="hpmcounter21h" bitsize="64"/> + <reg name="hpmcounter22h" bitsize="64"/> + <reg name="hpmcounter23h" bitsize="64"/> + <reg name="hpmcounter24h" bitsize="64"/> + <reg name="hpmcounter25h" bitsize="64"/> + <reg name="hpmcounter26h" bitsize="64"/> + <reg name="hpmcounter27h" bitsize="64"/> + <reg name="hpmcounter28h" bitsize="64"/> + <reg name="hpmcounter29h" bitsize="64"/> + <reg name="hpmcounter30h" bitsize="64"/> + <reg name="hpmcounter31h" bitsize="64"/> + <reg name="sstatus" bitsize="64"/> + <reg name="sedeleg" bitsize="64"/> + <reg name="sideleg" bitsize="64"/> + <reg name="sie" bitsize="64"/> + <reg name="stvec" bitsize="64"/> + <reg name="scounteren" bitsize="64"/> + <reg name="sscratch" bitsize="64"/> + <reg name="sepc" bitsize="64"/> + <reg name="scause" bitsize="64"/> + <reg name="stval" bitsize="64"/> + <reg name="sip" bitsize="64"/> + <reg name="satp" bitsize="64"/> + <reg name="mvendorid" bitsize="64"/> + <reg name="marchid" bitsize="64"/> + <reg name="mimpid" bitsize="64"/> + <reg name="mhartid" bitsize="64"/> + <reg name="mstatus" bitsize="64"/> + <reg name="misa" bitsize="64"/> + <reg name="medeleg" bitsize="64"/> + <reg name="mideleg" bitsize="64"/> + <reg name="mie" bitsize="64"/> + <reg name="mtvec" bitsize="64"/> + <reg name="mcounteren" bitsize="64"/> + <reg name="mscratch" bitsize="64"/> + <reg name="mepc" bitsize="64"/> + <reg name="mcause" bitsize="64"/> + <reg name="mtval" bitsize="64"/> + <reg name="mip" bitsize="64"/> + <reg name="pmpcfg0" bitsize="64"/> + <reg name="pmpcfg1" bitsize="64"/> + <reg name="pmpcfg2" bitsize="64"/> + <reg name="pmpcfg3" bitsize="64"/> + <reg name="pmpaddr0" bitsize="64"/> + <reg name="pmpaddr1" bitsize="64"/> + <reg name="pmpaddr2" bitsize="64"/> + <reg name="pmpaddr3" bitsize="64"/> + <reg name="pmpaddr4" bitsize="64"/> + <reg name="pmpaddr5" bitsize="64"/> + <reg name="pmpaddr6" bitsize="64"/> + <reg name="pmpaddr7" bitsize="64"/> + <reg name="pmpaddr8" bitsize="64"/> + <reg name="pmpaddr9" bitsize="64"/> + <reg name="pmpaddr10" bitsize="64"/> + <reg name="pmpaddr11" bitsize="64"/> + <reg name="pmpaddr12" bitsize="64"/> + <reg name="pmpaddr13" bitsize="64"/> + <reg name="pmpaddr14" bitsize="64"/> + <reg name="pmpaddr15" bitsize="64"/> + <reg name="mcycle" bitsize="64"/> + <reg name="minstret" bitsize="64"/> + <reg name="mhpmcounter3" bitsize="64"/> + <reg name="mhpmcounter4" bitsize="64"/> + <reg name="mhpmcounter5" bitsize="64"/> + <reg name="mhpmcounter6" bitsize="64"/> + <reg name="mhpmcounter7" bitsize="64"/> + <reg name="mhpmcounter8" bitsize="64"/> + <reg name="mhpmcounter9" bitsize="64"/> + <reg name="mhpmcounter10" bitsize="64"/> + <reg name="mhpmcounter11" bitsize="64"/> + <reg name="mhpmcounter12" bitsize="64"/> + <reg name="mhpmcounter13" bitsize="64"/> + <reg name="mhpmcounter14" bitsize="64"/> + <reg name="mhpmcounter15" bitsize="64"/> + <reg name="mhpmcounter16" bitsize="64"/> + <reg name="mhpmcounter17" bitsize="64"/> + <reg name="mhpmcounter18" bitsize="64"/> + <reg name="mhpmcounter19" bitsize="64"/> + <reg name="mhpmcounter20" bitsize="64"/> + <reg name="mhpmcounter21" bitsize="64"/> + <reg name="mhpmcounter22" bitsize="64"/> + <reg name="mhpmcounter23" bitsize="64"/> + <reg name="mhpmcounter24" bitsize="64"/> + <reg name="mhpmcounter25" bitsize="64"/> + <reg name="mhpmcounter26" bitsize="64"/> + <reg name="mhpmcounter27" bitsize="64"/> + <reg name="mhpmcounter28" bitsize="64"/> + <reg name="mhpmcounter29" bitsize="64"/> + <reg name="mhpmcounter30" bitsize="64"/> + <reg name="mhpmcounter31" bitsize="64"/> + <reg name="mcycleh" bitsize="64"/> + <reg name="minstreth" bitsize="64"/> + <reg name="mhpmcounter3h" bitsize="64"/> + <reg name="mhpmcounter4h" bitsize="64"/> + <reg name="mhpmcounter5h" bitsize="64"/> + <reg name="mhpmcounter6h" bitsize="64"/> + <reg name="mhpmcounter7h" bitsize="64"/> + <reg name="mhpmcounter8h" bitsize="64"/> + <reg name="mhpmcounter9h" bitsize="64"/> + <reg name="mhpmcounter10h" bitsize="64"/> + <reg name="mhpmcounter11h" bitsize="64"/> + <reg name="mhpmcounter12h" bitsize="64"/> + <reg name="mhpmcounter13h" bitsize="64"/> + <reg name="mhpmcounter14h" bitsize="64"/> + <reg name="mhpmcounter15h" bitsize="64"/> + <reg name="mhpmcounter16h" bitsize="64"/> + <reg name="mhpmcounter17h" bitsize="64"/> + <reg name="mhpmcounter18h" bitsize="64"/> + <reg name="mhpmcounter19h" bitsize="64"/> + <reg name="mhpmcounter20h" bitsize="64"/> + <reg name="mhpmcounter21h" bitsize="64"/> + <reg name="mhpmcounter22h" bitsize="64"/> + <reg name="mhpmcounter23h" bitsize="64"/> + <reg name="mhpmcounter24h" bitsize="64"/> + <reg name="mhpmcounter25h" bitsize="64"/> + <reg name="mhpmcounter26h" bitsize="64"/> + <reg name="mhpmcounter27h" bitsize="64"/> + <reg name="mhpmcounter28h" bitsize="64"/> + <reg name="mhpmcounter29h" bitsize="64"/> + <reg name="mhpmcounter30h" bitsize="64"/> + <reg name="mhpmcounter31h" bitsize="64"/> + <reg name="mhpmevent3" bitsize="64"/> + <reg name="mhpmevent4" bitsize="64"/> + <reg name="mhpmevent5" bitsize="64"/> + <reg name="mhpmevent6" bitsize="64"/> + <reg name="mhpmevent7" bitsize="64"/> + <reg name="mhpmevent8" bitsize="64"/> + <reg name="mhpmevent9" bitsize="64"/> + <reg name="mhpmevent10" bitsize="64"/> + <reg name="mhpmevent11" bitsize="64"/> + <reg name="mhpmevent12" bitsize="64"/> + <reg name="mhpmevent13" bitsize="64"/> + <reg name="mhpmevent14" bitsize="64"/> + <reg name="mhpmevent15" bitsize="64"/> + <reg name="mhpmevent16" bitsize="64"/> + <reg name="mhpmevent17" bitsize="64"/> + <reg name="mhpmevent18" bitsize="64"/> + <reg name="mhpmevent19" bitsize="64"/> + <reg name="mhpmevent20" bitsize="64"/> + <reg name="mhpmevent21" bitsize="64"/> + <reg name="mhpmevent22" bitsize="64"/> + <reg name="mhpmevent23" bitsize="64"/> + <reg name="mhpmevent24" bitsize="64"/> + <reg name="mhpmevent25" bitsize="64"/> + <reg name="mhpmevent26" bitsize="64"/> + <reg name="mhpmevent27" bitsize="64"/> + <reg name="mhpmevent28" bitsize="64"/> + <reg name="mhpmevent29" bitsize="64"/> + <reg name="mhpmevent30" bitsize="64"/> + <reg name="mhpmevent31" bitsize="64"/> + <reg name="tselect" bitsize="64"/> + <reg name="tdata1" bitsize="64"/> + <reg name="tdata2" bitsize="64"/> + <reg name="tdata3" bitsize="64"/> + <reg name="dcsr" bitsize="64"/> + <reg name="dpc" bitsize="64"/> + <reg name="dscratch" bitsize="64"/> + <reg name="hstatus" bitsize="64"/> + <reg name="hedeleg" bitsize="64"/> + <reg name="hideleg" bitsize="64"/> + <reg name="hie" bitsize="64"/> + <reg name="htvec" bitsize="64"/> + <reg name="hscratch" bitsize="64"/> + <reg name="hepc" bitsize="64"/> + <reg name="hcause" bitsize="64"/> + <reg name="hbadaddr" bitsize="64"/> + <reg name="hip" bitsize="64"/> + <reg name="mbase" bitsize="64"/> + <reg name="mbound" bitsize="64"/> + <reg name="mibase" bitsize="64"/> + <reg name="mibound" bitsize="64"/> + <reg name="mdbase" bitsize="64"/> + <reg name="mdbound" bitsize="64"/> + <reg name="mucounteren" bitsize="64"/> + <reg name="mscounteren" bitsize="64"/> + <reg name="mhcounteren" bitsize="64"/> +</feature> diff --git a/gdb-xml/riscv-64bit-fpu.xml b/gdb-xml/riscv-64bit-fpu.xml new file mode 100644 index 0000000000..794854cc01 --- /dev/null +++ b/gdb-xml/riscv-64bit-fpu.xml @@ -0,0 +1,56 @@ +<?xml version="1.0"?> +<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc. + + Copying and distribution of this file, with or without modification, + are permitted in any medium without royalty provided the copyright + notice and this notice are preserved. --> + +<!-- Register numbers are hard-coded in order to maintain backward + compatibility with older versions of tools that didn't use xml + register descriptions. --> + +<!DOCTYPE feature SYSTEM "gdb-target.dtd"> +<feature name="org.gnu.gdb.riscv.fpu"> + + <union id="riscv_double"> + <field name="float" type="ieee_single"/> + <field name="double" type="ieee_double"/> + </union> + + <reg name="ft0" bitsize="64" type="riscv_double" regnum="33"/> + <reg name="ft1" bitsize="64" type="riscv_double"/> + <reg name="ft2" bitsize="64" type="riscv_double"/> + <reg name="ft3" bitsize="64" type="riscv_double"/> + <reg name="ft4" bitsize="64" type="riscv_double"/> + <reg name="ft5" bitsize="64" type="riscv_double"/> + <reg name="ft6" bitsize="64" type="riscv_double"/> + <reg name="ft7" bitsize="64" type="riscv_double"/> + <reg name="fs0" bitsize="64" type="riscv_double"/> + <reg name="fs1" bitsize="64" type="riscv_double"/> + <reg name="fa0" bitsize="64" type="riscv_double"/> + <reg name="fa1" bitsize="64" type="riscv_double"/> + <reg name="fa2" bitsize="64" type="riscv_double"/> + <reg name="fa3" bitsize="64" type="riscv_double"/> + <reg name="fa4" bitsize="64" type="riscv_double"/> + <reg name="fa5" bitsize="64" type="riscv_double"/> + <reg name="fa6" bitsize="64" type="riscv_double"/> + <reg name="fa7" bitsize="64" type="riscv_double"/> + <reg name="fs2" bitsize="64" type="riscv_double"/> + <reg name="fs3" bitsize="64" type="riscv_double"/> + <reg name="fs4" bitsize="64" type="riscv_double"/> + <reg name="fs5" bitsize="64" type="riscv_double"/> + <reg name="fs6" bitsize="64" type="riscv_double"/> + <reg name="fs7" bitsize="64" type="riscv_double"/> + <reg name="fs8" bitsize="64" type="riscv_double"/> + <reg name="fs9" bitsize="64" type="riscv_double"/> + <reg name="fs10" bitsize="64" type="riscv_double"/> + <reg name="fs11" bitsize="64" type="riscv_double"/> + <reg name="ft8" bitsize="64" type="riscv_double"/> + <reg name="ft9" bitsize="64" type="riscv_double"/> + <reg name="ft10" bitsize="64" type="riscv_double"/> + <reg name="ft11" bitsize="64" type="riscv_double"/> + + <reg name="fflags" bitsize="32" type="int" regnum="66"/> + <reg name="frm" bitsize="32" type="int" regnum="67"/> + <reg name="fcsr" bitsize="32" type="int" regnum="68"/> +</feature> diff --git a/gdbstub.c b/gdbstub.c index bc774ae992..d54abd17cc 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -1152,6 +1152,7 @@ static int gdb_handle_vcont(GDBState *s, const char *p) uint32_t pid, tid; GDBProcess *process; CPUState *cpu; + GDBThreadIdKind kind; #ifdef CONFIG_USER_ONLY int max_cpus = 1; /* global variable max_cpus exists only in system mode */ @@ -1194,12 +1195,21 @@ static int gdb_handle_vcont(GDBState *s, const char *p) goto out; } - if (*p++ != ':') { + if (*p == '\0' || *p == ';') { + /* + * No thread specifier, action is on "all threads". The + * specification is unclear regarding the process to act on. We + * choose all processes. + */ + kind = GDB_ALL_PROCESSES; + } else if (*p++ == ':') { + kind = read_thread_id(p, &p, &pid, &tid); + } else { res = -ENOTSUP; goto out; } - switch (read_thread_id(p, &p, &pid, &tid)) { + switch (kind) { case GDB_READ_THREAD_ERR: res = -EINVAL; goto out; diff --git a/gitdm.config b/gitdm.config index 7472d4b8be..c01c219078 100644 --- a/gitdm.config +++ b/gitdm.config @@ -36,6 +36,7 @@ GroupMap contrib/gitdm/group-map-wavecomp Wave Computing GroupMap contrib/gitdm/group-map-cadence Cadence Design Systems GroupMap contrib/gitdm/group-map-codeweavers CodeWeavers GroupMap contrib/gitdm/group-map-ibm IBM +GroupMap contrib/gitdm/group-map-janustech Janus Technologies # Also group together our prolific individual contributors # and those working under academic auspices diff --git a/hmp-commands-info.hx b/hmp-commands-info.hx index cbee8b944d..c59444c461 100644 --- a/hmp-commands-info.hx +++ b/hmp-commands-info.hx @@ -205,6 +205,20 @@ Show PIC state. ETEXI { + .name = "rdma", + .args_type = "", + .params = "", + .help = "show RDMA state", + .cmd = hmp_info_rdma, + }, + +STEXI +@item info rdma +@findex info rdma +Show RDMA state. +ETEXI + + { .name = "pci", .args_type = "", .params = "", diff --git a/hmp-commands.hx b/hmp-commands.hx index 9b4035965c..a2c3ffc218 100644 --- a/hmp-commands.hx +++ b/hmp-commands.hx @@ -588,6 +588,21 @@ is mapped. ETEXI { + .name = "gva2gpa", + .args_type = "addr:l", + .params = "addr", + .help = "print the guest physical address corresponding to a guest virtual address", + .cmd = hmp_gva2gpa, + }, + +STEXI +@item gva2gpa @var{addr} +@findex gva2gpa +Print the guest physical address at which the guest's virtual address @var{addr} +is mapped based on the mapping for the current CPU. +ETEXI + + { .name = "p|print", .args_type = "fmt:/,val:l", .params = "/fmt expr", diff --git a/hmp.c b/hmp.c index 4a702d5b97..56a3ed7375 100644 --- a/hmp.c +++ b/hmp.c @@ -51,6 +51,7 @@ #include "qemu/error-report.h" #include "exec/ramlist.h" #include "hw/intc/intc.h" +#include "hw/rdma/rdma.h" #include "migration/snapshot.h" #include "migration/misc.h" @@ -432,17 +433,17 @@ void hmp_info_migrate_parameters(Monitor *mon, const QDict *qdict) MigrationParameter_str(MIGRATION_PARAMETER_BLOCK_INCREMENTAL), params->block_incremental ? "on" : "off"); monitor_printf(mon, "%s: %u\n", - MigrationParameter_str(MIGRATION_PARAMETER_X_MULTIFD_CHANNELS), - params->x_multifd_channels); - monitor_printf(mon, "%s: %u\n", - MigrationParameter_str(MIGRATION_PARAMETER_X_MULTIFD_PAGE_COUNT), - params->x_multifd_page_count); + MigrationParameter_str(MIGRATION_PARAMETER_MULTIFD_CHANNELS), + params->multifd_channels); monitor_printf(mon, "%s: %" PRIu64 "\n", MigrationParameter_str(MIGRATION_PARAMETER_XBZRLE_CACHE_SIZE), params->xbzrle_cache_size); monitor_printf(mon, "%s: %" PRIu64 "\n", MigrationParameter_str(MIGRATION_PARAMETER_MAX_POSTCOPY_BANDWIDTH), params->max_postcopy_bandwidth); + monitor_printf(mon, " %s: '%s'\n", + MigrationParameter_str(MIGRATION_PARAMETER_TLS_AUTHZ), + params->has_tls_authz ? params->tls_authz : ""); } qapi_free_MigrationParameters(params); @@ -579,8 +580,7 @@ static void print_block_info(Monitor *mon, BlockInfo *info, monitor_printf(mon, "\nImages:\n"); image_info = inserted->image; while (1) { - bdrv_image_info_dump((fprintf_function)monitor_printf, - mon, image_info); + bdrv_image_info_dump(image_info); if (image_info->has_backing_image) { image_info = image_info->backing_image; } else { @@ -1013,6 +1013,32 @@ void hmp_info_pic(Monitor *mon, const QDict *qdict) hmp_info_pic_foreach, mon); } +static int hmp_info_rdma_foreach(Object *obj, void *opaque) +{ + RdmaProvider *rdma; + RdmaProviderClass *k; + Monitor *mon = opaque; + + if (object_dynamic_cast(obj, INTERFACE_RDMA_PROVIDER)) { + rdma = RDMA_PROVIDER(obj); + k = RDMA_PROVIDER_GET_CLASS(obj); + if (k->print_statistics) { + k->print_statistics(mon, rdma); + } else { + monitor_printf(mon, "RDMA statistics not available for %s.\n", + object_get_typename(obj)); + } + } + + return 0; +} + +void hmp_info_rdma(Monitor *mon, const QDict *qdict) +{ + object_child_foreach_recursive(object_get_root(), + hmp_info_rdma_foreach, mon); +} + void hmp_info_pci(Monitor *mon, const QDict *qdict) { PciInfoList *info_list, *info; @@ -1454,10 +1480,11 @@ void hmp_delvm(Monitor *mon, const QDict *qdict) const char *name = qdict_get_str(qdict, "name"); if (bdrv_all_delete_snapshot(name, &bs, &err) < 0) { - error_reportf_err(err, - "Error while deleting snapshot on device '%s': ", - bdrv_get_device_name(bs)); + error_prepend(&err, + "deleting snapshot on device '%s': ", + bdrv_get_device_name(bs)); } + hmp_handle_error(mon, &err); } void hmp_info_snapshots(Monitor *mon, const QDict *qdict) @@ -1559,7 +1586,7 @@ void hmp_info_snapshots(Monitor *mon, const QDict *qdict) monitor_printf(mon, "List of snapshots present on all disks:\n"); if (total > 0) { - bdrv_snapshot_dump((fprintf_function)monitor_printf, mon, NULL); + bdrv_snapshot_dump(NULL); monitor_printf(mon, "\n"); for (i = 0; i < total; i++) { sn = &sn_tab[global_snapshots[i]]; @@ -1567,7 +1594,7 @@ void hmp_info_snapshots(Monitor *mon, const QDict *qdict) * overwrite it. */ pstrcpy(sn->id_str, sizeof(sn->id_str), "--"); - bdrv_snapshot_dump((fprintf_function)monitor_printf, mon, sn); + bdrv_snapshot_dump(sn); monitor_printf(mon, "\n"); } } else { @@ -1581,11 +1608,10 @@ void hmp_info_snapshots(Monitor *mon, const QDict *qdict) monitor_printf(mon, "\nList of partial (non-loadable) snapshots on '%s':\n", image_entry->imagename); - bdrv_snapshot_dump((fprintf_function)monitor_printf, mon, NULL); + bdrv_snapshot_dump(NULL); monitor_printf(mon, "\n"); QTAILQ_FOREACH(snapshot_entry, &image_entry->snapshots, next) { - bdrv_snapshot_dump((fprintf_function)monitor_printf, mon, - &snapshot_entry->sn); + bdrv_snapshot_dump(&snapshot_entry->sn); monitor_printf(mon, "\n"); } } @@ -1759,6 +1785,12 @@ void hmp_migrate_set_parameter(Monitor *mon, const QDict *qdict) p->tls_hostname->type = QTYPE_QSTRING; visit_type_str(v, param, &p->tls_hostname->u.s, &err); break; + case MIGRATION_PARAMETER_TLS_AUTHZ: + p->has_tls_authz = true; + p->tls_authz = g_new0(StrOrNull, 1); + p->tls_authz->type = QTYPE_QSTRING; + visit_type_str(v, param, &p->tls_authz->u.s, &err); + break; case MIGRATION_PARAMETER_MAX_BANDWIDTH: p->has_max_bandwidth = true; /* @@ -1785,19 +1817,17 @@ void hmp_migrate_set_parameter(Monitor *mon, const QDict *qdict) p->has_block_incremental = true; visit_type_bool(v, param, &p->block_incremental, &err); break; - case MIGRATION_PARAMETER_X_MULTIFD_CHANNELS: - p->has_x_multifd_channels = true; - visit_type_int(v, param, &p->x_multifd_channels, &err); - break; - case MIGRATION_PARAMETER_X_MULTIFD_PAGE_COUNT: - p->has_x_multifd_page_count = true; - visit_type_int(v, param, &p->x_multifd_page_count, &err); + case MIGRATION_PARAMETER_MULTIFD_CHANNELS: + p->has_multifd_channels = true; + visit_type_int(v, param, &p->multifd_channels, &err); break; case MIGRATION_PARAMETER_XBZRLE_CACHE_SIZE: p->has_xbzrle_cache_size = true; visit_type_size(v, param, &cache_size, &err); - if (err || cache_size > INT64_MAX - || (size_t)cache_size != cache_size) { + if (err) { + break; + } + if (cache_size > INT64_MAX || (size_t)cache_size != cache_size) { error_setg(&err, "Invalid size %s", valuestr); break; } diff --git a/hmp.h b/hmp.h index e0f32f04d3..43617f2646 100644 --- a/hmp.h +++ b/hmp.h @@ -36,6 +36,7 @@ void hmp_info_spice(Monitor *mon, const QDict *qdict); void hmp_info_balloon(Monitor *mon, const QDict *qdict); void hmp_info_irq(Monitor *mon, const QDict *qdict); void hmp_info_pic(Monitor *mon, const QDict *qdict); +void hmp_info_rdma(Monitor *mon, const QDict *qdict); void hmp_info_pci(Monitor *mon, const QDict *qdict); void hmp_info_block_jobs(Monitor *mon, const QDict *qdict); void hmp_info_tpm(Monitor *mon, const QDict *qdict); diff --git a/hw/9pfs/trace-events b/hw/9pfs/trace-events index 881e4c4dd8..c0a0a4ab5d 100644 --- a/hw/9pfs/trace-events +++ b/hw/9pfs/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/9pfs/virtio-9p.c +# 9p.c v9fs_rcancel(uint16_t tag, uint8_t id) "tag %d id %d" v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d" v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" diff --git a/hw/Kconfig b/hw/Kconfig index d5ecd02070..88b9f15007 100644 --- a/hw/Kconfig +++ b/hw/Kconfig @@ -26,6 +26,7 @@ source pci-bridge/Kconfig source pci-host/Kconfig source pcmcia/Kconfig source pci/Kconfig +source rdma/Kconfig source scsi/Kconfig source sd/Kconfig source smbios/Kconfig diff --git a/hw/acpi/bios-linker-loader.c b/hw/acpi/bios-linker-loader.c index d16b8bbcb1..626c04a39f 100644 --- a/hw/acpi/bios-linker-loader.c +++ b/hw/acpi/bios-linker-loader.c @@ -283,6 +283,8 @@ void bios_linker_loader_add_pointer(BIOSLinker *linker, const BiosLinkerFileEntry *source_file = bios_linker_find_file(linker, src_file); + assert(dst_file); + assert(source_file); assert(dst_patched_offset < dst_file->blob->len); assert(dst_patched_offset + dst_patched_size <= dst_file->blob->len); assert(src_offset < source_file->blob->len); diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c index c5d8646abc..e53dfe1ee3 100644 --- a/hw/acpi/ich9.c +++ b/hw/acpi/ich9.c @@ -483,13 +483,24 @@ void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp) NULL); } +void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, + Error **errp) +{ + ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev); + + if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) && + !lpc->pm.acpi_memory_hotplug.is_enabled) + error_setg(errp, + "memory hotplug is not enabled: %s.memory-hotplug-support " + "is not set", object_get_typename(OBJECT(lpc))); +} + void ich9_pm_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev); - if (lpc->pm.acpi_memory_hotplug.is_enabled && - object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { + if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) { nvdimm_acpi_plug_cb(hotplug_dev, dev); } else { diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c index e53b2cb681..9fdad6dc3f 100644 --- a/hw/acpi/nvdimm.c +++ b/hw/acpi/nvdimm.c @@ -382,7 +382,7 @@ nvdimm_build_structure_caps(GArray *structures, uint32_t capabilities) nfit_caps->capabilities = cpu_to_le32(capabilities); } -static GArray *nvdimm_build_device_structure(AcpiNVDIMMState *state) +static GArray *nvdimm_build_device_structure(NVDIMMState *state) { GSList *device_list = nvdimm_get_device_list(); GArray *structures = g_array_new(false, true /* clear */, 1); @@ -416,7 +416,7 @@ static void nvdimm_init_fit_buffer(NvdimmFitBuffer *fit_buf) fit_buf->fit = g_array_new(false, true /* clear */, 1); } -static void nvdimm_build_fit_buffer(AcpiNVDIMMState *state) +static void nvdimm_build_fit_buffer(NVDIMMState *state) { NvdimmFitBuffer *fit_buf = &state->fit_buf; @@ -425,12 +425,12 @@ static void nvdimm_build_fit_buffer(AcpiNVDIMMState *state) fit_buf->dirty = true; } -void nvdimm_plug(AcpiNVDIMMState *state) +void nvdimm_plug(NVDIMMState *state) { nvdimm_build_fit_buffer(state); } -static void nvdimm_build_nfit(AcpiNVDIMMState *state, GArray *table_offsets, +static void nvdimm_build_nfit(NVDIMMState *state, GArray *table_offsets, GArray *table_data, BIOSLinker *linker) { NvdimmFitBuffer *fit_buf = &state->fit_buf; @@ -570,7 +570,7 @@ nvdimm_dsm_no_payload(uint32_t func_ret_status, hwaddr dsm_mem_addr) #define NVDIMM_QEMU_RSVD_HANDLE_ROOT 0x10000 /* Read FIT data, defined in docs/specs/acpi_nvdimm.txt. */ -static void nvdimm_dsm_func_read_fit(AcpiNVDIMMState *state, NvdimmDsmIn *in, +static void nvdimm_dsm_func_read_fit(NVDIMMState *state, NvdimmDsmIn *in, hwaddr dsm_mem_addr) { NvdimmFitBuffer *fit_buf = &state->fit_buf; @@ -619,7 +619,7 @@ exit: } static void -nvdimm_dsm_handle_reserved_root_method(AcpiNVDIMMState *state, +nvdimm_dsm_handle_reserved_root_method(NVDIMMState *state, NvdimmDsmIn *in, hwaddr dsm_mem_addr) { switch (in->function) { @@ -863,7 +863,7 @@ nvdimm_dsm_read(void *opaque, hwaddr addr, unsigned size) static void nvdimm_dsm_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { - AcpiNVDIMMState *state = opaque; + NVDIMMState *state = opaque; NvdimmDsmIn *in; hwaddr dsm_mem_addr = val; @@ -925,7 +925,7 @@ void nvdimm_acpi_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev) } } -void nvdimm_init_acpi_state(AcpiNVDIMMState *state, MemoryRegion *io, +void nvdimm_init_acpi_state(NVDIMMState *state, MemoryRegion *io, FWCfgState *fw_cfg, Object *owner) { memory_region_init_io(&state->io_mr, owner, &nvdimm_dsm_ops, state, @@ -992,7 +992,7 @@ static void nvdimm_build_common_dsm(Aml *dev) field = aml_field(NVDIMM_DSM_IOPORT, AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE); aml_append(field, aml_named_field(NVDIMM_DSM_NOTIFY, - sizeof(uint32_t) * BITS_PER_BYTE)); + NVDIMM_ACPI_IO_LEN * BITS_PER_BYTE)); aml_append(method, field); /* @@ -1086,7 +1086,7 @@ static void nvdimm_build_common_dsm(Aml *dev) */ aml_append(method, aml_store(handle, aml_name(NVDIMM_DSM_HANDLE))); aml_append(method, aml_store(aml_arg(1), aml_name(NVDIMM_DSM_REVISION))); - aml_append(method, aml_store(aml_arg(2), aml_name(NVDIMM_DSM_FUNCTION))); + aml_append(method, aml_store(function, aml_name(NVDIMM_DSM_FUNCTION))); /* * The fourth parameter (Arg3) of _DSM is a package which contains @@ -1260,7 +1260,7 @@ static void nvdimm_build_nvdimm_devices(Aml *root_dev, uint32_t ram_slots) } static void nvdimm_build_ssdt(GArray *table_offsets, GArray *table_data, - BIOSLinker *linker, GArray *dsm_dma_arrea, + BIOSLinker *linker, GArray *dsm_dma_area, uint32_t ram_slots) { Aml *ssdt, *sb_scope, *dev; @@ -1307,7 +1307,7 @@ static void nvdimm_build_ssdt(GArray *table_offsets, GArray *table_data, NVDIMM_ACPI_MEM_ADDR); bios_linker_loader_alloc(linker, - NVDIMM_DSM_MEM_FILE, dsm_dma_arrea, + NVDIMM_DSM_MEM_FILE, dsm_dma_area, sizeof(NvdimmDsmIn), false /* high memory */); bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE, mem_addr_offset, sizeof(uint32_t), @@ -1319,7 +1319,7 @@ static void nvdimm_build_ssdt(GArray *table_offsets, GArray *table_data, } void nvdimm_build_acpi(GArray *table_offsets, GArray *table_data, - BIOSLinker *linker, AcpiNVDIMMState *state, + BIOSLinker *linker, NVDIMMState *state, uint32_t ram_slots) { GSList *device_list; diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 7b98121070..9c079d6834 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -380,9 +380,17 @@ static void piix4_pm_powerdown_req(Notifier *n, void *opaque) static void piix4_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { + PIIX4PMState *s = PIIX4_PM(hotplug_dev); + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { acpi_pcihp_device_pre_plug_cb(hotplug_dev, dev, errp); - } else if (!object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) && + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { + if (!s->acpi_memory_hotplug.is_enabled) { + error_setg(errp, + "memory hotplug is not enabled: %s.memory-hotplug-support " + "is not set", object_get_typename(OBJECT(s))); + } + } else if ( !object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { error_setg(errp, "acpi: device pre plug request for not supported" " device type: %s", object_get_typename(OBJECT(dev))); @@ -394,8 +402,7 @@ static void piix4_device_plug_cb(HotplugHandler *hotplug_dev, { PIIX4PMState *s = PIIX4_PM(hotplug_dev); - if (s->acpi_memory_hotplug.is_enabled && - object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { + if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) { nvdimm_acpi_plug_cb(hotplug_dev, dev); } else { diff --git a/hw/acpi/trace-events b/hw/acpi/trace-events index df0024f8b2..6272d8a9e7 100644 --- a/hw/acpi/trace-events +++ b/hw/acpi/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/acpi/memory_hotplug.c +# memory_hotplug.c mhp_acpi_invalid_slot_selected(uint32_t slot) "0x%"PRIx32 mhp_acpi_ejecting_invalid_slot(uint32_t slot) "0x%"PRIx32 mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr lo: 0x%"PRIx32 @@ -17,7 +17,7 @@ mhp_acpi_clear_remove_evt(uint32_t slot) "slot[0x%"PRIx32"] clear remove event" mhp_acpi_pc_dimm_deleted(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm deleted" mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm delete failed" -# hw/acpi/cpu.c +# cpu.c cpuhp_acpi_invalid_idx_selected(uint32_t idx) "0x%"PRIx32 cpuhp_acpi_read_flags(uint32_t idx, uint8_t flags) "idx[0x%"PRIx32"] flags: 0x%"PRIx8 cpuhp_acpi_write_idx(uint32_t idx) "set active cpu idx: 0x%"PRIx32 @@ -31,6 +31,6 @@ cpuhp_acpi_ejecting_cpu(uint32_t idx) "0x%"PRIx32 cpuhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "idx[0x%"PRIx32"] OST EVENT: 0x%"PRIx32 cpuhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "idx[0x%"PRIx32"] OST STATUS: 0x%"PRIx32 -# hw/acpi/tco.c +# tco.c tco_timer_reload(int ticks, int msec) "ticks=%d (%d ms)" tco_timer_expired(int timeouts_no, bool strap, bool no_reboot) "timeouts_no=%d no_reboot=%d/%d" diff --git a/hw/alpha/Kconfig b/hw/alpha/Kconfig index 22cefd9577..15c59ff264 100644 --- a/hw/alpha/Kconfig +++ b/hw/alpha/Kconfig @@ -2,6 +2,7 @@ config DP264 bool imply PCI_DEVICES imply TEST_DEVICES + imply E1000_PCI select I82374 select I8254 select I8259 diff --git a/hw/alpha/trace-events b/hw/alpha/trace-events index 46024cca0b..5b8315f27f 100644 --- a/hw/alpha/trace-events +++ b/hw/alpha/trace-events @@ -1,4 +1,4 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/alpha/pci.c +# pci.c alpha_pci_iack_write(void) "" diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 996812498d..1c23ebd992 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -19,6 +19,8 @@ #include "hw/arm/aspeed_soc.h" #include "hw/boards.h" #include "hw/i2c/smbus_eeprom.h" +#include "hw/misc/pca9552.h" +#include "hw/misc/tmp105.h" #include "qemu/log.h" #include "sysemu/block-backend.h" #include "hw/loader.h" @@ -267,7 +269,8 @@ static void ast2500_evb_i2c_init(AspeedBoardState *bmc) eeprom_buf); /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */ - i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "tmp105", 0x4d); + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), + TYPE_TMP105, 0x4d); /* The AST2500 EVB does not have an RTC. Let's pretend that one is * plugged on the I2C bus header */ @@ -288,13 +291,15 @@ static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc) AspeedSoCState *soc = &bmc->soc; uint8_t *eeprom_buf = g_malloc0(8 * 1024); - i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), "pca9552", 0x60); + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), TYPE_PCA9552, + 0x60); i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "tmp423", 0x4c); i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 5), "tmp423", 0x4c); /* The Witherspoon expects a TMP275 but a TMP105 is compatible */ - i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "tmp105", 0x4a); + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), TYPE_TMP105, + 0x4a); /* The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is * good enough */ @@ -302,7 +307,7 @@ static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc) smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), 0x51, eeprom_buf); - i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "pca9552", + i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), TYPE_PCA9552, 0x60); } diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index 750162cc95..ea8100f65a 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -32,6 +32,7 @@ #include "hw/arm/arm.h" #include "exec/address-spaces.h" #include "hw/arm/exynos4210.h" +#include "hw/net/lan9118.h" #include "hw/boards.h" #undef DEBUG @@ -92,7 +93,7 @@ static void lan9215_init(uint32_t base, qemu_irq irq) /* This should be a 9215 but the 9118 is close enough */ if (nd_table[0].used) { qemu_check_nic_model(&nd_table[0], "lan9118"); - dev = qdev_create(NULL, "lan9118"); + dev = qdev_create(NULL, TYPE_LAN9118); qdev_set_nic_properties(dev, &nd_table[0]); qdev_prop_set_uint32(dev, "mode_16bit", 1); qdev_init_nofail(dev); diff --git a/hw/arm/gumstix.c b/hw/arm/gumstix.c index 79886ce378..343cbfd7da 100644 --- a/hw/arm/gumstix.c +++ b/hw/arm/gumstix.c @@ -40,7 +40,7 @@ #include "hw/arm/pxa.h" #include "net/net.h" #include "hw/block/flash.h" -#include "hw/devices.h" +#include "hw/net/smc91c111.h" #include "hw/boards.h" #include "exec/address-spaces.h" #include "sysemu/qtest.h" diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index 4eceebb9ea..0b6f24465e 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -12,10 +12,10 @@ #include "qemu-common.h" #include "cpu.h" #include "hw/sysbus.h" -#include "hw/devices.h" #include "hw/boards.h" #include "hw/arm/arm.h" #include "hw/misc/arm_integrator_debug.h" +#include "hw/net/smc91c111.h" #include "net/net.h" #include "exec/address-spaces.h" #include "sysemu/sysemu.h" diff --git a/hw/arm/kzm.c b/hw/arm/kzm.c index 864c7bd411..139934c4ec 100644 --- a/hw/arm/kzm.c +++ b/hw/arm/kzm.c @@ -22,7 +22,7 @@ #include "qemu/error-report.h" #include "exec/address-spaces.h" #include "net/net.h" -#include "hw/devices.h" +#include "hw/net/lan9118.h" #include "hw/char/serial.h" #include "sysemu/qtest.h" diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c index e96738ad26..c1cec59037 100644 --- a/hw/arm/mainstone.c +++ b/hw/arm/mainstone.c @@ -18,7 +18,7 @@ #include "hw/arm/pxa.h" #include "hw/arm/arm.h" #include "net/net.h" -#include "hw/devices.h" +#include "hw/net/smc91c111.h" #include "hw/boards.h" #include "hw/block/flash.h" #include "hw/sysbus.h" diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index f79f090a4a..7832408bb7 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -56,6 +56,7 @@ #include "hw/arm/armsse.h" #include "hw/dma/pl080.h" #include "hw/ssi/pl022.h" +#include "hw/net/lan9118.h" #include "net/net.h" #include "hw/core/split-irq.h" @@ -244,7 +245,7 @@ static MemoryRegion *make_eth_dev(MPS2TZMachineState *mms, void *opaque, * except that it doesn't support the checksum-offload feature. */ qemu_check_nic_model(nd, "lan9118"); - mms->lan9118 = qdev_create(NULL, "lan9118"); + mms->lan9118 = qdev_create(NULL, TYPE_LAN9118); qdev_set_nic_properties(mms->lan9118, nd); qdev_init_nofail(mms->lan9118); diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index e3d698ba6c..54b7395849 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -36,7 +36,7 @@ #include "hw/timer/cmsdk-apb-timer.h" #include "hw/timer/cmsdk-apb-dualtimer.h" #include "hw/misc/mps2-scc.h" -#include "hw/devices.h" +#include "hw/net/lan9118.h" #include "net/net.h" typedef enum MPS2FPGAType { diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c index 906b7ca22d..303f7a31e1 100644 --- a/hw/arm/nseries.c +++ b/hw/arm/nseries.c @@ -30,7 +30,10 @@ #include "ui/console.h" #include "hw/boards.h" #include "hw/i2c/i2c.h" -#include "hw/devices.h" +#include "hw/display/blizzard.h" +#include "hw/input/tsc2xxx.h" +#include "hw/misc/cbus.h" +#include "hw/misc/tmp105.h" #include "hw/block/flash.h" #include "hw/hw.h" #include "hw/bt.h" @@ -218,7 +221,7 @@ static void n8x0_i2c_setup(struct n800_s *s) qemu_register_powerdown_notifier(&n8x0_system_powerdown_notifier); /* Attach a TMP105 PM chip (A0 wired to ground) */ - dev = i2c_create_slave(i2c, "tmp105", N8X0_TMP105_ADDR); + dev = i2c_create_slave(i2c, TYPE_TMP105, N8X0_TMP105_ADDR); qdev_connect_gpio_out(dev, 0, tmp_irq); } diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index 94dffb2f57..446223906e 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -273,7 +273,7 @@ static void omap_eac_format_update(struct omap_eac_s *s) * does I2S specify it? */ /* All register writes are 16 bits so we we store 16-bit samples * in the buffers regardless of AGCFR[B8_16] value. */ - fmt.fmt = AUD_FMT_U16; + fmt.fmt = AUDIO_FORMAT_U16; s->codec.in_voice = AUD_open_in(&s->codec.card, s->codec.in_voice, "eac.codec.in", s, omap_eac_in_cb, &fmt); diff --git a/hw/arm/palm.c b/hw/arm/palm.c index 285f43709d..139d27d1cc 100644 --- a/hw/arm/palm.c +++ b/hw/arm/palm.c @@ -26,7 +26,7 @@ #include "hw/arm/omap.h" #include "hw/boards.h" #include "hw/arm/arm.h" -#include "hw/devices.h" +#include "hw/input/tsc2xxx.h" #include "hw/loader.h" #include "exec/address-spaces.h" #include "cpu.h" diff --git a/hw/arm/realview.c b/hw/arm/realview.c index 242f5a87b6..05a244df25 100644 --- a/hw/arm/realview.c +++ b/hw/arm/realview.c @@ -14,7 +14,8 @@ #include "hw/sysbus.h" #include "hw/arm/arm.h" #include "hw/arm/primecell.h" -#include "hw/devices.h" +#include "hw/net/lan9118.h" +#include "hw/net/smc91c111.h" #include "hw/pci/pci.h" #include "net/net.h" #include "sysemu/sysemu.h" diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index bbf4b8721a..e94be6db6c 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -412,10 +412,10 @@ inline void smmu_inv_notifiers_mr(IOMMUMemoryRegion *mr) /* Unmap all notifiers of all mr's */ void smmu_inv_notifiers_all(SMMUState *s) { - SMMUNotifierNode *node; + SMMUDevice *sdev; - QLIST_FOREACH(node, &s->notifiers_list, next) { - smmu_inv_notifiers_mr(&node->sdev->iommu); + QLIST_FOREACH(sdev, &s->devices_with_notifiers, next) { + smmu_inv_notifiers_mr(&sdev->iommu); } } diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 8c4e99fecc..fd8ec7860e 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -828,10 +828,10 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr, /* invalidate an asid/iova tuple in all mr's */ static void smmuv3_inv_notifiers_iova(SMMUState *s, int asid, dma_addr_t iova) { - SMMUNotifierNode *node; + SMMUDevice *sdev; - QLIST_FOREACH(node, &s->notifiers_list, next) { - IOMMUMemoryRegion *mr = &node->sdev->iommu; + QLIST_FOREACH(sdev, &s->devices_with_notifiers, next) { + IOMMUMemoryRegion *mr = &sdev->iommu; IOMMUNotifier *n; trace_smmuv3_inv_notifiers_iova(mr->parent_obj.name, asid, iova); @@ -1472,8 +1472,6 @@ static void smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu, SMMUDevice *sdev = container_of(iommu, SMMUDevice, iommu); SMMUv3State *s3 = sdev->smmu; SMMUState *s = &(s3->smmu_state); - SMMUNotifierNode *node = NULL; - SMMUNotifierNode *next_node = NULL; if (new & IOMMU_NOTIFIER_MAP) { int bus_num = pci_bus_num(sdev->bus); @@ -1485,22 +1483,10 @@ static void smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu, if (old == IOMMU_NOTIFIER_NONE) { trace_smmuv3_notify_flag_add(iommu->parent_obj.name); - node = g_malloc0(sizeof(*node)); - node->sdev = sdev; - QLIST_INSERT_HEAD(&s->notifiers_list, node, next); - return; - } - - /* update notifier node with new flags */ - QLIST_FOREACH_SAFE(node, &s->notifiers_list, next, next_node) { - if (node->sdev == sdev) { - if (new == IOMMU_NOTIFIER_NONE) { - trace_smmuv3_notify_flag_del(iommu->parent_obj.name); - QLIST_REMOVE(node, next); - g_free(node); - } - return; - } + QLIST_INSERT_HEAD(&s->devices_with_notifiers, sdev, next); + } else if (new == IOMMU_NOTIFIER_NONE) { + trace_smmuv3_notify_flag_del(iommu->parent_obj.name); + QLIST_REMOVE(sdev, next); } } diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 05f86749f4..5059aedbaa 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -12,7 +12,6 @@ #include "hw/sysbus.h" #include "hw/ssi/ssi.h" #include "hw/arm/arm.h" -#include "hw/devices.h" #include "qemu/timer.h" #include "hw/i2c/i2c.h" #include "net/net.h" @@ -22,6 +21,7 @@ #include "sysemu/sysemu.h" #include "hw/arm/armv7m.h" #include "hw/char/pl011.h" +#include "hw/input/gamepad.h" #include "hw/watchdog/cmsdk-apb-watchdog.h" #include "hw/misc/unimp.h" #include "cpu.h" diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c index eef9d427e7..9a1247797f 100644 --- a/hw/arm/tosa.c +++ b/hw/arm/tosa.c @@ -16,10 +16,10 @@ #include "hw/hw.h" #include "hw/arm/pxa.h" #include "hw/arm/arm.h" -#include "hw/devices.h" #include "hw/arm/sharpsl.h" #include "hw/pcmcia.h" #include "hw/boards.h" +#include "hw/display/tc6393xb.h" #include "hw/i2c/i2c.h" #include "hw/ssi/ssi.h" #include "hw/sysbus.h" diff --git a/hw/arm/trace-events b/hw/arm/trace-events index 27b11d655d..0acedcedc6 100644 --- a/hw/arm/trace-events +++ b/hw/arm/trace-events @@ -1,25 +1,21 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/arm/virt-acpi-build.c +# virt-acpi-build.c virt_acpi_setup(void) "No fw cfg or ACPI disabled. Bailing out." -# hw/arm/smmu-common.c +# smmu-common.c smmu_add_mr(const char *name) "%s" -smmu_page_walk(int stage, uint64_t baseaddr, int first_level, uint64_t start, uint64_t end) "stage=%d, baseaddr=0x%"PRIx64", first level=%d, start=0x%"PRIx64", end=0x%"PRIx64 -smmu_lookup_table(int level, uint64_t baseaddr, int granule_sz, uint64_t start, uint64_t end, int flags, uint64_t subpage_size) "level=%d baseaddr=0x%"PRIx64" granule=%d, start=0x%"PRIx64" end=0x%"PRIx64" flags=%d subpage_size=0x%"PRIx64 smmu_ptw_level(int level, uint64_t iova, size_t subpage_size, uint64_t baseaddr, uint32_t offset, uint64_t pte) "level=%d iova=0x%"PRIx64" subpage_sz=0x%zx baseaddr=0x%"PRIx64" offset=%d => pte=0x%"PRIx64 smmu_ptw_invalid_pte(int stage, int level, uint64_t baseaddr, uint64_t pteaddr, uint32_t offset, uint64_t pte) "stage=%d level=%d base@=0x%"PRIx64" pte@=0x%"PRIx64" offset=%d pte=0x%"PRIx64 smmu_ptw_page_pte(int stage, int level, uint64_t iova, uint64_t baseaddr, uint64_t pteaddr, uint64_t pte, uint64_t address) "stage=%d level=%d iova=0x%"PRIx64" base@=0x%"PRIx64" pte@=0x%"PRIx64" pte=0x%"PRIx64" page address = 0x%"PRIx64 smmu_ptw_block_pte(int stage, int level, uint64_t baseaddr, uint64_t pteaddr, uint64_t pte, uint64_t iova, uint64_t gpa, int bsize_mb) "stage=%d level=%d base@=0x%"PRIx64" pte@=0x%"PRIx64" pte=0x%"PRIx64" iova=0x%"PRIx64" block address = 0x%"PRIx64" block size = %d MiB" smmu_get_pte(uint64_t baseaddr, int index, uint64_t pteaddr, uint64_t pte) "baseaddr=0x%"PRIx64" index=0x%x, pteaddr=0x%"PRIx64", pte=0x%"PRIx64 -smmu_iotlb_cache_hit(uint16_t asid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache HIT asid=%d addr=0x%"PRIx64" hit=%d miss=%d hit rate=%d" -smmu_iotlb_cache_miss(uint16_t asid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache MISS asid=%d addr=0x%"PRIx64" hit=%d miss=%d hit rate=%d" smmu_iotlb_inv_all(void) "IOTLB invalidate all" smmu_iotlb_inv_asid(uint16_t asid) "IOTLB invalidate asid=%d" smmu_iotlb_inv_iova(uint16_t asid, uint64_t addr) "IOTLB invalidate asid=%d addr=0x%"PRIx64 smmu_inv_notifiers_mr(const char *name) "iommu mr=%s" -#hw/arm/smmuv3.c +# smmuv3.c smmuv3_read_mmio(uint64_t addr, uint64_t val, unsigned size, uint32_t r) "addr: 0x%"PRIx64" val:0x%"PRIx64" size: 0x%x(%d)" smmuv3_trigger_irq(int irq) "irq=%d" smmuv3_write_gerror(uint32_t toggled, uint32_t gerror) "toggled=0x%x, new GERROR=0x%x" @@ -29,12 +25,7 @@ smmuv3_cmdq_consume(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t con smmuv3_cmdq_opcode(const char *opcode) "<--- %s" smmuv3_cmdq_consume_out(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) "prod:%d, cons:%d, prod_wrap:%d, cons_wrap:%d " smmuv3_cmdq_consume_error(const char *cmd_name, uint8_t cmd_error) "Error on %s command execution: %d" -smmuv3_update(bool is_empty, uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) "q empty:%d prod:%d cons:%d p.wrap:%d p.cons:%d" -smmuv3_update_check_cmd(int error) "cmdq not enabled or error :0x%x" smmuv3_write_mmio(uint64_t addr, uint64_t val, unsigned size, uint32_t r) "addr: 0x%"PRIx64" val:0x%"PRIx64" size: 0x%x(%d)" -smmuv3_write_mmio_idr(uint64_t addr, uint64_t val) "write to RO/Unimpl reg 0x%"PRIx64" val64:0x%"PRIx64 -smmuv3_write_mmio_evtq_cons_bef_clear(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) "Before clearing interrupt prod:0x%x cons:0x%x prod.w:%d cons.w:%d" -smmuv3_write_mmio_evtq_cons_after_clear(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) "after clearing interrupt prod:0x%x cons:0x%x prod.w:%d cons.w:%d" smmuv3_record_event(const char *type, uint32_t sid) "%s sid=%d" smmuv3_find_ste(uint16_t sid, uint32_t features, uint16_t sid_split) "SID:0x%x features:0x%x, sid_split:0x%x" smmuv3_find_ste_2lvl(uint64_t strtab_base, uint64_t l1ptr, int l1_ste_offset, uint64_t l2ptr, int l2_ste_offset, int max_l2_ste) "strtab_base:0x%"PRIx64" l1ptr:0x%"PRIx64" l1_off:0x%x, l2ptr:0x%"PRIx64" l2_off:0x%x max_l2_ste:%d" @@ -55,6 +46,8 @@ smmuv3_cmdq_tlbi_nh_va(int vmid, int asid, uint64_t addr, bool leaf) "vmid =%d a smmuv3_cmdq_tlbi_nh_vaa(int vmid, uint64_t addr) "vmid =%d addr=0x%"PRIx64 smmuv3_cmdq_tlbi_nh(void) "" smmuv3_cmdq_tlbi_nh_asid(uint16_t asid) "asid=%d" +smmu_iotlb_cache_hit(uint16_t asid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache HIT asid=%d addr=0x%"PRIx64" hit=%d miss=%d hit rate=%d" +smmu_iotlb_cache_miss(uint16_t asid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) "IOTLB cache MISS asid=%d addr=0x%"PRIx64" hit=%d miss=%d hit rate=%d" smmuv3_config_cache_inv(uint32_t sid) "Config cache INV for sid %d" smmuv3_notify_flag_add(const char *iommu) "ADD SMMUNotifier node for iommu mr=%s" smmuv3_notify_flag_del(const char *iommu) "DEL SMMUNotifier node for iommu mr=%s" diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index d67181810a..25166e1517 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -13,7 +13,7 @@ #include "cpu.h" #include "hw/sysbus.h" #include "hw/arm/arm.h" -#include "hw/devices.h" +#include "hw/net/smc91c111.h" #include "net/net.h" #include "sysemu/sysemu.h" #include "hw/pci/pci.h" diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index f07134c424..d8634f3dd2 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -28,7 +28,7 @@ #include "hw/sysbus.h" #include "hw/arm/arm.h" #include "hw/arm/primecell.h" -#include "hw/devices.h" +#include "hw/net/lan9118.h" #include "hw/i2c/i2c.h" #include "net/net.h" #include "sysemu/sysemu.h" diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index d7e2e4885b..bf9c0bc2f4 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -405,7 +405,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) its->identifiers[0] = 0; /* MADT translation_id */ if (vms->iommu == VIRT_IOMMU_SMMUV3) { - int irq = vms->irqmap[VIRT_SMMU]; + int irq = vms->irqmap[VIRT_SMMU] + ARM_SPI_BASE; /* SMMUv3 node */ smmu_offset = iort_node_offset + node_size; @@ -560,8 +560,8 @@ build_mcfg(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) /* Only a single allocation so no need to play with segments */ mcfg->allocation[0].pci_segment = cpu_to_le16(0); mcfg->allocation[0].start_bus_number = 0; - mcfg->allocation[0].end_bus_number = (memmap[ecam_id].size - / PCIE_MMCFG_SIZE_MIN) - 1; + mcfg->allocation[0].end_bus_number = + PCIE_MMCFG_BUS(memmap[ecam_id].size - 1); build_header(linker, table_data, (void *)(table_data->data + mcfg_start), "MCFG", table_data->len - mcfg_start, 1, NULL, NULL); diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ce2664a30b..16ba67f7a7 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1978,10 +1978,17 @@ static void machvirt_machine_init(void) } type_init(machvirt_machine_init); +static void virt_machine_4_1_options(MachineClass *mc) +{ +} +DEFINE_VIRT_MACHINE_AS_LATEST(4, 1) + static void virt_machine_4_0_options(MachineClass *mc) { + virt_machine_4_1_options(mc); + compat_props_add(mc->compat_props, hw_compat_4_0, hw_compat_4_0_len); } -DEFINE_VIRT_MACHINE_AS_LATEST(4, 0) +DEFINE_VIRT_MACHINE(4, 0) static void virt_machine_3_1_options(MachineClass *mc) { diff --git a/hw/audio/ac97.c b/hw/audio/ac97.c index d799533aa9..2265622d44 100644 --- a/hw/audio/ac97.c +++ b/hw/audio/ac97.c @@ -365,7 +365,7 @@ static void open_voice (AC97LinkState *s, int index, int freq) as.freq = freq; as.nchannels = 2; - as.fmt = AUD_FMT_S16; + as.fmt = AUDIO_FORMAT_S16; as.endianness = 0; if (freq > 0) { diff --git a/hw/audio/adlib.c b/hw/audio/adlib.c index 97b876c7e0..0957780a3d 100644 --- a/hw/audio/adlib.c +++ b/hw/audio/adlib.c @@ -269,7 +269,7 @@ static void adlib_realizefn (DeviceState *dev, Error **errp) as.freq = s->freq; as.nchannels = SHIFT; - as.fmt = AUD_FMT_S16; + as.fmt = AUDIO_FORMAT_S16; as.endianness = AUDIO_HOST_ENDIANNESS; AUD_register_card ("adlib", &s->card); diff --git a/hw/audio/cs4231a.c b/hw/audio/cs4231a.c index 9089dcb47e..62da75eefe 100644 --- a/hw/audio/cs4231a.c +++ b/hw/audio/cs4231a.c @@ -288,7 +288,7 @@ static void cs_reset_voices (CSState *s, uint32_t val) switch ((val >> 5) & ((s->dregs[MODE_And_ID] & MODE2) ? 7 : 3)) { case 0: - as.fmt = AUD_FMT_U8; + as.fmt = AUDIO_FORMAT_U8; s->shift = as.nchannels == 2; break; @@ -298,7 +298,7 @@ static void cs_reset_voices (CSState *s, uint32_t val) case 3: s->tab = ALawDecompressTable; x_law: - as.fmt = AUD_FMT_S16; + as.fmt = AUDIO_FORMAT_S16; as.endianness = AUDIO_HOST_ENDIANNESS; s->shift = as.nchannels == 2; break; @@ -307,7 +307,7 @@ static void cs_reset_voices (CSState *s, uint32_t val) as.endianness = 1; /* fall through */ case 2: - as.fmt = AUD_FMT_S16; + as.fmt = AUDIO_FORMAT_S16; s->shift = as.nchannels; break; diff --git a/hw/audio/es1370.c b/hw/audio/es1370.c index 97789a0771..a5314d66fd 100644 --- a/hw/audio/es1370.c +++ b/hw/audio/es1370.c @@ -414,14 +414,14 @@ static void es1370_update_voices (ES1370State *s, uint32_t ctl, uint32_t sctl) i, new_freq, 1 << (new_fmt & 1), - (new_fmt & 2) ? AUD_FMT_S16 : AUD_FMT_U8, + (new_fmt & 2) ? AUDIO_FORMAT_S16 : AUDIO_FORMAT_U8, d->shift); if (new_freq) { struct audsettings as; as.freq = new_freq; as.nchannels = 1 << (new_fmt & 1); - as.fmt = (new_fmt & 2) ? AUD_FMT_S16 : AUD_FMT_U8; + as.fmt = (new_fmt & 2) ? AUDIO_FORMAT_S16 : AUDIO_FORMAT_U8; as.endianness = 0; if (i == ADC_CHANNEL) { diff --git a/hw/audio/gus.c b/hw/audio/gus.c index 8e0b27e0f2..b3e2a7fdd5 100644 --- a/hw/audio/gus.c +++ b/hw/audio/gus.c @@ -251,7 +251,7 @@ static void gus_realizefn (DeviceState *dev, Error **errp) as.freq = s->freq; as.nchannels = 2; - as.fmt = AUD_FMT_S16; + as.fmt = AUDIO_FORMAT_S16; as.endianness = GUS_ENDIANNESS; s->voice = AUD_open_out ( diff --git a/hw/audio/hda-codec.c b/hw/audio/hda-codec.c index 617a1c1016..c25bfa38b1 100644 --- a/hw/audio/hda-codec.c +++ b/hw/audio/hda-codec.c @@ -99,9 +99,9 @@ static void hda_codec_parse_fmt(uint32_t format, struct audsettings *as) } switch (format & AC_FMT_BITS_MASK) { - case AC_FMT_BITS_8: as->fmt = AUD_FMT_S8; break; - case AC_FMT_BITS_16: as->fmt = AUD_FMT_S16; break; - case AC_FMT_BITS_32: as->fmt = AUD_FMT_S32; break; + case AC_FMT_BITS_8: as->fmt = AUDIO_FORMAT_S8; break; + case AC_FMT_BITS_16: as->fmt = AUDIO_FORMAT_S16; break; + case AC_FMT_BITS_32: as->fmt = AUDIO_FORMAT_S32; break; } as->nchannels = ((format & AC_FMT_CHAN_MASK) >> AC_FMT_CHAN_SHIFT) + 1; @@ -134,12 +134,12 @@ static void hda_codec_parse_fmt(uint32_t format, struct audsettings *as) /* -------------------------------------------------------------------------- */ static const char *fmt2name[] = { - [ AUD_FMT_U8 ] = "PCM-U8", - [ AUD_FMT_S8 ] = "PCM-S8", - [ AUD_FMT_U16 ] = "PCM-U16", - [ AUD_FMT_S16 ] = "PCM-S16", - [ AUD_FMT_U32 ] = "PCM-U32", - [ AUD_FMT_S32 ] = "PCM-S32", + [ AUDIO_FORMAT_U8 ] = "PCM-U8", + [ AUDIO_FORMAT_S8 ] = "PCM-S8", + [ AUDIO_FORMAT_U16 ] = "PCM-U16", + [ AUDIO_FORMAT_S16 ] = "PCM-S16", + [ AUDIO_FORMAT_U32 ] = "PCM-U32", + [ AUDIO_FORMAT_S32 ] = "PCM-S32", }; typedef struct HDAAudioState HDAAudioState; diff --git a/hw/audio/lm4549.c b/hw/audio/lm4549.c index a46f2301af..af8b22b541 100644 --- a/hw/audio/lm4549.c +++ b/hw/audio/lm4549.c @@ -185,7 +185,7 @@ void lm4549_write(lm4549_state *s, struct audsettings as; as.freq = value; as.nchannels = 2; - as.fmt = AUD_FMT_S16; + as.fmt = AUDIO_FORMAT_S16; as.endianness = 0; s->voice = AUD_open_out( @@ -255,7 +255,7 @@ static int lm4549_post_load(void *opaque, int version_id) struct audsettings as; as.freq = freq; as.nchannels = 2; - as.fmt = AUD_FMT_S16; + as.fmt = AUDIO_FORMAT_S16; as.endianness = 0; s->voice = AUD_open_out( @@ -292,7 +292,7 @@ void lm4549_init(lm4549_state *s, lm4549_callback data_req_cb, void* opaque) /* Open a default voice */ as.freq = 48000; as.nchannels = 2; - as.fmt = AUD_FMT_S16; + as.fmt = AUDIO_FORMAT_S16; as.endianness = 0; s->voice = AUD_open_out( diff --git a/hw/audio/milkymist-ac97.c b/hw/audio/milkymist-ac97.c index bc8db71ae0..90cce1e6ed 100644 --- a/hw/audio/milkymist-ac97.c +++ b/hw/audio/milkymist-ac97.c @@ -308,7 +308,7 @@ static void milkymist_ac97_realize(DeviceState *dev, Error **errp) as.freq = 48000; as.nchannels = 2; - as.fmt = AUD_FMT_S16; + as.fmt = AUDIO_FORMAT_S16; as.endianness = 1; s->voice_in = AUD_open_in(&s->card, s->voice_in, diff --git a/hw/audio/pcspk.c b/hw/audio/pcspk.c index b80a62ce90..9c7fd74aeb 100644 --- a/hw/audio/pcspk.c +++ b/hw/audio/pcspk.c @@ -57,6 +57,7 @@ typedef struct { } PCSpkState; static const char *s_spk = "pcspk"; +static PCSpkState *pcspk_state; static inline void generate_samples(PCSpkState *s) { @@ -110,6 +111,22 @@ static void pcspk_callback(void *opaque, int free) } } +static int pcspk_audio_init(ISABus *bus) +{ + PCSpkState *s = pcspk_state; + struct audsettings as = {PCSPK_SAMPLE_RATE, 1, AUDIO_FORMAT_U8, 0}; + + AUD_register_card(s_spk, &s->card); + + s->voice = AUD_open_out(&s->card, s->voice, s_spk, s, pcspk_callback, &as); + if (!s->voice) { + AUD_log(s_spk, "Could not open voice\n"); + return -1; + } + + return 0; +} + static uint64_t pcspk_io_read(void *opaque, hwaddr addr, unsigned size) { @@ -162,20 +179,12 @@ static void pcspk_initfn(Object *obj) static void pcspk_realizefn(DeviceState *dev, Error **errp) { - struct audsettings as = {PCSPK_SAMPLE_RATE, 1, AUD_FMT_U8, 0}; ISADevice *isadev = ISA_DEVICE(dev); PCSpkState *s = PC_SPEAKER(dev); isa_register_ioport(isadev, &s->ioport, s->iobase); - AUD_register_card(s_spk, &s->card); - - s->voice = AUD_open_out(&s->card, s->voice, s_spk, s, pcspk_callback, &as); - if (!s->voice) { - error_setg(errp, "Initializing audio voice failed"); - AUD_remove_card(&s->card); - return; - } + pcspk_state = s; } static bool migrate_needed(void *opaque) @@ -212,6 +221,9 @@ static void pcspk_class_initfn(ObjectClass *klass, void *data) set_bit(DEVICE_CATEGORY_SOUND, dc->categories); dc->vmsd = &vmstate_spk; dc->props = pcspk_properties; + /* Reason: realize sets global pcspk_state */ + /* Reason: pit object link */ + dc->user_creatable = false; } static const TypeInfo pcspk_info = { @@ -222,12 +234,6 @@ static const TypeInfo pcspk_info = { .class_init = pcspk_class_initfn, }; -static int pcspk_audio_init(ISABus *bus) -{ - isa_create_simple(bus, TYPE_PC_SPEAKER); - return 0; -} - static void pcspk_register(void) { type_register_static(&pcspk_info); diff --git a/hw/audio/sb16.c b/hw/audio/sb16.c index c5b9bf79e8..65ea0cd938 100644 --- a/hw/audio/sb16.c +++ b/hw/audio/sb16.c @@ -66,7 +66,7 @@ typedef struct SB16State { int fmt_stereo; int fmt_signed; int fmt_bits; - audfmt_e fmt; + AudioFormat fmt; int dma_auto; int block_size; int fifo; @@ -224,7 +224,7 @@ static void continue_dma8 (SB16State *s) static void dma_cmd8 (SB16State *s, int mask, int dma_len) { - s->fmt = AUD_FMT_U8; + s->fmt = AUDIO_FORMAT_U8; s->use_hdma = 0; s->fmt_bits = 8; s->fmt_signed = 0; @@ -319,18 +319,18 @@ static void dma_cmd (SB16State *s, uint8_t cmd, uint8_t d0, int dma_len) if (16 == s->fmt_bits) { if (s->fmt_signed) { - s->fmt = AUD_FMT_S16; + s->fmt = AUDIO_FORMAT_S16; } else { - s->fmt = AUD_FMT_U16; + s->fmt = AUDIO_FORMAT_U16; } } else { if (s->fmt_signed) { - s->fmt = AUD_FMT_S8; + s->fmt = AUDIO_FORMAT_S8; } else { - s->fmt = AUD_FMT_U8; + s->fmt = AUDIO_FORMAT_U8; } } @@ -852,7 +852,7 @@ static void legacy_reset (SB16State *s) as.freq = s->freq; as.nchannels = 1; - as.fmt = AUD_FMT_U8; + as.fmt = AUDIO_FORMAT_U8; as.endianness = 0; s->voice = AUD_open_out ( diff --git a/hw/audio/trace-events b/hw/audio/trace-events index 5891b4e2b9..60556b4a97 100644 --- a/hw/audio/trace-events +++ b/hw/audio/trace-events @@ -1,12 +1,12 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/audio/cs4231.c +# cs4231.c cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" -# hw/audio/milkymist-ac97.c +# milkymist-ac97.c milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request" @@ -18,7 +18,7 @@ milkymist_ac97_in_cb_transferred(int transferred) "transferred %d" milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u" milkymist_ac97_out_cb_transferred(int transferred) "transferred %d" -# hw/audio/hda-codec.c +# hda-codec.c hda_audio_running(const char *stream, int nr, bool running) "st %s, nr %d, run %d" hda_audio_format(const char *stream, int chan, const char *fmt, int freq) "st %s, %d x %s @ %d Hz" hda_audio_adjust(const char *stream, int pos) "st %s, pos %d" diff --git a/hw/audio/wm8750.c b/hw/audio/wm8750.c index 169b006ade..ca0ad73caf 100644 --- a/hw/audio/wm8750.c +++ b/hw/audio/wm8750.c @@ -201,7 +201,7 @@ static void wm8750_set_format(WM8750State *s) in_fmt.endianness = 0; in_fmt.nchannels = 2; in_fmt.freq = s->adc_hz; - in_fmt.fmt = AUD_FMT_S16; + in_fmt.fmt = AUDIO_FORMAT_S16; s->adc_voice[0] = AUD_open_in(&s->card, s->adc_voice[0], CODEC ".input1", s, wm8750_audio_in_cb, &in_fmt); @@ -214,7 +214,7 @@ static void wm8750_set_format(WM8750State *s) out_fmt.endianness = 0; out_fmt.nchannels = 2; out_fmt.freq = s->dac_hz; - out_fmt.fmt = AUD_FMT_S16; + out_fmt.fmt = AUDIO_FORMAT_S16; s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0], CODEC ".speaker", s, wm8750_audio_out_cb, &out_fmt); @@ -681,7 +681,7 @@ uint32_t wm8750_adc_dat(void *opaque) if (s->idx_in >= sizeof(s->data_in)) { wm8750_in_load(s); if (s->idx_in >= sizeof(s->data_in)) { - return 0x80008000; /* silence in AUD_FMT_S16 sample format */ + return 0x80008000; /* silence in AUDIO_FORMAT_S16 sample format */ } } diff --git a/hw/block/block.c b/hw/block/block.c index cf0eb826f1..bf56c7612b 100644 --- a/hw/block/block.c +++ b/hw/block/block.c @@ -13,7 +13,53 @@ #include "hw/block/block.h" #include "qapi/error.h" #include "qapi/qapi-types-block.h" -#include "qemu/error-report.h" + +/* + * Read the entire contents of @blk into @buf. + * @blk's contents must be @size bytes, and @size must be at most + * BDRV_REQUEST_MAX_BYTES. + * On success, return true. + * On failure, store an error through @errp and return false. + * Note that the error messages do not identify the block backend. + * TODO Since callers don't either, this can result in confusing + * errors. + * This function not intended for actual block devices, which read on + * demand. It's for things like memory devices that (ab)use a block + * backend to provide persistence. + */ +bool blk_check_size_and_read_all(BlockBackend *blk, void *buf, hwaddr size, + Error **errp) +{ + int64_t blk_len; + int ret; + + blk_len = blk_getlength(blk); + if (blk_len < 0) { + error_setg_errno(errp, -blk_len, + "can't get size of block backend"); + return false; + } + if (blk_len != size) { + error_setg(errp, "device requires %" HWADDR_PRIu " bytes, " + "block backend provides %" PRIu64 " bytes", + size, blk_len); + return false; + } + + /* + * We could loop for @size > BDRV_REQUEST_MAX_BYTES, but if we + * ever get to the point we want to read *gigabytes* here, we + * should probably rework the device to be more like an actual + * block device and read only on demand. + */ + assert(size <= BDRV_REQUEST_MAX_BYTES); + ret = blk_pread(blk, 0, buf, size); + if (ret < 0) { + error_setg_errno(errp, -ret, "can't read block backend"); + return false; + } + return true; +} void blkconf_blocksizes(BlockConf *conf) { diff --git a/hw/block/dataplane/trace-events b/hw/block/dataplane/trace-events index 1a7ea277b0..843cc4e7b1 100644 --- a/hw/block/dataplane/trace-events +++ b/hw/block/dataplane/trace-events @@ -1,5 +1,5 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/block/dataplane/virtio-blk.c +# virtio-blk.c virtio_blk_data_plane_start(void *s) "dataplane %p" virtio_blk_data_plane_stop(void *s) "dataplane %p" diff --git a/hw/block/dataplane/xen-block.c b/hw/block/dataplane/xen-block.c index f1523c5b45..bb8f1186e4 100644 --- a/hw/block/dataplane/xen-block.c +++ b/hw/block/dataplane/xen-block.c @@ -49,7 +49,6 @@ struct XenBlockDataPlane { unsigned int *ring_ref; unsigned int nr_ring_ref; void *sring; - int64_t file_blk; int protocol; blkif_back_rings_t rings; int more_work; @@ -168,7 +167,7 @@ static int xen_block_parse_request(XenBlockRequest *request) goto err; } - request->start = request->req.sector_number * dataplane->file_blk; + request->start = request->req.sector_number * XEN_BLKIF_SECTOR_SIZE; for (i = 0; i < request->req.nr_segments; i++) { if (i == BLKIF_MAX_SEGMENTS_PER_REQUEST) { error_report("error: nr_segments too big"); @@ -178,14 +177,14 @@ static int xen_block_parse_request(XenBlockRequest *request) error_report("error: first > last sector"); goto err; } - if (request->req.seg[i].last_sect * dataplane->file_blk >= + if (request->req.seg[i].last_sect * XEN_BLKIF_SECTOR_SIZE >= XC_PAGE_SIZE) { error_report("error: page crossing"); goto err; } len = (request->req.seg[i].last_sect - - request->req.seg[i].first_sect + 1) * dataplane->file_blk; + request->req.seg[i].first_sect + 1) * XEN_BLKIF_SECTOR_SIZE; request->size += len; } if (request->start + request->size > blk_getlength(dataplane->blk)) { @@ -205,7 +204,6 @@ static int xen_block_copy_request(XenBlockRequest *request) XenDevice *xendev = dataplane->xendev; XenDeviceGrantCopySegment segs[BLKIF_MAX_SEGMENTS_PER_REQUEST]; int i, count; - int64_t file_blk = dataplane->file_blk; bool to_domain = (request->req.operation == BLKIF_OP_READ); void *virt = request->buf; Error *local_err = NULL; @@ -220,16 +218,17 @@ static int xen_block_copy_request(XenBlockRequest *request) if (to_domain) { segs[i].dest.foreign.ref = request->req.seg[i].gref; segs[i].dest.foreign.offset = request->req.seg[i].first_sect * - file_blk; + XEN_BLKIF_SECTOR_SIZE; segs[i].source.virt = virt; } else { segs[i].source.foreign.ref = request->req.seg[i].gref; segs[i].source.foreign.offset = request->req.seg[i].first_sect * - file_blk; + XEN_BLKIF_SECTOR_SIZE; segs[i].dest.virt = virt; } segs[i].len = (request->req.seg[i].last_sect - - request->req.seg[i].first_sect + 1) * file_blk; + request->req.seg[i].first_sect + 1) * + XEN_BLKIF_SECTOR_SIZE; virt += segs[i].len; } @@ -331,22 +330,22 @@ static bool xen_block_split_discard(XenBlockRequest *request, XenBlockDataPlane *dataplane = request->dataplane; int64_t byte_offset; int byte_chunk; - uint64_t byte_remaining, limit; + uint64_t byte_remaining; uint64_t sec_start = sector_number; uint64_t sec_count = nr_sectors; /* Wrap around, or overflowing byte limit? */ if (sec_start + sec_count < sec_count || - sec_start + sec_count > INT64_MAX / dataplane->file_blk) { + sec_start + sec_count > INT64_MAX / XEN_BLKIF_SECTOR_SIZE) { return false; } - limit = BDRV_REQUEST_MAX_SECTORS * dataplane->file_blk; - byte_offset = sec_start * dataplane->file_blk; - byte_remaining = sec_count * dataplane->file_blk; + byte_offset = sec_start * XEN_BLKIF_SECTOR_SIZE; + byte_remaining = sec_count * XEN_BLKIF_SECTOR_SIZE; do { - byte_chunk = byte_remaining > limit ? limit : byte_remaining; + byte_chunk = byte_remaining > BDRV_REQUEST_MAX_BYTES ? + BDRV_REQUEST_MAX_BYTES : byte_remaining; request->aio_inflight++; blk_aio_pdiscard(dataplane->blk, byte_offset, byte_chunk, xen_block_complete_aio, request); @@ -632,7 +631,6 @@ XenBlockDataPlane *xen_block_dataplane_create(XenDevice *xendev, XenBlockDataPlane *dataplane = g_new0(XenBlockDataPlane, 1); dataplane->xendev = xendev; - dataplane->file_blk = conf->logical_block_size; dataplane->blk = conf->blk; QLIST_INIT(&dataplane->inflight); diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 8325b5e88a..7caf92532a 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -324,8 +324,8 @@ static uint16_t nvme_write_zeros(NvmeCtrl *n, NvmeNamespace *ns, NvmeCmd *cmd, const uint8_t data_shift = ns->id_ns.lbaf[lba_index].ds; uint64_t slba = le64_to_cpu(rw->slba); uint32_t nlb = le16_to_cpu(rw->nlb) + 1; - uint64_t aio_slba = slba << (data_shift - BDRV_SECTOR_BITS); - uint32_t aio_nlb = nlb << (data_shift - BDRV_SECTOR_BITS); + uint64_t offset = slba << data_shift; + uint32_t count = nlb << data_shift; if (unlikely(slba + nlb > ns->id_ns.nsze)) { trace_nvme_err_invalid_lba_range(slba, nlb, ns->id_ns.nsze); @@ -335,7 +335,7 @@ static uint16_t nvme_write_zeros(NvmeCtrl *n, NvmeNamespace *ns, NvmeCmd *cmd, req->has_sg = false; block_acct_start(blk_get_stats(n->conf.blk), &req->acct, 0, BLOCK_ACCT_WRITE); - req->aiocb = blk_aio_pwrite_zeroes(n->conf.blk, aio_slba, aio_nlb, + req->aiocb = blk_aio_pwrite_zeroes(n->conf.blk, offset, count, BDRV_REQ_MAY_UNMAP, nvme_rw_cb, req); return NVME_NO_COMPLETE; } diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 125f70b8e4..16dfae14b8 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -38,6 +38,7 @@ #include "qemu/osdep.h" #include "hw/hw.h" +#include "hw/block/block.h" #include "hw/block/flash.h" #include "sysemu/block-backend.h" #include "qapi/error.h" @@ -730,13 +731,6 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp) } device_len = sector_len_per_device * blocks_per_device; - /* XXX: to be fixed */ -#if 0 - if (total_len != (8 * 1024 * 1024) && total_len != (16 * 1024 * 1024) && - total_len != (32 * 1024 * 1024) && total_len != (64 * 1024 * 1024)) - return NULL; -#endif - memory_region_init_rom_device( &pfl->mem, OBJECT(dev), &pflash_cfi01_ops, @@ -763,12 +757,9 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp) } if (pfl->blk) { - /* read the initial flash content */ - ret = blk_pread(pfl->blk, 0, pfl->storage, total_len); - - if (ret < 0) { + if (!blk_check_size_and_read_all(pfl->blk, pfl->storage, total_len, + errp)) { vmstate_unregister_ram(&pfl->mem, DEVICE(pfl)); - error_setg(errp, "failed to read the initial flash content"); return; } } diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index c9db430611..f2c6201f81 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -37,6 +37,7 @@ #include "qemu/osdep.h" #include "hw/hw.h" +#include "hw/block/block.h" #include "hw/block/flash.h" #include "qapi/error.h" #include "qemu/timer.h" @@ -550,12 +551,6 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp) } chip_len = pfl->sector_len * pfl->nb_blocs; - /* XXX: to be fixed */ -#if 0 - if (total_len != (8 * 1024 * 1024) && total_len != (16 * 1024 * 1024) && - total_len != (32 * 1024 * 1024) && total_len != (64 * 1024 * 1024)) - return NULL; -#endif memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl), pfl->be ? &pflash_cfi02_ops_be : &pflash_cfi02_ops_le, @@ -581,11 +576,9 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp) } if (pfl->blk) { - /* read the initial flash content */ - ret = blk_pread(pfl->blk, 0, pfl->storage, chip_len); - if (ret < 0) { + if (!blk_check_size_and_read_all(pfl->blk, pfl->storage, chip_len, + errp)) { vmstate_unregister_ram(&pfl->orig_mem, DEVICE(pfl)); - error_setg(errp, "failed to read the initial flash content"); return; } } diff --git a/hw/block/trace-events b/hw/block/trace-events index 8020f9226a..b92039a573 100644 --- a/hw/block/trace-events +++ b/hw/block/trace-events @@ -1,10 +1,11 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/block/fdc.c +# fdc.c fdc_ioport_read(uint8_t reg, uint8_t value) "read reg 0x%02x val 0x%02x" fdc_ioport_write(uint8_t reg, uint8_t value) "write reg 0x%02x val 0x%02x" -# hw/block/pflash_cfi0?.c +# pflash_cfi02.c +# pflash_cfi01.c pflash_reset(void) "reset" pflash_read(uint64_t offset, uint8_t cmd, int width, uint8_t wcycle) "offset:0x%04"PRIx64" cmd:0x%02x width:%d wcycle:%u" pflash_write(uint64_t offset, uint32_t value, int width, uint8_t wcycle) "offset:0x%04"PRIx64" value:0x%03x width:%d wcycle:%u" @@ -17,18 +18,18 @@ pflash_manufacturer_id(uint16_t id) "Read Manufacturer ID: 0x%04x" pflash_device_id(uint16_t id) "Read Device ID: 0x%04x" pflash_device_info(uint64_t offset) "Read Device Information offset:0x%04"PRIx64 -# hw/block/virtio-blk.c +# virtio-blk.c virtio_blk_req_complete(void *vdev, void *req, int status) "vdev %p req %p status %d" virtio_blk_rw_complete(void *vdev, void *req, int ret) "vdev %p req %p ret %d" virtio_blk_handle_write(void *vdev, void *req, uint64_t sector, size_t nsectors) "vdev %p req %p sector %"PRIu64" nsectors %zu" virtio_blk_handle_read(void *vdev, void *req, uint64_t sector, size_t nsectors) "vdev %p req %p sector %"PRIu64" nsectors %zu" virtio_blk_submit_multireq(void *vdev, void *mrb, int start, int num_reqs, uint64_t offset, size_t size, bool is_write) "vdev %p mrb %p start %d num_reqs %d offset %"PRIu64" size %zu is_write %d" -# hw/block/hd-geometry.c +# hd-geometry.c hd_geometry_lchs_guess(void *blk, int cyls, int heads, int secs) "blk %p LCHS %d %d %d" hd_geometry_guess(void *blk, uint32_t cyls, uint32_t heads, uint32_t secs, int trans) "blk %p CHS %u %u %u trans %d" -# hw/block/nvme.c +# nvme.c # nvme traces for successful events nvme_irq_msix(uint32_t vector) "raising MSI-X IRQ vector %u" nvme_irq_pin(void) "pulsing IRQ pin" @@ -63,9 +64,7 @@ nvme_err_invalid_dma(void) "PRP/SGL is too small for transfer size" nvme_err_invalid_prplist_ent(uint64_t prplist) "PRP list entry is null or not page aligned: 0x%"PRIx64"" nvme_err_invalid_prp2_align(uint64_t prp2) "PRP2 is not page aligned: 0x%"PRIx64"" nvme_err_invalid_prp2_missing(void) "PRP2 is null and more data to be transferred" -nvme_err_invalid_field(void) "invalid field" nvme_err_invalid_prp(void) "invalid PRP" -nvme_err_invalid_sgl(void) "invalid SGL" nvme_err_invalid_ns(uint32_t ns, uint32_t limit) "invalid namespace %u not within 1-%u" nvme_err_invalid_opc(uint8_t opc) "invalid opcode 0x%"PRIx8"" nvme_err_invalid_admin_opc(uint8_t opc) "invalid admin opcode 0x%"PRIx8"" @@ -121,7 +120,7 @@ nvme_ub_db_wr_invalid_cqhead(uint32_t qid, uint16_t new_head) "completion queue nvme_ub_db_wr_invalid_sq(uint32_t qid) "submission queue doorbell write for nonexistent queue, sqid=%"PRIu32", ignoring" nvme_ub_db_wr_invalid_sqtail(uint32_t qid, uint16_t new_tail) "submission queue doorbell write value beyond queue size, sqid=%"PRIu32", new_head=%"PRIu16", ignoring" -# hw/block/xen-block.c +# xen-block.c xen_block_realize(const char *type, uint32_t disk, uint32_t partition) "%s d%up%u" xen_block_connect(const char *type, uint32_t disk, uint32_t partition) "%s d%up%u" xen_block_disconnect(const char *type, uint32_t disk, uint32_t partition) "%s d%up%u" diff --git a/hw/block/vhost-user-blk.c b/hw/block/vhost-user-blk.c index 44ac814016..28b81368f7 100644 --- a/hw/block/vhost-user-blk.c +++ b/hw/block/vhost-user-blk.c @@ -128,6 +128,21 @@ static void vhost_user_blk_start(VirtIODevice *vdev) } s->dev.acked_features = vdev->guest_features; + + if (!s->inflight->addr) { + ret = vhost_dev_get_inflight(&s->dev, s->queue_size, s->inflight); + if (ret < 0) { + error_report("Error get inflight: %d", -ret); + goto err_guest_notifiers; + } + } + + ret = vhost_dev_set_inflight(&s->dev, s->inflight); + if (ret < 0) { + error_report("Error set inflight: %d", -ret); + goto err_guest_notifiers; + } + ret = vhost_dev_start(&s->dev, vdev); if (ret < 0) { error_report("Error starting vhost: %d", -ret); @@ -249,11 +264,17 @@ static void vhost_user_blk_handle_output(VirtIODevice *vdev, VirtQueue *vq) } } +static void vhost_user_blk_reset(VirtIODevice *vdev) +{ + VHostUserBlk *s = VHOST_USER_BLK(vdev); + + vhost_dev_free_inflight(s->inflight); +} + static void vhost_user_blk_device_realize(DeviceState *dev, Error **errp) { VirtIODevice *vdev = VIRTIO_DEVICE(dev); VHostUserBlk *s = VHOST_USER_BLK(vdev); - VhostUserState *user; struct vhost_virtqueue *vqs = NULL; int i, ret; @@ -272,15 +293,10 @@ static void vhost_user_blk_device_realize(DeviceState *dev, Error **errp) return; } - user = vhost_user_init(); - if (!user) { - error_setg(errp, "vhost-user-blk: failed to init vhost_user"); + if (!vhost_user_init(&s->vhost_user, &s->chardev, errp)) { return; } - user->chr = &s->chardev; - s->vhost_user = user; - virtio_init(vdev, "virtio-blk", VIRTIO_ID_BLOCK, sizeof(struct virtio_blk_config)); @@ -289,6 +305,8 @@ static void vhost_user_blk_device_realize(DeviceState *dev, Error **errp) vhost_user_blk_handle_output); } + s->inflight = g_new0(struct vhost_inflight, 1); + s->dev.nvqs = s->num_queues; s->dev.vqs = g_new(struct vhost_virtqueue, s->dev.nvqs); s->dev.vq_index = 0; @@ -297,7 +315,7 @@ static void vhost_user_blk_device_realize(DeviceState *dev, Error **errp) vhost_dev_set_config_notifier(&s->dev, &blk_ops); - ret = vhost_dev_init(&s->dev, s->vhost_user, VHOST_BACKEND_TYPE_USER, 0); + ret = vhost_dev_init(&s->dev, &s->vhost_user, VHOST_BACKEND_TYPE_USER, 0); if (ret < 0) { error_setg(errp, "vhost-user-blk: vhost initialization failed: %s", strerror(-ret)); @@ -321,11 +339,9 @@ vhost_err: vhost_dev_cleanup(&s->dev); virtio_err: g_free(vqs); + g_free(s->inflight); virtio_cleanup(vdev); - - vhost_user_cleanup(user); - g_free(user); - s->vhost_user = NULL; + vhost_user_cleanup(&s->vhost_user); } static void vhost_user_blk_device_unrealize(DeviceState *dev, Error **errp) @@ -336,14 +352,11 @@ static void vhost_user_blk_device_unrealize(DeviceState *dev, Error **errp) vhost_user_blk_set_status(vdev, 0); vhost_dev_cleanup(&s->dev); + vhost_dev_free_inflight(s->inflight); g_free(vqs); + g_free(s->inflight); virtio_cleanup(vdev); - - if (s->vhost_user) { - vhost_user_cleanup(s->vhost_user); - g_free(s->vhost_user); - s->vhost_user = NULL; - } + vhost_user_cleanup(&s->vhost_user); } static void vhost_user_blk_instance_init(Object *obj) @@ -386,6 +399,7 @@ static void vhost_user_blk_class_init(ObjectClass *klass, void *data) vdc->set_config = vhost_user_blk_set_config; vdc->get_features = vhost_user_blk_get_features; vdc->set_status = vhost_user_blk_set_status; + vdc->reset = vhost_user_blk_reset; } static const TypeInfo vhost_user_blk_info = { diff --git a/hw/block/xen-block.c b/hw/block/xen-block.c index 70fc2455e8..ef635be4c2 100644 --- a/hw/block/xen-block.c +++ b/hw/block/xen-block.c @@ -149,7 +149,7 @@ static void xen_block_set_size(XenBlockDevice *blockdev) const char *type = object_get_typename(OBJECT(blockdev)); XenBlockVdev *vdev = &blockdev->props.vdev; BlockConf *conf = &blockdev->props.conf; - int64_t sectors = blk_getlength(conf->blk) / conf->logical_block_size; + int64_t sectors = blk_getlength(conf->blk) / XEN_BLKIF_SECTOR_SIZE; XenDevice *xendev = XEN_DEVICE(blockdev); trace_xen_block_size(type, vdev->disk, vdev->partition, sectors); @@ -223,6 +223,12 @@ static void xen_block_realize(XenDevice *xendev, Error **errp) blkconf_blocksizes(conf); + if (conf->logical_block_size != XEN_BLKIF_SECTOR_SIZE) { + error_setg(errp, "logical_block_size != %u not supported", + XEN_BLKIF_SECTOR_SIZE); + return; + } + if (conf->logical_block_size > conf->physical_block_size) { error_setg( errp, "logical_block_size > physical_block_size not supported"); @@ -232,8 +238,14 @@ static void xen_block_realize(XenDevice *xendev, Error **errp) blk_set_dev_ops(conf->blk, &xen_block_dev_ops, blockdev); blk_set_guest_block_size(conf->blk, conf->logical_block_size); - if (conf->discard_granularity > 0) { + if (conf->discard_granularity == -1) { + conf->discard_granularity = conf->physical_block_size; + } + + if (blk_get_flags(conf->blk) & BDRV_O_UNMAP) { xen_device_backend_printf(xendev, "feature-discard", "%u", 1); + xen_device_backend_printf(xendev, "discard-granularity", "%u", + conf->discard_granularity); } xen_device_backend_printf(xendev, "feature-flush-cache", "%u", 1); @@ -247,7 +259,7 @@ static void xen_block_realize(XenDevice *xendev, Error **errp) blockdev->device_type); xen_device_backend_printf(xendev, "sector-size", "%u", - conf->logical_block_size); + XEN_BLKIF_SECTOR_SIZE); xen_block_set_size(blockdev); @@ -755,6 +767,7 @@ static XenBlockDrive *xen_block_drive_create(const char *id, drive->id = g_strdup(id); file_layer = qdict_new(); + driver_layer = qdict_new(); qdict_put_str(file_layer, "driver", "file"); qdict_put_str(file_layer, "filename", filename); @@ -771,7 +784,7 @@ static XenBlockDrive *xen_block_drive_create(const char *id, QDict *cache_qdict = qdict_new(); qdict_put_bool(cache_qdict, "direct", true); - qdict_put_obj(file_layer, "cache", QOBJECT(cache_qdict)); + qdict_put(file_layer, "cache", cache_qdict); qdict_put_str(file_layer, "aio", "native"); } @@ -782,6 +795,7 @@ static XenBlockDrive *xen_block_drive_create(const char *id, if (!qemu_strtoul(discard_enable, NULL, 2, &value) && !!value) { qdict_put_str(file_layer, "discard", "unmap"); + qdict_put_str(driver_layer, "discard", "unmap"); } } @@ -791,12 +805,10 @@ static XenBlockDrive *xen_block_drive_create(const char *id, */ qdict_put_str(file_layer, "locking", "off"); - driver_layer = qdict_new(); - qdict_put_str(driver_layer, "driver", driver); g_free(driver); - qdict_put_obj(driver_layer, "file", QOBJECT(file_layer)); + qdict_put(driver_layer, "file", file_layer); g_assert(!drive->node_name); drive->node_name = xen_block_blockdev_add(drive->id, driver_layer, diff --git a/hw/block/xen_blkif.h b/hw/block/xen_blkif.h index 3e6e1ea365..a353693ea0 100644 --- a/hw/block/xen_blkif.h +++ b/hw/block/xen_blkif.h @@ -143,4 +143,6 @@ static inline void blkif_get_x86_64_req(blkif_request_t *dst, } } +#define XEN_BLKIF_SECTOR_SIZE 512 + #endif /* XEN_BLKIF_H */ diff --git a/hw/char/Makefile.objs b/hw/char/Makefile.objs index c4947d7ae7..cf086e7114 100644 --- a/hw/char/Makefile.objs +++ b/hw/char/Makefile.objs @@ -2,7 +2,7 @@ common-obj-$(CONFIG_IPACK) += ipoctal232.o common-obj-$(CONFIG_ESCC) += escc.o common-obj-$(CONFIG_NRF51_SOC) += nrf51_uart.o common-obj-$(CONFIG_PARALLEL) += parallel.o -common-obj-$(CONFIG_PARALLEL) += parallel-isa.o +common-obj-$(CONFIG_ISA_BUS) += parallel-isa.o common-obj-$(CONFIG_PL011) += pl011.o common-obj-$(CONFIG_SERIAL) += serial.o common-obj-$(CONFIG_SERIAL_ISA) += serial-isa.o diff --git a/hw/char/parallel-isa.c b/hw/char/parallel-isa.c index 639e179585..a043832e72 100644 --- a/hw/char/parallel-isa.c +++ b/hw/char/parallel-isa.c @@ -1,6 +1,9 @@ /* * QEMU Parallel PORT (ISA bus helpers) * + * These functions reside in a separate file since they also might be + * required for linking when compiling QEMU without CONFIG_PARALLEL. + * * Copyright (c) 2003 Fabrice Bellard * * SPDX-License-Identifier: MIT diff --git a/hw/char/trace-events b/hw/char/trace-events index de34a74399..2ce7f2f998 100644 --- a/hw/char/trace-events +++ b/hw/char/trace-events @@ -1,47 +1,47 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/char/parallel.c +# parallel.c parallel_ioport_read(const char *desc, uint16_t addr, uint8_t value) "read [%s] addr 0x%02x val 0x%02x" parallel_ioport_write(const char *desc, uint16_t addr, uint8_t value) "write [%s] addr 0x%02x val 0x%02x" -# hw/char/serial.c +# serial.c serial_ioport_read(uint16_t addr, uint8_t value) "read addr 0x%02x val 0x%02x" serial_ioport_write(uint16_t addr, uint8_t value) "write addr 0x%02x val 0x%02x" -# hw/char/virtio-serial-bus.c +# virtio-serial-bus.c virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u" virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d" virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u" virtio_serial_handle_control_message_port(unsigned int port) "port %u" -# hw/char/virtio-console.c +# virtio-console.c virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd" virtio_console_chr_read(unsigned int port, int size) "port %u, size %d" virtio_console_chr_event(unsigned int port, int event) "port %u, event %d" -# hw/char/grlib_apbuart.c +# grlib_apbuart.c grlib_apbuart_event(int event) "event:%d" grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64 -# hw/char/lm32_juart.c +# lm32_juart.c lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x" lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x" lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x" lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x" -# hw/char/lm32_uart.c +# lm32_uart.c lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" lm32_uart_irq_state(int level) "irq state %d" -# hw/char/milkymist-uart.c +# milkymist-uart.c milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_uart_raise_irq(void) "Raise IRQ" milkymist_uart_lower_irq(void) "Lower IRQ" -# hw/char/escc.c +# escc.c escc_put_queue(char channel, int b) "channel %c put: 0x%02x" escc_get_queue(char channel, int val) "channel %c get 0x%02x" escc_update_irq(int irq) "IRQ = %d" @@ -56,7 +56,7 @@ escc_sunkbd_event_out(int ch) "Translated keycode 0x%2.2x" escc_kbd_command(int val) "Command %d" escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=0x%01x" -# hw/char/pl011.c +# pl011.c pl011_irq_state(int level) "irq state %d" pl011_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" pl011_read_fifo(int read_count) "FIFO read, read_count now %d" @@ -65,7 +65,7 @@ pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR 0x%08x read_count %d pl011_put_fifo(uint32_t c, int read_count) "new char 0x%x read_count now %d" pl011_put_fifo_full(void) "FIFO now full, RXFF set" -# hw/char/cmsdk_apb_uart.c +# cmsdk-apb-uart.c cmsdk_apb_uart_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB UART read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" cmsdk_apb_uart_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB UART write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" cmsdk_apb_uart_reset(void) "CMSDK APB UART: reset" @@ -74,6 +74,6 @@ cmsdk_apb_uart_tx_pending(void) "CMSDK APB UART: character send to backend pendi cmsdk_apb_uart_tx(uint8_t c) "CMSDK APB UART: character 0x%x sent to backend" cmsdk_apb_uart_set_params(int speed) "CMSDK APB UART: params set to %d 8N1" -# hw/char/nrf51_uart.c +# nrf51_uart.c nrf51_uart_read(uint64_t addr, uint64_t r, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u" nrf51_uart_write(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u" diff --git a/hw/core/loader-fit.c b/hw/core/loader-fit.c index 447f60857d..f27b6af942 100644 --- a/hw/core/loader-fit.c +++ b/hw/core/loader-fit.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/units.h" #include "exec/memory.h" #include "hw/loader.h" @@ -33,7 +34,7 @@ #define FIT_LOADER_MAX_PATH (128) static const void *fit_load_image_alloc(const void *itb, const char *name, - int *poff, size_t *psz) + int *poff, size_t *psz, Error **errp) { const void *data; const char *comp; @@ -46,6 +47,7 @@ static const void *fit_load_image_alloc(const void *itb, const char *name, off = fdt_path_offset(itb, path); if (off < 0) { + error_setg(errp, "can't find node %s", path); return NULL; } if (poff) { @@ -54,6 +56,7 @@ static const void *fit_load_image_alloc(const void *itb, const char *name, data = fdt_getprop(itb, off, "data", &sz); if (!data) { + error_setg(errp, "can't get %s/data", path); return NULL; } @@ -73,7 +76,7 @@ static const void *fit_load_image_alloc(const void *itb, const char *name, uncomp_len = gunzip(uncomp_data, uncomp_len, (void *) data, sz); if (uncomp_len < 0) { - error_printf("unable to decompress %s image\n", name); + error_setg(errp, "unable to decompress %s image", name); g_free(uncomp_data); return NULL; } @@ -85,18 +88,19 @@ static const void *fit_load_image_alloc(const void *itb, const char *name, return data; } - error_printf("unknown compression '%s'\n", comp); + error_setg(errp, "unknown compression '%s'", comp); return NULL; } static int fit_image_addr(const void *itb, int img, const char *name, - hwaddr *addr) + hwaddr *addr, Error **errp) { const void *prop; int len; prop = fdt_getprop(itb, img, name, &len); if (!prop) { + error_setg(errp, "can't find %s address", name); return -ENOENT; } @@ -108,13 +112,14 @@ static int fit_image_addr(const void *itb, int img, const char *name, *addr = fdt64_to_cpu(*(fdt64_t *)prop); return 0; default: - error_printf("invalid %s address length %d\n", name, len); + error_setg(errp, "invalid %s address length %d", name, len); return -EINVAL; } } static int fit_load_kernel(const struct fit_loader *ldr, const void *itb, - int cfg, void *opaque, hwaddr *pend) + int cfg, void *opaque, hwaddr *pend, + Error **errp) { const char *name; const void *data; @@ -126,26 +131,26 @@ static int fit_load_kernel(const struct fit_loader *ldr, const void *itb, name = fdt_getprop(itb, cfg, "kernel", NULL); if (!name) { - error_printf("no kernel specified by FIT configuration\n"); + error_setg(errp, "no kernel specified by FIT configuration"); return -EINVAL; } - load_data = data = fit_load_image_alloc(itb, name, &img_off, &sz); + load_data = data = fit_load_image_alloc(itb, name, &img_off, &sz, errp); if (!data) { - error_printf("unable to load kernel image from FIT\n"); + error_prepend(errp, "unable to load kernel image from FIT: "); return -EINVAL; } - err = fit_image_addr(itb, img_off, "load", &load_addr); + err = fit_image_addr(itb, img_off, "load", &load_addr, errp); if (err) { - error_printf("unable to read kernel load address from FIT\n"); + error_prepend(errp, "unable to read kernel load address from FIT: "); ret = err; goto out; } - err = fit_image_addr(itb, img_off, "entry", &entry_addr); + err = fit_image_addr(itb, img_off, "entry", &entry_addr, errp); if (err) { - error_printf("unable to read kernel entry address from FIT\n"); + error_prepend(errp, "unable to read kernel entry address from FIT: "); ret = err; goto out; } @@ -172,7 +177,7 @@ out: static int fit_load_fdt(const struct fit_loader *ldr, const void *itb, int cfg, void *opaque, const void *match_data, - hwaddr kernel_end) + hwaddr kernel_end, Error **errp) { const char *name; const void *data; @@ -187,16 +192,18 @@ static int fit_load_fdt(const struct fit_loader *ldr, const void *itb, return 0; } - load_data = data = fit_load_image_alloc(itb, name, &img_off, &sz); + load_data = data = fit_load_image_alloc(itb, name, &img_off, &sz, errp); if (!data) { - error_printf("unable to load FDT image from FIT\n"); + error_prepend(errp, "unable to load FDT image from FIT: "); return -EINVAL; } - err = fit_image_addr(itb, img_off, "load", &load_addr); + err = fit_image_addr(itb, img_off, "load", &load_addr, errp); if (err == -ENOENT) { load_addr = ROUND_UP(kernel_end, 64 * KiB) + (10 * MiB); + error_free(*errp); } else if (err) { + error_prepend(errp, "unable to read FDT load address from FIT: "); ret = err; goto out; } @@ -229,7 +236,7 @@ static bool fit_cfg_compatible(const void *itb, int cfg, const char *compat) return false; } - fdt = fit_load_image_alloc(itb, fdt_name, NULL, NULL); + fdt = fit_load_image_alloc(itb, fdt_name, NULL, NULL, NULL); if (!fdt) { return false; } @@ -252,11 +259,12 @@ out: int load_fit(const struct fit_loader *ldr, const char *filename, void *opaque) { + Error *err = NULL; const struct fit_loader_match *match; const void *itb, *match_data = NULL; const char *def_cfg_name; char path[FIT_LOADER_MAX_PATH]; - int itb_size, configs, cfg_off, off, err; + int itb_size, configs, cfg_off, off; hwaddr kernel_end; int ret; @@ -267,6 +275,7 @@ int load_fit(const struct fit_loader *ldr, const char *filename, void *opaque) configs = fdt_path_offset(itb, "/configurations"); if (configs < 0) { + error_report("can't find node /configurations"); ret = configs; goto out; } @@ -301,20 +310,21 @@ int load_fit(const struct fit_loader *ldr, const char *filename, void *opaque) } if (cfg_off < 0) { - /* couldn't find a configuration to use */ + error_report("can't find configuration"); ret = cfg_off; goto out; } - err = fit_load_kernel(ldr, itb, cfg_off, opaque, &kernel_end); - if (err) { - ret = err; + ret = fit_load_kernel(ldr, itb, cfg_off, opaque, &kernel_end, &err); + if (ret) { + error_report_err(err); goto out; } - err = fit_load_fdt(ldr, itb, cfg_off, opaque, match_data, kernel_end); - if (err) { - ret = err; + ret = fit_load_fdt(ldr, itb, cfg_off, opaque, match_data, kernel_end, + &err); + if (ret) { + error_report_err(err); goto out; } diff --git a/hw/core/machine.c b/hw/core/machine.c index 766ca5899d..5d046a43e3 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -22,6 +22,10 @@ #include "qemu/error-report.h" #include "sysemu/qtest.h" #include "hw/pci/pci.h" +#include "hw/mem/nvdimm.h" + +GlobalProperty hw_compat_4_0[] = {}; +const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); GlobalProperty hw_compat_3_1[] = { { "pcie-root-port", "x-speed", "2_5" }, @@ -481,6 +485,47 @@ static void machine_set_memory_encryption(Object *obj, const char *value, ms->memory_encryption = g_strdup(value); } +static bool machine_get_nvdimm(Object *obj, Error **errp) +{ + MachineState *ms = MACHINE(obj); + + return ms->nvdimms_state->is_enabled; +} + +static void machine_set_nvdimm(Object *obj, bool value, Error **errp) +{ + MachineState *ms = MACHINE(obj); + + ms->nvdimms_state->is_enabled = value; +} + +static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) +{ + MachineState *ms = MACHINE(obj); + + return g_strdup(ms->nvdimms_state->persistence_string); +} + +static void machine_set_nvdimm_persistence(Object *obj, const char *value, + Error **errp) +{ + MachineState *ms = MACHINE(obj); + NVDIMMState *nvdimms_state = ms->nvdimms_state; + + if (strcmp(value, "cpu") == 0) { + nvdimms_state->persistence = 3; + } else if (strcmp(value, "mem-ctrl") == 0) { + nvdimms_state->persistence = 2; + } else { + error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", + value); + return; + } + + g_free(nvdimms_state->persistence_string); + nvdimms_state->persistence_string = g_strdup(value); +} + void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) { strList *item = g_new0(strList, 1); @@ -791,6 +836,28 @@ static void machine_initfn(Object *obj) ms->mem_merge = true; ms->enable_graphics = true; + if (mc->nvdimm_supported) { + Object *obj = OBJECT(ms); + + ms->nvdimms_state = g_new0(NVDIMMState, 1); + object_property_add_bool(obj, "nvdimm", + machine_get_nvdimm, machine_set_nvdimm, + &error_abort); + object_property_set_description(obj, "nvdimm", + "Set on/off to enable/disable " + "NVDIMM instantiation", NULL); + + object_property_add_str(obj, "nvdimm-persistence", + machine_get_nvdimm_persistence, + machine_set_nvdimm_persistence, + &error_abort); + object_property_set_description(obj, "nvdimm-persistence", + "Set NVDIMM persistence" + "Valid values are cpu, mem-ctrl", + NULL); + } + + /* Register notifier when init is done for sysbus sanity checks */ ms->sysbus_notifier.notify = machine_init_notify; qemu_add_machine_init_done_notifier(&ms->sysbus_notifier); @@ -809,6 +876,7 @@ static void machine_finalize(Object *obj) g_free(ms->dt_compatible); g_free(ms->firmware); g_free(ms->device_memory); + g_free(ms->nvdimms_state); } bool machine_usb(MachineState *machine) diff --git a/hw/display/Kconfig b/hw/display/Kconfig index 86c1d544c5..72be57a403 100644 --- a/hw/display/Kconfig +++ b/hw/display/Kconfig @@ -100,7 +100,7 @@ config VIRTIO_GPU config VIRTIO_VGA bool - default y if PCI_DEVICES + # defaults to "N", enabled by specific boards depends on VIRTIO_PCI select VGA diff --git a/hw/display/ati.c b/hw/display/ati.c index 8322f52aff..db409be3c9 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -235,12 +235,9 @@ static uint64_t ati_mm_read(void *opaque, hwaddr addr, unsigned int size) case MM_DATA ... MM_DATA + 3: /* indexed access to regs or memory */ if (s->regs.mm_index & BIT(31)) { - if (s->regs.mm_index <= s->vga.vram_size - size) { - int i = size - 1; - while (i >= 0) { - val <<= 8; - val |= s->vga.vram_ptr[s->regs.mm_index + i--]; - } + uint32_t idx = s->regs.mm_index & ~BIT(31); + if (idx <= s->vga.vram_size - size) { + val = ldn_le_p(s->vga.vram_ptr + idx, size); } } else { val = ati_mm_read(s, s->regs.mm_index + addr - MM_DATA, size); @@ -434,12 +431,9 @@ static void ati_mm_write(void *opaque, hwaddr addr, case MM_DATA ... MM_DATA + 3: /* indexed access to regs or memory */ if (s->regs.mm_index & BIT(31)) { - if (s->regs.mm_index <= s->vga.vram_size - size) { - int i = 0; - while (i < size) { - s->vga.vram_ptr[s->regs.mm_index + i] = data & 0xff; - data >>= 8; - } + uint32_t idx = s->regs.mm_index & ~BIT(31); + if (idx <= s->vga.vram_size - size) { + stn_le_p(s->vga.vram_ptr + idx, size, data); } } else { ati_mm_write(s, s->regs.mm_index + addr - MM_DATA, data, size); diff --git a/hw/display/blizzard.c b/hw/display/blizzard.c index 291abe6fca..471bd0ed99 100644 --- a/hw/display/blizzard.c +++ b/hw/display/blizzard.c @@ -21,7 +21,7 @@ #include "qemu/osdep.h" #include "qemu-common.h" #include "ui/console.h" -#include "hw/devices.h" +#include "hw/display/blizzard.h" #include "ui/pixel_ops.h" typedef void (*blizzard_fn_t)(uint8_t *, const uint8_t *, unsigned int); diff --git a/hw/display/tc6393xb.c b/hw/display/tc6393xb.c index e1b1e302f2..0b7c59cde7 100644 --- a/hw/display/tc6393xb.c +++ b/hw/display/tc6393xb.c @@ -14,7 +14,7 @@ #include "qapi/error.h" #include "qemu/host-utils.h" #include "hw/hw.h" -#include "hw/devices.h" +#include "hw/display/tc6393xb.h" #include "hw/block/flash.h" #include "ui/console.h" #include "ui/pixel_ops.h" @@ -137,11 +137,6 @@ struct TC6393xbState { blanked : 1; }; -qemu_irq *tc6393xb_gpio_in_get(TC6393xbState *s) -{ - return s->gpio_in; -} - static void tc6393xb_gpio_set(void *opaque, int line, int level) { // TC6393xbState *s = opaque; @@ -154,17 +149,6 @@ static void tc6393xb_gpio_set(void *opaque, int line, int level) // FIXME: how does the chip reflect the GPIO input level change? } -void tc6393xb_gpio_out_set(TC6393xbState *s, int line, - qemu_irq handler) -{ - if (line >= TC6393XB_GPIOS) { - fprintf(stderr, "TC6393xb: no GPIO pin %d\n", line); - return; - } - - s->handler[line] = handler; -} - static void tc6393xb_gpio_handler_update(TC6393xbState *s) { uint32_t level, diff; diff --git a/hw/display/trace-events b/hw/display/trace-events index 80993cc4d9..ba7787b180 100644 --- a/hw/display/trace-events +++ b/hw/display/trace-events @@ -1,29 +1,29 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/display/jazz_led.c +# jazz_led.c jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x" jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x" -# hw/display/xenfb.c +# xenfb.c xenfb_mouse_event(void *opaque, int dx, int dy, int dz, int button_state, int abs_pointer_wanted) "%p x %d y %d z %d bs 0x%x abs %d" xenfb_key_event(void *opaque, int scancode, int button_state) "%p scancode %d bs 0x%x" xenfb_input_connected(void *xendev, int abs_pointer_wanted) "%p abs %d" -# hw/display/g364fb.c +# g364fb.c g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x" g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x" -# hw/display/milkymist-tmu2.c +# milkymist-tmu2.c milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_tmu2_start(void) "Start TMU" milkymist_tmu2_pulse_irq(void) "Pulse IRQ" -# hw/display/milkymist-vgafb.c +# milkymist-vgafb.c milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" -# hw/display/vmware_vga.c +# vmware_vga.c vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x" vmware_value_write(uint32_t index, uint32_t value) "index %d, value 0x%x" vmware_palette_read(uint32_t index, uint32_t value) "index %d, value 0x%x" @@ -32,7 +32,8 @@ vmware_scratch_read(uint32_t index, uint32_t value) "index %d, value 0x%x" vmware_scratch_write(uint32_t index, uint32_t value) "index %d, value 0x%x" vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp" -# hw/display/virtio-gpu.c +# virtio-gpu-3d.c +# virtio-gpu.c virtio_gpu_features(bool virgl) "virgl %d" virtio_gpu_cmd_get_display_info(void) "" virtio_gpu_cmd_get_edid(uint32_t scanout) "scanout %d" @@ -55,7 +56,7 @@ virtio_gpu_update_cursor(uint32_t scanout, uint32_t x, uint32_t y, const char *t virtio_gpu_fence_ctrl(uint64_t fence, uint32_t type) "fence 0x%" PRIx64 ", type 0x%x" virtio_gpu_fence_resp(uint64_t fence) "fence 0x%" PRIx64 -# hw/display/qxl.c +# qxl.c disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d" disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u" qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=0x%" PRIx64 " %u,%u" @@ -117,28 +118,27 @@ qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d" qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u" qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision) "%d revision=%d" -# hw/display/qxl-render.c +# qxl-render.c qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]" qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d" qxl_render_update_area_done(void *cookie) "%p" -# hw/display/vga.c +# vga.c vga_std_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" vga_std_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" vga_vbe_read(uint32_t index, uint32_t val) "index 0x%x, val 0x%x" vga_vbe_write(uint32_t index, uint32_t val) "index 0x%x, val 0x%x" -# hw/display/cirrus_vga.c +# cirrus_vga.c vga_cirrus_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" vga_cirrus_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" -vga_cirrus_read_blt(uint32_t offset, uint32_t val) "offset 0x%x, val 0x%x" vga_cirrus_write_blt(uint32_t offset, uint32_t val) "offset 0x%x, val 0x%x" -# hw/display/sii9022.c +# sii9022.c sii9022_read_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x" sii9022_write_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x" sii9022_switch_mode(const char *mode) "mode: %s" -# hw/display/ati*.c -ati_mm_read(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"HWADDR_PRIx " %s -> 0x%"PRIx64 -ati_mm_write(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"HWADDR_PRIx " %s <- 0x%"PRIx64 +# ati.c +ati_mm_read(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"PRIx64 " %s -> 0x%"PRIx64 +ati_mm_write(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"PRIx64 " %s <- 0x%"PRIx64 diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 4dbf48e424..9e37e0ac96 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1084,6 +1084,12 @@ static void virtio_gpu_gl_block(void *opaque, bool block) assert(g->renderer_blocked >= 0); if (g->renderer_blocked == 0) { +#ifdef CONFIG_VIRGL + if (g->renderer_reset) { + g->renderer_reset = false; + virtio_gpu_virgl_reset(g); + } +#endif virtio_gpu_process_cmdq(g); } } @@ -1350,6 +1356,7 @@ static void virtio_gpu_reset(VirtIODevice *vdev) { VirtIOGPU *g = VIRTIO_GPU(vdev); struct virtio_gpu_simple_resource *res, *tmp; + struct virtio_gpu_ctrl_command *cmd; int i; g->enable = 0; @@ -1366,9 +1373,26 @@ static void virtio_gpu_reset(VirtIODevice *vdev) g->scanout[i].ds = NULL; } + while (!QTAILQ_EMPTY(&g->cmdq)) { + cmd = QTAILQ_FIRST(&g->cmdq); + QTAILQ_REMOVE(&g->cmdq, cmd, next); + g_free(cmd); + } + + while (!QTAILQ_EMPTY(&g->fenceq)) { + cmd = QTAILQ_FIRST(&g->fenceq); + QTAILQ_REMOVE(&g->fenceq, cmd, next); + g->inflight--; + g_free(cmd); + } + #ifdef CONFIG_VIRGL if (g->use_virgl_renderer) { - virtio_gpu_virgl_reset(g); + if (g->renderer_blocked) { + g->renderer_reset = true; + } else { + virtio_gpu_virgl_reset(g); + } g->use_virgl_renderer = 0; } #endif diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index cc0f9bc9cc..11b09bd18c 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -1260,7 +1260,7 @@ static void xlnx_dp_realize(DeviceState *dev, Error **errp) as.freq = 44100; as.nchannels = 2; - as.fmt = AUD_FMT_S16; + as.fmt = AUDIO_FORMAT_S16; as.endianness = 0; AUD_register_card("xlnx_dp.audio", &s->aud_card); diff --git a/hw/dma/Makefile.objs b/hw/dma/Makefile.objs index 79affecc39..8b39f9c600 100644 --- a/hw/dma/Makefile.objs +++ b/hw/dma/Makefile.objs @@ -14,4 +14,4 @@ common-obj-$(CONFIG_XLNX_ZYNQMP_ARM) += xlnx-zdma.o obj-$(CONFIG_OMAP) += omap_dma.o soc_dma.o obj-$(CONFIG_PXA2XX) += pxa2xx_dma.o -obj-$(CONFIG_RASPI) += bcm2835_dma.o +common-obj-$(CONFIG_RASPI) += bcm2835_dma.o diff --git a/hw/dma/trace-events b/hw/dma/trace-events index 22f53d0ff2..e4498428c5 100644 --- a/hw/dma/trace-events +++ b/hw/dma/trace-events @@ -1,12 +1,12 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/dma/rc4030.c +# rc4030.c jazzio_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" jazzio_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" rc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" rc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" -# hw/dma/sparc32_dma.c +# sparc32_dma.c ledma_memory_read(uint64_t addr, int len) "DMA read addr 0x%"PRIx64 " len %d" ledma_memory_write(uint64_t addr, int len) "DMA write addr 0x%"PRIx64 " len %d" sparc32_dma_set_irq_raise(void) "Raise IRQ" @@ -18,5 +18,5 @@ sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg sparc32_dma_enable_raise(void) "Raise DMA enable" sparc32_dma_enable_lower(void) "Lower DMA enable" -# hw/dma/i8257.c +# i8257.c i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d" diff --git a/hw/gpio/nrf51_gpio.c b/hw/gpio/nrf51_gpio.c index 86e047d649..87a2f2a0dc 100644 --- a/hw/gpio/nrf51_gpio.c +++ b/hw/gpio/nrf51_gpio.c @@ -43,6 +43,17 @@ static bool is_connected(uint32_t config, uint32_t level) return state; } +static int pull_value(uint32_t config) +{ + int pull = extract32(config, 2, 2); + if (pull == NRF51_GPIO_PULLDOWN) { + return 0; + } else if (pull == NRF51_GPIO_PULLUP) { + return 1; + } + return -1; +} + static void update_output_irq(NRF51GPIOState *s, size_t i, bool connected, bool level) { @@ -61,43 +72,47 @@ static void update_output_irq(NRF51GPIOState *s, size_t i, static void update_state(NRF51GPIOState *s) { - uint32_t pull; + int pull; size_t i; - bool connected_out, dir, connected_in, out, input; + bool connected_out, dir, connected_in, out, in, input; for (i = 0; i < NRF51_GPIO_PINS; i++) { - pull = extract32(s->cnf[i], 2, 2); + pull = pull_value(s->cnf[i]); dir = extract32(s->cnf[i], 0, 1); connected_in = extract32(s->in_mask, i, 1); out = extract32(s->out, i, 1); + in = extract32(s->in, i, 1); input = !extract32(s->cnf[i], 1, 1); connected_out = is_connected(s->cnf[i], out) && dir; - update_output_irq(s, i, connected_out, out); - - /* Pin both driven externally and internally */ - if (connected_out && connected_in) { - qemu_log_mask(LOG_GUEST_ERROR, "GPIO pin %zu short circuited\n", i); - } - - /* - * Input buffer disconnected from internal/external drives, so - * pull-up/pull-down becomes relevant - */ - if (!input || (input && !connected_in && !connected_out)) { - if (pull == NRF51_GPIO_PULLDOWN) { - s->in = deposit32(s->in, i, 1, 0); - } else if (pull == NRF51_GPIO_PULLUP) { - s->in = deposit32(s->in, i, 1, 1); + if (!input) { + if (pull >= 0) { + /* Input buffer disconnected from external drives */ + s->in = deposit32(s->in, i, 1, pull); + } + } else { + if (connected_out && connected_in && out != in) { + /* Pin both driven externally and internally */ + qemu_log_mask(LOG_GUEST_ERROR, + "GPIO pin %zu short circuited\n", i); + } + if (!connected_in) { + /* + * Floating input: the output stimulates IN if connected, + * otherwise pull-up/pull-down resistors put a value on both + * IN and OUT. + */ + if (pull >= 0 && !connected_out) { + connected_out = true; + out = pull; + } + if (connected_out) { + s->in = deposit32(s->in, i, 1, out); + } } } - - /* Self stimulation through internal output driver */ - if (connected_out && !connected_in && input) { - s->in = deposit32(s->in, i, 1, out); - } + update_output_irq(s, i, connected_out, out); } - } /* diff --git a/hw/gpio/trace-events b/hw/gpio/trace-events index 5d4dd200c2..c1271fdfb2 100644 --- a/hw/gpio/trace-events +++ b/hw/gpio/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/gpio/nrf51_gpio.c +# nrf51_gpio.c nrf51_gpio_read(uint64_t offset, uint64_t r) "offset 0x%" PRIx64 " value 0x%" PRIx64 nrf51_gpio_write(uint64_t offset, uint64_t value) "offset 0x%" PRIx64 " value 0x%" PRIx64 nrf51_gpio_set(int64_t line, int64_t value) "line %" PRIi64 " value %" PRIi64 diff --git a/hw/hppa/Kconfig b/hw/hppa/Kconfig index 2d9b072c21..6e5d74a825 100644 --- a/hw/hppa/Kconfig +++ b/hw/hppa/Kconfig @@ -1,6 +1,8 @@ config DINO bool imply PCI_DEVICES + imply E1000_PCI + imply VIRTIO_VGA select PCI select SERIAL select ISA_BUS diff --git a/hw/hppa/hppa_hardware.h b/hw/hppa/hppa_hardware.h index 2c61b1f77c..af2f5ee2bd 100644 --- a/hw/hppa/hppa_hardware.h +++ b/hw/hppa/hppa_hardware.h @@ -19,7 +19,7 @@ #define LASI_PS2KBD_HPA 0xffd08000 #define LASI_PS2MOU_HPA 0xffd08100 #define LASI_GFX_HPA 0xf8000000 -#define CPU_HPA 0xfff10000 +#define CPU_HPA 0xfffb0000 #define MEMORY_HPA 0xfffbf000 #define PCI_HPA DINO_HPA /* PCI bus */ @@ -36,5 +36,5 @@ #define PORT_SERIAL1 (DINO_UART_HPA + 0x800) #define PORT_SERIAL2 (LASI_UART_HPA + 0x800) -#define HPPA_MAX_CPUS 32 /* max. number of SMP CPUs */ +#define HPPA_MAX_CPUS 8 /* max. number of SMP CPUs */ #define CPU_CLOCK_MHZ 250 /* emulate a 250 MHz CPU */ diff --git a/hw/hppa/trace-events b/hw/hppa/trace-events index 14c67937e1..4e2acb6176 100644 --- a/hw/hppa/trace-events +++ b/hw/hppa/trace-events @@ -1,4 +1,4 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/hppa/pci.c +# pci.c hppa_pci_iack_write(void) "" diff --git a/hw/i2c/trace-events b/hw/i2c/trace-events index d339b61202..e1c810d5bd 100644 --- a/hw/i2c/trace-events +++ b/hw/i2c/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/i2c/core.c +# core.c i2c_event(const char *event, uint8_t address) "%s(addr:0x%02x)" i2c_send(uint8_t address, uint8_t data) "send(addr:0x%02x) data:0x%02x" diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig index 78fd70396a..a6aed7c131 100644 --- a/hw/i386/Kconfig +++ b/hw/i386/Kconfig @@ -9,6 +9,7 @@ config PC imply ISA_IPMI_KCS imply ISA_IPMI_BT imply ISA_DEBUG + imply PARALLEL imply PCI_DEVICES imply PVPANIC imply QXL @@ -17,16 +18,15 @@ config PC imply TEST_DEVICES imply TPM_CRB imply TPM_TIS + imply VGA_PCI + imply VIRTIO_VGA select FDC select I8259 select I8254 select PCKBD select PCSPK - select I82374 select I8257 select MC146818RTC - # Needed by the board code: - select PARALLEL # For ACPI builder: select SERIAL_ISA select ACPI_VMGENID @@ -49,6 +49,7 @@ config PC_ACPI config I440FX bool + imply E1000_PCI select PC_PCI select PC_ACPI select ACPI_SMBUS @@ -74,6 +75,7 @@ config Q35 bool imply VTD imply AMD_IOMMU + imply E1000E_PCI_EXPRESS select PC_PCI select PC_ACPI select PCI_EXPRESS_Q35 diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 9ecc96dcc7..416da318ae 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1867,7 +1867,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(scope, method); } - if (pcms->acpi_nvdimm_state.is_enabled) { + if (machine->nvdimms_state->is_enabled) { method = aml_method("_E04", 0, AML_NOTSERIALIZED); aml_append(method, aml_notify(aml_name("\\_SB.NVDR"), aml_int(0x80))); @@ -2704,9 +2704,9 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine) build_dmar_q35(tables_blob, tables->linker); } } - if (pcms->acpi_nvdimm_state.is_enabled) { + if (machine->nvdimms_state->is_enabled) { nvdimm_build_acpi(table_offsets, tables_blob, tables->linker, - &pcms->acpi_nvdimm_state, machine->ram_slots); + machine->nvdimms_state, machine->ram_slots); } /* Add tables supplied by user (if any) */ diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 6eabdf9917..4a4e2c7fd4 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -1601,6 +1601,8 @@ static void amdvi_class_init(ObjectClass *klass, void* data) dc_class->int_remap = amdvi_int_remap; /* Supported by the pc-q35-* machine types */ dc->user_creatable = true; + set_bit(DEVICE_CATEGORY_MISC, dc->categories); + dc->desc = "AMD IOMMU (AMD-Vi) DMA Remapping device"; } static const TypeInfo amdvi = { diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index ee22e754f0..44b1231157 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -37,6 +37,27 @@ #include "kvm_i386.h" #include "trace.h" +/* context entry operations */ +#define VTD_CE_GET_RID2PASID(ce) \ + ((ce)->val[1] & VTD_SM_CONTEXT_ENTRY_RID2PASID_MASK) +#define VTD_CE_GET_PASID_DIR_TABLE(ce) \ + ((ce)->val[0] & VTD_PASID_DIR_BASE_ADDR_MASK) + +/* pe operations */ +#define VTD_PE_GET_TYPE(pe) ((pe)->val[0] & VTD_SM_PASID_ENTRY_PGTT) +#define VTD_PE_GET_LEVEL(pe) (2 + (((pe)->val[0] >> 2) & VTD_SM_PASID_ENTRY_AW)) +#define VTD_PE_GET_FPD_ERR(ret_fr, is_fpd_set, s, source_id, addr, is_write) {\ + if (ret_fr) { \ + ret_fr = -ret_fr; \ + if (is_fpd_set && vtd_is_qualified_fault(ret_fr)) { \ + trace_vtd_fault_disabled(); \ + } else { \ + vtd_report_dmar_fault(s, source_id, addr, ret_fr, is_write); \ + } \ + goto error; \ + } \ +} + static void vtd_address_space_refresh_all(IntelIOMMUState *s); static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n); @@ -141,6 +162,15 @@ static inline void vtd_iommu_unlock(IntelIOMMUState *s) qemu_mutex_unlock(&s->iommu_lock); } +static void vtd_update_scalable_state(IntelIOMMUState *s) +{ + uint64_t val = vtd_get_quad_raw(s, DMAR_RTADDR_REG); + + if (s->scalable_mode) { + s->root_scalable = val & VTD_RTADDR_SMT; + } +} + /* Whether the address space needs to notify new mappings */ static inline gboolean vtd_as_has_map_notifier(VTDAddressSpace *as) { @@ -512,9 +542,15 @@ static void vtd_generate_completion_event(IntelIOMMUState *s) } } -static inline bool vtd_root_entry_present(VTDRootEntry *root) +static inline bool vtd_root_entry_present(IntelIOMMUState *s, + VTDRootEntry *re, + uint8_t devfn) { - return root->val & VTD_ROOT_ENTRY_P; + if (s->root_scalable && devfn > UINT8_MAX / 2) { + return re->hi & VTD_ROOT_ENTRY_P; + } + + return re->lo & VTD_ROOT_ENTRY_P; } static int vtd_get_root_entry(IntelIOMMUState *s, uint8_t index, @@ -524,10 +560,11 @@ static int vtd_get_root_entry(IntelIOMMUState *s, uint8_t index, addr = s->root + index * sizeof(*re); if (dma_memory_read(&address_space_memory, addr, re, sizeof(*re))) { - re->val = 0; + re->lo = 0; return -VTD_FR_ROOT_TABLE_INV; } - re->val = le64_to_cpu(re->val); + re->lo = le64_to_cpu(re->lo); + re->hi = le64_to_cpu(re->hi); return 0; } @@ -536,18 +573,35 @@ static inline bool vtd_ce_present(VTDContextEntry *context) return context->lo & VTD_CONTEXT_ENTRY_P; } -static int vtd_get_context_entry_from_root(VTDRootEntry *root, uint8_t index, +static int vtd_get_context_entry_from_root(IntelIOMMUState *s, + VTDRootEntry *re, + uint8_t index, VTDContextEntry *ce) { - dma_addr_t addr; + dma_addr_t addr, ce_size; /* we have checked that root entry is present */ - addr = (root->val & VTD_ROOT_ENTRY_CTP) + index * sizeof(*ce); - if (dma_memory_read(&address_space_memory, addr, ce, sizeof(*ce))) { + ce_size = s->root_scalable ? VTD_CTX_ENTRY_SCALABLE_SIZE : + VTD_CTX_ENTRY_LEGACY_SIZE; + + if (s->root_scalable && index > UINT8_MAX / 2) { + index = index & (~VTD_DEVFN_CHECK_MASK); + addr = re->hi & VTD_ROOT_ENTRY_CTP; + } else { + addr = re->lo & VTD_ROOT_ENTRY_CTP; + } + + addr = addr + index * ce_size; + if (dma_memory_read(&address_space_memory, addr, ce, ce_size)) { return -VTD_FR_CONTEXT_TABLE_INV; } + ce->lo = le64_to_cpu(ce->lo); ce->hi = le64_to_cpu(ce->hi); + if (ce_size == VTD_CTX_ENTRY_SCALABLE_SIZE) { + ce->val[2] = le64_to_cpu(ce->val[2]); + ce->val[3] = le64_to_cpu(ce->val[3]); + } return 0; } @@ -600,6 +654,144 @@ static inline bool vtd_is_level_supported(IntelIOMMUState *s, uint32_t level) (1ULL << (level - 2 + VTD_CAP_SAGAW_SHIFT)); } +/* Return true if check passed, otherwise false */ +static inline bool vtd_pe_type_check(X86IOMMUState *x86_iommu, + VTDPASIDEntry *pe) +{ + switch (VTD_PE_GET_TYPE(pe)) { + case VTD_SM_PASID_ENTRY_FLT: + case VTD_SM_PASID_ENTRY_SLT: + case VTD_SM_PASID_ENTRY_NESTED: + break; + case VTD_SM_PASID_ENTRY_PT: + if (!x86_iommu->pt_supported) { + return false; + } + break; + default: + /* Unknwon type */ + return false; + } + return true; +} + +static int vtd_get_pasid_dire(dma_addr_t pasid_dir_base, + uint32_t pasid, + VTDPASIDDirEntry *pdire) +{ + uint32_t index; + dma_addr_t addr, entry_size; + + index = VTD_PASID_DIR_INDEX(pasid); + entry_size = VTD_PASID_DIR_ENTRY_SIZE; + addr = pasid_dir_base + index * entry_size; + if (dma_memory_read(&address_space_memory, addr, pdire, entry_size)) { + return -VTD_FR_PASID_TABLE_INV; + } + + return 0; +} + +static int vtd_get_pasid_entry(IntelIOMMUState *s, + uint32_t pasid, + VTDPASIDDirEntry *pdire, + VTDPASIDEntry *pe) +{ + uint32_t index; + dma_addr_t addr, entry_size; + X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(s); + + index = VTD_PASID_TABLE_INDEX(pasid); + entry_size = VTD_PASID_ENTRY_SIZE; + addr = pdire->val & VTD_PASID_TABLE_BASE_ADDR_MASK; + addr = addr + index * entry_size; + if (dma_memory_read(&address_space_memory, addr, pe, entry_size)) { + return -VTD_FR_PASID_TABLE_INV; + } + + /* Do translation type check */ + if (!vtd_pe_type_check(x86_iommu, pe)) { + return -VTD_FR_PASID_TABLE_INV; + } + + if (!vtd_is_level_supported(s, VTD_PE_GET_LEVEL(pe))) { + return -VTD_FR_PASID_TABLE_INV; + } + + return 0; +} + +static int vtd_get_pasid_entry_from_pasid(IntelIOMMUState *s, + dma_addr_t pasid_dir_base, + uint32_t pasid, + VTDPASIDEntry *pe) +{ + int ret; + VTDPASIDDirEntry pdire; + + ret = vtd_get_pasid_dire(pasid_dir_base, pasid, &pdire); + if (ret) { + return ret; + } + + ret = vtd_get_pasid_entry(s, pasid, &pdire, pe); + if (ret) { + return ret; + } + + return ret; +} + +static int vtd_ce_get_rid2pasid_entry(IntelIOMMUState *s, + VTDContextEntry *ce, + VTDPASIDEntry *pe) +{ + uint32_t pasid; + dma_addr_t pasid_dir_base; + int ret = 0; + + pasid = VTD_CE_GET_RID2PASID(ce); + pasid_dir_base = VTD_CE_GET_PASID_DIR_TABLE(ce); + ret = vtd_get_pasid_entry_from_pasid(s, pasid_dir_base, pasid, pe); + + return ret; +} + +static int vtd_ce_get_pasid_fpd(IntelIOMMUState *s, + VTDContextEntry *ce, + bool *pe_fpd_set) +{ + int ret; + uint32_t pasid; + dma_addr_t pasid_dir_base; + VTDPASIDDirEntry pdire; + VTDPASIDEntry pe; + + pasid = VTD_CE_GET_RID2PASID(ce); + pasid_dir_base = VTD_CE_GET_PASID_DIR_TABLE(ce); + + ret = vtd_get_pasid_dire(pasid_dir_base, pasid, &pdire); + if (ret) { + return ret; + } + + if (pdire.val & VTD_PASID_DIR_FPD) { + *pe_fpd_set = true; + return 0; + } + + ret = vtd_get_pasid_entry(s, pasid, &pdire, &pe); + if (ret) { + return ret; + } + + if (pe.val[0] & VTD_PASID_ENTRY_FPD) { + *pe_fpd_set = true; + } + + return 0; +} + /* Get the page-table level that hardware should use for the second-level * page-table walk from the Address Width field of context-entry. */ @@ -608,17 +800,43 @@ static inline uint32_t vtd_ce_get_level(VTDContextEntry *ce) return 2 + (ce->hi & VTD_CONTEXT_ENTRY_AW); } +static uint32_t vtd_get_iova_level(IntelIOMMUState *s, + VTDContextEntry *ce) +{ + VTDPASIDEntry pe; + + if (s->root_scalable) { + vtd_ce_get_rid2pasid_entry(s, ce, &pe); + return VTD_PE_GET_LEVEL(&pe); + } + + return vtd_ce_get_level(ce); +} + static inline uint32_t vtd_ce_get_agaw(VTDContextEntry *ce) { return 30 + (ce->hi & VTD_CONTEXT_ENTRY_AW) * 9; } +static uint32_t vtd_get_iova_agaw(IntelIOMMUState *s, + VTDContextEntry *ce) +{ + VTDPASIDEntry pe; + + if (s->root_scalable) { + vtd_ce_get_rid2pasid_entry(s, ce, &pe); + return 30 + ((pe.val[0] >> 2) & VTD_SM_PASID_ENTRY_AW) * 9; + } + + return vtd_ce_get_agaw(ce); +} + static inline uint32_t vtd_ce_get_type(VTDContextEntry *ce) { return ce->lo & VTD_CONTEXT_ENTRY_TT; } -/* Return true if check passed, otherwise false */ +/* Only for Legacy Mode. Return true if check passed, otherwise false */ static inline bool vtd_ce_type_check(X86IOMMUState *x86_iommu, VTDContextEntry *ce) { @@ -639,7 +857,7 @@ static inline bool vtd_ce_type_check(X86IOMMUState *x86_iommu, } break; default: - /* Unknwon type */ + /* Unknown type */ error_report_once("%s: unknown ce type: %"PRIu32, __func__, vtd_ce_get_type(ce)); return false; @@ -647,21 +865,36 @@ static inline bool vtd_ce_type_check(X86IOMMUState *x86_iommu, return true; } -static inline uint64_t vtd_iova_limit(VTDContextEntry *ce, uint8_t aw) +static inline uint64_t vtd_iova_limit(IntelIOMMUState *s, + VTDContextEntry *ce, uint8_t aw) { - uint32_t ce_agaw = vtd_ce_get_agaw(ce); + uint32_t ce_agaw = vtd_get_iova_agaw(s, ce); return 1ULL << MIN(ce_agaw, aw); } /* Return true if IOVA passes range check, otherwise false. */ -static inline bool vtd_iova_range_check(uint64_t iova, VTDContextEntry *ce, +static inline bool vtd_iova_range_check(IntelIOMMUState *s, + uint64_t iova, VTDContextEntry *ce, uint8_t aw) { /* * Check if @iova is above 2^X-1, where X is the minimum of MGAW * in CAP_REG and AW in context-entry. */ - return !(iova & ~(vtd_iova_limit(ce, aw) - 1)); + return !(iova & ~(vtd_iova_limit(s, ce, aw) - 1)); +} + +static dma_addr_t vtd_get_iova_pgtbl_base(IntelIOMMUState *s, + VTDContextEntry *ce) +{ + VTDPASIDEntry pe; + + if (s->root_scalable) { + vtd_ce_get_rid2pasid_entry(s, ce, &pe); + return pe.val[0] & VTD_SM_PASID_ENTRY_SLPTPTR; + } + + return vtd_ce_get_slpt_base(ce); } /* @@ -707,17 +940,18 @@ static VTDBus *vtd_find_as_from_bus_num(IntelIOMMUState *s, uint8_t bus_num) /* Given the @iova, get relevant @slptep. @slpte_level will be the last level * of the translation, can be used for deciding the size of large page. */ -static int vtd_iova_to_slpte(VTDContextEntry *ce, uint64_t iova, bool is_write, +static int vtd_iova_to_slpte(IntelIOMMUState *s, VTDContextEntry *ce, + uint64_t iova, bool is_write, uint64_t *slptep, uint32_t *slpte_level, bool *reads, bool *writes, uint8_t aw_bits) { - dma_addr_t addr = vtd_ce_get_slpt_base(ce); - uint32_t level = vtd_ce_get_level(ce); + dma_addr_t addr = vtd_get_iova_pgtbl_base(s, ce); + uint32_t level = vtd_get_iova_level(s, ce); uint32_t offset; uint64_t slpte; uint64_t access_right_check; - if (!vtd_iova_range_check(iova, ce, aw_bits)) { + if (!vtd_iova_range_check(s, iova, ce, aw_bits)) { error_report_once("%s: detected IOVA overflow (iova=0x%" PRIx64 ")", __func__, iova); return -VTD_FR_ADDR_BEYOND_MGAW; @@ -733,7 +967,7 @@ static int vtd_iova_to_slpte(VTDContextEntry *ce, uint64_t iova, bool is_write, if (slpte == (uint64_t)-1) { error_report_once("%s: detected read error on DMAR slpte " "(iova=0x%" PRIx64 ")", __func__, iova); - if (level == vtd_ce_get_level(ce)) { + if (level == vtd_get_iova_level(s, ce)) { /* Invalid programming of context-entry */ return -VTD_FR_CONTEXT_ENTRY_INV; } else { @@ -962,29 +1196,96 @@ next: /** * vtd_page_walk - walk specific IOVA range, and call the hook * + * @s: intel iommu state * @ce: context entry to walk upon * @start: IOVA address to start the walk * @end: IOVA range end address (start <= addr < end) * @info: page walking information struct */ -static int vtd_page_walk(VTDContextEntry *ce, uint64_t start, uint64_t end, +static int vtd_page_walk(IntelIOMMUState *s, VTDContextEntry *ce, + uint64_t start, uint64_t end, vtd_page_walk_info *info) { - dma_addr_t addr = vtd_ce_get_slpt_base(ce); - uint32_t level = vtd_ce_get_level(ce); + dma_addr_t addr = vtd_get_iova_pgtbl_base(s, ce); + uint32_t level = vtd_get_iova_level(s, ce); - if (!vtd_iova_range_check(start, ce, info->aw)) { + if (!vtd_iova_range_check(s, start, ce, info->aw)) { return -VTD_FR_ADDR_BEYOND_MGAW; } - if (!vtd_iova_range_check(end, ce, info->aw)) { + if (!vtd_iova_range_check(s, end, ce, info->aw)) { /* Fix end so that it reaches the maximum */ - end = vtd_iova_limit(ce, info->aw); + end = vtd_iova_limit(s, ce, info->aw); } return vtd_page_walk_level(addr, start, end, level, true, true, info); } +static int vtd_root_entry_rsvd_bits_check(IntelIOMMUState *s, + VTDRootEntry *re) +{ + /* Legacy Mode reserved bits check */ + if (!s->root_scalable && + (re->hi || (re->lo & VTD_ROOT_ENTRY_RSVD(s->aw_bits)))) + goto rsvd_err; + + /* Scalable Mode reserved bits check */ + if (s->root_scalable && + ((re->lo & VTD_ROOT_ENTRY_RSVD(s->aw_bits)) || + (re->hi & VTD_ROOT_ENTRY_RSVD(s->aw_bits)))) + goto rsvd_err; + + return 0; + +rsvd_err: + error_report_once("%s: invalid root entry: hi=0x%"PRIx64 + ", lo=0x%"PRIx64, + __func__, re->hi, re->lo); + return -VTD_FR_ROOT_ENTRY_RSVD; +} + +static inline int vtd_context_entry_rsvd_bits_check(IntelIOMMUState *s, + VTDContextEntry *ce) +{ + if (!s->root_scalable && + (ce->hi & VTD_CONTEXT_ENTRY_RSVD_HI || + ce->lo & VTD_CONTEXT_ENTRY_RSVD_LO(s->aw_bits))) { + error_report_once("%s: invalid context entry: hi=%"PRIx64 + ", lo=%"PRIx64" (reserved nonzero)", + __func__, ce->hi, ce->lo); + return -VTD_FR_CONTEXT_ENTRY_RSVD; + } + + if (s->root_scalable && + (ce->val[0] & VTD_SM_CONTEXT_ENTRY_RSVD_VAL0(s->aw_bits) || + ce->val[1] & VTD_SM_CONTEXT_ENTRY_RSVD_VAL1 || + ce->val[2] || + ce->val[3])) { + error_report_once("%s: invalid context entry: val[3]=%"PRIx64 + ", val[2]=%"PRIx64 + ", val[1]=%"PRIx64 + ", val[0]=%"PRIx64" (reserved nonzero)", + __func__, ce->val[3], ce->val[2], + ce->val[1], ce->val[0]); + return -VTD_FR_CONTEXT_ENTRY_RSVD; + } + + return 0; +} + +static int vtd_ce_rid2pasid_check(IntelIOMMUState *s, + VTDContextEntry *ce) +{ + VTDPASIDEntry pe; + + /* + * Make sure in Scalable Mode, a present context entry + * has valid rid2pasid setting, which includes valid + * rid2pasid field and corresponding pasid entry setting + */ + return vtd_ce_get_rid2pasid_entry(s, ce, &pe); +} + /* Map a device to its corresponding domain (context-entry) */ static int vtd_dev_to_context_entry(IntelIOMMUState *s, uint8_t bus_num, uint8_t devfn, VTDContextEntry *ce) @@ -998,20 +1299,18 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s, uint8_t bus_num, return ret_fr; } - if (!vtd_root_entry_present(&re)) { + if (!vtd_root_entry_present(s, &re, devfn)) { /* Not error - it's okay we don't have root entry. */ trace_vtd_re_not_present(bus_num); return -VTD_FR_ROOT_ENTRY_P; } - if (re.rsvd || (re.val & VTD_ROOT_ENTRY_RSVD(s->aw_bits))) { - error_report_once("%s: invalid root entry: rsvd=0x%"PRIx64 - ", val=0x%"PRIx64" (reserved nonzero)", - __func__, re.rsvd, re.val); - return -VTD_FR_ROOT_ENTRY_RSVD; + ret_fr = vtd_root_entry_rsvd_bits_check(s, &re); + if (ret_fr) { + return ret_fr; } - ret_fr = vtd_get_context_entry_from_root(&re, devfn, ce); + ret_fr = vtd_get_context_entry_from_root(s, &re, devfn, ce); if (ret_fr) { return ret_fr; } @@ -1022,26 +1321,38 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s, uint8_t bus_num, return -VTD_FR_CONTEXT_ENTRY_P; } - if ((ce->hi & VTD_CONTEXT_ENTRY_RSVD_HI) || - (ce->lo & VTD_CONTEXT_ENTRY_RSVD_LO(s->aw_bits))) { - error_report_once("%s: invalid context entry: hi=%"PRIx64 - ", lo=%"PRIx64" (reserved nonzero)", - __func__, ce->hi, ce->lo); - return -VTD_FR_CONTEXT_ENTRY_RSVD; + ret_fr = vtd_context_entry_rsvd_bits_check(s, ce); + if (ret_fr) { + return ret_fr; } /* Check if the programming of context-entry is valid */ - if (!vtd_is_level_supported(s, vtd_ce_get_level(ce))) { + if (!s->root_scalable && + !vtd_is_level_supported(s, vtd_ce_get_level(ce))) { error_report_once("%s: invalid context entry: hi=%"PRIx64 ", lo=%"PRIx64" (level %d not supported)", - __func__, ce->hi, ce->lo, vtd_ce_get_level(ce)); + __func__, ce->hi, ce->lo, + vtd_ce_get_level(ce)); return -VTD_FR_CONTEXT_ENTRY_INV; } - /* Do translation type check */ - if (!vtd_ce_type_check(x86_iommu, ce)) { - /* Errors dumped in vtd_ce_type_check() */ - return -VTD_FR_CONTEXT_ENTRY_INV; + if (!s->root_scalable) { + /* Do translation type check */ + if (!vtd_ce_type_check(x86_iommu, ce)) { + /* Errors dumped in vtd_ce_type_check() */ + return -VTD_FR_CONTEXT_ENTRY_INV; + } + } else { + /* + * Check if the programming of context-entry.rid2pasid + * and corresponding pasid setting is valid, and thus + * avoids to check pasid entry fetching result in future + * helper function calling. + */ + ret_fr = vtd_ce_rid2pasid_check(s, ce); + if (ret_fr) { + return ret_fr; + } } return 0; @@ -1054,6 +1365,19 @@ static int vtd_sync_shadow_page_hook(IOMMUTLBEntry *entry, return 0; } +static uint16_t vtd_get_domain_id(IntelIOMMUState *s, + VTDContextEntry *ce) +{ + VTDPASIDEntry pe; + + if (s->root_scalable) { + vtd_ce_get_rid2pasid_entry(s, ce, &pe); + return VTD_SM_PASID_ENTRY_DID(pe.val[1]); + } + + return VTD_CONTEXT_ENTRY_DID(ce->hi); +} + static int vtd_sync_shadow_page_table_range(VTDAddressSpace *vtd_as, VTDContextEntry *ce, hwaddr addr, hwaddr size) @@ -1065,10 +1389,10 @@ static int vtd_sync_shadow_page_table_range(VTDAddressSpace *vtd_as, .notify_unmap = true, .aw = s->aw_bits, .as = vtd_as, - .domain_id = VTD_CONTEXT_ENTRY_DID(ce->hi), + .domain_id = vtd_get_domain_id(s, ce), }; - return vtd_page_walk(ce, addr, addr + size, &info); + return vtd_page_walk(s, ce, addr, addr + size, &info); } static int vtd_sync_shadow_page_table(VTDAddressSpace *vtd_as) @@ -1103,35 +1427,24 @@ static int vtd_sync_shadow_page_table(VTDAddressSpace *vtd_as) } /* - * Fetch translation type for specific device. Returns <0 if error - * happens, otherwise return the shifted type to check against - * VTD_CONTEXT_TT_*. + * Check if specific device is configed to bypass address + * translation for DMA requests. In Scalable Mode, bypass + * 1st-level translation or 2nd-level translation, it depends + * on PGTT setting. */ -static int vtd_dev_get_trans_type(VTDAddressSpace *as) +static bool vtd_dev_pt_enabled(VTDAddressSpace *as) { IntelIOMMUState *s; VTDContextEntry ce; + VTDPASIDEntry pe; int ret; - s = as->iommu_state; + assert(as); + s = as->iommu_state; ret = vtd_dev_to_context_entry(s, pci_bus_num(as->bus), as->devfn, &ce); if (ret) { - return ret; - } - - return vtd_ce_get_type(&ce); -} - -static bool vtd_dev_pt_enabled(VTDAddressSpace *as) -{ - int ret; - - assert(as); - - ret = vtd_dev_get_trans_type(as); - if (ret < 0) { /* * Possibly failed to parse the context entry for some reason * (e.g., during init, or any guest configuration errors on @@ -1141,7 +1454,17 @@ static bool vtd_dev_pt_enabled(VTDAddressSpace *as) return false; } - return ret == VTD_CONTEXT_TT_PASS_THROUGH; + if (s->root_scalable) { + ret = vtd_ce_get_rid2pasid_entry(s, &ce, &pe); + if (ret) { + error_report_once("%s: vtd_ce_get_rid2pasid_entry error: %"PRId32, + __func__, ret); + return false; + } + return (VTD_PE_GET_TYPE(&pe) == VTD_SM_PASID_ENTRY_PT); + } + + return (vtd_ce_get_type(&ce) == VTD_CONTEXT_TT_PASS_THROUGH); } /* Return whether the device is using IOMMU translation. */ @@ -1171,11 +1494,11 @@ static bool vtd_switch_address_space(VTDAddressSpace *as) /* Turn off first then on the other */ if (use_iommu) { - memory_region_set_enabled(&as->sys_alias, false); + memory_region_set_enabled(&as->nodmar, false); memory_region_set_enabled(MEMORY_REGION(&as->iommu), true); } else { memory_region_set_enabled(MEMORY_REGION(&as->iommu), false); - memory_region_set_enabled(&as->sys_alias, true); + memory_region_set_enabled(&as->nodmar, true); } if (take_bql) { @@ -1221,6 +1544,7 @@ static const bool vtd_qualified_faults[] = { [VTD_FR_ROOT_ENTRY_RSVD] = false, [VTD_FR_PAGING_ENTRY_RSVD] = true, [VTD_FR_CONTEXT_ENTRY_TT] = true, + [VTD_FR_PASID_TABLE_INV] = false, [VTD_FR_RESERVED_ERR] = false, [VTD_FR_MAX] = false, }; @@ -1322,18 +1646,17 @@ static bool vtd_do_iommu_translate(VTDAddressSpace *vtd_as, PCIBus *bus, cc_entry->context_cache_gen); ce = cc_entry->context_entry; is_fpd_set = ce.lo & VTD_CONTEXT_ENTRY_FPD; + if (!is_fpd_set && s->root_scalable) { + ret_fr = vtd_ce_get_pasid_fpd(s, &ce, &is_fpd_set); + VTD_PE_GET_FPD_ERR(ret_fr, is_fpd_set, s, source_id, addr, is_write); + } } else { ret_fr = vtd_dev_to_context_entry(s, bus_num, devfn, &ce); is_fpd_set = ce.lo & VTD_CONTEXT_ENTRY_FPD; - if (ret_fr) { - ret_fr = -ret_fr; - if (is_fpd_set && vtd_is_qualified_fault(ret_fr)) { - trace_vtd_fault_disabled(); - } else { - vtd_report_dmar_fault(s, source_id, addr, ret_fr, is_write); - } - goto error; + if (!ret_fr && !is_fpd_set && s->root_scalable) { + ret_fr = vtd_ce_get_pasid_fpd(s, &ce, &is_fpd_set); } + VTD_PE_GET_FPD_ERR(ret_fr, is_fpd_set, s, source_id, addr, is_write); /* Update context-cache */ trace_vtd_iotlb_cc_update(bus_num, devfn, ce.hi, ce.lo, cc_entry->context_cache_gen, @@ -1367,21 +1690,13 @@ static bool vtd_do_iommu_translate(VTDAddressSpace *vtd_as, PCIBus *bus, return true; } - ret_fr = vtd_iova_to_slpte(&ce, addr, is_write, &slpte, &level, + ret_fr = vtd_iova_to_slpte(s, &ce, addr, is_write, &slpte, &level, &reads, &writes, s->aw_bits); - if (ret_fr) { - ret_fr = -ret_fr; - if (is_fpd_set && vtd_is_qualified_fault(ret_fr)) { - trace_vtd_fault_disabled(); - } else { - vtd_report_dmar_fault(s, source_id, addr, ret_fr, is_write); - } - goto error; - } + VTD_PE_GET_FPD_ERR(ret_fr, is_fpd_set, s, source_id, addr, is_write); page_mask = vtd_slpt_level_page_mask(level); access_flags = IOMMU_ACCESS_FLAG(reads, writes); - vtd_update_iotlb(s, source_id, VTD_CONTEXT_ENTRY_DID(ce.hi), addr, slpte, + vtd_update_iotlb(s, source_id, vtd_get_domain_id(s, &ce), addr, slpte, access_flags, level); out: vtd_iommu_unlock(s); @@ -1403,10 +1718,11 @@ error: static void vtd_root_table_setup(IntelIOMMUState *s) { s->root = vtd_get_quad_raw(s, DMAR_RTADDR_REG); - s->root_extended = s->root & VTD_RTADDR_RTT; s->root &= VTD_RTADDR_ADDR_MASK(s->aw_bits); - trace_vtd_reg_dmar_root(s->root, s->root_extended); + vtd_update_scalable_state(s); + + trace_vtd_reg_dmar_root(s->root, s->root_scalable); } static void vtd_iec_notify_all(IntelIOMMUState *s, bool global, @@ -1573,7 +1889,7 @@ static void vtd_iotlb_domain_invalidate(IntelIOMMUState *s, uint16_t domain_id) QLIST_FOREACH(vtd_as, &s->vtd_as_with_notifiers, next) { if (!vtd_dev_to_context_entry(s, pci_bus_num(vtd_as->bus), vtd_as->devfn, &ce) && - domain_id == VTD_CONTEXT_ENTRY_DID(ce.hi)) { + domain_id == vtd_get_domain_id(s, &ce)) { vtd_sync_shadow_page_table(vtd_as); } } @@ -1591,7 +1907,7 @@ static void vtd_iotlb_page_invalidate_notify(IntelIOMMUState *s, QLIST_FOREACH(vtd_as, &(s->vtd_as_with_notifiers), next) { ret = vtd_dev_to_context_entry(s, pci_bus_num(vtd_as->bus), vtd_as->devfn, &ce); - if (!ret && domain_id == VTD_CONTEXT_ENTRY_DID(ce.hi)) { + if (!ret && domain_id == vtd_get_domain_id(s, &ce)) { if (vtd_as_has_map_notifier(vtd_as)) { /* * As long as we have MAP notifications registered in @@ -1699,7 +2015,7 @@ static void vtd_handle_gcmd_qie(IntelIOMMUState *s, bool en) if (en) { s->iq = iqa_val & VTD_IQA_IQA_MASK(s->aw_bits); /* 2^(x+8) entries */ - s->iq_size = 1UL << ((iqa_val & VTD_IQA_QS) + 8); + s->iq_size = 1UL << ((iqa_val & VTD_IQA_QS) + 8 - (s->iq_dw ? 1 : 0)); s->qi_enabled = true; trace_vtd_inv_qi_setup(s->iq, s->iq_size); /* Ok - report back to driver */ @@ -1866,19 +2182,24 @@ static void vtd_handle_iotlb_write(IntelIOMMUState *s) } /* Fetch an Invalidation Descriptor from the Invalidation Queue */ -static bool vtd_get_inv_desc(dma_addr_t base_addr, uint32_t offset, +static bool vtd_get_inv_desc(IntelIOMMUState *s, VTDInvDesc *inv_desc) { - dma_addr_t addr = base_addr + offset * sizeof(*inv_desc); - if (dma_memory_read(&address_space_memory, addr, inv_desc, - sizeof(*inv_desc))) { - error_report_once("Read INV DESC failed"); - inv_desc->lo = 0; - inv_desc->hi = 0; + dma_addr_t base_addr = s->iq; + uint32_t offset = s->iq_head; + uint32_t dw = s->iq_dw ? 32 : 16; + dma_addr_t addr = base_addr + offset * dw; + + if (dma_memory_read(&address_space_memory, addr, inv_desc, dw)) { + error_report_once("Read INV DESC failed."); return false; } inv_desc->lo = le64_to_cpu(inv_desc->lo); inv_desc->hi = le64_to_cpu(inv_desc->hi); + if (dw == 32) { + inv_desc->val[2] = le64_to_cpu(inv_desc->val[2]); + inv_desc->val[3] = le64_to_cpu(inv_desc->val[3]); + } return true; } @@ -2084,10 +2405,11 @@ static bool vtd_process_inv_desc(IntelIOMMUState *s) uint8_t desc_type; trace_vtd_inv_qi_head(s->iq_head); - if (!vtd_get_inv_desc(s->iq, s->iq_head, &inv_desc)) { + if (!vtd_get_inv_desc(s, &inv_desc)) { s->iq_last_desc_type = VTD_INV_DESC_NONE; return false; } + desc_type = inv_desc.lo & VTD_INV_DESC_TYPE; /* FIXME: should update at first or at last? */ s->iq_last_desc_type = desc_type; @@ -2107,6 +2429,17 @@ static bool vtd_process_inv_desc(IntelIOMMUState *s) } break; + /* + * TODO: the entity of below two cases will be implemented in future series. + * To make guest (which integrates scalable mode support patch set in + * iommu driver) work, just return true is enough so far. + */ + case VTD_INV_DESC_PC: + break; + + case VTD_INV_DESC_PIOTLB: + break; + case VTD_INV_DESC_WAIT: trace_vtd_inv_desc("wait", inv_desc.hi, inv_desc.lo); if (!vtd_process_wait_desc(s, &inv_desc)) { @@ -2172,7 +2505,12 @@ static void vtd_handle_iqt_write(IntelIOMMUState *s) { uint64_t val = vtd_get_quad_raw(s, DMAR_IQT_REG); - s->iq_tail = VTD_IQT_QT(val); + if (s->iq_dw && (val & VTD_IQT_QT_256_RSV_BIT)) { + error_report_once("%s: RSV bit is set: val=0x%"PRIx64, + __func__, val); + return; + } + s->iq_tail = VTD_IQT_QT(s->iq_dw, val); trace_vtd_inv_qi_tail(s->iq_tail); if (s->qi_enabled && !(vtd_get_long_raw(s, DMAR_FSTS_REG) & VTD_FSTS_IQE)) { @@ -2441,6 +2779,12 @@ static void vtd_mem_write(void *opaque, hwaddr addr, } else { vtd_set_quad(s, addr, val); } + if (s->ecap & VTD_ECAP_SMTS && + val & VTD_IQA_DW_MASK) { + s->iq_dw = true; + } else { + s->iq_dw = false; + } break; case DMAR_IQA_REG_HI: @@ -2582,7 +2926,7 @@ static void vtd_iommu_notify_flag_changed(IOMMUMemoryRegion *iommu, IntelIOMMUState *s = vtd_as->iommu_state; if (!s->caching_mode && new & IOMMU_NOTIFIER_MAP) { - error_report("We need to set caching-mode=1 for intel-iommu to enable " + error_report("We need to set caching-mode=on for intel-iommu to enable " "device assignment with IOMMU protection."); exit(1); } @@ -2608,6 +2952,15 @@ static int vtd_post_load(void *opaque, int version_id) */ vtd_switch_address_space_all(iommu); + /* + * We don't need to migrate the root_scalable because we can + * simply do the calculation after the loading is complete. We + * can actually do similar things with root, dmar_enabled, etc. + * however since we've had them already so we'd better keep them + * for compatibility of migration. + */ + vtd_update_scalable_state(iommu); + return 0; } @@ -2628,7 +2981,7 @@ static const VMStateDescription vtd_vmstate = { VMSTATE_UINT16(next_frcd_reg, IntelIOMMUState), VMSTATE_UINT8_ARRAY(csr, IntelIOMMUState, DMAR_REG_SIZE), VMSTATE_UINT8(iq_last_desc_type, IntelIOMMUState), - VMSTATE_BOOL(root_extended, IntelIOMMUState), + VMSTATE_UNUSED(1), /* bool root_extended is obsolete by VT-d */ VMSTATE_BOOL(dmar_enabled, IntelIOMMUState), VMSTATE_BOOL(qi_enabled, IntelIOMMUState), VMSTATE_BOOL(intr_enabled, IntelIOMMUState), @@ -2659,6 +3012,7 @@ static Property vtd_properties[] = { DEFINE_PROP_UINT8("aw-bits", IntelIOMMUState, aw_bits, VTD_HOST_ADDRESS_WIDTH), DEFINE_PROP_BOOL("caching-mode", IntelIOMMUState, caching_mode, FALSE), + DEFINE_PROP_BOOL("x-scalable-mode", IntelIOMMUState, scalable_mode, FALSE), DEFINE_PROP_BOOL("dma-drain", IntelIOMMUState, dma_drain, true), DEFINE_PROP_END_OF_LIST(), }; @@ -2947,7 +3301,8 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn) vtd_dev_as = vtd_bus->dev_as[devfn]; if (!vtd_dev_as) { - snprintf(name, sizeof(name), "intel_iommu_devfn_%d", devfn); + snprintf(name, sizeof(name), "vtd-%02x.%x", PCI_SLOT(devfn), + PCI_FUNC(devfn)); vtd_bus->dev_as[devfn] = vtd_dev_as = g_malloc0(sizeof(VTDAddressSpace)); vtd_dev_as->bus = bus; @@ -2956,44 +3311,53 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, int devfn) vtd_dev_as->context_cache_entry.context_cache_gen = 0; vtd_dev_as->iova_tree = iova_tree_new(); + memory_region_init(&vtd_dev_as->root, OBJECT(s), name, UINT64_MAX); + address_space_init(&vtd_dev_as->as, &vtd_dev_as->root, "vtd-root"); + /* - * Memory region relationships looks like (Address range shows - * only lower 32 bits to make it short in length...): - * - * |-----------------+-------------------+----------| - * | Name | Address range | Priority | - * |-----------------+-------------------+----------+ - * | vtd_root | 00000000-ffffffff | 0 | - * | intel_iommu | 00000000-ffffffff | 1 | - * | vtd_sys_alias | 00000000-ffffffff | 1 | - * | intel_iommu_ir | fee00000-feefffff | 64 | - * |-----------------+-------------------+----------| + * Build the DMAR-disabled container with aliases to the + * shared MRs. Note that aliasing to a shared memory region + * could help the memory API to detect same FlatViews so we + * can have devices to share the same FlatView when DMAR is + * disabled (either by not providing "intel_iommu=on" or with + * "iommu=pt"). It will greatly reduce the total number of + * FlatViews of the system hence VM runs faster. + */ + memory_region_init_alias(&vtd_dev_as->nodmar, OBJECT(s), + "vtd-nodmar", &s->mr_nodmar, 0, + memory_region_size(&s->mr_nodmar)); + + /* + * Build the per-device DMAR-enabled container. * - * We enable/disable DMAR by switching enablement for - * vtd_sys_alias and intel_iommu regions. IR region is always - * enabled. + * TODO: currently we have per-device IOMMU memory region only + * because we have per-device IOMMU notifiers for devices. If + * one day we can abstract the IOMMU notifiers out of the + * memory regions then we can also share the same memory + * region here just like what we've done above with the nodmar + * region. */ + strcat(name, "-dmar"); memory_region_init_iommu(&vtd_dev_as->iommu, sizeof(vtd_dev_as->iommu), TYPE_INTEL_IOMMU_MEMORY_REGION, OBJECT(s), - "intel_iommu_dmar", - UINT64_MAX); - memory_region_init_alias(&vtd_dev_as->sys_alias, OBJECT(s), - "vtd_sys_alias", get_system_memory(), - 0, memory_region_size(get_system_memory())); - memory_region_init_io(&vtd_dev_as->iommu_ir, OBJECT(s), - &vtd_mem_ir_ops, s, "intel_iommu_ir", - VTD_INTERRUPT_ADDR_SIZE); - memory_region_init(&vtd_dev_as->root, OBJECT(s), - "vtd_root", UINT64_MAX); - memory_region_add_subregion_overlap(&vtd_dev_as->root, + name, UINT64_MAX); + memory_region_init_alias(&vtd_dev_as->iommu_ir, OBJECT(s), "vtd-ir", + &s->mr_ir, 0, memory_region_size(&s->mr_ir)); + memory_region_add_subregion_overlap(MEMORY_REGION(&vtd_dev_as->iommu), VTD_INTERRUPT_ADDR_FIRST, - &vtd_dev_as->iommu_ir, 64); - address_space_init(&vtd_dev_as->as, &vtd_dev_as->root, name); - memory_region_add_subregion_overlap(&vtd_dev_as->root, 0, - &vtd_dev_as->sys_alias, 1); + &vtd_dev_as->iommu_ir, 1); + + /* + * Hook both the containers under the root container, we + * switch between DMAR & noDMAR by enable/disable + * corresponding sub-containers + */ memory_region_add_subregion_overlap(&vtd_dev_as->root, 0, MEMORY_REGION(&vtd_dev_as->iommu), - 1); + 0); + memory_region_add_subregion_overlap(&vtd_dev_as->root, 0, + &vtd_dev_as->nodmar, 0); + vtd_switch_address_space(vtd_dev_as); } return vtd_dev_as; @@ -3098,9 +3462,11 @@ static void vtd_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n) vtd_address_space_unmap(vtd_as, n); if (vtd_dev_to_context_entry(s, bus_n, vtd_as->devfn, &ce) == 0) { - trace_vtd_replay_ce_valid(bus_n, PCI_SLOT(vtd_as->devfn), + trace_vtd_replay_ce_valid(s->root_scalable ? "scalable mode" : + "legacy mode", + bus_n, PCI_SLOT(vtd_as->devfn), PCI_FUNC(vtd_as->devfn), - VTD_CONTEXT_ENTRY_DID(ce.hi), + vtd_get_domain_id(s, &ce), ce.hi, ce.lo); if (vtd_as_has_map_notifier(vtd_as)) { /* This is required only for MAP typed notifiers */ @@ -3110,10 +3476,10 @@ static void vtd_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n) .notify_unmap = false, .aw = s->aw_bits, .as = vtd_as, - .domain_id = VTD_CONTEXT_ENTRY_DID(ce.hi), + .domain_id = vtd_get_domain_id(s, &ce), }; - vtd_page_walk(&ce, 0, ~0ULL, &info); + vtd_page_walk(s, &ce, 0, ~0ULL, &info); } } else { trace_vtd_replay_ce_invalid(bus_n, PCI_SLOT(vtd_as->devfn), @@ -3136,7 +3502,7 @@ static void vtd_init(IntelIOMMUState *s) memset(s->womask, 0, DMAR_REG_SIZE); s->root = 0; - s->root_extended = false; + s->root_scalable = false; s->dmar_enabled = false; s->intr_enabled = false; s->iq_head = 0; @@ -3145,6 +3511,7 @@ static void vtd_init(IntelIOMMUState *s) s->iq_size = 0; s->qi_enabled = false; s->iq_last_desc_type = VTD_INV_DESC_NONE; + s->iq_dw = false; s->next_frcd_reg = 0; s->cap = VTD_CAP_FRO | VTD_CAP_NFR | VTD_CAP_ND | VTD_CAP_MAMV | VTD_CAP_PSI | VTD_CAP_SLLPS | @@ -3190,6 +3557,11 @@ static void vtd_init(IntelIOMMUState *s) s->cap |= VTD_CAP_CM; } + /* TODO: read cap/ecap from host to decide which cap to be exposed. */ + if (s->scalable_mode) { + s->ecap |= VTD_ECAP_SMTS | VTD_ECAP_SRS | VTD_ECAP_SLTS; + } + vtd_reset_caches(s); /* Define registers with default values and bit semantics */ @@ -3199,7 +3571,7 @@ static void vtd_init(IntelIOMMUState *s) vtd_define_long(s, DMAR_GCMD_REG, 0, 0xff800000UL, 0); vtd_define_long_wo(s, DMAR_GCMD_REG, 0xff800000UL); vtd_define_long(s, DMAR_GSTS_REG, 0, 0, 0); - vtd_define_quad(s, DMAR_RTADDR_REG, 0, 0xfffffffffffff000ULL, 0); + vtd_define_quad(s, DMAR_RTADDR_REG, 0, 0xfffffffffffffc00ULL, 0); vtd_define_quad(s, DMAR_CCMD_REG, 0, 0xe0000003ffffffffULL, 0); vtd_define_quad_wo(s, DMAR_CCMD_REG, 0x3ffff0000ULL); @@ -3222,7 +3594,7 @@ static void vtd_init(IntelIOMMUState *s) vtd_define_quad(s, DMAR_IQH_REG, 0, 0, 0); vtd_define_quad(s, DMAR_IQT_REG, 0, 0x7fff0ULL, 0); - vtd_define_quad(s, DMAR_IQA_REG, 0, 0xfffffffffffff007ULL, 0); + vtd_define_quad(s, DMAR_IQA_REG, 0, 0xfffffffffffff807ULL, 0); vtd_define_long(s, DMAR_ICS_REG, 0, 0, 0x1UL); vtd_define_long(s, DMAR_IECTL_REG, 0x80000000UL, 0x80000000UL, 0); vtd_define_long(s, DMAR_IEDATA_REG, 0, 0xffffffffUL, 0); @@ -3301,6 +3673,11 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp) return false; } + if (s->scalable_mode && !s->dma_drain) { + error_setg(errp, "Need to set dma_drain for scalable mode"); + return false; + } + return true; } @@ -3323,6 +3700,21 @@ static void vtd_realize(DeviceState *dev, Error **errp) memset(s->vtd_as_by_bus_num, 0, sizeof(s->vtd_as_by_bus_num)); memory_region_init_io(&s->csrmem, OBJECT(s), &vtd_mem_ops, s, "intel_iommu", DMAR_REG_SIZE); + + /* Create the shared memory regions by all devices */ + memory_region_init(&s->mr_nodmar, OBJECT(s), "vtd-nodmar", + UINT64_MAX); + memory_region_init_io(&s->mr_ir, OBJECT(s), &vtd_mem_ir_ops, + s, "vtd-ir", VTD_INTERRUPT_ADDR_SIZE); + memory_region_init_alias(&s->mr_sys_alias, OBJECT(s), + "vtd-sys-alias", get_system_memory(), 0, + memory_region_size(get_system_memory())); + memory_region_add_subregion_overlap(&s->mr_nodmar, 0, + &s->mr_sys_alias, 0); + memory_region_add_subregion_overlap(&s->mr_nodmar, + VTD_INTERRUPT_ADDR_FIRST, + &s->mr_ir, 1); + sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->csrmem); /* No corresponding destroy */ s->iotlb = g_hash_table_new_full(vtd_uint64_hash, vtd_uint64_equal, @@ -3349,6 +3741,8 @@ static void vtd_class_init(ObjectClass *klass, void *data) x86_class->int_remap = vtd_int_remap; /* Supported by the pc-q35-* machine types */ dc->user_creatable = true; + set_bit(DEVICE_CATEGORY_MISC, dc->categories); + dc->desc = "Intel IOMMU (VT-d) DMA Remapping device"; } static const TypeInfo vtd_info = { diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index 00e9edbc66..c1235a7063 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -171,7 +171,7 @@ #define VTD_CCMD_FM(val) (((val) >> 32) & 3ULL) /* RTADDR_REG */ -#define VTD_RTADDR_RTT (1ULL << 11) +#define VTD_RTADDR_SMT (1ULL << 10) #define VTD_RTADDR_ADDR_MASK(aw) (VTD_HAW_MASK(aw) ^ 0xfffULL) /* IRTA_REG */ @@ -189,6 +189,9 @@ #define VTD_ECAP_EIM (1ULL << 4) #define VTD_ECAP_PT (1ULL << 6) #define VTD_ECAP_MHMV (15ULL << 20) +#define VTD_ECAP_SRS (1ULL << 31) +#define VTD_ECAP_SMTS (1ULL << 43) +#define VTD_ECAP_SLTS (1ULL << 46) /* CAP_REG */ /* (offset >> 4) << 24 */ @@ -217,11 +220,14 @@ #define VTD_CAP_SAGAW_48bit (0x4ULL << VTD_CAP_SAGAW_SHIFT) /* IQT_REG */ -#define VTD_IQT_QT(val) (((val) >> 4) & 0x7fffULL) +#define VTD_IQT_QT(dw_bit, val) (dw_bit ? (((val) >> 5) & 0x3fffULL) : \ + (((val) >> 4) & 0x7fffULL)) +#define VTD_IQT_QT_256_RSV_BIT 0x10 /* IQA_REG */ #define VTD_IQA_IQA_MASK(aw) (VTD_HAW_MASK(aw) ^ 0xfffULL) #define VTD_IQA_QS 0x7ULL +#define VTD_IQA_DW_MASK 0x800 /* IQH_REG */ #define VTD_IQH_QH_SHIFT 4 @@ -294,6 +300,8 @@ typedef enum VTDFaultReason { * request while disabled */ VTD_FR_IR_SID_ERR = 0x26, /* Invalid Source-ID */ + VTD_FR_PASID_TABLE_INV = 0x58, /*Invalid PASID table entry */ + /* This is not a normal fault reason. We use this to indicate some faults * that are not referenced by the VT-d specification. * Fault event with such reason should not be recorded. @@ -321,6 +329,9 @@ union VTDInvDesc { uint64_t lo; uint64_t hi; }; + struct { + uint64_t val[4]; + }; union { VTDInvDescIEC iec; }; @@ -335,6 +346,8 @@ typedef union VTDInvDesc VTDInvDesc; #define VTD_INV_DESC_IEC 0x4 /* Interrupt Entry Cache Invalidate Descriptor */ #define VTD_INV_DESC_WAIT 0x5 /* Invalidation Wait Descriptor */ +#define VTD_INV_DESC_PIOTLB 0x6 /* PASID-IOTLB Invalidate Desc */ +#define VTD_INV_DESC_PC 0x7 /* PASID-cache Invalidate Desc */ #define VTD_INV_DESC_NONE 0 /* Not an Invalidate Descriptor */ /* Masks for Invalidation Wait Descriptor*/ @@ -411,8 +424,8 @@ typedef struct VTDIOTLBPageInvInfo VTDIOTLBPageInvInfo; #define VTD_PAGE_MASK_1G (~((1ULL << VTD_PAGE_SHIFT_1G) - 1)) struct VTDRootEntry { - uint64_t val; - uint64_t rsvd; + uint64_t lo; + uint64_t hi; }; typedef struct VTDRootEntry VTDRootEntry; @@ -423,6 +436,8 @@ typedef struct VTDRootEntry VTDRootEntry; #define VTD_ROOT_ENTRY_NR (VTD_PAGE_SIZE / sizeof(VTDRootEntry)) #define VTD_ROOT_ENTRY_RSVD(aw) (0xffeULL | ~VTD_HAW_MASK(aw)) +#define VTD_DEVFN_CHECK_MASK 0x80 + /* Masks for struct VTDContextEntry */ /* lo */ #define VTD_CONTEXT_ENTRY_P (1ULL << 0) @@ -441,6 +456,38 @@ typedef struct VTDRootEntry VTDRootEntry; #define VTD_CONTEXT_ENTRY_NR (VTD_PAGE_SIZE / sizeof(VTDContextEntry)) +#define VTD_CTX_ENTRY_LEGACY_SIZE 16 +#define VTD_CTX_ENTRY_SCALABLE_SIZE 32 + +#define VTD_SM_CONTEXT_ENTRY_RID2PASID_MASK 0xfffff +#define VTD_SM_CONTEXT_ENTRY_RSVD_VAL0(aw) (0x1e0ULL | ~VTD_HAW_MASK(aw)) +#define VTD_SM_CONTEXT_ENTRY_RSVD_VAL1 0xffffffffffe00000ULL + +/* PASID Table Related Definitions */ +#define VTD_PASID_DIR_BASE_ADDR_MASK (~0xfffULL) +#define VTD_PASID_TABLE_BASE_ADDR_MASK (~0xfffULL) +#define VTD_PASID_DIR_ENTRY_SIZE 8 +#define VTD_PASID_ENTRY_SIZE 64 +#define VTD_PASID_DIR_BITS_MASK (0x3fffULL) +#define VTD_PASID_DIR_INDEX(pasid) (((pasid) >> 6) & VTD_PASID_DIR_BITS_MASK) +#define VTD_PASID_DIR_FPD (1ULL << 1) /* Fault Processing Disable */ +#define VTD_PASID_TABLE_BITS_MASK (0x3fULL) +#define VTD_PASID_TABLE_INDEX(pasid) ((pasid) & VTD_PASID_TABLE_BITS_MASK) +#define VTD_PASID_ENTRY_FPD (1ULL << 1) /* Fault Processing Disable */ + +/* PASID Granular Translation Type Mask */ +#define VTD_SM_PASID_ENTRY_PGTT (7ULL << 6) +#define VTD_SM_PASID_ENTRY_FLT (1ULL << 6) +#define VTD_SM_PASID_ENTRY_SLT (2ULL << 6) +#define VTD_SM_PASID_ENTRY_NESTED (3ULL << 6) +#define VTD_SM_PASID_ENTRY_PT (4ULL << 6) + +#define VTD_SM_PASID_ENTRY_AW 7ULL /* Adjusted guest-address-width */ +#define VTD_SM_PASID_ENTRY_DID(val) ((val) & VTD_DOMAIN_ID_MASK) + +/* Second Level Page Translation Pointer*/ +#define VTD_SM_PASID_ENTRY_SLPTPTR (~0xfffULL) + /* Paging Structure common */ #define VTD_SL_PT_PAGE_SIZE_MASK (1ULL << 7) /* Bits to decide the offset for each level */ diff --git a/hw/i386/pc.c b/hw/i386/pc.c index d71dc28ef6..d98b737b8f 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -115,6 +115,9 @@ struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX}; /* Physical Address of PVH entry point read from kernel ELF NOTE */ static size_t pvh_start_addr; +GlobalProperty pc_compat_4_0[] = {}; +const size_t pc_compat_4_0_len = G_N_ELEMENTS(pc_compat_4_0); + GlobalProperty pc_compat_3_1[] = { { "intel-iommu", "dma-drain", "off" }, { "Opteron_G3" "-" TYPE_X86_CPU, "rdtscp", "off" }, @@ -2075,8 +2078,10 @@ static void pc_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, { const PCMachineState *pcms = PC_MACHINE(hotplug_dev); const PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); + const MachineState *ms = MACHINE(hotplug_dev); const bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); const uint64_t legacy_align = TARGET_PAGE_SIZE; + Error *local_err = NULL; /* * When -no-acpi is used with Q35 machine type, no ACPI is built, @@ -2089,11 +2094,17 @@ static void pc_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, return; } - if (is_nvdimm && !pcms->acpi_nvdimm_state.is_enabled) { + if (is_nvdimm && !ms->nvdimms_state->is_enabled) { error_setg(errp, "nvdimm is not enabled: missing 'nvdimm' in '-M'"); return; } + hotplug_handler_pre_plug(pcms->acpi_dev, dev, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), pcmc->enforce_aligned_dimm ? NULL : &legacy_align, errp); } @@ -2103,6 +2114,7 @@ static void pc_memory_plug(HotplugHandler *hotplug_dev, { Error *local_err = NULL; PCMachineState *pcms = PC_MACHINE(hotplug_dev); + MachineState *ms = MACHINE(hotplug_dev); bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); pc_dimm_plug(PC_DIMM(dev), MACHINE(pcms), &local_err); @@ -2111,7 +2123,7 @@ static void pc_memory_plug(HotplugHandler *hotplug_dev, } if (is_nvdimm) { - nvdimm_plug(&pcms->acpi_nvdimm_state); + nvdimm_plug(ms->nvdimms_state); } hotplug_handler_plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &error_abort); @@ -2552,47 +2564,6 @@ static void pc_machine_set_smm(Object *obj, Visitor *v, const char *name, visit_type_OnOffAuto(v, name, &pcms->smm, errp); } -static bool pc_machine_get_nvdimm(Object *obj, Error **errp) -{ - PCMachineState *pcms = PC_MACHINE(obj); - - return pcms->acpi_nvdimm_state.is_enabled; -} - -static void pc_machine_set_nvdimm(Object *obj, bool value, Error **errp) -{ - PCMachineState *pcms = PC_MACHINE(obj); - - pcms->acpi_nvdimm_state.is_enabled = value; -} - -static char *pc_machine_get_nvdimm_persistence(Object *obj, Error **errp) -{ - PCMachineState *pcms = PC_MACHINE(obj); - - return g_strdup(pcms->acpi_nvdimm_state.persistence_string); -} - -static void pc_machine_set_nvdimm_persistence(Object *obj, const char *value, - Error **errp) -{ - PCMachineState *pcms = PC_MACHINE(obj); - AcpiNVDIMMState *nvdimm_state = &pcms->acpi_nvdimm_state; - - if (strcmp(value, "cpu") == 0) - nvdimm_state->persistence = 3; - else if (strcmp(value, "mem-ctrl") == 0) - nvdimm_state->persistence = 2; - else { - error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", - value); - return; - } - - g_free(nvdimm_state->persistence_string); - nvdimm_state->persistence_string = g_strdup(value); -} - static bool pc_machine_get_smbus(Object *obj, Error **errp) { PCMachineState *pcms = PC_MACHINE(obj); @@ -2642,8 +2613,6 @@ static void pc_machine_initfn(Object *obj) pcms->max_ram_below_4g = 0; /* use default */ pcms->smm = ON_OFF_AUTO_AUTO; pcms->vmport = ON_OFF_AUTO_AUTO; - /* nvdimm is disabled on default. */ - pcms->acpi_nvdimm_state.is_enabled = false; /* acpi build is enabled by default if machine supports it */ pcms->acpi_build_enabled = PC_MACHINE_GET_CLASS(pcms)->has_acpi_build; pcms->smbus_enabled = true; @@ -2782,6 +2751,7 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) hc->unplug = pc_machine_device_unplug_cb; nc->nmi_monitor_handler = x86_nmi; mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; + mc->nvdimm_supported = true; object_class_property_add(oc, PC_MACHINE_DEVMEM_REGION_SIZE, "int", pc_machine_get_device_memory_region_size, NULL, @@ -2806,13 +2776,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) object_class_property_set_description(oc, PC_MACHINE_VMPORT, "Enable vmport (pc & q35)", &error_abort); - object_class_property_add_bool(oc, PC_MACHINE_NVDIMM, - pc_machine_get_nvdimm, pc_machine_set_nvdimm, &error_abort); - - object_class_property_add_str(oc, PC_MACHINE_NVDIMM_PERSIST, - pc_machine_get_nvdimm_persistence, - pc_machine_set_nvdimm_persistence, &error_abort); - object_class_property_add_bool(oc, PC_MACHINE_SMBUS, pc_machine_get_smbus, pc_machine_set_smbus, &error_abort); diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 8770ecada9..c07c4a5b38 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -297,8 +297,8 @@ static void pc_init1(MachineState *machine, PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); } - if (pcms->acpi_nvdimm_state.is_enabled) { - nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io, + if (machine->nvdimms_state->is_enabled) { + nvdimm_init_acpi_state(machine->nvdimms_state, system_io, pcms->fw_cfg, OBJECT(pcms)); } } @@ -428,13 +428,25 @@ static void pc_i440fx_machine_options(MachineClass *m) machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); } -static void pc_i440fx_4_0_machine_options(MachineClass *m) +static void pc_i440fx_4_1_machine_options(MachineClass *m) { pc_i440fx_machine_options(m); m->alias = "pc"; m->is_default = 1; } +DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL, + pc_i440fx_4_1_machine_options); + +static void pc_i440fx_4_0_machine_options(MachineClass *m) +{ + pc_i440fx_4_1_machine_options(m); + m->alias = NULL; + m->is_default = 0; + compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len); + compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len); +} + DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL, pc_i440fx_4_0_machine_options); @@ -911,6 +923,7 @@ static void isa_bridge_class_init(ObjectClass *klass, void *data) PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); dc->desc = "ISA bridge faked to support IGD PT"; + set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); k->vendor_id = PCI_VENDOR_ID_INTEL; k->class_id = PCI_CLASS_BRIDGE_ISA; }; diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index cfb9043e12..37dd350511 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -329,8 +329,8 @@ static void pc_q35_init(MachineState *machine) pc_vga_init(isa_bus, host_bus); pc_nic_init(pcmc, isa_bus, host_bus); - if (pcms->acpi_nvdimm_state.is_enabled) { - nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io, + if (machine->nvdimms_state->is_enabled) { + nvdimm_init_acpi_state(machine->nvdimms_state, system_io, pcms->fw_cfg, OBJECT(pcms)); } } @@ -365,12 +365,23 @@ static void pc_q35_machine_options(MachineClass *m) m->max_cpus = 288; } -static void pc_q35_4_0_machine_options(MachineClass *m) +static void pc_q35_4_1_machine_options(MachineClass *m) { pc_q35_machine_options(m); m->alias = "q35"; } +DEFINE_Q35_MACHINE(v4_1, "pc-q35-4.1", NULL, + pc_q35_4_1_machine_options); + +static void pc_q35_4_0_machine_options(MachineClass *m) +{ + pc_q35_4_1_machine_options(m); + m->alias = NULL; + compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len); + compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len); +} + DEFINE_Q35_MACHINE(v4_0, "pc-q35-4.0", NULL, pc_q35_4_0_machine_options); diff --git a/hw/i386/trace-events b/hw/i386/trace-events index 77244fc384..c8bc464bc5 100644 --- a/hw/i386/trace-events +++ b/hw/i386/trace-events @@ -1,9 +1,9 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/i386/x86-iommu.c +# x86-iommu.c x86_iommu_iec_notify(bool global, uint32_t index, uint32_t mask) "Notify IEC invalidation: global=%d index=%" PRIu32 " mask=%" PRIu32 -# hw/i386/intel_iommu.c +# intel_iommu.c vtd_inv_desc(const char *type, uint64_t hi, uint64_t lo) "invalidate desc type %s high 0x%"PRIx64" low 0x%"PRIx64 vtd_inv_desc_cc_domain(uint16_t domain) "context invalidate domain 0x%"PRIx16 vtd_inv_desc_cc_global(void) "context invalidate globally" @@ -30,7 +30,7 @@ vtd_iotlb_cc_hit(uint8_t bus, uint8_t devfn, uint64_t high, uint64_t low, uint32 vtd_iotlb_cc_update(uint8_t bus, uint8_t devfn, uint64_t high, uint64_t low, uint32_t gen1, uint32_t gen2) "IOTLB context update bus 0x%"PRIx8" devfn 0x%"PRIx8" high 0x%"PRIx64" low 0x%"PRIx64" gen %"PRIu32" -> gen %"PRIu32 vtd_iotlb_reset(const char *reason) "IOTLB reset (reason: %s)" vtd_fault_disabled(void) "Fault processing disabled for context entry" -vtd_replay_ce_valid(uint8_t bus, uint8_t dev, uint8_t fn, uint16_t domain, uint64_t hi, uint64_t lo) "replay valid context device %02"PRIx8":%02"PRIx8".%02"PRIx8" domain 0x%"PRIx16" hi 0x%"PRIx64" lo 0x%"PRIx64 +vtd_replay_ce_valid(const char *mode, uint8_t bus, uint8_t dev, uint8_t fn, uint16_t domain, uint64_t hi, uint64_t lo) "%s: replay valid context device %02"PRIx8":%02"PRIx8".%02"PRIx8" domain 0x%"PRIx16" hi 0x%"PRIx64" lo 0x%"PRIx64 vtd_replay_ce_invalid(uint8_t bus, uint8_t dev, uint8_t fn) "replay invalid context device %02"PRIx8":%02"PRIx8".%02"PRIx8 vtd_page_walk_level(uint64_t addr, uint32_t level, uint64_t start, uint64_t end) "walk (base=0x%"PRIx64", level=%"PRIu32") iova range 0x%"PRIx64" - 0x%"PRIx64 vtd_page_walk_one(uint16_t domain, uint64_t iova, uint64_t gpa, uint64_t mask, int perm) "domain 0x%"PRIu16" iova 0x%"PRIx64" -> gpa 0x%"PRIx64" mask 0x%"PRIx64" perm %d" @@ -45,7 +45,7 @@ vtd_pt_enable_fast_path(uint16_t sid, bool success) "sid 0x%"PRIu16" %d" vtd_irq_generate(uint64_t addr, uint64_t data) "addr 0x%"PRIx64" data 0x%"PRIx64 vtd_reg_read(uint64_t addr, uint64_t size) "addr 0x%"PRIx64" size 0x%"PRIx64 vtd_reg_write(uint64_t addr, uint64_t size, uint64_t val) "addr 0x%"PRIx64" size 0x%"PRIx64" value 0x%"PRIx64 -vtd_reg_dmar_root(uint64_t addr, bool extended) "addr 0x%"PRIx64" extended %d" +vtd_reg_dmar_root(uint64_t addr, bool scalable) "addr 0x%"PRIx64" scalable %d" vtd_reg_ir_root(uint64_t addr, uint32_t size) "addr 0x%"PRIx64" size 0x%"PRIx32 vtd_reg_write_gcmd(uint32_t status, uint32_t val) "status 0x%"PRIx32" value 0x%"PRIx32 vtd_reg_write_fectl(uint32_t value) "value 0x%"PRIx32 @@ -67,7 +67,7 @@ vtd_warn_invalid_qi_tail(uint16_t tail) "tail 0x%"PRIx16 vtd_warn_ir_vector(uint16_t sid, int index, int vec, int target) "sid 0x%"PRIx16" index %d vec %d (should be: %d)" vtd_warn_ir_trigger(uint16_t sid, int index, int trig, int target) "sid 0x%"PRIx16" index %d trigger %d (should be: %d)" -# hw/i386/amd_iommu.c +# amd_iommu.c amdvi_evntlog_fail(uint64_t addr, uint32_t head) "error: fail to write at addr 0x%"PRIx64" + offset 0x%"PRIx32 amdvi_cache_update(uint16_t domid, uint8_t bus, uint8_t slot, uint8_t func, uint64_t gpa, uint64_t txaddr) " update iotlb domid 0x%"PRIx16" devid: %02x:%02x.%x gpa 0x%"PRIx64" hpa 0x%"PRIx64 amdvi_completion_wait_fail(uint64_t addr) "error: fail to write at address 0x%"PRIx64 @@ -106,10 +106,8 @@ amdvi_ir_err(const char *str) "%s" amdvi_ir_intctl(uint8_t val) "int_ctl 0x%"PRIx8 amdvi_ir_target_abort(const char *str) "%s" amdvi_ir_delivery_mode(const char *str) "%s" -amdvi_ir_generate_msi_message(uint8_t vector, uint8_t delivery_mode, uint8_t dest_mode, uint8_t dest, uint8_t rh) "vector %d delivery-mode %d dest-mode %d dest-id %d rh %d" -amdvi_ir_irte_ga(uint64_t addr, uint64_t data) "addr 0x%"PRIx64" offset 0x%"PRIx64 amdvi_ir_irte_ga_val(uint64_t hi, uint64_t lo) "hi 0x%"PRIx64" lo 0x%"PRIx64 -# hw/i386/vmport.c +# vmport.c vmport_register(unsigned char command, void *func, void *opaque) "command: 0x%02x func: %p opaque: %p" vmport_command(unsigned char command) "command: 0x%02x" diff --git a/hw/i386/xen/trace-events b/hw/i386/xen/trace-events index 8a9077cd4e..ca3a4948ba 100644 --- a/hw/i386/xen/trace-events +++ b/hw/i386/xen/trace-events @@ -1,7 +1,9 @@ -# hw/i386/xen/xen_platform.c +# See docs/devel/tracing.txt for syntax documentation. + +# xen_platform.c xen_platform_log(char *s) "xen platform: %s" -# hw/i386/xen/xen_pvdevice.c +# xen_pvdevice.c xen_pv_mmio_read(uint64_t addr) "WARNING: read from Xen PV Device MMIO space (address 0x%"PRIx64")" xen_pv_mmio_write(uint64_t addr) "WARNING: write to Xen PV Device MMIO space (address 0x%"PRIx64")" diff --git a/hw/i386/xen/xen-mapcache.c b/hw/i386/xen/xen-mapcache.c index 349f72d00c..254759f776 100644 --- a/hw/i386/xen/xen-mapcache.c +++ b/hw/i386/xen/xen-mapcache.c @@ -184,9 +184,14 @@ static void xen_remap_bucket(MapCacheEntry *entry, pfns[i] = (address_index << (MCACHE_BUCKET_SHIFT-XC_PAGE_SHIFT)) + i; } + /* + * If the caller has requested the mapping at a specific address use + * MAP_FIXED to make sure it's honored. + */ if (!dummy) { vaddr_base = xenforeignmemory_map2(xen_fmem, xen_domid, vaddr, - PROT_READ | PROT_WRITE, 0, + PROT_READ | PROT_WRITE, + vaddr ? MAP_FIXED : 0, nb_pfn, pfns, err); if (vaddr_base == NULL) { perror("xenforeignmemory_map2"); @@ -198,7 +203,8 @@ static void xen_remap_bucket(MapCacheEntry *entry, * mapping immediately due to certain circumstances (i.e. on resume now) */ vaddr_base = mmap(vaddr, size, PROT_READ | PROT_WRITE, - MAP_ANON | MAP_SHARED, -1, 0); + MAP_ANON | MAP_SHARED | (vaddr ? MAP_FIXED : 0), + -1, 0); if (vaddr_base == MAP_FAILED) { perror("mmap"); exit(-1); diff --git a/hw/ide/trace-events b/hw/ide/trace-events index 65d6f9034d..2e4162629f 100644 --- a/hw/ide/trace-events +++ b/hw/ide/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/ide/core.c +# core.c # portio ide_ioport_read(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus %p IDEState %p" ide_ioport_write(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus %p IDEState %p" @@ -23,30 +23,30 @@ ide_dma_cb(void *s, int64_t sector_num, int n, const char *dma) "IDEState %p; se # BMDMA HBAs: -# hw/ide/cmd646.c +# cmd646.c bmdma_read_cmd646(uint64_t addr, uint32_t val) "bmdma: readb 0x%"PRIx64" : 0x%02x" bmdma_write_cmd646(uint64_t addr, uint64_t val) "bmdma: writeb 0x%"PRIx64" : 0x%02"PRIx64 -# hw/ide/pci.c +# pci.c bmdma_reset(void) "" bmdma_cmd_writeb(uint32_t val) "val: 0x%08x" bmdma_addr_read(uint64_t data) "data: 0x%016"PRIx64 bmdma_addr_write(uint64_t data) "data: 0x%016"PRIx64 -# hw/ide/piix.c +# piix.c bmdma_read(uint64_t addr, uint8_t val) "bmdma: readb 0x%"PRIx64" : 0x%02x" bmdma_write(uint64_t addr, uint64_t val) "bmdma: writeb 0x%"PRIx64" : 0x%02"PRIx64 -# hw/ide/sii3112.c +# sii3112.c sii3112_read(int size, uint64_t addr, uint64_t val) "bmdma: read (size %d) 0x%"PRIx64" : 0x%02"PRIx64 sii3112_write(int size, uint64_t addr, uint64_t val) "bmdma: write (size %d) 0x%"PRIx64" : 0x%02"PRIx64 sii3112_set_irq(int channel, int level) "channel %d level %d" -# hw/ide/via.c +# via.c bmdma_read_via(uint64_t addr, uint32_t val) "bmdma: readb 0x%"PRIx64" : 0x%02x" bmdma_write_via(uint64_t addr, uint64_t val) "bmdma: writeb 0x%"PRIx64" : 0x%02"PRIx64 -# hw/ide/atapi.c +# atapi.c cd_read_sector_sync(int lba) "lba=%d" cd_read_sector_cb(int lba, int ret) "lba=%d ret=%d" cd_read_sector(int lba) "lba=%d" @@ -62,7 +62,7 @@ ide_atapi_cmd_read_dma_cb_aio(void *s, int lba, int n) "IDEState: %p; aio read: # Warning: Verbose ide_atapi_cmd_packet(void *s, uint16_t limit, const char *packet) "IDEState: %p; limit=0x%x packet: %s" -# hw/ide/ahci.c +# ahci.c ahci_port_read(void *s, int port, const char *reg, int offset, uint32_t ret) "ahci(%p)[%d]: port read [reg:%s] @ 0x%x: 0x%08x" ahci_port_read_default(void *s, int port, const char *reg, int offset) "ahci(%p)[%d]: unimplemented port read [reg:%s] @ 0x%x" ahci_irq_raise(void *s) "ahci(%p): raise irq" @@ -91,7 +91,6 @@ ahci_populate_sglist_short_map(void *s, int port) "ahci(%p)[%d]: mapped less tha ahci_populate_sglist_bad_offset(void *s, int port, int off_idx, int64_t off_pos) "ahci(%p)[%d]: Incorrect offset! off_idx: %d, off_pos: %"PRId64 ncq_finish(void *s, int port, uint8_t tag) "ahci(%p)[%d][tag:%d]: NCQ transfer finished" execute_ncq_command_read(void *s, int port, uint8_t tag, int count, int64_t lba) "ahci(%p)[%d][tag:%d]: NCQ reading %d sectors from LBA %"PRId64 -execute_ncq_command_write(void *s, int port, uint8_t tag, int count, int64_t lba) "ahci(%p)[%d][tag:%d]: NCQ writing %d sectors to LBA %"PRId64 execute_ncq_command_unsup(void *s, int port, uint8_t tag, uint8_t cmd) "ahci(%p)[%d][tag:%d]: error: unsupported NCQ command (0x%02x) received" process_ncq_command_mismatch(void *s, int port, uint8_t tag, uint8_t slot) "ahci(%p)[%d][tag:%d]: Warning: NCQ slot (%d) did not match the given tag" process_ncq_command_aux(void *s, int port, uint8_t tag) "ahci(%p)[%d][tag:%d]: Warn: Attempt to use NCQ auxiliary fields" @@ -115,9 +114,11 @@ ahci_dma_prepare_buf_fail(void *s, int port) "ahci(%p)[%d]: sglist population fa ahci_dma_rw_buf(void *s, int port, int l) "ahci(%p)[%d] len=0x%x" ahci_cmd_done(void *s, int port) "ahci(%p)[%d]: cmd done" ahci_reset(void *s) "ahci(%p): HBA reset" -allwinner_ahci_mem_read(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) "ahci(%p): read a=%p addr=0x%"PRIx64" val=0x%"PRIx64", size=%d" -allwinner_ahci_mem_write(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) "ahci(%p): write a=%p addr=0x%"PRIx64" val=0x%"PRIx64", size=%d" # Warning: Verbose handle_reg_h2d_fis_dump(void *s, int port, const char *fis) "ahci(%p)[%d]: %s" handle_cmd_fis_dump(void *s, int port, const char *fis) "ahci(%p)[%d]: %s" + +# ahci-allwinner.c +allwinner_ahci_mem_read(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) "ahci(%p): read a=%p addr=0x%"PRIx64" val=0x%"PRIx64", size=%d" +allwinner_ahci_mem_write(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) "ahci(%p): write a=%p addr=0x%"PRIx64" val=0x%"PRIx64", size=%d" diff --git a/hw/input/stellaris_input.c b/hw/input/stellaris_input.c index 99168bfeef..20c87d86f4 100644 --- a/hw/input/stellaris_input.c +++ b/hw/input/stellaris_input.c @@ -8,7 +8,7 @@ */ #include "qemu/osdep.h" #include "hw/hw.h" -#include "hw/devices.h" +#include "hw/input/gamepad.h" #include "ui/console.h" typedef struct { diff --git a/hw/input/trace-events b/hw/input/trace-events index 8e53ae5bbf..cf072fa2f8 100644 --- a/hw/input/trace-events +++ b/hw/input/trace-events @@ -1,27 +1,27 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/input/adb-kbd.c +# adb-kbd.c adb_kbd_no_key(void) "Ignoring NO_KEY" adb_kbd_writereg(int reg, uint8_t val) "reg %d val 0x%2.2x" adb_kbd_readreg(int reg, uint8_t val0, uint8_t val1) "reg %d obuf[0] 0x%2.2x obuf[1] 0x%2.2x" adb_kbd_request_change_addr(int devaddr) "change addr to 0x%x" adb_kbd_request_change_addr_and_handler(int devaddr, int handler) "change addr and handler to 0x%x, 0x%x" -# hw/input/adb-mouse.c +# adb-mouse.c adb_mouse_flush(void) "flush" adb_mouse_writereg(int reg, uint8_t val) "reg %d val 0x%2.2x" adb_mouse_readreg(int reg, uint8_t val0, uint8_t val1) "reg %d obuf[0] 0x%2.2x obuf[1] 0x%2.2x" adb_mouse_request_change_addr(int devaddr) "change addr to 0x%x" adb_mouse_request_change_addr_and_handler(int devaddr, int handler) "change addr and handler to 0x%x, 0x%x" -# hw/input/pckbd.c +# pckbd.c pckbd_kbd_read_data(uint32_t val) "0x%02x" pckbd_kbd_read_status(int status) "0x%02x" pckbd_outport_write(uint32_t val) "0x%02x" pckbd_kbd_write_command(uint64_t val) "0x%02"PRIx64 pckbd_kbd_write_data(uint64_t val) "0x%02"PRIx64 -# hw/input/ps2.c +# ps2.c ps2_put_keycode(void *opaque, int keycode) "%p keycode 0x%02x" ps2_keyboard_event(void *opaque, int qcode, int down, unsigned int modifier, unsigned int modifiers) "%p qcode %d down %d modifier 0x%x modifiers 0x%x" ps2_read_data(void *opaque) "%p" @@ -37,19 +37,19 @@ ps2_mouse_reset(void *opaque) "%p" ps2_kbd_init(void *s) "%p" ps2_mouse_init(void *s) "%p" -# hw/input/milkymist-softusb.c +# milkymist-softusb.c milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_softusb_mevt(uint8_t m) "m %d" milkymist_softusb_kevt(uint8_t m) "m %d" milkymist_softusb_pulse_irq(void) "Pulse IRQ" -# hw/input/hid.c +# hid.c hid_kbd_queue_full(void) "queue full" hid_kbd_queue_empty(void) "queue empty" -# hw/input/tsc2005.c +# tsc2005.c tsc2005_sense(const char *state) "touchscreen sense %s" -# hw/input/virtio +# virtio-input.c virtio_input_queue_full(void) "queue full" diff --git a/hw/input/tsc2005.c b/hw/input/tsc2005.c index 2b9108a193..f82771e7a7 100644 --- a/hw/input/tsc2005.c +++ b/hw/input/tsc2005.c @@ -23,7 +23,7 @@ #include "hw/hw.h" #include "qemu/timer.h" #include "ui/console.h" -#include "hw/devices.h" +#include "hw/input/tsc2xxx.h" #include "trace.h" #define TSC_CUT_RESOLUTION(value, p) ((value) >> (16 - (p ? 12 : 10))) diff --git a/hw/input/tsc210x.c b/hw/input/tsc210x.c index 2eb3cb9518..f94cb4683b 100644 --- a/hw/input/tsc210x.c +++ b/hw/input/tsc210x.c @@ -24,8 +24,8 @@ #include "audio/audio.h" #include "qemu/timer.h" #include "ui/console.h" -#include "hw/arm/omap.h" /* For I2SCodec and uWireSlave */ -#include "hw/devices.h" +#include "hw/arm/omap.h" /* For I2SCodec */ +#include "hw/input/tsc2xxx.h" #define TSC_DATA_REGISTERS_PAGE 0x0 #define TSC_CONTROL_REGISTERS_PAGE 0x1 @@ -318,7 +318,7 @@ static void tsc2102_audio_output_update(TSC210xState *s) fmt.endianness = 0; fmt.nchannels = 2; fmt.freq = s->codec.tx_rate; - fmt.fmt = AUD_FMT_S16; + fmt.fmt = AUDIO_FORMAT_S16; s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0], "tsc2102.sink", s, (void *) tsc210x_audio_out_cb, &fmt); diff --git a/hw/intc/Kconfig b/hw/intc/Kconfig index de10a6bcbf..5347f8412c 100644 --- a/hw/intc/Kconfig +++ b/hw/intc/Kconfig @@ -12,12 +12,15 @@ config IOAPIC config ARM_GIC bool + select MSI_NONBROKEN config OPENPIC bool + select MSI_NONBROKEN config APIC bool + select MSI_NONBROKEN config ARM_GIC_KVM bool diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index ab822f4251..fff6e694e6 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -655,6 +655,102 @@ void armv7m_nvic_set_pending_derived(void *opaque, int irq, bool secure) do_armv7m_nvic_set_pending(opaque, irq, secure, true); } +void armv7m_nvic_set_pending_lazyfp(void *opaque, int irq, bool secure) +{ + /* + * Pend an exception during lazy FP stacking. This differs + * from the usual exception pending because the logic for + * whether we should escalate depends on the saved context + * in the FPCCR register, not on the current state of the CPU/NVIC. + */ + NVICState *s = (NVICState *)opaque; + bool banked = exc_is_banked(irq); + VecInfo *vec; + bool targets_secure; + bool escalate = false; + /* + * We will only look at bits in fpccr if this is a banked exception + * (in which case 'secure' tells us whether it is the S or NS version). + * All the bits for the non-banked exceptions are in fpccr_s. + */ + uint32_t fpccr_s = s->cpu->env.v7m.fpccr[M_REG_S]; + uint32_t fpccr = s->cpu->env.v7m.fpccr[secure]; + + assert(irq > ARMV7M_EXCP_RESET && irq < s->num_irq); + assert(!secure || banked); + + vec = (banked && secure) ? &s->sec_vectors[irq] : &s->vectors[irq]; + + targets_secure = banked ? secure : exc_targets_secure(s, irq); + + switch (irq) { + case ARMV7M_EXCP_DEBUG: + if (!(fpccr_s & R_V7M_FPCCR_MONRDY_MASK)) { + /* Ignore DebugMonitor exception */ + return; + } + break; + case ARMV7M_EXCP_MEM: + escalate = !(fpccr & R_V7M_FPCCR_MMRDY_MASK); + break; + case ARMV7M_EXCP_USAGE: + escalate = !(fpccr & R_V7M_FPCCR_UFRDY_MASK); + break; + case ARMV7M_EXCP_BUS: + escalate = !(fpccr_s & R_V7M_FPCCR_BFRDY_MASK); + break; + case ARMV7M_EXCP_SECURE: + escalate = !(fpccr_s & R_V7M_FPCCR_SFRDY_MASK); + break; + default: + g_assert_not_reached(); + } + + if (escalate) { + /* + * Escalate to HardFault: faults that initially targeted Secure + * continue to do so, even if HF normally targets NonSecure. + */ + irq = ARMV7M_EXCP_HARD; + if (arm_feature(&s->cpu->env, ARM_FEATURE_M_SECURITY) && + (targets_secure || + !(s->cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK))) { + vec = &s->sec_vectors[irq]; + } else { + vec = &s->vectors[irq]; + } + } + + if (!vec->enabled || + nvic_exec_prio(s) <= exc_group_prio(s, vec->prio, secure)) { + if (!(fpccr_s & R_V7M_FPCCR_HFRDY_MASK)) { + /* + * We want to escalate to HardFault but the context the + * FP state belongs to prevents the exception pre-empting. + */ + cpu_abort(&s->cpu->parent_obj, + "Lockup: can't escalate to HardFault during " + "lazy FP register stacking\n"); + } + } + + if (escalate) { + s->cpu->env.v7m.hfsr |= R_V7M_HFSR_FORCED_MASK; + } + if (!vec->pending) { + vec->pending = 1; + /* + * We do not call nvic_irq_update(), because we know our caller + * is going to handle causing us to take the exception by + * raising EXCP_LAZYFP, so raising the IRQ line would be + * pointless extra work. We just need to recompute the + * priorities so that armv7m_nvic_can_take_pending_exception() + * returns the right answer. + */ + nvic_recompute_state(s); + } +} + /* Make pending IRQ active. */ void armv7m_nvic_acknowledge_irq(void *opaque) { @@ -746,6 +842,40 @@ int armv7m_nvic_complete_irq(void *opaque, int irq, bool secure) return ret; } +bool armv7m_nvic_get_ready_status(void *opaque, int irq, bool secure) +{ + /* + * Return whether an exception is "ready", i.e. it is enabled and is + * configured at a priority which would allow it to interrupt the + * current execution priority. + * + * irq and secure have the same semantics as for armv7m_nvic_set_pending(): + * for non-banked exceptions secure is always false; for banked exceptions + * it indicates which of the exceptions is required. + */ + NVICState *s = (NVICState *)opaque; + bool banked = exc_is_banked(irq); + VecInfo *vec; + int running = nvic_exec_prio(s); + + assert(irq > ARMV7M_EXCP_RESET && irq < s->num_irq); + assert(!secure || banked); + + /* + * HardFault is an odd special case: we always check against -1, + * even if we're secure and HardFault has priority -3; we never + * need to check for enabled state. + */ + if (irq == ARMV7M_EXCP_HARD) { + return running > -1; + } + + vec = (banked && secure) ? &s->sec_vectors[irq] : &s->vectors[irq]; + + return vec->enabled && + exc_group_prio(s, vec->prio, secure) < running; +} + /* callback when external interrupt line is changed */ static void set_irq_level(void *opaque, int n, int level) { @@ -1077,6 +1207,16 @@ static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs) } case 0xd84: /* CSSELR */ return cpu->env.v7m.csselr[attrs.secure]; + case 0xd88: /* CPACR */ + if (!arm_feature(&cpu->env, ARM_FEATURE_VFP)) { + return 0; + } + return cpu->env.v7m.cpacr[attrs.secure]; + case 0xd8c: /* NSACR */ + if (!attrs.secure || !arm_feature(&cpu->env, ARM_FEATURE_VFP)) { + return 0; + } + return cpu->env.v7m.nsacr; /* TODO: Implement debug registers. */ case 0xd90: /* MPU_TYPE */ /* Unified MPU; if the MPU is not present this value is zero */ @@ -1222,6 +1362,49 @@ static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs) return 0; } return cpu->env.v7m.sfar; + case 0xf34: /* FPCCR */ + if (!arm_feature(&cpu->env, ARM_FEATURE_VFP)) { + return 0; + } + if (attrs.secure) { + return cpu->env.v7m.fpccr[M_REG_S]; + } else { + /* + * NS can read LSPEN, CLRONRET and MONRDY. It can read + * BFRDY and HFRDY if AIRCR.BFHFNMINS != 0; + * other non-banked bits RAZ. + * TODO: MONRDY should RAZ/WI if DEMCR.SDME is set. + */ + uint32_t value = cpu->env.v7m.fpccr[M_REG_S]; + uint32_t mask = R_V7M_FPCCR_LSPEN_MASK | + R_V7M_FPCCR_CLRONRET_MASK | + R_V7M_FPCCR_MONRDY_MASK; + + if (s->cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK) { + mask |= R_V7M_FPCCR_BFRDY_MASK | R_V7M_FPCCR_HFRDY_MASK; + } + + value &= mask; + + value |= cpu->env.v7m.fpccr[M_REG_NS]; + return value; + } + case 0xf38: /* FPCAR */ + if (!arm_feature(&cpu->env, ARM_FEATURE_VFP)) { + return 0; + } + return cpu->env.v7m.fpcar[attrs.secure]; + case 0xf3c: /* FPDSCR */ + if (!arm_feature(&cpu->env, ARM_FEATURE_VFP)) { + return 0; + } + return cpu->env.v7m.fpdscr[attrs.secure]; + case 0xf40: /* MVFR0 */ + return cpu->isar.mvfr0; + case 0xf44: /* MVFR1 */ + return cpu->isar.mvfr1; + case 0xf48: /* MVFR2 */ + return cpu->isar.mvfr2; default: bad_offset: qemu_log_mask(LOG_GUEST_ERROR, "NVIC: Bad read offset 0x%x\n", offset); @@ -1469,6 +1652,18 @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value, cpu->env.v7m.csselr[attrs.secure] = value & R_V7M_CSSELR_INDEX_MASK; } break; + case 0xd88: /* CPACR */ + if (arm_feature(&cpu->env, ARM_FEATURE_VFP)) { + /* We implement only the Floating Point extension's CP10/CP11 */ + cpu->env.v7m.cpacr[attrs.secure] = value & (0xf << 20); + } + break; + case 0xd8c: /* NSACR */ + if (attrs.secure && arm_feature(&cpu->env, ARM_FEATURE_VFP)) { + /* We implement only the Floating Point extension's CP10/CP11 */ + cpu->env.v7m.nsacr = value & (3 << 10); + } + break; case 0xd90: /* MPU_TYPE */ return; /* RO */ case 0xd94: /* MPU_CTRL */ @@ -1697,6 +1892,72 @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value, } break; } + case 0xf34: /* FPCCR */ + if (arm_feature(&cpu->env, ARM_FEATURE_VFP)) { + /* Not all bits here are banked. */ + uint32_t fpccr_s; + + if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) { + /* Don't allow setting of bits not present in v7M */ + value &= (R_V7M_FPCCR_LSPACT_MASK | + R_V7M_FPCCR_USER_MASK | + R_V7M_FPCCR_THREAD_MASK | + R_V7M_FPCCR_HFRDY_MASK | + R_V7M_FPCCR_MMRDY_MASK | + R_V7M_FPCCR_BFRDY_MASK | + R_V7M_FPCCR_MONRDY_MASK | + R_V7M_FPCCR_LSPEN_MASK | + R_V7M_FPCCR_ASPEN_MASK); + } + value &= ~R_V7M_FPCCR_RES0_MASK; + + if (!attrs.secure) { + /* Some non-banked bits are configurably writable by NS */ + fpccr_s = cpu->env.v7m.fpccr[M_REG_S]; + if (!(fpccr_s & R_V7M_FPCCR_LSPENS_MASK)) { + uint32_t lspen = FIELD_EX32(value, V7M_FPCCR, LSPEN); + fpccr_s = FIELD_DP32(fpccr_s, V7M_FPCCR, LSPEN, lspen); + } + if (!(fpccr_s & R_V7M_FPCCR_CLRONRETS_MASK)) { + uint32_t cor = FIELD_EX32(value, V7M_FPCCR, CLRONRET); + fpccr_s = FIELD_DP32(fpccr_s, V7M_FPCCR, CLRONRET, cor); + } + if ((s->cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK)) { + uint32_t hfrdy = FIELD_EX32(value, V7M_FPCCR, HFRDY); + uint32_t bfrdy = FIELD_EX32(value, V7M_FPCCR, BFRDY); + fpccr_s = FIELD_DP32(fpccr_s, V7M_FPCCR, HFRDY, hfrdy); + fpccr_s = FIELD_DP32(fpccr_s, V7M_FPCCR, BFRDY, bfrdy); + } + /* TODO MONRDY should RAZ/WI if DEMCR.SDME is set */ + { + uint32_t monrdy = FIELD_EX32(value, V7M_FPCCR, MONRDY); + fpccr_s = FIELD_DP32(fpccr_s, V7M_FPCCR, MONRDY, monrdy); + } + + /* + * All other non-banked bits are RAZ/WI from NS; write + * just the banked bits to fpccr[M_REG_NS]. + */ + value &= R_V7M_FPCCR_BANKED_MASK; + cpu->env.v7m.fpccr[M_REG_NS] = value; + } else { + fpccr_s = value; + } + cpu->env.v7m.fpccr[M_REG_S] = fpccr_s; + } + break; + case 0xf38: /* FPCAR */ + if (arm_feature(&cpu->env, ARM_FEATURE_VFP)) { + value &= ~7; + cpu->env.v7m.fpcar[attrs.secure] = value; + } + break; + case 0xf3c: /* FPDSCR */ + if (arm_feature(&cpu->env, ARM_FEATURE_VFP)) { + value &= 0x07c00000; + cpu->env.v7m.fpdscr[attrs.secure] = value; + } + break; case 0xf50: /* ICIALLU */ case 0xf58: /* ICIMVAU */ case 0xf5c: /* DCIMVAC */ diff --git a/hw/intc/bcm2836_control.c b/hw/intc/bcm2836_control.c index cfa5bc7365..421469f2ef 100644 --- a/hw/intc/bcm2836_control.c +++ b/hw/intc/bcm2836_control.c @@ -7,7 +7,9 @@ * This code is licensed under the GNU GPLv2 and later. * * At present, only implements interrupt routing, and mailboxes (i.e., - * not local timer, PMU interrupt, or AXI counters). + * not PMU interrupt, or AXI counters). + * + * ARM Local Timer IRQ Copyright (c) 2019. Zoltán Baldaszti * * Ref: * https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2836/QA7_rev3.4.pdf @@ -18,6 +20,9 @@ #include "qemu/log.h" #define REG_GPU_ROUTE 0x0c +#define REG_LOCALTIMERROUTING 0x24 +#define REG_LOCALTIMERCONTROL 0x34 +#define REG_LOCALTIMERACK 0x38 #define REG_TIMERCONTROL 0x40 #define REG_MBOXCONTROL 0x50 #define REG_IRQSRC 0x60 @@ -43,6 +48,13 @@ #define IRQ_TIMER 11 #define IRQ_MAX IRQ_TIMER +#define LOCALTIMER_FREQ 38400000 +#define LOCALTIMER_INTFLAG (1 << 31) +#define LOCALTIMER_RELOAD (1 << 30) +#define LOCALTIMER_INTENABLE (1 << 29) +#define LOCALTIMER_ENABLE (1 << 28) +#define LOCALTIMER_VALUE(x) ((x) & 0xfffffff) + static void deliver_local(BCM2836ControlState *s, uint8_t core, uint8_t irq, uint32_t controlreg, uint8_t controlidx) { @@ -78,6 +90,20 @@ static void bcm2836_control_update(BCM2836ControlState *s) s->fiqsrc[s->route_gpu_fiq] |= (uint32_t)1 << IRQ_GPU; } + /* + * handle the control module 'local timer' interrupt for one of the + * cores' IRQ/FIQ; this is distinct from the per-CPU timer + * interrupts handled below. + */ + if ((s->local_timer_control & LOCALTIMER_INTENABLE) && + (s->local_timer_control & LOCALTIMER_INTFLAG)) { + if (s->route_localtimer & 4) { + s->fiqsrc[(s->route_localtimer & 3)] |= (uint32_t)1 << IRQ_TIMER; + } else { + s->irqsrc[(s->route_localtimer & 3)] |= (uint32_t)1 << IRQ_TIMER; + } + } + for (i = 0; i < BCM2836_NCORES; i++) { /* handle local timer interrupts for this core */ if (s->timerirqs[i]) { @@ -162,6 +188,54 @@ static void bcm2836_control_set_gpu_fiq(void *opaque, int irq, int level) bcm2836_control_update(s); } +static void bcm2836_control_local_timer_set_next(void *opaque) +{ + BCM2836ControlState *s = opaque; + uint64_t next_event; + + assert(LOCALTIMER_VALUE(s->local_timer_control) > 0); + + next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + + muldiv64(LOCALTIMER_VALUE(s->local_timer_control), + NANOSECONDS_PER_SECOND, LOCALTIMER_FREQ); + timer_mod(&s->timer, next_event); +} + +static void bcm2836_control_local_timer_tick(void *opaque) +{ + BCM2836ControlState *s = opaque; + + bcm2836_control_local_timer_set_next(s); + + s->local_timer_control |= LOCALTIMER_INTFLAG; + bcm2836_control_update(s); +} + +static void bcm2836_control_local_timer_control(void *opaque, uint32_t val) +{ + BCM2836ControlState *s = opaque; + + s->local_timer_control = val; + if (val & LOCALTIMER_ENABLE) { + bcm2836_control_local_timer_set_next(s); + } else { + timer_del(&s->timer); + } +} + +static void bcm2836_control_local_timer_ack(void *opaque, uint32_t val) +{ + BCM2836ControlState *s = opaque; + + if (val & LOCALTIMER_INTFLAG) { + s->local_timer_control &= ~LOCALTIMER_INTFLAG; + } + if ((val & LOCALTIMER_RELOAD) && + (s->local_timer_control & LOCALTIMER_ENABLE)) { + bcm2836_control_local_timer_set_next(s); + } +} + static uint64_t bcm2836_control_read(void *opaque, hwaddr offset, unsigned size) { BCM2836ControlState *s = opaque; @@ -170,6 +244,12 @@ static uint64_t bcm2836_control_read(void *opaque, hwaddr offset, unsigned size) assert(s->route_gpu_fiq < BCM2836_NCORES && s->route_gpu_irq < BCM2836_NCORES); return ((uint32_t)s->route_gpu_fiq << 2) | s->route_gpu_irq; + } else if (offset == REG_LOCALTIMERROUTING) { + return s->route_localtimer; + } else if (offset == REG_LOCALTIMERCONTROL) { + return s->local_timer_control; + } else if (offset == REG_LOCALTIMERACK) { + return 0; } else if (offset >= REG_TIMERCONTROL && offset < REG_MBOXCONTROL) { return s->timercontrol[(offset - REG_TIMERCONTROL) >> 2]; } else if (offset >= REG_MBOXCONTROL && offset < REG_IRQSRC) { @@ -195,6 +275,12 @@ static void bcm2836_control_write(void *opaque, hwaddr offset, if (offset == REG_GPU_ROUTE) { s->route_gpu_irq = val & 0x3; s->route_gpu_fiq = (val >> 2) & 0x3; + } else if (offset == REG_LOCALTIMERROUTING) { + s->route_localtimer = val & 7; + } else if (offset == REG_LOCALTIMERCONTROL) { + bcm2836_control_local_timer_control(s, val); + } else if (offset == REG_LOCALTIMERACK) { + bcm2836_control_local_timer_ack(s, val); } else if (offset >= REG_TIMERCONTROL && offset < REG_MBOXCONTROL) { s->timercontrol[(offset - REG_TIMERCONTROL) >> 2] = val & 0xff; } else if (offset >= REG_MBOXCONTROL && offset < REG_IRQSRC) { @@ -227,6 +313,10 @@ static void bcm2836_control_reset(DeviceState *d) s->route_gpu_irq = s->route_gpu_fiq = 0; + timer_del(&s->timer); + s->route_localtimer = 0; + s->local_timer_control = 0; + for (i = 0; i < BCM2836_NCORES; i++) { s->timercontrol[i] = 0; s->mailboxcontrol[i] = 0; @@ -263,11 +353,15 @@ static void bcm2836_control_init(Object *obj) /* outputs to CPU cores */ qdev_init_gpio_out_named(dev, s->irq, "irq", BCM2836_NCORES); qdev_init_gpio_out_named(dev, s->fiq, "fiq", BCM2836_NCORES); + + /* create a qemu virtual timer */ + timer_init_ns(&s->timer, QEMU_CLOCK_VIRTUAL, + bcm2836_control_local_timer_tick, s); } static const VMStateDescription vmstate_bcm2836_control = { .name = TYPE_BCM2836_CONTROL, - .version_id = 1, + .version_id = 2, .minimum_version_id = 1, .fields = (VMStateField[]) { VMSTATE_UINT32_ARRAY(mailboxes, BCM2836ControlState, @@ -277,6 +371,9 @@ static const VMStateDescription vmstate_bcm2836_control = { VMSTATE_UINT32_ARRAY(timercontrol, BCM2836ControlState, BCM2836_NCORES), VMSTATE_UINT32_ARRAY(mailboxcontrol, BCM2836ControlState, BCM2836_NCORES), + VMSTATE_TIMER_V(timer, BCM2836ControlState, 2), + VMSTATE_UINT32_V(local_timer_control, BCM2836ControlState, 2), + VMSTATE_UINT8_V(route_localtimer, BCM2836ControlState, 2), VMSTATE_END_OF_LIST() } }; diff --git a/hw/intc/trace-events b/hw/intc/trace-events index 7769869a13..a28bdce925 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -1,13 +1,13 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/intc/i8259.c +# i8259.c pic_update_irq(bool master, uint8_t imr, uint8_t irr, uint8_t padd) "master %d imr %"PRIu8" irr %"PRIu8" padd %"PRIu8 pic_set_irq(bool master, int irq, int level) "master %d irq %d level %d" pic_interrupt(int irq, int intno) "irq %d intno %d" pic_ioport_write(bool master, uint64_t addr, uint64_t val) "master %d addr 0x%"PRIx64" val 0x%"PRIx64 pic_ioport_read(bool master, uint64_t addr, int val) "master %d addr 0x%"PRIx64" val 0x%x" -# hw/intc/apic_common.c +# apic_common.c cpu_set_apic_base(uint64_t val) "0x%016"PRIx64 cpu_get_apic_base(uint64_t val) "0x%016"PRIx64 # coalescing @@ -15,13 +15,13 @@ apic_report_irq_delivered(int apic_irq_delivered) "coalescing %d" apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d" apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d" -# hw/intc/apic.c +# apic.c apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d" apic_mem_readl(uint64_t addr, uint32_t val) "0x%"PRIx64" = 0x%08x" apic_mem_writel(uint64_t addr, uint32_t val) "0x%"PRIx64" = 0x%08x" -# hw/intc/ioapic.c +# ioapic.c ioapic_set_remote_irr(int n) "set remote irr for pin %d" ioapic_clear_remote_irr(int n, int vector) "clear remote irr for pin %d vector %d" ioapic_eoi_broadcast(int vector) "EOI broadcast for vector %d" @@ -29,7 +29,7 @@ ioapic_mem_read(uint8_t addr, uint8_t regsel, uint8_t size, uint32_t val) "ioapi ioapic_mem_write(uint8_t addr, uint8_t regsel, uint8_t size, uint32_t val) "ioapic mem write addr 0x%"PRIx8" regsel: 0x%"PRIx8" size 0x%"PRIx8" val 0x%"PRIx32 ioapic_set_irq(int vector, int level) "vector: %d level: %d" -# hw/intc/slavio_intctl.c +# slavio_intctl.c slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = 0x%x" slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = 0x%x" slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask 0x%x, curmask 0x%x" @@ -43,14 +43,14 @@ slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending 0x slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" -# hw/intc/grlib_irqmp.c +# grlib_irqmp.c grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x" grlib_irqmp_ack(int intno) "interrupt:%d" grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d" grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64 grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" -# hw/intc/lm32_pic.c +# lm32_pic.c lm32_pic_raise_irq(void) "Raise CPU interrupt" lm32_pic_lower_irq(void) "Lower CPU interrupt" lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d" @@ -59,7 +59,7 @@ lm32_pic_set_ip(uint32_t ip) "ip 0x%08x" lm32_pic_get_im(uint32_t im) "im 0x%08x" lm32_pic_get_ip(uint32_t ip) "ip 0x%08x" -# hw/intc/xics.c +# xics.c xics_icp_check_ipi(int server, uint8_t mfrr) "CPU %d can take IPI mfrr=0x%x" xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "icp_accept: XIRR 0x%"PRIx32"->0x%"PRIx32 xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) "icp_eoi: server %d given XIRR 0x%"PRIx32" new XIRR 0x%"PRIx32 @@ -72,23 +72,23 @@ xics_ics_simple_write_xive(int nr, int srcno, int server, uint8_t priority) "ics xics_ics_simple_reject(int nr, int srcno) "reject irq 0x%x [src %d]" xics_ics_simple_eoi(int nr) "ics_eoi: irq 0x%x" -# hw/intc/s390_flic_kvm.c +# s390_flic_kvm.c flic_create_device(int err) "flic: create device failed %d" flic_no_device_api(int err) "flic: no Device Contral API support %d" flic_reset_failed(int err) "flic: reset failed %d" -# hw/intc/s390_flic.c +# s390_flic.c qemu_s390_airq_suppressed(uint8_t type, uint8_t isc) "flic: adapter I/O interrupt suppressed (type 0x%x isc 0x%x)" qemu_s390_suppress_airq(uint8_t isc, const char *from, const char *to) "flic: for isc 0x%x, suppress airq by modifying ais mode from %s to %s" -# hw/intc/aspeed_vic.c +# aspeed_vic.c aspeed_vic_set_irq(int irq, int level) "Enabling IRQ %d: %d" aspeed_vic_update_fiq(int flags) "Raising FIQ: %d" aspeed_vic_update_irq(int flags) "Raising IRQ: %d" aspeed_vic_read(uint64_t offset, unsigned size, uint32_t value) "From 0x%" PRIx64 " of size %u: 0x%" PRIx32 aspeed_vic_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32 -# hw/intc/arm_gic.c +# arm_gic.c gic_enable_irq(int irq) "irq %d enabled" gic_disable_irq(int irq) "irq %d disabled" gic_set_irq(int irq, int level, int cpumask, int target) "irq %d level %d cpumask 0x%x target 0x%x" @@ -104,7 +104,7 @@ gic_dist_write(int addr, unsigned int size, uint32_t val) "dist write at 0x%08x gic_lr_entry(int cpu, int entry, uint32_t val) "cpu %d: new lr entry %d: 0x%08" PRIx32 gic_update_maintenance_irq(int cpu, int val) "cpu %d: maintenance = %d" -# hw/intc/arm_gicv3_cpuif.c +# arm_gicv3_cpuif.c gicv3_icc_pmr_read(uint32_t cpu, uint64_t val) "GICv3 ICC_PMR read cpu 0x%x value 0x%" PRIx64 gicv3_icc_pmr_write(uint32_t cpu, uint64_t val) "GICv3 ICC_PMR write cpu 0x%x value 0x%" PRIx64 gicv3_icc_bpr_read(int grp, uint32_t cpu, uint64_t val) "GICv3 ICC_BPR%d read cpu 0x%x value 0x%" PRIx64 @@ -163,14 +163,14 @@ gicv3_icv_eoir_write(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_EOIR%d writ gicv3_cpuif_virt_update(uint32_t cpuid, int idx) "GICv3 CPU i/f 0x%x virt HPPI update LR index %d" gicv3_cpuif_virt_set_irqs(uint32_t cpuid, int fiqlevel, int irqlevel, int maintlevel) "GICv3 CPU i/f 0x%x virt HPPI update: setting FIQ %d IRQ %d maintenance-irq %d" -# hw/intc/arm_gicv3_dist.c +# arm_gicv3_dist.c gicv3_dist_read(uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 distributor read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" gicv3_dist_badread(uint64_t offset, unsigned size, bool secure) "GICv3 distributor read: offset 0x%" PRIx64 " size %u secure %d: error" gicv3_dist_write(uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 distributor write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" gicv3_dist_badwrite(uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 distributor write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d: error" gicv3_dist_set_irq(int irq, int level) "GICv3 distributor interrupt %d level changed to %d" -# hw/intc/arm_gicv3_redist.c +# arm_gicv3_redist.c gicv3_redist_read(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 redistributor 0x%x read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" gicv3_redist_badread(uint32_t cpu, uint64_t offset, unsigned size, bool secure) "GICv3 redistributor 0x%x read: offset 0x%" PRIx64 " size %u secure %d: error" gicv3_redist_write(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 redistributor 0x%x write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" @@ -178,7 +178,7 @@ gicv3_redist_badwrite(uint32_t cpu, uint64_t offset, uint64_t data, unsigned siz gicv3_redist_set_irq(uint32_t cpu, int irq, int level) "GICv3 redistributor 0x%x interrupt %d level changed to %d" gicv3_redist_send_sgi(uint32_t cpu, int irq) "GICv3 redistributor 0x%x pending SGI %d" -# hw/intc/armv7m_nvic.c +# armv7m_nvic.c nvic_recompute_state(int vectpending, int vectpending_prio, int exception_prio) "NVIC state recomputed: vectpending %d vectpending_prio %d exception_prio %d" nvic_recompute_state_secure(int vectpending, bool vectpending_is_s_banked, int vectpending_prio, int exception_prio) "NVIC state recomputed: vectpending %d is_s_banked %d vectpending_prio %d exception_prio %d" nvic_set_prio(int irq, bool secure, uint8_t prio) "NVIC set irq %d secure-bank %d priority %d" @@ -187,7 +187,6 @@ nvic_escalate_prio(int irq, int irqprio, int runprio) "NVIC escalating irq %d to nvic_escalate_disabled(int irq) "NVIC escalating irq %d to HardFault: disabled" nvic_set_pending(int irq, bool secure, bool targets_secure, bool derived, int en, int prio) "NVIC set pending irq %d secure-bank %d targets_secure %d derived %d (enabled: %d priority %d)" nvic_clear_pending(int irq, bool secure, int en, int prio) "NVIC clear pending irq %d secure-bank %d (enabled: %d priority %d)" -nvic_set_pending_level(int irq) "NVIC set pending: irq %d higher prio than vectpending: setting irq line to 1" nvic_acknowledge_irq(int irq, int prio) "NVIC acknowledge IRQ: %d now active (prio %d)" nvic_get_pending_irq_info(int irq, bool secure) "NVIC next IRQ %d: targets_secure: %d" nvic_complete_irq(int irq, bool secure) "NVIC complete IRQ %d (secure %d)" @@ -196,7 +195,7 @@ nvic_set_nmi_level(int level) "NVIC external NMI level set to %d" nvic_sysreg_read(uint64_t addr, uint32_t value, unsigned size) "NVIC sysreg read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" nvic_sysreg_write(uint64_t addr, uint32_t value, unsigned size) "NVIC sysreg write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" -# hw/intc/heathrow_pic.c +# heathrow_pic.c heathrow_write(uint64_t addr, unsigned int n, uint64_t value) "0x%"PRIx64" %u: 0x%"PRIx64 heathrow_read(uint64_t addr, unsigned int n, uint64_t value) "0x%"PRIx64" %u: 0x%"PRIx64 heathrow_set_irq(int num, int level) "set_irq: num=0x%02x level=%d" diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index 607e1c167b..9d2b8adef7 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -95,8 +95,15 @@ static target_ulong h_eoi(PowerPCCPU *cpu, SpaprMachineState *spapr, static target_ulong h_ipoll(PowerPCCPU *cpu, SpaprMachineState *spapr, target_ulong opcode, target_ulong *args) { + ICPState *icp = xics_icp_get(XICS_FABRIC(spapr), args[0]); uint32_t mfrr; - uint32_t xirr = icp_ipoll(spapr_cpu_state(cpu)->icp, &mfrr); + uint32_t xirr; + + if (!icp) { + return H_PARAMETER; + } + + xirr = icp_ipoll(icp, &mfrr); args[0] = xirr; args[1] = mfrr; diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index 57e09a0cb8..6db0d7970c 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -11,6 +11,7 @@ config I82378 select I8254 select I82374 select MC146818RTC + select PCSPK config PC87312 bool @@ -29,6 +30,7 @@ config PIIX4 # For historical reasons, SuperIO devices are created in the board # for PIIX4. select ISA_BUS + select USB_UHCI config VT82C686 bool diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index e692b9fdc1..ac44aa53be 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -805,6 +805,7 @@ static void ich9_lpc_class_init(ObjectClass *klass, void *data) * pc_q35_init() */ dc->user_creatable = false; + hc->pre_plug = ich9_pm_device_pre_plug_cb; hc->plug = ich9_pm_device_plug_cb; hc->unplug_request = ich9_pm_device_unplug_request_cb; hc->unplug = ich9_pm_device_unplug_cb; diff --git a/hw/isa/trace-events b/hw/isa/trace-events index 80ac6175d6..202f8938e7 100644 --- a/hw/isa/trace-events +++ b/hw/isa/trace-events @@ -1,11 +1,11 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/isa/isa-superio.c +# isa-superio.c superio_create_parallel(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u" superio_create_serial(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u" superio_create_floppy(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u" superio_create_ide(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u" -# hw/isa/pc87312.c +# pc87312.c pc87312_io_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" pc87312_io_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x" diff --git a/hw/mem/trace-events b/hw/mem/trace-events index 0f2f278ff2..9f6b52acd7 100644 --- a/hw/mem/trace-events +++ b/hw/mem/trace-events @@ -1,8 +1,8 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/mem/pc-dimm.c +# pc-dimm.c mhp_pc_dimm_assigned_slot(int slot) "%d" -# hw/mem/memory-device.c +# memory-device.c memory_device_pre_plug(const char *id, uint64_t addr) "id=%s addr=0x%"PRIx64 memory_device_plug(const char *id, uint64_t addr) "id=%s addr=0x%"PRIx64 memory_device_unplug(const char *id, uint64_t addr) "id=%s addr=0x%"PRIx64 diff --git a/hw/mips/boston.c b/hw/mips/boston.c index e5bab3cadc..a8b29f62f5 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -528,21 +528,21 @@ static void boston_mach_init(MachineState *machine) fw_size = load_image_targphys(machine->firmware, 0x1fc00000, 4 * MiB); if (fw_size == -1) { - error_printf("unable to load firmware image '%s'\n", + error_report("unable to load firmware image '%s'", machine->firmware); exit(1); } } else if (machine->kernel_filename) { fit_err = load_fit(&boston_fit_loader, machine->kernel_filename, s); if (fit_err) { - error_printf("unable to load FIT image\n"); + error_report("unable to load FIT image"); exit(1); } gen_firmware(memory_region_get_ram_ptr(flash) + 0x7c00000, s->kernel_entry, s->fdt_base, is_64b); } else if (!qtest_enabled()) { - error_printf("Please provide either a -kernel or -bios argument\n"); + error_report("Please provide either a -kernel or -bios argument"); exit(1); } } diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig index 2c60be99bc..5f67d0d6d9 100644 --- a/hw/misc/Kconfig +++ b/hw/misc/Kconfig @@ -34,7 +34,7 @@ config PCI_TESTDEV config EDU bool default y if TEST_DEVICES - depends on PCI + depends on PCI && MSI_NONBROKEN config PCA9552 bool @@ -67,7 +67,7 @@ config MACIO config IVSHMEM_DEVICE bool default y if PCI_DEVICES - depends on PCI && LINUX && IVSHMEM + depends on PCI && LINUX && IVSHMEM && MSI_NONBROKEN config ECCMEMCTL bool diff --git a/hw/misc/cbus.c b/hw/misc/cbus.c index 25e337ea77..16ee704bca 100644 --- a/hw/misc/cbus.c +++ b/hw/misc/cbus.c @@ -23,7 +23,7 @@ #include "qemu/osdep.h" #include "hw/hw.h" #include "hw/irq.h" -#include "hw/devices.h" +#include "hw/misc/cbus.h" #include "sysemu/sysemu.h" //#define DEBUG diff --git a/hw/misc/macio/trace-events b/hw/misc/macio/trace-events index 05019262fa..e4a1cc0d24 100644 --- a/hw/misc/macio/trace-events +++ b/hw/misc/macio/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/misc/macio/cuda.c +# cuda.c cuda_delay_set_sr_int(void) "" cuda_data_send(uint8_t data) "send: 0x%02x" cuda_data_recv(uint8_t data) "recv: 0x%02x" @@ -10,18 +10,17 @@ cuda_packet_receive_data(int i, const uint8_t data) "[%d] 0x%02x" cuda_packet_send(int len) "length %d" cuda_packet_send_data(int i, const uint8_t data) "[%d] 0x%02x" -# hw/misc/macio/macio.c +# macio.c macio_timer_write(uint64_t addr, unsigned len, uint64_t val) "write addr 0x%"PRIx64 " len %d val 0x%"PRIx64 macio_timer_read(uint64_t addr, unsigned len, uint32_t val) "read addr 0x%"PRIx64 " len %d val 0x%"PRIx32 -# hw/misc/macio/gpio.c +# gpio.c macio_set_gpio(int gpio, bool state) "setting GPIO %d to %d" macio_gpio_irq_assert(int gpio) "asserting GPIO %d" macio_gpio_irq_deassert(int gpio) "deasserting GPIO %d" macio_gpio_write(uint64_t addr, uint64_t val) "addr: 0x%"PRIx64" value: 0x%"PRIx64 -macio_gpio_read(uint64_t addr, uint64_t val) "addr: 0x%"PRIx64" value: 0x%"PRIx64 -# hw/misc/macio/pmu.c +# pmu.c pmu_adb_poll(int olen) "ADB autopoll, olen=%d" pmu_one_sec_timer(void) "PMU one sec..." pmu_cmd_set_int_mask(int intmask) "Setting PMU int mask to 0x%02x" diff --git a/hw/misc/trace-events b/hw/misc/trace-events index c1795bb54b..47e1bccf71 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/misc/eccmemctl.c +# eccmemctl.c ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x" ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x" ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x" @@ -20,7 +20,7 @@ ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x" ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x" ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x" -# hw/misc/slavio_misc.c +# slavio_misc.c slavio_misc_update_irq_raise(void) "Raise IRQ" slavio_misc_update_irq_lower(void) "Lower IRQ" slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" @@ -41,20 +41,20 @@ slavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x" slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x" slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x" -# hw/misc/milkymist-hpdmc.c +# milkymist-hpdmc.c milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x" milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x" -# hw/misc/milkymist-pfpu.c +# milkymist-pfpu.c milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x" milkymist_pfpu_pulse_irq(void) "Pulse IRQ" -# hw/misc/aspeed_scu.c +# aspeed_scu.c aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32 -# hw/misc/mps2_scc.c +# mps2-scc.c mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" mps2_scc_reset(void) "MPS2 SCC: reset" @@ -62,29 +62,29 @@ mps2_scc_leds(char led7, char led6, char led5, char led4, char led3, char led2, mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32 mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32 -# hw/misc/mps2_fpgaio.c +# mps2-fpgaio.c mps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" mps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" mps2_fpgaio_reset(void) "MPS2 FPGAIO: reset" mps2_fpgaio_leds(char led1, char led0) "MPS2 FPGAIO LEDs: %c%c" -# hw/misc/msf2-sysreg.c +# msf2-sysreg.c msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32 msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32 msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register" -#hw/misc/imx7_gpr.c +# imx7_gpr.c imx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64 imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64 -# hw/misc/mos6522.c +# mos6522.c mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d" mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64 mos6522_set_sr_int(void) "set sr_int" mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64 mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x" -# hw/misc/tz-mpc.c +# tz-mpc.c tz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u" tz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u" tz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) "TZ MPC blocked read: offset 0x%" PRIx64 " size %u secure %d" @@ -92,16 +92,15 @@ tz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secur tz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) "TZ MPC translate: addr 0x%" PRIx64 " flags 0x%x iommu_idx %s: %s" tz_mpc_iommu_notify(uint64_t addr) "TZ MPC iommu: notifying UNMAP/MAP for 0x%" PRIx64 -# hw/misc/tz-msc.c +# tz-msc.c tz_msc_reset(void) "TZ MSC: reset" tz_msc_cfg_nonsec(int level) "TZ MSC: cfg_nonsec = %d" tz_msc_cfg_sec_resp(int level) "TZ MSC: cfg_sec_resp = %d" -tz_msc_irq_enable(int level) "TZ MSC: int_enable = %d" tz_msc_irq_clear(int level) "TZ MSC: int_clear = %d" tz_msc_update_irq(int level) "TZ MSC: setting irq line to %d" tz_msc_access_blocked(uint64_t offset) "TZ MSC: offset 0x%" PRIx64 " access blocked" -# hw/misc/tz-ppc.c +# tz-ppc.c tz_ppc_reset(void) "TZ PPC: reset" tz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d" tz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d" @@ -112,31 +111,32 @@ tz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d" tz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked" tz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked" -# hw/misc/iotkit-secctl.c +# iotkit-secctl.c iotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u" iotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs write: offset 0x%x data 0x%" PRIx64 " size %u" iotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u" iotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u" -iotkit_secctl_reset(void) "IoTKit SecCtl: reset" -# hw/misc/imx6ul_ccm.c +# imx6ul_ccm.c ccm_entry(void) "\n" ccm_freq(uint32_t freq) "freq = %d\n" ccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d\n" ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32 "\n" ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32 "\n" -# hw/misc/iotkit-sysctl.c +# iotkit-sysinfo.c iotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" iotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" + +# iotkit-sysctl.c iotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" iotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" iotkit_sysctl_reset(void) "IoTKit SysCtl: reset" -# hw/misc/armsse-cpuid.c +# armsse-cpuid.c armsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" armsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" -# hw/misc/armsse-mhu.c +# armsse-mhu.c armsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" diff --git a/hw/net/Kconfig b/hw/net/Kconfig index c00ec03cd1..7d7bbc5d7c 100644 --- a/hw/net/Kconfig +++ b/hw/net/Kconfig @@ -28,7 +28,7 @@ config E1000_PCI config E1000E_PCI_EXPRESS bool default y if PCI_DEVICES - depends on PCI_EXPRESS + depends on PCI_EXPRESS && MSI_NONBROKEN config RTL8139_PCI bool @@ -107,7 +107,7 @@ config ETSEC config ROCKER bool default y if PCI_DEVICES - depends on PCI + depends on PCI && MSI_NONBROKEN config CAN_BUS bool diff --git a/hw/net/e1000.c b/hw/net/e1000.c index 5e144cb4e4..9b39bccfb2 100644 --- a/hw/net/e1000.c +++ b/hw/net/e1000.c @@ -120,6 +120,8 @@ typedef struct E1000State_st { bool mit_irq_level; /* Tracks interrupt pin level. */ uint32_t mit_ide; /* Tracks E1000_TXD_CMD_IDE bit. */ + QEMUTimer *flush_queue_timer; + /* Compatibility flags for migration to/from qemu 1.3.0 and older */ #define E1000_FLAG_AUTONEG_BIT 0 #define E1000_FLAG_MIT_BIT 1 @@ -366,6 +368,7 @@ static void e1000_reset(void *opaque) timer_del(d->autoneg_timer); timer_del(d->mit_timer); + timer_del(d->flush_queue_timer); d->mit_timer_on = 0; d->mit_irq_level = 0; d->mit_ide = 0; @@ -392,6 +395,14 @@ set_ctrl(E1000State *s, int index, uint32_t val) } static void +e1000_flush_queue_timer(void *opaque) +{ + E1000State *s = opaque; + + qemu_flush_queued_packets(qemu_get_queue(s->nic)); +} + +static void set_rx_control(E1000State *s, int index, uint32_t val) { s->mac_reg[RCTL] = val; @@ -399,7 +410,8 @@ set_rx_control(E1000State *s, int index, uint32_t val) s->rxbuf_min_shift = ((val / E1000_RCTL_RDMTS_QUAT) & 3) + 1; DBGOUT(RX, "RCTL: %d, mac_reg[RCTL] = 0x%x\n", s->mac_reg[RDT], s->mac_reg[RCTL]); - qemu_flush_queued_packets(qemu_get_queue(s->nic)); + timer_mod(s->flush_queue_timer, + qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 1000); } static void @@ -837,7 +849,7 @@ e1000_can_receive(NetClientState *nc) E1000State *s = qemu_get_nic_opaque(nc); return e1000x_rx_ready(&s->parent_obj, s->mac_reg) && - e1000_has_rxbufs(s, 1); + e1000_has_rxbufs(s, 1) && !timer_pending(s->flush_queue_timer); } static uint64_t rx_desc_base(E1000State *s) @@ -881,6 +893,10 @@ e1000_receive_iov(NetClientState *nc, const struct iovec *iov, int iovcnt) return -1; } + if (timer_pending(s->flush_queue_timer)) { + return 0; + } + /* Pad to minimum Ethernet frame length */ if (size < sizeof(min_buf)) { iov_to_buf(iov, iovcnt, 0, min_buf, size); @@ -1637,6 +1653,8 @@ pci_e1000_uninit(PCIDevice *dev) timer_free(d->autoneg_timer); timer_del(d->mit_timer); timer_free(d->mit_timer); + timer_del(d->flush_queue_timer); + timer_free(d->flush_queue_timer); qemu_del_nic(d->nic); } @@ -1700,6 +1718,8 @@ static void pci_e1000_realize(PCIDevice *pci_dev, Error **errp) d->autoneg_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL, e1000_autoneg_timer, d); d->mit_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, e1000_mit_timer, d); + d->flush_queue_timer = timer_new_ms(QEMU_CLOCK_VIRTUAL, + e1000_flush_queue_timer, d); } static void qdev_e1000_reset(DeviceState *dev) diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c index a6269d9463..b29e3fee49 100644 --- a/hw/net/lan9118.c +++ b/hw/net/lan9118.c @@ -14,7 +14,7 @@ #include "hw/sysbus.h" #include "net/net.h" #include "net/eth.h" -#include "hw/devices.h" +#include "hw/net/lan9118.h" #include "sysemu/sysemu.h" #include "hw/ptimer.h" #include "qemu/log.h" @@ -175,7 +175,6 @@ static const VMStateDescription vmstate_lan9118_packet = { } }; -#define TYPE_LAN9118 "lan9118" #define LAN9118(obj) OBJECT_CHECK(lan9118_state, (obj), TYPE_LAN9118) typedef struct { diff --git a/hw/net/smc91c111.c b/hw/net/smc91c111.c index 99da2d9297..d19ea0750d 100644 --- a/hw/net/smc91c111.c +++ b/hw/net/smc91c111.c @@ -10,7 +10,7 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" #include "net/net.h" -#include "hw/devices.h" +#include "hw/net/smc91c111.h" #include "qemu/log.h" /* For crc32 */ #include <zlib.h> diff --git a/hw/net/trace-events b/hw/net/trace-events index 3a86004154..3cd9e122df 100644 --- a/hw/net/trace-events +++ b/hw/net/trace-events @@ -1,15 +1,15 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/net/etraxfs_eth.c +# etraxfs_eth.c mdio_phy_read(int regnum, uint16_t value) "read phy_reg:%d value:0x%04x" mdio_phy_write(int regnum, uint16_t value) "write phy_reg:%d value:0x%04x" mdio_bitbang(bool mdc, bool mdio, int state, uint16_t cnt, unsigned int drive) "bitbang mdc=%u mdio=%u state=%d cnt=%u drv=%d" -# hw/net/lance.c +# lance.c lance_mem_readw(uint64_t addr, uint32_t ret) "addr=0x%"PRIx64"val=0x%04x" lance_mem_writew(uint64_t addr, uint32_t val) "addr=0x%"PRIx64"val=0x%04x" -# hw/net/milkymist-minimac2.c +# milkymist-minimac2.c milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr 0x%02x addr 0x%02x value 0x%04x" @@ -21,20 +21,20 @@ milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX" milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX" milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX" -# hw/net/mipsnet.c +# mipsnet.c mipsnet_send(uint32_t size) "sending len=%u" mipsnet_receive(uint32_t size) "receiving len=%u" mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x" mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (0x%02x)" -# hw/net/ne2000.c +# ne2000.c ne2000_read(uint64_t addr, uint64_t val) "read addr=0x%" PRIx64 " val=0x%" PRIx64 ne2000_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 ne2000_ioport_read(uint64_t addr, uint64_t val) "io read addr=0x%02" PRIx64 " val=0x%02" PRIx64 ne2000_ioport_write(uint64_t addr, uint64_t val) "io write addr=0x%02" PRIx64 " val=0x%02" PRIx64 -# hw/net/opencores_eth.c +# opencores_eth.c open_eth_mii_write(unsigned idx, uint16_t v) "MII[0x%02x] <- 0x%04x" open_eth_mii_read(unsigned idx, uint16_t v) "MII[0x%02x] -> 0x%04x" open_eth_update_irq(uint32_t v) "IRQ <- 0x%x" @@ -48,7 +48,7 @@ open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[0x%02x] <- 0x%08x" open_eth_desc_read(uint32_t addr, uint32_t v) "DESC[0x%04x] -> 0x%08x" open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[0x%04x] <- 0x%08x" -# hw/net/pcnet.c +# pcnet.c pcnet_s_reset(void *s) "s=%p" pcnet_user_int(void *s) "s=%p" pcnet_isr_change(void *s, uint32_t isr, uint32_t isr_old) "s=%p INTA=%d<=%d" @@ -56,13 +56,13 @@ pcnet_init(void *s, uint64_t init_addr) "s=%p init_addr=0x%"PRIx64 pcnet_rlen_tlen(void *s, uint32_t rlen, uint32_t tlen) "s=%p rlen=%d tlen=%d" pcnet_ss32_rdra_tdra(void *s, uint32_t ss32, uint32_t rdra, uint32_t rcvrl, uint32_t tdra, uint32_t xmtrl) "s=%p ss32=%d rdra=0x%08x[%d] tdra=0x%08x[%d]" -# hw/net/pcnet-pci.c +# pcnet-pci.c pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val) "opaque=%p addr=0x%08x val=0x%02x" pcnet_aprom_readb(void *opaque, uint32_t addr, uint32_t val) "opaque=%p addr=0x%08x val=0x%02x" pcnet_ioport_read(void *opaque, uint64_t addr, unsigned size) "opaque=%p addr=0x%"PRIx64" size=%d" pcnet_ioport_write(void *opaque, uint64_t addr, uint64_t data, unsigned size) "opaque=%p addr=0x%"PRIx64" data=0x%"PRIx64" size=%d" -# hw/net/net_rx_pkt.c +# net_rx_pkt.c net_rx_pkt_parsed(bool ip4, bool ip6, bool udp, bool tcp, size_t l3o, size_t l4o, size_t l5o) "RX packet parsed: ip4: %d, ip6: %d, udp: %d, tcp: %d, l3 offset: %zu, l4 offset: %zu, l5 offset: %zu" net_rx_pkt_l4_csum_validate_entry(void) "Starting L4 checksum validation" net_rx_pkt_l4_csum_validate_not_xxp(void) "Not a TCP/UDP packet" @@ -98,10 +98,10 @@ net_rx_pkt_rss_ip6_ex(void) "Calculating IPv6/EX RSS hash" net_rx_pkt_rss_hash(size_t rss_length, uint32_t rss_hash) "RSS hash for %zu bytes: 0x%X" net_rx_pkt_rss_add_chunk(void* ptr, size_t size, size_t input_offset) "Add RSS chunk %p, %zu bytes, RSS input offset %zu bytes" -# hw/net/e1000.c +# e1000.c e1000_receiver_overrun(size_t s, uint32_t rdh, uint32_t rdt) "Receiver overrun: dropped packet of %zu bytes, RDH=%u, RDT=%u" -# hw/net/e1000x_common.c +# e1000x_common.c e1000x_rx_can_recv_disabled(bool link_up, bool rx_enabled, bool pci_master) "link_up: %d, rx_enabled %d, pci_master %d" e1000x_vlan_is_vlan_pkt(bool is_vlan_pkt, uint16_t eth_proto, uint16_t vet) "Is VLAN packet: %d, ETH proto: 0x%X, VET: 0x%X" e1000x_rx_flt_ucast_match(uint32_t idx, uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "unicast match[%d]: %02x:%02x:%02x:%02x:%02x:%02x" @@ -114,7 +114,7 @@ e1000x_mac_indicate(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, e1000x_link_negotiation_start(void) "Start link auto negotiation" e1000x_link_negotiation_done(void) "Auto negotiation is completed" -# hw/net/e1000e_core.c +# e1000e_core.c e1000e_core_write(uint64_t index, uint32_t size, uint64_t val) "Write to register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 e1000e_core_read(uint64_t index, uint32_t size, uint64_t val) "Read from register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 e1000e_core_mdic_read(uint8_t page, uint32_t addr, uint32_t data) "MDIC READ: PHY[%u][%u] = 0x%x" @@ -242,10 +242,12 @@ e1000e_irq_msix_pending_clearing(uint32_t cause, uint32_t int_cfg, uint32_t vec) e1000e_wrn_msix_vec_wrong(uint32_t cause, uint32_t cfg) "Invalid configuration for cause 0x%x: 0x%x" e1000e_wrn_msix_invalid(uint32_t cause, uint32_t cfg) "Invalid entry for cause 0x%x: 0x%x" -e1000e_mac_set_permanent(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "Set permanent MAC: %02x:%02x:%02x:%02x:%02x:%02x" e1000e_mac_set_sw(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "Set SW MAC: %02x:%02x:%02x:%02x:%02x:%02x" -# hw/net/e1000e.c +e1000e_vm_state_running(void) "VM state is running" +e1000e_vm_state_stopped(void) "VM state is stopped" + +# e1000e.c e1000e_cb_pci_realize(void) "E1000E PCI realize entry" e1000e_cb_pci_uninit(void) "E1000E PCI unit entry" e1000e_cb_qdev_reset(void) "E1000E qdev reset entry" @@ -266,12 +268,10 @@ e1000e_msi_init_fail(int32_t res) "Failed to initialize MSI, error %d" e1000e_msix_init_fail(int32_t res) "Failed to initialize MSI-X, error %d" e1000e_msix_use_vector_fail(uint32_t vec, int32_t res) "Failed to use MSI-X vector %d, error %d" +e1000e_mac_set_permanent(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "Set permanent MAC: %02x:%02x:%02x:%02x:%02x:%02x" e1000e_cfg_support_virtio(bool support) "Virtio header supported: %d" -e1000e_vm_state_running(void) "VM state is running" -e1000e_vm_state_stopped(void) "VM state is stopped" - -# hw/net/spapr_llan.c +# spapr_llan.c spapr_vlan_get_rx_bd_from_pool_found(int pool, int32_t count, uint32_t rx_bufs) "pool=%d count=%"PRId32" rxbufs=%"PRIu32 spapr_vlan_get_rx_bd_from_page(int buf_ptr, uint64_t bd) "use_buf_ptr=%d bd=0x%016"PRIx64 spapr_vlan_get_rx_bd_from_page_found(uint32_t use_buf_ptr, uint32_t rx_bufs) "ptr=%"PRIu32" rxbufs=%"PRIu32 @@ -287,7 +287,7 @@ spapr_vlan_h_send_logical_lan_rxbufs(uint32_t rx_bufs) "rxbufs = %"PRIu32 spapr_vlan_h_send_logical_lan_buf_desc(uint64_t buf) " buf desc: 0x%"PRIx64 spapr_vlan_h_send_logical_lan_total(int nbufs, unsigned total_len) "%d buffers, total length 0x%x" -# hw/net/sungem.c +# sungem.c sungem_tx_checksum(uint16_t start, uint16_t off) "TX checksumming from byte %d, inserting at %d" sungem_tx_checksum_oob(void) "TX checksum out of packet bounds" sungem_tx_unfinished(void) "TX packet started without finishing the previous one" @@ -331,7 +331,7 @@ sungem_mmio_mif_read(uint64_t addr, uint64_t val) "MMIO mif read from 0x%"PRIx64 sungem_mmio_pcs_write(uint64_t addr, uint64_t val) "MMIO pcs write to 0x%"PRIx64" val=0x%"PRIx64 sungem_mmio_pcs_read(uint64_t addr, uint64_t val) "MMIO pcs read from 0x%"PRIx64" val=0x%"PRIx64 -# hw/net/sunhme.c +# sunhme.c sunhme_seb_write(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 sunhme_seb_read(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 sunhme_etx_write(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 @@ -360,7 +360,7 @@ sunhme_rx_filter_accept(void) "accepting incoming frame" sunhme_rx_desc(uint32_t addr, int offset, uint32_t status, int len, int cr, int nr) "addr 0x%"PRIx32"(+0x%x) status 0x%"PRIx32 " len %d (ring %d/%d)" sunhme_rx_xsum_calc(uint16_t xsum) "calculated incoming xsum as 0x%x" -# hw/net/virtio-net.c +# virtio-net.c virtio_net_announce_notify(void) "" virtio_net_announce_timer(int round) "%d" virtio_net_handle_announce(int round) "%d" diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c index 7e2c2a6f6a..ffe0872fff 100644 --- a/hw/net/virtio-net.c +++ b/hw/net/virtio-net.c @@ -2281,7 +2281,7 @@ static void virtio_net_change_num_queues(VirtIONet *n, int new_max_queues) /* * We always need to remove and add ctrl vq if * old_num_queues != new_num_queues. Remove ctrl_vq first, - * and then we only enter one of the following too loops. + * and then we only enter one of the following two loops. */ virtio_del_queue(vdev, old_num_queues - 1); diff --git a/hw/nios2/Kconfig b/hw/nios2/Kconfig index ab953e0077..b10ea640da 100644 --- a/hw/nios2/Kconfig +++ b/hw/nios2/Kconfig @@ -4,5 +4,9 @@ config NIOS2_10M50 select SERIAL select ALTERA_TIMER +config NIOS2_GENERIC_NOMMU + bool + select NIOS2 + config NIOS2 bool diff --git a/hw/nios2/Makefile.objs b/hw/nios2/Makefile.objs index 89a419a9f5..3e017981ba 100644 --- a/hw/nios2/Makefile.objs +++ b/hw/nios2/Makefile.objs @@ -1,2 +1,3 @@ obj-y = boot.o cpu_pic.o obj-$(CONFIG_NIOS2_10M50) += 10m50_devboard.o +obj-$(CONFIG_NIOS2_GENERIC_NOMMU) += generic_nommu.o diff --git a/hw/nios2/boot.c b/hw/nios2/boot.c index 5f0ab2fbb9..276068c842 100644 --- a/hw/nios2/boot.c +++ b/hw/nios2/boot.c @@ -138,7 +138,6 @@ void nios2_load_kernel(Nios2CPU *cpu, hwaddr ddr_base, if (kernel_filename) { int kernel_size, fdt_size; uint64_t entry, low, high; - uint32_t base32; int big_endian = 0; #ifdef TARGET_WORDS_BIGENDIAN @@ -149,17 +148,24 @@ void nios2_load_kernel(Nios2CPU *cpu, hwaddr ddr_base, kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, &entry, &low, &high, big_endian, EM_ALTERA_NIOS2, 0, 0); - base32 = entry; - if (base32 == 0xc0000000) { + if ((uint32_t)entry == 0xc0000000) { + /* + * The Nios II processor reference guide documents that the + * kernel is placed at virtual memory address 0xc0000000, + * and we've got something that points there. Reload it + * and adjust the entry to get the address in physical RAM. + */ kernel_size = load_elf(kernel_filename, NULL, translate_kernel_address, NULL, &entry, NULL, NULL, big_endian, EM_ALTERA_NIOS2, 0, 0); + boot_info.bootstrap_pc = ddr_base + 0xc0000000 + + (entry & 0x07ffffff); + } else { + /* Use the entry point in the ELF image. */ + boot_info.bootstrap_pc = (uint32_t)entry; } - /* Always boot into physical ram. */ - boot_info.bootstrap_pc = ddr_base + 0xc0000000 + (entry & 0x07ffffff); - /* If it wasn't an ELF image, try an u-boot image. */ if (kernel_size < 0) { hwaddr uentry, loadaddr = LOAD_UIMAGE_LOADADDR_INVALID; diff --git a/hw/nios2/generic_nommu.c b/hw/nios2/generic_nommu.c new file mode 100644 index 0000000000..1788ffa7a4 --- /dev/null +++ b/hw/nios2/generic_nommu.c @@ -0,0 +1,105 @@ +/* + * Generic simulator target with no MMU or devices. This emulation is + * compatible with the libgloss qemu-hosted.ld linker script for using + * QEMU as an instruction set simulator. + * + * Copyright (c) 2018-2019 Mentor Graphics + * + * Copyright (c) 2016 Marek Vasut <marek.vasut@gmail.com> + * + * Based on LabX device code + * + * Copyright (c) 2012 Chris Wulff <crwulff@gmail.com> + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see + * <http://www.gnu.org/licenses/lgpl-2.1.html> + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu-common.h" +#include "cpu.h" + +#include "hw/sysbus.h" +#include "hw/hw.h" +#include "hw/char/serial.h" +#include "sysemu/sysemu.h" +#include "hw/boards.h" +#include "exec/memory.h" +#include "exec/address-spaces.h" +#include "qemu/config-file.h" + +#include "boot.h" + +#define BINARY_DEVICE_TREE_FILE "generic-nommu.dtb" + +static void nios2_generic_nommu_init(MachineState *machine) +{ + Nios2CPU *cpu; + MemoryRegion *address_space_mem = get_system_memory(); + MemoryRegion *phys_tcm = g_new(MemoryRegion, 1); + MemoryRegion *phys_tcm_alias = g_new(MemoryRegion, 1); + MemoryRegion *phys_ram = g_new(MemoryRegion, 1); + MemoryRegion *phys_ram_alias = g_new(MemoryRegion, 1); + ram_addr_t tcm_base = 0x0; + ram_addr_t tcm_size = 0x1000; /* 1 kiB, but QEMU limit is 4 kiB */ + ram_addr_t ram_base = 0x10000000; + ram_addr_t ram_size = 0x08000000; + + /* Physical TCM (tb_ram_1k) with alias at 0xc0000000 */ + memory_region_init_ram(phys_tcm, NULL, "nios2.tcm", tcm_size, + &error_abort); + memory_region_init_alias(phys_tcm_alias, NULL, "nios2.tcm.alias", + phys_tcm, 0, tcm_size); + memory_region_add_subregion(address_space_mem, tcm_base, phys_tcm); + memory_region_add_subregion(address_space_mem, 0xc0000000 + tcm_base, + phys_tcm_alias); + + /* Physical DRAM with alias at 0xc0000000 */ + memory_region_init_ram(phys_ram, NULL, "nios2.ram", ram_size, + &error_abort); + memory_region_init_alias(phys_ram_alias, NULL, "nios2.ram.alias", + phys_ram, 0, ram_size); + memory_region_add_subregion(address_space_mem, ram_base, phys_ram); + memory_region_add_subregion(address_space_mem, 0xc0000000 + ram_base, + phys_ram_alias); + + cpu = NIOS2_CPU(cpu_create(TYPE_NIOS2_CPU)); + + /* Remove MMU */ + cpu->mmu_present = false; + + /* Reset vector is the first 32 bytes of RAM. */ + cpu->reset_addr = ram_base; + + /* The interrupt vector comes right after reset. */ + cpu->exception_addr = ram_base + 0x20; + + /* + * The linker script does have a TLB miss memory region declared, + * but this should never be used with no MMU. + */ + cpu->fast_tlb_miss_addr = 0x7fff400; + + nios2_load_kernel(cpu, ram_base, ram_size, machine->initrd_filename, + BINARY_DEVICE_TREE_FILE, NULL); +} + +static void nios2_generic_nommu_machine_init(struct MachineClass *mc) +{ + mc->desc = "Generic NOMMU Nios II design"; + mc->init = nios2_generic_nommu_init; +} + +DEFINE_MACHINE("nios2-generic-nommu", nios2_generic_nommu_machine_init); diff --git a/hw/nvram/trace-events b/hw/nvram/trace-events index 6b55ba7a09..e191991e2a 100644 --- a/hw/nvram/trace-events +++ b/hw/nvram/trace-events @@ -1,10 +1,10 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/nvram/ds1225y.c +# ds1225y.c nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x" nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x" -# hw/nvram/fw_cfg.c +# fw_cfg.c fw_cfg_select(void *s, uint16_t key, int ret) "%p key %d = %d" fw_cfg_read(void *s, uint64_t ret) "%p = 0x%"PRIx64 fw_cfg_add_file(void *s, int index, char *name, size_t len) "%p #%d: %s (%zd bytes)" diff --git a/hw/pci-bridge/Kconfig b/hw/pci-bridge/Kconfig index b167b98497..a51ec716f5 100644 --- a/hw/pci-bridge/Kconfig +++ b/hw/pci-bridge/Kconfig @@ -1,7 +1,7 @@ config PCIE_PORT bool default y if PCI_DEVICES - depends on PCI_EXPRESS + depends on PCI_EXPRESS && MSI_NONBROKEN config PXB bool @@ -10,12 +10,12 @@ config PXB config XIO3130 bool default y if PCI_DEVICES - depends on PCI_EXPRESS + depends on PCI_EXPRESS && MSI_NONBROKEN config IOH3420 bool default y if PCI_DEVICES - depends on PCI_EXPRESS + depends on PCI_EXPRESS && MSI_NONBROKEN config I82801B11 bool diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c index 9766edb445..26bda73eae 100644 --- a/hw/pci-bridge/gen_pcie_root_port.c +++ b/hw/pci-bridge/gen_pcie_root_port.c @@ -20,6 +20,9 @@ OBJECT_CHECK(GenPCIERootPort, (obj), TYPE_GEN_PCIE_ROOT_PORT) #define GEN_PCIE_ROOT_PORT_AER_OFFSET 0x100 +#define GEN_PCIE_ROOT_PORT_ACS_OFFSET \ + (GEN_PCIE_ROOT_PORT_AER_OFFSET + PCI_ERR_SIZEOF) + #define GEN_PCIE_ROOT_PORT_MSIX_NR_VECTOR 1 typedef struct GenPCIERootPort { @@ -149,6 +152,7 @@ static void gen_rp_dev_class_init(ObjectClass *klass, void *data) rpc->interrupts_init = gen_rp_interrupts_init; rpc->interrupts_uninit = gen_rp_interrupts_uninit; rpc->aer_offset = GEN_PCIE_ROOT_PORT_AER_OFFSET; + rpc->acs_offset = GEN_PCIE_ROOT_PORT_ACS_OFFSET; } static const TypeInfo gen_rp_dev_info = { diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c index 34ad76743c..e94d918b6d 100644 --- a/hw/pci-bridge/pcie_root_port.c +++ b/hw/pci-bridge/pcie_root_port.c @@ -47,6 +47,7 @@ static void rp_reset(DeviceState *qdev) pcie_cap_deverr_reset(d); pcie_cap_slot_reset(d); pcie_cap_arifwd_reset(d); + pcie_acs_reset(d); pcie_aer_root_reset(d); pci_bridge_reset(qdev); pci_bridge_disable_base_limit(d); @@ -106,6 +107,9 @@ static void rp_realize(PCIDevice *d, Error **errp) pcie_aer_root_init(d); rp_aer_vector_update(d); + if (rpc->acs_offset) { + pcie_acs_init(d, rpc->acs_offset); + } return; err: diff --git a/hw/pci-host/Kconfig b/hw/pci-host/Kconfig index b39ea297ba..8c16d96b3f 100644 --- a/hw/pci-host/Kconfig +++ b/hw/pci-host/Kconfig @@ -49,3 +49,4 @@ config PCI_EXPRESS_XILINX config PCI_EXPRESS_DESIGNWARE bool select PCI_EXPRESS + select MSI_NONBROKEN diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events index dd7a398e96..d19ca9aef6 100644 --- a/hw/pci-host/trace-events +++ b/hw/pci-host/trace-events @@ -1,9 +1,9 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/pci-host/grackle.c +# grackle.c grackle_set_irq(int irq_num, int level) "set_irq num %d level %d" -# hw/pci-host/sabre.c +# sabre.c sabre_set_request(int irq_num) "request irq %d" sabre_clear_request(int irq_num) "clear request irq %d" sabre_config_write(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64 @@ -13,7 +13,7 @@ sabre_pci_config_read(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRI sabre_pci_set_irq(int irq_num, int level) "set irq_in %d level %d" sabre_pci_set_obio_irq(int irq_num, int level) "set irq %d level %d" -# hw/pci-host/uninorth.c +# uninorth.c unin_set_irq(int irq_num, int level) "setting INT %d = %d" unin_get_config_reg(uint32_t reg, uint32_t addr, uint32_t retval) "converted config space accessor 0x%"PRIx32 "/0x%"PRIx32 " -> 0x%"PRIx32 unin_data_write(uint64_t addr, unsigned len, uint64_t val) "write addr 0x%"PRIx64 " len %d val 0x%"PRIx64 diff --git a/hw/pci/Kconfig b/hw/pci/Kconfig index 3b8638b51d..77f8b005ff 100644 --- a/hw/pci/Kconfig +++ b/hw/pci/Kconfig @@ -7,3 +7,9 @@ config PCI_EXPRESS config PCI_DEVICES bool + +config MSI_NONBROKEN + # selected by interrupt controllers that do not support MSI, + # or support it and have a good implementation. See commit + # 47d2b0f33c664533b8dbd5cb17faa8e6a01afe1f. + bool diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 35451c1e99..a78023f669 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -147,6 +147,11 @@ static uint16_t pcibus_numa_node(PCIBus *bus) return NUMA_NODE_UNASSIGNED; } +static bool pcibus_allows_extended_config_space(PCIBus *bus) +{ + return false; +} + static void pci_bus_class_init(ObjectClass *klass, void *data) { BusClass *k = BUS_CLASS(klass); @@ -162,6 +167,7 @@ static void pci_bus_class_init(ObjectClass *klass, void *data) pbc->is_root = pcibus_is_root; pbc->bus_num = pcibus_num; pbc->numa_node = pcibus_numa_node; + pbc->allows_extended_config_space = pcibus_allows_extended_config_space; } static const TypeInfo pci_bus_info = { @@ -182,9 +188,22 @@ static const TypeInfo conventional_pci_interface_info = { .parent = TYPE_INTERFACE, }; +static bool pciebus_allows_extended_config_space(PCIBus *bus) +{ + return true; +} + +static void pcie_bus_class_init(ObjectClass *klass, void *data) +{ + PCIBusClass *pbc = PCI_BUS_CLASS(klass); + + pbc->allows_extended_config_space = pciebus_allows_extended_config_space; +} + static const TypeInfo pcie_bus_info = { .name = TYPE_PCIE_BUS, .parent = TYPE_PCI_BUS, + .class_init = pcie_bus_class_init, }; static PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num); @@ -401,6 +420,11 @@ bool pci_bus_is_root(PCIBus *bus) return PCI_BUS_GET_CLASS(bus)->is_root(bus); } +bool pci_bus_allows_extended_config_space(PCIBus *bus) +{ + return PCI_BUS_GET_CLASS(bus)->allows_extended_config_space(bus); +} + void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent, const char *name, MemoryRegion *address_space_mem, @@ -927,7 +951,7 @@ static uint16_t pci_req_id_cache_extract(PCIReqIDCache *cache) result = PCI_BUILD_BDF(bus_n, 0); break; default: - error_printf("Invalid PCI requester ID cache type: %d\n", + error_report("Invalid PCI requester ID cache type: %d", cache->type); exit(1); break; @@ -1532,7 +1556,7 @@ void pci_device_set_intx_routing_notifier(PCIDevice *dev, */ int pci_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin) { - return (pin + PCI_SLOT(pci_dev->devfn)) % PCI_NUM_PINS; + return pci_swizzle(PCI_SLOT(pci_dev->devfn), pin); } /***********************************************************/ diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c index 5f5345dbac..9d64b2e12f 100644 --- a/hw/pci/pci_host.c +++ b/hw/pci/pci_host.c @@ -54,7 +54,7 @@ static inline PCIDevice *pci_dev_find_by_addr(PCIBus *bus, uint32_t addr) static void pci_adjust_config_limit(PCIBus *bus, uint32_t *limit) { if (*limit > PCI_CONFIG_SPACE_SIZE) { - if (!pci_bus_is_express(bus)) { + if (!pci_bus_allows_extended_config_space(bus)) { *limit = PCI_CONFIG_SPACE_SIZE; return; } diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index 640f678773..cf1ca30f93 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -914,3 +914,41 @@ void pcie_ats_init(PCIDevice *dev, uint16_t offset) pci_set_word(dev->wmask + dev->exp.ats_cap + PCI_ATS_CTRL, 0x800f); } + +/* ACS (Access Control Services) */ +void pcie_acs_init(PCIDevice *dev, uint16_t offset) +{ + bool is_downstream = pci_is_express_downstream_port(dev); + uint16_t cap_bits = 0; + + /* For endpoints, only multifunction devs may have an ACS capability: */ + assert(is_downstream || + (dev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) || + PCI_FUNC(dev->devfn)); + + pcie_add_capability(dev, PCI_EXT_CAP_ID_ACS, PCI_ACS_VER, offset, + PCI_ACS_SIZEOF); + dev->exp.acs_cap = offset; + + if (is_downstream) { + /* + * Downstream ports must implement SV, TB, RR, CR, UF, and DT (with + * caveats on the latter four that we ignore for simplicity). + * Endpoints may also implement a subset of ACS capabilities, + * but these are optional if the endpoint does not support + * peer-to-peer between functions and thus omitted here. + */ + cap_bits = PCI_ACS_SV | PCI_ACS_TB | PCI_ACS_RR | + PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_DT; + } + + pci_set_word(dev->config + offset + PCI_ACS_CAP, cap_bits); + pci_set_word(dev->wmask + offset + PCI_ACS_CTRL, cap_bits); +} + +void pcie_acs_reset(PCIDevice *dev) +{ + if (dev->exp.acs_cap) { + pci_set_word(dev->config + dev->exp.acs_cap + PCI_ACS_CTRL, 0); + } +} diff --git a/hw/pci/trace-events b/hw/pci/trace-events index f68c178afc..def4b3926d 100644 --- a/hw/pci/trace-events +++ b/hw/pci/trace-events @@ -1,12 +1,12 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/pci/pci.c +# pci.c pci_update_mappings_del(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64 pci_update_mappings_add(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64 -# hw/pci/pci_host.c +# pci_host.c pci_cfg_read(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x -> 0x%x" pci_cfg_write(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x <- 0x%x" -# hw/pci/msix.c +# msix.c msix_write_config(char *name, bool enabled, bool masked) "dev %s enabled %d masked %d" diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig index 2b83637511..a3465155f0 100644 --- a/hw/ppc/Kconfig +++ b/hw/ppc/Kconfig @@ -2,12 +2,14 @@ config PSERIES bool imply PCI_DEVICES imply TEST_DEVICES + imply VIRTIO_VGA select DIMM select PCI select SPAPR_VSCSI select VFIO if LINUX # needed by spapr_pci_vfio.c select XICS_SPAPR select XIVE_SPAPR + select MSI_NONBROKEN config SPAPR_RNG bool @@ -36,6 +38,7 @@ config PPC440 bool imply PCI_DEVICES imply TEST_DEVICES + imply E1000_PCI select PCI_EXPRESS select PPC4XX select SERIAL @@ -63,7 +66,6 @@ config PREP imply TEST_DEVICES select CS4231A select PREP_PCI - select I82374 select I82378 select LSI_SCSI_PCI select M48T59 @@ -97,6 +99,7 @@ config MAC_NEWWORLD config E500 bool imply AT24C + imply VIRTIO_PCI select ETSEC select OPENPIC select PLATFORM_BUS diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs index 1111b218a0..636e717f20 100644 --- a/hw/ppc/Makefile.objs +++ b/hw/ppc/Makefile.objs @@ -9,7 +9,7 @@ obj-$(CONFIG_SPAPR_RNG) += spapr_rng.o # IBM PowerNV obj-$(CONFIG_POWERNV) += pnv.o pnv_xscom.o pnv_core.o pnv_lpc.o pnv_psi.o pnv_occ.o pnv_bmc.o ifeq ($(CONFIG_PCI)$(CONFIG_PSERIES)$(CONFIG_LINUX), yyy) -obj-y += spapr_pci_vfio.o +obj-y += spapr_pci_vfio.o spapr_pci_nvlink2.o endif obj-$(CONFIG_PSERIES) += spapr_rtas_ddw.o # PowerPC 4xx boards diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 8be4d4cbf7..dfb4ea5742 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -755,7 +755,7 @@ static void pnv_chip_power9_intc_create(PnvChip *chip, PowerPCCPU *cpu, * controller object is initialized afterwards. Hopefully, it's * only used at runtime. */ - obj = xive_tctx_create(OBJECT(cpu), XIVE_ROUTER(&chip9->xive), errp); + obj = xive_tctx_create(OBJECT(cpu), XIVE_ROUTER(&chip9->xive), &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 5a923e4151..5345c8389e 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -786,7 +786,7 @@ static const MemoryRegionOps pnv_psi_p9_xscom_ops = { static void pnv_psi_power9_irq_set(PnvPsi *psi, int irq, bool state) { - uint32_t irq_method = psi->regs[PSIHB_REG(PSIHB9_INTERRUPT_CONTROL)]; + uint64_t irq_method = psi->regs[PSIHB_REG(PSIHB9_INTERRUPT_CONTROL)]; if (irq > PSIHB9_NUM_IRQS) { qemu_log_mask(LOG_GUEST_ERROR, "PSI: Unsupported irq %d\n", irq); diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c index 49d57469fb..ad20584f26 100644 --- a/hw/ppc/ppc.c +++ b/hw/ppc/ppc.c @@ -1101,7 +1101,7 @@ clk_setup_cb cpu_ppc_tb_init (CPUPPCState *env, uint32_t freq) tb_env = g_malloc0(sizeof(ppc_tb_t)); env->tb_env = tb_env; tb_env->flags = PPC_DECR_UNDERFLOW_TRIGGERED; - if (env->insns_flags & PPC_SEGMENT_64B) { + if (is_book3s_arch2x(env)) { /* All Book3S 64bit CPUs implement level based DEC logic */ tb_env->flags |= PPC_DECR_UNDERFLOW_LEVEL; } diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index 847d320465..b7f459d475 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -40,7 +40,6 @@ #include "hw/ide.h" #include "hw/loader.h" #include "hw/timer/mc146818rtc.h" -#include "hw/input/i8042.h" #include "hw/isa/pc87312.h" #include "hw/net/ne2000-isa.h" #include "sysemu/arch_init.h" diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 6c16d6cfaf..2ef3ce4362 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1034,12 +1034,13 @@ static void spapr_dt_rtas(SpaprMachineState *spapr, void *fdt) 0, cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE), cpu_to_be32(max_cpus / smp_threads), }; + uint32_t maxdomain = cpu_to_be32(spapr->gpu_numa_id > 1 ? 1 : 0); uint32_t maxdomains[] = { cpu_to_be32(4), - cpu_to_be32(0), - cpu_to_be32(0), - cpu_to_be32(0), - cpu_to_be32(nb_numa_nodes ? nb_numa_nodes : 1), + maxdomain, + maxdomain, + maxdomain, + cpu_to_be32(spapr->gpu_numa_id), }; _FDT(rtas = fdt_add_subnode(fdt, 0, "rtas")); @@ -1252,38 +1253,8 @@ static void *spapr_build_fdt(SpaprMachineState *spapr) _FDT(fdt_setprop_string(fdt, 0, "model", "IBM pSeries (emulated by qemu)")); _FDT(fdt_setprop_string(fdt, 0, "compatible", "qemu,pseries")); - /* - * Add info to guest to indentify which host is it being run on - * and what is the uuid of the guest - */ - if (spapr->host_model && !g_str_equal(spapr->host_model, "none")) { - if (g_str_equal(spapr->host_model, "passthrough")) { - /* -M host-model=passthrough */ - if (kvmppc_get_host_model(&buf)) { - _FDT(fdt_setprop_string(fdt, 0, "host-model", buf)); - g_free(buf); - } - } else { - /* -M host-model=<user-string> */ - _FDT(fdt_setprop_string(fdt, 0, "host-model", spapr->host_model)); - } - } - - if (spapr->host_serial && !g_str_equal(spapr->host_serial, "none")) { - if (g_str_equal(spapr->host_serial, "passthrough")) { - /* -M host-serial=passthrough */ - if (kvmppc_get_host_serial(&buf)) { - _FDT(fdt_setprop_string(fdt, 0, "host-serial", buf)); - g_free(buf); - } - } else { - /* -M host-serial=<user-string> */ - _FDT(fdt_setprop_string(fdt, 0, "host-serial", spapr->host_serial)); - } - } - + /* Guest UUID & Name*/ buf = qemu_uuid_unparse_strdup(&qemu_uuid); - _FDT(fdt_setprop_string(fdt, 0, "vm,uuid", buf)); if (qemu_uuid_set) { _FDT(fdt_setprop_string(fdt, 0, "system-id", buf)); @@ -1295,6 +1266,21 @@ static void *spapr_build_fdt(SpaprMachineState *spapr) qemu_get_vm_name())); } + /* Host Model & Serial Number */ + if (spapr->host_model) { + _FDT(fdt_setprop_string(fdt, 0, "host-model", spapr->host_model)); + } else if (smc->broken_host_serial_model && kvmppc_get_host_model(&buf)) { + _FDT(fdt_setprop_string(fdt, 0, "host-model", buf)); + g_free(buf); + } + + if (spapr->host_serial) { + _FDT(fdt_setprop_string(fdt, 0, "host-serial", spapr->host_serial)); + } else if (smc->broken_host_serial_model && kvmppc_get_host_serial(&buf)) { + _FDT(fdt_setprop_string(fdt, 0, "host-serial", buf)); + g_free(buf); + } + _FDT(fdt_setprop_cell(fdt, 0, "#address-cells", 2)); _FDT(fdt_setprop_cell(fdt, 0, "#size-cells", 2)); @@ -1534,10 +1520,10 @@ static void spapr_unmap_hptes(PPCVirtualHypervisor *vhyp, /* Nothing to do for qemu managed HPT */ } -static void spapr_store_hpte(PPCVirtualHypervisor *vhyp, hwaddr ptex, - uint64_t pte0, uint64_t pte1) +void spapr_store_hpte(PowerPCCPU *cpu, hwaddr ptex, + uint64_t pte0, uint64_t pte1) { - SpaprMachineState *spapr = SPAPR_MACHINE(vhyp); + SpaprMachineState *spapr = SPAPR_MACHINE(cpu->vhyp); hwaddr offset = ptex * HASH_PTE_SIZE_64; if (!spapr->htab) { @@ -1565,6 +1551,38 @@ static void spapr_store_hpte(PPCVirtualHypervisor *vhyp, hwaddr ptex, } } +static void spapr_hpte_set_c(PPCVirtualHypervisor *vhyp, hwaddr ptex, + uint64_t pte1) +{ + hwaddr offset = ptex * HASH_PTE_SIZE_64 + 15; + SpaprMachineState *spapr = SPAPR_MACHINE(vhyp); + + if (!spapr->htab) { + /* There should always be a hash table when this is called */ + error_report("spapr_hpte_set_c called with no hash table !"); + return; + } + + /* The HW performs a non-atomic byte update */ + stb_p(spapr->htab + offset, (pte1 & 0xff) | 0x80); +} + +static void spapr_hpte_set_r(PPCVirtualHypervisor *vhyp, hwaddr ptex, + uint64_t pte1) +{ + hwaddr offset = ptex * HASH_PTE_SIZE_64 + 14; + SpaprMachineState *spapr = SPAPR_MACHINE(vhyp); + + if (!spapr->htab) { + /* There should always be a hash table when this is called */ + error_report("spapr_hpte_set_r called with no hash table !"); + return; + } + + /* The HW performs a non-atomic byte update */ + stb_p(spapr->htab + offset, ((pte1 >> 8) & 0xff) | 0x01); +} + int spapr_hpt_shift_for_ramsize(uint64_t ramsize) { int shift; @@ -1713,6 +1731,16 @@ static void spapr_machine_reset(void) spapr_irq_msi_reset(spapr); } + /* + * NVLink2-connected GPU RAM needs to be placed on a separate NUMA node. + * We assign a new numa ID per GPU in spapr_pci_collect_nvgpu() which is + * called from vPHB reset handler so we initialize the counter here. + * If no NUMA is configured from the QEMU side, we start from 1 as GPU RAM + * must be equally distant from any other node. + * The final value of spapr->gpu_numa_id is going to be written to + * max-associativity-domains in spapr_build_fdt(). + */ + spapr->gpu_numa_id = MAX(1, nb_numa_nodes); qemu_devices_reset(); /* @@ -2795,13 +2823,7 @@ static void spapr_machine_init(MachineState *machine) /* advertise XIVE on POWER9 machines */ if (spapr->irq->ov5 & (SPAPR_OV5_XIVE_EXPLOIT | SPAPR_OV5_XIVE_BOTH)) { - if (ppc_type_check_compat(machine->cpu_type, CPU_POWERPC_LOGICAL_3_00, - 0, spapr->max_compat_pvr)) { - spapr_ovec_set(spapr->ov5, OV5_XIVE_EXPLOIT); - } else if (spapr->irq->ov5 & SPAPR_OV5_XIVE_EXPLOIT) { - error_report("XIVE-only machines require a POWER9 CPU"); - exit(1); - } + spapr_ovec_set(spapr->ov5, OV5_XIVE_EXPLOIT); } /* init CPUs */ @@ -3352,12 +3374,12 @@ static void spapr_instance_init(Object *obj) spapr_get_host_model, spapr_set_host_model, &error_abort); object_property_set_description(obj, "host-model", - "Set host's model-id to use - none|passthrough|string", &error_abort); + "Host model to advertise in guest device tree", &error_abort); object_property_add_str(obj, "host-serial", spapr_get_host_serial, spapr_set_host_serial, &error_abort); object_property_set_description(obj, "host-serial", - "Set host's system-id to use - none|passthrough|string", &error_abort); + "Host serial number to advertise in guest device tree", &error_abort); } static void spapr_machine_finalizefn(Object *obj) @@ -3928,7 +3950,9 @@ static void spapr_phb_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, smc->phb_placement(spapr, sphb->index, &sphb->buid, &sphb->io_win_addr, &sphb->mem_win_addr, &sphb->mem64_win_addr, - windows_supported, sphb->dma_liobn, errp); + windows_supported, sphb->dma_liobn, + &sphb->nv2_gpa_win_addr, &sphb->nv2_atsd_win_addr, + errp); } static void spapr_phb_plug(HotplugHandler *hotplug_dev, DeviceState *dev, @@ -4129,7 +4153,8 @@ static const CPUArchIdList *spapr_possible_cpu_arch_ids(MachineState *machine) static void spapr_phb_placement(SpaprMachineState *spapr, uint32_t index, uint64_t *buid, hwaddr *pio, hwaddr *mmio32, hwaddr *mmio64, - unsigned n_dma, uint32_t *liobns, Error **errp) + unsigned n_dma, uint32_t *liobns, + hwaddr *nv2gpa, hwaddr *nv2atsd, Error **errp) { /* * New-style PHB window placement. @@ -4174,6 +4199,9 @@ static void spapr_phb_placement(SpaprMachineState *spapr, uint32_t index, *pio = SPAPR_PCI_BASE + index * SPAPR_PCI_IO_WIN_SIZE; *mmio32 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM32_WIN_SIZE; *mmio64 = SPAPR_PCI_BASE + (index + 1) * SPAPR_PCI_MEM64_WIN_SIZE; + + *nv2gpa = SPAPR_PCI_NV2RAM64_WIN_BASE + index * SPAPR_PCI_NV2RAM64_WIN_SIZE; + *nv2atsd = SPAPR_PCI_NV2ATSD_WIN_BASE + index * SPAPR_PCI_NV2ATSD_WIN_SIZE; } static ICSState *spapr_ics_get(XICSFabric *dev, int irq) @@ -4295,7 +4323,8 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data) vhc->hpt_mask = spapr_hpt_mask; vhc->map_hptes = spapr_map_hptes; vhc->unmap_hptes = spapr_unmap_hptes; - vhc->store_hpte = spapr_store_hpte; + vhc->hpte_set_c = spapr_hpte_set_c; + vhc->hpte_set_r = spapr_hpte_set_r; vhc->get_pate = spapr_get_pate; vhc->encode_hpt_for_kvm_pr = spapr_encode_hpt_for_kvm_pr; xic->ics_get = spapr_ics_get; @@ -4366,37 +4395,57 @@ static const TypeInfo spapr_machine_info = { type_init(spapr_machine_register_##suffix) /* + * pseries-4.1 + */ +static void spapr_machine_4_1_class_options(MachineClass *mc) +{ + /* Defaults for the latest behaviour inherited from the base class */ +} + +DEFINE_SPAPR_MACHINE(4_1, "4.1", true); + +/* * pseries-4.0 */ static void spapr_machine_4_0_class_options(MachineClass *mc) { - /* Defaults for the latest behaviour inherited from the base class */ + spapr_machine_4_1_class_options(mc); + compat_props_add(mc->compat_props, hw_compat_4_0, hw_compat_4_0_len); } -DEFINE_SPAPR_MACHINE(4_0, "4.0", true); +DEFINE_SPAPR_MACHINE(4_0, "4.0", false); /* * pseries-3.1 */ +static void phb_placement_3_1(SpaprMachineState *spapr, uint32_t index, + uint64_t *buid, hwaddr *pio, + hwaddr *mmio32, hwaddr *mmio64, + unsigned n_dma, uint32_t *liobns, + hwaddr *nv2gpa, hwaddr *nv2atsd, Error **errp) +{ + spapr_phb_placement(spapr, index, buid, pio, mmio32, mmio64, n_dma, liobns, + nv2gpa, nv2atsd, errp); + *nv2gpa = 0; + *nv2atsd = 0; +} + static void spapr_machine_3_1_class_options(MachineClass *mc) { SpaprMachineClass *smc = SPAPR_MACHINE_CLASS(mc); - static GlobalProperty compat[] = { - { TYPE_SPAPR_MACHINE, "host-model", "passthrough" }, - { TYPE_SPAPR_MACHINE, "host-serial", "passthrough" }, - }; spapr_machine_4_0_class_options(mc); compat_props_add(mc->compat_props, hw_compat_3_1, hw_compat_3_1_len); - compat_props_add(mc->compat_props, compat, G_N_ELEMENTS(compat)); mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0"); smc->update_dt_enabled = false; smc->dr_phb_enabled = false; + smc->broken_host_serial_model = true; smc->default_caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_BROKEN; smc->default_caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_BROKEN; smc->default_caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN; smc->default_caps.caps[SPAPR_CAP_LARGE_DECREMENTER] = SPAPR_CAP_OFF; + smc->phb_placement = phb_placement_3_1; } DEFINE_SPAPR_MACHINE(3_1, "3.1", false); @@ -4528,7 +4577,8 @@ DEFINE_SPAPR_MACHINE(2_8, "2.8", false); static void phb_placement_2_7(SpaprMachineState *spapr, uint32_t index, uint64_t *buid, hwaddr *pio, hwaddr *mmio32, hwaddr *mmio64, - unsigned n_dma, uint32_t *liobns, Error **errp) + unsigned n_dma, uint32_t *liobns, + hwaddr *nv2gpa, hwaddr *nv2atsd, Error **errp) { /* Legacy PHB placement for pseries-2.7 and earlier machine types */ const uint64_t base_buid = 0x800000020000000ULL; @@ -4572,6 +4622,9 @@ static void phb_placement_2_7(SpaprMachineState *spapr, uint32_t index, * fallback behaviour of automatically splitting a large "32-bit" * window into contiguous 32-bit and 64-bit windows */ + + *nv2gpa = 0; + *nv2atsd = 0; } static void spapr_machine_2_7_class_options(MachineClass *mc) diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index edc5ed0e0c..9b1c10baa6 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -347,7 +347,7 @@ static void cap_hpt_maxpagesize_apply(SpaprMachineState *spapr, warn_report("Many guests require at least 64kiB hpt-max-page-size"); } - spapr_check_pagesize(spapr, qemu_getrampagesize(), errp); + spapr_check_pagesize(spapr, qemu_minrampagesize(), errp); } static bool spapr_pagesize_cb(void *opaque, uint32_t seg_pshift, @@ -609,7 +609,7 @@ static SpaprCapabilities default_caps_with_cpu(SpaprMachineState *spapr, uint8_t mps; if (kvmppc_hpt_needs_host_contiguous_pages()) { - mps = ctz64(qemu_getrampagesize()); + mps = ctz64(qemu_minrampagesize()); } else { mps = 34; /* allow everything up to 16GiB, i.e. everything */ } diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index 0761e10142..6c16d2b120 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -118,7 +118,7 @@ static target_ulong h_enter(PowerPCCPU *cpu, SpaprMachineState *spapr, ppc_hash64_unmap_hptes(cpu, hptes, ptex, 1); } - ppc_hash64_store_hpte(cpu, ptex + slot, pteh | HPTE64_V_HPTE_DIRTY, ptel); + spapr_store_hpte(cpu, ptex + slot, pteh | HPTE64_V_HPTE_DIRTY, ptel); args[0] = ptex + slot; return H_SUCCESS; @@ -131,7 +131,8 @@ typedef enum { REMOVE_HW = 3, } RemoveResult; -static RemoveResult remove_hpte(PowerPCCPU *cpu, target_ulong ptex, +static RemoveResult remove_hpte(PowerPCCPU *cpu + , target_ulong ptex, target_ulong avpn, target_ulong flags, target_ulong *vp, target_ulong *rp) @@ -155,7 +156,7 @@ static RemoveResult remove_hpte(PowerPCCPU *cpu, target_ulong ptex, } *vp = v; *rp = r; - ppc_hash64_store_hpte(cpu, ptex, HPTE64_V_HPTE_DIRTY, 0); + spapr_store_hpte(cpu, ptex, HPTE64_V_HPTE_DIRTY, 0); ppc_hash64_tlb_flush_hpte(cpu, ptex, v, r); return REMOVE_SUCCESS; } @@ -289,13 +290,13 @@ static target_ulong h_protect(PowerPCCPU *cpu, SpaprMachineState *spapr, r |= (flags << 55) & HPTE64_R_PP0; r |= (flags << 48) & HPTE64_R_KEY_HI; r |= flags & (HPTE64_R_PP | HPTE64_R_N | HPTE64_R_KEY_LO); - ppc_hash64_store_hpte(cpu, ptex, - (v & ~HPTE64_V_VALID) | HPTE64_V_HPTE_DIRTY, 0); + spapr_store_hpte(cpu, ptex, + (v & ~HPTE64_V_VALID) | HPTE64_V_HPTE_DIRTY, 0); ppc_hash64_tlb_flush_hpte(cpu, ptex, v, r); /* Flush the tlb */ check_tlb_flush(env, true); /* Don't need a memory barrier, due to qemu's global lock */ - ppc_hash64_store_hpte(cpu, ptex, v | HPTE64_V_HPTE_DIRTY, r); + spapr_store_hpte(cpu, ptex, v | HPTE64_V_HPTE_DIRTY, r); return H_SUCCESS; } @@ -304,8 +305,8 @@ static target_ulong h_read(PowerPCCPU *cpu, SpaprMachineState *spapr, { target_ulong flags = args[0]; target_ulong ptex = args[1]; - uint8_t *hpte; int i, ridx, n_entries = 1; + const ppc_hash_pte64_t *hptes; if (!valid_ptex(cpu, ptex)) { return H_PARAMETER; @@ -317,13 +318,12 @@ static target_ulong h_read(PowerPCCPU *cpu, SpaprMachineState *spapr, n_entries = 4; } - hpte = spapr->htab + (ptex * HASH_PTE_SIZE_64); - + hptes = ppc_hash64_map_hptes(cpu, ptex, n_entries); for (i = 0, ridx = 0; i < n_entries; i++) { - args[ridx++] = ldq_p(hpte); - args[ridx++] = ldq_p(hpte + (HASH_PTE_SIZE_64/2)); - hpte += HASH_PTE_SIZE_64; + args[ridx++] = ppc_hash64_hpte0(cpu, hptes, i); + args[ridx++] = ppc_hash64_hpte1(cpu, hptes, i); } + ppc_hash64_unmap_hptes(cpu, hptes, ptex, n_entries); return H_SUCCESS; } @@ -1400,7 +1400,8 @@ static target_ulong h_register_process_table(PowerPCCPU *cpu, else if (flags & FLAG_HASH_PROC_TBL) /* Hash with process tables */ update_lpcr |= LPCR_UPRT; if (flags & FLAG_GTSE) /* Guest translation shootdown enable */ - update_lpcr |= FLAG_GTSE; + update_lpcr |= LPCR_GTSE; + spapr_set_all_lpcrs(update_lpcr, LPCR_UPRT | LPCR_HR | LPCR_GTSE); if (kvm_enabled()) { diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index 253e4de7fd..b1f79ea9de 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -16,6 +16,7 @@ #include "hw/ppc/spapr_xive.h" #include "hw/ppc/xics.h" #include "hw/ppc/xics_spapr.h" +#include "cpu-models.h" #include "sysemu/kvm.h" #include "trace.h" @@ -66,36 +67,11 @@ void spapr_irq_msi_reset(SpaprMachineState *spapr) * XICS IRQ backend. */ -static ICSState *spapr_ics_create(SpaprMachineState *spapr, - int nr_irqs, Error **errp) -{ - Error *local_err = NULL; - Object *obj; - - obj = object_new(TYPE_ICS_SIMPLE); - object_property_add_child(OBJECT(spapr), "ics", obj, &error_abort); - object_property_add_const_link(obj, ICS_PROP_XICS, OBJECT(spapr), - &error_abort); - object_property_set_int(obj, nr_irqs, "nr-irqs", &local_err); - if (local_err) { - goto error; - } - object_property_set_bool(obj, true, "realized", &local_err); - if (local_err) { - goto error; - } - - return ICS_BASE(obj); - -error: - error_propagate(errp, local_err); - return NULL; -} - static void spapr_irq_init_xics(SpaprMachineState *spapr, int nr_irqs, Error **errp) { MachineState *machine = MACHINE(spapr); + Object *obj; Error *local_err = NULL; bool xics_kvm = false; @@ -107,7 +83,8 @@ static void spapr_irq_init_xics(SpaprMachineState *spapr, int nr_irqs, if (machine_kernel_irqchip_required(machine) && !xics_kvm) { error_prepend(&local_err, "kernel_irqchip requested but unavailable: "); - goto error; + error_propagate(errp, local_err); + return; } error_free(local_err); local_err = NULL; @@ -117,10 +94,18 @@ static void spapr_irq_init_xics(SpaprMachineState *spapr, int nr_irqs, xics_spapr_init(spapr); } - spapr->ics = spapr_ics_create(spapr, nr_irqs, &local_err); + obj = object_new(TYPE_ICS_SIMPLE); + object_property_add_child(OBJECT(spapr), "ics", obj, &error_abort); + object_property_add_const_link(obj, ICS_PROP_XICS, OBJECT(spapr), + &error_fatal); + object_property_set_int(obj, nr_irqs, "nr-irqs", &error_fatal); + object_property_set_bool(obj, true, "realized", &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } -error: - error_propagate(errp, local_err); + spapr->ics = ICS_BASE(obj); } #define ICS_IRQ_FREE(ics, srcno) \ @@ -582,12 +567,55 @@ SpaprIrq spapr_irq_dual = { .get_nodename = spapr_irq_get_nodename_dual, }; + +static void spapr_irq_check(SpaprMachineState *spapr, Error **errp) +{ + MachineState *machine = MACHINE(spapr); + + /* + * Sanity checks on non-P9 machines. On these, XIVE is not + * advertised, see spapr_dt_ov5_platform_support() + */ + if (!ppc_type_check_compat(machine->cpu_type, CPU_POWERPC_LOGICAL_3_00, + 0, spapr->max_compat_pvr)) { + /* + * If the 'dual' interrupt mode is selected, force XICS as CAS + * negotiation is useless. + */ + if (spapr->irq == &spapr_irq_dual) { + spapr->irq = &spapr_irq_xics; + return; + } + + /* + * Non-P9 machines using only XIVE is a bogus setup. We have two + * scenarios to take into account because of the compat mode: + * + * 1. POWER7/8 machines should fail to init later on when creating + * the XIVE interrupt presenters because a POWER9 exception + * model is required. + + * 2. POWER9 machines using the POWER8 compat mode won't fail and + * will let the OS boot with a partial XIVE setup : DT + * properties but no hcalls. + * + * To cover both and not confuse the OS, add an early failure in + * QEMU. + */ + if (spapr->irq == &spapr_irq_xive) { + error_setg(errp, "XIVE-only machines require a POWER9 CPU"); + return; + } + } +} + /* * sPAPR IRQ frontend routines for devices */ void spapr_irq_init(SpaprMachineState *spapr, Error **errp) { MachineState *machine = MACHINE(spapr); + Error *local_err = NULL; if (machine_kernel_irqchip_split(machine)) { error_setg(errp, "kernel_irqchip split mode not supported on pseries"); @@ -600,6 +628,12 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **errp) return; } + spapr_irq_check(spapr, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + /* Initialize the MSI IRQ allocator. */ if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { spapr_irq_msi_init(spapr, spapr->irq->nr_msis); diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 20915d2b3c..97961b0128 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -719,26 +719,10 @@ param_error_exit: rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); } -static int pci_spapr_swizzle(int slot, int pin) -{ - return (slot + pin) % PCI_NUM_PINS; -} - -static int pci_spapr_map_irq(PCIDevice *pci_dev, int irq_num) -{ - /* - * Here we need to convert pci_dev + irq_num to some unique value - * which is less than number of IRQs on the specific bus (4). We - * use standard PCI swizzling, that is (slot number + pin number) - * % 4. - */ - return pci_spapr_swizzle(PCI_SLOT(pci_dev->devfn), irq_num); -} - static void pci_spapr_set_irq(void *opaque, int irq_num, int level) { /* - * Here we use the number returned by pci_spapr_map_irq to find a + * Here we use the number returned by pci_swizzle_map_irq_fn to find a * corresponding qemu_irq. */ SpaprPhbState *phb = opaque; @@ -1355,6 +1339,8 @@ static void spapr_populate_pci_child_dt(PCIDevice *dev, void *fdt, int offset, if (sphb->pcie_ecs && pci_is_express(dev)) { _FDT(fdt_setprop_cell(fdt, offset, "ibm,pci-config-space-type", 0x1)); } + + spapr_phb_nvgpu_populate_pcidev_dt(dev, fdt, offset, sphb); } /* create OF node for pci device and required OF DT properties */ @@ -1488,9 +1474,7 @@ static void spapr_pci_plug(HotplugHandler *plug_handler, } out: - if (local_err) { - error_propagate(errp, local_err); - } + error_propagate(errp, local_err); } static void spapr_pci_unplug(HotplugHandler *plug_handler, @@ -1589,6 +1573,8 @@ static void spapr_phb_unrealize(DeviceState *dev, Error **errp) int i; const unsigned windows_supported = spapr_phb_windows_supported(sphb); + spapr_phb_nvgpu_free(sphb); + if (sphb->msi) { g_hash_table_unref(sphb->msi); sphb->msi = NULL; @@ -1640,6 +1626,28 @@ static void spapr_phb_unrealize(DeviceState *dev, Error **errp) memory_region_del_subregion(get_system_memory(), &sphb->mem32window); } +static bool spapr_phb_allows_extended_config_space(PCIBus *bus) +{ + SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(BUS(bus)->parent); + + return sphb->pcie_ecs; +} + +static void spapr_phb_root_bus_class_init(ObjectClass *klass, void *data) +{ + PCIBusClass *pbc = PCI_BUS_CLASS(klass); + + pbc->allows_extended_config_space = spapr_phb_allows_extended_config_space; +} + +#define TYPE_SPAPR_PHB_ROOT_BUS "pci" + +static const TypeInfo spapr_phb_root_bus_info = { + .name = TYPE_SPAPR_PHB_ROOT_BUS, + .parent = TYPE_PCI_BUS, + .class_init = spapr_phb_root_bus_class_init, +}; + static void spapr_phb_realize(DeviceState *dev, Error **errp) { /* We don't use SPAPR_MACHINE() in order to exit gracefully if the user @@ -1742,9 +1750,10 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp) &sphb->iowindow); bus = pci_register_root_bus(dev, NULL, - pci_spapr_set_irq, pci_spapr_map_irq, sphb, + pci_spapr_set_irq, pci_swizzle_map_irq_fn, sphb, &sphb->memspace, &sphb->iospace, - PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS); + PCI_DEVFN(0, 0), PCI_NUM_PINS, + TYPE_SPAPR_PHB_ROOT_BUS); phb->bus = bus; qbus_set_hotplug_handler(BUS(phb->bus), OBJECT(sphb), NULL); @@ -1877,8 +1886,14 @@ void spapr_phb_dma_reset(SpaprPhbState *sphb) static void spapr_phb_reset(DeviceState *qdev) { SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(qdev); + Error *errp = NULL; spapr_phb_dma_reset(sphb); + spapr_phb_nvgpu_free(sphb); + spapr_phb_nvgpu_setup(sphb, &errp); + if (errp) { + error_report_err(errp); + } /* Reset the IOMMU state */ object_child_foreach(OBJECT(qdev), spapr_phb_children_reset, NULL); @@ -1911,6 +1926,8 @@ static Property spapr_phb_properties[] = { pre_2_8_migration, false), DEFINE_PROP_BOOL("pcie-extended-configuration-space", SpaprPhbState, pcie_ecs, true), + DEFINE_PROP_UINT64("gpa", SpaprPhbState, nv2_gpa_win_addr, 0), + DEFINE_PROP_UINT64("atsd", SpaprPhbState, nv2_atsd_win_addr, 0), DEFINE_PROP_END_OF_LIST(), }; @@ -2143,7 +2160,6 @@ int spapr_populate_pci_dt(SpaprPhbState *phb, uint32_t intc_phandle, void *fdt, uint32_t nr_msis, int *node_offset) { int bus_off, i, j, ret; - gchar *nodename; uint32_t bus_range[] = { cpu_to_be32(0), cpu_to_be32(0xff) }; struct { uint32_t hi; @@ -2191,11 +2207,10 @@ int spapr_populate_pci_dt(SpaprPhbState *phb, uint32_t intc_phandle, void *fdt, PCIBus *bus = PCI_HOST_BRIDGE(phb)->bus; SpaprFdt s_fdt; SpaprDrc *drc; + Error *errp = NULL; /* Start populating the FDT */ - nodename = g_strdup_printf("pci@%" PRIx64, phb->buid); - _FDT(bus_off = fdt_add_subnode(fdt, 0, nodename)); - g_free(nodename); + _FDT(bus_off = fdt_add_subnode(fdt, 0, phb->dtbusname)); if (node_offset) { *node_offset = bus_off; } @@ -2228,14 +2243,14 @@ int spapr_populate_pci_dt(SpaprPhbState *phb, uint32_t intc_phandle, void *fdt, } /* Build the interrupt-map, this must matches what is done - * in pci_spapr_map_irq + * in pci_swizzle_map_irq_fn */ _FDT(fdt_setprop(fdt, bus_off, "interrupt-map-mask", &interrupt_map_mask, sizeof(interrupt_map_mask))); for (i = 0; i < PCI_SLOT_MAX; i++) { for (j = 0; j < PCI_NUM_PINS; j++) { uint32_t *irqmap = interrupt_map[i*PCI_NUM_PINS + j]; - int lsi_num = pci_spapr_swizzle(i, j); + int lsi_num = pci_swizzle(i, j); irqmap[0] = cpu_to_be32(b_ddddd(i)|b_fff(0)); irqmap[1] = 0; @@ -2283,6 +2298,12 @@ int spapr_populate_pci_dt(SpaprPhbState *phb, uint32_t intc_phandle, void *fdt, return ret; } + spapr_phb_nvgpu_populate_dt(phb, fdt, bus_off, &errp); + if (errp) { + error_report_err(errp); + } + spapr_phb_nvgpu_ram_populate_dt(phb, fdt); + return 0; } @@ -2327,6 +2348,7 @@ void spapr_pci_rtas_init(void) static void spapr_pci_register_types(void) { type_register_static(&spapr_phb_info); + type_register_static(&spapr_phb_root_bus_info); } type_init(spapr_pci_register_types) diff --git a/hw/ppc/spapr_pci_nvlink2.c b/hw/ppc/spapr_pci_nvlink2.c new file mode 100644 index 0000000000..eda8c752aa --- /dev/null +++ b/hw/ppc/spapr_pci_nvlink2.c @@ -0,0 +1,450 @@ +/* + * QEMU sPAPR PCI for NVLink2 pass through + * + * Copyright (c) 2019 Alexey Kardashevskiy, IBM Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu-common.h" +#include "hw/pci/pci.h" +#include "hw/pci-host/spapr.h" +#include "qemu/error-report.h" +#include "hw/ppc/fdt.h" +#include "hw/pci/pci_bridge.h" + +#define PHANDLE_PCIDEV(phb, pdev) (0x12000000 | \ + (((phb)->index) << 16) | ((pdev)->devfn)) +#define PHANDLE_GPURAM(phb, n) (0x110000FF | ((n) << 8) | \ + (((phb)->index) << 16)) +#define PHANDLE_NVLINK(phb, gn, nn) (0x00130000 | (((phb)->index) << 8) | \ + ((gn) << 4) | (nn)) + +#define SPAPR_GPU_NUMA_ID (cpu_to_be32(1)) + +struct spapr_phb_pci_nvgpu_config { + uint64_t nv2_ram_current; + uint64_t nv2_atsd_current; + int num; /* number of non empty (i.e. tgt!=0) entries in slots[] */ + struct spapr_phb_pci_nvgpu_slot { + uint64_t tgt; + uint64_t gpa; + unsigned numa_id; + PCIDevice *gpdev; + int linknum; + struct { + uint64_t atsd_gpa; + PCIDevice *npdev; + uint32_t link_speed; + } links[NVGPU_MAX_LINKS]; + } slots[NVGPU_MAX_NUM]; + Error *errp; +}; + +static struct spapr_phb_pci_nvgpu_slot * +spapr_nvgpu_get_slot(struct spapr_phb_pci_nvgpu_config *nvgpus, uint64_t tgt) +{ + int i; + + /* Search for partially collected "slot" */ + for (i = 0; i < nvgpus->num; ++i) { + if (nvgpus->slots[i].tgt == tgt) { + return &nvgpus->slots[i]; + } + } + + if (nvgpus->num == ARRAY_SIZE(nvgpus->slots)) { + return NULL; + } + + i = nvgpus->num; + nvgpus->slots[i].tgt = tgt; + ++nvgpus->num; + + return &nvgpus->slots[i]; +} + +static void spapr_pci_collect_nvgpu(struct spapr_phb_pci_nvgpu_config *nvgpus, + PCIDevice *pdev, uint64_t tgt, + MemoryRegion *mr, Error **errp) +{ + MachineState *machine = MACHINE(qdev_get_machine()); + SpaprMachineState *spapr = SPAPR_MACHINE(machine); + struct spapr_phb_pci_nvgpu_slot *nvslot = spapr_nvgpu_get_slot(nvgpus, tgt); + + if (!nvslot) { + error_setg(errp, "Found too many GPUs per vPHB"); + return; + } + g_assert(!nvslot->gpdev); + nvslot->gpdev = pdev; + + nvslot->gpa = nvgpus->nv2_ram_current; + nvgpus->nv2_ram_current += memory_region_size(mr); + nvslot->numa_id = spapr->gpu_numa_id; + ++spapr->gpu_numa_id; +} + +static void spapr_pci_collect_nvnpu(struct spapr_phb_pci_nvgpu_config *nvgpus, + PCIDevice *pdev, uint64_t tgt, + MemoryRegion *mr, Error **errp) +{ + struct spapr_phb_pci_nvgpu_slot *nvslot = spapr_nvgpu_get_slot(nvgpus, tgt); + int j; + + if (!nvslot) { + error_setg(errp, "Found too many NVLink bridges per vPHB"); + return; + } + + j = nvslot->linknum; + if (j == ARRAY_SIZE(nvslot->links)) { + error_setg(errp, "Found too many NVLink bridges per GPU"); + return; + } + ++nvslot->linknum; + + g_assert(!nvslot->links[j].npdev); + nvslot->links[j].npdev = pdev; + nvslot->links[j].atsd_gpa = nvgpus->nv2_atsd_current; + nvgpus->nv2_atsd_current += memory_region_size(mr); + nvslot->links[j].link_speed = + object_property_get_uint(OBJECT(pdev), "nvlink2-link-speed", NULL); +} + +static void spapr_phb_pci_collect_nvgpu(PCIBus *bus, PCIDevice *pdev, + void *opaque) +{ + PCIBus *sec_bus; + Object *po = OBJECT(pdev); + uint64_t tgt = object_property_get_uint(po, "nvlink2-tgt", NULL); + + if (tgt) { + Error *local_err = NULL; + struct spapr_phb_pci_nvgpu_config *nvgpus = opaque; + Object *mr_gpu = object_property_get_link(po, "nvlink2-mr[0]", NULL); + Object *mr_npu = object_property_get_link(po, "nvlink2-atsd-mr[0]", + NULL); + + g_assert(mr_gpu || mr_npu); + if (mr_gpu) { + spapr_pci_collect_nvgpu(nvgpus, pdev, tgt, MEMORY_REGION(mr_gpu), + &local_err); + } else { + spapr_pci_collect_nvnpu(nvgpus, pdev, tgt, MEMORY_REGION(mr_npu), + &local_err); + } + error_propagate(&nvgpus->errp, local_err); + } + if ((pci_default_read_config(pdev, PCI_HEADER_TYPE, 1) != + PCI_HEADER_TYPE_BRIDGE)) { + return; + } + + sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev)); + if (!sec_bus) { + return; + } + + pci_for_each_device(sec_bus, pci_bus_num(sec_bus), + spapr_phb_pci_collect_nvgpu, opaque); +} + +void spapr_phb_nvgpu_setup(SpaprPhbState *sphb, Error **errp) +{ + int i, j, valid_gpu_num; + PCIBus *bus; + + /* Search for GPUs and NPUs */ + if (!sphb->nv2_gpa_win_addr || !sphb->nv2_atsd_win_addr) { + return; + } + + sphb->nvgpus = g_new0(struct spapr_phb_pci_nvgpu_config, 1); + sphb->nvgpus->nv2_ram_current = sphb->nv2_gpa_win_addr; + sphb->nvgpus->nv2_atsd_current = sphb->nv2_atsd_win_addr; + + bus = PCI_HOST_BRIDGE(sphb)->bus; + pci_for_each_device(bus, pci_bus_num(bus), + spapr_phb_pci_collect_nvgpu, sphb->nvgpus); + + if (sphb->nvgpus->errp) { + error_propagate(errp, sphb->nvgpus->errp); + sphb->nvgpus->errp = NULL; + goto cleanup_exit; + } + + /* Add found GPU RAM and ATSD MRs if found */ + for (i = 0, valid_gpu_num = 0; i < sphb->nvgpus->num; ++i) { + Object *nvmrobj; + struct spapr_phb_pci_nvgpu_slot *nvslot = &sphb->nvgpus->slots[i]; + + if (!nvslot->gpdev) { + continue; + } + nvmrobj = object_property_get_link(OBJECT(nvslot->gpdev), + "nvlink2-mr[0]", NULL); + /* ATSD is pointless without GPU RAM MR so skip those */ + if (!nvmrobj) { + continue; + } + + ++valid_gpu_num; + memory_region_add_subregion(get_system_memory(), nvslot->gpa, + MEMORY_REGION(nvmrobj)); + + for (j = 0; j < nvslot->linknum; ++j) { + Object *atsdmrobj; + + atsdmrobj = object_property_get_link(OBJECT(nvslot->links[j].npdev), + "nvlink2-atsd-mr[0]", NULL); + if (!atsdmrobj) { + continue; + } + memory_region_add_subregion(get_system_memory(), + nvslot->links[j].atsd_gpa, + MEMORY_REGION(atsdmrobj)); + } + } + + if (valid_gpu_num) { + return; + } + /* We did not find any interesting GPU */ +cleanup_exit: + g_free(sphb->nvgpus); + sphb->nvgpus = NULL; +} + +void spapr_phb_nvgpu_free(SpaprPhbState *sphb) +{ + int i, j; + + if (!sphb->nvgpus) { + return; + } + + for (i = 0; i < sphb->nvgpus->num; ++i) { + struct spapr_phb_pci_nvgpu_slot *nvslot = &sphb->nvgpus->slots[i]; + Object *nv_mrobj = object_property_get_link(OBJECT(nvslot->gpdev), + "nvlink2-mr[0]", NULL); + + if (nv_mrobj) { + memory_region_del_subregion(get_system_memory(), + MEMORY_REGION(nv_mrobj)); + } + for (j = 0; j < nvslot->linknum; ++j) { + PCIDevice *npdev = nvslot->links[j].npdev; + Object *atsd_mrobj; + atsd_mrobj = object_property_get_link(OBJECT(npdev), + "nvlink2-atsd-mr[0]", NULL); + if (atsd_mrobj) { + memory_region_del_subregion(get_system_memory(), + MEMORY_REGION(atsd_mrobj)); + } + } + } + g_free(sphb->nvgpus); + sphb->nvgpus = NULL; +} + +void spapr_phb_nvgpu_populate_dt(SpaprPhbState *sphb, void *fdt, int bus_off, + Error **errp) +{ + int i, j, atsdnum = 0; + uint64_t atsd[8]; /* The existing limitation of known guests */ + + if (!sphb->nvgpus) { + return; + } + + for (i = 0; (i < sphb->nvgpus->num) && (atsdnum < ARRAY_SIZE(atsd)); ++i) { + struct spapr_phb_pci_nvgpu_slot *nvslot = &sphb->nvgpus->slots[i]; + + if (!nvslot->gpdev) { + continue; + } + for (j = 0; j < nvslot->linknum; ++j) { + if (!nvslot->links[j].atsd_gpa) { + continue; + } + + if (atsdnum == ARRAY_SIZE(atsd)) { + error_report("Only %"PRIuPTR" ATSD registers supported", + ARRAY_SIZE(atsd)); + break; + } + atsd[atsdnum] = cpu_to_be64(nvslot->links[j].atsd_gpa); + ++atsdnum; + } + } + + if (!atsdnum) { + error_setg(errp, "No ATSD registers found"); + return; + } + + if (!spapr_phb_eeh_available(sphb)) { + /* + * ibm,mmio-atsd contains ATSD registers; these belong to an NPU PHB + * which we do not emulate as a separate device. Instead we put + * ibm,mmio-atsd to the vPHB with GPU and make sure that we do not + * put GPUs from different IOMMU groups to the same vPHB to ensure + * that the guest will use ATSDs from the corresponding NPU. + */ + error_setg(errp, "ATSD requires separate vPHB per GPU IOMMU group"); + return; + } + + _FDT((fdt_setprop(fdt, bus_off, "ibm,mmio-atsd", atsd, + atsdnum * sizeof(atsd[0])))); +} + +void spapr_phb_nvgpu_ram_populate_dt(SpaprPhbState *sphb, void *fdt) +{ + int i, j, linkidx, npuoff; + char *npuname; + + if (!sphb->nvgpus) { + return; + } + + npuname = g_strdup_printf("npuphb%d", sphb->index); + npuoff = fdt_add_subnode(fdt, 0, npuname); + _FDT(npuoff); + _FDT(fdt_setprop_cell(fdt, npuoff, "#address-cells", 1)); + _FDT(fdt_setprop_cell(fdt, npuoff, "#size-cells", 0)); + /* Advertise NPU as POWER9 so the guest can enable NPU2 contexts */ + _FDT((fdt_setprop_string(fdt, npuoff, "compatible", "ibm,power9-npu"))); + g_free(npuname); + + for (i = 0, linkidx = 0; i < sphb->nvgpus->num; ++i) { + for (j = 0; j < sphb->nvgpus->slots[i].linknum; ++j) { + char *linkname = g_strdup_printf("link@%d", linkidx); + int off = fdt_add_subnode(fdt, npuoff, linkname); + + _FDT(off); + /* _FDT((fdt_setprop_cell(fdt, off, "reg", linkidx))); */ + _FDT((fdt_setprop_string(fdt, off, "compatible", + "ibm,npu-link"))); + _FDT((fdt_setprop_cell(fdt, off, "phandle", + PHANDLE_NVLINK(sphb, i, j)))); + _FDT((fdt_setprop_cell(fdt, off, "ibm,npu-link-index", linkidx))); + g_free(linkname); + ++linkidx; + } + } + + /* Add memory nodes for GPU RAM and mark them unusable */ + for (i = 0; i < sphb->nvgpus->num; ++i) { + struct spapr_phb_pci_nvgpu_slot *nvslot = &sphb->nvgpus->slots[i]; + Object *nv_mrobj = object_property_get_link(OBJECT(nvslot->gpdev), + "nvlink2-mr[0]", NULL); + uint32_t associativity[] = { + cpu_to_be32(0x4), + SPAPR_GPU_NUMA_ID, + SPAPR_GPU_NUMA_ID, + SPAPR_GPU_NUMA_ID, + cpu_to_be32(nvslot->numa_id) + }; + uint64_t size = object_property_get_uint(nv_mrobj, "size", NULL); + uint64_t mem_reg[2] = { cpu_to_be64(nvslot->gpa), cpu_to_be64(size) }; + char *mem_name = g_strdup_printf("memory@%"PRIx64, nvslot->gpa); + int off = fdt_add_subnode(fdt, 0, mem_name); + + _FDT(off); + _FDT((fdt_setprop_string(fdt, off, "device_type", "memory"))); + _FDT((fdt_setprop(fdt, off, "reg", mem_reg, sizeof(mem_reg)))); + _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity, + sizeof(associativity)))); + + _FDT((fdt_setprop_string(fdt, off, "compatible", + "ibm,coherent-device-memory"))); + + mem_reg[1] = cpu_to_be64(0); + _FDT((fdt_setprop(fdt, off, "linux,usable-memory", mem_reg, + sizeof(mem_reg)))); + _FDT((fdt_setprop_cell(fdt, off, "phandle", + PHANDLE_GPURAM(sphb, i)))); + g_free(mem_name); + } + +} + +void spapr_phb_nvgpu_populate_pcidev_dt(PCIDevice *dev, void *fdt, int offset, + SpaprPhbState *sphb) +{ + int i, j; + + if (!sphb->nvgpus) { + return; + } + + for (i = 0; i < sphb->nvgpus->num; ++i) { + struct spapr_phb_pci_nvgpu_slot *nvslot = &sphb->nvgpus->slots[i]; + + /* Skip "slot" without attached GPU */ + if (!nvslot->gpdev) { + continue; + } + if (dev == nvslot->gpdev) { + uint32_t npus[nvslot->linknum]; + + for (j = 0; j < nvslot->linknum; ++j) { + PCIDevice *npdev = nvslot->links[j].npdev; + + npus[j] = cpu_to_be32(PHANDLE_PCIDEV(sphb, npdev)); + } + _FDT(fdt_setprop(fdt, offset, "ibm,npu", npus, + j * sizeof(npus[0]))); + _FDT((fdt_setprop_cell(fdt, offset, "phandle", + PHANDLE_PCIDEV(sphb, dev)))); + continue; + } + + for (j = 0; j < nvslot->linknum; ++j) { + if (dev != nvslot->links[j].npdev) { + continue; + } + + _FDT((fdt_setprop_cell(fdt, offset, "phandle", + PHANDLE_PCIDEV(sphb, dev)))); + _FDT(fdt_setprop_cell(fdt, offset, "ibm,gpu", + PHANDLE_PCIDEV(sphb, nvslot->gpdev))); + _FDT((fdt_setprop_cell(fdt, offset, "ibm,nvlink", + PHANDLE_NVLINK(sphb, i, j)))); + /* + * If we ever want to emulate GPU RAM at the same location as on + * the host - here is the encoding GPA->TGT: + * + * gta = ((sphb->nv2_gpa >> 42) & 0x1) << 42; + * gta |= ((sphb->nv2_gpa >> 45) & 0x3) << 43; + * gta |= ((sphb->nv2_gpa >> 49) & 0x3) << 45; + * gta |= sphb->nv2_gpa & ((1UL << 43) - 1); + */ + _FDT(fdt_setprop_cell(fdt, offset, "memory-region", + PHANDLE_GPURAM(sphb, i))); + _FDT(fdt_setprop_u64(fdt, offset, "ibm,device-tgt-addr", + nvslot->tgt)); + _FDT(fdt_setprop_cell(fdt, offset, "ibm,nvlink-speed", + nvslot->links[j].link_speed)); + } + } +} diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 24c45b12d4..ee24212765 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -404,7 +404,7 @@ void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn) token -= RTAS_TOKEN_BASE; - assert(!rtas_table[token].name); + assert(!name || !rtas_table[token].name); rtas_table[token].name = name; rtas_table[token].fn = fn; diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events index 0af155ed32..f76448f532 100644 --- a/hw/ppc/trace-events +++ b/hw/ppc/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/ppc/spapr_pci.c +# spapr_pci.c spapr_pci_msi(const char *msg, uint32_t ca) "%s (cfg=0x%x)" spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=0x%"PRIx64 spapr_pci_rtas_ibm_change_msi(unsigned cfg, unsigned func, unsigned req, unsigned first) "cfgaddr 0x%x func %u, requested %u, first irq %u" @@ -9,16 +9,15 @@ spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@0x%"PRIx64" spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u" spapr_pci_msi_retry(unsigned config_addr, unsigned req_num, unsigned max_irqs) "Guest device at 0x%x asked %u, have only %u" -# hw/ppc/spapr.c +# spapr.c spapr_cas_failed(unsigned long n) "DT diff buffer is too small: %ld bytes" spapr_cas_continue(unsigned long n) "Copy changes to the guest: %ld bytes" -spapr_irq_alloc(int irq) "irq %d" -spapr_irq_alloc_block(int first, int num, bool lsi, int align) "first irq %d, %d irqs, lsi=%d, alignnum %d" + +# spapr_irq.c spapr_irq_free(int src, int irq, int num) "Source#%d, first irq %d, %d irqs" spapr_irq_free_warn(int src, int irq) "Source#%d, irq %d is already free" -# hw/ppc/spapr_hcall.c -spapr_cas_pvr_try(uint32_t pvr) "0x%x" +# spapr_hcall.c spapr_cas_pvr(uint32_t cur_pvr, bool explicit_match, uint32_t new_pvr) "current=0x%x, explicit_match=%u, new=0x%x" spapr_h_resize_hpt_prepare(uint64_t flags, uint64_t shift) "flags=0x%"PRIx64", shift=%"PRIu64 spapr_h_resize_hpt_commit(uint64_t flags, uint64_t shift) "flags=0x%"PRIx64", shift=%"PRIu64 @@ -26,7 +25,7 @@ spapr_update_dt(unsigned cb) "New blob %u bytes" spapr_update_dt_failed_size(unsigned cbold, unsigned cbnew, unsigned magic) "Old blob %u bytes, new blob %u bytes, magic 0x%x" spapr_update_dt_failed_check(unsigned cbold, unsigned cbnew, unsigned magic) "Old blob %u bytes, new blob %u bytes, magic 0x%x" -# hw/ppc/spapr_iommu.c +# spapr_iommu.c spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64 spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64 spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64 @@ -39,70 +38,67 @@ spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned perm, un spapr_iommu_new_table(uint64_t liobn, void *table, int fd) "liobn=0x%"PRIx64" table=%p fd=%d" spapr_iommu_pre_save(uint64_t liobn, uint32_t nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" bus_offset=0x%"PRIx64" ps=%"PRIu32 spapr_iommu_post_load(uint64_t liobn, uint32_t pre_nb, uint32_t post_nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" => 0x%"PRIx32" bus_offset=0x%"PRIx64" ps=%"PRIu32 + +# spapr_rtas_ddw.c spapr_iommu_ddw_query(uint64_t buid, uint32_t cfgaddr, unsigned wa, uint64_t win_size, uint32_t pgmask) "buid=0x%"PRIx64" addr=0x%"PRIx32", %u windows available, max window size=0x%"PRIx64", mask=0x%"PRIx32 spapr_iommu_ddw_create(uint64_t buid, uint32_t cfgaddr, uint64_t pg_size, uint64_t req_size, uint64_t start, uint32_t liobn) "buid=0x%"PRIx64" addr=0x%"PRIx32", page size=0x%"PRIx64", requested=0x%"PRIx64", start addr=0x%"PRIx64", liobn=0x%"PRIx32 spapr_iommu_ddw_remove(uint32_t liobn) "liobn=0x%"PRIx32 spapr_iommu_ddw_reset(uint64_t buid, uint32_t cfgaddr) "buid=0x%"PRIx64" addr=0x%"PRIx32 -# hw/ppc/spapr_drc.c +# spapr_drc.c spapr_drc_set_isolation_state(uint32_t index, int state) "drc: 0x%"PRIx32", state: 0x%"PRIx32 spapr_drc_set_isolation_state_finalizing(uint32_t index) "drc: 0x%"PRIx32 -spapr_drc_set_isolation_state_deferring(uint32_t index) "drc: 0x%"PRIx32 spapr_drc_set_dr_indicator(uint32_t index, int state) "drc: 0x%"PRIx32", state: 0x%x" spapr_drc_set_allocation_state(uint32_t index, int state) "drc: 0x%"PRIx32", state: 0x%x" spapr_drc_set_allocation_state_finalizing(uint32_t index) "drc: 0x%"PRIx32 spapr_drc_set_configured(uint32_t index) "drc: 0x%"PRIx32 -spapr_drc_set_configured_skipping(uint32_t index) "drc: 0x%"PRIx32", isolated device" spapr_drc_attach(uint32_t index) "drc: 0x%"PRIx32 spapr_drc_detach(uint32_t index) "drc: 0x%"PRIx32 spapr_drc_awaiting_quiesce(uint32_t index) "drc: 0x%"PRIx32 -spapr_drc_awaiting_allocation(uint32_t index) "drc: 0x%"PRIx32 spapr_drc_reset(uint32_t index) "drc: 0x%"PRIx32 spapr_drc_realize(uint32_t index) "drc: 0x%"PRIx32 spapr_drc_realize_child(uint32_t index, char *childname) "drc: 0x%"PRIx32", child name: %s" spapr_drc_realize_complete(uint32_t index) "drc: 0x%"PRIx32 spapr_drc_unrealize(uint32_t index) "drc: 0x%"PRIx32 -# hw/ppc/spapr_ovec.c +# spapr_ovec.c spapr_ovec_parse_vector(int vector, int byte, uint16_t vec_len, uint8_t entry) "read guest vector %2d, byte %3d / %3d: 0x%.2x" spapr_ovec_populate_dt(int byte, uint16_t vec_len, uint8_t entry) "encoding guest vector byte %3d / %3d: 0x%.2x" -# hw/ppc/spapr_rtas.c +# spapr_drc.c spapr_rtas_get_sensor_state_not_supported(uint32_t index, uint32_t type) "sensor index: 0x%"PRIx32", type: %"PRIu32 spapr_rtas_get_sensor_state_invalid(uint32_t index) "sensor index: 0x%"PRIx32 spapr_rtas_ibm_configure_connector_invalid(uint32_t index) "DRC index: 0x%"PRIx32 -spapr_rtas_ibm_configure_connector_missing_fdt(uint32_t index) "DRC index: 0x%"PRIx32 -# hw/ppc/spapr_vio.c +# spapr_vio.c spapr_vio_h_reg_crq(uint64_t reg, uint64_t queue_addr, uint64_t queue_len) "CRQ for dev 0x%" PRIx64 " registered at 0x%" PRIx64 "/0x%" PRIx64 spapr_vio_free_crq(uint32_t reg) "CRQ for dev 0x%" PRIx32 " freed" -# hw/ppc/ppc.c +# ppc.c ppc_tb_adjust(uint64_t offs1, uint64_t offs2, int64_t diff, int64_t seconds) "adjusted from 0x%"PRIx64" to 0x%"PRIx64", diff %"PRId64" (%"PRId64"s)" -# hw/ppc/prep.c +# prep.c prep_io_800_writeb(uint32_t addr, uint32_t val) "0x%08" PRIx32 " => 0x%02" PRIx32 prep_io_800_readb(uint32_t addr, uint32_t retval) "0x%08" PRIx32 " <= 0x%02" PRIx32 -# hw/ppc/prep_systemio.c +# prep_systemio.c prep_systemio_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" prep_systemio_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x" -# hw/ppc/rs6000_mc.c +# rs6000_mc.c rs6000mc_id_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" rs6000mc_presence_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" rs6000mc_size_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" rs6000mc_size_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x" rs6000mc_parity_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" -# hw/ppc/ppc4xx_pci.c +# ppc4xx_pci.c ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d" ppc4xx_pci_set_irq(int irq_num) "PCI irq %d" -# hw/ppc/ppc440_pcix.c +# ppc440_pcix.c ppc440_pcix_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d" ppc440_pcix_set_irq(int irq_num) "PCI irq %d" ppc440_pcix_update_pim(int idx, uint64_t size, uint64_t la) "Added window %d of size=0x%" PRIx64 " to CPU=0x%" PRIx64 ppc440_pcix_update_pom(int idx, uint32_t size, uint64_t la, uint64_t pcia) "Added window %d of size=0x%x from CPU=0x%" PRIx64 " to PCI=0x%" PRIx64 ppc440_pcix_reg_read(uint64_t addr, uint32_t val) "addr 0x%" PRIx64 " = 0x%" PRIx32 -ppc440_pcix_reg_write(uint64_t addr, uint64_t val) "addr 0x%" PRIx64 " = 0x%" PRIx64 diff --git a/hw/rdma/Kconfig b/hw/rdma/Kconfig new file mode 100644 index 0000000000..8e2211288f --- /dev/null +++ b/hw/rdma/Kconfig @@ -0,0 +1,3 @@ +config VMW_PVRDMA + default y if PCI_DEVICES + depends on PVRDMA && PCI && MSI_NONBROKEN diff --git a/hw/rdma/Makefile.objs b/hw/rdma/Makefile.objs index bd36cbf51c..819bb12a35 100644 --- a/hw/rdma/Makefile.objs +++ b/hw/rdma/Makefile.objs @@ -1,5 +1,3 @@ -ifeq ($(CONFIG_PVRDMA),y) -obj-$(CONFIG_PCI) += rdma_utils.o rdma_backend.o rdma_rm.o -obj-$(CONFIG_PCI) += vmw/pvrdma_dev_ring.o vmw/pvrdma_cmd.o \ +obj-$(CONFIG_VMW_PVRDMA) += rdma_utils.o rdma_backend.o rdma_rm.o rdma.o +obj-$(CONFIG_VMW_PVRDMA) += vmw/pvrdma_dev_ring.o vmw/pvrdma_cmd.o \ vmw/pvrdma_qp_ops.o vmw/pvrdma_main.o -endif diff --git a/hw/rdma/rdma.c b/hw/rdma/rdma.c new file mode 100644 index 0000000000..7bec0d0d2c --- /dev/null +++ b/hw/rdma/rdma.c @@ -0,0 +1,30 @@ +/* + * RDMA device interface + * + * Copyright (C) 2018 Oracle + * Copyright (C) 2018 Red Hat Inc + * + * Authors: + * Yuval Shaia <yuval.shaia@oracle.com> + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + * + */ + +#include "qemu/osdep.h" +#include "hw/rdma/rdma.h" +#include "qemu/module.h" + +static const TypeInfo rdma_hmp_info = { + .name = INTERFACE_RDMA_PROVIDER, + .parent = TYPE_INTERFACE, + .class_size = sizeof(RdmaProviderClass), +}; + +static void rdma_register_types(void) +{ + type_register_static(&rdma_hmp_info); +} + +type_init(rdma_register_types) diff --git a/hw/rdma/rdma_backend.c b/hw/rdma/rdma_backend.c index fd571f21e5..d1660b6474 100644 --- a/hw/rdma/rdma_backend.c +++ b/hw/rdma/rdma_backend.c @@ -14,7 +14,6 @@ */ #include "qemu/osdep.h" -#include "qemu/error-report.h" #include "sysemu/sysemu.h" #include "qapi/error.h" #include "qapi/qmp/qlist.h" @@ -39,8 +38,8 @@ typedef struct BackendCtx { void *up_ctx; - bool is_tx_req; struct ibv_sge sge; /* Used to save MAD recv buffer */ + RdmaBackendQP *backend_qp; /* To maintain recv buffers */ } BackendCtx; struct backend_umad { @@ -52,13 +51,13 @@ static void (*comp_handler)(void *ctx, struct ibv_wc *wc); static void dummy_comp_handler(void *ctx, struct ibv_wc *wc) { - pr_err("No completion handler is registered\n"); + rdma_error_report("No completion handler is registered"); } static inline void complete_work(enum ibv_wc_status status, uint32_t vendor_err, void *ctx) { - struct ibv_wc wc = {0}; + struct ibv_wc wc = {}; wc.status = status; wc.vendor_err = vendor_err; @@ -66,40 +65,74 @@ static inline void complete_work(enum ibv_wc_status status, uint32_t vendor_err, comp_handler(ctx, &wc); } -static void poll_cq(RdmaDeviceResources *rdma_dev_res, struct ibv_cq *ibcq) +static void free_cqe_ctx(gpointer data, gpointer user_data) { - int i, ne; + BackendCtx *bctx; + RdmaDeviceResources *rdma_dev_res = user_data; + unsigned long cqe_ctx_id = GPOINTER_TO_INT(data); + + bctx = rdma_rm_get_cqe_ctx(rdma_dev_res, cqe_ctx_id); + if (bctx) { + rdma_rm_dealloc_cqe_ctx(rdma_dev_res, cqe_ctx_id); + atomic_dec(&rdma_dev_res->stats.missing_cqe); + } + g_free(bctx); +} + +static void clean_recv_mads(RdmaBackendDev *backend_dev) +{ + unsigned long cqe_ctx_id; + + do { + cqe_ctx_id = rdma_protected_qlist_pop_int64(&backend_dev-> + recv_mads_list); + if (cqe_ctx_id != -ENOENT) { + atomic_inc(&backend_dev->rdma_dev_res->stats.missing_cqe); + free_cqe_ctx(GINT_TO_POINTER(cqe_ctx_id), + backend_dev->rdma_dev_res); + } + } while (cqe_ctx_id != -ENOENT); +} + +static int rdma_poll_cq(RdmaDeviceResources *rdma_dev_res, struct ibv_cq *ibcq) +{ + int i, ne, total_ne = 0; BackendCtx *bctx; struct ibv_wc wc[2]; - pr_dbg("Entering poll_cq loop on cq %p\n", ibcq); + qemu_mutex_lock(&rdma_dev_res->lock); do { ne = ibv_poll_cq(ibcq, ARRAY_SIZE(wc), wc); - pr_dbg("Got %d completion(s) from cq %p\n", ne, ibcq); + trace_rdma_poll_cq(ne, ibcq); for (i = 0; i < ne; i++) { - pr_dbg("wr_id=0x%" PRIx64 "\n", wc[i].wr_id); - pr_dbg("status=%d\n", wc[i].status); - bctx = rdma_rm_get_cqe_ctx(rdma_dev_res, wc[i].wr_id); if (unlikely(!bctx)) { - pr_dbg("Error: Failed to find ctx for req %" PRId64 "\n", - wc[i].wr_id); + rdma_error_report("No matching ctx for req %"PRId64, + wc[i].wr_id); continue; } - pr_dbg("Processing %s CQE\n", bctx->is_tx_req ? "send" : "recv"); comp_handler(bctx->up_ctx, &wc[i]); + rdma_protected_gslist_remove_int32(&bctx->backend_qp->cqe_ctx_list, + wc[i].wr_id); rdma_rm_dealloc_cqe_ctx(rdma_dev_res, wc[i].wr_id); g_free(bctx); } + total_ne += ne; } while (ne > 0); + atomic_sub(&rdma_dev_res->stats.missing_cqe, total_ne); + qemu_mutex_unlock(&rdma_dev_res->lock); if (ne < 0) { - pr_dbg("Got error %d from ibv_poll_cq\n", ne); + rdma_error_report("ibv_poll_cq fail, rc=%d, errno=%d", ne, errno); } + + rdma_dev_res->stats.completions += total_ne; + + return total_ne; } static void *comp_handler_thread(void *arg) @@ -115,12 +148,10 @@ static void *comp_handler_thread(void *arg) flags = fcntl(backend_dev->channel->fd, F_GETFL); rc = fcntl(backend_dev->channel->fd, F_SETFL, flags | O_NONBLOCK); if (rc < 0) { - pr_dbg("Fail to change to non-blocking mode\n"); + rdma_error_report("Failed to change backend channel FD to non-blocking"); return NULL; } - pr_dbg("Starting\n"); - pfds[0].fd = backend_dev->channel->fd; pfds[0].events = G_IO_IN | G_IO_HUP | G_IO_ERR; @@ -129,32 +160,32 @@ static void *comp_handler_thread(void *arg) while (backend_dev->comp_thread.run) { do { rc = qemu_poll_ns(pfds, 1, THR_POLL_TO * (int64_t)SCALE_MS); + if (!rc) { + backend_dev->rdma_dev_res->stats.poll_cq_ppoll_to++; + } } while (!rc && backend_dev->comp_thread.run); if (backend_dev->comp_thread.run) { - pr_dbg("Waiting for completion on channel %p\n", backend_dev->channel); rc = ibv_get_cq_event(backend_dev->channel, &ev_cq, &ev_ctx); - pr_dbg("ibv_get_cq_event=%d\n", rc); if (unlikely(rc)) { - pr_dbg("---> ibv_get_cq_event (%d)\n", rc); + rdma_error_report("ibv_get_cq_event fail, rc=%d, errno=%d", rc, + errno); continue; } rc = ibv_req_notify_cq(ev_cq, 0); if (unlikely(rc)) { - pr_dbg("Error %d from ibv_req_notify_cq\n", rc); + rdma_error_report("ibv_req_notify_cq fail, rc=%d, errno=%d", rc, + errno); } - poll_cq(backend_dev->rdma_dev_res, ev_cq); + backend_dev->rdma_dev_res->stats.poll_cq_from_bk++; + rdma_poll_cq(backend_dev->rdma_dev_res, ev_cq); ibv_ack_cq_events(ev_cq, 1); } } - pr_dbg("Going down\n"); - - /* TODO: Post cqe for all remaining buffs that were posted */ - backend_dev->comp_thread.is_running = false; qemu_thread_exit(0); @@ -177,55 +208,54 @@ static inline int rdmacm_mux_can_process_async(RdmaBackendDev *backend_dev) return atomic_read(&backend_dev->rdmacm_mux.can_receive); } -static int check_mux_op_status(CharBackend *mad_chr_be) +static int rdmacm_mux_check_op_status(CharBackend *mad_chr_be) { RdmaCmMuxMsg msg = {}; int ret; - pr_dbg("Reading response\n"); ret = qemu_chr_fe_read_all(mad_chr_be, (uint8_t *)&msg, sizeof(msg)); if (ret != sizeof(msg)) { - pr_dbg("Invalid message size %d, expecting %ld\n", ret, sizeof(msg)); + rdma_error_report("Got invalid message from mux: size %d, expecting %d", + ret, (int)sizeof(msg)); return -EIO; } - pr_dbg("msg_type=%d\n", msg.hdr.msg_type); - pr_dbg("op_code=%d\n", msg.hdr.op_code); - pr_dbg("err_code=%d\n", msg.hdr.err_code); + trace_rdmacm_mux_check_op_status(msg.hdr.msg_type, msg.hdr.op_code, + msg.hdr.err_code); if (msg.hdr.msg_type != RDMACM_MUX_MSG_TYPE_RESP) { - pr_dbg("Invalid message type %d\n", msg.hdr.msg_type); + rdma_error_report("Got invalid message type %d", msg.hdr.msg_type); return -EIO; } if (msg.hdr.err_code != RDMACM_MUX_ERR_CODE_OK) { - pr_dbg("Operation failed in mux, error code %d\n", msg.hdr.err_code); + rdma_error_report("Operation failed in mux, error code %d", + msg.hdr.err_code); return -EIO; } return 0; } -static int exec_rdmacm_mux_req(RdmaBackendDev *backend_dev, RdmaCmMuxMsg *msg) +static int rdmacm_mux_send(RdmaBackendDev *backend_dev, RdmaCmMuxMsg *msg) { int rc = 0; - pr_dbg("Executing request %d\n", msg->hdr.op_code); - msg->hdr.msg_type = RDMACM_MUX_MSG_TYPE_REQ; + trace_rdmacm_mux("send", msg->hdr.msg_type, msg->hdr.op_code); disable_rdmacm_mux_async(backend_dev); rc = qemu_chr_fe_write(backend_dev->rdmacm_mux.chr_be, (const uint8_t *)msg, sizeof(*msg)); if (rc != sizeof(*msg)) { enable_rdmacm_mux_async(backend_dev); - pr_dbg("Fail to send request to rdmacm_mux (rc=%d)\n", rc); + rdma_error_report("Failed to send request to rdmacm_mux (rc=%d)", rc); return -EIO; } - rc = check_mux_op_status(backend_dev->rdmacm_mux.chr_be); + rc = rdmacm_mux_check_op_status(backend_dev->rdmacm_mux.chr_be); if (rc) { - pr_dbg("Fail to execute rdmacm_mux request %d (rc=%d)\n", - msg->hdr.op_code, rc); + rdma_error_report("Failed to execute rdmacm_mux request %d (rc=%d)", + msg->hdr.op_code, rc); } enable_rdmacm_mux_async(backend_dev); @@ -237,14 +267,13 @@ static void stop_backend_thread(RdmaBackendThread *thread) { thread->run = false; while (thread->is_running) { - pr_dbg("Waiting for thread to complete\n"); sleep(THR_POLL_TO / SCALE_US / 2); } } static void start_comp_thread(RdmaBackendDev *backend_dev) { - char thread_name[THR_NAME_LEN] = {0}; + char thread_name[THR_NAME_LEN] = {}; stop_backend_thread(&backend_dev->comp_thread); @@ -273,7 +302,7 @@ int rdma_backend_query_port(RdmaBackendDev *backend_dev, rc = ibv_query_port(backend_dev->context, backend_dev->port_num, port_attr); if (rc) { - pr_dbg("Error %d from ibv_query_port\n", rc); + rdma_error_report("ibv_query_port fail, rc=%d, errno=%d", rc, errno); return -EIO; } @@ -282,7 +311,13 @@ int rdma_backend_query_port(RdmaBackendDev *backend_dev, void rdma_backend_poll_cq(RdmaDeviceResources *rdma_dev_res, RdmaBackendCQ *cq) { - poll_cq(rdma_dev_res, cq->ibcq); + int polled; + + rdma_dev_res->stats.poll_cq_from_guest++; + polled = rdma_poll_cq(rdma_dev_res, cq->ibcq); + if (!polled) { + rdma_dev_res->stats.poll_cq_from_guest_empty++; + } } static GHashTable *ah_hash; @@ -294,8 +329,8 @@ static struct ibv_ah *create_ah(RdmaBackendDev *backend_dev, struct ibv_pd *pd, struct ibv_ah *ah = g_hash_table_lookup(ah_hash, ah_key); if (ah) { - trace_create_ah_cache_hit(be64_to_cpu(dgid->global.subnet_prefix), - be64_to_cpu(dgid->global.interface_id)); + trace_rdma_create_ah_cache_hit(be64_to_cpu(dgid->global.subnet_prefix), + be64_to_cpu(dgid->global.interface_id)); g_bytes_unref(ah_key); } else { struct ibv_ah_attr ah_attr = { @@ -312,13 +347,13 @@ static struct ibv_ah *create_ah(RdmaBackendDev *backend_dev, struct ibv_pd *pd, g_hash_table_insert(ah_hash, ah_key, ah); } else { g_bytes_unref(ah_key); - pr_dbg("Fail to create AH for gid <0x%" PRIx64 ", 0x%" PRIx64 ">\n", - be64_to_cpu(dgid->global.subnet_prefix), - be64_to_cpu(dgid->global.interface_id)); + rdma_error_report("Failed to create AH for gid <0x%" PRIx64", 0x%"PRIx64">", + be64_to_cpu(dgid->global.subnet_prefix), + be64_to_cpu(dgid->global.interface_id)); } - trace_create_ah_cache_miss(be64_to_cpu(dgid->global.subnet_prefix), - be64_to_cpu(dgid->global.interface_id)); + trace_rdma_create_ah_cache_miss(be64_to_cpu(dgid->global.subnet_prefix), + be64_to_cpu(dgid->global.interface_id)); } return ah; @@ -344,17 +379,15 @@ static void ah_cache_init(void) static int build_host_sge_array(RdmaDeviceResources *rdma_dev_res, struct ibv_sge *dsge, struct ibv_sge *ssge, - uint8_t num_sge) + uint8_t num_sge, uint64_t *total_length) { RdmaRmMR *mr; int ssge_idx; - pr_dbg("num_sge=%d\n", num_sge); - for (ssge_idx = 0; ssge_idx < num_sge; ssge_idx++) { mr = rdma_rm_get_mr(rdma_dev_res, ssge[ssge_idx].lkey); if (unlikely(!mr)) { - pr_dbg("Invalid lkey 0x%x\n", ssge[ssge_idx].lkey); + rdma_error_report("Invalid lkey 0x%x", ssge[ssge_idx].lkey); return VENDOR_ERR_INVLKEY | ssge[ssge_idx].lkey; } @@ -362,10 +395,7 @@ static int build_host_sge_array(RdmaDeviceResources *rdma_dev_res, dsge->length = ssge[ssge_idx].length; dsge->lkey = rdma_backend_mr_lkey(&mr->backend_mr); - pr_dbg("ssge->addr=0x%" PRIx64 "\n", ssge[ssge_idx].addr); - pr_dbg("dsge->addr=0x%" PRIx64 "\n", dsge->addr); - pr_dbg("dsge->length=%d\n", dsge->length); - pr_dbg("dsge->lkey=0x%x\n", dsge->lkey); + *total_length += dsge->length; dsge++; } @@ -373,6 +403,22 @@ static int build_host_sge_array(RdmaDeviceResources *rdma_dev_res, return 0; } +static void trace_mad_message(const char *title, char *buf, int len) +{ + int i; + char *b = g_malloc0(len * 3 + 1); + char b1[4]; + + for (i = 0; i < len; i++) { + sprintf(b1, "%.2X ", buf[i] & 0x000000FF); + strcat(b, b1); + } + + trace_rdma_mad_message(title, len, b); + + g_free(b); +} + static int mad_send(RdmaBackendDev *backend_dev, uint8_t sgid_idx, union ibv_gid *sgid, struct ibv_sge *sge, uint32_t num_sge) { @@ -380,8 +426,6 @@ static int mad_send(RdmaBackendDev *backend_dev, uint8_t sgid_idx, char *hdr, *data; int ret; - pr_dbg("num_sge=%d\n", num_sge); - if (num_sge != 2) { return -EINVAL; } @@ -390,7 +434,6 @@ static int mad_send(RdmaBackendDev *backend_dev, uint8_t sgid_idx, memcpy(msg.hdr.sgid.raw, sgid->raw, sizeof(msg.hdr.sgid)); msg.umad_len = sge[0].length + sge[1].length; - pr_dbg("umad_len=%d\n", msg.umad_len); if (msg.umad_len > sizeof(msg.umad.mad)) { return -ENOMEM; @@ -398,36 +441,31 @@ static int mad_send(RdmaBackendDev *backend_dev, uint8_t sgid_idx, msg.umad.hdr.addr.qpn = htobe32(1); msg.umad.hdr.addr.grh_present = 1; - pr_dbg("sgid_idx=%d\n", sgid_idx); - pr_dbg("sgid=0x%llx\n", sgid->global.interface_id); msg.umad.hdr.addr.gid_index = sgid_idx; memcpy(msg.umad.hdr.addr.gid, sgid->raw, sizeof(msg.umad.hdr.addr.gid)); msg.umad.hdr.addr.hop_limit = 0xFF; hdr = rdma_pci_dma_map(backend_dev->dev, sge[0].addr, sge[0].length); if (!hdr) { - pr_dbg("Fail to map to sge[0]\n"); return -ENOMEM; } data = rdma_pci_dma_map(backend_dev->dev, sge[1].addr, sge[1].length); if (!data) { - pr_dbg("Fail to map to sge[1]\n"); rdma_pci_dma_unmap(backend_dev->dev, hdr, sge[0].length); return -ENOMEM; } - pr_dbg_buf("mad_hdr", hdr, sge[0].length); - pr_dbg_buf("mad_data", data, sge[1].length); - memcpy(&msg.umad.mad[0], hdr, sge[0].length); memcpy(&msg.umad.mad[sge[0].length], data, sge[1].length); rdma_pci_dma_unmap(backend_dev->dev, data, sge[1].length); rdma_pci_dma_unmap(backend_dev->dev, hdr, sge[0].length); - ret = exec_rdmacm_mux_req(backend_dev, &msg); + trace_mad_message("send", msg.umad.mad, msg.umad_len); + + ret = rdmacm_mux_send(backend_dev, &msg); if (ret) { - pr_dbg("Fail to send MAD to rdma_umadmux (%d)\n", ret); + rdma_error_report("Failed to send MAD to rdma_umadmux (%d)", ret); return -EIO; } @@ -445,49 +483,49 @@ void rdma_backend_post_send(RdmaBackendDev *backend_dev, struct ibv_sge new_sge[MAX_SGE]; uint32_t bctx_id; int rc; - struct ibv_send_wr wr = {0}, *bad_wr; + struct ibv_send_wr wr = {}, *bad_wr; - if (!qp->ibqp) { /* This field does not get initialized for QP0 and QP1 */ + if (!qp->ibqp) { /* This field is not initialized for QP0 and QP1 */ if (qp_type == IBV_QPT_SMI) { - pr_dbg("QP0 unsupported\n"); + rdma_error_report("Got QP0 request"); complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_QP0, ctx); } else if (qp_type == IBV_QPT_GSI) { - pr_dbg("QP1\n"); rc = mad_send(backend_dev, sgid_idx, sgid, sge, num_sge); if (rc) { complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_MAD_SEND, ctx); + backend_dev->rdma_dev_res->stats.mad_tx_err++; } else { complete_work(IBV_WC_SUCCESS, 0, ctx); + backend_dev->rdma_dev_res->stats.mad_tx++; } } return; } - pr_dbg("num_sge=%d\n", num_sge); - bctx = g_malloc0(sizeof(*bctx)); bctx->up_ctx = ctx; - bctx->is_tx_req = 1; + bctx->backend_qp = qp; rc = rdma_rm_alloc_cqe_ctx(backend_dev->rdma_dev_res, &bctx_id, bctx); if (unlikely(rc)) { - pr_dbg("Failed to allocate cqe_ctx\n"); complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_NOMEM, ctx); - goto out_free_bctx; + goto err_free_bctx; } - rc = build_host_sge_array(backend_dev->rdma_dev_res, new_sge, sge, num_sge); + rdma_protected_gslist_append_int32(&qp->cqe_ctx_list, bctx_id); + + rc = build_host_sge_array(backend_dev->rdma_dev_res, new_sge, sge, num_sge, + &backend_dev->rdma_dev_res->stats.tx_len); if (rc) { - pr_dbg("Error: Failed to build host SGE array\n"); complete_work(IBV_WC_GENERAL_ERR, rc, ctx); - goto out_dealloc_cqe_ctx; + goto err_dealloc_cqe_ctx; } if (qp_type == IBV_QPT_UD) { wr.wr.ud.ah = create_ah(backend_dev, qp->ibpd, sgid_idx, dgid); if (!wr.wr.ud.ah) { complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_FAIL_BACKEND, ctx); - goto out_dealloc_cqe_ctx; + goto err_dealloc_cqe_ctx; } wr.wr.ud.remote_qpn = dqpn; wr.wr.ud.remote_qkey = dqkey; @@ -500,20 +538,23 @@ void rdma_backend_post_send(RdmaBackendDev *backend_dev, wr.wr_id = bctx_id; rc = ibv_post_send(qp->ibqp, &wr, &bad_wr); - pr_dbg("ibv_post_send=%d\n", rc); if (rc) { - pr_dbg("Fail (%d, %d) to post send WQE to qpn %d\n", rc, errno, - qp->ibqp->qp_num); + rdma_error_report("ibv_post_send fail, qpn=0x%x, rc=%d, errno=%d", + qp->ibqp->qp_num, rc, errno); complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_FAIL_BACKEND, ctx); - goto out_dealloc_cqe_ctx; + goto err_dealloc_cqe_ctx; } + atomic_inc(&backend_dev->rdma_dev_res->stats.missing_cqe); + backend_dev->rdma_dev_res->stats.tx++; + return; -out_dealloc_cqe_ctx: +err_dealloc_cqe_ctx: + backend_dev->rdma_dev_res->stats.tx_err++; rdma_rm_dealloc_cqe_ctx(backend_dev->rdma_dev_res, bctx_id); -out_free_bctx: +err_free_bctx: g_free(bctx); } @@ -526,41 +567,32 @@ static unsigned int save_mad_recv_buffer(RdmaBackendDev *backend_dev, uint32_t bctx_id; if (num_sge != 1) { - pr_dbg("Invalid num_sge (%d), expecting 1\n", num_sge); + rdma_error_report("Invalid num_sge (%d), expecting 1", num_sge); return VENDOR_ERR_INV_NUM_SGE; } if (sge[0].length < RDMA_MAX_PRIVATE_DATA + sizeof(struct ibv_grh)) { - pr_dbg("Too small buffer for MAD\n"); + rdma_error_report("Too small buffer for MAD"); return VENDOR_ERR_INV_MAD_BUFF; } - pr_dbg("addr=0x%" PRIx64"\n", sge[0].addr); - pr_dbg("length=%d\n", sge[0].length); - pr_dbg("lkey=%d\n", sge[0].lkey); - bctx = g_malloc0(sizeof(*bctx)); rc = rdma_rm_alloc_cqe_ctx(backend_dev->rdma_dev_res, &bctx_id, bctx); if (unlikely(rc)) { g_free(bctx); - pr_dbg("Fail to allocate cqe_ctx\n"); return VENDOR_ERR_NOMEM; } - pr_dbg("bctx_id %d, bctx %p, ctx %p\n", bctx_id, bctx, ctx); bctx->up_ctx = ctx; bctx->sge = *sge; - qemu_mutex_lock(&backend_dev->recv_mads_list.lock); - qlist_append_int(backend_dev->recv_mads_list.list, bctx_id); - qemu_mutex_unlock(&backend_dev->recv_mads_list.lock); + rdma_protected_qlist_append_int64(&backend_dev->recv_mads_list, bctx_id); return 0; } void rdma_backend_post_recv(RdmaBackendDev *backend_dev, - RdmaDeviceResources *rdma_dev_res, RdmaBackendQP *qp, uint8_t qp_type, struct ibv_sge *sge, uint32_t num_sge, void *ctx) { @@ -568,61 +600,65 @@ void rdma_backend_post_recv(RdmaBackendDev *backend_dev, struct ibv_sge new_sge[MAX_SGE]; uint32_t bctx_id; int rc; - struct ibv_recv_wr wr = {0}, *bad_wr; + struct ibv_recv_wr wr = {}, *bad_wr; if (!qp->ibqp) { /* This field does not get initialized for QP0 and QP1 */ if (qp_type == IBV_QPT_SMI) { - pr_dbg("QP0 unsupported\n"); + rdma_error_report("Got QP0 request"); complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_QP0, ctx); } if (qp_type == IBV_QPT_GSI) { - pr_dbg("QP1\n"); rc = save_mad_recv_buffer(backend_dev, sge, num_sge, ctx); if (rc) { complete_work(IBV_WC_GENERAL_ERR, rc, ctx); + backend_dev->rdma_dev_res->stats.mad_rx_bufs_err++; + } else { + backend_dev->rdma_dev_res->stats.mad_rx_bufs++; } } return; } - pr_dbg("num_sge=%d\n", num_sge); - bctx = g_malloc0(sizeof(*bctx)); bctx->up_ctx = ctx; - bctx->is_tx_req = 0; + bctx->backend_qp = qp; - rc = rdma_rm_alloc_cqe_ctx(rdma_dev_res, &bctx_id, bctx); + rc = rdma_rm_alloc_cqe_ctx(backend_dev->rdma_dev_res, &bctx_id, bctx); if (unlikely(rc)) { - pr_dbg("Failed to allocate cqe_ctx\n"); complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_NOMEM, ctx); - goto out_free_bctx; + goto err_free_bctx; } - rc = build_host_sge_array(rdma_dev_res, new_sge, sge, num_sge); + rdma_protected_gslist_append_int32(&qp->cqe_ctx_list, bctx_id); + + rc = build_host_sge_array(backend_dev->rdma_dev_res, new_sge, sge, num_sge, + &backend_dev->rdma_dev_res->stats.rx_bufs_len); if (rc) { - pr_dbg("Error: Failed to build host SGE array\n"); complete_work(IBV_WC_GENERAL_ERR, rc, ctx); - goto out_dealloc_cqe_ctx; + goto err_dealloc_cqe_ctx; } wr.num_sge = num_sge; wr.sg_list = new_sge; wr.wr_id = bctx_id; rc = ibv_post_recv(qp->ibqp, &wr, &bad_wr); - pr_dbg("ibv_post_recv=%d\n", rc); if (rc) { - pr_dbg("Fail (%d, %d) to post recv WQE to qpn %d\n", rc, errno, - qp->ibqp->qp_num); + rdma_error_report("ibv_post_recv fail, qpn=0x%x, rc=%d, errno=%d", + qp->ibqp->qp_num, rc, errno); complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_FAIL_BACKEND, ctx); - goto out_dealloc_cqe_ctx; + goto err_dealloc_cqe_ctx; } + atomic_inc(&backend_dev->rdma_dev_res->stats.missing_cqe); + backend_dev->rdma_dev_res->stats.rx_bufs++; + return; -out_dealloc_cqe_ctx: - rdma_rm_dealloc_cqe_ctx(rdma_dev_res, bctx_id); +err_dealloc_cqe_ctx: + backend_dev->rdma_dev_res->stats.rx_bufs_err++; + rdma_rm_dealloc_cqe_ctx(backend_dev->rdma_dev_res, bctx_id); -out_free_bctx: +err_free_bctx: g_free(bctx); } @@ -630,7 +666,12 @@ int rdma_backend_create_pd(RdmaBackendDev *backend_dev, RdmaBackendPD *pd) { pd->ibpd = ibv_alloc_pd(backend_dev->context); - return pd->ibpd ? 0 : -EIO; + if (!pd->ibpd) { + rdma_error_report("ibv_alloc_pd fail, errno=%d", errno); + return -EIO; + } + + return 0; } void rdma_backend_destroy_pd(RdmaBackendPD *pd) @@ -643,16 +684,15 @@ void rdma_backend_destroy_pd(RdmaBackendPD *pd) int rdma_backend_create_mr(RdmaBackendMR *mr, RdmaBackendPD *pd, void *addr, size_t length, int access) { - pr_dbg("addr=0x%p\n", addr); - pr_dbg("len=%zu\n", length); mr->ibmr = ibv_reg_mr(pd->ibpd, addr, length, access); - if (mr->ibmr) { - pr_dbg("lkey=0x%x\n", mr->ibmr->lkey); - pr_dbg("rkey=0x%x\n", mr->ibmr->rkey); - mr->ibpd = pd->ibpd; + if (!mr->ibmr) { + rdma_error_report("ibv_reg_mr fail, errno=%d", errno); + return -EIO; } - return mr->ibmr ? 0 : -EIO; + mr->ibpd = pd->ibpd; + + return 0; } void rdma_backend_destroy_mr(RdmaBackendMR *mr) @@ -667,21 +707,21 @@ int rdma_backend_create_cq(RdmaBackendDev *backend_dev, RdmaBackendCQ *cq, { int rc; - pr_dbg("cqe=%d\n", cqe); - - pr_dbg("dev->channel=%p\n", backend_dev->channel); cq->ibcq = ibv_create_cq(backend_dev->context, cqe + 1, NULL, backend_dev->channel, 0); + if (!cq->ibcq) { + rdma_error_report("ibv_create_cq fail, errno=%d", errno); + return -EIO; + } - if (cq->ibcq) { - rc = ibv_req_notify_cq(cq->ibcq, 0); - if (rc) { - pr_dbg("Error %d from ibv_req_notify_cq\n", rc); - } - cq->backend_dev = backend_dev; + rc = ibv_req_notify_cq(cq->ibcq, 0); + if (rc) { + rdma_warn_report("ibv_req_notify_cq fail, rc=%d, errno=%d", rc, errno); } - return cq->ibcq ? 0 : -EIO; + cq->backend_dev = backend_dev; + + return 0; } void rdma_backend_destroy_cq(RdmaBackendCQ *cq) @@ -697,10 +737,9 @@ int rdma_backend_create_qp(RdmaBackendQP *qp, uint8_t qp_type, uint32_t max_recv_wr, uint32_t max_send_sge, uint32_t max_recv_sge) { - struct ibv_qp_init_attr attr = {0}; + struct ibv_qp_init_attr attr = {}; qp->ibqp = 0; - pr_dbg("qp_type=%d\n", qp_type); switch (qp_type) { case IBV_QPT_GSI: @@ -713,7 +752,7 @@ int rdma_backend_create_qp(RdmaBackendQP *qp, uint8_t qp_type, break; default: - pr_dbg("Unsupported QP type %d\n", qp_type); + rdma_error_report("Unsupported QP type %d", qp_type); return -EIO; } @@ -725,35 +764,27 @@ int rdma_backend_create_qp(RdmaBackendQP *qp, uint8_t qp_type, attr.cap.max_send_sge = max_send_sge; attr.cap.max_recv_sge = max_recv_sge; - pr_dbg("max_send_wr=%d\n", max_send_wr); - pr_dbg("max_recv_wr=%d\n", max_recv_wr); - pr_dbg("max_send_sge=%d\n", max_send_sge); - pr_dbg("max_recv_sge=%d\n", max_recv_sge); - qp->ibqp = ibv_create_qp(pd->ibpd, &attr); - if (likely(!qp->ibqp)) { - pr_dbg("Error from ibv_create_qp\n"); + if (!qp->ibqp) { + rdma_error_report("ibv_create_qp fail, errno=%d", errno); return -EIO; } + rdma_protected_gslist_init(&qp->cqe_ctx_list); + qp->ibpd = pd->ibpd; /* TODO: Query QP to get max_inline_data and save it to be used in send */ - pr_dbg("qpn=0x%x\n", qp->ibqp->qp_num); - return 0; } int rdma_backend_qp_state_init(RdmaBackendDev *backend_dev, RdmaBackendQP *qp, uint8_t qp_type, uint32_t qkey) { - struct ibv_qp_attr attr = {0}; + struct ibv_qp_attr attr = {}; int rc, attr_mask; - pr_dbg("qpn=0x%x\n", qp->ibqp->qp_num); - pr_dbg("sport_num=%d\n", backend_dev->port_num); - attr_mask = IBV_QP_STATE | IBV_QP_PKEY_INDEX | IBV_QP_PORT; attr.qp_state = IBV_QPS_INIT; attr.pkey_index = 0; @@ -762,21 +793,23 @@ int rdma_backend_qp_state_init(RdmaBackendDev *backend_dev, RdmaBackendQP *qp, switch (qp_type) { case IBV_QPT_RC: attr_mask |= IBV_QP_ACCESS_FLAGS; + trace_rdma_backend_rc_qp_state_init(qp->ibqp->qp_num); break; case IBV_QPT_UD: attr.qkey = qkey; attr_mask |= IBV_QP_QKEY; + trace_rdma_backend_ud_qp_state_init(qp->ibqp->qp_num, qkey); break; default: - pr_dbg("Unsupported QP type %d\n", qp_type); + rdma_error_report("Unsupported QP type %d", qp_type); return -EIO; } rc = ibv_modify_qp(qp->ibqp, &attr, attr_mask); if (rc) { - pr_dbg("Error %d from ibv_modify_qp\n", rc); + rdma_error_report("ibv_modify_qp fail, rc=%d, errno=%d", rc, errno); return -EIO; } @@ -788,7 +821,7 @@ int rdma_backend_qp_state_rtr(RdmaBackendDev *backend_dev, RdmaBackendQP *qp, union ibv_gid *dgid, uint32_t dqpn, uint32_t rq_psn, uint32_t qkey, bool use_qkey) { - struct ibv_qp_attr attr = {0}; + struct ibv_qp_attr attr = {}; union ibv_gid ibv_gid = { .global.interface_id = dgid->global.interface_id, .global.subnet_prefix = dgid->global.subnet_prefix @@ -802,14 +835,6 @@ int rdma_backend_qp_state_rtr(RdmaBackendDev *backend_dev, RdmaBackendQP *qp, switch (qp_type) { case IBV_QPT_RC: - pr_dbg("dgid=0x%" PRIx64 ",%" PRIx64 "\n", - be64_to_cpu(ibv_gid.global.subnet_prefix), - be64_to_cpu(ibv_gid.global.interface_id)); - pr_dbg("dqpn=0x%x\n", dqpn); - pr_dbg("sgid_idx=%d\n", qp->sgid_idx); - pr_dbg("sport_num=%d\n", backend_dev->port_num); - pr_dbg("rq_psn=0x%x\n", rq_psn); - attr.path_mtu = IBV_MTU_1024; attr.dest_qp_num = dqpn; attr.max_dest_rd_atomic = 1; @@ -824,20 +849,28 @@ int rdma_backend_qp_state_rtr(RdmaBackendDev *backend_dev, RdmaBackendQP *qp, attr_mask |= IBV_QP_AV | IBV_QP_PATH_MTU | IBV_QP_DEST_QPN | IBV_QP_RQ_PSN | IBV_QP_MAX_DEST_RD_ATOMIC | IBV_QP_MIN_RNR_TIMER; + + trace_rdma_backend_rc_qp_state_rtr(qp->ibqp->qp_num, + be64_to_cpu(ibv_gid.global. + subnet_prefix), + be64_to_cpu(ibv_gid.global. + interface_id), + qp->sgid_idx, dqpn, rq_psn); break; case IBV_QPT_UD: - pr_dbg("qkey=0x%x\n", qkey); if (use_qkey) { attr.qkey = qkey; attr_mask |= IBV_QP_QKEY; } + trace_rdma_backend_ud_qp_state_rtr(qp->ibqp->qp_num, use_qkey ? qkey : + 0); break; } rc = ibv_modify_qp(qp->ibqp, &attr, attr_mask); if (rc) { - pr_dbg("Error %d from ibv_modify_qp\n", rc); + rdma_error_report("ibv_modify_qp fail, rc=%d, errno=%d", rc, errno); return -EIO; } @@ -847,12 +880,9 @@ int rdma_backend_qp_state_rtr(RdmaBackendDev *backend_dev, RdmaBackendQP *qp, int rdma_backend_qp_state_rts(RdmaBackendQP *qp, uint8_t qp_type, uint32_t sq_psn, uint32_t qkey, bool use_qkey) { - struct ibv_qp_attr attr = {0}; + struct ibv_qp_attr attr = {}; int rc, attr_mask; - pr_dbg("qpn=0x%x\n", qp->ibqp->qp_num); - pr_dbg("sq_psn=0x%x\n", sq_psn); - attr.qp_state = IBV_QPS_RTS; attr.sq_psn = sq_psn; attr_mask = IBV_QP_STATE | IBV_QP_SQ_PSN; @@ -866,20 +896,22 @@ int rdma_backend_qp_state_rts(RdmaBackendQP *qp, uint8_t qp_type, attr_mask |= IBV_QP_TIMEOUT | IBV_QP_RETRY_CNT | IBV_QP_RNR_RETRY | IBV_QP_MAX_QP_RD_ATOMIC; + trace_rdma_backend_rc_qp_state_rts(qp->ibqp->qp_num, sq_psn); break; case IBV_QPT_UD: if (use_qkey) { - pr_dbg("qkey=0x%x\n", qkey); attr.qkey = qkey; attr_mask |= IBV_QP_QKEY; } + trace_rdma_backend_ud_qp_state_rts(qp->ibqp->qp_num, sq_psn, + use_qkey ? qkey : 0); break; } rc = ibv_modify_qp(qp->ibqp, &attr, attr_mask); if (rc) { - pr_dbg("Error %d from ibv_modify_qp\n", rc); + rdma_error_report("ibv_modify_qp fail, rc=%d, errno=%d", rc, errno); return -EIO; } @@ -890,7 +922,6 @@ int rdma_backend_query_qp(RdmaBackendQP *qp, struct ibv_qp_attr *attr, int attr_mask, struct ibv_qp_init_attr *init_attr) { if (!qp->ibqp) { - pr_dbg("QP1\n"); attr->qp_state = IBV_QPS_RTS; return 0; } @@ -898,28 +929,33 @@ int rdma_backend_query_qp(RdmaBackendQP *qp, struct ibv_qp_attr *attr, return ibv_query_qp(qp->ibqp, attr, attr_mask, init_attr); } -void rdma_backend_destroy_qp(RdmaBackendQP *qp) +void rdma_backend_destroy_qp(RdmaBackendQP *qp, RdmaDeviceResources *dev_res) { if (qp->ibqp) { ibv_destroy_qp(qp->ibqp); } + g_slist_foreach(qp->cqe_ctx_list.list, free_cqe_ctx, dev_res); + rdma_protected_gslist_destroy(&qp->cqe_ctx_list); } #define CHK_ATTR(req, dev, member, fmt) ({ \ - pr_dbg("%s="fmt","fmt"\n", #member, dev.member, req->member); \ + trace_rdma_check_dev_attr(#member, dev.member, req->member); \ if (req->member > dev.member) { \ - warn_report("%s = "fmt" is higher than host device capability "fmt, \ - #member, req->member, dev.member); \ + rdma_warn_report("%s = "fmt" is higher than host device capability "fmt, \ + #member, req->member, dev.member); \ req->member = dev.member; \ } \ - pr_dbg("%s="fmt"\n", #member, req->member); }) +}) static int init_device_caps(RdmaBackendDev *backend_dev, struct ibv_device_attr *dev_attr) { struct ibv_device_attr bk_dev_attr; + int rc; - if (ibv_query_device(backend_dev->context, &bk_dev_attr)) { + rc = ibv_query_device(backend_dev->context, &bk_dev_attr); + if (rc) { + rdma_error_report("ibv_query_device fail, rc=%d, errno=%d", rc, errno); return -EIO; } @@ -928,9 +964,7 @@ static int init_device_caps(RdmaBackendDev *backend_dev, CHK_ATTR(dev_attr, bk_dev_attr, max_mr_size, "%" PRId64); CHK_ATTR(dev_attr, bk_dev_attr, max_qp, "%d"); CHK_ATTR(dev_attr, bk_dev_attr, max_sge, "%d"); - CHK_ATTR(dev_attr, bk_dev_attr, max_qp_wr, "%d"); CHK_ATTR(dev_attr, bk_dev_attr, max_cq, "%d"); - CHK_ATTR(dev_attr, bk_dev_attr, max_cqe, "%d"); CHK_ATTR(dev_attr, bk_dev_attr, max_mr, "%d"); CHK_ATTR(dev_attr, bk_dev_attr, max_pd, "%d"); CHK_ATTR(dev_attr, bk_dev_attr, max_qp_rd_atom, "%d"); @@ -946,56 +980,39 @@ static inline void build_mad_hdr(struct ibv_grh *grh, union ibv_gid *sgid, grh->paylen = htons(paylen); grh->sgid = *sgid; grh->dgid = *my_gid; - - pr_dbg("paylen=%d (net=0x%x)\n", paylen, grh->paylen); - pr_dbg("dgid=0x%llx\n", my_gid->global.interface_id); - pr_dbg("sgid=0x%llx\n", sgid->global.interface_id); } static void process_incoming_mad_req(RdmaBackendDev *backend_dev, RdmaCmMuxMsg *msg) { - QObject *o_ctx_id; unsigned long cqe_ctx_id; BackendCtx *bctx; char *mad; - pr_dbg("umad_len=%d\n", msg->umad_len); - -#ifdef PVRDMA_DEBUG - struct umad_hdr *hdr = (struct umad_hdr *)&msg->umad.mad; - pr_dbg("bv %x cls %x cv %x mtd %x st %d tid %" PRIx64 " at %x atm %x\n", - hdr->base_version, hdr->mgmt_class, hdr->class_version, - hdr->method, hdr->status, be64toh(hdr->tid), - hdr->attr_id, hdr->attr_mod); -#endif - - qemu_mutex_lock(&backend_dev->recv_mads_list.lock); - o_ctx_id = qlist_pop(backend_dev->recv_mads_list.list); - qemu_mutex_unlock(&backend_dev->recv_mads_list.lock); - if (!o_ctx_id) { - pr_dbg("No more free MADs buffers, waiting for a while\n"); + trace_mad_message("recv", msg->umad.mad, msg->umad_len); + + cqe_ctx_id = rdma_protected_qlist_pop_int64(&backend_dev->recv_mads_list); + if (cqe_ctx_id == -ENOENT) { + rdma_warn_report("No more free MADs buffers, waiting for a while"); sleep(THR_POLL_TO); return; } - cqe_ctx_id = qnum_get_uint(qobject_to(QNum, o_ctx_id)); bctx = rdma_rm_get_cqe_ctx(backend_dev->rdma_dev_res, cqe_ctx_id); if (unlikely(!bctx)) { - pr_dbg("Error: Fail to find ctx for %ld\n", cqe_ctx_id); + rdma_error_report("No matching ctx for req %ld", cqe_ctx_id); + backend_dev->rdma_dev_res->stats.mad_rx_err++; return; } - pr_dbg("id %ld, bctx %p, ctx %p\n", cqe_ctx_id, bctx, bctx->up_ctx); - mad = rdma_pci_dma_map(backend_dev->dev, bctx->sge.addr, bctx->sge.length); if (!mad || bctx->sge.length < msg->umad_len + MAD_HDR_SIZE) { + backend_dev->rdma_dev_res->stats.mad_rx_err++; complete_work(IBV_WC_GENERAL_ERR, VENDOR_ERR_INV_MAD_BUFF, bctx->up_ctx); } else { - struct ibv_wc wc = {0}; - pr_dbg_buf("mad", msg->umad.mad, msg->umad_len); + struct ibv_wc wc = {}; memset(mad, 0, bctx->sge.length); build_mad_hdr((struct ibv_grh *)mad, (union ibv_gid *)&msg->umad.hdr.addr.gid, &msg->hdr.sgid, @@ -1006,6 +1023,7 @@ static void process_incoming_mad_req(RdmaBackendDev *backend_dev, wc.byte_len = msg->umad_len; wc.status = IBV_WC_SUCCESS; wc.wc_flags = IBV_WC_GRH; + backend_dev->rdma_dev_res->stats.mad_rx++; comp_handler(bctx->up_ctx, &wc); } @@ -1025,13 +1043,11 @@ static void rdmacm_mux_read(void *opaque, const uint8_t *buf, int size) RdmaBackendDev *backend_dev = (RdmaBackendDev *)opaque; RdmaCmMuxMsg *msg = (RdmaCmMuxMsg *)buf; - pr_dbg("Got %d bytes\n", size); - pr_dbg("msg_type=%d\n", msg->hdr.msg_type); - pr_dbg("op_code=%d\n", msg->hdr.op_code); + trace_rdmacm_mux("read", msg->hdr.msg_type, msg->hdr.op_code); if (msg->hdr.msg_type != RDMACM_MUX_MSG_TYPE_REQ && msg->hdr.op_code != RDMACM_MUX_OP_CODE_MAD) { - pr_dbg("Error: Not a MAD request, skipping\n"); + rdma_error_report("Error: Not a MAD request, skipping"); return; } process_incoming_mad_req(backend_dev, msg); @@ -1045,12 +1061,11 @@ static int mad_init(RdmaBackendDev *backend_dev, CharBackend *mad_chr_be) ret = qemu_chr_fe_backend_connected(backend_dev->rdmacm_mux.chr_be); if (!ret) { - pr_dbg("Missing chardev for MAD multiplexer\n"); + rdma_error_report("Missing chardev for MAD multiplexer"); return -EIO; } - qemu_mutex_init(&backend_dev->recv_mads_list.lock); - backend_dev->recv_mads_list.list = qlist_new(); + rdma_protected_qlist_init(&backend_dev->recv_mads_list); enable_rdmacm_mux_async(backend_dev); @@ -1061,15 +1076,16 @@ static int mad_init(RdmaBackendDev *backend_dev, CharBackend *mad_chr_be) return 0; } +static void mad_stop(RdmaBackendDev *backend_dev) +{ + clean_recv_mads(backend_dev); +} + static void mad_fini(RdmaBackendDev *backend_dev) { - pr_dbg("Stopping MAD\n"); disable_rdmacm_mux_async(backend_dev); qemu_chr_fe_disconnect(backend_dev->rdmacm_mux.chr_be); - if (backend_dev->recv_mads_list.list) { - qlist_destroy_obj(QOBJECT(backend_dev->recv_mads_list.list)); - qemu_mutex_destroy(&backend_dev->recv_mads_list.lock); - } + rdma_protected_qlist_destroy(&backend_dev->recv_mads_list); } int rdma_backend_get_gid_index(RdmaBackendDev *backend_dev, @@ -1079,17 +1095,15 @@ int rdma_backend_get_gid_index(RdmaBackendDev *backend_dev, int ret; int i = 0; - pr_dbg("0x%llx, 0x%llx\n", - (long long unsigned int)be64_to_cpu(gid->global.subnet_prefix), - (long long unsigned int)be64_to_cpu(gid->global.interface_id)); - do { ret = ibv_query_gid(backend_dev->context, backend_dev->port_num, i, &sgid); i++; } while (!ret && (memcmp(&sgid, gid, sizeof(*gid)))); - pr_dbg("gid_index=%d\n", i - 1); + trace_rdma_backend_get_gid_index(be64_to_cpu(gid->global.subnet_prefix), + be64_to_cpu(gid->global.interface_id), + i - 1); return ret ? ret : i - 1; } @@ -1100,16 +1114,15 @@ int rdma_backend_add_gid(RdmaBackendDev *backend_dev, const char *ifname, RdmaCmMuxMsg msg = {}; int ret; - pr_dbg("0x%llx, 0x%llx\n", - (long long unsigned int)be64_to_cpu(gid->global.subnet_prefix), - (long long unsigned int)be64_to_cpu(gid->global.interface_id)); + trace_rdma_backend_gid_change("add", be64_to_cpu(gid->global.subnet_prefix), + be64_to_cpu(gid->global.interface_id)); msg.hdr.op_code = RDMACM_MUX_OP_CODE_REG; memcpy(msg.hdr.sgid.raw, gid->raw, sizeof(msg.hdr.sgid)); - ret = exec_rdmacm_mux_req(backend_dev, &msg); + ret = rdmacm_mux_send(backend_dev, &msg); if (ret) { - pr_dbg("Fail to register GID to rdma_umadmux (%d)\n", ret); + rdma_error_report("Failed to register GID to rdma_umadmux (%d)", ret); return -EIO; } @@ -1126,16 +1139,16 @@ int rdma_backend_del_gid(RdmaBackendDev *backend_dev, const char *ifname, RdmaCmMuxMsg msg = {}; int ret; - pr_dbg("0x%llx, 0x%llx\n", - (long long unsigned int)be64_to_cpu(gid->global.subnet_prefix), - (long long unsigned int)be64_to_cpu(gid->global.interface_id)); + trace_rdma_backend_gid_change("del", be64_to_cpu(gid->global.subnet_prefix), + be64_to_cpu(gid->global.interface_id)); msg.hdr.op_code = RDMACM_MUX_OP_CODE_UNREG; memcpy(msg.hdr.sgid.raw, gid->raw, sizeof(msg.hdr.sgid)); - ret = exec_rdmacm_mux_req(backend_dev, &msg); + ret = rdmacm_mux_send(backend_dev, &msg); if (ret) { - pr_dbg("Fail to unregister GID from rdma_umadmux (%d)\n", ret); + rdma_error_report("Failed to unregister GID from rdma_umadmux (%d)", + ret); return -EIO; } @@ -1149,8 +1162,7 @@ int rdma_backend_del_gid(RdmaBackendDev *backend_dev, const char *ifname, int rdma_backend_init(RdmaBackendDev *backend_dev, PCIDevice *pdev, RdmaDeviceResources *rdma_dev_res, const char *backend_device_name, uint8_t port_num, - struct ibv_device_attr *dev_attr, CharBackend *mad_chr_be, - Error **errp) + struct ibv_device_attr *dev_attr, CharBackend *mad_chr_be) { int i; int ret = 0; @@ -1167,12 +1179,12 @@ int rdma_backend_init(RdmaBackendDev *backend_dev, PCIDevice *pdev, dev_list = ibv_get_device_list(&num_ibv_devices); if (!dev_list) { - error_setg(errp, "Failed to get IB devices list"); + rdma_error_report("Failed to get IB devices list"); return -EIO; } if (num_ibv_devices == 0) { - error_setg(errp, "No IB devices were found"); + rdma_error_report("No IB devices were found"); ret = -ENXIO; goto out_free_dev_list; } @@ -1187,8 +1199,8 @@ int rdma_backend_init(RdmaBackendDev *backend_dev, PCIDevice *pdev, backend_dev->ib_dev = dev_list[i]; if (!backend_dev->ib_dev) { - error_setg(errp, "Failed to find IB device %s", - backend_device_name); + rdma_error_report("Failed to find IB device %s", + backend_device_name); ret = -EIO; goto out_free_dev_list; } @@ -1196,28 +1208,26 @@ int rdma_backend_init(RdmaBackendDev *backend_dev, PCIDevice *pdev, backend_dev->ib_dev = *dev_list; } - pr_dbg("Using backend device %s, port %d\n", - ibv_get_device_name(backend_dev->ib_dev), backend_dev->port_num); - pr_dbg("uverb device %s\n", backend_dev->ib_dev->dev_name); + rdma_info_report("uverb device %s", backend_dev->ib_dev->dev_name); backend_dev->context = ibv_open_device(backend_dev->ib_dev); if (!backend_dev->context) { - error_setg(errp, "Failed to open IB device"); + rdma_error_report("Failed to open IB device %s", + ibv_get_device_name(backend_dev->ib_dev)); ret = -EIO; goto out; } backend_dev->channel = ibv_create_comp_channel(backend_dev->context); if (!backend_dev->channel) { - error_setg(errp, "Failed to create IB communication channel"); + rdma_error_report("Failed to create IB communication channel"); ret = -EIO; goto out_close_device; } - pr_dbg("dev->backend_dev.channel=%p\n", backend_dev->channel); ret = init_device_caps(backend_dev, dev_attr); if (ret) { - error_setg(errp, "Failed to initialize device capabilities"); + rdma_error_report("Failed to initialize device capabilities"); ret = -EIO; goto out_destroy_comm_channel; } @@ -1225,7 +1235,7 @@ int rdma_backend_init(RdmaBackendDev *backend_dev, PCIDevice *pdev, ret = mad_init(backend_dev, mad_chr_be); if (ret) { - error_setg(errp, "Fail to initialize mad"); + rdma_error_report("Failed to initialize mad"); ret = -EIO; goto out_destroy_comm_channel; } @@ -1253,19 +1263,17 @@ out: void rdma_backend_start(RdmaBackendDev *backend_dev) { - pr_dbg("Starting rdma_backend\n"); start_comp_thread(backend_dev); } void rdma_backend_stop(RdmaBackendDev *backend_dev) { - pr_dbg("Stopping rdma_backend\n"); + mad_stop(backend_dev); stop_backend_thread(&backend_dev->comp_thread); } void rdma_backend_fini(RdmaBackendDev *backend_dev) { - rdma_backend_stop(backend_dev); mad_fini(backend_dev); g_hash_table_destroy(ah_hash); ibv_destroy_comp_channel(backend_dev->channel); diff --git a/hw/rdma/rdma_backend.h b/hw/rdma/rdma_backend.h index 5114c90e67..38056d97c7 100644 --- a/hw/rdma/rdma_backend.h +++ b/hw/rdma/rdma_backend.h @@ -58,8 +58,8 @@ static inline uint32_t rdma_backend_mr_rkey(const RdmaBackendMR *mr) int rdma_backend_init(RdmaBackendDev *backend_dev, PCIDevice *pdev, RdmaDeviceResources *rdma_dev_res, const char *backend_device_name, uint8_t port_num, - struct ibv_device_attr *dev_attr, CharBackend *mad_chr_be, - Error **errp); + struct ibv_device_attr *dev_attr, + CharBackend *mad_chr_be); void rdma_backend_fini(RdmaBackendDev *backend_dev); int rdma_backend_add_gid(RdmaBackendDev *backend_dev, const char *ifname, union ibv_gid *gid); @@ -102,7 +102,7 @@ int rdma_backend_qp_state_rts(RdmaBackendQP *qp, uint8_t qp_type, uint32_t sq_psn, uint32_t qkey, bool use_qkey); int rdma_backend_query_qp(RdmaBackendQP *qp, struct ibv_qp_attr *attr, int attr_mask, struct ibv_qp_init_attr *init_attr); -void rdma_backend_destroy_qp(RdmaBackendQP *qp); +void rdma_backend_destroy_qp(RdmaBackendQP *qp, RdmaDeviceResources *dev_res); void rdma_backend_post_send(RdmaBackendDev *backend_dev, RdmaBackendQP *qp, uint8_t qp_type, @@ -111,7 +111,6 @@ void rdma_backend_post_send(RdmaBackendDev *backend_dev, union ibv_gid *dgid, uint32_t dqpn, uint32_t dqkey, void *ctx); void rdma_backend_post_recv(RdmaBackendDev *backend_dev, - RdmaDeviceResources *rdma_dev_res, RdmaBackendQP *qp, uint8_t qp_type, struct ibv_sge *sge, uint32_t num_sge, void *ctx); diff --git a/hw/rdma/rdma_backend_defs.h b/hw/rdma/rdma_backend_defs.h index 15ae8b970e..817153dc8c 100644 --- a/hw/rdma/rdma_backend_defs.h +++ b/hw/rdma/rdma_backend_defs.h @@ -20,21 +20,16 @@ #include "chardev/char-fe.h" #include <infiniband/verbs.h> #include "contrib/rdmacm-mux/rdmacm-mux.h" +#include "rdma_utils.h" typedef struct RdmaDeviceResources RdmaDeviceResources; typedef struct RdmaBackendThread { QemuThread thread; - QemuMutex mutex; bool run; /* Set by thread manager to let thread know it should exit */ bool is_running; /* Set by the thread to report its status */ } RdmaBackendThread; -typedef struct RecvMadList { - QemuMutex lock; - QList *list; -} RecvMadList; - typedef struct RdmaCmMux { CharBackend *chr_be; int can_receive; @@ -48,7 +43,7 @@ typedef struct RdmaBackendDev { struct ibv_context *context; struct ibv_comp_channel *channel; uint8_t port_num; - RecvMadList recv_mads_list; + RdmaProtectedQList recv_mads_list; RdmaCmMux rdmacm_mux; } RdmaBackendDev; @@ -70,6 +65,7 @@ typedef struct RdmaBackendQP { struct ibv_pd *ibpd; struct ibv_qp *ibqp; uint8_t sgid_idx; + RdmaProtectedGSList cqe_ctx_list; } RdmaBackendQP; #endif diff --git a/hw/rdma/rdma_rm.c b/hw/rdma/rdma_rm.c index 268ff633a4..bac3b2f4a6 100644 --- a/hw/rdma/rdma_rm.c +++ b/hw/rdma/rdma_rm.c @@ -16,7 +16,9 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "cpu.h" +#include "monitor/monitor.h" +#include "trace.h" #include "rdma_utils.h" #include "rdma_backend.h" #include "rdma_rm.h" @@ -25,6 +27,58 @@ #define PG_DIR_SZ { TARGET_PAGE_SIZE / sizeof(__u64) } #define PG_TBL_SZ { TARGET_PAGE_SIZE / sizeof(__u64) } +void rdma_dump_device_counters(Monitor *mon, RdmaDeviceResources *dev_res) +{ + monitor_printf(mon, "\ttx : %" PRId64 "\n", + dev_res->stats.tx); + monitor_printf(mon, "\ttx_len : %" PRId64 "\n", + dev_res->stats.tx_len); + monitor_printf(mon, "\ttx_err : %" PRId64 "\n", + dev_res->stats.tx_err); + monitor_printf(mon, "\trx_bufs : %" PRId64 "\n", + dev_res->stats.rx_bufs); + monitor_printf(mon, "\trx_bufs_len : %" PRId64 "\n", + dev_res->stats.rx_bufs_len); + monitor_printf(mon, "\trx_bufs_err : %" PRId64 "\n", + dev_res->stats.rx_bufs_err); + monitor_printf(mon, "\tcomps : %" PRId64 "\n", + dev_res->stats.completions); + monitor_printf(mon, "\tmissing_comps : %" PRId32 "\n", + dev_res->stats.missing_cqe); + monitor_printf(mon, "\tpoll_cq (bk) : %" PRId64 "\n", + dev_res->stats.poll_cq_from_bk); + monitor_printf(mon, "\tpoll_cq_ppoll_to : %" PRId64 "\n", + dev_res->stats.poll_cq_ppoll_to); + monitor_printf(mon, "\tpoll_cq (fe) : %" PRId64 "\n", + dev_res->stats.poll_cq_from_guest); + monitor_printf(mon, "\tpoll_cq_empty : %" PRId64 "\n", + dev_res->stats.poll_cq_from_guest_empty); + monitor_printf(mon, "\tmad_tx : %" PRId64 "\n", + dev_res->stats.mad_tx); + monitor_printf(mon, "\tmad_tx_err : %" PRId64 "\n", + dev_res->stats.mad_tx_err); + monitor_printf(mon, "\tmad_rx : %" PRId64 "\n", + dev_res->stats.mad_rx); + monitor_printf(mon, "\tmad_rx_err : %" PRId64 "\n", + dev_res->stats.mad_rx_err); + monitor_printf(mon, "\tmad_rx_bufs : %" PRId64 "\n", + dev_res->stats.mad_rx_bufs); + monitor_printf(mon, "\tmad_rx_bufs_err : %" PRId64 "\n", + dev_res->stats.mad_rx_bufs_err); + monitor_printf(mon, "\tPDs : %" PRId32 "\n", + dev_res->pd_tbl.used); + monitor_printf(mon, "\tMRs : %" PRId32 "\n", + dev_res->mr_tbl.used); + monitor_printf(mon, "\tUCs : %" PRId32 "\n", + dev_res->uc_tbl.used); + monitor_printf(mon, "\tQPs : %" PRId32 "\n", + dev_res->qp_tbl.used); + monitor_printf(mon, "\tCQs : %" PRId32 "\n", + dev_res->cq_tbl.used); + monitor_printf(mon, "\tCEQ_CTXs : %" PRId32 "\n", + dev_res->cqe_ctx_tbl.used); +} + static inline void res_tbl_init(const char *name, RdmaRmResTbl *tbl, uint32_t tbl_sz, uint32_t res_sz) { @@ -36,6 +90,7 @@ static inline void res_tbl_init(const char *name, RdmaRmResTbl *tbl, tbl->bitmap = bitmap_new(tbl_sz); tbl->tbl_sz = tbl_sz; tbl->res_sz = res_sz; + tbl->used = 0; qemu_mutex_init(&tbl->lock); } @@ -49,48 +104,52 @@ static inline void res_tbl_free(RdmaRmResTbl *tbl) g_free(tbl->bitmap); } -static inline void *res_tbl_get(RdmaRmResTbl *tbl, uint32_t handle) +static inline void *rdma_res_tbl_get(RdmaRmResTbl *tbl, uint32_t handle) { - pr_dbg("%s, handle=%d\n", tbl->name, handle); + trace_rdma_res_tbl_get(tbl->name, handle); if ((handle < tbl->tbl_sz) && (test_bit(handle, tbl->bitmap))) { return tbl->tbl + handle * tbl->res_sz; } else { - pr_dbg("Invalid handle %d\n", handle); + rdma_error_report("Table %s, invalid handle %d", tbl->name, handle); return NULL; } } -static inline void *res_tbl_alloc(RdmaRmResTbl *tbl, uint32_t *handle) +static inline void *rdma_res_tbl_alloc(RdmaRmResTbl *tbl, uint32_t *handle) { qemu_mutex_lock(&tbl->lock); *handle = find_first_zero_bit(tbl->bitmap, tbl->tbl_sz); if (*handle > tbl->tbl_sz) { - pr_dbg("Failed to alloc, bitmap is full\n"); + rdma_error_report("Table %s, failed to allocate, bitmap is full", + tbl->name); qemu_mutex_unlock(&tbl->lock); return NULL; } set_bit(*handle, tbl->bitmap); + tbl->used++; + qemu_mutex_unlock(&tbl->lock); memset(tbl->tbl + *handle * tbl->res_sz, 0, tbl->res_sz); - pr_dbg("%s, handle=%d\n", tbl->name, *handle); + trace_rdma_res_tbl_alloc(tbl->name, *handle); return tbl->tbl + *handle * tbl->res_sz; } -static inline void res_tbl_dealloc(RdmaRmResTbl *tbl, uint32_t handle) +static inline void rdma_res_tbl_dealloc(RdmaRmResTbl *tbl, uint32_t handle) { - pr_dbg("%s, handle=%d\n", tbl->name, handle); + trace_rdma_res_tbl_dealloc(tbl->name, handle); qemu_mutex_lock(&tbl->lock); if (handle < tbl->tbl_sz) { clear_bit(handle, tbl->bitmap); + tbl->used--; } qemu_mutex_unlock(&tbl->lock); @@ -102,7 +161,7 @@ int rdma_rm_alloc_pd(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev, RdmaRmPD *pd; int ret = -ENOMEM; - pd = res_tbl_alloc(&dev_res->pd_tbl, pd_handle); + pd = rdma_res_tbl_alloc(&dev_res->pd_tbl, pd_handle); if (!pd) { goto out; } @@ -118,7 +177,7 @@ int rdma_rm_alloc_pd(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev, return 0; out_tbl_dealloc: - res_tbl_dealloc(&dev_res->pd_tbl, *pd_handle); + rdma_res_tbl_dealloc(&dev_res->pd_tbl, *pd_handle); out: return ret; @@ -126,7 +185,7 @@ out: RdmaRmPD *rdma_rm_get_pd(RdmaDeviceResources *dev_res, uint32_t pd_handle) { - return res_tbl_get(&dev_res->pd_tbl, pd_handle); + return rdma_res_tbl_get(&dev_res->pd_tbl, pd_handle); } void rdma_rm_dealloc_pd(RdmaDeviceResources *dev_res, uint32_t pd_handle) @@ -135,14 +194,14 @@ void rdma_rm_dealloc_pd(RdmaDeviceResources *dev_res, uint32_t pd_handle) if (pd) { rdma_backend_destroy_pd(&pd->backend_pd); - res_tbl_dealloc(&dev_res->pd_tbl, pd_handle); + rdma_res_tbl_dealloc(&dev_res->pd_tbl, pd_handle); } } int rdma_rm_alloc_mr(RdmaDeviceResources *dev_res, uint32_t pd_handle, - uint64_t guest_start, size_t guest_length, void *host_virt, - int access_flags, uint32_t *mr_handle, uint32_t *lkey, - uint32_t *rkey) + uint64_t guest_start, uint64_t guest_length, + void *host_virt, int access_flags, uint32_t *mr_handle, + uint32_t *lkey, uint32_t *rkey) { RdmaRmMR *mr; int ret = 0; @@ -150,20 +209,15 @@ int rdma_rm_alloc_mr(RdmaDeviceResources *dev_res, uint32_t pd_handle, pd = rdma_rm_get_pd(dev_res, pd_handle); if (!pd) { - pr_dbg("Invalid PD\n"); return -EINVAL; } - mr = res_tbl_alloc(&dev_res->mr_tbl, mr_handle); + mr = rdma_res_tbl_alloc(&dev_res->mr_tbl, mr_handle); if (!mr) { - pr_dbg("Failed to allocate obj in table\n"); return -ENOMEM; } - pr_dbg("mr_handle=%d\n", *mr_handle); - - pr_dbg("host_virt=0x%p\n", host_virt); - pr_dbg("guest_start=0x%" PRIx64 "\n", guest_start); - pr_dbg("length=%zu\n", guest_length); + trace_rdma_rm_alloc_mr(*mr_handle, host_virt, guest_start, guest_length, + access_flags); if (host_virt) { mr->virt = host_virt; @@ -174,7 +228,6 @@ int rdma_rm_alloc_mr(RdmaDeviceResources *dev_res, uint32_t pd_handle, ret = rdma_backend_create_mr(&mr->backend_mr, &pd->backend_pd, mr->virt, mr->length, access_flags); if (ret) { - pr_dbg("Fail in rdma_backend_create_mr, err=%d\n", ret); ret = -EIO; goto out_dealloc_mr; } @@ -189,14 +242,14 @@ int rdma_rm_alloc_mr(RdmaDeviceResources *dev_res, uint32_t pd_handle, return 0; out_dealloc_mr: - res_tbl_dealloc(&dev_res->mr_tbl, *mr_handle); + rdma_res_tbl_dealloc(&dev_res->mr_tbl, *mr_handle); return ret; } RdmaRmMR *rdma_rm_get_mr(RdmaDeviceResources *dev_res, uint32_t mr_handle) { - return res_tbl_get(&dev_res->mr_tbl, mr_handle); + return rdma_res_tbl_get(&dev_res->mr_tbl, mr_handle); } void rdma_rm_dealloc_mr(RdmaDeviceResources *dev_res, uint32_t mr_handle) @@ -205,12 +258,12 @@ void rdma_rm_dealloc_mr(RdmaDeviceResources *dev_res, uint32_t mr_handle) if (mr) { rdma_backend_destroy_mr(&mr->backend_mr); - pr_dbg("start=0x%" PRIx64 "\n", mr->start); + trace_rdma_rm_dealloc_mr(mr_handle, mr->start); if (mr->start) { mr->virt -= (mr->start & (TARGET_PAGE_SIZE - 1)); munmap(mr->virt, mr->length); } - res_tbl_dealloc(&dev_res->mr_tbl, mr_handle); + rdma_res_tbl_dealloc(&dev_res->mr_tbl, mr_handle); } } @@ -222,12 +275,13 @@ int rdma_rm_alloc_uc(RdmaDeviceResources *dev_res, uint32_t pfn, /* TODO: Need to make sure pfn is between bar start address and * bsd+RDMA_BAR2_UAR_SIZE if (pfn > RDMA_BAR2_UAR_SIZE) { - pr_err("pfn out of range (%d > %d)\n", pfn, RDMA_BAR2_UAR_SIZE); + rdma_error_report("pfn out of range (%d > %d)", pfn, + RDMA_BAR2_UAR_SIZE); return -ENOMEM; } */ - uc = res_tbl_alloc(&dev_res->uc_tbl, uc_handle); + uc = rdma_res_tbl_alloc(&dev_res->uc_tbl, uc_handle); if (!uc) { return -ENOMEM; } @@ -237,7 +291,7 @@ int rdma_rm_alloc_uc(RdmaDeviceResources *dev_res, uint32_t pfn, RdmaRmUC *rdma_rm_get_uc(RdmaDeviceResources *dev_res, uint32_t uc_handle) { - return res_tbl_get(&dev_res->uc_tbl, uc_handle); + return rdma_res_tbl_get(&dev_res->uc_tbl, uc_handle); } void rdma_rm_dealloc_uc(RdmaDeviceResources *dev_res, uint32_t uc_handle) @@ -245,13 +299,13 @@ void rdma_rm_dealloc_uc(RdmaDeviceResources *dev_res, uint32_t uc_handle) RdmaRmUC *uc = rdma_rm_get_uc(dev_res, uc_handle); if (uc) { - res_tbl_dealloc(&dev_res->uc_tbl, uc_handle); + rdma_res_tbl_dealloc(&dev_res->uc_tbl, uc_handle); } } RdmaRmCQ *rdma_rm_get_cq(RdmaDeviceResources *dev_res, uint32_t cq_handle) { - return res_tbl_get(&dev_res->cq_tbl, cq_handle); + return rdma_res_tbl_get(&dev_res->cq_tbl, cq_handle); } int rdma_rm_alloc_cq(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev, @@ -260,7 +314,7 @@ int rdma_rm_alloc_cq(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev, int rc; RdmaRmCQ *cq; - cq = res_tbl_alloc(&dev_res->cq_tbl, cq_handle); + cq = rdma_res_tbl_alloc(&dev_res->cq_tbl, cq_handle); if (!cq) { return -ENOMEM; } @@ -287,8 +341,6 @@ void rdma_rm_req_notify_cq(RdmaDeviceResources *dev_res, uint32_t cq_handle, { RdmaRmCQ *cq; - pr_dbg("cq_handle=%d, notify=0x%x\n", cq_handle, notify); - cq = rdma_rm_get_cq(dev_res, cq_handle); if (!cq) { return; @@ -297,8 +349,6 @@ void rdma_rm_req_notify_cq(RdmaDeviceResources *dev_res, uint32_t cq_handle, if (cq->notify != CNT_SET) { cq->notify = notify ? CNT_ARM : CNT_CLEAR; } - - pr_dbg("notify=%d\n", cq->notify); } void rdma_rm_dealloc_cq(RdmaDeviceResources *dev_res, uint32_t cq_handle) @@ -312,7 +362,7 @@ void rdma_rm_dealloc_cq(RdmaDeviceResources *dev_res, uint32_t cq_handle) rdma_backend_destroy_cq(&cq->backend_cq); - res_tbl_dealloc(&dev_res->cq_tbl, cq_handle); + rdma_res_tbl_dealloc(&dev_res->cq_tbl, cq_handle); } RdmaRmQP *rdma_rm_get_qp(RdmaDeviceResources *dev_res, uint32_t qpn) @@ -323,6 +373,10 @@ RdmaRmQP *rdma_rm_get_qp(RdmaDeviceResources *dev_res, uint32_t qpn) g_bytes_unref(key); + if (!qp) { + rdma_error_report("Invalid QP handle %d", qpn); + } + return qp; } @@ -338,11 +392,8 @@ int rdma_rm_alloc_qp(RdmaDeviceResources *dev_res, uint32_t pd_handle, RdmaRmPD *pd; uint32_t rm_qpn; - pr_dbg("qp_type=%d\n", qp_type); - pd = rdma_rm_get_pd(dev_res, pd_handle); if (!pd) { - pr_err("Invalid pd handle (%d)\n", pd_handle); return -EINVAL; } @@ -350,8 +401,8 @@ int rdma_rm_alloc_qp(RdmaDeviceResources *dev_res, uint32_t pd_handle, rcq = rdma_rm_get_cq(dev_res, recv_cq_handle); if (!scq || !rcq) { - pr_err("Invalid send_cqn or recv_cqn (%d, %d)\n", - send_cq_handle, recv_cq_handle); + rdma_error_report("Invalid send_cqn or recv_cqn (%d, %d)", + send_cq_handle, recv_cq_handle); return -EINVAL; } @@ -360,11 +411,10 @@ int rdma_rm_alloc_qp(RdmaDeviceResources *dev_res, uint32_t pd_handle, rcq->notify = CNT_SET; } - qp = res_tbl_alloc(&dev_res->qp_tbl, &rm_qpn); + qp = rdma_res_tbl_alloc(&dev_res->qp_tbl, &rm_qpn); if (!qp) { return -ENOMEM; } - pr_dbg("rm_qpn=%d\n", rm_qpn); qp->qpn = rm_qpn; qp->qp_state = IBV_QPS_RESET; @@ -382,13 +432,13 @@ int rdma_rm_alloc_qp(RdmaDeviceResources *dev_res, uint32_t pd_handle, } *qpn = rdma_backend_qpn(&qp->backend_qp); - pr_dbg("rm_qpn=%d, backend_qpn=0x%x\n", rm_qpn, *qpn); + trace_rdma_rm_alloc_qp(rm_qpn, *qpn, qp_type); g_hash_table_insert(dev_res->qp_hash, g_bytes_new(qpn, sizeof(*qpn)), qp); return 0; out_dealloc_qp: - res_tbl_dealloc(&dev_res->qp_tbl, qp->qpn); + rdma_res_tbl_dealloc(&dev_res->qp_tbl, qp->qpn); return rc; } @@ -402,28 +452,22 @@ int rdma_rm_modify_qp(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev, RdmaRmQP *qp; int ret; - pr_dbg("qpn=0x%x\n", qp_handle); - pr_dbg("qkey=0x%x\n", qkey); - qp = rdma_rm_get_qp(dev_res, qp_handle); if (!qp) { return -EINVAL; } - pr_dbg("qp_type=%d\n", qp->qp_type); - pr_dbg("attr_mask=0x%x\n", attr_mask); - if (qp->qp_type == IBV_QPT_SMI) { - pr_dbg("QP0 unsupported\n"); + rdma_error_report("Got QP0 request"); return -EPERM; } else if (qp->qp_type == IBV_QPT_GSI) { - pr_dbg("QP1\n"); return 0; } + trace_rdma_rm_modify_qp(qp_handle, attr_mask, qp_state, sgid_idx); + if (attr_mask & IBV_QP_STATE) { qp->qp_state = qp_state; - pr_dbg("qp_state=%d\n", qp->qp_state); if (qp->qp_state == IBV_QPS_INIT) { ret = rdma_backend_qp_state_init(backend_dev, &qp->backend_qp, @@ -435,11 +479,11 @@ int rdma_rm_modify_qp(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev, if (qp->qp_state == IBV_QPS_RTR) { /* Get backend gid index */ - pr_dbg("Guest sgid_idx=%d\n", sgid_idx); sgid_idx = rdma_rm_get_backend_gid_index(dev_res, backend_dev, sgid_idx); if (sgid_idx <= 0) { /* TODO check also less than bk.max_sgid */ - pr_dbg("Fail to get bk sgid_idx for sgid_idx %d\n", sgid_idx); + rdma_error_report("Failed to get bk sgid_idx for sgid_idx %d", + sgid_idx); return -EIO; } @@ -471,15 +515,11 @@ int rdma_rm_query_qp(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev, { RdmaRmQP *qp; - pr_dbg("qpn=0x%x\n", qp_handle); - qp = rdma_rm_get_qp(dev_res, qp_handle); if (!qp) { return -EINVAL; } - pr_dbg("qp_type=%d\n", qp->qp_type); - return rdma_backend_query_qp(&qp->backend_qp, attr, attr_mask, init_attr); } @@ -497,22 +537,20 @@ void rdma_rm_dealloc_qp(RdmaDeviceResources *dev_res, uint32_t qp_handle) return; } - rdma_backend_destroy_qp(&qp->backend_qp); + rdma_backend_destroy_qp(&qp->backend_qp, dev_res); - res_tbl_dealloc(&dev_res->qp_tbl, qp->qpn); + rdma_res_tbl_dealloc(&dev_res->qp_tbl, qp->qpn); } void *rdma_rm_get_cqe_ctx(RdmaDeviceResources *dev_res, uint32_t cqe_ctx_id) { void **cqe_ctx; - cqe_ctx = res_tbl_get(&dev_res->cqe_ctx_tbl, cqe_ctx_id); + cqe_ctx = rdma_res_tbl_get(&dev_res->cqe_ctx_tbl, cqe_ctx_id); if (!cqe_ctx) { return NULL; } - pr_dbg("ctx=%p\n", *cqe_ctx); - return *cqe_ctx; } @@ -521,12 +559,11 @@ int rdma_rm_alloc_cqe_ctx(RdmaDeviceResources *dev_res, uint32_t *cqe_ctx_id, { void **cqe_ctx; - cqe_ctx = res_tbl_alloc(&dev_res->cqe_ctx_tbl, cqe_ctx_id); + cqe_ctx = rdma_res_tbl_alloc(&dev_res->cqe_ctx_tbl, cqe_ctx_id); if (!cqe_ctx) { return -ENOMEM; } - pr_dbg("ctx=%p\n", ctx); *cqe_ctx = ctx; return 0; @@ -534,7 +571,7 @@ int rdma_rm_alloc_cqe_ctx(RdmaDeviceResources *dev_res, uint32_t *cqe_ctx_id, void rdma_rm_dealloc_cqe_ctx(RdmaDeviceResources *dev_res, uint32_t cqe_ctx_id) { - res_tbl_dealloc(&dev_res->cqe_ctx_tbl, cqe_ctx_id); + rdma_res_tbl_dealloc(&dev_res->cqe_ctx_tbl, cqe_ctx_id); } int rdma_rm_add_gid(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev, @@ -544,7 +581,6 @@ int rdma_rm_add_gid(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev, rc = rdma_backend_add_gid(backend_dev, ifname, gid); if (rc) { - pr_dbg("Fail to add gid\n"); return -EINVAL; } @@ -565,7 +601,6 @@ int rdma_rm_del_gid(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev, rc = rdma_backend_del_gid(backend_dev, ifname, &dev_res->port.gid_tbl[gid_idx].gid); if (rc) { - pr_dbg("Fail to delete gid\n"); return -EINVAL; } @@ -580,7 +615,7 @@ int rdma_rm_get_backend_gid_index(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev, int sgid_idx) { if (unlikely(sgid_idx < 0 || sgid_idx >= MAX_PORT_GIDS)) { - pr_dbg("Got invalid sgid_idx %d\n", sgid_idx); + rdma_error_report("Got invalid sgid_idx %d", sgid_idx); return -EINVAL; } @@ -590,9 +625,6 @@ int rdma_rm_get_backend_gid_index(RdmaDeviceResources *dev_res, &dev_res->port.gid_tbl[sgid_idx].gid); } - pr_dbg("backend_gid_index=%d\n", - dev_res->port.gid_tbl[sgid_idx].backend_gid_index); - return dev_res->port.gid_tbl[sgid_idx].backend_gid_index; } @@ -624,8 +656,7 @@ static void fini_ports(RdmaDeviceResources *dev_res, } } -int rdma_rm_init(RdmaDeviceResources *dev_res, struct ibv_device_attr *dev_attr, - Error **errp) +int rdma_rm_init(RdmaDeviceResources *dev_res, struct ibv_device_attr *dev_attr) { dev_res->qp_hash = g_hash_table_new_full(g_bytes_hash, g_bytes_equal, destroy_qp_hash_key, NULL); @@ -643,12 +674,19 @@ int rdma_rm_init(RdmaDeviceResources *dev_res, struct ibv_device_attr *dev_attr, init_ports(dev_res); + qemu_mutex_init(&dev_res->lock); + + memset(&dev_res->stats, 0, sizeof(dev_res->stats)); + atomic_set(&dev_res->stats.missing_cqe, 0); + return 0; } void rdma_rm_fini(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev, const char *ifname) { + qemu_mutex_destroy(&dev_res->lock); + fini_ports(dev_res, backend_dev, ifname); res_tbl_free(&dev_res->uc_tbl); diff --git a/hw/rdma/rdma_rm.h b/hw/rdma/rdma_rm.h index 3c602c04c0..4f03f9b8c5 100644 --- a/hw/rdma/rdma_rm.h +++ b/hw/rdma/rdma_rm.h @@ -20,8 +20,8 @@ #include "rdma_backend_defs.h" #include "rdma_rm_defs.h" -int rdma_rm_init(RdmaDeviceResources *dev_res, struct ibv_device_attr *dev_attr, - Error **errp); +int rdma_rm_init(RdmaDeviceResources *dev_res, + struct ibv_device_attr *dev_attr); void rdma_rm_fini(RdmaDeviceResources *dev_res, RdmaBackendDev *backend_dev, const char *ifname); @@ -31,9 +31,9 @@ RdmaRmPD *rdma_rm_get_pd(RdmaDeviceResources *dev_res, uint32_t pd_handle); void rdma_rm_dealloc_pd(RdmaDeviceResources *dev_res, uint32_t pd_handle); int rdma_rm_alloc_mr(RdmaDeviceResources *dev_res, uint32_t pd_handle, - uint64_t guest_start, size_t guest_length, void *host_virt, - int access_flags, uint32_t *mr_handle, uint32_t *lkey, - uint32_t *rkey); + uint64_t guest_start, uint64_t guest_length, + void *host_virt, int access_flags, uint32_t *mr_handle, + uint32_t *lkey, uint32_t *rkey); RdmaRmMR *rdma_rm_get_mr(RdmaDeviceResources *dev_res, uint32_t mr_handle); void rdma_rm_dealloc_mr(RdmaDeviceResources *dev_res, uint32_t mr_handle); @@ -81,5 +81,6 @@ static inline union ibv_gid *rdma_rm_get_gid(RdmaDeviceResources *dev_res, { return &dev_res->port.gid_tbl[sgid_idx].gid; } +void rdma_dump_device_counters(Monitor *mon, RdmaDeviceResources *dev_res); #endif diff --git a/hw/rdma/rdma_rm_defs.h b/hw/rdma/rdma_rm_defs.h index 0ba61d1838..c200d311de 100644 --- a/hw/rdma/rdma_rm_defs.h +++ b/hw/rdma/rdma_rm_defs.h @@ -34,7 +34,9 @@ #define MAX_QP_INIT_RD_ATOM 16 #define MAX_AH 64 -#define MAX_RM_TBL_NAME 16 +#define MAX_RM_TBL_NAME 16 +#define MAX_CONSEQ_EMPTY_POLL_CQ 4096 /* considered as error above this */ + typedef struct RdmaRmResTbl { char name[MAX_RM_TBL_NAME]; QemuMutex lock; @@ -42,6 +44,7 @@ typedef struct RdmaRmResTbl { size_t tbl_sz; size_t res_sz; void *tbl; + uint32_t used; /* number of used entries in the table */ } RdmaRmResTbl; typedef struct RdmaRmPD { @@ -96,7 +99,28 @@ typedef struct RdmaRmPort { enum ibv_port_state state; } RdmaRmPort; -typedef struct RdmaDeviceResources { +typedef struct RdmaRmStats { + uint64_t tx; + uint64_t tx_len; + uint64_t tx_err; + uint64_t rx_bufs; + uint64_t rx_bufs_len; + uint64_t rx_bufs_err; + uint64_t completions; + uint64_t mad_tx; + uint64_t mad_tx_err; + uint64_t mad_rx; + uint64_t mad_rx_err; + uint64_t mad_rx_bufs; + uint64_t mad_rx_bufs_err; + uint64_t poll_cq_from_bk; + uint64_t poll_cq_from_guest; + uint64_t poll_cq_from_guest_empty; + uint64_t poll_cq_ppoll_to; + uint32_t missing_cqe; +} RdmaRmStats; + +struct RdmaDeviceResources { RdmaRmPort port; RdmaRmResTbl pd_tbl; RdmaRmResTbl mr_tbl; @@ -105,6 +129,8 @@ typedef struct RdmaDeviceResources { RdmaRmResTbl cq_tbl; RdmaRmResTbl cqe_ctx_tbl; GHashTable *qp_hash; /* Keeps mapping between real and emulated */ -} RdmaDeviceResources; + QemuMutex lock; + RdmaRmStats stats; +}; #endif diff --git a/hw/rdma/rdma_utils.c b/hw/rdma/rdma_utils.c index 4fbea8cde2..73f279104c 100644 --- a/hw/rdma/rdma_utils.c +++ b/hw/rdma/rdma_utils.c @@ -14,26 +14,25 @@ */ #include "qemu/osdep.h" +#include "qapi/qmp/qlist.h" +#include "qapi/qmp/qnum.h" +#include "trace.h" #include "rdma_utils.h" -#ifdef PVRDMA_DEBUG -unsigned long pr_dbg_cnt; -#endif - void *rdma_pci_dma_map(PCIDevice *dev, dma_addr_t addr, dma_addr_t plen) { void *p; hwaddr len = plen; if (!addr) { - pr_dbg("addr is NULL\n"); + rdma_error_report("addr is NULL"); return NULL; } p = pci_dma_map(dev, addr, &len, DMA_DIRECTION_TO_DEVICE); if (!p) { - pr_dbg("Fail in pci_dma_map, addr=0x%" PRIx64 ", len=%" PRId64 "\n", - addr, len); + rdma_error_report("pci_dma_map fail, addr=0x%"PRIx64", len=%"PRId64, + addr, len); return NULL; } @@ -42,15 +41,81 @@ void *rdma_pci_dma_map(PCIDevice *dev, dma_addr_t addr, dma_addr_t plen) return NULL; } - pr_dbg("0x%" PRIx64 " -> %p (len=% " PRId64 ")\n", addr, p, len); + trace_rdma_pci_dma_map(addr, p, len); return p; } void rdma_pci_dma_unmap(PCIDevice *dev, void *buffer, dma_addr_t len) { - pr_dbg("%p\n", buffer); + trace_rdma_pci_dma_unmap(buffer); if (buffer) { pci_dma_unmap(dev, buffer, len, DMA_DIRECTION_TO_DEVICE, 0); } } + +void rdma_protected_qlist_init(RdmaProtectedQList *list) +{ + qemu_mutex_init(&list->lock); + list->list = qlist_new(); +} + +void rdma_protected_qlist_destroy(RdmaProtectedQList *list) +{ + if (list->list) { + qlist_destroy_obj(QOBJECT(list->list)); + qemu_mutex_destroy(&list->lock); + list->list = NULL; + } +} + +void rdma_protected_qlist_append_int64(RdmaProtectedQList *list, int64_t value) +{ + qemu_mutex_lock(&list->lock); + qlist_append_int(list->list, value); + qemu_mutex_unlock(&list->lock); +} + +int64_t rdma_protected_qlist_pop_int64(RdmaProtectedQList *list) +{ + QObject *obj; + + qemu_mutex_lock(&list->lock); + obj = qlist_pop(list->list); + qemu_mutex_unlock(&list->lock); + + if (!obj) { + return -ENOENT; + } + + return qnum_get_uint(qobject_to(QNum, obj)); +} + +void rdma_protected_gslist_init(RdmaProtectedGSList *list) +{ + qemu_mutex_init(&list->lock); +} + +void rdma_protected_gslist_destroy(RdmaProtectedGSList *list) +{ + if (list->list) { + g_slist_free(list->list); + list->list = NULL; + } +} + +void rdma_protected_gslist_append_int32(RdmaProtectedGSList *list, + int32_t value) +{ + qemu_mutex_lock(&list->lock); + list->list = g_slist_prepend(list->list, GINT_TO_POINTER(value)); + qemu_mutex_unlock(&list->lock); +} + +void rdma_protected_gslist_remove_int32(RdmaProtectedGSList *list, + int32_t value) +{ + qemu_mutex_lock(&list->lock); + list->list = g_slist_remove(list->list, GINT_TO_POINTER(value)); + qemu_mutex_unlock(&list->lock); +} diff --git a/hw/rdma/rdma_utils.h b/hw/rdma/rdma_utils.h index 4490ea0b94..2d42249691 100644 --- a/hw/rdma/rdma_utils.h +++ b/hw/rdma/rdma_utils.h @@ -17,51 +17,40 @@ #ifndef RDMA_UTILS_H #define RDMA_UTILS_H +#include "qemu/error-report.h" #include "hw/pci/pci.h" #include "sysemu/dma.h" #include "stdio.h" -#define pr_info(fmt, ...) \ - fprintf(stdout, "%s: %-20s (%3d): " fmt, "rdma", __func__, __LINE__,\ - ## __VA_ARGS__) +#define rdma_error_report(fmt, ...) \ + error_report("%s: " fmt, "rdma", ## __VA_ARGS__) +#define rdma_warn_report(fmt, ...) \ + warn_report("%s: " fmt, "rdma", ## __VA_ARGS__) +#define rdma_info_report(fmt, ...) \ + info_report("%s: " fmt, "rdma", ## __VA_ARGS__) -#define pr_err(fmt, ...) \ - fprintf(stderr, "%s: Error at %-20s (%3d): " fmt, "rdma", __func__, \ - __LINE__, ## __VA_ARGS__) +typedef struct RdmaProtectedQList { + QemuMutex lock; + QList *list; +} RdmaProtectedQList; -#ifdef PVRDMA_DEBUG -extern unsigned long pr_dbg_cnt; - -#define init_pr_dbg(void) \ -{ \ - pr_dbg_cnt = 0; \ -} - -#define pr_dbg(fmt, ...) \ - fprintf(stdout, "%lx %ld: %-20s (%3d): " fmt, pthread_self(), pr_dbg_cnt++, \ - __func__, __LINE__, ## __VA_ARGS__) - -#define pr_dbg_buf(title, buf, len) \ -{ \ - int i; \ - char *b = g_malloc0(len * 3 + 1); \ - char b1[4]; \ - for (i = 0; i < len; i++) { \ - sprintf(b1, "%.2X ", buf[i] & 0x000000FF); \ - strcat(b, b1); \ - } \ - pr_dbg("%s (%d): %s\n", title, len, b); \ - g_free(b); \ -} - -#else -#define init_pr_dbg(void) -#define pr_dbg(fmt, ...) -#define pr_dbg_buf(title, buf, len) -#endif +typedef struct RdmaProtectedGSList { + QemuMutex lock; + GSList *list; +} RdmaProtectedGSList; void *rdma_pci_dma_map(PCIDevice *dev, dma_addr_t addr, dma_addr_t plen); void rdma_pci_dma_unmap(PCIDevice *dev, void *buffer, dma_addr_t len); +void rdma_protected_qlist_init(RdmaProtectedQList *list); +void rdma_protected_qlist_destroy(RdmaProtectedQList *list); +void rdma_protected_qlist_append_int64(RdmaProtectedQList *list, int64_t value); +int64_t rdma_protected_qlist_pop_int64(RdmaProtectedQList *list); +void rdma_protected_gslist_init(RdmaProtectedGSList *list); +void rdma_protected_gslist_destroy(RdmaProtectedGSList *list); +void rdma_protected_gslist_append_int32(RdmaProtectedGSList *list, + int32_t value); +void rdma_protected_gslist_remove_int32(RdmaProtectedGSList *list, + int32_t value); static inline void addrconf_addr_eui48(uint8_t *eui, const char *addr) { diff --git a/hw/rdma/trace-events b/hw/rdma/trace-events index c4c202e647..2022a820cb 100644 --- a/hw/rdma/trace-events +++ b/hw/rdma/trace-events @@ -1,5 +1,31 @@ -# See docs/tracing.txt for syntax documentation. +# See docs/devel/tracing.txt for syntax documentation. -#hw/rdma/rdma_backend.c -create_ah_cache_hit(uint64_t subnet, uint64_t net_id) "subnet = 0x%"PRIx64" net_id = 0x%"PRIx64 -create_ah_cache_miss(uint64_t subnet, uint64_t net_id) "subnet = 0x%"PRIx64" net_id = 0x%"PRIx64 +# rdma_backend.c +rdma_check_dev_attr(const char *name, int max_bk, int max_fe) "%s: be=%d, fe=%d" +rdma_create_ah_cache_hit(uint64_t subnet, uint64_t if_id) "subnet=0x%"PRIx64",if_id=0x%"PRIx64 +rdma_create_ah_cache_miss(uint64_t subnet, uint64_t if_id) "subnet=0x%"PRIx64",if_id=0x%"PRIx64 +rdma_poll_cq(int ne, void *ibcq) "Got %d completion(s) from cq %p" +rdmacm_mux(const char *title, int msg_type, int op_code) "%s: msg_type=%d, op_code=%d" +rdmacm_mux_check_op_status(int msg_type, int op_code, int err_code) "resp: msg_type=%d, op_code=%d, err_code=%d" +rdma_mad_message(const char *title, int len, char *data) "mad %s (%d): %s" +rdma_backend_rc_qp_state_init(uint32_t qpn) "RC QP 0x%x switch to INIT" +rdma_backend_ud_qp_state_init(uint32_t qpn, uint32_t qkey) "UD QP 0x%x switch to INIT, qkey=0x%x" +rdma_backend_rc_qp_state_rtr(uint32_t qpn, uint64_t subnet, uint64_t ifid, uint8_t sgid_idx, uint32_t dqpn, uint32_t rq_psn) "RC QP 0x%x switch to RTR, subnet = 0x%"PRIx64", ifid = 0x%"PRIx64 ", sgid_idx=%d, dqpn=0x%x, rq_psn=0x%x" +rdma_backend_ud_qp_state_rtr(uint32_t qpn, uint32_t qkey) "UD QP 0x%x switch to RTR, qkey=0x%x" +rdma_backend_rc_qp_state_rts(uint32_t qpn, uint32_t sq_psn) "RC QP 0x%x switch to RTS, sq_psn=0x%x, " +rdma_backend_ud_qp_state_rts(uint32_t qpn, uint32_t sq_psn, uint32_t qkey) "UD QP 0x%x switch to RTS, sq_psn=0x%x, qkey=0x%x" +rdma_backend_get_gid_index(uint64_t subnet, uint64_t ifid, int gid_idx) "subnet=0x%"PRIx64", ifid=0x%"PRIx64 ", gid_idx=%d" +rdma_backend_gid_change(const char *op, uint64_t subnet, uint64_t ifid) "%s subnet=0x%"PRIx64", ifid=0x%"PRIx64 + +# rdma_rm.c +rdma_res_tbl_get(char *name, uint32_t handle) "tbl %s, handle %d" +rdma_res_tbl_alloc(char *name, uint32_t handle) "tbl %s, handle %d" +rdma_res_tbl_dealloc(char *name, uint32_t handle) "tbl %s, handle %d" +rdma_rm_alloc_mr(uint32_t mr_handle, void *host_virt, uint64_t guest_start, uint64_t guest_length, int access_flags) "mr_handle=%d, host_virt=%p, guest_start=0x%"PRIx64", length=%" PRId64", access_flags=0x%x" +rdma_rm_dealloc_mr(uint32_t mr_handle, uint64_t guest_start) "mr_handle=%d, guest_start=0x%"PRIx64 +rdma_rm_alloc_qp(uint32_t rm_qpn, uint32_t backend_qpn, uint8_t qp_type) "rm_qpn=%d, backend_qpn=0x%x, qp_type=%d" +rdma_rm_modify_qp(uint32_t qpn, uint32_t attr_mask, int qp_state, uint8_t sgid_idx) "qpn=0x%x, attr_mask=0x%x, qp_state=%d, sgid_idx=%d" + +# rdma_utils.c +rdma_pci_dma_map(uint64_t addr, void *vaddr, uint64_t len) "0x%"PRIx64" -> %p (len=%" PRId64")" +rdma_pci_dma_unmap(void *vaddr) "%p" diff --git a/hw/rdma/vmw/pvrdma.h b/hw/rdma/vmw/pvrdma.h index ffae36986e..a8a04a253c 100644 --- a/hw/rdma/vmw/pvrdma.h +++ b/hw/rdma/vmw/pvrdma.h @@ -70,6 +70,14 @@ typedef struct DSRInfo { PvrdmaRing cq; } DSRInfo; +typedef struct PVRDMADevStats { + uint64_t commands; + uint64_t regs_reads; + uint64_t regs_writes; + uint64_t uar_writes; + uint64_t interrupts; +} PVRDMADevStats; + typedef struct PVRDMADev { PCIDevice parent_obj; MemoryRegion msix; @@ -89,6 +97,7 @@ typedef struct PVRDMADev { CharBackend mad_chr; VMXNET3State *func0; Notifier shutdown_notifier; + PVRDMADevStats stats; } PVRDMADev; #define PVRDMA_DEV(dev) OBJECT_CHECK(PVRDMADev, (dev), PVRDMA_HW_NAME) @@ -123,10 +132,11 @@ static inline void post_interrupt(PVRDMADev *dev, unsigned vector) PCIDevice *pci_dev = PCI_DEVICE(dev); if (likely(!dev->interrupt_mask)) { + dev->stats.interrupts++; msix_notify(pci_dev, vector); } } -int execute_command(PVRDMADev *dev); +int pvrdma_exec_cmd(PVRDMADev *dev); #endif diff --git a/hw/rdma/vmw/pvrdma_cmd.c b/hw/rdma/vmw/pvrdma_cmd.c index 89920887bf..4afcd2037d 100644 --- a/hw/rdma/vmw/pvrdma_cmd.c +++ b/hw/rdma/vmw/pvrdma_cmd.c @@ -14,7 +14,6 @@ */ #include "qemu/osdep.h" -#include "qemu/error-report.h" #include "cpu.h" #include "hw/hw.h" #include "hw/pci/pci.h" @@ -24,6 +23,7 @@ #include "../rdma_rm.h" #include "../rdma_utils.h" +#include "trace.h" #include "pvrdma.h" #include "standard-headers/rdma/vmw_pvrdma-abi.h" @@ -35,40 +35,38 @@ static void *pvrdma_map_to_pdir(PCIDevice *pdev, uint64_t pdir_dma, void *host_virt = NULL, *curr_page; if (!nchunks) { - pr_dbg("nchunks=0\n"); + rdma_error_report("Got nchunks=0"); return NULL; } dir = rdma_pci_dma_map(pdev, pdir_dma, TARGET_PAGE_SIZE); if (!dir) { - error_report("PVRDMA: Failed to map to page directory"); + rdma_error_report("Failed to map to page directory"); return NULL; } tbl = rdma_pci_dma_map(pdev, dir[0], TARGET_PAGE_SIZE); if (!tbl) { - error_report("PVRDMA: Failed to map to page table 0"); + rdma_error_report("Failed to map to page table 0"); goto out_unmap_dir; } curr_page = rdma_pci_dma_map(pdev, (dma_addr_t)tbl[0], TARGET_PAGE_SIZE); if (!curr_page) { - error_report("PVRDMA: Failed to map the first page"); + rdma_error_report("Failed to map the page 0"); goto out_unmap_tbl; } host_virt = mremap(curr_page, 0, length, MREMAP_MAYMOVE); - pr_dbg("mremap %p -> %p\n", curr_page, host_virt); if (host_virt == MAP_FAILED) { host_virt = NULL; - error_report("PVRDMA: Failed to remap memory for host_virt"); + rdma_error_report("Failed to remap memory for host_virt"); goto out_unmap_tbl; } + trace_pvrdma_map_to_pdir_host_virt(curr_page, host_virt); rdma_pci_dma_unmap(pdev, curr_page, TARGET_PAGE_SIZE); - pr_dbg("host_virt=%p\n", host_virt); - dir_idx = 0; tbl_idx = 1; addr_idx = 1; @@ -76,28 +74,28 @@ static void *pvrdma_map_to_pdir(PCIDevice *pdev, uint64_t pdir_dma, if (tbl_idx == TARGET_PAGE_SIZE / sizeof(uint64_t)) { tbl_idx = 0; dir_idx++; - pr_dbg("Mapping to table %d\n", dir_idx); rdma_pci_dma_unmap(pdev, tbl, TARGET_PAGE_SIZE); tbl = rdma_pci_dma_map(pdev, dir[dir_idx], TARGET_PAGE_SIZE); if (!tbl) { - error_report("PVRDMA: Failed to map to page table %d", dir_idx); + rdma_error_report("Failed to map to page table %d", dir_idx); goto out_unmap_host_virt; } } - pr_dbg("guest_dma[%d]=0x%" PRIx64 "\n", addr_idx, tbl[tbl_idx]); - curr_page = rdma_pci_dma_map(pdev, (dma_addr_t)tbl[tbl_idx], TARGET_PAGE_SIZE); if (!curr_page) { - error_report("PVRDMA: Failed to map to page %d, dir %d", tbl_idx, - dir_idx); + rdma_error_report("Failed to map to page %d, dir %d", tbl_idx, + dir_idx); goto out_unmap_host_virt; } mremap(curr_page, 0, TARGET_PAGE_SIZE, MREMAP_MAYMOVE | MREMAP_FIXED, host_virt + TARGET_PAGE_SIZE * addr_idx); + trace_pvrdma_map_to_pdir_next_page(addr_idx, curr_page, host_virt + + TARGET_PAGE_SIZE * addr_idx); + rdma_pci_dma_unmap(pdev, curr_page, TARGET_PAGE_SIZE); addr_idx++; @@ -125,9 +123,8 @@ static int query_port(PVRDMADev *dev, union pvrdma_cmd_req *req, { struct pvrdma_cmd_query_port *cmd = &req->query_port; struct pvrdma_cmd_query_port_resp *resp = &rsp->query_port_resp; - struct pvrdma_port_attr attrs = {0}; + struct pvrdma_port_attr attrs = {}; - pr_dbg("port=%d\n", cmd->port_num); if (cmd->port_num > MAX_PORTS) { return -EINVAL; } @@ -159,12 +156,10 @@ static int query_pkey(PVRDMADev *dev, union pvrdma_cmd_req *req, struct pvrdma_cmd_query_pkey *cmd = &req->query_pkey; struct pvrdma_cmd_query_pkey_resp *resp = &rsp->query_pkey_resp; - pr_dbg("port=%d\n", cmd->port_num); if (cmd->port_num > MAX_PORTS) { return -EINVAL; } - pr_dbg("index=%d\n", cmd->index); if (cmd->index > MAX_PKEYS) { return -EINVAL; } @@ -172,7 +167,6 @@ static int query_pkey(PVRDMADev *dev, union pvrdma_cmd_req *req, memset(resp, 0, sizeof(*resp)); resp->pkey = PVRDMA_PKEY; - pr_dbg("pkey=0x%x\n", resp->pkey); return 0; } @@ -184,8 +178,6 @@ static int create_pd(PVRDMADev *dev, union pvrdma_cmd_req *req, struct pvrdma_cmd_create_pd_resp *resp = &rsp->create_pd_resp; int rc; - pr_dbg("context=0x%x\n", cmd->ctx_handle ? cmd->ctx_handle : 0); - memset(resp, 0, sizeof(*resp)); rc = rdma_rm_alloc_pd(&dev->rdma_dev_res, &dev->backend_dev, &resp->pd_handle, cmd->ctx_handle); @@ -198,8 +190,6 @@ static int destroy_pd(PVRDMADev *dev, union pvrdma_cmd_req *req, { struct pvrdma_cmd_destroy_pd *cmd = &req->destroy_pd; - pr_dbg("pd_handle=%d\n", cmd->pd_handle); - rdma_rm_dealloc_pd(&dev->rdma_dev_res, cmd->pd_handle); return 0; @@ -216,15 +206,11 @@ static int create_mr(PVRDMADev *dev, union pvrdma_cmd_req *req, memset(resp, 0, sizeof(*resp)); - pr_dbg("pd_handle=%d\n", cmd->pd_handle); - pr_dbg("access_flags=0x%x\n", cmd->access_flags); - pr_dbg("flags=0x%x\n", cmd->flags); - if (!(cmd->flags & PVRDMA_MR_FLAG_DMA)) { host_virt = pvrdma_map_to_pdir(pci_dev, cmd->pdir_dma, cmd->nchunks, cmd->length); if (!host_virt) { - pr_dbg("Failed to map to pdir\n"); + rdma_error_report("Failed to map to pdir"); return -EINVAL; } } @@ -244,8 +230,6 @@ static int destroy_mr(PVRDMADev *dev, union pvrdma_cmd_req *req, { struct pvrdma_cmd_destroy_mr *cmd = &req->destroy_mr; - pr_dbg("mr_handle=%d\n", cmd->mr_handle); - rdma_rm_dealloc_mr(&dev->rdma_dev_res, cmd->mr_handle); return 0; @@ -260,20 +244,19 @@ static int create_cq_ring(PCIDevice *pci_dev , PvrdmaRing **ring, char ring_name[MAX_RING_NAME_SZ]; if (!nchunks || nchunks > PVRDMA_MAX_FAST_REG_PAGES) { - pr_dbg("invalid nchunks: %d\n", nchunks); + rdma_error_report("Got invalid nchunks: %d", nchunks); return rc; } - pr_dbg("pdir_dma=0x%llx\n", (long long unsigned int)pdir_dma); dir = rdma_pci_dma_map(pci_dev, pdir_dma, TARGET_PAGE_SIZE); if (!dir) { - pr_dbg("Failed to map to CQ page directory\n"); + rdma_error_report("Failed to map to CQ page directory"); goto out; } tbl = rdma_pci_dma_map(pci_dev, dir[0], TARGET_PAGE_SIZE); if (!tbl) { - pr_dbg("Failed to map to CQ page table\n"); + rdma_error_report("Failed to map to CQ page table"); goto out; } @@ -284,7 +267,7 @@ static int create_cq_ring(PCIDevice *pci_dev , PvrdmaRing **ring, rdma_pci_dma_map(pci_dev, tbl[0], TARGET_PAGE_SIZE); if (!r->ring_state) { - pr_dbg("Failed to map to CQ ring state\n"); + rdma_error_report("Failed to map to CQ ring state"); goto out_free_ring; } @@ -339,8 +322,6 @@ static int create_cq(PVRDMADev *dev, union pvrdma_cmd_req *req, return rc; } - pr_dbg("ring=%p\n", ring); - rc = rdma_rm_alloc_cq(&dev->rdma_dev_res, &dev->backend_dev, cmd->cqe, &resp->cq_handle, ring); if (rc) { @@ -359,11 +340,9 @@ static int destroy_cq(PVRDMADev *dev, union pvrdma_cmd_req *req, RdmaRmCQ *cq; PvrdmaRing *ring; - pr_dbg("cq_handle=%d\n", cmd->cq_handle); - cq = rdma_rm_get_cq(&dev->rdma_dev_res, cmd->cq_handle); if (!cq) { - pr_dbg("Invalid CQ handle\n"); + rdma_error_report("Got invalid CQ handle"); return -EINVAL; } @@ -388,42 +367,33 @@ static int create_qp_rings(PCIDevice *pci_dev, uint64_t pdir_dma, if (!spages || spages > PVRDMA_MAX_FAST_REG_PAGES || !rpages || rpages > PVRDMA_MAX_FAST_REG_PAGES) { - pr_dbg("invalid pages: %d, %d\n", spages, rpages); + rdma_error_report("Got invalid page count for QP ring: %d, %d", spages, + rpages); return rc; } - pr_dbg("pdir_dma=0x%llx\n", (long long unsigned int)pdir_dma); dir = rdma_pci_dma_map(pci_dev, pdir_dma, TARGET_PAGE_SIZE); if (!dir) { - pr_dbg("Failed to map to CQ page directory\n"); + rdma_error_report("Failed to map to QP page directory"); goto out; } tbl = rdma_pci_dma_map(pci_dev, dir[0], TARGET_PAGE_SIZE); if (!tbl) { - pr_dbg("Failed to map to CQ page table\n"); + rdma_error_report("Failed to map to QP page table"); goto out; } sr = g_malloc(2 * sizeof(*rr)); rr = &sr[1]; - pr_dbg("sring=%p\n", sr); - pr_dbg("rring=%p\n", rr); *rings = sr; - pr_dbg("scqe=%d\n", scqe); - pr_dbg("smax_sge=%d\n", smax_sge); - pr_dbg("spages=%d\n", spages); - pr_dbg("rcqe=%d\n", rcqe); - pr_dbg("rmax_sge=%d\n", rmax_sge); - pr_dbg("rpages=%d\n", rpages); - /* Create send ring */ sr->ring_state = (struct pvrdma_ring *) rdma_pci_dma_map(pci_dev, tbl[0], TARGET_PAGE_SIZE); if (!sr->ring_state) { - pr_dbg("Failed to map to CQ ring state\n"); + rdma_error_report("Failed to map to QP ring state"); goto out_free_sr_mem; } @@ -468,9 +438,7 @@ out: static void destroy_qp_rings(PvrdmaRing *ring) { - pr_dbg("sring=%p\n", &ring[0]); pvrdma_ring_free(&ring[0]); - pr_dbg("rring=%p\n", &ring[1]); pvrdma_ring_free(&ring[1]); rdma_pci_dma_unmap(ring->dev, ring->ring_state, TARGET_PAGE_SIZE); @@ -487,9 +455,6 @@ static int create_qp(PVRDMADev *dev, union pvrdma_cmd_req *req, memset(resp, 0, sizeof(*resp)); - pr_dbg("total_chunks=%d\n", cmd->total_chunks); - pr_dbg("send_chunks=%d\n", cmd->send_chunks); - rc = create_qp_rings(PCI_DEVICE(dev), cmd->pdir_dma, &rings, cmd->max_send_wr, cmd->max_send_sge, cmd->send_chunks, cmd->max_recv_wr, cmd->max_recv_sge, @@ -498,8 +463,6 @@ static int create_qp(PVRDMADev *dev, union pvrdma_cmd_req *req, return rc; } - pr_dbg("rings=%p\n", rings); - rc = rdma_rm_alloc_qp(&dev->rdma_dev_res, cmd->pd_handle, cmd->qp_type, cmd->max_send_wr, cmd->max_send_sge, cmd->send_cq_handle, cmd->max_recv_wr, @@ -525,10 +488,6 @@ static int modify_qp(PVRDMADev *dev, union pvrdma_cmd_req *req, struct pvrdma_cmd_modify_qp *cmd = &req->modify_qp; int rc; - pr_dbg("qp_handle=%d\n", cmd->qp_handle); - - memset(rsp, 0, sizeof(*rsp)); - /* No need to verify sgid_index since it is u8 */ rc = rdma_rm_modify_qp(&dev->rdma_dev_res, &dev->backend_dev, @@ -551,10 +510,7 @@ static int query_qp(PVRDMADev *dev, union pvrdma_cmd_req *req, struct ibv_qp_init_attr init_attr; int rc; - pr_dbg("qp_handle=%d\n", cmd->qp_handle); - pr_dbg("attr_mask=0x%x\n", cmd->attr_mask); - - memset(rsp, 0, sizeof(*rsp)); + memset(resp, 0, sizeof(*resp)); rc = rdma_rm_query_qp(&dev->rdma_dev_res, &dev->backend_dev, cmd->qp_handle, (struct ibv_qp_attr *)&resp->attrs, cmd->attr_mask, @@ -572,7 +528,6 @@ static int destroy_qp(PVRDMADev *dev, union pvrdma_cmd_req *req, qp = rdma_rm_get_qp(&dev->rdma_dev_res, cmd->qp_handle); if (!qp) { - pr_dbg("Invalid QP handle\n"); return -EINVAL; } @@ -591,16 +546,10 @@ static int create_bind(PVRDMADev *dev, union pvrdma_cmd_req *req, int rc; union ibv_gid *gid = (union ibv_gid *)&cmd->new_gid; - pr_dbg("index=%d\n", cmd->index); - if (cmd->index >= MAX_PORT_GIDS) { return -EINVAL; } - pr_dbg("gid[%d]=0x%llx,0x%llx\n", cmd->index, - (long long unsigned int)be64_to_cpu(gid->global.subnet_prefix), - (long long unsigned int)be64_to_cpu(gid->global.interface_id)); - rc = rdma_rm_add_gid(&dev->rdma_dev_res, &dev->backend_dev, dev->backend_eth_device_name, gid, cmd->index); @@ -614,8 +563,6 @@ static int destroy_bind(PVRDMADev *dev, union pvrdma_cmd_req *req, struct pvrdma_cmd_destroy_bind *cmd = &req->destroy_bind; - pr_dbg("index=%d\n", cmd->index); - if (cmd->index >= MAX_PORT_GIDS) { return -EINVAL; } @@ -633,8 +580,6 @@ static int create_uc(PVRDMADev *dev, union pvrdma_cmd_req *req, struct pvrdma_cmd_create_uc_resp *resp = &rsp->create_uc_resp; int rc; - pr_dbg("pfn=%d\n", cmd->pfn); - memset(resp, 0, sizeof(*resp)); rc = rdma_rm_alloc_uc(&dev->rdma_dev_res, cmd->pfn, &resp->ctx_handle); @@ -646,8 +591,6 @@ static int destroy_uc(PVRDMADev *dev, union pvrdma_cmd_req *req, { struct pvrdma_cmd_destroy_uc *cmd = &req->destroy_uc; - pr_dbg("ctx_handle=%d\n", cmd->ctx_handle); - rdma_rm_dealloc_uc(&dev->rdma_dev_res, cmd->ctx_handle); return 0; @@ -680,22 +623,21 @@ static struct cmd_handler cmd_handlers[] = { {PVRDMA_CMD_DESTROY_BIND, PVRDMA_CMD_DESTROY_BIND_RESP_NOOP, destroy_bind}, }; -int execute_command(PVRDMADev *dev) +int pvrdma_exec_cmd(PVRDMADev *dev) { int err = 0xFFFF; DSRInfo *dsr_info; dsr_info = &dev->dsr_info; - pr_dbg("cmd=%d\n", dsr_info->req->hdr.cmd); if (dsr_info->req->hdr.cmd >= sizeof(cmd_handlers) / sizeof(struct cmd_handler)) { - pr_dbg("Unsupported command\n"); + rdma_error_report("Unsupported command"); goto out; } if (!cmd_handlers[dsr_info->req->hdr.cmd].exec) { - pr_dbg("Unsupported command (not implemented yet)\n"); + rdma_error_report("Unsupported command (not implemented yet)"); goto out; } @@ -704,7 +646,10 @@ int execute_command(PVRDMADev *dev) dsr_info->rsp->hdr.response = dsr_info->req->hdr.response; dsr_info->rsp->hdr.ack = cmd_handlers[dsr_info->req->hdr.cmd].ack; dsr_info->rsp->hdr.err = err < 0 ? -err : 0; - pr_dbg("rsp->hdr.err=%d\n", dsr_info->rsp->hdr.err); + + trace_pvrdma_exec_cmd(dsr_info->req->hdr.cmd, dsr_info->rsp->hdr.err); + + dev->stats.commands++; out: set_reg_val(dev, PVRDMA_REG_ERR, err); diff --git a/hw/rdma/vmw/pvrdma_dev_ring.c b/hw/rdma/vmw/pvrdma_dev_ring.c index e8e5b502f6..d7bc7f5ccc 100644 --- a/hw/rdma/vmw/pvrdma_dev_ring.c +++ b/hw/rdma/vmw/pvrdma_dev_ring.c @@ -17,6 +17,8 @@ #include "hw/pci/pci.h" #include "cpu.h" +#include "trace.h" + #include "../rdma_utils.h" #include "standard-headers/drivers/infiniband/hw/vmw_pvrdma/pvrdma_ring.h" #include "pvrdma_dev_ring.h" @@ -30,13 +32,10 @@ int pvrdma_ring_init(PvrdmaRing *ring, const char *name, PCIDevice *dev, strncpy(ring->name, name, MAX_RING_NAME_SZ); ring->name[MAX_RING_NAME_SZ - 1] = 0; - pr_dbg("Initializing %s ring\n", ring->name); ring->dev = dev; ring->ring_state = ring_state; ring->max_elems = max_elems; ring->elem_sz = elem_sz; - pr_dbg("ring->elem_sz=%zu\n", ring->elem_sz); - pr_dbg("npages=%d\n", npages); /* TODO: Give a moment to think if we want to redo driver settings atomic_set(&ring->ring_state->prod_tail, 0); atomic_set(&ring->ring_state->cons_head, 0); @@ -46,14 +45,14 @@ int pvrdma_ring_init(PvrdmaRing *ring, const char *name, PCIDevice *dev, for (i = 0; i < npages; i++) { if (!tbl[i]) { - pr_err("npages=%ld but tbl[%d] is NULL\n", (long)npages, i); + rdma_error_report("npages=%d but tbl[%d] is NULL", npages, i); continue; } ring->pages[i] = rdma_pci_dma_map(dev, tbl[i], TARGET_PAGE_SIZE); if (!ring->pages[i]) { rc = -ENOMEM; - pr_dbg("Failed to map to page %d\n", i); + rdma_error_report("Failed to map to page %d in ring %s", i, name); goto out_free; } memset(ring->pages[i], 0, TARGET_PAGE_SIZE); @@ -78,7 +77,7 @@ void *pvrdma_ring_next_elem_read(PvrdmaRing *ring) e = pvrdma_idx_ring_has_data(ring->ring_state, ring->max_elems, &idx); if (e <= 0) { - pr_dbg("No more data in ring\n"); + trace_pvrdma_ring_next_elem_read_no_data(ring->name); return NULL; } @@ -89,11 +88,6 @@ void *pvrdma_ring_next_elem_read(PvrdmaRing *ring) void pvrdma_ring_read_inc(PvrdmaRing *ring) { pvrdma_idx_ring_inc(&ring->ring_state->cons_head, ring->max_elems); - /* - pr_dbg("%s: t=%d, h=%d, m=%ld\n", ring->name, - ring->ring_state->prod_tail, ring->ring_state->cons_head, - ring->max_elems); - */ } void *pvrdma_ring_next_elem_write(PvrdmaRing *ring) @@ -103,13 +97,13 @@ void *pvrdma_ring_next_elem_write(PvrdmaRing *ring) idx = pvrdma_idx_ring_has_space(ring->ring_state, ring->max_elems, &tail); if (idx <= 0) { - pr_dbg("CQ is full\n"); + rdma_error_report("CQ is full"); return NULL; } idx = pvrdma_idx(&ring->ring_state->prod_tail, ring->max_elems); if (idx < 0 || tail != idx) { - pr_dbg("invalid idx\n"); + rdma_error_report("Invalid idx %d", idx); return NULL; } @@ -120,11 +114,6 @@ void *pvrdma_ring_next_elem_write(PvrdmaRing *ring) void pvrdma_ring_write_inc(PvrdmaRing *ring) { pvrdma_idx_ring_inc(&ring->ring_state->prod_tail, ring->max_elems); - /* - pr_dbg("%s: t=%d, h=%d, m=%ld\n", ring->name, - ring->ring_state->prod_tail, ring->ring_state->cons_head, - ring->max_elems); - */ } void pvrdma_ring_free(PvrdmaRing *ring) @@ -137,7 +126,6 @@ void pvrdma_ring_free(PvrdmaRing *ring) return; } - pr_dbg("ring->npages=%d\n", ring->npages); while (ring->npages--) { rdma_pci_dma_unmap(ring->dev, ring->pages[ring->npages], TARGET_PAGE_SIZE); diff --git a/hw/rdma/vmw/pvrdma_main.c b/hw/rdma/vmw/pvrdma_main.c index d2bdb5ba8c..0b46561bad 100644 --- a/hw/rdma/vmw/pvrdma_main.c +++ b/hw/rdma/vmw/pvrdma_main.c @@ -25,6 +25,8 @@ #include "cpu.h" #include "trace.h" #include "sysemu/sysemu.h" +#include "monitor/monitor.h" +#include "hw/rdma/rdma.h" #include "../rdma_rm.h" #include "../rdma_backend.h" @@ -55,6 +57,26 @@ static Property pvrdma_dev_properties[] = { DEFINE_PROP_END_OF_LIST(), }; +static void pvrdma_print_statistics(Monitor *mon, RdmaProvider *obj) +{ + PVRDMADev *dev = PVRDMA_DEV(obj); + PCIDevice *pdev = PCI_DEVICE(dev); + + monitor_printf(mon, "%s, %x.%x\n", pdev->name, PCI_SLOT(pdev->devfn), + PCI_FUNC(pdev->devfn)); + monitor_printf(mon, "\tcommands : %" PRId64 "\n", + dev->stats.commands); + monitor_printf(mon, "\tregs_reads : %" PRId64 "\n", + dev->stats.regs_reads); + monitor_printf(mon, "\tregs_writes : %" PRId64 "\n", + dev->stats.regs_writes); + monitor_printf(mon, "\tuar_writes : %" PRId64 "\n", + dev->stats.uar_writes); + monitor_printf(mon, "\tinterrupts : %" PRId64 "\n", + dev->stats.interrupts); + rdma_dump_device_counters(mon, &dev->rdma_dev_res); +} + static void free_dev_ring(PCIDevice *pci_dev, PvrdmaRing *ring, void *ring_state) { @@ -69,25 +91,22 @@ static int init_dev_ring(PvrdmaRing *ring, struct pvrdma_ring **ring_state, uint64_t *dir, *tbl; int rc = 0; - pr_dbg("Initializing device ring %s\n", name); - pr_dbg("pdir_dma=0x%llx\n", (long long unsigned int)dir_addr); - pr_dbg("num_pages=%d\n", num_pages); dir = rdma_pci_dma_map(pci_dev, dir_addr, TARGET_PAGE_SIZE); if (!dir) { - pr_err("Failed to map to page directory\n"); + rdma_error_report("Failed to map to page directory (ring %s)", name); rc = -ENOMEM; goto out; } tbl = rdma_pci_dma_map(pci_dev, dir[0], TARGET_PAGE_SIZE); if (!tbl) { - pr_err("Failed to map to page table\n"); + rdma_error_report("Failed to map to page table (ring %s)", name); rc = -ENOMEM; goto out_free_dir; } *ring_state = rdma_pci_dma_map(pci_dev, tbl[0], TARGET_PAGE_SIZE); if (!*ring_state) { - pr_err("Failed to map to ring state\n"); + rdma_error_report("Failed to map to ring state (ring %s)", name); rc = -ENOMEM; goto out_free_tbl; } @@ -100,7 +119,6 @@ static int init_dev_ring(PvrdmaRing *ring, struct pvrdma_ring **ring_state, sizeof(struct pvrdma_cqne), (dma_addr_t *)&tbl[1], (dma_addr_t)num_pages - 1); if (rc) { - pr_err("Failed to initialize ring\n"); rc = -ENOMEM; goto out_free_ring_state; } @@ -155,11 +173,10 @@ static int load_dsr(PVRDMADev *dev) free_dsr(dev); /* Map to DSR */ - pr_dbg("dsr_dma=0x%llx\n", (long long unsigned int)dev->dsr_info.dma); dev->dsr_info.dsr = rdma_pci_dma_map(pci_dev, dev->dsr_info.dma, sizeof(struct pvrdma_device_shared_region)); if (!dev->dsr_info.dsr) { - pr_err("Failed to map to DSR\n"); + rdma_error_report("Failed to map to DSR"); rc = -ENOMEM; goto out; } @@ -169,21 +186,19 @@ static int load_dsr(PVRDMADev *dev) dsr = dsr_info->dsr; /* Map to command slot */ - pr_dbg("cmd_dma=0x%llx\n", (long long unsigned int)dsr->cmd_slot_dma); dsr_info->req = rdma_pci_dma_map(pci_dev, dsr->cmd_slot_dma, sizeof(union pvrdma_cmd_req)); if (!dsr_info->req) { - pr_err("Failed to map to command slot address\n"); + rdma_error_report("Failed to map to command slot address"); rc = -ENOMEM; goto out_free_dsr; } /* Map to response slot */ - pr_dbg("rsp_dma=0x%llx\n", (long long unsigned int)dsr->resp_slot_dma); dsr_info->rsp = rdma_pci_dma_map(pci_dev, dsr->resp_slot_dma, sizeof(union pvrdma_cmd_resp)); if (!dsr_info->rsp) { - pr_err("Failed to map to response slot address\n"); + rdma_error_report("Failed to map to response slot address"); rc = -ENOMEM; goto out_free_req; } @@ -193,7 +208,6 @@ static int load_dsr(PVRDMADev *dev) pci_dev, dsr->cq_ring_pages.pdir_dma, dsr->cq_ring_pages.num_pages); if (rc) { - pr_err("Failed to map to initialize CQ ring\n"); rc = -ENOMEM; goto out_free_rsp; } @@ -203,7 +217,6 @@ static int load_dsr(PVRDMADev *dev) "dev_async", pci_dev, dsr->async_ring_pages.pdir_dma, dsr->async_ring_pages.num_pages); if (rc) { - pr_err("Failed to map to initialize event ring\n"); rc = -ENOMEM; goto out_free_rsp; } @@ -230,24 +243,15 @@ static void init_dsr_dev_caps(PVRDMADev *dev) struct pvrdma_device_shared_region *dsr; if (dev->dsr_info.dsr == NULL) { - pr_err("Can't initialized DSR\n"); + rdma_error_report("Can't initialized DSR"); return; } dsr = dev->dsr_info.dsr; - dsr->caps.fw_ver = PVRDMA_FW_VERSION; - pr_dbg("fw_ver=0x%" PRIx64 "\n", dsr->caps.fw_ver); - dsr->caps.mode = PVRDMA_DEVICE_MODE_ROCE; - pr_dbg("mode=%d\n", dsr->caps.mode); - dsr->caps.gid_types |= PVRDMA_GID_TYPE_FLAG_ROCE_V1; - pr_dbg("gid_types=0x%x\n", dsr->caps.gid_types); - dsr->caps.max_uar = RDMA_BAR2_UAR_SIZE; - pr_dbg("max_uar=%d\n", dsr->caps.max_uar); - dsr->caps.max_mr_size = dev->dev_attr.max_mr_size; dsr->caps.max_qp = dev->dev_attr.max_qp; dsr->caps.max_qp_wr = dev->dev_attr.max_qp_wr; @@ -257,23 +261,11 @@ static void init_dsr_dev_caps(PVRDMADev *dev) dsr->caps.max_mr = dev->dev_attr.max_mr; dsr->caps.max_pd = dev->dev_attr.max_pd; dsr->caps.max_ah = dev->dev_attr.max_ah; - dsr->caps.gid_tbl_len = MAX_GIDS; - pr_dbg("gid_tbl_len=%d\n", dsr->caps.gid_tbl_len); - dsr->caps.sys_image_guid = 0; - pr_dbg("sys_image_guid=%" PRIx64 "\n", dsr->caps.sys_image_guid); - dsr->caps.node_guid = dev->node_guid; - pr_dbg("node_guid=%" PRIx64 "\n", be64_to_cpu(dsr->caps.node_guid)); - dsr->caps.phys_port_cnt = MAX_PORTS; - pr_dbg("phys_port_cnt=%d\n", dsr->caps.phys_port_cnt); - dsr->caps.max_pkeys = MAX_PKEYS; - pr_dbg("max_pkeys=%d\n", dsr->caps.max_pkeys); - - pr_dbg("Initialized\n"); } static void uninit_msix(PCIDevice *pdev, int used_vectors) @@ -288,7 +280,7 @@ static void uninit_msix(PCIDevice *pdev, int used_vectors) msix_uninit(pdev, &dev->msix, &dev->msix); } -static int init_msix(PCIDevice *pdev, Error **errp) +static int init_msix(PCIDevice *pdev) { PVRDMADev *dev = PVRDMA_DEV(pdev); int i; @@ -299,14 +291,14 @@ static int init_msix(PCIDevice *pdev, Error **errp) RDMA_MSIX_PBA, 0, NULL); if (rc < 0) { - error_setg(errp, "Failed to initialize MSI-X"); + rdma_error_report("Failed to initialize MSI-X"); return rc; } for (i = 0; i < RDMA_MAX_INTRS; i++) { rc = msix_vector_use(PCI_DEVICE(dev), i); if (rc < 0) { - error_setg(errp, "Fail mark MSI-X vector %d", i); + rdma_error_report("Fail mark MSI-X vector %d", i); uninit_msix(pdev, i); return rc; } @@ -319,11 +311,12 @@ static void pvrdma_fini(PCIDevice *pdev) { PVRDMADev *dev = PVRDMA_DEV(pdev); - pr_dbg("Closing device %s %x.%x\n", pdev->name, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn)); + notifier_remove(&dev->shutdown_notifier); pvrdma_qp_ops_fini(); + rdma_backend_stop(&dev->backend_dev); + rdma_rm_fini(&dev->rdma_dev_res, &dev->backend_dev, dev->backend_eth_device_name); @@ -335,8 +328,8 @@ static void pvrdma_fini(PCIDevice *pdev) uninit_msix(pdev, RDMA_MAX_INTRS); } - pr_dbg("Device %s %x.%x is down\n", pdev->name, PCI_SLOT(pdev->devfn), - PCI_FUNC(pdev->devfn)); + rdma_info_report("Device %s %x.%x is down", pdev->name, + PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); } static void pvrdma_stop(PVRDMADev *dev) @@ -353,32 +346,28 @@ static void activate_device(PVRDMADev *dev) { pvrdma_start(dev); set_reg_val(dev, PVRDMA_REG_ERR, 0); - pr_dbg("Device activated\n"); } static int unquiesce_device(PVRDMADev *dev) { - pr_dbg("Device unquiesced\n"); return 0; } static void reset_device(PVRDMADev *dev) { pvrdma_stop(dev); - - pr_dbg("Device reset complete\n"); } -static uint64_t regs_read(void *opaque, hwaddr addr, unsigned size) +static uint64_t pvrdma_regs_read(void *opaque, hwaddr addr, unsigned size) { PVRDMADev *dev = opaque; uint32_t val; - /* pr_dbg("addr=0x%lx, size=%d\n", addr, size); */ + dev->stats.regs_reads++; if (get_reg_val(dev, addr, &val)) { - pr_dbg("Error trying to read REG value from address 0x%x\n", - (uint32_t)addr); + rdma_error_report("Failed to read REG value from address 0x%x", + (uint32_t)addr); return -EINVAL; } @@ -387,25 +376,26 @@ static uint64_t regs_read(void *opaque, hwaddr addr, unsigned size) return val; } -static void regs_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) +static void pvrdma_regs_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) { PVRDMADev *dev = opaque; - /* pr_dbg("addr=0x%lx, val=0x%x, size=%d\n", addr, (uint32_t)val, size); */ + dev->stats.regs_writes++; if (set_reg_val(dev, addr, val)) { - pr_err("Fail to set REG value, addr=0x%" PRIx64 ", val=0x%" PRIx64 "\n", - addr, val); + rdma_error_report("Failed to set REG value, addr=0x%"PRIx64 ", val=0x%"PRIx64, + addr, val); return; } - trace_pvrdma_regs_write(addr, val); - switch (addr) { case PVRDMA_REG_DSRLOW: + trace_pvrdma_regs_write(addr, val, "DSRLOW", ""); dev->dsr_info.dma = val; break; case PVRDMA_REG_DSRHIGH: + trace_pvrdma_regs_write(addr, val, "DSRHIGH", ""); dev->dsr_info.dma |= val << 32; load_dsr(dev); init_dsr_dev_caps(dev); @@ -413,23 +403,27 @@ static void regs_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) case PVRDMA_REG_CTL: switch (val) { case PVRDMA_DEVICE_CTL_ACTIVATE: + trace_pvrdma_regs_write(addr, val, "CTL", "ACTIVATE"); activate_device(dev); break; case PVRDMA_DEVICE_CTL_UNQUIESCE: + trace_pvrdma_regs_write(addr, val, "CTL", "UNQUIESCE"); unquiesce_device(dev); break; case PVRDMA_DEVICE_CTL_RESET: + trace_pvrdma_regs_write(addr, val, "CTL", "URESET"); reset_device(dev); break; } break; case PVRDMA_REG_IMR: - pr_dbg("Interrupt mask=0x%" PRIx64 "\n", val); + trace_pvrdma_regs_write(addr, val, "INTR_MASK", ""); dev->interrupt_mask = val; break; case PVRDMA_REG_REQUEST: if (val == 0) { - execute_command(dev); + trace_pvrdma_regs_write(addr, val, "REQUEST", ""); + pvrdma_exec_cmd(dev); } break; default: @@ -438,8 +432,8 @@ static void regs_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) } static const MemoryRegionOps regs_ops = { - .read = regs_read, - .write = regs_write, + .read = pvrdma_regs_read, + .write = pvrdma_regs_write, .endianness = DEVICE_LITTLE_ENDIAN, .impl = { .min_access_size = sizeof(uint32_t), @@ -447,54 +441,60 @@ static const MemoryRegionOps regs_ops = { }, }; -static uint64_t uar_read(void *opaque, hwaddr addr, unsigned size) +static uint64_t pvrdma_uar_read(void *opaque, hwaddr addr, unsigned size) { return 0xffffffff; } -static void uar_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) +static void pvrdma_uar_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) { PVRDMADev *dev = opaque; - /* pr_dbg("addr=0x%lx, val=0x%x, size=%d\n", addr, (uint32_t)val, size); */ + dev->stats.uar_writes++; switch (addr & 0xFFF) { /* Mask with 0xFFF as each UC gets page */ case PVRDMA_UAR_QP_OFFSET: - pr_dbg("UAR QP command, addr=0x%" PRIx64 ", val=0x%" PRIx64 "\n", - (uint64_t)addr, val); if (val & PVRDMA_UAR_QP_SEND) { + trace_pvrdma_uar_write(addr, val, "QP", "SEND", + val & PVRDMA_UAR_HANDLE_MASK, 0); pvrdma_qp_send(dev, val & PVRDMA_UAR_HANDLE_MASK); } if (val & PVRDMA_UAR_QP_RECV) { + trace_pvrdma_uar_write(addr, val, "QP", "RECV", + val & PVRDMA_UAR_HANDLE_MASK, 0); pvrdma_qp_recv(dev, val & PVRDMA_UAR_HANDLE_MASK); } break; case PVRDMA_UAR_CQ_OFFSET: - /* pr_dbg("UAR CQ cmd, addr=0x%x, val=0x%lx\n", (uint32_t)addr, val); */ if (val & PVRDMA_UAR_CQ_ARM) { + trace_pvrdma_uar_write(addr, val, "CQ", "ARM", + val & PVRDMA_UAR_HANDLE_MASK, + !!(val & PVRDMA_UAR_CQ_ARM_SOL)); rdma_rm_req_notify_cq(&dev->rdma_dev_res, val & PVRDMA_UAR_HANDLE_MASK, !!(val & PVRDMA_UAR_CQ_ARM_SOL)); } if (val & PVRDMA_UAR_CQ_ARM_SOL) { - pr_dbg("UAR_CQ_ARM_SOL (%" PRIx64 ")\n", - val & PVRDMA_UAR_HANDLE_MASK); + trace_pvrdma_uar_write(addr, val, "CQ", "ARMSOL - not supported", 0, + 0); } if (val & PVRDMA_UAR_CQ_POLL) { - pr_dbg("UAR_CQ_POLL (%" PRIx64 ")\n", val & PVRDMA_UAR_HANDLE_MASK); + trace_pvrdma_uar_write(addr, val, "CQ", "POLL", + val & PVRDMA_UAR_HANDLE_MASK, 0); pvrdma_cq_poll(&dev->rdma_dev_res, val & PVRDMA_UAR_HANDLE_MASK); } break; default: - pr_err("Unsupported command, addr=0x%" PRIx64 ", val=0x%" PRIx64 "\n", - addr, val); + rdma_error_report("Unsupported command, addr=0x%"PRIx64", val=0x%"PRIx64, + addr, val); break; } } static const MemoryRegionOps uar_ops = { - .read = uar_read, - .write = uar_write, + .read = pvrdma_uar_read, + .write = pvrdma_uar_write, .endianness = DEVICE_LITTLE_ENDIAN, .impl = { .min_access_size = sizeof(uint32_t), @@ -551,11 +551,9 @@ static void init_dev_caps(PVRDMADev *dev) (wr_sz + sizeof(struct pvrdma_sge) * dev->dev_attr.max_sge) - TARGET_PAGE_SIZE; /* First page is ring state ^^^^ */ - pr_dbg("max_qp_wr=%d\n", dev->dev_attr.max_qp_wr); dev->dev_attr.max_cqe = pg_tbl_bytes / sizeof(struct pvrdma_cqe) - TARGET_PAGE_SIZE; /* First page is ring state */ - pr_dbg("max_cqe=%d\n", dev->dev_attr.max_cqe); } static int pvrdma_check_ram_shared(Object *obj, void *opaque) @@ -585,10 +583,8 @@ static void pvrdma_realize(PCIDevice *pdev, Error **errp) bool ram_shared = false; PCIDevice *func0; - init_pr_dbg(); - - pr_dbg("Initializing device %s %x.%x\n", pdev->name, - PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); + rdma_info_report("Initializing device %s %x.%x", pdev->name, + PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); if (TARGET_PAGE_SIZE != getpagesize()) { error_setg(errp, "Target page size must be the same as host page size"); @@ -597,9 +593,7 @@ static void pvrdma_realize(PCIDevice *pdev, Error **errp) func0 = pci_get_function_0(pdev); /* Break if not vmxnet3 device in slot 0 */ - if (strcmp(object_get_typename(&func0->qdev.parent_obj), TYPE_VMXNET3)) { - pr_dbg("func0 type is %s\n", - object_get_typename(&func0->qdev.parent_obj)); + if (strcmp(object_get_typename(OBJECT(func0)), TYPE_VMXNET3)) { error_setg(errp, "Device on %x.0 must be %s", PCI_SLOT(pdev->devfn), TYPE_VMXNET3); return; @@ -626,21 +620,21 @@ static void pvrdma_realize(PCIDevice *pdev, Error **errp) init_regs(pdev); - rc = init_msix(pdev, errp); + rc = init_msix(pdev); if (rc) { goto out; } rc = rdma_backend_init(&dev->backend_dev, pdev, &dev->rdma_dev_res, dev->backend_device_name, dev->backend_port_num, - &dev->dev_attr, &dev->mad_chr, errp); + &dev->dev_attr, &dev->mad_chr); if (rc) { goto out; } init_dev_caps(dev); - rc = rdma_rm_init(&dev->rdma_dev_res, &dev->dev_attr, errp); + rc = rdma_rm_init(&dev->rdma_dev_res, &dev->dev_attr); if (rc) { goto out; } @@ -650,28 +644,25 @@ static void pvrdma_realize(PCIDevice *pdev, Error **errp) goto out; } + memset(&dev->stats, 0, sizeof(dev->stats)); + dev->shutdown_notifier.notify = pvrdma_shutdown_notifier; qemu_register_shutdown_notifier(&dev->shutdown_notifier); out: if (rc) { pvrdma_fini(pdev); - error_append_hint(errp, "Device fail to load\n"); + error_append_hint(errp, "Device failed to load\n"); } } -static void pvrdma_exit(PCIDevice *pdev) -{ - pvrdma_fini(pdev); -} - static void pvrdma_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + RdmaProviderClass *ir = INTERFACE_RDMA_PROVIDER_CLASS(klass); k->realize = pvrdma_realize; - k->exit = pvrdma_exit; k->vendor_id = PCI_VENDOR_ID_VMWARE; k->device_id = PCI_DEVICE_ID_VMWARE_PVRDMA; k->revision = 0x00; @@ -680,6 +671,8 @@ static void pvrdma_class_init(ObjectClass *klass, void *data) dc->desc = "RDMA Device"; dc->props = pvrdma_dev_properties; set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); + + ir->print_statistics = pvrdma_print_statistics; } static const TypeInfo pvrdma_info = { @@ -689,6 +682,7 @@ static const TypeInfo pvrdma_info = { .class_init = pvrdma_class_init, .interfaces = (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { INTERFACE_RDMA_PROVIDER }, { } } }; diff --git a/hw/rdma/vmw/pvrdma_qp_ops.c b/hw/rdma/vmw/pvrdma_qp_ops.c index ce5a60e184..5b9786efbe 100644 --- a/hw/rdma/vmw/pvrdma_qp_ops.c +++ b/hw/rdma/vmw/pvrdma_qp_ops.c @@ -19,6 +19,8 @@ #include "../rdma_rm.h" #include "../rdma_backend.h" +#include "trace.h" + #include "pvrdma.h" #include "standard-headers/rdma/vmw_pvrdma-abi.h" #include "pvrdma_qp_ops.h" @@ -55,18 +57,14 @@ static int pvrdma_post_cqe(PVRDMADev *dev, uint32_t cq_handle, RdmaRmCQ *cq = rdma_rm_get_cq(&dev->rdma_dev_res, cq_handle); if (unlikely(!cq)) { - pr_dbg("Invalid cqn %d\n", cq_handle); return -EINVAL; } ring = (PvrdmaRing *)cq->opaque; - pr_dbg("ring=%p\n", ring); /* Step #1: Put CQE on CQ ring */ - pr_dbg("Writing CQE\n"); cqe1 = pvrdma_ring_next_elem_write(ring); if (unlikely(!cqe1)) { - pr_dbg("No CQEs in ring\n"); return -EINVAL; } @@ -80,19 +78,13 @@ static int pvrdma_post_cqe(PVRDMADev *dev, uint32_t cq_handle, cqe1->wc_flags = wc->wc_flags; cqe1->vendor_err = wc->vendor_err; - pr_dbg("wr_id=%" PRIx64 "\n", cqe1->wr_id); - pr_dbg("qp=0x%lx\n", cqe1->qp); - pr_dbg("opcode=%d\n", cqe1->opcode); - pr_dbg("status=%d\n", cqe1->status); - pr_dbg("byte_len=%d\n", cqe1->byte_len); - pr_dbg("src_qp=%d\n", cqe1->src_qp); - pr_dbg("wc_flags=%d\n", cqe1->wc_flags); - pr_dbg("vendor_err=%d\n", cqe1->vendor_err); + trace_pvrdma_post_cqe(cq_handle, cq->notify, cqe1->wr_id, cqe1->qp, + cqe1->opcode, cqe1->status, cqe1->byte_len, + cqe1->src_qp, cqe1->wc_flags, cqe1->vendor_err); pvrdma_ring_write_inc(ring); /* Step #2: Put CQ number on dsr completion ring */ - pr_dbg("Writing CQNE\n"); cqne = pvrdma_ring_next_elem_write(&dev->dsr_info.cq); if (unlikely(!cqne)) { return -EINVAL; @@ -101,7 +93,6 @@ static int pvrdma_post_cqe(PVRDMADev *dev, uint32_t cq_handle, cqne->info = cq_handle; pvrdma_ring_write_inc(&dev->dsr_info.cq); - pr_dbg("cq->notify=%d\n", cq->notify); if (cq->notify != CNT_CLEAR) { if (cq->notify == CNT_ARM) { cq->notify = CNT_CLEAR; @@ -123,7 +114,7 @@ static void pvrdma_qp_ops_comp_handler(void *ctx, struct ibv_wc *wc) static void complete_with_error(uint32_t vendor_err, void *ctx) { - struct ibv_wc wc = {0}; + struct ibv_wc wc = {}; wc.status = IBV_WC_GENERAL_ERR; wc.vendor_err = vendor_err; @@ -151,23 +142,17 @@ void pvrdma_qp_send(PVRDMADev *dev, uint32_t qp_handle) int sgid_idx; union ibv_gid *sgid; - pr_dbg("qp_handle=0x%x\n", qp_handle); - qp = rdma_rm_get_qp(&dev->rdma_dev_res, qp_handle); if (unlikely(!qp)) { - pr_dbg("Invalid qpn\n"); return; } ring = (PvrdmaRing *)qp->opaque; - pr_dbg("sring=%p\n", ring); wqe = (struct PvrdmaSqWqe *)pvrdma_ring_next_elem_read(ring); while (wqe) { CompHandlerCtx *comp_ctx; - pr_dbg("wr_id=%" PRIx64 "\n", wqe->hdr.wr_id); - /* Prepare CQE */ comp_ctx = g_malloc(sizeof(CompHandlerCtx)); comp_ctx->dev = dev; @@ -178,26 +163,25 @@ void pvrdma_qp_send(PVRDMADev *dev, uint32_t qp_handle) sgid = rdma_rm_get_gid(&dev->rdma_dev_res, wqe->hdr.wr.ud.av.gid_index); if (!sgid) { - pr_dbg("Fail to get gid for idx %d\n", wqe->hdr.wr.ud.av.gid_index); + rdma_error_report("Failed to get gid for idx %d", + wqe->hdr.wr.ud.av.gid_index); complete_with_error(VENDOR_ERR_INV_GID_IDX, comp_ctx); continue; } - pr_dbg("sgid_id=%d, sgid=0x%llx\n", wqe->hdr.wr.ud.av.gid_index, - sgid->global.interface_id); sgid_idx = rdma_rm_get_backend_gid_index(&dev->rdma_dev_res, &dev->backend_dev, wqe->hdr.wr.ud.av.gid_index); if (sgid_idx <= 0) { - pr_dbg("Fail to get bk sgid_idx for sgid_idx %d\n", - wqe->hdr.wr.ud.av.gid_index); + rdma_error_report("Failed to get bk sgid_idx for sgid_idx %d", + wqe->hdr.wr.ud.av.gid_index); complete_with_error(VENDOR_ERR_INV_GID_IDX, comp_ctx); continue; } if (wqe->hdr.num_sge > dev->dev_attr.max_sge) { - pr_dbg("Invalid num_sge=%d (max %d)\n", wqe->hdr.num_sge, - dev->dev_attr.max_sge); + rdma_error_report("Invalid num_sge=%d (max %d)", wqe->hdr.num_sge, + dev->dev_attr.max_sge); complete_with_error(VENDOR_ERR_INV_NUM_SGE, comp_ctx); continue; } @@ -221,23 +205,17 @@ void pvrdma_qp_recv(PVRDMADev *dev, uint32_t qp_handle) PvrdmaRqWqe *wqe; PvrdmaRing *ring; - pr_dbg("qp_handle=0x%x\n", qp_handle); - qp = rdma_rm_get_qp(&dev->rdma_dev_res, qp_handle); if (unlikely(!qp)) { - pr_dbg("Invalid qpn\n"); return; } ring = &((PvrdmaRing *)qp->opaque)[1]; - pr_dbg("rring=%p\n", ring); wqe = (struct PvrdmaRqWqe *)pvrdma_ring_next_elem_read(ring); while (wqe) { CompHandlerCtx *comp_ctx; - pr_dbg("wr_id=%" PRIx64 "\n", wqe->hdr.wr_id); - /* Prepare CQE */ comp_ctx = g_malloc(sizeof(CompHandlerCtx)); comp_ctx->dev = dev; @@ -247,14 +225,13 @@ void pvrdma_qp_recv(PVRDMADev *dev, uint32_t qp_handle) comp_ctx->cqe.opcode = IBV_WC_RECV; if (wqe->hdr.num_sge > dev->dev_attr.max_sge) { - pr_dbg("Invalid num_sge=%d (max %d)\n", wqe->hdr.num_sge, - dev->dev_attr.max_sge); + rdma_error_report("Invalid num_sge=%d (max %d)", wqe->hdr.num_sge, + dev->dev_attr.max_sge); complete_with_error(VENDOR_ERR_INV_NUM_SGE, comp_ctx); continue; } - rdma_backend_post_recv(&dev->backend_dev, &dev->rdma_dev_res, - &qp->backend_qp, qp->qp_type, + rdma_backend_post_recv(&dev->backend_dev, &qp->backend_qp, qp->qp_type, (struct ibv_sge *)&wqe->sge[0], wqe->hdr.num_sge, comp_ctx); @@ -270,7 +247,6 @@ void pvrdma_cq_poll(RdmaDeviceResources *dev_res, uint32_t cq_handle) cq = rdma_rm_get_cq(dev_res, cq_handle); if (!cq) { - pr_dbg("Invalid CQ# %d\n", cq_handle); return; } diff --git a/hw/rdma/vmw/trace-events b/hw/rdma/vmw/trace-events index b3f9e2b19f..323fca8456 100644 --- a/hw/rdma/vmw/trace-events +++ b/hw/rdma/vmw/trace-events @@ -1,5 +1,17 @@ -# See docs/tracing.txt for syntax documentation. +# See docs/devel/tracing.txt for syntax documentation. -# hw/rdma/vmw/pvrdma_main.c -pvrdma_regs_read(uint64_t addr, uint64_t val) "regs[0x%"PRIx64"] = 0x%"PRIx64 -pvrdma_regs_write(uint64_t addr, uint64_t val) "regs[0x%"PRIx64"] = 0x%"PRIx64 +# pvrdma_main.c +pvrdma_regs_read(uint64_t addr, uint64_t val) "pvrdma.regs[0x%"PRIx64"]=0x%"PRIx64 +pvrdma_regs_write(uint64_t addr, uint64_t val, const char *reg_name, const char *val_name) "pvrdma.regs[0x%"PRIx64"]=0x%"PRIx64" (%s %s)" +pvrdma_uar_write(uint64_t addr, uint64_t val, const char *reg_name, const char *val_name, int val1, int val2) "uar[0x%"PRIx64"]=0x%"PRIx64" (cls=%s, op=%s, obj=%d, val=%d)" + +# pvrdma_cmd.c +pvrdma_map_to_pdir_host_virt(void *vfirst, void *vremaped) "mremap %p -> %p" +pvrdma_map_to_pdir_next_page(int page_idx, void *vnext, void *vremaped) "mremap [%d] %p -> %p" +pvrdma_exec_cmd(int cmd, int err) "cmd=%d, err=%d" + +# pvrdma_dev_ring.c +pvrdma_ring_next_elem_read_no_data(char *ring_name) "pvrdma_ring %s is empty" + +# pvrdma_qp_ops.c +pvrdma_post_cqe(uint32_t cq_handle, int notify, uint64_t wr_id, uint64_t qpn, uint32_t op_code, uint32_t status, uint32_t byte_len, uint32_t src_qp, uint32_t wc_flags, uint32_t vendor_err) "cq_handle=%d, notify=%d, wr_id=0x%"PRIx64", qpn=0x%"PRIx64", opcode=%d, status=%d, byte_len=%d, src_qp=%d, wc_flags=%d, vendor_err=%d" diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index 8c7fc1f31d..8674211085 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -6,6 +6,7 @@ config HART config SIFIVE bool + select MSI_NONBROKEN config SIFIVE_E bool diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c index d12ec3fc9a..07a032d93d 100644 --- a/hw/riscv/sifive_plic.c +++ b/hw/riscv/sifive_plic.c @@ -22,7 +22,9 @@ #include "qemu/log.h" #include "qemu/error-report.h" #include "hw/sysbus.h" +#include "hw/pci/msi.h" #include "target/riscv/cpu.h" +#include "sysemu/sysemu.h" #include "hw/riscv/sifive_plic.h" #define RISCV_DEBUG_PLIC 0 @@ -205,7 +207,7 @@ static uint64_t sifive_plic_read(void *opaque, hwaddr addr, unsigned size) if (addr >= plic->priority_base && /* 4 bytes per source */ addr < plic->priority_base + (plic->num_sources << 2)) { - uint32_t irq = (addr - plic->priority_base) >> 2; + uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; if (RISCV_DEBUG_PLIC) { qemu_log("plic: read priority: irq=%d priority=%d\n", irq, plic->source_priority[irq]); @@ -261,7 +263,9 @@ static uint64_t sifive_plic_read(void *opaque, hwaddr addr, unsigned size) } err: - error_report("plic: invalid register read: %08x", (uint32_t)addr); + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Invalid register read 0x%" HWADDR_PRIx "\n", + __func__, addr); return 0; } @@ -278,7 +282,7 @@ static void sifive_plic_write(void *opaque, hwaddr addr, uint64_t value, if (addr >= plic->priority_base && /* 4 bytes per source */ addr < plic->priority_base + (plic->num_sources << 2)) { - uint32_t irq = (addr - plic->priority_base) >> 2; + uint32_t irq = ((addr - plic->priority_base) >> 2) + 1; plic->source_priority[irq] = value & 7; if (RISCV_DEBUG_PLIC) { qemu_log("plic: write priority: irq=%d priority=%d\n", @@ -288,7 +292,9 @@ static void sifive_plic_write(void *opaque, hwaddr addr, uint64_t value, } else if (addr >= plic->pending_base && /* 1 bit per source */ addr < plic->pending_base + (plic->num_sources >> 3)) { - error_report("plic: invalid pending write: %08x", (uint32_t)addr); + qemu_log_mask(LOG_GUEST_ERROR, + "%s: invalid pending write: 0x%" HWADDR_PRIx "", + __func__, addr); return; } else if (addr >= plic->enable_base && /* 1 bit per source */ addr < plic->enable_base + plic->num_addrs * plic->enable_stride) @@ -338,7 +344,9 @@ static void sifive_plic_write(void *opaque, hwaddr addr, uint64_t value, } err: - error_report("plic: invalid register write: %08x", (uint32_t)addr); + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Invalid register write 0x%" HWADDR_PRIx "\n", + __func__, addr); } static const MemoryRegionOps sifive_plic_ops = { @@ -383,7 +391,7 @@ static void parse_hart_config(SiFivePLICState *plic) p = plic->hart_config; while ((c = *p++)) { if (c == ',') { - addrid += __builtin_popcount(modes); + addrid += ctpop8(modes); modes = 0; hartid++; } else { @@ -397,7 +405,7 @@ static void parse_hart_config(SiFivePLICState *plic) } } if (modes) { - addrid += __builtin_popcount(modes); + addrid += ctpop8(modes); } hartid++; @@ -431,6 +439,7 @@ static void sifive_plic_irq_request(void *opaque, int irq, int level) static void sifive_plic_realize(DeviceState *dev, Error **errp) { SiFivePLICState *plic = SIFIVE_PLIC(dev); + int i; memory_region_init_io(&plic->mmio, OBJECT(dev), &sifive_plic_ops, plic, TYPE_SIFIVE_PLIC, plic->aperture_size); @@ -443,6 +452,21 @@ static void sifive_plic_realize(DeviceState *dev, Error **errp) plic->enable = g_new0(uint32_t, plic->bitfield_words * plic->num_addrs); sysbus_init_mmio(SYS_BUS_DEVICE(dev), &plic->mmio); qdev_init_gpio_in(dev, sifive_plic_irq_request, plic->num_sources); + + /* We can't allow the supervisor to control SEIP as this would allow the + * supervisor to clear a pending external interrupt which will result in + * lost a interrupt in the case a PLIC is attached. The SEIP bit must be + * hardware controlled when a PLIC is attached. + */ + for (i = 0; i < smp_cpus; i++) { + RISCVCPU *cpu = RISCV_CPU(qemu_get_cpu(i)); + if (riscv_cpu_claim_interrupts(cpu, MIP_SEIP) < 0) { + error_report("SEIP already claimed"); + exit(1); + } + } + + msi_nonbroken = true; } static void sifive_plic_class_init(ObjectClass *klass, void *data) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 7bc25820fe..5ecc47cea3 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -244,7 +244,7 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap, qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency", SIFIVE_U_CLOCK_FREQ / 2); qemu_fdt_setprop_cells(fdt, nodename, "interrupt-parent", plic_phandle); - qemu_fdt_setprop_cells(fdt, nodename, "interrupts", 1); + qemu_fdt_setprop_cells(fdt, nodename, "interrupts", SIFIVE_U_UART0_IRQ); qemu_fdt_add_subnode(fdt, "/chosen"); qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", nodename); @@ -398,7 +398,10 @@ static void riscv_sifive_u_machine_init(MachineClass *mc) { mc->desc = "RISC-V Board compatible with SiFive U SDK"; mc->init = riscv_sifive_u_init; - mc->max_cpus = 1; + /* The real hardware has 5 CPUs, but one of them is a small embedded power + * management CPU. + */ + mc->max_cpus = 4; } DEFINE_MACHINE("sifive_u", riscv_sifive_u_machine_init) diff --git a/hw/riscv/sifive_uart.c b/hw/riscv/sifive_uart.c index 456a3d3697..3b3f94f51d 100644 --- a/hw/riscv/sifive_uart.c +++ b/hw/riscv/sifive_uart.c @@ -51,7 +51,8 @@ static uint64_t uart_ip(SiFiveUARTState *s) static void update_irq(SiFiveUARTState *s) { int cond = 0; - if ((s->ie & SIFIVE_UART_IE_RXWM) && s->rx_fifo_len) { + if ((s->ie & SIFIVE_UART_IE_TXWM) || + ((s->ie & SIFIVE_UART_IE_RXWM) && s->rx_fifo_len)) { cond = 1; } if (cond) { @@ -108,6 +109,7 @@ uart_write(void *opaque, hwaddr addr, switch (addr) { case SIFIVE_UART_TXFIFO: qemu_chr_fe_write(&s->chr, &ch, 1); + update_irq(s); return; case SIFIVE_UART_IE: s->ie = val64; diff --git a/hw/s390x/3270-ccw.c b/hw/s390x/3270-ccw.c index 2c8d16ccf7..14882242c3 100644 --- a/hw/s390x/3270-ccw.c +++ b/hw/s390x/3270-ccw.c @@ -78,13 +78,13 @@ static int emulated_ccw_3270_cb(SubchDev *sch, CCW1 ccw) if (rc == -EIO) { /* I/O error, specific devices generate specific conditions */ - SCSW *s = &sch->curr_status.scsw; + SCHIB *schib = &sch->curr_status; sch->curr_status.scsw.dstat = SCSW_DSTAT_UNIT_CHECK; sch->sense_data[0] = 0x40; /* intervention-req */ - s->ctrl &= ~SCSW_ACTL_START_PEND; - s->ctrl &= ~SCSW_CTRL_MASK_STCTL; - s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | + schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND; + schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL; + schib->scsw.ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND; } diff --git a/hw/s390x/Kconfig b/hw/s390x/Kconfig index a7046ea41f..5e7d8a2bae 100644 --- a/hw/s390x/Kconfig +++ b/hw/s390x/Kconfig @@ -9,3 +9,4 @@ config S390_CCW_VIRTIO select S390_FLIC select SCLPCONSOLE select VIRTIO_CCW + select MSI_NONBROKEN diff --git a/hw/s390x/css.c b/hw/s390x/css.c index f92b046cd3..8fc9e35ba5 100644 --- a/hw/s390x/css.c +++ b/hw/s390x/css.c @@ -695,35 +695,32 @@ void css_adapter_interrupt(CssIoAdapterType type, uint8_t isc) static void sch_handle_clear_func(SubchDev *sch) { - PMCW *p = &sch->curr_status.pmcw; - SCSW *s = &sch->curr_status.scsw; + SCHIB *schib = &sch->curr_status; int path; /* Path management: In our simple css, we always choose the only path. */ path = 0x80; /* Reset values prior to 'issuing the clear signal'. */ - p->lpum = 0; - p->pom = 0xff; - s->flags &= ~SCSW_FLAGS_MASK_PNO; + schib->pmcw.lpum = 0; + schib->pmcw.pom = 0xff; + schib->scsw.flags &= ~SCSW_FLAGS_MASK_PNO; /* We always 'attempt to issue the clear signal', and we always succeed. */ sch->channel_prog = 0x0; sch->last_cmd_valid = false; - s->ctrl &= ~SCSW_ACTL_CLEAR_PEND; - s->ctrl |= SCSW_STCTL_STATUS_PEND; + schib->scsw.ctrl &= ~SCSW_ACTL_CLEAR_PEND; + schib->scsw.ctrl |= SCSW_STCTL_STATUS_PEND; - s->dstat = 0; - s->cstat = 0; - p->lpum = path; + schib->scsw.dstat = 0; + schib->scsw.cstat = 0; + schib->pmcw.lpum = path; } static void sch_handle_halt_func(SubchDev *sch) { - - PMCW *p = &sch->curr_status.pmcw; - SCSW *s = &sch->curr_status.scsw; + SCHIB *schib = &sch->curr_status; hwaddr curr_ccw = sch->channel_prog; int path; @@ -733,20 +730,22 @@ static void sch_handle_halt_func(SubchDev *sch) /* We always 'attempt to issue the halt signal', and we always succeed. */ sch->channel_prog = 0x0; sch->last_cmd_valid = false; - s->ctrl &= ~SCSW_ACTL_HALT_PEND; - s->ctrl |= SCSW_STCTL_STATUS_PEND; + schib->scsw.ctrl &= ~SCSW_ACTL_HALT_PEND; + schib->scsw.ctrl |= SCSW_STCTL_STATUS_PEND; - if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) || - !((s->ctrl & SCSW_ACTL_START_PEND) || - (s->ctrl & SCSW_ACTL_SUSP))) { - s->dstat = SCSW_DSTAT_DEVICE_END; + if ((schib->scsw.ctrl & (SCSW_ACTL_SUBCH_ACTIVE | + SCSW_ACTL_DEVICE_ACTIVE)) || + !((schib->scsw.ctrl & SCSW_ACTL_START_PEND) || + (schib->scsw.ctrl & SCSW_ACTL_SUSP))) { + schib->scsw.dstat = SCSW_DSTAT_DEVICE_END; } - if ((s->ctrl & (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) || - (s->ctrl & SCSW_ACTL_SUSP)) { - s->cpa = curr_ccw + 8; + if ((schib->scsw.ctrl & (SCSW_ACTL_SUBCH_ACTIVE | + SCSW_ACTL_DEVICE_ACTIVE)) || + (schib->scsw.ctrl & SCSW_ACTL_SUSP)) { + schib->scsw.cpa = curr_ccw + 8; } - s->cstat = 0; - p->lpum = path; + schib->scsw.cstat = 0; + schib->pmcw.lpum = path; } @@ -1111,9 +1110,7 @@ static int css_interpret_ccw(SubchDev *sch, hwaddr ccw_addr, static void sch_handle_start_func_virtual(SubchDev *sch) { - - PMCW *p = &sch->curr_status.pmcw; - SCSW *s = &sch->curr_status.scsw; + SCHIB *schib = &sch->curr_status; int path; int ret; bool suspend_allowed; @@ -1121,27 +1118,27 @@ static void sch_handle_start_func_virtual(SubchDev *sch) /* Path management: In our simple css, we always choose the only path. */ path = 0x80; - if (!(s->ctrl & SCSW_ACTL_SUSP)) { + if (!(schib->scsw.ctrl & SCSW_ACTL_SUSP)) { /* Start Function triggered via ssch, i.e. we have an ORB */ ORB *orb = &sch->orb; - s->cstat = 0; - s->dstat = 0; + schib->scsw.cstat = 0; + schib->scsw.dstat = 0; /* Look at the orb and try to execute the channel program. */ - p->intparm = orb->intparm; + schib->pmcw.intparm = orb->intparm; if (!(orb->lpm & path)) { /* Generate a deferred cc 3 condition. */ - s->flags |= SCSW_FLAGS_MASK_CC; - s->ctrl &= ~SCSW_CTRL_MASK_STCTL; - s->ctrl |= (SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND); + schib->scsw.flags |= SCSW_FLAGS_MASK_CC; + schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL; + schib->scsw.ctrl |= (SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND); return; } sch->ccw_fmt_1 = !!(orb->ctrl0 & ORB_CTRL0_MASK_FMT); - s->flags |= (sch->ccw_fmt_1) ? SCSW_FLAGS_MASK_FMT : 0; + schib->scsw.flags |= (sch->ccw_fmt_1) ? SCSW_FLAGS_MASK_FMT : 0; sch->ccw_no_data_cnt = 0; suspend_allowed = !!(orb->ctrl0 & ORB_CTRL0_MASK_SPND); } else { /* Start Function resumed via rsch */ - s->ctrl &= ~(SCSW_ACTL_SUSP | SCSW_ACTL_RESUME_PEND); + schib->scsw.ctrl &= ~(SCSW_ACTL_SUSP | SCSW_ACTL_RESUME_PEND); /* The channel program had been suspended before. */ suspend_allowed = true; } @@ -1154,40 +1151,40 @@ static void sch_handle_start_func_virtual(SubchDev *sch) break; case 0: /* success */ - s->ctrl &= ~SCSW_ACTL_START_PEND; - s->ctrl &= ~SCSW_CTRL_MASK_STCTL; - s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | + schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND; + schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL; + schib->scsw.ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | SCSW_STCTL_STATUS_PEND; - s->dstat = SCSW_DSTAT_CHANNEL_END | SCSW_DSTAT_DEVICE_END; - s->cpa = sch->channel_prog + 8; + schib->scsw.dstat = SCSW_DSTAT_CHANNEL_END | SCSW_DSTAT_DEVICE_END; + schib->scsw.cpa = sch->channel_prog + 8; break; case -EIO: /* I/O errors, status depends on specific devices */ break; case -ENOSYS: /* unsupported command, generate unit check (command reject) */ - s->ctrl &= ~SCSW_ACTL_START_PEND; - s->dstat = SCSW_DSTAT_UNIT_CHECK; + schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND; + schib->scsw.dstat = SCSW_DSTAT_UNIT_CHECK; /* Set sense bit 0 in ecw0. */ sch->sense_data[0] = 0x80; - s->ctrl &= ~SCSW_CTRL_MASK_STCTL; - s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | + schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL; + schib->scsw.ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND; - s->cpa = sch->channel_prog + 8; + schib->scsw.cpa = sch->channel_prog + 8; break; case -EINPROGRESS: /* channel program has been suspended */ - s->ctrl &= ~SCSW_ACTL_START_PEND; - s->ctrl |= SCSW_ACTL_SUSP; + schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND; + schib->scsw.ctrl |= SCSW_ACTL_SUSP; break; default: /* error, generate channel program check */ - s->ctrl &= ~SCSW_ACTL_START_PEND; - s->cstat = SCSW_CSTAT_PROG_CHECK; - s->ctrl &= ~SCSW_CTRL_MASK_STCTL; - s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | + schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND; + schib->scsw.cstat = SCSW_CSTAT_PROG_CHECK; + schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL; + schib->scsw.ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND; - s->cpa = sch->channel_prog + 8; + schib->scsw.cpa = sch->channel_prog + 8; break; } } while (ret == -EAGAIN); @@ -1196,14 +1193,11 @@ static void sch_handle_start_func_virtual(SubchDev *sch) static IOInstEnding sch_handle_start_func_passthrough(SubchDev *sch) { - - PMCW *p = &sch->curr_status.pmcw; - SCSW *s = &sch->curr_status.scsw; - + SCHIB *schib = &sch->curr_status; ORB *orb = &sch->orb; - if (!(s->ctrl & SCSW_ACTL_SUSP)) { + if (!(schib->scsw.ctrl & SCSW_ACTL_SUSP)) { assert(orb != NULL); - p->intparm = orb->intparm; + schib->pmcw.intparm = orb->intparm; } return s390_ccw_cmd_request(sch); } @@ -1216,14 +1210,13 @@ static IOInstEnding sch_handle_start_func_passthrough(SubchDev *sch) */ IOInstEnding do_subchannel_work_virtual(SubchDev *sch) { + SCHIB *schib = &sch->curr_status; - SCSW *s = &sch->curr_status.scsw; - - if (s->ctrl & SCSW_FCTL_CLEAR_FUNC) { + if (schib->scsw.ctrl & SCSW_FCTL_CLEAR_FUNC) { sch_handle_clear_func(sch); - } else if (s->ctrl & SCSW_FCTL_HALT_FUNC) { + } else if (schib->scsw.ctrl & SCSW_FCTL_HALT_FUNC) { sch_handle_halt_func(sch); - } else if (s->ctrl & SCSW_FCTL_START_FUNC) { + } else if (schib->scsw.ctrl & SCSW_FCTL_START_FUNC) { /* Triggered by both ssch and rsch. */ sch_handle_start_func_virtual(sch); } @@ -1234,15 +1227,15 @@ IOInstEnding do_subchannel_work_virtual(SubchDev *sch) IOInstEnding do_subchannel_work_passthrough(SubchDev *sch) { - SCSW *s = &sch->curr_status.scsw; + SCHIB *schib = &sch->curr_status; - if (s->ctrl & SCSW_FCTL_CLEAR_FUNC) { + if (schib->scsw.ctrl & SCSW_FCTL_CLEAR_FUNC) { /* TODO: Clear handling */ sch_handle_clear_func(sch); - } else if (s->ctrl & SCSW_FCTL_HALT_FUNC) { + } else if (schib->scsw.ctrl & SCSW_FCTL_HALT_FUNC) { /* TODO: Halt handling */ sch_handle_halt_func(sch); - } else if (s->ctrl & SCSW_FCTL_START_FUNC) { + } else if (schib->scsw.ctrl & SCSW_FCTL_START_FUNC) { return sch_handle_start_func_passthrough(sch); } return IOINST_CC_EXPECTED; @@ -1370,46 +1363,45 @@ static void copy_schib_from_guest(SCHIB *dest, const SCHIB *src) IOInstEnding css_do_msch(SubchDev *sch, const SCHIB *orig_schib) { - SCSW *s = &sch->curr_status.scsw; - PMCW *p = &sch->curr_status.pmcw; + SCHIB *schib = &sch->curr_status; uint16_t oldflags; - SCHIB schib; + SCHIB schib_copy; - if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_DNV)) { + if (!(schib->pmcw.flags & PMCW_FLAGS_MASK_DNV)) { return IOINST_CC_EXPECTED; } - if (s->ctrl & SCSW_STCTL_STATUS_PEND) { + if (schib->scsw.ctrl & SCSW_STCTL_STATUS_PEND) { return IOINST_CC_STATUS_PRESENT; } - if (s->ctrl & + if (schib->scsw.ctrl & (SCSW_FCTL_START_FUNC|SCSW_FCTL_HALT_FUNC|SCSW_FCTL_CLEAR_FUNC)) { return IOINST_CC_BUSY; } - copy_schib_from_guest(&schib, orig_schib); + copy_schib_from_guest(&schib_copy, orig_schib); /* Only update the program-modifiable fields. */ - p->intparm = schib.pmcw.intparm; - oldflags = p->flags; - p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA | + schib->pmcw.intparm = schib_copy.pmcw.intparm; + oldflags = schib->pmcw.flags; + schib->pmcw.flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA | PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME | PMCW_FLAGS_MASK_MP); - p->flags |= schib.pmcw.flags & + schib->pmcw.flags |= schib_copy.pmcw.flags & (PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA | PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME | PMCW_FLAGS_MASK_MP); - p->lpm = schib.pmcw.lpm; - p->mbi = schib.pmcw.mbi; - p->pom = schib.pmcw.pom; - p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE); - p->chars |= schib.pmcw.chars & + schib->pmcw.lpm = schib_copy.pmcw.lpm; + schib->pmcw.mbi = schib_copy.pmcw.mbi; + schib->pmcw.pom = schib_copy.pmcw.pom; + schib->pmcw.chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE); + schib->pmcw.chars |= schib_copy.pmcw.chars & (PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_CSENSE); - sch->curr_status.mba = schib.mba; + schib->mba = schib_copy.mba; /* Has the channel been disabled? */ if (sch->disable_cb && (oldflags & PMCW_FLAGS_MASK_ENA) != 0 - && (p->flags & PMCW_FLAGS_MASK_ENA) == 0) { + && (schib->pmcw.flags & PMCW_FLAGS_MASK_ENA) == 0) { sch->disable_cb(sch); } return IOINST_CC_EXPECTED; @@ -1417,82 +1409,80 @@ IOInstEnding css_do_msch(SubchDev *sch, const SCHIB *orig_schib) IOInstEnding css_do_xsch(SubchDev *sch) { - SCSW *s = &sch->curr_status.scsw; - PMCW *p = &sch->curr_status.pmcw; + SCHIB *schib = &sch->curr_status; - if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { + if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { return IOINST_CC_NOT_OPERATIONAL; } - if (s->ctrl & SCSW_CTRL_MASK_STCTL) { + if (schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL) { return IOINST_CC_STATUS_PRESENT; } - if (!(s->ctrl & SCSW_CTRL_MASK_FCTL) || - ((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) || - (!(s->ctrl & + if (!(schib->scsw.ctrl & SCSW_CTRL_MASK_FCTL) || + ((schib->scsw.ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) || + (!(schib->scsw.ctrl & (SCSW_ACTL_RESUME_PEND | SCSW_ACTL_START_PEND | SCSW_ACTL_SUSP))) || - (s->ctrl & SCSW_ACTL_SUBCH_ACTIVE)) { + (schib->scsw.ctrl & SCSW_ACTL_SUBCH_ACTIVE)) { return IOINST_CC_BUSY; } /* Cancel the current operation. */ - s->ctrl &= ~(SCSW_FCTL_START_FUNC | + schib->scsw.ctrl &= ~(SCSW_FCTL_START_FUNC | SCSW_ACTL_RESUME_PEND | SCSW_ACTL_START_PEND | SCSW_ACTL_SUSP); sch->channel_prog = 0x0; sch->last_cmd_valid = false; - s->dstat = 0; - s->cstat = 0; + schib->scsw.dstat = 0; + schib->scsw.cstat = 0; return IOINST_CC_EXPECTED; } IOInstEnding css_do_csch(SubchDev *sch) { - SCSW *s = &sch->curr_status.scsw; - PMCW *p = &sch->curr_status.pmcw; + SCHIB *schib = &sch->curr_status; - if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { + if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { return IOINST_CC_NOT_OPERATIONAL; } /* Trigger the clear function. */ - s->ctrl &= ~(SCSW_CTRL_MASK_FCTL | SCSW_CTRL_MASK_ACTL); - s->ctrl |= SCSW_FCTL_CLEAR_FUNC | SCSW_ACTL_CLEAR_PEND; + schib->scsw.ctrl &= ~(SCSW_CTRL_MASK_FCTL | SCSW_CTRL_MASK_ACTL); + schib->scsw.ctrl |= SCSW_FCTL_CLEAR_FUNC | SCSW_ACTL_CLEAR_PEND; return do_subchannel_work(sch); } IOInstEnding css_do_hsch(SubchDev *sch) { - SCSW *s = &sch->curr_status.scsw; - PMCW *p = &sch->curr_status.pmcw; + SCHIB *schib = &sch->curr_status; - if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { + if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { return IOINST_CC_NOT_OPERATIONAL; } - if (((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_STATUS_PEND) || - (s->ctrl & (SCSW_STCTL_PRIMARY | + if (((schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_STATUS_PEND) || + (schib->scsw.ctrl & (SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | SCSW_STCTL_ALERT))) { return IOINST_CC_STATUS_PRESENT; } - if (s->ctrl & (SCSW_FCTL_HALT_FUNC | SCSW_FCTL_CLEAR_FUNC)) { + if (schib->scsw.ctrl & (SCSW_FCTL_HALT_FUNC | SCSW_FCTL_CLEAR_FUNC)) { return IOINST_CC_BUSY; } /* Trigger the halt function. */ - s->ctrl |= SCSW_FCTL_HALT_FUNC; - s->ctrl &= ~SCSW_FCTL_START_FUNC; - if (((s->ctrl & SCSW_CTRL_MASK_ACTL) == + schib->scsw.ctrl |= SCSW_FCTL_HALT_FUNC; + schib->scsw.ctrl &= ~SCSW_FCTL_START_FUNC; + if (((schib->scsw.ctrl & SCSW_CTRL_MASK_ACTL) == (SCSW_ACTL_SUBCH_ACTIVE | SCSW_ACTL_DEVICE_ACTIVE)) && - ((s->ctrl & SCSW_CTRL_MASK_STCTL) == SCSW_STCTL_INTERMEDIATE)) { - s->ctrl &= ~SCSW_STCTL_STATUS_PEND; + ((schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL) == + SCSW_STCTL_INTERMEDIATE)) { + schib->scsw.ctrl &= ~SCSW_STCTL_STATUS_PEND; } - s->ctrl |= SCSW_ACTL_HALT_PEND; + schib->scsw.ctrl |= SCSW_ACTL_HALT_PEND; return do_subchannel_work(sch); } @@ -1534,18 +1524,17 @@ static void css_update_chnmon(SubchDev *sch) IOInstEnding css_do_ssch(SubchDev *sch, ORB *orb) { - SCSW *s = &sch->curr_status.scsw; - PMCW *p = &sch->curr_status.pmcw; + SCHIB *schib = &sch->curr_status; - if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { + if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { return IOINST_CC_NOT_OPERATIONAL; } - if (s->ctrl & SCSW_STCTL_STATUS_PEND) { + if (schib->scsw.ctrl & SCSW_STCTL_STATUS_PEND) { return IOINST_CC_STATUS_PRESENT; } - if (s->ctrl & (SCSW_FCTL_START_FUNC | + if (schib->scsw.ctrl & (SCSW_FCTL_START_FUNC | SCSW_FCTL_HALT_FUNC | SCSW_FCTL_CLEAR_FUNC)) { return IOINST_CC_BUSY; @@ -1558,13 +1547,13 @@ IOInstEnding css_do_ssch(SubchDev *sch, ORB *orb) sch->orb = *orb; sch->channel_prog = orb->cpa; /* Trigger the start function. */ - s->ctrl |= (SCSW_FCTL_START_FUNC | SCSW_ACTL_START_PEND); - s->flags &= ~SCSW_FLAGS_MASK_PNO; + schib->scsw.ctrl |= (SCSW_FCTL_START_FUNC | SCSW_ACTL_START_PEND); + schib->scsw.flags &= ~SCSW_FLAGS_MASK_PNO; return do_subchannel_work(sch); } -static void copy_irb_to_guest(IRB *dest, const IRB *src, PMCW *pmcw, +static void copy_irb_to_guest(IRB *dest, const IRB *src, const PMCW *pmcw, int *irb_len) { int i; @@ -1603,24 +1592,24 @@ static void copy_irb_to_guest(IRB *dest, const IRB *src, PMCW *pmcw, int css_do_tsch_get_irb(SubchDev *sch, IRB *target_irb, int *irb_len) { - SCSW *s = &sch->curr_status.scsw; - PMCW *p = &sch->curr_status.pmcw; + SCHIB *schib = &sch->curr_status; + PMCW p; uint16_t stctl; IRB irb; - if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { + if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { return 3; } - stctl = s->ctrl & SCSW_CTRL_MASK_STCTL; + stctl = schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL; /* Prepare the irb for the guest. */ memset(&irb, 0, sizeof(IRB)); /* Copy scsw from current status. */ - memcpy(&irb.scsw, s, sizeof(SCSW)); + irb.scsw = schib->scsw; if (stctl & SCSW_STCTL_STATUS_PEND) { - if (s->cstat & (SCSW_CSTAT_DATA_CHECK | + if (schib->scsw.cstat & (SCSW_CSTAT_DATA_CHECK | SCSW_CSTAT_CHN_CTRL_CHK | SCSW_CSTAT_INTF_CTRL_CHK)) { irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF; @@ -1629,8 +1618,8 @@ int css_do_tsch_get_irb(SubchDev *sch, IRB *target_irb, int *irb_len) irb.esw[0] = 0x00800000; } /* If a unit check is pending, copy sense data. */ - if ((s->dstat & SCSW_DSTAT_UNIT_CHECK) && - (p->chars & PMCW_CHARS_MASK_CSENSE)) { + if ((schib->scsw.dstat & SCSW_DSTAT_UNIT_CHECK) && + (schib->pmcw.chars & PMCW_CHARS_MASK_CSENSE)) { int i; irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF | SCSW_FLAGS_MASK_ECTL; @@ -1643,34 +1632,34 @@ int css_do_tsch_get_irb(SubchDev *sch, IRB *target_irb, int *irb_len) } } /* Store the irb to the guest. */ - copy_irb_to_guest(target_irb, &irb, p, irb_len); + p = schib->pmcw; + copy_irb_to_guest(target_irb, &irb, &p, irb_len); return ((stctl & SCSW_STCTL_STATUS_PEND) == 0); } void css_do_tsch_update_subch(SubchDev *sch) { - SCSW *s = &sch->curr_status.scsw; - PMCW *p = &sch->curr_status.pmcw; + SCHIB *schib = &sch->curr_status; uint16_t stctl; uint16_t fctl; uint16_t actl; - stctl = s->ctrl & SCSW_CTRL_MASK_STCTL; - fctl = s->ctrl & SCSW_CTRL_MASK_FCTL; - actl = s->ctrl & SCSW_CTRL_MASK_ACTL; + stctl = schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL; + fctl = schib->scsw.ctrl & SCSW_CTRL_MASK_FCTL; + actl = schib->scsw.ctrl & SCSW_CTRL_MASK_ACTL; /* Clear conditions on subchannel, if applicable. */ if (stctl & SCSW_STCTL_STATUS_PEND) { - s->ctrl &= ~SCSW_CTRL_MASK_STCTL; + schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL; if ((stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) || ((fctl & SCSW_FCTL_HALT_FUNC) && (actl & SCSW_ACTL_SUSP))) { - s->ctrl &= ~SCSW_CTRL_MASK_FCTL; + schib->scsw.ctrl &= ~SCSW_CTRL_MASK_FCTL; } if (stctl != (SCSW_STCTL_INTERMEDIATE | SCSW_STCTL_STATUS_PEND)) { - s->flags &= ~SCSW_FLAGS_MASK_PNO; - s->ctrl &= ~(SCSW_ACTL_RESUME_PEND | + schib->scsw.flags &= ~SCSW_FLAGS_MASK_PNO; + schib->scsw.ctrl &= ~(SCSW_ACTL_RESUME_PEND | SCSW_ACTL_START_PEND | SCSW_ACTL_HALT_PEND | SCSW_ACTL_CLEAR_PEND | @@ -1678,20 +1667,20 @@ void css_do_tsch_update_subch(SubchDev *sch) } else { if ((actl & SCSW_ACTL_SUSP) && (fctl & SCSW_FCTL_START_FUNC)) { - s->flags &= ~SCSW_FLAGS_MASK_PNO; + schib->scsw.flags &= ~SCSW_FLAGS_MASK_PNO; if (fctl & SCSW_FCTL_HALT_FUNC) { - s->ctrl &= ~(SCSW_ACTL_RESUME_PEND | + schib->scsw.ctrl &= ~(SCSW_ACTL_RESUME_PEND | SCSW_ACTL_START_PEND | SCSW_ACTL_HALT_PEND | SCSW_ACTL_CLEAR_PEND | SCSW_ACTL_SUSP); } else { - s->ctrl &= ~SCSW_ACTL_RESUME_PEND; + schib->scsw.ctrl &= ~SCSW_ACTL_RESUME_PEND; } } } /* Clear pending sense data. */ - if (p->chars & PMCW_CHARS_MASK_CSENSE) { + if (schib->pmcw.chars & PMCW_CHARS_MASK_CSENSE) { memset(sch->sense_data, 0 , sizeof(sch->sense_data)); } } @@ -1804,20 +1793,19 @@ void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo) IOInstEnding css_do_rsch(SubchDev *sch) { - SCSW *s = &sch->curr_status.scsw; - PMCW *p = &sch->curr_status.pmcw; + SCHIB *schib = &sch->curr_status; - if (~(p->flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { + if (~(schib->pmcw.flags) & (PMCW_FLAGS_MASK_DNV | PMCW_FLAGS_MASK_ENA)) { return IOINST_CC_NOT_OPERATIONAL; } - if (s->ctrl & SCSW_STCTL_STATUS_PEND) { + if (schib->scsw.ctrl & SCSW_STCTL_STATUS_PEND) { return IOINST_CC_STATUS_PRESENT; } - if (((s->ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) || - (s->ctrl & SCSW_ACTL_RESUME_PEND) || - (!(s->ctrl & SCSW_ACTL_SUSP))) { + if (((schib->scsw.ctrl & SCSW_CTRL_MASK_FCTL) != SCSW_FCTL_START_FUNC) || + (schib->scsw.ctrl & SCSW_ACTL_RESUME_PEND) || + (!(schib->scsw.ctrl & SCSW_ACTL_SUSP))) { return IOINST_CC_BUSY; } @@ -1826,7 +1814,7 @@ IOInstEnding css_do_rsch(SubchDev *sch) css_update_chnmon(sch); } - s->ctrl |= SCSW_ACTL_RESUME_PEND; + schib->scsw.ctrl |= SCSW_ACTL_RESUME_PEND; return do_subchannel_work(sch); } @@ -1927,28 +1915,27 @@ static int css_add_chpid(uint8_t cssid, uint8_t chpid, uint8_t type, void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type) { - PMCW *p = &sch->curr_status.pmcw; - SCSW *s = &sch->curr_status.scsw; + SCHIB *schib = &sch->curr_status; int i; CssImage *css = channel_subsys.css[sch->cssid]; assert(css != NULL); - memset(p, 0, sizeof(PMCW)); - p->flags |= PMCW_FLAGS_MASK_DNV; - p->devno = sch->devno; + memset(&schib->pmcw, 0, sizeof(PMCW)); + schib->pmcw.flags |= PMCW_FLAGS_MASK_DNV; + schib->pmcw.devno = sch->devno; /* single path */ - p->pim = 0x80; - p->pom = 0xff; - p->pam = 0x80; - p->chpid[0] = chpid; + schib->pmcw.pim = 0x80; + schib->pmcw.pom = 0xff; + schib->pmcw.pam = 0x80; + schib->pmcw.chpid[0] = chpid; if (!css->chpids[chpid].in_use) { css_add_chpid(sch->cssid, chpid, type, true); } - memset(s, 0, sizeof(SCSW)); - sch->curr_status.mba = 0; - for (i = 0; i < ARRAY_SIZE(sch->curr_status.mda); i++) { - sch->curr_status.mda[i] = 0; + memset(&schib->scsw, 0, sizeof(SCSW)); + schib->mba = 0; + for (i = 0; i < ARRAY_SIZE(schib->mda); i++) { + schib->mda[i] = 0; } } @@ -2246,30 +2233,30 @@ int css_enable_mss(void) void css_reset_sch(SubchDev *sch) { - PMCW *p = &sch->curr_status.pmcw; + SCHIB *schib = &sch->curr_status; - if ((p->flags & PMCW_FLAGS_MASK_ENA) != 0 && sch->disable_cb) { + if ((schib->pmcw.flags & PMCW_FLAGS_MASK_ENA) != 0 && sch->disable_cb) { sch->disable_cb(sch); } - p->intparm = 0; - p->flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA | + schib->pmcw.intparm = 0; + schib->pmcw.flags &= ~(PMCW_FLAGS_MASK_ISC | PMCW_FLAGS_MASK_ENA | PMCW_FLAGS_MASK_LM | PMCW_FLAGS_MASK_MME | PMCW_FLAGS_MASK_MP | PMCW_FLAGS_MASK_TF); - p->flags |= PMCW_FLAGS_MASK_DNV; - p->devno = sch->devno; - p->pim = 0x80; - p->lpm = p->pim; - p->pnom = 0; - p->lpum = 0; - p->mbi = 0; - p->pom = 0xff; - p->pam = 0x80; - p->chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_XMWME | + schib->pmcw.flags |= PMCW_FLAGS_MASK_DNV; + schib->pmcw.devno = sch->devno; + schib->pmcw.pim = 0x80; + schib->pmcw.lpm = schib->pmcw.pim; + schib->pmcw.pnom = 0; + schib->pmcw.lpum = 0; + schib->pmcw.mbi = 0; + schib->pmcw.pom = 0xff; + schib->pmcw.pam = 0x80; + schib->pmcw.chars &= ~(PMCW_CHARS_MASK_MBFC | PMCW_CHARS_MASK_XMWME | PMCW_CHARS_MASK_CSENSE); - memset(&sch->curr_status.scsw, 0, sizeof(sch->curr_status.scsw)); - sch->curr_status.mba = 0; + memset(&schib->scsw, 0, sizeof(schib->scsw)); + schib->mba = 0; sch->channel_prog = 0x0; sch->last_cmd_valid = false; @@ -2433,7 +2420,7 @@ static int css_sch_get_chpids(SubchDev *sch, CssDevId *dev_id) FILE *fd; uint32_t chpid[8]; int i; - PMCW *p = &sch->curr_status.pmcw; + SCHIB *schib = &sch->curr_status; fid_path = g_strdup_printf("/sys/bus/css/devices/%x.%x.%04x/chpids", dev_id->cssid, dev_id->ssid, dev_id->devid); @@ -2452,8 +2439,8 @@ static int css_sch_get_chpids(SubchDev *sch, CssDevId *dev_id) return -EINVAL; } - for (i = 0; i < ARRAY_SIZE(p->chpid); i++) { - p->chpid[i] = chpid[i]; + for (i = 0; i < ARRAY_SIZE(schib->pmcw.chpid); i++) { + schib->pmcw.chpid[i] = chpid[i]; } fclose(fd); @@ -2467,7 +2454,7 @@ static int css_sch_get_path_masks(SubchDev *sch, CssDevId *dev_id) char *fid_path; FILE *fd; uint32_t pim, pam, pom; - PMCW *p = &sch->curr_status.pmcw; + SCHIB *schib = &sch->curr_status; fid_path = g_strdup_printf("/sys/bus/css/devices/%x.%x.%04x/pimpampom", dev_id->cssid, dev_id->ssid, dev_id->devid); @@ -2484,9 +2471,9 @@ static int css_sch_get_path_masks(SubchDev *sch, CssDevId *dev_id) return -EINVAL; } - p->pim = pim; - p->pam = pam; - p->pom = pom; + schib->pmcw.pim = pim; + schib->pmcw.pam = pam; + schib->pmcw.pom = pom; fclose(fd); g_free(fid_path); @@ -2528,16 +2515,15 @@ static int css_sch_get_chpid_type(uint8_t chpid, uint32_t *type, int css_sch_build_schib(SubchDev *sch, CssDevId *dev_id) { CssImage *css = channel_subsys.css[sch->cssid]; - PMCW *p = &sch->curr_status.pmcw; - SCSW *s = &sch->curr_status.scsw; + SCHIB *schib = &sch->curr_status; uint32_t type; int i, ret; assert(css != NULL); - memset(p, 0, sizeof(PMCW)); - p->flags |= PMCW_FLAGS_MASK_DNV; + memset(&schib->pmcw, 0, sizeof(PMCW)); + schib->pmcw.flags |= PMCW_FLAGS_MASK_DNV; /* We are dealing with I/O subchannels only. */ - p->devno = sch->devno; + schib->pmcw.devno = sch->devno; /* Grab path mask from sysfs. */ ret = css_sch_get_path_masks(sch, dev_id); @@ -2552,20 +2538,20 @@ int css_sch_build_schib(SubchDev *sch, CssDevId *dev_id) } /* Build chpid type. */ - for (i = 0; i < ARRAY_SIZE(p->chpid); i++) { - if (p->chpid[i] && !css->chpids[p->chpid[i]].in_use) { - ret = css_sch_get_chpid_type(p->chpid[i], &type, dev_id); + for (i = 0; i < ARRAY_SIZE(schib->pmcw.chpid); i++) { + if (schib->pmcw.chpid[i] && !css->chpids[schib->pmcw.chpid[i]].in_use) { + ret = css_sch_get_chpid_type(schib->pmcw.chpid[i], &type, dev_id); if (ret) { return ret; } - css_add_chpid(sch->cssid, p->chpid[i], type, false); + css_add_chpid(sch->cssid, schib->pmcw.chpid[i], type, false); } } - memset(s, 0, sizeof(SCSW)); - sch->curr_status.mba = 0; - for (i = 0; i < ARRAY_SIZE(sch->curr_status.mda); i++) { - sch->curr_status.mda[i] = 0; + memset(&schib->scsw, 0, sizeof(SCSW)); + schib->mba = 0; + for (i = 0; i < ARRAY_SIZE(schib->mda); i++) { + schib->mda[i] = 0; } return 0; diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c index 896888bf8f..d0cc06a05f 100644 --- a/hw/s390x/ipl.c +++ b/hw/s390x/ipl.c @@ -19,6 +19,7 @@ #include "hw/loader.h" #include "hw/boards.h" #include "hw/s390x/virtio-ccw.h" +#include "hw/s390x/vfio-ccw.h" #include "hw/s390x/css.h" #include "hw/s390x/ebcdic.h" #include "ipl.h" @@ -252,8 +253,6 @@ static void s390_ipl_set_boot_menu(S390IPLState *ipl) { QemuOptsList *plist = qemu_find_opts("boot-opts"); QemuOpts *opts = QTAILQ_FIRST(&plist->head); - uint8_t *flags = &ipl->qipl.qipl_flags; - uint32_t *timeout = &ipl->qipl.boot_menu_timeout; const char *tmp; unsigned long splash_time = 0; @@ -269,7 +268,7 @@ static void s390_ipl_set_boot_menu(S390IPLState *ipl) case S390_IPL_TYPE_CCW: /* In the absence of -boot menu, use zipl parameters */ if (!qemu_opt_get(opts, "menu")) { - *flags |= QIPL_FLAG_BM_OPTS_ZIPL; + ipl->qipl.qipl_flags |= QIPL_FLAG_BM_OPTS_ZIPL; return; } break; @@ -286,35 +285,55 @@ static void s390_ipl_set_boot_menu(S390IPLState *ipl) return; } - *flags |= QIPL_FLAG_BM_OPTS_CMD; + ipl->qipl.qipl_flags |= QIPL_FLAG_BM_OPTS_CMD; tmp = qemu_opt_get(opts, "splash-time"); if (tmp && qemu_strtoul(tmp, NULL, 10, &splash_time)) { error_report("splash-time is invalid, forcing it to 0"); - *timeout = 0; + ipl->qipl.boot_menu_timeout = 0; return; } if (splash_time > 0xffffffff) { error_report("splash-time is too large, forcing it to max value"); - *timeout = 0xffffffff; + ipl->qipl.boot_menu_timeout = 0xffffffff; return; } - *timeout = cpu_to_be32(splash_time); + ipl->qipl.boot_menu_timeout = cpu_to_be32(splash_time); } -static CcwDevice *s390_get_ccw_device(DeviceState *dev_st) +#define CCW_DEVTYPE_NONE 0x00 +#define CCW_DEVTYPE_VIRTIO 0x01 +#define CCW_DEVTYPE_VIRTIO_NET 0x02 +#define CCW_DEVTYPE_SCSI 0x03 +#define CCW_DEVTYPE_VFIO 0x04 + +static CcwDevice *s390_get_ccw_device(DeviceState *dev_st, int *devtype) { CcwDevice *ccw_dev = NULL; + int tmp_dt = CCW_DEVTYPE_NONE; if (dev_st) { + VirtIONet *virtio_net_dev = (VirtIONet *) + object_dynamic_cast(OBJECT(dev_st), TYPE_VIRTIO_NET); VirtioCcwDevice *virtio_ccw_dev = (VirtioCcwDevice *) object_dynamic_cast(OBJECT(qdev_get_parent_bus(dev_st)->parent), TYPE_VIRTIO_CCW_DEVICE); + VFIOCCWDevice *vfio_ccw_dev = (VFIOCCWDevice *) + object_dynamic_cast(OBJECT(dev_st), TYPE_VFIO_CCW); + if (virtio_ccw_dev) { ccw_dev = CCW_DEVICE(virtio_ccw_dev); + if (virtio_net_dev) { + tmp_dt = CCW_DEVTYPE_VIRTIO_NET; + } else { + tmp_dt = CCW_DEVTYPE_VIRTIO; + } + } else if (vfio_ccw_dev) { + ccw_dev = CCW_DEVICE(vfio_ccw_dev); + tmp_dt = CCW_DEVTYPE_VFIO; } else { SCSIDevice *sd = (SCSIDevice *) object_dynamic_cast(OBJECT(dev_st), @@ -327,9 +346,13 @@ static CcwDevice *s390_get_ccw_device(DeviceState *dev_st) ccw_dev = (CcwDevice *)object_dynamic_cast(OBJECT(scsi_ccw), TYPE_CCW_DEVICE); + tmp_dt = CCW_DEVTYPE_SCSI; } } } + if (devtype) { + *devtype = tmp_dt; + } return ccw_dev; } @@ -337,20 +360,22 @@ static bool s390_gen_initial_iplb(S390IPLState *ipl) { DeviceState *dev_st; CcwDevice *ccw_dev = NULL; + SCSIDevice *sd; + int devtype; dev_st = get_boot_device(0); if (dev_st) { - ccw_dev = s390_get_ccw_device(dev_st); + ccw_dev = s390_get_ccw_device(dev_st, &devtype); } /* * Currently allow IPL only from CCW devices. */ if (ccw_dev) { - SCSIDevice *sd = (SCSIDevice *) object_dynamic_cast(OBJECT(dev_st), - TYPE_SCSI_DEVICE); - - if (sd) { + switch (devtype) { + case CCW_DEVTYPE_SCSI: + sd = (SCSIDevice *) object_dynamic_cast(OBJECT(dev_st), + TYPE_SCSI_DEVICE); ipl->iplb.len = cpu_to_be32(S390_IPLB_MIN_QEMU_SCSI_LEN); ipl->iplb.blk0_len = cpu_to_be32(S390_IPLB_MIN_QEMU_SCSI_LEN - S390_IPLB_HEADER_LEN); @@ -360,20 +385,24 @@ static bool s390_gen_initial_iplb(S390IPLState *ipl) ipl->iplb.scsi.channel = cpu_to_be16(sd->channel); ipl->iplb.scsi.devno = cpu_to_be16(ccw_dev->sch->devno); ipl->iplb.scsi.ssid = ccw_dev->sch->ssid & 3; - } else { - VirtIONet *vn = (VirtIONet *) object_dynamic_cast(OBJECT(dev_st), - TYPE_VIRTIO_NET); - + break; + case CCW_DEVTYPE_VFIO: + ipl->iplb.len = cpu_to_be32(S390_IPLB_MIN_CCW_LEN); + ipl->iplb.pbt = S390_IPL_TYPE_CCW; + ipl->iplb.ccw.devno = cpu_to_be16(ccw_dev->sch->devno); + ipl->iplb.ccw.ssid = ccw_dev->sch->ssid & 3; + break; + case CCW_DEVTYPE_VIRTIO_NET: + ipl->netboot = true; + /* Fall through to CCW_DEVTYPE_VIRTIO case */ + case CCW_DEVTYPE_VIRTIO: ipl->iplb.len = cpu_to_be32(S390_IPLB_MIN_CCW_LEN); ipl->iplb.blk0_len = cpu_to_be32(S390_IPLB_MIN_CCW_LEN - S390_IPLB_HEADER_LEN); ipl->iplb.pbt = S390_IPL_TYPE_CCW; ipl->iplb.ccw.devno = cpu_to_be16(ccw_dev->sch->devno); ipl->iplb.ccw.ssid = ccw_dev->sch->ssid & 3; - - if (vn) { - ipl->netboot = true; - } + break; } if (!s390_ipl_set_loadparm(ipl->iplb.loadparm)) { @@ -532,7 +561,7 @@ void s390_ipl_reset_request(CPUState *cs, enum s390_reset reset_type) !ipl->netboot && ipl->iplb.pbt == S390_IPL_TYPE_CCW && is_virtio_scsi_device(&ipl->iplb)) { - CcwDevice *ccw_dev = s390_get_ccw_device(get_boot_device(0)); + CcwDevice *ccw_dev = s390_get_ccw_device(get_boot_device(0), NULL); if (ccw_dev && cpu_to_be16(ccw_dev->sch->devno) == ipl->iplb.ccw.devno && diff --git a/hw/s390x/s390-ccw.c b/hw/s390x/s390-ccw.c index cad91ee626..f5f025d1b6 100644 --- a/hw/s390x/s390-ccw.c +++ b/hw/s390x/s390-ccw.c @@ -124,6 +124,14 @@ static void s390_ccw_unrealize(S390CCWDevice *cdev, Error **errp) g_free(cdev->mdevid); } +static void s390_ccw_instance_init(Object *obj) +{ + S390CCWDevice *dev = S390_CCW_DEVICE(obj); + + device_add_bootindex_property(obj, &dev->bootindex, "bootindex", + "/disk@0,0", DEVICE(obj), NULL); +} + static void s390_ccw_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -137,6 +145,7 @@ static void s390_ccw_class_init(ObjectClass *klass, void *data) static const TypeInfo s390_ccw_info = { .name = TYPE_S390_CCW, .parent = TYPE_CCW_DEVICE, + .instance_init = s390_ccw_instance_init, .instance_size = sizeof(S390CCWDevice), .class_size = sizeof(S390CCWDeviceClass), .class_init = s390_ccw_class_init, diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index d11069b860..bbc6e8fa0b 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -15,6 +15,7 @@ #include "cpu.h" #include "hw/boards.h" #include "exec/address-spaces.h" +#include "exec/ram_addr.h" #include "hw/s390x/s390-virtio-hcall.h" #include "hw/s390x/sclp.h" #include "hw/s390x/s390_flic.h" @@ -163,6 +164,7 @@ static void s390_memory_init(ram_addr_t mem_size) MemoryRegion *sysmem = get_system_memory(); ram_addr_t chunk, offset = 0; unsigned int number = 0; + Error *local_err = NULL; gchar *name; /* allocate RAM for core */ @@ -182,6 +184,15 @@ static void s390_memory_init(ram_addr_t mem_size) } g_free(name); + /* + * Configure the maximum page size. As no memory devices were created + * yet, this is the page size of initial memory only. + */ + s390_set_max_pagesize(qemu_maxrampagesize(), &local_err); + if (local_err) { + error_report_err(local_err); + exit(EXIT_FAILURE); + } /* Initialize storage key device */ s390_skeys_init(); /* Initialize storage attributes device */ @@ -253,6 +264,7 @@ static void ccw_init(MachineState *machine) DeviceState *dev; s390_sclp_init(); + /* init memory + setup max page size. Required for the CPU model */ s390_memory_init(machine->ram_size); /* init CPUs (incl. CPU model) early so s390_has_feature() works */ @@ -646,14 +658,26 @@ bool css_migration_enabled(void) } \ type_init(ccw_machine_register_##suffix) +static void ccw_machine_4_1_instance_options(MachineState *machine) +{ +} + +static void ccw_machine_4_1_class_options(MachineClass *mc) +{ +} +DEFINE_CCW_MACHINE(4_1, "4.1", true); + static void ccw_machine_4_0_instance_options(MachineState *machine) { + ccw_machine_4_1_instance_options(machine); } static void ccw_machine_4_0_class_options(MachineClass *mc) { + ccw_machine_4_1_class_options(mc); + compat_props_add(mc->compat_props, hw_compat_4_0, hw_compat_4_0_len); } -DEFINE_CCW_MACHINE(4_0, "4.0", true); +DEFINE_CCW_MACHINE(4_0, "4.0", false); static void ccw_machine_3_1_instance_options(MachineState *machine) { diff --git a/hw/s390x/trace-events b/hw/s390x/trace-events index 0d3622ec6f..0dc5b818c4 100644 --- a/hw/s390x/trace-events +++ b/hw/s390x/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/s390x/css.c +# css.c css_enable_facility(const char *facility) "CSS: enable %s" css_crw(uint8_t rsc, uint8_t erc, uint16_t rsid, const char *chained) "CSS: queueing crw: rsc=0x%x, erc=0x%x, rsid=0x%x %s" css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) "CSS: add chpid %x.%02x (type 0x%02x)" @@ -10,7 +10,7 @@ css_io_interrupt(int cssid, int ssid, int schid, uint32_t intparm, uint8_t isc, css_adapter_interrupt(uint8_t isc) "CSS: adapter I/O interrupt (isc 0x%x)" css_do_sic(uint16_t mode, uint8_t isc) "CSS: set interruption mode 0x%x on isc 0x%x" -# hw/s390x/virtio-ccw.c +# virtio-ccw.c virtio_ccw_interpret_ccw(int cssid, int ssid, int schid, int cmd_code) "VIRTIO-CCW: %x.%x.%04x: interpret command 0x%x" virtio_ccw_new_device(int cssid, int ssid, int schid, int devno, const char *devno_mode) "VIRTIO-CCW: add subchannel %x.%x.%04x, devno 0x%04x (%s)" virtio_ccw_set_ind(uint64_t ind_loc, uint8_t ind_old, uint8_t ind_new) "VIRTIO-CCW: indicator at %" PRIu64 ": 0x%x->0x%x" diff --git a/hw/scsi/trace-events b/hw/scsi/trace-events index 09f3fc3086..452b5994e6 100644 --- a/hw/scsi/trace-events +++ b/hw/scsi/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/scsi/scsi-bus.c +# scsi-bus.c scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d" scsi_req_cancel(int target, int lun, int tag) "target %d lun %d tag %d" scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" @@ -18,7 +18,7 @@ scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d" scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d" -# hw/scsi/mptsas.c +# mptsas.c mptsas_command_complete(void *dev, uint32_t ctx, uint32_t status, uint32_t resid) "dev %p context 0x%08x status 0x%x resid %d" mptsas_diag_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x" mptsas_diag_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x" @@ -36,11 +36,11 @@ mptsas_sgl_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) "dev mptsas_unhandled_cmd(void *dev, uint32_t ctx, uint8_t msg_cmd) "dev %p context 0x%08x: Unhandled cmd 0x%x" mptsas_unhandled_doorbell_cmd(void *dev, int cmd) "dev %p value 0x%08x" -# hw/scsi/mptconfig.c +# mptconfig.c mptsas_config_sas_device(void *dev, int address, int port, int phy_handle, int dev_handle, int page) "dev %p address %d (port %d, handles: phy %d dev %d) page %d" mptsas_config_sas_phy(void *dev, int address, int port, int phy_handle, int dev_handle, int page) "dev %p address %d (port %d, handles: phy %d dev %d) page %d" -# hw/scsi/megasas.c +# megasas.c megasas_init_firmware(uint64_t pa) "pa 0x%" PRIx64 " " megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) "queue at 0x%" PRIx64 " len %d head 0x%" PRIx64 " tail 0x%" PRIx64 " flags 0x%x" megasas_initq_map_failed(int frame) "scmd %d: failed to map queue" @@ -118,7 +118,7 @@ megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx" megasas_mmio_writel(const char *reg, uint32_t val) "reg %s: 0x%x" megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x" -# hw/scsi/vmw_pvscsi.c +# vmw_pvscsi.c pvscsi_ring_init_data(uint32_t txr_len_log2, uint32_t rxr_len_log2) "TX/RX rings logarithms set to %d/%d" pvscsi_ring_init_msg(uint32_t len_log2) "MSG ring logarithm set to %d" pvscsi_ring_flush_cmp(uint64_t filled_cmp_ptr) "new production counter of completion ring is 0x%"PRIx64 @@ -153,7 +153,7 @@ pvscsi_state(const char* state) "starting %s ..." pvscsi_tx_rings_ppn(const char* label, uint64_t ppn) "%s page: 0x%"PRIx64 pvscsi_tx_rings_num_pages(const char* label, uint32_t num) "Number of %s pages: %u" -# hw/scsi/esp.c +# esp.c esp_error_fifo_overrun(void) "FIFO overrun" esp_error_unhandled_command(uint32_t val) "unhandled command (0x%2.2x)" esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]" @@ -190,7 +190,7 @@ esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (0x%2.2x)" esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (0x%2.2x)" esp_mem_writeb_cmd_dissel(uint32_t val) "Disable selection (0x%2.2x)" -# hw/scsi/esp-pci.c +# esp-pci.c esp_pci_error_invalid_dma_direction(void) "invalid DMA transfer direction" esp_pci_error_invalid_read(uint32_t reg) "read access outside bounds (reg 0x%x)" esp_pci_error_invalid_write(uint32_t reg) "write access outside bounds (reg 0x%x)" @@ -204,7 +204,7 @@ esp_pci_dma_start(uint32_t val) "START (0x%.8x)" esp_pci_sbac_read(uint32_t reg) "sbac: 0x%8.8x" esp_pci_sbac_write(uint32_t reg, uint32_t val) "sbac: 0x%8.8x -> 0x%8.8x" -# hw/scsi/spapr_vscsi.c +# spapr_vscsi.c spapr_vscsi_send_rsp(uint8_t status, int32_t res_in, int32_t res_out) "status: 0x%x, res_in: %"PRId32", res_out: %"PRId32 spapr_vscsi_fetch_desc_no_data(void) "no data descriptor" spapr_vscsi_fetch_desc_direct(void) "direct segment" @@ -231,7 +231,7 @@ spapr_vscsi_queue_cmd_no_drive(uint64_t lun) "Command for lun 0x%08" PRIx64 " wi spapr_vscsi_queue_cmd(uint32_t qtag, unsigned cdb, const char *cmd, int lun, int ret) "Queued command tag 0x%"PRIx32" CMD 0x%x=%s LUN %d ret: %d" spapr_vscsi_do_crq(unsigned c0, unsigned c1) "crq: %02x %02x ..." -# hw/scsi/lsi53c895a.c +# lsi53c895a.c lsi_reset(void) "Reset" lsi_update_irq(int level, uint8_t dstat, uint8_t sist1, uint8_t sist0) "Update IRQ level %d dstat 0x%02x sist 0x%02x0x%02x" lsi_update_irq_disconnected(void) "Handled IRQs & disconnected, looking for pending processes" @@ -293,7 +293,7 @@ lsi_awoken(void) "Woken by SIGP" lsi_reg_read(const char *name, int offset, uint8_t ret) "Read reg %s 0x%x = 0x%02x" lsi_reg_write(const char *name, int offset, uint8_t val) "Write reg %s 0x%x = 0x%02x" -# hw/scsi/scsi-disk.c +# scsi-disk.c scsi_disk_check_condition(uint32_t tag, uint8_t key, uint8_t asc, uint8_t ascq) "Command complete tag=0x%x sense=%d/%d/%d" scsi_disk_read_complete(uint32_t tag, size_t size) "Data ready tag=0x%x len=%zd" scsi_disk_read_data_count(uint32_t sector_count) "Read sector_count=%d" @@ -322,7 +322,7 @@ scsi_disk_dma_command_READ(uint64_t lba, uint32_t len) "Read (sector %" PRId64 " scsi_disk_dma_command_WRITE(const char *cmd, uint64_t lba, int len) "Write %s(sector %" PRId64 ", count %u)" scsi_disk_new_request(uint32_t lun, uint32_t tag, const char *line) "Command: lun=%d tag=0x%x data=%s" -# hw/scsi/scsi-generic.c +# scsi-generic.c scsi_generic_command_complete_noio(void *req, uint32_t tag, int statuc) "Command complete %p tag=0x%x status=%d" scsi_generic_read_complete(uint32_t tag, int len) "Data ready tag=0x%x len=%d" scsi_generic_read_data(uint32_t tag) "scsi_read_data tag=0x%x" diff --git a/hw/scsi/vhost-user-scsi.c b/hw/scsi/vhost-user-scsi.c index 6728878a52..8b1e6876db 100644 --- a/hw/scsi/vhost-user-scsi.c +++ b/hw/scsi/vhost-user-scsi.c @@ -69,7 +69,6 @@ static void vhost_user_scsi_realize(DeviceState *dev, Error **errp) VirtIOSCSICommon *vs = VIRTIO_SCSI_COMMON(dev); VHostUserSCSI *s = VHOST_USER_SCSI(dev); VHostSCSICommon *vsc = VHOST_SCSI_COMMON(s); - VhostUserState *user; Error *err = NULL; int ret; @@ -86,30 +85,24 @@ static void vhost_user_scsi_realize(DeviceState *dev, Error **errp) return; } - user = vhost_user_init(); - if (!user) { - error_setg(errp, "vhost-user-scsi: failed to init vhost_user"); + if (!vhost_user_init(&s->vhost_user, &vs->conf.chardev, errp)) { return; } - user->chr = &vs->conf.chardev; vsc->dev.nvqs = 2 + vs->conf.num_queues; vsc->dev.vqs = g_new(struct vhost_virtqueue, vsc->dev.nvqs); vsc->dev.vq_index = 0; vsc->dev.backend_features = 0; - ret = vhost_dev_init(&vsc->dev, user, + ret = vhost_dev_init(&vsc->dev, &s->vhost_user, VHOST_BACKEND_TYPE_USER, 0); if (ret < 0) { error_setg(errp, "vhost-user-scsi: vhost initialization failed: %s", strerror(-ret)); - vhost_user_cleanup(user); - g_free(user); + vhost_user_cleanup(&s->vhost_user); return; } - s->vhost_user = user; - /* Channel and lun both are 0 for bootable vhost-user-scsi disk */ vsc->channel = 0; vsc->lun = 0; @@ -130,12 +123,7 @@ static void vhost_user_scsi_unrealize(DeviceState *dev, Error **errp) g_free(vqs); virtio_scsi_common_unrealize(dev, errp); - - if (s->vhost_user) { - vhost_user_cleanup(s->vhost_user); - g_free(s->vhost_user); - s->vhost_user = NULL; - } + vhost_user_cleanup(&s->vhost_user); } static Property vhost_user_scsi_properties[] = { diff --git a/hw/sd/Kconfig b/hw/sd/Kconfig index 864f535011..c5e1e5581c 100644 --- a/hw/sd/Kconfig +++ b/hw/sd/Kconfig @@ -12,6 +12,10 @@ config SD config SDHCI bool + select SD + +config SDHCI_PCI + bool default y if PCI_DEVICES depends on PCI - select SD + select SDHCI diff --git a/hw/sd/Makefile.objs b/hw/sd/Makefile.objs index a99d9fbb04..06657279d1 100644 --- a/hw/sd/Makefile.objs +++ b/hw/sd/Makefile.objs @@ -2,6 +2,7 @@ common-obj-$(CONFIG_PL181) += pl181.o common-obj-$(CONFIG_SSI_SD) += ssi-sd.o common-obj-$(CONFIG_SD) += sd.o core.o sdmmc-internal.o common-obj-$(CONFIG_SDHCI) += sdhci.o +common-obj-$(CONFIG_SDHCI_PCI) += sdhci-pci.o obj-$(CONFIG_MILKYMIST) += milkymist-memcard.o obj-$(CONFIG_OMAP) += omap_mmc.o diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h index 19665fd401..34141400f8 100644 --- a/hw/sd/sdhci-internal.h +++ b/hw/sd/sdhci-internal.h @@ -304,4 +304,38 @@ extern const VMStateDescription sdhci_vmstate; #define ESDHC_PRNSTS_SDSTB (1 << 3) +/* + * Default SD/MMC host controller features information, which will be + * presented in CAPABILITIES register of generic SD host controller at reset. + * + * support: + * - 3.3v and 1.8v voltages + * - SDMA/ADMA1/ADMA2 + * - high-speed + * max host controller R/W buffers size: 512B + * max clock frequency for SDclock: 52 MHz + * timeout clock frequency: 52 MHz + * + * does not support: + * - 3.0v voltage + * - 64-bit system bus + * - suspend/resume + */ +#define SDHC_CAPAB_REG_DEFAULT 0x057834b4 + +#define DEFINE_SDHCI_COMMON_PROPERTIES(_state) \ + DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \ + DEFINE_PROP_UINT8("uhs", _state, uhs_mode, UHS_NOT_SUPPORTED), \ + \ + /* Capabilities registers provide information on supported + * features of this specific host controller implementation */ \ + DEFINE_PROP_UINT64("capareg", _state, capareg, SDHC_CAPAB_REG_DEFAULT), \ + DEFINE_PROP_UINT64("maxcurr", _state, maxcurr, 0) + +void sdhci_initfn(SDHCIState *s); +void sdhci_uninitfn(SDHCIState *s); +void sdhci_common_realize(SDHCIState *s, Error **errp); +void sdhci_common_unrealize(SDHCIState *s, Error **errp); +void sdhci_common_class_init(ObjectClass *klass, void *data); + #endif diff --git a/hw/sd/sdhci-pci.c b/hw/sd/sdhci-pci.c new file mode 100644 index 0000000000..f884661862 --- /dev/null +++ b/hw/sd/sdhci-pci.c @@ -0,0 +1,87 @@ +/* + * SDHCI device on PCI + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * See the GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/hw.h" +#include "hw/sd/sdhci.h" +#include "sdhci-internal.h" + +static Property sdhci_pci_properties[] = { + DEFINE_SDHCI_COMMON_PROPERTIES(SDHCIState), + DEFINE_PROP_END_OF_LIST(), +}; + +static void sdhci_pci_realize(PCIDevice *dev, Error **errp) +{ + SDHCIState *s = PCI_SDHCI(dev); + Error *local_err = NULL; + + sdhci_initfn(s); + sdhci_common_realize(s, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + dev->config[PCI_CLASS_PROG] = 0x01; /* Standard Host supported DMA */ + dev->config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin A */ + s->irq = pci_allocate_irq(dev); + s->dma_as = pci_get_address_space(dev); + pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->iomem); +} + +static void sdhci_pci_exit(PCIDevice *dev) +{ + SDHCIState *s = PCI_SDHCI(dev); + + sdhci_common_unrealize(s, &error_abort); + sdhci_uninitfn(s); +} + +static void sdhci_pci_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + + k->realize = sdhci_pci_realize; + k->exit = sdhci_pci_exit; + k->vendor_id = PCI_VENDOR_ID_REDHAT; + k->device_id = PCI_DEVICE_ID_REDHAT_SDHCI; + k->class_id = PCI_CLASS_SYSTEM_SDHCI; + dc->props = sdhci_pci_properties; + + sdhci_common_class_init(klass, data); +} + +static const TypeInfo sdhci_pci_info = { + .name = TYPE_PCI_SDHCI, + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(SDHCIState), + .class_init = sdhci_pci_class_init, + .interfaces = (InterfaceInfo[]) { + { INTERFACE_CONVENTIONAL_PCI_DEVICE }, + { }, + }, +}; + +static void sdhci_pci_register_type(void) +{ + type_register_static(&sdhci_pci_info); +} + +type_init(sdhci_pci_register_type) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 83f1574ffd..17ad5465a7 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -40,24 +40,6 @@ #define MASKED_WRITE(reg, mask, val) (reg = (reg & (mask)) | (val)) -/* Default SD/MMC host controller features information, which will be - * presented in CAPABILITIES register of generic SD host controller at reset. - * - * support: - * - 3.3v and 1.8v voltages - * - SDMA/ADMA1/ADMA2 - * - high-speed - * max host controller R/W buffers size: 512B - * max clock frequency for SDclock: 52 MHz - * timeout clock frequency: 52 MHz - * - * does not support: - * - 3.0v voltage - * - 64-bit system bus - * - suspend/resume - */ -#define SDHC_CAPAB_REG_DEFAULT 0x057834b4 - static inline unsigned int sdhci_get_fifolen(SDHCIState *s) { return 1 << (9 + FIELD_EX32(s->capareg, SDHC_CAPAB, MAXBLOCKLENGTH)); @@ -1328,16 +1310,7 @@ static void sdhci_init_readonly_registers(SDHCIState *s, Error **errp) /* --- qdev common --- */ -#define DEFINE_SDHCI_COMMON_PROPERTIES(_state) \ - DEFINE_PROP_UINT8("sd-spec-version", _state, sd_spec_version, 2), \ - DEFINE_PROP_UINT8("uhs", _state, uhs_mode, UHS_NOT_SUPPORTED), \ - \ - /* Capabilities registers provide information on supported - * features of this specific host controller implementation */ \ - DEFINE_PROP_UINT64("capareg", _state, capareg, SDHC_CAPAB_REG_DEFAULT), \ - DEFINE_PROP_UINT64("maxcurr", _state, maxcurr, 0) - -static void sdhci_initfn(SDHCIState *s) +void sdhci_initfn(SDHCIState *s) { qbus_create_inplace(&s->sdbus, sizeof(s->sdbus), TYPE_SDHCI_BUS, DEVICE(s), "sd-bus"); @@ -1348,7 +1321,7 @@ static void sdhci_initfn(SDHCIState *s) s->io_ops = &sdhci_mmio_ops; } -static void sdhci_uninitfn(SDHCIState *s) +void sdhci_uninitfn(SDHCIState *s) { timer_del(s->insert_timer); timer_free(s->insert_timer); @@ -1359,7 +1332,7 @@ static void sdhci_uninitfn(SDHCIState *s) s->fifo_buffer = NULL; } -static void sdhci_common_realize(SDHCIState *s, Error **errp) +void sdhci_common_realize(SDHCIState *s, Error **errp) { Error *local_err = NULL; @@ -1375,7 +1348,7 @@ static void sdhci_common_realize(SDHCIState *s, Error **errp) SDHC_REGISTERS_MAP_SIZE); } -static void sdhci_common_unrealize(SDHCIState *s, Error **errp) +void sdhci_common_unrealize(SDHCIState *s, Error **errp) { /* This function is expected to be called only once for each class: * - SysBus: via DeviceClass->unrealize(), @@ -1445,7 +1418,7 @@ const VMStateDescription sdhci_vmstate = { }, }; -static void sdhci_common_class_init(ObjectClass *klass, void *data) +void sdhci_common_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -1454,66 +1427,6 @@ static void sdhci_common_class_init(ObjectClass *klass, void *data) dc->reset = sdhci_poweron_reset; } -/* --- qdev PCI --- */ - -static Property sdhci_pci_properties[] = { - DEFINE_SDHCI_COMMON_PROPERTIES(SDHCIState), - DEFINE_PROP_END_OF_LIST(), -}; - -static void sdhci_pci_realize(PCIDevice *dev, Error **errp) -{ - SDHCIState *s = PCI_SDHCI(dev); - Error *local_err = NULL; - - sdhci_initfn(s); - sdhci_common_realize(s, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } - - dev->config[PCI_CLASS_PROG] = 0x01; /* Standard Host supported DMA */ - dev->config[PCI_INTERRUPT_PIN] = 0x01; /* interrupt pin A */ - s->irq = pci_allocate_irq(dev); - s->dma_as = pci_get_address_space(dev); - pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->iomem); -} - -static void sdhci_pci_exit(PCIDevice *dev) -{ - SDHCIState *s = PCI_SDHCI(dev); - - sdhci_common_unrealize(s, &error_abort); - sdhci_uninitfn(s); -} - -static void sdhci_pci_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - - k->realize = sdhci_pci_realize; - k->exit = sdhci_pci_exit; - k->vendor_id = PCI_VENDOR_ID_REDHAT; - k->device_id = PCI_DEVICE_ID_REDHAT_SDHCI; - k->class_id = PCI_CLASS_SYSTEM_SDHCI; - dc->props = sdhci_pci_properties; - - sdhci_common_class_init(klass, data); -} - -static const TypeInfo sdhci_pci_info = { - .name = TYPE_PCI_SDHCI, - .parent = TYPE_PCI_DEVICE, - .instance_size = sizeof(SDHCIState), - .class_init = sdhci_pci_class_init, - .interfaces = (InterfaceInfo[]) { - { INTERFACE_CONVENTIONAL_PCI_DEVICE }, - { }, - }, -}; - /* --- qdev SysBus --- */ static Property sdhci_sysbus_properties[] = { @@ -1846,7 +1759,6 @@ static const TypeInfo imx_usdhc_info = { static void sdhci_register_types(void) { - type_register_static(&sdhci_pci_info); type_register_static(&sdhci_sysbus_info); type_register_static(&sdhci_bus_info); type_register_static(&imx_usdhc_info); diff --git a/hw/sd/trace-events b/hw/sd/trace-events index fb0615cd3c..52971dc033 100644 --- a/hw/sd/trace-events +++ b/hw/sd/trace-events @@ -1,12 +1,12 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/sd/bcm2835_sdhost.c +# bcm2835_sdhost.c bcm2835_sdhost_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" bcm2835_sdhost_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" bcm2835_sdhost_edm_change(const char *why, uint32_t edm) "(%s) EDM now 0x%x" bcm2835_sdhost_update_irq(uint32_t irq) "IRQ bits 0x%x\n" -# hw/sd/core.c +# core.c sdbus_command(const char *bus_name, uint8_t cmd, uint32_t arg) "@%s CMD%02d arg 0x%08x" sdbus_read(const char *bus_name, uint8_t value) "@%s value 0x%02x" sdbus_write(const char *bus_name, uint8_t value) "@%s value 0x%02x" @@ -14,7 +14,7 @@ sdbus_set_voltage(const char *bus_name, uint16_t millivolts) "@%s %u (mV)" sdbus_get_dat_lines(const char *bus_name, uint8_t dat_lines) "@%s dat_lines: %u" sdbus_get_cmd_line(const char *bus_name, bool cmd_line) "@%s cmd_line: %u" -# hw/sd/sdhci.c +# sdhci.c sdhci_set_inserted(const char *level) "card state changed: %s" sdhci_send_command(uint8_t cmd, uint32_t arg) "CMD%02u ARG[0x%08x]" sdhci_error(const char *msg) "%s" @@ -29,13 +29,12 @@ sdhci_read_dataport(uint16_t data_count) "all %u bytes of data have been read fr sdhci_write_dataport(uint16_t data_count) "write buffer filled with %u bytes of data" sdhci_capareg(const char *desc, uint16_t val) "%s: %u" -# hw/sd/sd.c +# sd.c sdcard_normal_command(const char *proto, const char *cmd_desc, uint8_t cmd, uint32_t arg, const char *state) "%s %20s/ CMD%02d arg 0x%08x (state %s)" sdcard_app_command(const char *proto, const char *acmd_desc, uint8_t acmd, uint32_t arg, const char *state) "%s %23s/ACMD%02d arg 0x%08x (state %s)" sdcard_response(const char *rspdesc, int rsplen) "%s (sz:%d)" sdcard_powerup(void) "" sdcard_inquiry_cmd41(void) "" -sdcard_set_enable(bool current_state, bool new_state) "%u -> %u" sdcard_reset(void) "" sdcard_set_blocklen(uint16_t length) "0x%03x" sdcard_inserted(bool readonly) "read_only: %u" @@ -49,10 +48,10 @@ sdcard_write_data(const char *proto, const char *cmd_desc, uint8_t cmd, uint8_t sdcard_read_data(const char *proto, const char *cmd_desc, uint8_t cmd, int length) "%s %20s/ CMD%02d len %d" sdcard_set_voltage(uint16_t millivolts) "%u mV" -# hw/sd/milkymist-memcard.c +# milkymist-memcard.c milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" -# hw/sd/pxa2xx_mmci.c +# pxa2xx_mmci.c pxa2xx_mmci_read(uint8_t size, uint32_t addr, uint32_t value) "size %d addr 0x%02x value 0x%08x" pxa2xx_mmci_write(uint8_t size, uint32_t addr, uint32_t value) "size %d addr 0x%02x value 0x%08x" diff --git a/hw/sh4/Kconfig b/hw/sh4/Kconfig index 8597613a35..593662d28a 100644 --- a/hw/sh4/Kconfig +++ b/hw/sh4/Kconfig @@ -2,6 +2,7 @@ config R2D bool imply PCI_DEVICES imply TEST_DEVICES + imply RTL8139_PCI select I82378 if TEST_DEVICES select IDE_MMIO select PFLASH_CFI02 diff --git a/hw/sparc/trace-events b/hw/sparc/trace-events index 6e7259f8f8..355b07ae05 100644 --- a/hw/sparc/trace-events +++ b/hw/sparc/trace-events @@ -1,12 +1,12 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/sparc/sun4m.c +# sun4m.c sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" -# hw/sparc/sun4m_iommu.c +# sun4m_iommu.c sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = 0x%"PRIx64 @@ -16,6 +16,6 @@ sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva 0x%"PRIx64" => pa 0x%"PRIx64" iopte = 0x%x" sun4m_iommu_bad_addr(uint64_t addr) "bad addr 0x%"PRIx64 -# hw/sparc/leon3.c +# leon3.c leon3_set_irq(int intno) "Set CPU IRQ %d" leon3_reset_irq(int intno) "Reset CPU IRQ %d" diff --git a/hw/sparc64/Kconfig b/hw/sparc64/Kconfig index 4a8166ebb7..d4d76a89be 100644 --- a/hw/sparc64/Kconfig +++ b/hw/sparc64/Kconfig @@ -3,13 +3,13 @@ config SUN4U imply PCI_DEVICES imply SUNHME imply TEST_DEVICES + imply PARALLEL select M48T59 select ISA_BUS select FDC select SERIAL_ISA select PCI_SABRE select IDE_CMD646 - select PARALLEL select PCKBD select SIMBA diff --git a/hw/sparc64/trace-events b/hw/sparc64/trace-events index ce597a6e9d..a0b29987d2 100644 --- a/hw/sparc64/trace-events +++ b/hw/sparc64/trace-events @@ -1,14 +1,14 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/sparc64/sun4u.c +# sun4u.c ebus_isa_irq_handler(int n, int level) "Set ISA IRQ %d level %d" -# hw/sparc64/sun4u_iommu.c +# sun4u_iommu.c sun4u_iommu_mem_read(uint64_t addr, uint64_t val, int size) "addr: 0x%"PRIx64" val: 0x%"PRIx64" size: %d" sun4u_iommu_mem_write(uint64_t addr, uint64_t val, int size) "addr: 0x%"PRIx64" val: 0x%"PRIx64" size: %d" sun4u_iommu_translate(uint64_t addr, uint64_t trans_addr, uint64_t tte) "xlate 0x%"PRIx64" => pa 0x%"PRIx64" tte: 0x%"PRIx64 -# hw/sparc64/sparc64.c +# sparc64.c sparc64_cpu_check_irqs_reset_irq(int intno) "Reset CPU IRQ (current interrupt 0x%x)" sparc64_cpu_check_irqs_noset_irq(uint32_t tl, uint32_t tt, int intno) "Not setting CPU IRQ: TL=%d current 0x%x >= pending 0x%x" sparc64_cpu_check_irqs_set_irq(unsigned int i, int old, int new) "Set CPU IRQ %d old=0x%x new=0x%x" diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index 16f88f7402..c615058cc1 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -429,12 +429,14 @@ static void xlnx_zynqmp_qspips_reset(DeviceState *d) static inline void stripe8(uint8_t *x, int num, bool dir) { - uint8_t r[num]; - memset(r, 0, sizeof(uint8_t) * num); + uint8_t r[MAX_NUM_BUSSES]; int idx[2] = {0, 0}; int bit[2] = {0, 7}; int d = dir; + assert(num <= MAX_NUM_BUSSES); + memset(r, 0, sizeof(uint8_t) * num); + for (idx[0] = 0; idx[0] < num; ++idx[0]) { for (bit[0] = 7; bit[0] >= 0; bit[0]--) { r[idx[!d]] |= x[idx[d]] & 1 << bit[d] ? 1 << bit[!d] : 0; diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index d97436bc7b..41024f39fb 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -744,7 +744,7 @@ static void hpet_realize(DeviceState *dev, Error **errp) HPETTimer *timer; if (!s->intcap) { - error_printf("Hpet's intcap not initialized.\n"); + warn_report("Hpet's intcap not initialized"); } if (hpet_cfg.count == UINT8_MAX) { /* first instance */ diff --git a/hw/timer/trace-events b/hw/timer/trace-events index 12eb505fee..dcaf3d6da6 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/timer/slavio_timer.c +# slavio_timer.c slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit 0x%"PRIx64" count 0x%x0x%08x" slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count 0x%x0x%08x" slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address 0x%"PRIx64 @@ -15,7 +15,7 @@ slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d cha slavio_timer_mem_writel_mode_invalid(void) "not system timer" slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address 0x%"PRIx64 -# hw/timer/grlib_gptimer.c +# grlib_gptimer.c grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run" grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x" grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x" @@ -24,13 +24,13 @@ grlib_gptimer_hit(int id) "timer:%d HIT" grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" -# hw/timer/lm32_timer.c +# lm32_timer.c lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" lm32_timer_hit(void) "timer hit" lm32_timer_irq_state(int level) "irq state %d" -# hw/timer/milkymist-sysctl.c +# milkymist-sysctl.c milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" milkymist_sysctl_icap_write(uint32_t value) "value 0x%08x" @@ -41,7 +41,7 @@ milkymist_sysctl_stop_timer1(void) "Stop timer1" milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0" milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1" -# hw/timer/aspeed_timer.c +# aspeed_timer.c aspeed_timer_ctrl_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d" aspeed_timer_ctrl_external_clock(uint8_t i, bool enable) "Timer %" PRIu8 ": %d" aspeed_timer_ctrl_overflow_interrupt(uint8_t i, bool enable) "Timer %" PRIu8 ": %d" @@ -50,34 +50,34 @@ aspeed_timer_set_ctrl2(uint32_t value) "Value: 0x%" PRIx32 aspeed_timer_set_value(int timer, int reg, uint32_t value) "Timer %d register %d: 0x%" PRIx32 aspeed_timer_read(uint64_t offset, unsigned size, uint64_t value) "From 0x%" PRIx64 ": of size %u: 0x%" PRIx64 -# hw/timer/armv7m_systick.c +# armv7m_systick.c systick_reload(void) "systick reload" systick_timer_tick(void) "systick reload" systick_read(uint64_t addr, uint32_t value, unsigned size) "systick read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" systick_write(uint64_t addr, uint32_t value, unsigned size) "systick write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" -# hw/timer/cmsdk_apb_timer.c +# cmsdk-apb-timer.c cmsdk_apb_timer_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB timer read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" cmsdk_apb_timer_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB timer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" cmsdk_apb_timer_reset(void) "CMSDK APB timer: reset" -# hw/timer/cmsdk_apb_dualtimer.c +# cmsdk-apb-dualtimer.c cmsdk_apb_dualtimer_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB dualtimer read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" cmsdk_apb_dualtimer_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB dualtimer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" cmsdk_apb_dualtimer_reset(void) "CMSDK APB dualtimer: reset" -# hw/timer/sun4v-rtc.c +# sun4v-rtc.c sun4v_rtc_read(uint64_t addr, uint64_t value) "read: addr 0x%" PRIx64 " value 0x%" PRIx64 sun4v_rtc_write(uint64_t addr, uint64_t value) "write: addr 0x%" PRIx64 " value 0x%" PRIx64 -# hw/timer/xlnx-zynqmp-rtc.c +# xlnx-zynqmp-rtc.c xlnx_zynqmp_rtc_gettime(int year, int month, int day, int hour, int min, int sec) "Get time from host: %d-%d-%d %2d:%02d:%02d" -# hw/timer/nrf51_timer.c +# nrf51_timer.c nrf51_timer_read(uint64_t addr, uint32_t value, unsigned size) "read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" nrf51_timer_write(uint64_t addr, uint32_t value, unsigned size) "write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" -# hw/timer/pl031.c +# pl031.c pl031_irq_state(int level) "irq state %d" pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" diff --git a/hw/tpm/trace-events b/hw/tpm/trace-events index f45dcd2209..0b94aa1526 100644 --- a/hw/tpm/trace-events +++ b/hw/tpm/trace-events @@ -1,21 +1,21 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/tpm/tpm_crb.c +# tpm_crb.c tpm_crb_mmio_read(uint64_t addr, unsigned size, uint32_t val) "CRB read 0x" TARGET_FMT_plx " len:%u val: 0x%" PRIx32 tpm_crb_mmio_write(uint64_t addr, unsigned size, uint32_t val) "CRB write 0x" TARGET_FMT_plx " len:%u val: 0x%" PRIx32 -# hw/tpm/tpm_passthrough.c +# tpm_passthrough.c tpm_passthrough_handle_request(void *cmd) "processing command %p" tpm_passthrough_reset(void) "reset" -# hw/tpm/tpm_util.c +# tpm_util.c tpm_util_get_buffer_size_hdr_len(uint32_t len, size_t expected) "tpm_resp->hdr.len = %u, expected = %zu" tpm_util_get_buffer_size_len(uint32_t len, size_t expected) "tpm_resp->len = %u, expected = %zu" tpm_util_get_buffer_size_hdr_len2(uint32_t len, size_t expected) "tpm2_resp->hdr.len = %u, expected = %zu" tpm_util_get_buffer_size_len2(uint32_t len, size_t expected) "tpm2_resp->len = %u, expected = %zu" tpm_util_get_buffer_size(size_t len) "buffersize of device: %zu" -# hw/tpm/tpm_emulator.c +# tpm_emulator.c tpm_emulator_set_locality(uint8_t locty) "setting locality to %d" tpm_emulator_handle_request(void) "processing TPM command" tpm_emulator_probe_caps(uint64_t caps) "capabilities: 0x%"PRIx64 @@ -35,7 +35,7 @@ tpm_emulator_set_state_blobs_done(void) "Done setting state blobs" tpm_emulator_pre_save(void) "" tpm_emulator_inst_init(void) "" -# hw/tpm/tpm_tis.c +# tpm_tis.c tpm_tis_show_buffer(const char *direction, size_t len, const char *buf) "direction: %s len: %zu\nbuf: %s" tpm_tis_raise_irq(uint32_t irqmask) "Raising IRQ for flag 0x%08x" tpm_tis_new_active_locality(uint8_t locty) "Active locality is now %d" @@ -53,5 +53,5 @@ tpm_tis_mmio_write_lowering_irq(void) "Lowering IRQ" tpm_tis_mmio_write_data2send(uint32_t value, unsigned size) "Data to send to TPM: 0x%08x (size=%d)" tpm_tis_pre_save(uint8_t locty, uint32_t rw_offset) "locty: %d, rw_offset = %u" -# hw/tpm/tpm_ppi.c +# tpm_ppi.c tpm_ppi_memset(uint8_t *ptr, size_t size) "memset: %p %zu" diff --git a/hw/usb/bus.c b/hw/usb/bus.c index 6fffab7bfa..9a74dc9560 100644 --- a/hw/usb/bus.c +++ b/hw/usb/bus.c @@ -500,6 +500,10 @@ static void usb_mask_to_str(char *dest, size_t size, speeds[i].name); } } + + if (pos == 0) { + snprintf(dest, size, "unknown"); + } } void usb_check_attach(USBDevice *dev, Error **errp) diff --git a/hw/usb/dev-audio.c b/hw/usb/dev-audio.c index 28ac7c5165..c46d5eeb79 100644 --- a/hw/usb/dev-audio.c +++ b/hw/usb/dev-audio.c @@ -650,7 +650,7 @@ static void usb_audio_realize(USBDevice *dev, Error **errp) s->out.vol[1] = 240; /* 0 dB */ s->out.as.freq = USBAUDIO_SAMPLE_RATE; s->out.as.nchannels = 2; - s->out.as.fmt = AUD_FMT_S16; + s->out.as.fmt = AUDIO_FORMAT_S16; s->out.as.endianness = 0; streambuf_init(&s->out.buf, s->buffer); diff --git a/hw/usb/dev-mtp.c b/hw/usb/dev-mtp.c index 06e376bcd2..99548b012d 100644 --- a/hw/usb/dev-mtp.c +++ b/hw/usb/dev-mtp.c @@ -170,7 +170,7 @@ struct MTPObject { char *path; struct stat stat; /* file monitor watch id */ - int watchid; + int64_t watchid; MTPObject *parent; uint32_t nchildren; QLIST_HEAD(, MTPObject) children; @@ -498,7 +498,7 @@ static MTPObject *usb_mtp_object_lookup_name(MTPObject *parent, return NULL; } -static MTPObject *usb_mtp_object_lookup_id(MTPState *s, int id) +static MTPObject *usb_mtp_object_lookup_id(MTPState *s, int64_t id) { MTPObject *iter; @@ -511,7 +511,7 @@ static MTPObject *usb_mtp_object_lookup_id(MTPState *s, int id) return NULL; } -static void file_monitor_event(int id, +static void file_monitor_event(int64_t id, QFileMonitorEvent ev, const char *name, void *opaque) @@ -625,8 +625,8 @@ static void usb_mtp_object_readdir(MTPState *s, MTPObject *o) } if (s->file_monitor) { - int id = qemu_file_monitor_add_watch(s->file_monitor, o->path, NULL, - file_monitor_event, s, &err); + int64_t id = qemu_file_monitor_add_watch(s->file_monitor, o->path, NULL, + file_monitor_event, s, &err); if (id == -1) { error_report("usb-mtp: failed to add watch for %s: %s", o->path, error_get_pretty(err)); @@ -1135,28 +1135,25 @@ static MTPData *usb_mtp_get_object_prop_value(MTPState *s, MTPControl *c, return d; } -/* Return correct return code for a delete event */ +/* + * Return values when object @o is deleted. + * If at least one of the deletions succeeded, + * DELETE_SUCCESS is set and if at least one + * of the deletions failed, DELETE_FAILURE is + * set. Both bits being set (DELETE_PARTIAL) + * signifies a RES_PARTIAL_DELETE being sent + * back to the initiator. + */ enum { - ALL_DELETE, - PARTIAL_DELETE, - READ_ONLY, + DELETE_SUCCESS = (1 << 0), + DELETE_FAILURE = (1 << 1), + DELETE_PARTIAL = (DELETE_FAILURE | DELETE_SUCCESS), }; -/* Assumes that children, if any, have been already freed */ -static void usb_mtp_object_free_one(MTPState *s, MTPObject *o) -{ - assert(o->nchildren == 0); - QTAILQ_REMOVE(&s->objects, o, next); - g_free(o->name); - g_free(o->path); - g_free(o); -} - static int usb_mtp_deletefn(MTPState *s, MTPObject *o, uint32_t trans) { MTPObject *iter, *iter2; - bool partial_delete = false; - bool success = false; + int ret = 0; /* * TODO: Add support for Protection Status @@ -1165,34 +1162,28 @@ static int usb_mtp_deletefn(MTPState *s, MTPObject *o, uint32_t trans) QLIST_FOREACH(iter, &o->children, list) { if (iter->format == FMT_ASSOCIATION) { QLIST_FOREACH(iter2, &iter->children, list) { - usb_mtp_deletefn(s, iter2, trans); + ret |= usb_mtp_deletefn(s, iter2, trans); } } } if (o->format == FMT_UNDEFINED_OBJECT) { if (remove(o->path)) { - partial_delete = true; + ret |= DELETE_FAILURE; } else { - usb_mtp_object_free_one(s, o); - success = true; + usb_mtp_object_free(s, o); + ret |= DELETE_SUCCESS; } } else if (o->format == FMT_ASSOCIATION) { if (rmdir(o->path)) { - partial_delete = true; + ret |= DELETE_FAILURE; } else { - usb_mtp_object_free_one(s, o); - success = true; + usb_mtp_object_free(s, o); + ret |= DELETE_SUCCESS; } } - if (success && partial_delete) { - return PARTIAL_DELETE; - } - if (!success && partial_delete) { - return READ_ONLY; - } - return ALL_DELETE; + return ret; } static void usb_mtp_object_delete(MTPState *s, uint32_t handle, @@ -1226,19 +1217,24 @@ static void usb_mtp_object_delete(MTPState *s, uint32_t handle, } ret = usb_mtp_deletefn(s, o, trans); - if (ret == PARTIAL_DELETE) { - usb_mtp_queue_result(s, RES_PARTIAL_DELETE, - trans, 0, 0, 0, 0); - return; - } else if (ret == READ_ONLY) { - usb_mtp_queue_result(s, RES_STORE_READ_ONLY, trans, - 0, 0, 0, 0); - return; - } else { + switch (ret) { + case DELETE_SUCCESS: usb_mtp_queue_result(s, RES_OK, trans, 0, 0, 0, 0); - return; + break; + case DELETE_FAILURE: + usb_mtp_queue_result(s, RES_PARTIAL_DELETE, + trans, 0, 0, 0, 0); + break; + case DELETE_PARTIAL: + usb_mtp_queue_result(s, RES_PARTIAL_DELETE, + trans, 0, 0, 0, 0); + break; + default: + g_assert_not_reached(); } + + return; } static void usb_mtp_command(MTPState *s, MTPControl *c) @@ -1703,12 +1699,19 @@ static void usb_mtp_write_metadata(MTPState *s, uint64_t dlen) MTPObject *o; MTPObject *p = usb_mtp_object_lookup(s, s->dataset.parent_handle); uint32_t next_handle = s->next_handle; + size_t filename_chars = dlen - offsetof(ObjectInfo, filename); + + /* + * filename is utf-16. We're intentionally doing + * integer division to truncate if malicious guest + * sent an odd number of bytes. + */ + filename_chars /= 2; assert(!s->write_pending); assert(p != NULL); - filename = utf16_to_str(MIN(dataset->length, - dlen - offsetof(ObjectInfo, filename)), + filename = utf16_to_str(MIN(dataset->length, filename_chars), dataset->filename); if (strchr(filename, '/')) { diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index 196a9f7200..81cf5ab7a5 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -1200,7 +1200,7 @@ static int ohci_service_ed_list(OHCIState *ohci, uint32_t head, int completion) if (head == 0) return 0; - for (cur = head; cur; cur = next_ed) { + for (cur = head; cur && link_cnt++ < ED_LINK_LIMIT; cur = next_ed) { if (ohci_read_ed(ohci, cur, &ed)) { trace_usb_ohci_ed_read_error(cur); ohci_die(ohci); @@ -1209,11 +1209,6 @@ static int ohci_service_ed_list(OHCIState *ohci, uint32_t head, int completion) next_ed = ed.next & OHCI_DPTR_MASK; - if (++link_cnt > ED_LINK_LIMIT) { - ohci_die(ohci); - return 0; - } - if ((ed.head & OHCI_ED_H) || (ed.flags & OHCI_ED_K)) { uint32_t addr; /* Cancel pending packets for ED that have been paused. */ diff --git a/hw/usb/trace-events b/hw/usb/trace-events index 99b1e8b8ce..2d3713351c 100644 --- a/hw/usb/trace-events +++ b/hw/usb/trace-events @@ -1,16 +1,16 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/usb/core.c +# core.c usb_packet_state_change(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s -> %s" usb_packet_state_fault(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s, expected %s" -# hw/usb/bus.c +# bus.c usb_port_claim(int bus, const char *port) "bus %d, port %s" usb_port_attach(int bus, const char *port, const char *devspeed, const char *portspeed) "bus %d, port %s, devspeed %s, portspeed %s" usb_port_detach(int bus, const char *port) "bus %d, port %s" usb_port_release(int bus, const char *port) "bus %d, port %s" -# hw/usb/hcd-ohci.c +# hcd-ohci.c usb_ohci_iso_td_read_failed(uint32_t addr) "ISO_TD read error at 0x%x" usb_ohci_iso_td_head(uint32_t head, uint32_t tail, uint32_t flags, uint32_t bp, uint32_t next, uint32_t be, uint32_t framenum, uint32_t startframe, uint32_t framecount, int rel_frame_num) "ISO_TD ED head 0x%.8x tailp 0x%.8x\n0x%.8x 0x%.8x 0x%.8x 0x%.8x\nframe_number 0x%.8x starting_frame 0x%.8x\nframe_count 0x%.8x relative %d" usb_ohci_iso_td_head_offset(uint32_t o0, uint32_t o1, uint32_t o2, uint32_t o3, uint32_t o4, uint32_t o5, uint32_t o6, uint32_t o7) "0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x" @@ -67,7 +67,7 @@ usb_ohci_init_time(int64_t frametime, int64_t bittime) "usb_bit_time=%" PRId64 " usb_ohci_die(void) "" usb_ohci_async_complete(void) "" -# hw/usb/hcd-ehci.c +# hcd-ehci.c usb_ehci_reset(void) "=== RESET ===" usb_ehci_unrealize(void) "=== UNREALIZE ===" usb_ehci_opreg_read(uint32_t addr, const char *str, uint32_t val) "rd mmio 0x%04x [%s] = 0x%x" @@ -100,7 +100,7 @@ usb_ehci_doorbell_ring(void) "" usb_ehci_doorbell_ack(void) "" usb_ehci_dma_error(void) "" -# hw/usb/hcd-uhci.c +# hcd-uhci.c usb_uhci_reset(void) "=== RESET ===" usb_uhci_exit(void) "=== EXIT ===" usb_uhci_schedule_start(void) "" @@ -130,7 +130,7 @@ usb_uhci_td_nextqh(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" usb_uhci_td_async(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" usb_uhci_td_complete(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" -# hw/usb/hcd-xhci.c +# hcd-xhci.c usb_xhci_reset(void) "=== RESET ===" usb_xhci_exit(void) "=== EXIT ===" usb_xhci_run(void) "" @@ -176,7 +176,7 @@ usb_xhci_xfer_error(void *xfer, uint32_t ret) "%p: ret %d" usb_xhci_unimplemented(const char *item, int nr) "%s (0x%x)" usb_xhci_enforced_limit(const char *item) "%s" -# hw/usb/desc.c +# desc.c usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d" usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d" usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" @@ -190,7 +190,7 @@ usb_set_interface(int addr, int iface, int alt, int ret) "dev %d, interface %d, usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" -# hw/usb/dev-hub.c +# dev-hub.c usb_hub_reset(int addr) "dev %d" usb_hub_control(int addr, int request, int value, int index, int length) "dev %d, req 0x%x, value %d, index %d, langth %d" usb_hub_get_port_status(int addr, int nr, int status, int changed) "dev %d, port %d, status 0x%x, changed 0x%x" @@ -200,7 +200,7 @@ usb_hub_attach(int addr, int nr) "dev %d, port %d" usb_hub_detach(int addr, int nr) "dev %d, port %d" usb_hub_status_report(int addr, int status) "dev %d, status 0x%x" -# hw/usb/dev-uas.c +# dev-uas.c usb_uas_reset(int addr) "dev %d" usb_uas_command(int addr, uint16_t tag, int lun, uint32_t lun64_1, uint32_t lun64_2) "dev %d, tag 0x%x, lun %d, lun64 0x%08x-0x%08x" usb_uas_response(int addr, uint16_t tag, uint8_t code) "dev %d, tag 0x%x, code 0x%x" @@ -214,7 +214,7 @@ usb_uas_tmf_abort_task(int addr, uint16_t tag, uint16_t task_tag) "dev %d, tag 0 usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) "dev %d, tag 0x%x, lun %d" usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) "dev %d, tag 0x%x, function 0x%x" -# hw/usb/dev-mtp.c +# dev-mtp.c usb_mtp_reset(int addr) "dev %d" usb_mtp_command(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uint32_t arg1, uint32_t arg2, uint32_t arg3, uint32_t arg4) "dev %d, code 0x%x, trans 0x%x, args 0x%x, 0x%x, 0x%x, 0x%x, 0x%x" usb_mtp_success(int dev, uint32_t trans, uint32_t arg0, uint32_t arg1) "dev %d, trans 0x%x, args 0x%x, 0x%x" @@ -239,7 +239,7 @@ usb_mtp_object_free(int dev, uint32_t handle, const char *path) "dev %d, handle usb_mtp_add_child(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s" usb_mtp_file_monitor_event(int dev, const char *path, const char *s) "dev %d, path %s event %s" -# hw/usb/host-libusb.c +# host-libusb.c usb_host_open_started(int bus, int addr) "dev %d:%d" usb_host_open_success(int bus, int addr) "dev %d:%d" usb_host_open_failure(int bus, int addr) "dev %d:%d" diff --git a/hw/vfio/ccw.c b/hw/vfio/ccw.c index 9246729a75..31dd3a2a87 100644 --- a/hw/vfio/ccw.c +++ b/hw/vfio/ccw.c @@ -21,12 +21,12 @@ #include "hw/vfio/vfio.h" #include "hw/vfio/vfio-common.h" #include "hw/s390x/s390-ccw.h" +#include "hw/s390x/vfio-ccw.h" #include "hw/s390x/ccw-device.h" #include "exec/address-spaces.h" #include "qemu/error-report.h" -#define TYPE_VFIO_CCW "vfio-ccw" -typedef struct VFIOCCWDevice { +struct VFIOCCWDevice { S390CCWDevice cdev; VFIODevice vdev; uint64_t io_region_size; @@ -35,7 +35,7 @@ typedef struct VFIOCCWDevice { EventNotifier io_notifier; bool force_orb_pfch; bool warned_orb_pfch; -} VFIOCCWDevice; +}; static inline void warn_once_pfch(VFIOCCWDevice *vcdev, SubchDev *sch, const char *msg) @@ -130,8 +130,8 @@ static void vfio_ccw_io_notifier_handler(void *opaque) S390CCWDevice *cdev = S390_CCW_DEVICE(vcdev); CcwDevice *ccw_dev = CCW_DEVICE(cdev); SubchDev *sch = ccw_dev->sch; - SCSW *s = &sch->curr_status.scsw; - PMCW *p = &sch->curr_status.pmcw; + SCHIB *schib = &sch->curr_status; + SCSW s; IRB irb; int size; @@ -145,33 +145,33 @@ static void vfio_ccw_io_notifier_handler(void *opaque) switch (errno) { case ENODEV: /* Generate a deferred cc 3 condition. */ - s->flags |= SCSW_FLAGS_MASK_CC; - s->ctrl &= ~SCSW_CTRL_MASK_STCTL; - s->ctrl |= (SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND); + schib->scsw.flags |= SCSW_FLAGS_MASK_CC; + schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL; + schib->scsw.ctrl |= (SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND); goto read_err; case EFAULT: /* Memory problem, generate channel data check. */ - s->ctrl &= ~SCSW_ACTL_START_PEND; - s->cstat = SCSW_CSTAT_DATA_CHECK; - s->ctrl &= ~SCSW_CTRL_MASK_STCTL; - s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | + schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND; + schib->scsw.cstat = SCSW_CSTAT_DATA_CHECK; + schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL; + schib->scsw.ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND; goto read_err; default: /* Error, generate channel program check. */ - s->ctrl &= ~SCSW_ACTL_START_PEND; - s->cstat = SCSW_CSTAT_PROG_CHECK; - s->ctrl &= ~SCSW_CTRL_MASK_STCTL; - s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | + schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND; + schib->scsw.cstat = SCSW_CSTAT_PROG_CHECK; + schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL; + schib->scsw.ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND; goto read_err; } } else if (size != vcdev->io_region_size) { /* Information transfer error, generate channel-control check. */ - s->ctrl &= ~SCSW_ACTL_START_PEND; - s->cstat = SCSW_CSTAT_CHN_CTRL_CHK; - s->ctrl &= ~SCSW_CTRL_MASK_STCTL; - s->ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | + schib->scsw.ctrl &= ~SCSW_ACTL_START_PEND; + schib->scsw.cstat = SCSW_CSTAT_CHN_CTRL_CHK; + schib->scsw.ctrl &= ~SCSW_CTRL_MASK_STCTL; + schib->scsw.ctrl |= SCSW_STCTL_PRIMARY | SCSW_STCTL_SECONDARY | SCSW_STCTL_ALERT | SCSW_STCTL_STATUS_PEND; goto read_err; } @@ -179,11 +179,13 @@ static void vfio_ccw_io_notifier_handler(void *opaque) memcpy(&irb, region->irb_area, sizeof(IRB)); /* Update control block via irb. */ - copy_scsw_to_guest(s, &irb.scsw); + s = schib->scsw; + copy_scsw_to_guest(&s, &irb.scsw); + schib->scsw = s; /* If a uint check is pending, copy sense data. */ - if ((s->dstat & SCSW_DSTAT_UNIT_CHECK) && - (p->chars & PMCW_CHARS_MASK_CSENSE)) { + if ((schib->scsw.dstat & SCSW_DSTAT_UNIT_CHECK) && + (schib->pmcw.chars & PMCW_CHARS_MASK_CSENSE)) { memcpy(sch->sense_data, irb.ecw, sizeof(irb.ecw)); } diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c index 40a12001f5..29b2697fe1 100644 --- a/hw/vfio/pci-quirks.c +++ b/hw/vfio/pci-quirks.c @@ -2180,3 +2180,134 @@ int vfio_add_virt_caps(VFIOPCIDevice *vdev, Error **errp) return 0; } + +static void vfio_pci_nvlink2_get_tgt(Object *obj, Visitor *v, + const char *name, + void *opaque, Error **errp) +{ + uint64_t tgt = (uintptr_t) opaque; + visit_type_uint64(v, name, &tgt, errp); +} + +static void vfio_pci_nvlink2_get_link_speed(Object *obj, Visitor *v, + const char *name, + void *opaque, Error **errp) +{ + uint32_t link_speed = (uint32_t)(uintptr_t) opaque; + visit_type_uint32(v, name, &link_speed, errp); +} + +int vfio_pci_nvidia_v100_ram_init(VFIOPCIDevice *vdev, Error **errp) +{ + int ret; + void *p; + struct vfio_region_info *nv2reg = NULL; + struct vfio_info_cap_header *hdr; + struct vfio_region_info_cap_nvlink2_ssatgt *cap; + VFIOQuirk *quirk; + + ret = vfio_get_dev_region_info(&vdev->vbasedev, + VFIO_REGION_TYPE_PCI_VENDOR_TYPE | + PCI_VENDOR_ID_NVIDIA, + VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM, + &nv2reg); + if (ret) { + return ret; + } + + hdr = vfio_get_region_info_cap(nv2reg, VFIO_REGION_INFO_CAP_NVLINK2_SSATGT); + if (!hdr) { + ret = -ENODEV; + goto free_exit; + } + cap = (void *) hdr; + + p = mmap(NULL, nv2reg->size, PROT_READ | PROT_WRITE | PROT_EXEC, + MAP_SHARED, vdev->vbasedev.fd, nv2reg->offset); + if (p == MAP_FAILED) { + ret = -errno; + goto free_exit; + } + + quirk = vfio_quirk_alloc(1); + memory_region_init_ram_ptr(&quirk->mem[0], OBJECT(vdev), "nvlink2-mr", + nv2reg->size, p); + QLIST_INSERT_HEAD(&vdev->bars[0].quirks, quirk, next); + + object_property_add(OBJECT(vdev), "nvlink2-tgt", "uint64", + vfio_pci_nvlink2_get_tgt, NULL, NULL, + (void *) (uintptr_t) cap->tgt, NULL); + trace_vfio_pci_nvidia_gpu_setup_quirk(vdev->vbasedev.name, cap->tgt, + nv2reg->size); +free_exit: + g_free(nv2reg); + + return ret; +} + +int vfio_pci_nvlink2_init(VFIOPCIDevice *vdev, Error **errp) +{ + int ret; + void *p; + struct vfio_region_info *atsdreg = NULL; + struct vfio_info_cap_header *hdr; + struct vfio_region_info_cap_nvlink2_ssatgt *captgt; + struct vfio_region_info_cap_nvlink2_lnkspd *capspeed; + VFIOQuirk *quirk; + + ret = vfio_get_dev_region_info(&vdev->vbasedev, + VFIO_REGION_TYPE_PCI_VENDOR_TYPE | + PCI_VENDOR_ID_IBM, + VFIO_REGION_SUBTYPE_IBM_NVLINK2_ATSD, + &atsdreg); + if (ret) { + return ret; + } + + hdr = vfio_get_region_info_cap(atsdreg, + VFIO_REGION_INFO_CAP_NVLINK2_SSATGT); + if (!hdr) { + ret = -ENODEV; + goto free_exit; + } + captgt = (void *) hdr; + + hdr = vfio_get_region_info_cap(atsdreg, + VFIO_REGION_INFO_CAP_NVLINK2_LNKSPD); + if (!hdr) { + ret = -ENODEV; + goto free_exit; + } + capspeed = (void *) hdr; + + /* Some NVLink bridges may not have assigned ATSD */ + if (atsdreg->size) { + p = mmap(NULL, atsdreg->size, PROT_READ | PROT_WRITE | PROT_EXEC, + MAP_SHARED, vdev->vbasedev.fd, atsdreg->offset); + if (p == MAP_FAILED) { + ret = -errno; + goto free_exit; + } + + quirk = vfio_quirk_alloc(1); + memory_region_init_ram_device_ptr(&quirk->mem[0], OBJECT(vdev), + "nvlink2-atsd-mr", atsdreg->size, p); + QLIST_INSERT_HEAD(&vdev->bars[0].quirks, quirk, next); + } + + object_property_add(OBJECT(vdev), "nvlink2-tgt", "uint64", + vfio_pci_nvlink2_get_tgt, NULL, NULL, + (void *) (uintptr_t) captgt->tgt, NULL); + trace_vfio_pci_nvlink2_setup_quirk_ssatgt(vdev->vbasedev.name, captgt->tgt, + atsdreg->size); + + object_property_add(OBJECT(vdev), "nvlink2-link-speed", "uint32", + vfio_pci_nvlink2_get_link_speed, NULL, NULL, + (void *) (uintptr_t) capspeed->link_speed, NULL); + trace_vfio_pci_nvlink2_setup_quirk_lnkspd(vdev->vbasedev.name, + capspeed->link_speed); +free_exit: + g_free(atsdreg); + + return ret; +} diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 504019c458..8cecb53d5c 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -947,8 +947,10 @@ static void vfio_pci_size_rom(VFIOPCIDevice *vdev) if (vdev->pdev.romfile || !vdev->pdev.rom_bar) { /* Since pci handles romfile, just print a message and return */ if (vfio_blacklist_opt_rom(vdev) && vdev->pdev.romfile) { - error_printf("Warning : Device at %s is known to cause system instability issues during option rom execution. Proceeding anyway since user specified romfile\n", - vdev->vbasedev.name); + warn_report("Device at %s is known to cause system instability" + " issues during option rom execution", + vdev->vbasedev.name); + error_printf("Proceeding anyway since user specified romfile\n"); } return; } @@ -973,11 +975,16 @@ static void vfio_pci_size_rom(VFIOPCIDevice *vdev) if (vfio_blacklist_opt_rom(vdev)) { if (dev->opts && qemu_opt_get(dev->opts, "rombar")) { - error_printf("Warning : Device at %s is known to cause system instability issues during option rom execution. Proceeding anyway since user specified non zero value for rombar\n", - vdev->vbasedev.name); + warn_report("Device at %s is known to cause system instability" + " issues during option rom execution", + vdev->vbasedev.name); + error_printf("Proceeding anyway since user specified" + " non zero value for rombar\n"); } else { - error_printf("Warning : Rom loading for device at %s has been disabled due to system instability issues. Specify rombar=1 or romfile to force\n", - vdev->vbasedev.name); + warn_report("Rom loading for device at %s has been disabled" + " due to system instability issues", + vdev->vbasedev.name); + error_printf("Specify rombar=1 or romfile to force\n"); return; } } @@ -3079,6 +3086,20 @@ static void vfio_realize(PCIDevice *pdev, Error **errp) } } + if (vdev->vendor_id == PCI_VENDOR_ID_NVIDIA) { + ret = vfio_pci_nvidia_v100_ram_init(vdev, errp); + if (ret && ret != -ENODEV) { + error_report("Failed to setup NVIDIA V100 GPU RAM"); + } + } + + if (vdev->vendor_id == PCI_VENDOR_ID_IBM) { + ret = vfio_pci_nvlink2_init(vdev, errp); + if (ret && ret != -ENODEV) { + error_report("Failed to setup NVlink2 bridge"); + } + } + vfio_register_err_notifier(vdev); vfio_register_req_notifier(vdev); vfio_setup_resetfn_quirk(vdev); diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h index c11c3f1670..cfcd1a81b8 100644 --- a/hw/vfio/pci.h +++ b/hw/vfio/pci.h @@ -196,6 +196,8 @@ int vfio_populate_vga(VFIOPCIDevice *vdev, Error **errp); int vfio_pci_igd_opregion_init(VFIOPCIDevice *vdev, struct vfio_region_info *info, Error **errp); +int vfio_pci_nvidia_v100_ram_init(VFIOPCIDevice *vdev, Error **errp); +int vfio_pci_nvlink2_init(VFIOPCIDevice *vdev, Error **errp); void vfio_display_reset(VFIOPCIDevice *vdev); int vfio_display_probe(VFIOPCIDevice *vdev, Error **errp); diff --git a/hw/vfio/spapr.c b/hw/vfio/spapr.c index 57fe758e54..96c0ad9d9b 100644 --- a/hw/vfio/spapr.c +++ b/hw/vfio/spapr.c @@ -148,7 +148,7 @@ int vfio_spapr_create_window(VFIOContainer *container, uint64_t pagesize = memory_region_iommu_get_min_page_size(iommu_mr); unsigned entries, bits_total, bits_per_level, max_levels; struct vfio_iommu_spapr_tce_create create = { .argsz = sizeof(create) }; - long rampagesize = qemu_getrampagesize(); + long rampagesize = qemu_minrampagesize(); /* * The host might not support the guest supported IOMMU page size, diff --git a/hw/vfio/trace-events b/hw/vfio/trace-events index 22019728e0..b1ef55a33f 100644 --- a/hw/vfio/trace-events +++ b/hw/vfio/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/vfio/pci.c +# pci.c vfio_intx_interrupt(const char *name, char line) " (%s) Pin %c" vfio_intx_eoi(const char *name) " (%s) EOI" vfio_intx_enable_kvm(const char *name) " (%s) KVM INTx accel enabled" @@ -16,7 +16,6 @@ vfio_msix_pba_disable(const char *name) " (%s)" vfio_msix_pba_enable(const char *name) " (%s)" vfio_msix_disable(const char *name) " (%s)" vfio_msix_fixup(const char *name, int bar, uint64_t start, uint64_t end) " (%s) MSI-X region %d mmap fixup [0x%"PRIx64" - 0x%"PRIx64"]" -vfio_msix_relo_cost(const char *name, int bar, uint64_t cost) " (%s) BAR %d cost 0x%"PRIx64"" vfio_msix_relo(const char *name, int bar, uint64_t offset) " (%s) BAR %d offset 0x%"PRIx64"" vfio_msi_enable(const char *name, int nr_vectors) " (%s) Enabled %d MSI vectors" vfio_msi_disable(const char *name) " (%s)" @@ -49,7 +48,7 @@ vfio_pci_emulated_device_id(const char *name, uint16_t val) "%s 0x%04x" vfio_pci_emulated_sub_vendor_id(const char *name, uint16_t val) "%s 0x%04x" vfio_pci_emulated_sub_device_id(const char *name, uint16_t val) "%s 0x%04x" -# hw/vfio/pci-quirks.c +# pci-quirks.c vfio_quirk_rom_blacklisted(const char *name, uint16_t vid, uint16_t did) "%s %04x:%04x" vfio_quirk_generic_window_address_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64 vfio_quirk_generic_window_data_read(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64 @@ -87,11 +86,16 @@ vfio_pci_igd_opregion_enabled(const char *name) "%s" vfio_pci_igd_host_bridge_enabled(const char *name) "%s" vfio_pci_igd_lpc_bridge_enabled(const char *name) "%s" -# hw/vfio/common.c +vfio_pci_nvidia_gpu_setup_quirk(const char *name, uint64_t tgt, uint64_t size) "%s tgt=0x%"PRIx64" size=0x%"PRIx64 +vfio_pci_nvlink2_setup_quirk_ssatgt(const char *name, uint64_t tgt, uint64_t size) "%s tgt=0x%"PRIx64" size=0x%"PRIx64 +vfio_pci_nvlink2_setup_quirk_lnkspd(const char *name, uint32_t link_speed) "%s link_speed=0x%x" + +# common.c vfio_region_write(const char *name, int index, uint64_t addr, uint64_t data, unsigned size) " (%s:region%d+0x%"PRIx64", 0x%"PRIx64 ", %d)" vfio_region_read(char *name, int index, uint64_t addr, unsigned size, uint64_t data) " (%s:region%d+0x%"PRIx64", %d) = 0x%"PRIx64 vfio_iommu_map_notify(const char *op, uint64_t iova_start, uint64_t iova_end) "iommu %s @ 0x%"PRIx64" - 0x%"PRIx64 vfio_listener_region_add_skip(uint64_t start, uint64_t end) "SKIPPING region_add 0x%"PRIx64" - 0x%"PRIx64 +vfio_spapr_group_attach(int groupfd, int tablefd) "Attached groupfd %d to liobn fd %d" vfio_listener_region_add_iommu(uint64_t start, uint64_t end) "region_add [iommu] 0x%"PRIx64" - 0x%"PRIx64 vfio_listener_region_add_ram(uint64_t iova_start, uint64_t iova_end, void *vaddr) "region_add [ram] 0x%"PRIx64" - 0x%"PRIx64" [%p]" vfio_listener_region_add_no_dma_map(const char *name, uint64_t iova, uint64_t size, uint64_t page_size) "Region \"%s\" 0x%"PRIx64" size=0x%"PRIx64" is not aligned to 0x%"PRIx64" and cannot be mapped for DMA" @@ -112,7 +116,7 @@ vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long end) "sp vfio_get_dev_region(const char *name, int index, uint32_t type, uint32_t subtype) "%s index %d, %08x/%0x8" vfio_dma_unmap_overflow_workaround(void) "" -# hw/vfio/platform.c +# platform.c vfio_platform_base_device_init(char *name, int groupid) "%s belongs to group #%d" vfio_platform_realize(char *name, char *compat) "vfio device %s, compat = %s" vfio_platform_eoi(int pin, int fd) "EOI IRQ pin %d (fd=%d)" @@ -124,16 +128,15 @@ vfio_intp_interrupt_set_pending(int index) "irq %d is set PENDING" vfio_platform_start_level_irqfd_injection(int index, int fd, int resamplefd) "IRQ index=%d, fd = %d, resamplefd = %d" vfio_platform_start_edge_irqfd_injection(int index, int fd) "IRQ index=%d, fd = %d" -# hw/vfio/spapr.c +# spapr.c vfio_prereg_listener_region_add_skip(uint64_t start, uint64_t end) "0x%"PRIx64" - 0x%"PRIx64 vfio_prereg_listener_region_del_skip(uint64_t start, uint64_t end) "0x%"PRIx64" - 0x%"PRIx64 vfio_prereg_register(uint64_t va, uint64_t size, int ret) "va=0x%"PRIx64" size=0x%"PRIx64" ret=%d" vfio_prereg_unregister(uint64_t va, uint64_t size, int ret) "va=0x%"PRIx64" size=0x%"PRIx64" ret=%d" vfio_spapr_create_window(int ps, unsigned int levels, uint64_t ws, uint64_t off) "pageshift=0x%x levels=%u winsize=0x%"PRIx64" offset=0x%"PRIx64 vfio_spapr_remove_window(uint64_t off) "offset=0x%"PRIx64 -vfio_spapr_group_attach(int groupfd, int tablefd) "Attached groupfd %d to liobn fd %d" -# hw/vfio/display.c +# display.c vfio_display_edid_available(void) "" vfio_display_edid_link_up(void) "" vfio_display_edid_link_down(void) "" diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events index 07bcbe9e85..60c649c4bc 100644 --- a/hw/virtio/trace-events +++ b/hw/virtio/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/virtio/vhost.c +# vhost.c vhost_commit(bool started, bool changed) "Started: %d Changed: %d" vhost_region_add_section(const char *name, uint64_t gpa, uint64_t size, uint64_t host) "%s: 0x%"PRIx64"+0x%"PRIx64" @ 0x%"PRIx64 vhost_region_add_section_merge(const char *name, uint64_t new_size, uint64_t gpa, uint64_t owr) "%s: size: 0x%"PRIx64 " gpa: 0x%"PRIx64 " owr: 0x%"PRIx64 @@ -8,7 +8,7 @@ vhost_region_add_section_aligned(const char *name, uint64_t gpa, uint64_t size, vhost_section(const char *name, int r) "%s:%d" vhost_iotlb_miss(void *dev, int step) "%p step %d" -# hw/virtio/vhost-user.c +# vhost-user.c vhost_user_postcopy_end_entry(void) "" vhost_user_postcopy_end_exit(void) "" vhost_user_postcopy_fault_handler(const char *name, uint64_t fault_address, int nregions) "%s: @0x%"PRIx64" nregions:%d" @@ -21,7 +21,7 @@ vhost_user_postcopy_waker(const char *rb, uint64_t rb_offset) "%s + 0x%"PRIx64 vhost_user_postcopy_waker_found(uint64_t client_addr) "0x%"PRIx64 vhost_user_postcopy_waker_nomatch(const char *rb, uint64_t rb_offset) "%s + 0x%"PRIx64 -# hw/virtio/virtio.c +# virtio.c virtqueue_alloc_element(void *elem, size_t sz, unsigned in_num, unsigned out_num) "elem %p size %zd in_num %u out_num %u" virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u" virtqueue_flush(void *vq, unsigned int count) "vq %p count %u" @@ -31,7 +31,7 @@ virtio_notify_irqfd(void *vdev, void *vq) "vdev %p vq %p" virtio_notify(void *vdev, void *vq) "vdev %p vq %p" virtio_set_status(void *vdev, uint8_t val) "vdev %p val %u" -# hw/virtio/virtio-rng.c +# virtio-rng.c virtio_rng_guest_not_ready(void *rng) "rng %p: guest not ready" virtio_rng_cpu_is_stopped(void *rng, int size) "rng %p: cpu is stopped, dropping %d bytes" virtio_rng_popped(void *rng) "rng %p: elem popped" @@ -39,7 +39,7 @@ virtio_rng_pushed(void *rng, size_t len) "rng %p: %zd bytes pushed" virtio_rng_request(void *rng, size_t size, unsigned quota) "rng %p: %zd bytes requested, %u bytes quota left" virtio_rng_vm_state_change(void *rng, int running, int state) "rng %p: state change to running %d state %d" -# hw/virtio/virtio-balloon.c +# virtio-balloon.c # virtio_balloon_bad_addr(uint64_t gpa) "0x%"PRIx64 virtio_balloon_handle_output(const char *name, uint64_t gpa) "section name: %s gpa: 0x%"PRIx64 diff --git a/hw/virtio/vhost-stub.c b/hw/virtio/vhost-stub.c index 049089b5e2..c175148fce 100644 --- a/hw/virtio/vhost-stub.c +++ b/hw/virtio/vhost-stub.c @@ -7,9 +7,9 @@ bool vhost_has_free_slot(void) return true; } -VhostUserState *vhost_user_init(void) +bool vhost_user_init(VhostUserState *user, CharBackend *chr, Error **errp) { - return NULL; + return false; } void vhost_user_cleanup(VhostUserState *user) diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c index 0d6c64e5ca..553319c7ac 100644 --- a/hw/virtio/vhost-user.c +++ b/hw/virtio/vhost-user.c @@ -56,6 +56,7 @@ enum VhostUserProtocolFeature { VHOST_USER_PROTOCOL_F_CONFIG = 9, VHOST_USER_PROTOCOL_F_SLAVE_SEND_FD = 10, VHOST_USER_PROTOCOL_F_HOST_NOTIFIER = 11, + VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD = 12, VHOST_USER_PROTOCOL_F_MAX }; @@ -93,6 +94,8 @@ typedef enum VhostUserRequest { VHOST_USER_POSTCOPY_ADVISE = 28, VHOST_USER_POSTCOPY_LISTEN = 29, VHOST_USER_POSTCOPY_END = 30, + VHOST_USER_GET_INFLIGHT_FD = 31, + VHOST_USER_SET_INFLIGHT_FD = 32, VHOST_USER_MAX } VhostUserRequest; @@ -151,6 +154,13 @@ typedef struct VhostUserVringArea { uint64_t offset; } VhostUserVringArea; +typedef struct VhostUserInflight { + uint64_t mmap_size; + uint64_t mmap_offset; + uint16_t num_queues; + uint16_t queue_size; +} VhostUserInflight; + typedef struct { VhostUserRequest request; @@ -173,6 +183,7 @@ typedef union { VhostUserConfig config; VhostUserCryptoSession session; VhostUserVringArea area; + VhostUserInflight inflight; } VhostUserPayload; typedef struct VhostUserMsg { @@ -214,7 +225,7 @@ static bool ioeventfd_enabled(void) return !kvm_enabled() || kvm_eventfds_enabled(); } -static int vhost_user_read(struct vhost_dev *dev, VhostUserMsg *msg) +static int vhost_user_read_header(struct vhost_dev *dev, VhostUserMsg *msg) { struct vhost_user *u = dev->opaque; CharBackend *chr = u->user->chr; @@ -225,7 +236,7 @@ static int vhost_user_read(struct vhost_dev *dev, VhostUserMsg *msg) if (r != size) { error_report("Failed to read msg header. Read %d instead of %d." " Original request %d.", r, size, msg->hdr.request); - goto fail; + return -1; } /* validate received flags */ @@ -233,7 +244,21 @@ static int vhost_user_read(struct vhost_dev *dev, VhostUserMsg *msg) error_report("Failed to read msg header." " Flags 0x%x instead of 0x%x.", msg->hdr.flags, VHOST_USER_REPLY_MASK | VHOST_USER_VERSION); - goto fail; + return -1; + } + + return 0; +} + +static int vhost_user_read(struct vhost_dev *dev, VhostUserMsg *msg) +{ + struct vhost_user *u = dev->opaque; + CharBackend *chr = u->user->chr; + uint8_t *p = (uint8_t *) msg; + int r, size; + + if (vhost_user_read_header(dev, msg) < 0) { + return -1; } /* validate message size is sane */ @@ -241,7 +266,7 @@ static int vhost_user_read(struct vhost_dev *dev, VhostUserMsg *msg) error_report("Failed to read msg header." " Size %d exceeds the maximum %zu.", msg->hdr.size, VHOST_USER_PAYLOAD_SIZE); - goto fail; + return -1; } if (msg->hdr.size) { @@ -251,14 +276,11 @@ static int vhost_user_read(struct vhost_dev *dev, VhostUserMsg *msg) if (r != size) { error_report("Failed to read msg payload." " Read %d instead of %d.", r, msg->hdr.size); - goto fail; + return -1; } } return 0; - -fail: - return -1; } static int process_message_reply(struct vhost_dev *dev, @@ -968,7 +990,10 @@ static void slave_read(void *opaque) iov.iov_base = &hdr; iov.iov_len = VHOST_USER_HDR_SIZE; - size = recvmsg(u->slave_fd, &msgh, 0); + do { + size = recvmsg(u->slave_fd, &msgh, 0); + } while (size < 0 && (errno == EINTR || errno == EAGAIN)); + if (size != VHOST_USER_HDR_SIZE) { error_report("Failed to read from slave."); goto err; @@ -997,7 +1022,10 @@ static void slave_read(void *opaque) } /* Read payload */ - size = read(u->slave_fd, &payload, hdr.size); + do { + size = read(u->slave_fd, &payload, hdr.size); + } while (size < 0 && (errno == EINTR || errno == EAGAIN)); + if (size != hdr.size) { error_report("Failed to read payload from slave."); goto err; @@ -1045,7 +1073,10 @@ static void slave_read(void *opaque) iovec[1].iov_base = &payload; iovec[1].iov_len = hdr.size; - size = writev(u->slave_fd, iovec, ARRAY_SIZE(iovec)); + do { + size = writev(u->slave_fd, iovec, ARRAY_SIZE(iovec)); + } while (size < 0 && (errno == EINTR || errno == EAGAIN)); + if (size != VHOST_USER_HDR_SIZE + hdr.size) { error_report("Failed to send msg reply to slave."); goto err; @@ -1750,17 +1781,118 @@ static bool vhost_user_mem_section_filter(struct vhost_dev *dev, return result; } -VhostUserState *vhost_user_init(void) +static int vhost_user_get_inflight_fd(struct vhost_dev *dev, + uint16_t queue_size, + struct vhost_inflight *inflight) +{ + void *addr; + int fd; + struct vhost_user *u = dev->opaque; + CharBackend *chr = u->user->chr; + VhostUserMsg msg = { + .hdr.request = VHOST_USER_GET_INFLIGHT_FD, + .hdr.flags = VHOST_USER_VERSION, + .payload.inflight.num_queues = dev->nvqs, + .payload.inflight.queue_size = queue_size, + .hdr.size = sizeof(msg.payload.inflight), + }; + + if (!virtio_has_feature(dev->protocol_features, + VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD)) { + return 0; + } + + if (vhost_user_write(dev, &msg, NULL, 0) < 0) { + return -1; + } + + if (vhost_user_read(dev, &msg) < 0) { + return -1; + } + + if (msg.hdr.request != VHOST_USER_GET_INFLIGHT_FD) { + error_report("Received unexpected msg type. " + "Expected %d received %d", + VHOST_USER_GET_INFLIGHT_FD, msg.hdr.request); + return -1; + } + + if (msg.hdr.size != sizeof(msg.payload.inflight)) { + error_report("Received bad msg size."); + return -1; + } + + if (!msg.payload.inflight.mmap_size) { + return 0; + } + + fd = qemu_chr_fe_get_msgfd(chr); + if (fd < 0) { + error_report("Failed to get mem fd"); + return -1; + } + + addr = mmap(0, msg.payload.inflight.mmap_size, PROT_READ | PROT_WRITE, + MAP_SHARED, fd, msg.payload.inflight.mmap_offset); + + if (addr == MAP_FAILED) { + error_report("Failed to mmap mem fd"); + close(fd); + return -1; + } + + inflight->addr = addr; + inflight->fd = fd; + inflight->size = msg.payload.inflight.mmap_size; + inflight->offset = msg.payload.inflight.mmap_offset; + inflight->queue_size = queue_size; + + return 0; +} + +static int vhost_user_set_inflight_fd(struct vhost_dev *dev, + struct vhost_inflight *inflight) { - VhostUserState *user = g_new0(struct VhostUserState, 1); + VhostUserMsg msg = { + .hdr.request = VHOST_USER_SET_INFLIGHT_FD, + .hdr.flags = VHOST_USER_VERSION, + .payload.inflight.mmap_size = inflight->size, + .payload.inflight.mmap_offset = inflight->offset, + .payload.inflight.num_queues = dev->nvqs, + .payload.inflight.queue_size = inflight->queue_size, + .hdr.size = sizeof(msg.payload.inflight), + }; - return user; + if (!virtio_has_feature(dev->protocol_features, + VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD)) { + return 0; + } + + if (vhost_user_write(dev, &msg, &inflight->fd, 1) < 0) { + return -1; + } + + return 0; +} + +bool vhost_user_init(VhostUserState *user, CharBackend *chr, Error **errp) +{ + if (user->chr) { + error_setg(errp, "Cannot initialize vhost-user state"); + return false; + } + user->chr = chr; + return true; } void vhost_user_cleanup(VhostUserState *user) { int i; + if (!user->chr) { + return; + } + for (i = 0; i < VIRTIO_QUEUE_MAX; i++) { if (user->notifier[i].addr) { object_unparent(OBJECT(&user->notifier[i].mr)); @@ -1768,6 +1900,7 @@ void vhost_user_cleanup(VhostUserState *user) user->notifier[i].addr = NULL; } } + user->chr = NULL; } const VhostOps user_ops = { @@ -1801,4 +1934,6 @@ const VhostOps user_ops = { .vhost_crypto_create_session = vhost_user_crypto_create_session, .vhost_crypto_close_session = vhost_user_crypto_close_session, .vhost_backend_mem_section_filter = vhost_user_mem_section_filter, + .vhost_get_inflight_fd = vhost_user_get_inflight_fd, + .vhost_set_inflight_fd = vhost_user_set_inflight_fd, }; diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c index 311432f190..7f61018f2a 100644 --- a/hw/virtio/vhost.c +++ b/hw/virtio/vhost.c @@ -1481,6 +1481,102 @@ void vhost_dev_set_config_notifier(struct vhost_dev *hdev, hdev->config_ops = ops; } +void vhost_dev_free_inflight(struct vhost_inflight *inflight) +{ + if (inflight->addr) { + qemu_memfd_free(inflight->addr, inflight->size, inflight->fd); + inflight->addr = NULL; + inflight->fd = -1; + } +} + +static int vhost_dev_resize_inflight(struct vhost_inflight *inflight, + uint64_t new_size) +{ + Error *err = NULL; + int fd = -1; + void *addr = qemu_memfd_alloc("vhost-inflight", new_size, + F_SEAL_GROW | F_SEAL_SHRINK | F_SEAL_SEAL, + &fd, &err); + + if (err) { + error_report_err(err); + return -1; + } + + vhost_dev_free_inflight(inflight); + inflight->offset = 0; + inflight->addr = addr; + inflight->fd = fd; + inflight->size = new_size; + + return 0; +} + +void vhost_dev_save_inflight(struct vhost_inflight *inflight, QEMUFile *f) +{ + if (inflight->addr) { + qemu_put_be64(f, inflight->size); + qemu_put_be16(f, inflight->queue_size); + qemu_put_buffer(f, inflight->addr, inflight->size); + } else { + qemu_put_be64(f, 0); + } +} + +int vhost_dev_load_inflight(struct vhost_inflight *inflight, QEMUFile *f) +{ + uint64_t size; + + size = qemu_get_be64(f); + if (!size) { + return 0; + } + + if (inflight->size != size) { + if (vhost_dev_resize_inflight(inflight, size)) { + return -1; + } + } + inflight->queue_size = qemu_get_be16(f); + + qemu_get_buffer(f, inflight->addr, size); + + return 0; +} + +int vhost_dev_set_inflight(struct vhost_dev *dev, + struct vhost_inflight *inflight) +{ + int r; + + if (dev->vhost_ops->vhost_set_inflight_fd && inflight->addr) { + r = dev->vhost_ops->vhost_set_inflight_fd(dev, inflight); + if (r) { + VHOST_OPS_DEBUG("vhost_set_inflight_fd failed"); + return -errno; + } + } + + return 0; +} + +int vhost_dev_get_inflight(struct vhost_dev *dev, uint16_t queue_size, + struct vhost_inflight *inflight) +{ + int r; + + if (dev->vhost_ops->vhost_get_inflight_fd) { + r = dev->vhost_ops->vhost_get_inflight_fd(dev, queue_size, inflight); + if (r) { + VHOST_OPS_DEBUG("vhost_get_inflight_fd failed"); + return -errno; + } + } + + return 0; +} + /* Host notifiers must be enabled at this point. */ int vhost_dev_start(struct vhost_dev *hdev, VirtIODevice *vdev) { diff --git a/hw/virtio/virtio-balloon.c b/hw/virtio/virtio-balloon.c index e3a65940ef..2112874055 100644 --- a/hw/virtio/virtio-balloon.c +++ b/hw/virtio/virtio-balloon.c @@ -82,7 +82,7 @@ static void balloon_inflate_page(VirtIOBalloon *balloon, /* We've partially ballooned part of a host page, but now * we're trying to balloon part of a different one. Too hard, * give up on the old partial page */ - free(balloon->pbp); + g_free(balloon->pbp); balloon->pbp = NULL; } @@ -107,11 +107,61 @@ static void balloon_inflate_page(VirtIOBalloon *balloon, * has already reported them, and failing to discard a balloon * page is not fatal */ - free(balloon->pbp); + g_free(balloon->pbp); balloon->pbp = NULL; } } +static void balloon_deflate_page(VirtIOBalloon *balloon, + MemoryRegion *mr, hwaddr offset) +{ + void *addr = memory_region_get_ram_ptr(mr) + offset; + RAMBlock *rb; + size_t rb_page_size; + ram_addr_t ram_offset, host_page_base; + void *host_addr; + int ret; + + /* XXX is there a better way to get to the RAMBlock than via a + * host address? */ + rb = qemu_ram_block_from_host(addr, false, &ram_offset); + rb_page_size = qemu_ram_pagesize(rb); + host_page_base = ram_offset & ~(rb_page_size - 1); + + if (balloon->pbp + && rb == balloon->pbp->rb + && host_page_base == balloon->pbp->base) { + int subpages = rb_page_size / BALLOON_PAGE_SIZE; + + /* + * This means the guest has asked to discard some of the 4kiB + * subpages of a host page, but then changed its mind and + * asked to keep them after all. It's exceedingly unlikely + * for a guest to do this in practice, but handle it anyway, + * since getting it wrong could mean discarding memory the + * guest is still using. */ + bitmap_clear(balloon->pbp->bitmap, + (ram_offset - balloon->pbp->base) / BALLOON_PAGE_SIZE, + subpages); + + if (bitmap_empty(balloon->pbp->bitmap, subpages)) { + g_free(balloon->pbp); + balloon->pbp = NULL; + } + } + + host_addr = (void *)((uintptr_t)addr & ~(rb_page_size - 1)); + + /* When a page is deflated, we hint the whole host page it lives + * on, since we can't do anything smaller */ + ret = qemu_madvise(host_addr, rb_page_size, QEMU_MADV_WILLNEED); + if (ret != 0) { + warn_report("Couldn't MADV_WILLNEED on balloon deflate: %s", + strerror(errno)); + /* Otherwise ignore, failing to page hint shouldn't be fatal */ + } +} + static const char *balloon_stat_names[] = { [VIRTIO_BALLOON_S_SWAP_IN] = "stat-swap-in", [VIRTIO_BALLOON_S_SWAP_OUT] = "stat-swap-out", @@ -315,8 +365,15 @@ static void virtio_balloon_handle_output(VirtIODevice *vdev, VirtQueue *vq) trace_virtio_balloon_handle_output(memory_region_name(section.mr), pa); - if (!qemu_balloon_is_inhibited() && vq != s->dvq) { - balloon_inflate_page(s, section.mr, section.offset_within_region); + if (!qemu_balloon_is_inhibited()) { + if (vq == s->ivq) { + balloon_inflate_page(s, section.mr, + section.offset_within_region); + } else if (vq == s->dvq) { + balloon_deflate_page(s, section.mr, section.offset_within_region); + } else { + g_assert_not_reached(); + } } memory_region_unref(section.mr); } @@ -391,6 +448,7 @@ static bool get_free_page_hints(VirtIOBalloon *dev) VirtQueueElement *elem; VirtIODevice *vdev = VIRTIO_DEVICE(dev); VirtQueue *vq = dev->free_page_vq; + bool ret = true; while (dev->block_iothread) { qemu_cond_wait(&dev->free_page_cond, &dev->free_page_lock); @@ -405,13 +463,12 @@ static bool get_free_page_hints(VirtIOBalloon *dev) uint32_t id; size_t size = iov_to_buf(elem->out_sg, elem->out_num, 0, &id, sizeof(id)); - virtqueue_push(vq, elem, size); - g_free(elem); virtio_tswap32s(vdev, &id); if (unlikely(size != sizeof(id))) { virtio_error(vdev, "received an incorrect cmd id"); - return false; + ret = false; + goto out; } if (id == dev->free_page_report_cmd_id) { dev->free_page_report_status = FREE_PAGE_REPORT_S_START; @@ -431,11 +488,12 @@ static bool get_free_page_hints(VirtIOBalloon *dev) qemu_guest_free_page_hint(elem->in_sg[0].iov_base, elem->in_sg[0].iov_len); } - virtqueue_push(vq, elem, 1); - g_free(elem); } - return true; +out: + virtqueue_push(vq, elem, 1); + g_free(elem); + return ret; } static void virtio_ballloon_get_free_page_hints(void *opaque) diff --git a/hw/watchdog/trace-events b/hw/watchdog/trace-events index fee95847df..ab94d7df50 100644 --- a/hw/watchdog/trace-events +++ b/hw/watchdog/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# hw/char/cmsdk_apb_watchdog.c +# cmsdk-apb-watchdog.c cmsdk_apb_watchdog_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB watchdog read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" cmsdk_apb_watchdog_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB watchdog write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" cmsdk_apb_watchdog_reset(void) "CMSDK APB watchdog: reset" diff --git a/hw/xen/trace-events b/hw/xen/trace-events index f6944624b2..bc82ecb1a5 100644 --- a/hw/xen/trace-events +++ b/hw/xen/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# include/hw/xen/xen_common.h +# ../../include/hw/xen/xen_common.h xen_default_ioreq_server(void) "" xen_ioreq_server_create(uint32_t id) "id: %u" xen_ioreq_server_destroy(uint32_t id) "id: %u" @@ -13,7 +13,7 @@ xen_map_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: xen_unmap_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x" xen_domid_restrict(int err) "err: %u" -# include/hw/xen/xen-bus.c +# xen-bus.c xen_bus_realize(void) "" xen_bus_unrealize(void) "" xen_bus_enumerate(void) "" @@ -31,7 +31,7 @@ xen_device_frontend_state(const char *type, char *name, const char *state) "type xen_device_frontend_changed(const char *type, char *name) "type: %s name: %s" xen_device_unplug(const char *type, char *name) "type: %s name: %s" -# include/hw/xen/xen-bus-helper.c +# xen-bus-helper.c xs_node_create(const char *node) "%s" xs_node_destroy(const char *node) "%s" xs_node_vprintf(char *path, char *value) "%s %s" diff --git a/include/authz/base.h b/include/authz/base.h index 77dcd54c4c..55ac9581ad 100644 --- a/include/authz/base.h +++ b/include/authz/base.h @@ -35,8 +35,8 @@ OBJECT_GET_CLASS(QAuthZClass, (obj), \ TYPE_QAUTHZ) #define QAUTHZ(obj) \ - INTERFACE_CHECK(QAuthZ, (obj), \ - TYPE_QAUTHZ) + OBJECT_CHECK(QAuthZ, (obj), \ + TYPE_QAUTHZ) typedef struct QAuthZ QAuthZ; typedef struct QAuthZClass QAuthZClass; diff --git a/include/authz/list.h b/include/authz/list.h index a7225a747c..138ae7047c 100644 --- a/include/authz/list.h +++ b/include/authz/list.h @@ -33,8 +33,8 @@ OBJECT_GET_CLASS(QAuthZListClass, (obj), \ TYPE_QAUTHZ_LIST) #define QAUTHZ_LIST(obj) \ - INTERFACE_CHECK(QAuthZList, (obj), \ - TYPE_QAUTHZ_LIST) + OBJECT_CHECK(QAuthZList, (obj), \ + TYPE_QAUTHZ_LIST) typedef struct QAuthZList QAuthZList; typedef struct QAuthZListClass QAuthZListClass; diff --git a/include/authz/listfile.h b/include/authz/listfile.h index bcc8d80743..0d618c903c 100644 --- a/include/authz/listfile.h +++ b/include/authz/listfile.h @@ -34,8 +34,8 @@ OBJECT_GET_CLASS(QAuthZListFileClass, (obj), \ TYPE_QAUTHZ_LIST_FILE) #define QAUTHZ_LIST_FILE(obj) \ - INTERFACE_CHECK(QAuthZListFile, (obj), \ - TYPE_QAUTHZ_LIST_FILE) + OBJECT_CHECK(QAuthZListFile, (obj), \ + TYPE_QAUTHZ_LIST_FILE) typedef struct QAuthZListFile QAuthZListFile; typedef struct QAuthZListFileClass QAuthZListFileClass; @@ -92,7 +92,7 @@ struct QAuthZListFile { char *filename; bool refresh; QFileMonitor *file_monitor; - int file_watch; + int64_t file_watch; }; diff --git a/include/authz/pamacct.h b/include/authz/pamacct.h index 6e3046e528..cad5b11d47 100644 --- a/include/authz/pamacct.h +++ b/include/authz/pamacct.h @@ -33,8 +33,8 @@ OBJECT_GET_CLASS(QAuthZPAMClass, (obj), \ TYPE_QAUTHZ_PAM) #define QAUTHZ_PAM(obj) \ - INTERFACE_CHECK(QAuthZPAM, (obj), \ - TYPE_QAUTHZ_PAM) + OBJECT_CHECK(QAuthZPAM, (obj), \ + TYPE_QAUTHZ_PAM) typedef struct QAuthZPAM QAuthZPAM; typedef struct QAuthZPAMClass QAuthZPAMClass; diff --git a/include/authz/simple.h b/include/authz/simple.h index ef13958269..30b932dfeb 100644 --- a/include/authz/simple.h +++ b/include/authz/simple.h @@ -32,8 +32,8 @@ OBJECT_GET_CLASS(QAuthZSimpleClass, (obj), \ TYPE_QAUTHZ_SIMPLE) #define QAUTHZ_SIMPLE(obj) \ - INTERFACE_CHECK(QAuthZSimple, (obj), \ - TYPE_QAUTHZ_SIMPLE) + OBJECT_CHECK(QAuthZSimple, (obj), \ + TYPE_QAUTHZ_SIMPLE) typedef struct QAuthZSimple QAuthZSimple; typedef struct QAuthZSimpleClass QAuthZSimpleClass; diff --git a/include/block/block.h b/include/block/block.h index 6a758a76f8..c7a26199aa 100644 --- a/include/block/block.h +++ b/include/block/block.h @@ -83,8 +83,13 @@ typedef enum { */ BDRV_REQ_SERIALISING = 0x80, + /* Execute the request only if the operation can be offloaded or otherwise + * be executed efficiently, but return an error instead of using a slow + * fallback. */ + BDRV_REQ_NO_FALLBACK = 0x100, + /* Mask of valid flags */ - BDRV_REQ_MASK = 0xff, + BDRV_REQ_MASK = 0x1ff, } BdrvRequestFlags; typedef struct BlockSizes { @@ -187,6 +192,9 @@ typedef struct BDRVReopenState { BlockDriverState *bs; int flags; BlockdevDetectZeroesOptions detect_zeroes; + bool backing_missing; + bool replace_backing_bs; /* new_backing_bs is ignored if this is false */ + BlockDriverState *new_backing_bs; /* If NULL then detach the current bs */ uint64_t perm, shared_perm; QDict *options; QDict *explicit_options; @@ -299,8 +307,9 @@ BlockDriverState *bdrv_open(const char *filename, const char *reference, BlockDriverState *bdrv_new_open_driver(BlockDriver *drv, const char *node_name, int flags, Error **errp); BlockReopenQueue *bdrv_reopen_queue(BlockReopenQueue *bs_queue, - BlockDriverState *bs, QDict *options); -int bdrv_reopen_multiple(AioContext *ctx, BlockReopenQueue *bs_queue, Error **errp); + BlockDriverState *bs, QDict *options, + bool keep_old_opts); +int bdrv_reopen_multiple(BlockReopenQueue *bs_queue, Error **errp); int bdrv_reopen_set_read_only(BlockDriverState *bs, bool read_only, Error **errp); int bdrv_reopen_prepare(BDRVReopenState *reopen_state, @@ -353,6 +362,11 @@ int bdrv_drop_intermediate(BlockDriverState *top, BlockDriverState *base, BlockDriverState *bdrv_find_overlay(BlockDriverState *active, BlockDriverState *bs); BlockDriverState *bdrv_find_base(BlockDriverState *bs); +bool bdrv_is_backing_chain_frozen(BlockDriverState *bs, BlockDriverState *base, + Error **errp); +int bdrv_freeze_backing_chain(BlockDriverState *bs, BlockDriverState *base, + Error **errp); +void bdrv_unfreeze_backing_chain(BlockDriverState *bs, BlockDriverState *base); typedef struct BdrvCheckResult { diff --git a/include/block/block_int.h b/include/block/block_int.h index a23cabaddd..94d45c9708 100644 --- a/include/block/block_int.h +++ b/include/block/block_int.h @@ -383,6 +383,14 @@ struct BlockDriver { /* List of options for creating images, terminated by name == NULL */ QemuOptsList *create_opts; + /* + * If this driver supports reopening images this contains a + * NULL-terminated list of the runtime options that can be + * modified. If an option in this list is unspecified during + * reopen then it _must_ be reset to its default value or return + * an error. + */ + const char *const *mutable_opts; /* * Returns 0 for completed check, -errno for internal errors. @@ -711,6 +719,12 @@ struct BdrvChild { uint64_t backup_perm; uint64_t backup_shared_perm; + /* + * This link is frozen: the child can neither be replaced nor + * detached from the parent. + */ + bool frozen; + QLIST_ENTRY(BdrvChild) next; QLIST_ENTRY(BdrvChild) next_parent; }; @@ -911,6 +925,22 @@ int coroutine_fn bdrv_co_pwritev(BdrvChild *child, int64_t offset, unsigned int bytes, QEMUIOVector *qiov, BdrvRequestFlags flags); +static inline int coroutine_fn bdrv_co_pread(BdrvChild *child, + int64_t offset, unsigned int bytes, void *buf, BdrvRequestFlags flags) +{ + QEMUIOVector qiov = QEMU_IOVEC_INIT_BUF(qiov, buf, bytes); + + return bdrv_co_preadv(child, offset, bytes, &qiov, flags); +} + +static inline int coroutine_fn bdrv_co_pwrite(BdrvChild *child, + int64_t offset, unsigned int bytes, void *buf, BdrvRequestFlags flags) +{ + QEMUIOVector qiov = QEMU_IOVEC_INIT_BUF(qiov, buf, bytes); + + return bdrv_co_pwritev(child, offset, bytes, &qiov, flags); +} + extern unsigned int bdrv_drain_all_count; void bdrv_apply_subtree_drain(BdrvChild *child, BlockDriverState *new_parent); void bdrv_unapply_subtree_drain(BdrvChild *child, BlockDriverState *old_parent); diff --git a/include/block/dirty-bitmap.h b/include/block/dirty-bitmap.h index 04a117fc81..8044ace63e 100644 --- a/include/block/dirty-bitmap.h +++ b/include/block/dirty-bitmap.h @@ -5,6 +5,16 @@ #include "qapi/qapi-types-block-core.h" #include "qemu/hbitmap.h" +typedef enum BitmapCheckFlags { + BDRV_BITMAP_BUSY = 1, + BDRV_BITMAP_RO = 2, + BDRV_BITMAP_INCONSISTENT = 4, +} BitmapCheckFlags; + +#define BDRV_BITMAP_DEFAULT (BDRV_BITMAP_BUSY | BDRV_BITMAP_RO | \ + BDRV_BITMAP_INCONSISTENT) +#define BDRV_BITMAP_ALLOW_RO (BDRV_BITMAP_BUSY | BDRV_BITMAP_INCONSISTENT) + BdrvDirtyBitmap *bdrv_create_dirty_bitmap(BlockDriverState *bs, uint32_t granularity, const char *name, @@ -24,6 +34,8 @@ BdrvDirtyBitmap *bdrv_reclaim_dirty_bitmap(BlockDriverState *bs, void bdrv_dirty_bitmap_enable_successor(BdrvDirtyBitmap *bitmap); BdrvDirtyBitmap *bdrv_find_dirty_bitmap(BlockDriverState *bs, const char *name); +int bdrv_dirty_bitmap_check(const BdrvDirtyBitmap *bitmap, uint32_t flags, + Error **errp); void bdrv_release_dirty_bitmap(BlockDriverState *bs, BdrvDirtyBitmap *bitmap); void bdrv_release_named_dirty_bitmaps(BlockDriverState *bs); void bdrv_remove_persistent_dirty_bitmap(BlockDriverState *bs, @@ -36,7 +48,7 @@ BlockDirtyInfoList *bdrv_query_dirty_bitmaps(BlockDriverState *bs); uint32_t bdrv_get_default_bitmap_granularity(BlockDriverState *bs); uint32_t bdrv_dirty_bitmap_granularity(const BdrvDirtyBitmap *bitmap); bool bdrv_dirty_bitmap_enabled(BdrvDirtyBitmap *bitmap); -bool bdrv_dirty_bitmap_frozen(BdrvDirtyBitmap *bitmap); +bool bdrv_dirty_bitmap_has_successor(BdrvDirtyBitmap *bitmap); const char *bdrv_dirty_bitmap_name(const BdrvDirtyBitmap *bitmap); int64_t bdrv_dirty_bitmap_size(const BdrvDirtyBitmap *bitmap); DirtyBitmapStatus bdrv_dirty_bitmap_status(BdrvDirtyBitmap *bitmap); @@ -66,9 +78,10 @@ void bdrv_dirty_bitmap_deserialize_ones(BdrvDirtyBitmap *bitmap, void bdrv_dirty_bitmap_deserialize_finish(BdrvDirtyBitmap *bitmap); void bdrv_dirty_bitmap_set_readonly(BdrvDirtyBitmap *bitmap, bool value); -void bdrv_dirty_bitmap_set_persistance(BdrvDirtyBitmap *bitmap, +void bdrv_dirty_bitmap_set_persistence(BdrvDirtyBitmap *bitmap, bool persistent); -void bdrv_dirty_bitmap_set_qmp_locked(BdrvDirtyBitmap *bitmap, bool qmp_locked); +void bdrv_dirty_bitmap_set_inconsistent(BdrvDirtyBitmap *bitmap); +void bdrv_dirty_bitmap_set_busy(BdrvDirtyBitmap *bitmap, bool busy); void bdrv_merge_dirty_bitmap(BdrvDirtyBitmap *dest, const BdrvDirtyBitmap *src, HBitmap **backup, Error **errp); void bdrv_dirty_bitmap_set_migration(BdrvDirtyBitmap *bitmap, bool migration); @@ -90,9 +103,8 @@ void bdrv_dirty_bitmap_truncate(BlockDriverState *bs, int64_t bytes); bool bdrv_dirty_bitmap_readonly(const BdrvDirtyBitmap *bitmap); bool bdrv_has_readonly_bitmaps(BlockDriverState *bs); bool bdrv_dirty_bitmap_get_autoload(const BdrvDirtyBitmap *bitmap); -bool bdrv_dirty_bitmap_get_persistance(BdrvDirtyBitmap *bitmap); -bool bdrv_dirty_bitmap_qmp_locked(BdrvDirtyBitmap *bitmap); -bool bdrv_dirty_bitmap_user_locked(BdrvDirtyBitmap *bitmap); +bool bdrv_dirty_bitmap_get_persistence(BdrvDirtyBitmap *bitmap); +bool bdrv_dirty_bitmap_inconsistent(const BdrvDirtyBitmap *bitmap); bool bdrv_has_changed_persistent_bitmaps(BlockDriverState *bs); BdrvDirtyBitmap *bdrv_dirty_bitmap_next(BlockDriverState *bs, BdrvDirtyBitmap *bitmap); diff --git a/include/block/qapi.h b/include/block/qapi.h index 83bdb098bd..cd9410dee3 100644 --- a/include/block/qapi.h +++ b/include/block/qapi.h @@ -37,10 +37,7 @@ void bdrv_query_image_info(BlockDriverState *bs, ImageInfo **p_info, Error **errp); -void bdrv_snapshot_dump(fprintf_function func_fprintf, void *f, - QEMUSnapshotInfo *sn); -void bdrv_image_info_specific_dump(fprintf_function func_fprintf, void *f, - ImageInfoSpecific *info_spec); -void bdrv_image_info_dump(fprintf_function func_fprintf, void *f, - ImageInfo *info); +void bdrv_snapshot_dump(QEMUSnapshotInfo *sn); +void bdrv_image_info_specific_dump(ImageInfoSpecific *info_spec); +void bdrv_image_info_dump(ImageInfo *info); #endif diff --git a/include/block/raw-aio.h b/include/block/raw-aio.h index 6799614e56..ba223dd1f1 100644 --- a/include/block/raw-aio.h +++ b/include/block/raw-aio.h @@ -40,6 +40,7 @@ /* AIO flags */ #define QEMU_AIO_MISALIGNED 0x1000 #define QEMU_AIO_BLKDEV 0x2000 +#define QEMU_AIO_NO_FALLBACK 0x4000 /* linux-aio.c - Linux native implementation */ diff --git a/include/disas/bfd.h b/include/disas/dis-asm.h index 41b61c85f9..9240ec32c2 100644 --- a/include/disas/bfd.h +++ b/include/disas/dis-asm.h @@ -9,8 +9,6 @@ #ifndef DISAS_BFD_H #define DISAS_BFD_H -#include "qemu/fprintf-fn.h" - typedef void *PTR; typedef uint64_t bfd_vma; typedef int64_t bfd_signed_vma; @@ -243,6 +241,9 @@ typedef struct symbol_cache_entry } udata; } asymbol; +typedef int (*fprintf_function)(FILE *f, const char *fmt, ...) + GCC_FMT_ATTR(2, 3); + enum dis_insn_type { dis_noninsn, /* Not a valid instruction */ dis_nonbranch, /* Not a branch instruction */ diff --git a/include/elf.h b/include/elf.h index b35347eee7..ea7708a4ea 100644 --- a/include/elf.h +++ b/include/elf.h @@ -1393,6 +1393,16 @@ typedef struct { #define R_RISCV_SET16 55 #define R_RISCV_SET32 56 +/* RISC-V ELF Flags. */ +#define EF_RISCV_RVC 0x0001 +#define EF_RISCV_FLOAT_ABI 0x0006 +#define EF_RISCV_FLOAT_ABI_SOFT 0x0000 +#define EF_RISCV_FLOAT_ABI_SINGLE 0x0002 +#define EF_RISCV_FLOAT_ABI_DOUBLE 0x0004 +#define EF_RISCV_FLOAT_ABI_QUAD 0x0006 +#define EF_RISCV_RVE 0x0008 +#define EF_RISCV_TSO 0x0010 + typedef struct elf32_rel { Elf32_Addr r_offset; Elf32_Word r_info; diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index b16c9ec513..da07ce311f 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -362,8 +362,8 @@ static inline bool tlb_hit(target_ulong tlb_addr, target_ulong addr) return tlb_hit_page(tlb_addr, addr & TARGET_PAGE_MASK); } -void dump_exec_info(FILE *f, fprintf_function cpu_fprintf); -void dump_opcount_info(FILE *f, fprintf_function cpu_fprintf); +void dump_exec_info(void); +void dump_opcount_info(void); #endif /* !CONFIG_USER_ONLY */ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr, diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index cef8b88a2a..848a4b94ab 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -9,19 +9,6 @@ #include "qemu/bswap.h" #include "qemu/queue.h" -#include "qemu/fprintf-fn.h" - -/** - * CPUListState: - * @cpu_fprintf: Print function. - * @file: File to print to using @cpu_fprint. - * - * State commonly used for iterating over CPU models. - */ -typedef struct CPUListState { - fprintf_function cpu_fprintf; - FILE *file; -} CPUListState; /* The CPU list lock nests outside page_(un)lock or mmap_(un)lock */ void qemu_init_cpu_list(void); diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 97b90cb0db..58e988b3b1 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -40,8 +40,8 @@ typedef ram_addr_t tb_page_addr_t; #include "qemu/log.h" -void gen_intermediate_code(CPUState *cpu, struct TranslationBlock *tb); -void restore_state_to_opc(CPUArchState *env, struct TranslationBlock *tb, +void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns); +void restore_state_to_opc(CPUArchState *env, TranslationBlock *tb, target_ulong *data); void cpu_gen_init(void); diff --git a/include/exec/log.h b/include/exec/log.h index c249307911..de067f173b 100644 --- a/include/exec/log.h +++ b/include/exec/log.h @@ -16,7 +16,7 @@ static inline void log_cpu_state(CPUState *cpu, int flags) { if (qemu_log_enabled()) { - cpu_dump_state(cpu, qemu_logfile, fprintf, flags); + cpu_dump_state(cpu, qemu_logfile, flags); } } diff --git a/include/exec/memory-internal.h b/include/exec/memory-internal.h index bb08fa4d2f..d1a9dd1ec8 100644 --- a/include/exec/memory-internal.h +++ b/include/exec/memory-internal.h @@ -45,8 +45,7 @@ AddressSpaceDispatch *address_space_dispatch_new(FlatView *fv); void address_space_dispatch_compact(AddressSpaceDispatch *d); void address_space_dispatch_free(AddressSpaceDispatch *d); -void mtree_print_dispatch(fprintf_function mon, void *f, - struct AddressSpaceDispatch *d, +void mtree_print_dispatch(struct AddressSpaceDispatch *d, MemoryRegion *root); struct page_collection; diff --git a/include/exec/memory.h b/include/exec/memory.h index 1625913f84..9144a47f57 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -1720,8 +1720,7 @@ void memory_global_dirty_log_start(void); */ void memory_global_dirty_log_stop(void); -void mtree_info(fprintf_function mon_printf, void *f, bool flatview, - bool dispatch_tree, bool owner); +void mtree_info(bool flatview, bool dispatch_tree, bool owner); /** * memory_region_dispatch_read: perform a read directly to the specified diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h index 9ecd911c3e..139ad79390 100644 --- a/include/exec/ram_addr.h +++ b/include/exec/ram_addr.h @@ -73,7 +73,8 @@ static inline unsigned long int ramblock_recv_bitmap_offset(void *host_addr, bool ramblock_is_pmem(RAMBlock *rb); -long qemu_getrampagesize(void); +long qemu_minrampagesize(void); +long qemu_maxrampagesize(void); /** * qemu_ram_alloc_from_file, diff --git a/include/exec/translator.h b/include/exec/translator.h index 71e7b2c347..66dfe906c4 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -123,6 +123,7 @@ typedef struct TranslatorOps { * @db: Disassembly context. * @cpu: Target vCPU. * @tb: Translation block. + * @max_insns: Maximum number of insns to translate. * * Generic translator loop. * @@ -137,7 +138,7 @@ typedef struct TranslatorOps { * - When too many instructions have been translated. */ void translator_loop(const TranslatorOps *ops, DisasContextBase *db, - CPUState *cpu, TranslationBlock *tb); + CPUState *cpu, TranslationBlock *tb, int max_insns); void translator_loop_temp_check(DisasContextBase *db); diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h index 59aeb06393..41568d1837 100644 --- a/include/hw/acpi/ich9.h +++ b/include/hw/acpi/ich9.h @@ -74,6 +74,8 @@ extern const VMStateDescription vmstate_ich9_pm; void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm, Error **errp); +void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, + Error **errp); void ich9_pm_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp); void ich9_pm_device_unplug_request_cb(HotplugHandler *hotplug_dev, diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h index e7fbd340f3..9de867daa4 100644 --- a/include/hw/arm/omap.h +++ b/include/hw/arm/omap.h @@ -20,6 +20,7 @@ #include "exec/memory.h" # define hw_omap_h "omap.h" #include "hw/irq.h" +#include "hw/input/tsc2xxx.h" #include "target/arm/cpu-qom.h" #include "qemu/log.h" @@ -679,11 +680,6 @@ qemu_irq *omap_mpuio_in_get(struct omap_mpuio_s *s); void omap_mpuio_out_set(struct omap_mpuio_s *s, int line, qemu_irq handler); void omap_mpuio_key(struct omap_mpuio_s *s, int row, int col, int down); -struct uWireSlave { - uint16_t (*receive)(void *opaque); - void (*send)(void *opaque, uint16_t data); - void *opaque; -}; struct omap_uwire_s; void omap_uwire_attach(struct omap_uwire_s *s, uWireSlave *slave, int chipselect); diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h index b07cadd0ef..2c7fbf4202 100644 --- a/include/hw/arm/smmu-common.h +++ b/include/hw/arm/smmu-common.h @@ -80,13 +80,9 @@ typedef struct SMMUDevice { AddressSpace as; uint32_t cfg_cache_hits; uint32_t cfg_cache_misses; + QLIST_ENTRY(SMMUDevice) next; } SMMUDevice; -typedef struct SMMUNotifierNode { - SMMUDevice *sdev; - QLIST_ENTRY(SMMUNotifierNode) next; -} SMMUNotifierNode; - typedef struct SMMUPciBus { PCIBus *bus; SMMUDevice *pbdev[0]; /* Parent array is sparse, so dynamically alloc */ @@ -108,7 +104,7 @@ typedef struct SMMUState { GHashTable *iotlb; SMMUPciBus *smmu_pcibus_by_bus_num[SMMU_PCI_BUS_MAX]; PCIBus *pci_bus; - QLIST_HEAD(, SMMUNotifierNode) notifiers_list; + QLIST_HEAD(, SMMUDevice) devices_with_notifiers; uint8_t bus_num; PCIBus *primary_bus; } SMMUState; diff --git a/include/hw/block/block.h b/include/hw/block/block.h index e9f9e2223f..d06f25aa0f 100644 --- a/include/hw/block/block.h +++ b/include/hw/block/block.h @@ -11,7 +11,7 @@ #ifndef HW_BLOCK_H #define HW_BLOCK_H -#include "qemu-common.h" +#include "exec/hwaddr.h" #include "qapi/qapi-types-block-core.h" /* Configuration */ @@ -70,6 +70,11 @@ static inline unsigned int get_physical_block_exp(BlockConf *conf) DEFINE_PROP_BLOCKDEV_ON_ERROR("werror", _state, _conf.werror, \ BLOCKDEV_ON_ERROR_AUTO) +/* Backend access helpers */ + +bool blk_check_size_and_read_all(BlockBackend *blk, void *buf, hwaddr size, + Error **errp); + /* Configuration helpers */ bool blkconf_geometry(BlockConf *conf, int *trans, diff --git a/include/hw/boards.h b/include/hw/boards.h index 9690c71a6d..6f7916f88f 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -57,7 +57,6 @@ void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner, #define MACHINE_CLASS(klass) \ OBJECT_CLASS_CHECK(MachineClass, (klass), TYPE_MACHINE) -MachineClass *find_default_machine(void); extern MachineState *current_machine; void machine_run_board_init(MachineState *machine); @@ -210,6 +209,7 @@ struct MachineClass { int nb_nodes, ram_addr_t size); bool ignore_boot_device_suffixes; bool smbus_no_migration_support; + bool nvdimm_supported; HotplugHandler *(*get_hotplug_handler)(MachineState *machine, DeviceState *dev); @@ -272,6 +272,7 @@ struct MachineState { const char *cpu_type; AccelState *accelerator; CPUArchIdList *possible_cpus; + struct NVDIMMState *nvdimms_state; }; #define DEFINE_MACHINE(namestr, machine_initfn) \ @@ -291,6 +292,9 @@ struct MachineState { } \ type_init(machine_initfn##_register_types) +extern GlobalProperty hw_compat_4_0[]; +extern const size_t hw_compat_4_0_len; + extern GlobalProperty hw_compat_3_1[]; extern const size_t hw_compat_3_1_len; diff --git a/include/hw/devices.h b/include/hw/devices.h deleted file mode 100644 index 1ed5be3296..0000000000 --- a/include/hw/devices.h +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef QEMU_DEVICES_H -#define QEMU_DEVICES_H - -/* Devices that have nowhere better to go. */ - -#include "hw/hw.h" -#include "ui/console.h" - -/* smc91c111.c */ -void smc91c111_init(NICInfo *, uint32_t, qemu_irq); - -/* lan9118.c */ -void lan9118_init(NICInfo *, uint32_t, qemu_irq); - -/* tsc210x.c */ -uWireSlave *tsc2102_init(qemu_irq pint); -uWireSlave *tsc2301_init(qemu_irq penirq, qemu_irq kbirq, qemu_irq dav); -I2SCodec *tsc210x_codec(uWireSlave *chip); -uint32_t tsc210x_txrx(void *opaque, uint32_t value, int len); -void tsc210x_set_transform(uWireSlave *chip, - MouseTransformInfo *info); -void tsc210x_key_event(uWireSlave *chip, int key, int down); - -/* tsc2005.c */ -void *tsc2005_init(qemu_irq pintdav); -uint32_t tsc2005_txrx(void *opaque, uint32_t value, int len); -void tsc2005_set_transform(void *opaque, MouseTransformInfo *info); - -/* stellaris_input.c */ -void stellaris_gamepad_init(int n, qemu_irq *irq, const int *keycode); - -/* blizzard.c */ -void *s1d13745_init(qemu_irq gpio_int); -void s1d13745_write(void *opaque, int dc, uint16_t value); -void s1d13745_write_block(void *opaque, int dc, - void *buf, size_t len, int pitch); -uint16_t s1d13745_read(void *opaque, int dc); - -/* cbus.c */ -typedef struct { - qemu_irq clk; - qemu_irq dat; - qemu_irq sel; -} CBus; -CBus *cbus_init(qemu_irq dat_out); -void cbus_attach(CBus *bus, void *slave_opaque); - -void *retu_init(qemu_irq irq, int vilma); -void *tahvo_init(qemu_irq irq, int betty); - -void retu_key_event(void *retu, int state); - -/* tc6393xb.c */ -typedef struct TC6393xbState TC6393xbState; -TC6393xbState *tc6393xb_init(struct MemoryRegion *sysmem, - uint32_t base, qemu_irq irq); -void tc6393xb_gpio_out_set(TC6393xbState *s, int line, - qemu_irq handler); -qemu_irq *tc6393xb_gpio_in_get(TC6393xbState *s); -qemu_irq tc6393xb_l3v_get(TC6393xbState *s); - -#endif diff --git a/include/hw/display/blizzard.h b/include/hw/display/blizzard.h new file mode 100644 index 0000000000..ef72bbc186 --- /dev/null +++ b/include/hw/display/blizzard.h @@ -0,0 +1,22 @@ +/* + * Epson S1D13744/S1D13745 (Blizzard/Hailstorm/Tornado) LCD/TV controller. + * + * Copyright (C) 2008 Nokia Corporation + * Written by Andrzej Zaborowski + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef HW_DISPLAY_BLIZZARD_H +#define HW_DISPLAY_BLIZZARD_H + +#include "hw/irq.h" + +void *s1d13745_init(qemu_irq gpio_int); +void s1d13745_write(void *opaque, int dc, uint16_t value); +void s1d13745_write_block(void *opaque, int dc, + void *buf, size_t len, int pitch); +uint16_t s1d13745_read(void *opaque, int dc); + +#endif diff --git a/include/hw/display/tc6393xb.h b/include/hw/display/tc6393xb.h new file mode 100644 index 0000000000..5c4da91f80 --- /dev/null +++ b/include/hw/display/tc6393xb.h @@ -0,0 +1,24 @@ +/* + * Toshiba TC6393XB I/O Controller. + * Found in Sharp Zaurus SL-6000 (tosa) or some + * Toshiba e-Series PDAs. + * + * Copyright (c) 2007 Hervé Poussineau + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef HW_DISPLAY_TC6393XB_H +#define HW_DISPLAY_TC6393XB_H + +#include "exec/memory.h" +#include "hw/irq.h" + +typedef struct TC6393xbState TC6393xbState; + +TC6393xbState *tc6393xb_init(struct MemoryRegion *sysmem, + uint32_t base, qemu_irq irq); +qemu_irq tc6393xb_l3v_get(TC6393xbState *s); + +#endif diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index a321cc9691..12f3d266e2 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -66,11 +66,20 @@ typedef struct VTDIOTLBEntry VTDIOTLBEntry; typedef struct VTDBus VTDBus; typedef union VTD_IR_TableEntry VTD_IR_TableEntry; typedef union VTD_IR_MSIAddress VTD_IR_MSIAddress; +typedef struct VTDPASIDDirEntry VTDPASIDDirEntry; +typedef struct VTDPASIDEntry VTDPASIDEntry; /* Context-Entry */ struct VTDContextEntry { - uint64_t lo; - uint64_t hi; + union { + struct { + uint64_t lo; + uint64_t hi; + }; + struct { + uint64_t val[4]; + }; + }; }; struct VTDContextCacheEntry { @@ -81,13 +90,23 @@ struct VTDContextCacheEntry { struct VTDContextEntry context_entry; }; +/* PASID Directory Entry */ +struct VTDPASIDDirEntry { + uint64_t val; +}; + +/* PASID Table Entry */ +struct VTDPASIDEntry { + uint64_t val[8]; +}; + struct VTDAddressSpace { PCIBus *bus; uint8_t devfn; AddressSpace as; IOMMUMemoryRegion iommu; - MemoryRegion root; - MemoryRegion sys_alias; + MemoryRegion root; /* The root container of the device */ + MemoryRegion nodmar; /* The alias of shared nodmar MR */ MemoryRegion iommu_ir; /* Interrupt region: 0xfeeXXXXX */ IntelIOMMUState *iommu_state; VTDContextCacheEntry context_cache_entry; @@ -202,22 +221,27 @@ union VTD_IR_MSIAddress { struct IntelIOMMUState { X86IOMMUState x86_iommu; MemoryRegion csrmem; + MemoryRegion mr_nodmar; + MemoryRegion mr_ir; + MemoryRegion mr_sys_alias; uint8_t csr[DMAR_REG_SIZE]; /* register values */ uint8_t wmask[DMAR_REG_SIZE]; /* R/W bytes */ uint8_t w1cmask[DMAR_REG_SIZE]; /* RW1C(Write 1 to Clear) bytes */ uint8_t womask[DMAR_REG_SIZE]; /* WO (write only - read returns 0) */ uint32_t version; - bool caching_mode; /* RO - is cap CM enabled? */ + bool caching_mode; /* RO - is cap CM enabled? */ + bool scalable_mode; /* RO - is Scalable Mode supported? */ dma_addr_t root; /* Current root table pointer */ - bool root_extended; /* Type of root table (extended or not) */ + bool root_scalable; /* Type of root table (scalable or not) */ bool dmar_enabled; /* Set if DMA remapping is enabled */ uint16_t iq_head; /* Current invalidation queue head */ uint16_t iq_tail; /* Current invalidation queue tail */ dma_addr_t iq; /* Current invalidation queue pointer */ uint16_t iq_size; /* IQ Size in number of entries */ + bool iq_dw; /* IQ descriptor width 256bit or not */ bool qi_enabled; /* Set if the QI is enabled */ uint8_t iq_last_desc_type; /* The type of last completed descriptor */ diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 276ff15d4d..43df7230a2 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -47,8 +47,6 @@ struct PCMachineState { OnOffAuto vmport; OnOffAuto smm; - AcpiNVDIMMState acpi_nvdimm_state; - bool acpi_build_enabled; bool smbus_enabled; bool sata_enabled; @@ -76,8 +74,6 @@ struct PCMachineState { #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" #define PC_MACHINE_VMPORT "vmport" #define PC_MACHINE_SMM "smm" -#define PC_MACHINE_NVDIMM "nvdimm" -#define PC_MACHINE_NVDIMM_PERSIST "nvdimm-persistence" #define PC_MACHINE_SMBUS "smbus" #define PC_MACHINE_SATA "sata" #define PC_MACHINE_PIT "pit" @@ -297,6 +293,9 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t); int e820_get_num_entries(void); bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); +extern GlobalProperty pc_compat_4_0[]; +extern const size_t pc_compat_4_0_len; + extern GlobalProperty pc_compat_3_1[]; extern const size_t pc_compat_3_1_len; diff --git a/include/hw/input/gamepad.h b/include/hw/input/gamepad.h new file mode 100644 index 0000000000..e20211baef --- /dev/null +++ b/include/hw/input/gamepad.h @@ -0,0 +1,19 @@ +/* + * Gamepad style buttons connected to IRQ/GPIO lines + * + * Copyright (c) 2007 CodeSourcery. + * Written by Paul Brook + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef HW_INPUT_GAMEPAD_H +#define HW_INPUT_GAMEPAD_H + +#include "hw/irq.h" + +/* stellaris_input.c */ +void stellaris_gamepad_init(int n, qemu_irq *irq, const int *keycode); + +#endif diff --git a/include/hw/input/tsc2xxx.h b/include/hw/input/tsc2xxx.h new file mode 100644 index 0000000000..dbfe5c55c1 --- /dev/null +++ b/include/hw/input/tsc2xxx.h @@ -0,0 +1,36 @@ +/* + * TI touchscreen controller + * + * Copyright (c) 2006 Andrzej Zaborowski + * Copyright (C) 2008 Nokia Corporation + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef HW_INPUT_TSC2XXX_H +#define HW_INPUT_TSC2XXX_H + +#include "hw/irq.h" +#include "ui/console.h" + +typedef struct uWireSlave { + uint16_t (*receive)(void *opaque); + void (*send)(void *opaque, uint16_t data); + void *opaque; +} uWireSlave; + +/* tsc210x.c */ +uWireSlave *tsc2102_init(qemu_irq pint); +uWireSlave *tsc2301_init(qemu_irq penirq, qemu_irq kbirq, qemu_irq dav); +I2SCodec *tsc210x_codec(uWireSlave *chip); +uint32_t tsc210x_txrx(void *opaque, uint32_t value, int len); +void tsc210x_set_transform(uWireSlave *chip, MouseTransformInfo *info); +void tsc210x_key_event(uWireSlave *chip, int key, int down); + +/* tsc2005.c */ +void *tsc2005_init(qemu_irq pintdav); +uint32_t tsc2005_txrx(void *opaque, uint32_t value, int len); +void tsc2005_set_transform(void *opaque, MouseTransformInfo *info); + +#endif diff --git a/include/hw/intc/bcm2836_control.h b/include/hw/intc/bcm2836_control.h index 613f3c4186..de061b8929 100644 --- a/include/hw/intc/bcm2836_control.h +++ b/include/hw/intc/bcm2836_control.h @@ -5,6 +5,9 @@ * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft * Written by Andrew Baumann * + * ARM Local Timer IRQ Copyright (c) 2019. Zoltán Baldaszti + * Added basic IRQ_TIMER interrupt support + * * This code is licensed under the GNU GPLv2 and later. */ @@ -12,6 +15,7 @@ #define BCM2836_CONTROL_H #include "hw/sysbus.h" +#include "qemu/timer.h" /* 4 mailboxes per core, for 16 total */ #define BCM2836_NCORES 4 @@ -39,6 +43,11 @@ typedef struct BCM2836ControlState { bool gpu_irq, gpu_fiq; uint8_t timerirqs[BCM2836_NCORES]; + /* local timer */ + QEMUTimer timer; + uint32_t local_timer_control; + uint8_t route_localtimer; + /* interrupt source registers, post-routing (also input-derived; visible) */ uint32_t irqsrc[BCM2836_NCORES]; uint32_t fiqsrc[BCM2836_NCORES]; diff --git a/include/hw/mem/nvdimm.h b/include/hw/mem/nvdimm.h index c5c9b3c7f8..523a9b3d4a 100644 --- a/include/hw/mem/nvdimm.h +++ b/include/hw/mem/nvdimm.h @@ -123,7 +123,7 @@ struct NvdimmFitBuffer { }; typedef struct NvdimmFitBuffer NvdimmFitBuffer; -struct AcpiNVDIMMState { +struct NVDIMMState { /* detect if NVDIMM support is enabled. */ bool is_enabled; @@ -141,13 +141,13 @@ struct AcpiNVDIMMState { int32_t persistence; char *persistence_string; }; -typedef struct AcpiNVDIMMState AcpiNVDIMMState; +typedef struct NVDIMMState NVDIMMState; -void nvdimm_init_acpi_state(AcpiNVDIMMState *state, MemoryRegion *io, +void nvdimm_init_acpi_state(NVDIMMState *state, MemoryRegion *io, FWCfgState *fw_cfg, Object *owner); void nvdimm_build_acpi(GArray *table_offsets, GArray *table_data, - BIOSLinker *linker, AcpiNVDIMMState *state, + BIOSLinker *linker, NVDIMMState *state, uint32_t ram_slots); -void nvdimm_plug(AcpiNVDIMMState *state); +void nvdimm_plug(NVDIMMState *state); void nvdimm_acpi_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev); #endif diff --git a/include/hw/misc/cbus.h b/include/hw/misc/cbus.h new file mode 100644 index 0000000000..c899943e03 --- /dev/null +++ b/include/hw/misc/cbus.h @@ -0,0 +1,32 @@ +/* + * CBUS three-pin bus and the Retu / Betty / Tahvo / Vilma / Avilma / + * Hinku / Vinku / Ahne / Pihi chips used in various Nokia platforms. + * Based on reverse-engineering of a linux driver. + * + * Copyright (C) 2008 Nokia Corporation + * Written by Andrzej Zaborowski + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef HW_MISC_CBUS_H +#define HW_MISC_CBUS_H + +#include "hw/irq.h" + +typedef struct { + qemu_irq clk; + qemu_irq dat; + qemu_irq sel; +} CBus; + +CBus *cbus_init(qemu_irq dat_out); +void cbus_attach(CBus *bus, void *slave_opaque); + +void *retu_init(qemu_irq irq, int vilma); +void *tahvo_init(qemu_irq irq, int betty); + +void retu_key_event(void *retu, int state); + +#endif diff --git a/include/hw/net/lan9118.h b/include/hw/net/lan9118.h new file mode 100644 index 0000000000..500acb4c14 --- /dev/null +++ b/include/hw/net/lan9118.h @@ -0,0 +1,21 @@ +/* + * SMSC LAN9118 Ethernet interface emulation + * + * Copyright (c) 2009 CodeSourcery, LLC. + * Written by Paul Brook + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef HW_NET_LAN9118_H +#define HW_NET_LAN9118_H + +#include "hw/irq.h" +#include "net/net.h" + +#define TYPE_LAN9118 "lan9118" + +void lan9118_init(NICInfo *, uint32_t, qemu_irq); + +#endif diff --git a/include/hw/net/ne2000-isa.h b/include/hw/net/ne2000-isa.h index ff2bed9c95..527337c454 100644 --- a/include/hw/net/ne2000-isa.h +++ b/include/hw/net/ne2000-isa.h @@ -6,6 +6,10 @@ * This work is licensed under the terms of the GNU GPL, version 2 or later. * See the COPYING file in the top-level directory. */ + +#ifndef HW_NET_NE2K_ISA_H +#define HW_NET_NE2K_ISA_H + #include "hw/hw.h" #include "hw/qdev.h" #include "hw/isa/isa.h" @@ -31,3 +35,5 @@ static inline ISADevice *isa_ne2000_init(ISABus *bus, int base, int irq, } return d; } + +#endif diff --git a/include/hw/net/smc91c111.h b/include/hw/net/smc91c111.h new file mode 100644 index 0000000000..a66ba4112f --- /dev/null +++ b/include/hw/net/smc91c111.h @@ -0,0 +1,19 @@ +/* + * SMSC 91C111 Ethernet interface emulation + * + * Copyright (c) 2005 CodeSourcery, LLC. + * Written by Paul Brook + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef HW_NET_SMC91C111_H +#define HW_NET_SMC91C111_H + +#include "hw/irq.h" +#include "net/net.h" + +void smc91c111_init(NICInfo *, uint32_t, qemu_irq); + +#endif diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h index b4aad26798..53519c835e 100644 --- a/include/hw/pci-host/spapr.h +++ b/include/hw/pci-host/spapr.h @@ -87,6 +87,9 @@ struct SpaprPhbState { uint32_t mig_liobn; hwaddr mig_mem_win_addr, mig_mem_win_size; hwaddr mig_io_win_addr, mig_io_win_size; + hwaddr nv2_gpa_win_addr; + hwaddr nv2_atsd_win_addr; + struct spapr_phb_pci_nvgpu_config *nvgpus; }; #define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL @@ -105,6 +108,22 @@ struct SpaprPhbState { #define SPAPR_PCI_MSI_WINDOW 0x40000000000ULL +#define SPAPR_PCI_NV2RAM64_WIN_BASE SPAPR_PCI_LIMIT +#define SPAPR_PCI_NV2RAM64_WIN_SIZE (2 * TiB) /* For up to 6 GPUs 256GB each */ + +/* Max number of these GPUsper a physical box */ +#define NVGPU_MAX_NUM 6 +/* Max number of NVLinks per GPU in any physical box */ +#define NVGPU_MAX_LINKS 3 + +/* + * GPU RAM starts at 64TiB so huge DMA window to cover it all ends at 128TiB + * which is enough. We do not need DMA for ATSD so we put them at 128TiB. + */ +#define SPAPR_PCI_NV2ATSD_WIN_BASE (128 * TiB) +#define SPAPR_PCI_NV2ATSD_WIN_SIZE (NVGPU_MAX_NUM * NVGPU_MAX_LINKS * \ + 64 * KiB) + static inline qemu_irq spapr_phb_lsi_qirq(struct SpaprPhbState *phb, int pin) { SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); @@ -135,6 +154,13 @@ int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state); int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option); int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb); void spapr_phb_vfio_reset(DeviceState *qdev); +void spapr_phb_nvgpu_setup(SpaprPhbState *sphb, Error **errp); +void spapr_phb_nvgpu_free(SpaprPhbState *sphb); +void spapr_phb_nvgpu_populate_dt(SpaprPhbState *sphb, void *fdt, int bus_off, + Error **errp); +void spapr_phb_nvgpu_ram_populate_dt(SpaprPhbState *sphb, void *fdt); +void spapr_phb_nvgpu_populate_pcidev_dt(PCIDevice *dev, void *fdt, int offset, + SpaprPhbState *sphb); #else static inline bool spapr_phb_eeh_available(SpaprPhbState *sphb) { @@ -161,6 +187,25 @@ static inline int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb) static inline void spapr_phb_vfio_reset(DeviceState *qdev) { } +static inline void spapr_phb_nvgpu_setup(SpaprPhbState *sphb, Error **errp) +{ +} +static inline void spapr_phb_nvgpu_free(SpaprPhbState *sphb) +{ +} +static inline void spapr_phb_nvgpu_populate_dt(SpaprPhbState *sphb, void *fdt, + int bus_off, Error **errp) +{ +} +static inline void spapr_phb_nvgpu_ram_populate_dt(SpaprPhbState *sphb, + void *fdt) +{ +} +static inline void spapr_phb_nvgpu_populate_pcidev_dt(PCIDevice *dev, void *fdt, + int offset, + SpaprPhbState *sphb) +{ +} #endif void spapr_phb_dma_reset(SpaprPhbState *sphb); diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index d87f5f93e9..fdd4c43d3a 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -396,6 +396,8 @@ typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin); bool pci_bus_is_express(PCIBus *bus); bool pci_bus_is_root(PCIBus *bus); +bool pci_bus_allows_extended_config_space(PCIBus *bus); + void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent, const char *name, MemoryRegion *address_space_mem, @@ -411,6 +413,10 @@ void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, void pci_bus_irqs_cleanup(PCIBus *bus); int pci_bus_get_irq_level(PCIBus *bus, int irq_num); /* 0 <= pin <= 3 0 = INTA, 1 = INTB, 2 = INTC, 3 = INTD */ +static inline int pci_swizzle(int slot, int pin) +{ + return (slot + pin) % PCI_NUM_PINS; +} int pci_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin); PCIBus *pci_register_root_bus(DeviceState *parent, const char *name, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h index dfb75752cb..f6df834170 100644 --- a/include/hw/pci/pci_bus.h +++ b/include/hw/pci/pci_bus.h @@ -18,6 +18,7 @@ typedef struct PCIBusClass { bool (*is_root)(PCIBus *bus); int (*bus_num)(PCIBus *bus); uint16_t (*numa_node)(PCIBus *bus); + bool (*allows_extended_config_space)(PCIBus *bus); } PCIBusClass; struct PCIBus { diff --git a/include/hw/pci/pcie.h b/include/hw/pci/pcie.h index 5b82a0d244..e30334d74d 100644 --- a/include/hw/pci/pcie.h +++ b/include/hw/pci/pcie.h @@ -79,6 +79,9 @@ struct PCIExpressDevice { /* Offset of ATS capability in config space */ uint16_t ats_cap; + + /* ACS */ + uint16_t acs_cap; }; #define COMPAT_PROP_PCP "power_controller_present" @@ -128,6 +131,9 @@ void pcie_add_capability(PCIDevice *dev, uint16_t offset, uint16_t size); void pcie_sync_bridge_lnk(PCIDevice *dev); +void pcie_acs_init(PCIDevice *dev, uint16_t offset); +void pcie_acs_reset(PCIDevice *dev); + void pcie_ari_init(PCIDevice *dev, uint16_t offset, uint16_t nextfn); void pcie_dev_ser_num_init(PCIDevice *dev, uint16_t offset, uint64_t ser_num); void pcie_ats_init(PCIDevice *dev, uint16_t offset); diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h index df242a0caf..09586f4641 100644 --- a/include/hw/pci/pcie_port.h +++ b/include/hw/pci/pcie_port.h @@ -78,6 +78,7 @@ typedef struct PCIERootPortClass { int exp_offset; int aer_offset; int ssvid_offset; + int acs_offset; /* If nonzero, optional ACS capability offset */ int ssid; } PCIERootPortClass; diff --git a/include/hw/pci/pcie_regs.h b/include/hw/pci/pcie_regs.h index ad4e7808b8..1db86b0ec4 100644 --- a/include/hw/pci/pcie_regs.h +++ b/include/hw/pci/pcie_regs.h @@ -175,4 +175,8 @@ typedef enum PCIExpLinkWidth { PCI_ERR_COR_INTERNAL | \ PCI_ERR_COR_HL_OVERFLOW) +/* ACS */ +#define PCI_ACS_VER 0x1 +#define PCI_ACS_SIZEOF 8 + #endif /* QEMU_PCIE_REGS_H */ diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 2b4c05a2ec..7e32f309c2 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -118,11 +118,13 @@ struct SpaprMachineClass { bool use_ohci_by_default; /* use USB-OHCI instead of XHCI */ bool pre_2_10_has_unused_icps; bool legacy_irq_allocation; + bool broken_host_serial_model; /* present real host info to the guest */ void (*phb_placement)(SpaprMachineState *spapr, uint32_t index, uint64_t *buid, hwaddr *pio, hwaddr *mmio32, hwaddr *mmio64, - unsigned n_dma, uint32_t *liobns, Error **errp); + unsigned n_dma, uint32_t *liobns, hwaddr *nv2gpa, + hwaddr *nv2atsd, Error **errp); SpaprResizeHpt resize_hpt_default; SpaprCapabilities default_caps; SpaprIrq *irq; @@ -198,6 +200,8 @@ struct SpaprMachineState { bool cmd_line_caps[SPAPR_CAP_NUM]; SpaprCapabilities def, eff, mig; + + unsigned gpu_numa_id; }; #define H_SUCCESS 0 @@ -671,6 +675,10 @@ typedef void (*spapr_rtas_fn)(PowerPCCPU *cpu, SpaprMachineState *sm, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets); void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn); +static inline void spapr_rtas_unregister(int token) +{ + spapr_rtas_register(token, NULL, NULL); +} target_ulong spapr_rtas_call(PowerPCCPU *cpu, SpaprMachineState *sm, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets); @@ -776,6 +784,8 @@ void spapr_reallocate_hpt(SpaprMachineState *spapr, int shift, Error **errp); void spapr_clear_pending_events(SpaprMachineState *spapr); int spapr_max_server_number(SpaprMachineState *spapr); +void spapr_store_hpte(PowerPCCPU *cpu, hwaddr ptex, + uint64_t pte0, uint64_t pte1); /* DRC callbacks. */ void spapr_core_release(DeviceState *dev); diff --git a/include/hw/rdma/rdma.h b/include/hw/rdma/rdma.h new file mode 100644 index 0000000000..68290fb58c --- /dev/null +++ b/include/hw/rdma/rdma.h @@ -0,0 +1,40 @@ +/* + * RDMA device interface + * + * Copyright (C) 2019 Oracle + * Copyright (C) 2019 Red Hat Inc + * + * Authors: + * Yuval Shaia <yuval.shaia@oracle.com> + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + * + */ + +#ifndef RDMA_H +#define RDMA_H + +#include "qom/object.h" + +#define INTERFACE_RDMA_PROVIDER "rdma" + +#define INTERFACE_RDMA_PROVIDER_CLASS(klass) \ + OBJECT_CLASS_CHECK(RdmaProviderClass, (klass), \ + INTERFACE_RDMA_PROVIDER) +#define RDMA_PROVIDER_GET_CLASS(obj) \ + OBJECT_GET_CLASS(RdmaProviderClass, (obj), \ + INTERFACE_RDMA_PROVIDER) +#define RDMA_PROVIDER(obj) \ + INTERFACE_CHECK(RdmaProvider, (obj), \ + INTERFACE_RDMA_PROVIDER) + +typedef struct RdmaProvider RdmaProvider; + +typedef struct RdmaProviderClass { + InterfaceClass parent; + + void (*print_statistics)(Monitor *mon, RdmaProvider *obj); +} RdmaProviderClass; + +#endif diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h index 7b6d8aed96..f715f8606f 100644 --- a/include/hw/riscv/sifive_e.h +++ b/include/hw/riscv/sifive_e.h @@ -70,7 +70,7 @@ enum { #define SIFIVE_E_PLIC_HART_CONFIG "M" #define SIFIVE_E_PLIC_NUM_SOURCES 127 #define SIFIVE_E_PLIC_NUM_PRIORITIES 7 -#define SIFIVE_E_PLIC_PRIORITY_BASE 0x0 +#define SIFIVE_E_PLIC_PRIORITY_BASE 0x04 #define SIFIVE_E_PLIC_PENDING_BASE 0x1000 #define SIFIVE_E_PLIC_ENABLE_BASE 0x2000 #define SIFIVE_E_PLIC_ENABLE_STRIDE 0x80 diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h index be13cc1304..892f0eee21 100644 --- a/include/hw/riscv/sifive_u.h +++ b/include/hw/riscv/sifive_u.h @@ -68,9 +68,9 @@ enum { }; #define SIFIVE_U_PLIC_HART_CONFIG "MS" -#define SIFIVE_U_PLIC_NUM_SOURCES 127 +#define SIFIVE_U_PLIC_NUM_SOURCES 54 #define SIFIVE_U_PLIC_NUM_PRIORITIES 7 -#define SIFIVE_U_PLIC_PRIORITY_BASE 0x0 +#define SIFIVE_U_PLIC_PRIORITY_BASE 0x04 #define SIFIVE_U_PLIC_PENDING_BASE 0x1000 #define SIFIVE_U_PLIC_ENABLE_BASE 0x2000 #define SIFIVE_U_PLIC_ENABLE_STRIDE 0x80 diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index f12deaebd6..568764b570 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -59,7 +59,7 @@ enum { #define VIRT_PLIC_HART_CONFIG "MS" #define VIRT_PLIC_NUM_SOURCES 127 #define VIRT_PLIC_NUM_PRIORITIES 7 -#define VIRT_PLIC_PRIORITY_BASE 0x0 +#define VIRT_PLIC_PRIORITY_BASE 0x04 #define VIRT_PLIC_PENDING_BASE 0x1000 #define VIRT_PLIC_ENABLE_BASE 0x2000 #define VIRT_PLIC_ENABLE_STRIDE 0x80 diff --git a/include/hw/s390x/s390-ccw.h b/include/hw/s390x/s390-ccw.h index 7d15a1a5d4..901d805d79 100644 --- a/include/hw/s390x/s390-ccw.h +++ b/include/hw/s390x/s390-ccw.h @@ -27,6 +27,7 @@ typedef struct S390CCWDevice { CcwDevice parent_obj; CssDevId hostid; char *mdevid; + int32_t bootindex; } S390CCWDevice; typedef struct S390CCWDeviceClass { diff --git a/include/hw/s390x/vfio-ccw.h b/include/hw/s390x/vfio-ccw.h new file mode 100644 index 0000000000..ee5250d0d7 --- /dev/null +++ b/include/hw/s390x/vfio-ccw.h @@ -0,0 +1,28 @@ +/* + * vfio based subchannel assignment support + * + * Copyright 2017, 2019 IBM Corp. + * Author(s): Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> + * Xiao Feng Ren <renxiaof@linux.vnet.ibm.com> + * Pierre Morel <pmorel@linux.vnet.ibm.com> + * + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. + */ + +#ifndef HW_VFIO_CCW_H +#define HW_VFIO_CCW_H + +#include "hw/vfio/vfio-common.h" +#include "hw/s390x/s390-ccw.h" +#include "hw/s390x/ccw-device.h" + +#define TYPE_VFIO_CCW "vfio-ccw" +#define VFIO_CCW(obj) \ + OBJECT_CHECK(VFIOCCWDevice, (obj), TYPE_VFIO_CCW) + +#define TYPE_VFIO_CCW "vfio-ccw" +typedef struct VFIOCCWDevice VFIOCCWDevice; + +#endif diff --git a/include/hw/virtio/vhost-backend.h b/include/hw/virtio/vhost-backend.h index 81283ec50f..d6632a18e6 100644 --- a/include/hw/virtio/vhost-backend.h +++ b/include/hw/virtio/vhost-backend.h @@ -25,6 +25,7 @@ typedef enum VhostSetConfigType { VHOST_SET_CONFIG_TYPE_MIGRATION = 1, } VhostSetConfigType; +struct vhost_inflight; struct vhost_dev; struct vhost_log; struct vhost_memory; @@ -104,6 +105,13 @@ typedef int (*vhost_crypto_close_session_op)(struct vhost_dev *dev, typedef bool (*vhost_backend_mem_section_filter_op)(struct vhost_dev *dev, MemoryRegionSection *section); +typedef int (*vhost_get_inflight_fd_op)(struct vhost_dev *dev, + uint16_t queue_size, + struct vhost_inflight *inflight); + +typedef int (*vhost_set_inflight_fd_op)(struct vhost_dev *dev, + struct vhost_inflight *inflight); + typedef struct VhostOps { VhostBackendType backend_type; vhost_backend_init vhost_backend_init; @@ -142,6 +150,8 @@ typedef struct VhostOps { vhost_crypto_create_session_op vhost_crypto_create_session; vhost_crypto_close_session_op vhost_crypto_close_session; vhost_backend_mem_section_filter_op vhost_backend_mem_section_filter; + vhost_get_inflight_fd_op vhost_get_inflight_fd; + vhost_set_inflight_fd_op vhost_set_inflight_fd; } VhostOps; extern const VhostOps user_ops; diff --git a/include/hw/virtio/vhost-user-blk.h b/include/hw/virtio/vhost-user-blk.h index d52944aeeb..68634bee61 100644 --- a/include/hw/virtio/vhost-user-blk.h +++ b/include/hw/virtio/vhost-user-blk.h @@ -36,7 +36,8 @@ typedef struct VHostUserBlk { uint32_t queue_size; uint32_t config_wce; struct vhost_dev dev; - VhostUserState *vhost_user; + struct vhost_inflight *inflight; + VhostUserState vhost_user; } VHostUserBlk; #endif diff --git a/include/hw/virtio/vhost-user-scsi.h b/include/hw/virtio/vhost-user-scsi.h index e429cacd8e..738f9288bd 100644 --- a/include/hw/virtio/vhost-user-scsi.h +++ b/include/hw/virtio/vhost-user-scsi.h @@ -30,7 +30,7 @@ typedef struct VHostUserSCSI { VHostSCSICommon parent_obj; - VhostUserState *vhost_user; + VhostUserState vhost_user; } VHostUserSCSI; #endif /* VHOST_USER_SCSI_H */ diff --git a/include/hw/virtio/vhost-user.h b/include/hw/virtio/vhost-user.h index fd660393a0..811e325f42 100644 --- a/include/hw/virtio/vhost-user.h +++ b/include/hw/virtio/vhost-user.h @@ -22,7 +22,7 @@ typedef struct VhostUserState { VhostUserHostNotifier notifier[VIRTIO_QUEUE_MAX]; } VhostUserState; -VhostUserState *vhost_user_init(void); +bool vhost_user_init(VhostUserState *user, CharBackend *chr, Error **errp); void vhost_user_cleanup(VhostUserState *user); #endif diff --git a/include/hw/virtio/vhost.h b/include/hw/virtio/vhost.h index a7f449fa87..619498c8f4 100644 --- a/include/hw/virtio/vhost.h +++ b/include/hw/virtio/vhost.h @@ -7,6 +7,15 @@ #include "exec/memory.h" /* Generic structures common for any vhost based device. */ + +struct vhost_inflight { + int fd; + void *addr; + uint64_t size; + uint64_t offset; + uint16_t queue_size; +}; + struct vhost_virtqueue { int kick; int call; @@ -120,4 +129,13 @@ int vhost_dev_set_config(struct vhost_dev *dev, const uint8_t *data, */ void vhost_dev_set_config_notifier(struct vhost_dev *dev, const VhostDevConfigOps *ops); + +void vhost_dev_reset_inflight(struct vhost_inflight *inflight); +void vhost_dev_free_inflight(struct vhost_inflight *inflight); +void vhost_dev_save_inflight(struct vhost_inflight *inflight, QEMUFile *f); +int vhost_dev_load_inflight(struct vhost_inflight *inflight, QEMUFile *f); +int vhost_dev_set_inflight(struct vhost_dev *dev, + struct vhost_inflight *inflight); +int vhost_dev_get_inflight(struct vhost_dev *dev, uint16_t queue_size, + struct vhost_inflight *inflight); #endif diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index ce0ca72171..60425c5d58 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -113,6 +113,7 @@ typedef struct VirtIOGPU { bool use_virgl_renderer; bool renderer_inited; int renderer_blocked; + bool renderer_reset; QEMUTimer *fence_poll; QEMUTimer *print_stats; diff --git a/include/monitor/monitor.h b/include/monitor/monitor.h index c1b40a9cac..86656297f1 100644 --- a/include/monitor/monitor.h +++ b/include/monitor/monitor.h @@ -28,10 +28,9 @@ void monitor_resume(Monitor *mon); int monitor_get_fd(Monitor *mon, const char *fdname, Error **errp); int monitor_fd_param(Monitor *mon, const char *fdname, Error **errp); -void monitor_vprintf(Monitor *mon, const char *fmt, va_list ap) +int monitor_vprintf(Monitor *mon, const char *fmt, va_list ap) GCC_FMT_ATTR(2, 0); -void monitor_printf(Monitor *mon, const char *fmt, ...) GCC_FMT_ATTR(2, 3); -int monitor_fprintf(FILE *stream, const char *fmt, ...) GCC_FMT_ATTR(2, 3); +int monitor_printf(Monitor *mon, const char *fmt, ...) GCC_FMT_ATTR(2, 3); void monitor_flush(Monitor *mon); int monitor_set_cpu(int cpu_index); int monitor_get_cpu_index(void); @@ -48,7 +47,4 @@ int monitor_fdset_dup_fd_add(int64_t fdset_id, int dup_fd); void monitor_fdset_dup_fd_remove(int dup_fd); int monitor_fdset_dup_fd_find(int dup_fd); -void monitor_vfprintf(FILE *stream, - const char *fmt, va_list ap) GCC_FMT_ATTR(2, 0); - #endif /* MONITOR_H */ diff --git a/include/qemu-common.h b/include/qemu-common.h index a102245519..f891e05e7e 100644 --- a/include/qemu-common.h +++ b/include/qemu-common.h @@ -12,8 +12,6 @@ #ifndef QEMU_COMMON_H #define QEMU_COMMON_H -#include "qemu/fprintf-fn.h" - #define TFR(expr) do { if ((expr) != -1) break; } while (errno == EINTR) /* Copyright string for -version arguments, About dialogs, etc */ diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h index 5a70f78c0b..2a9f3fe783 100644 --- a/include/qemu/bswap.h +++ b/include/qemu/bswap.h @@ -316,51 +316,57 @@ static inline void stb_p(void *ptr, uint8_t v) *(uint8_t *)ptr = v; } -/* Any compiler worth its salt will turn these memcpy into native unaligned - operations. Thus we don't need to play games with packed attributes, or - inline byte-by-byte stores. */ +/* + * Any compiler worth its salt will turn these memcpy into native unaligned + * operations. Thus we don't need to play games with packed attributes, or + * inline byte-by-byte stores. + * Some compilation environments (eg some fortify-source implementations) + * may intercept memcpy() in a way that defeats the compiler optimization, + * though, so we use __builtin_memcpy() to give ourselves the best chance + * of good performance. + */ static inline int lduw_he_p(const void *ptr) { uint16_t r; - memcpy(&r, ptr, sizeof(r)); + __builtin_memcpy(&r, ptr, sizeof(r)); return r; } static inline int ldsw_he_p(const void *ptr) { int16_t r; - memcpy(&r, ptr, sizeof(r)); + __builtin_memcpy(&r, ptr, sizeof(r)); return r; } static inline void stw_he_p(void *ptr, uint16_t v) { - memcpy(ptr, &v, sizeof(v)); + __builtin_memcpy(ptr, &v, sizeof(v)); } static inline int ldl_he_p(const void *ptr) { int32_t r; - memcpy(&r, ptr, sizeof(r)); + __builtin_memcpy(&r, ptr, sizeof(r)); return r; } static inline void stl_he_p(void *ptr, uint32_t v) { - memcpy(ptr, &v, sizeof(v)); + __builtin_memcpy(ptr, &v, sizeof(v)); } static inline uint64_t ldq_he_p(const void *ptr) { uint64_t r; - memcpy(&r, ptr, sizeof(r)); + __builtin_memcpy(&r, ptr, sizeof(r)); return r; } static inline void stq_he_p(void *ptr, uint64_t v) { - memcpy(ptr, &v, sizeof(v)); + __builtin_memcpy(ptr, &v, sizeof(v)); } static inline int lduw_le_p(const void *ptr) diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h index d2dad3057c..12301340a4 100644 --- a/include/qemu/cutils.h +++ b/include/qemu/cutils.h @@ -1,8 +1,6 @@ #ifndef QEMU_CUTILS_H #define QEMU_CUTILS_H -#include "qemu/fprintf-fn.h" - /** * pstrcpy: * @buf: buffer to copy string into diff --git a/include/qemu/error-report.h b/include/qemu/error-report.h index 0a8d9cc9ea..00d069b20f 100644 --- a/include/qemu/error-report.h +++ b/include/qemu/error-report.h @@ -30,11 +30,10 @@ void loc_set_none(void); void loc_set_cmdline(char **argv, int idx, int cnt); void loc_set_file(const char *fname, int lno); -void error_vprintf(const char *fmt, va_list ap) GCC_FMT_ATTR(1, 0); -void error_printf(const char *fmt, ...) GCC_FMT_ATTR(1, 2); -void error_vprintf_unless_qmp(const char *fmt, va_list ap) GCC_FMT_ATTR(1, 0); -void error_printf_unless_qmp(const char *fmt, ...) GCC_FMT_ATTR(1, 2); -void error_set_progname(const char *argv0); +int error_vprintf(const char *fmt, va_list ap) GCC_FMT_ATTR(1, 0); +int error_printf(const char *fmt, ...) GCC_FMT_ATTR(1, 2); +int error_vprintf_unless_qmp(const char *fmt, va_list ap) GCC_FMT_ATTR(1, 0); +int error_printf_unless_qmp(const char *fmt, ...) GCC_FMT_ATTR(1, 2); void error_vreport(const char *fmt, va_list ap) GCC_FMT_ATTR(1, 0); void warn_vreport(const char *fmt, va_list ap) GCC_FMT_ATTR(1, 0); @@ -49,6 +48,8 @@ bool error_report_once_cond(bool *printed, const char *fmt, ...) bool warn_report_once_cond(bool *printed, const char *fmt, ...) GCC_FMT_ATTR(2, 3); +void error_init(const char *argv0); + /* * Similar to error_report(), except it prints the message just once. * Return true when it prints, false otherwise. diff --git a/include/qemu/filemonitor.h b/include/qemu/filemonitor.h index cd031832ed..64267d09b2 100644 --- a/include/qemu/filemonitor.h +++ b/include/qemu/filemonitor.h @@ -52,7 +52,7 @@ typedef enum { * empty. * */ -typedef void (*QFileMonitorHandler)(int id, +typedef void (*QFileMonitorHandler)(int64_t id, QFileMonitorEvent event, const char *filename, void *opaque); @@ -103,12 +103,12 @@ void qemu_file_monitor_free(QFileMonitor *mon); * * Returns: a positive integer watch ID, or -1 on error */ -int qemu_file_monitor_add_watch(QFileMonitor *mon, - const char *dirpath, - const char *filename, - QFileMonitorHandler cb, - void *opaque, - Error **errp); +int64_t qemu_file_monitor_add_watch(QFileMonitor *mon, + const char *dirpath, + const char *filename, + QFileMonitorHandler cb, + void *opaque, + Error **errp); /** * qemu_file_monitor_remove_watch: @@ -123,6 +123,6 @@ int qemu_file_monitor_add_watch(QFileMonitor *mon, */ void qemu_file_monitor_remove_watch(QFileMonitor *mon, const char *dirpath, - int id); + int64_t id); #endif /* QEMU_FILE_MONITOR_H */ diff --git a/include/qemu/fprintf-fn.h b/include/qemu/fprintf-fn.h deleted file mode 100644 index 9068a960b3..0000000000 --- a/include/qemu/fprintf-fn.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Typedef for fprintf-alike function pointers. - * - * This work is licensed under the terms of the GNU GPL, version 2 or later. - * See the COPYING file in the top-level directory. - */ - -#ifndef QEMU_FPRINTF_FN_H -#define QEMU_FPRINTF_FN_H - -typedef int (*fprintf_function)(FILE *f, const char *fmt, ...) - GCC_FMT_ATTR(2, 3); - -#endif diff --git a/include/qemu/mmap-alloc.h b/include/qemu/mmap-alloc.h index ef04f0ed5b..eec98d82c1 100644 --- a/include/qemu/mmap-alloc.h +++ b/include/qemu/mmap-alloc.h @@ -7,7 +7,26 @@ size_t qemu_fd_getpagesize(int fd); size_t qemu_mempath_getpagesize(const char *mem_path); -void *qemu_ram_mmap(int fd, size_t size, size_t align, bool shared); +/** + * qemu_ram_mmap: mmap the specified file or device. + * + * Parameters: + * @fd: the file or the device to mmap + * @size: the number of bytes to be mmaped + * @align: if not zero, specify the alignment of the starting mapping address; + * otherwise, the alignment in use will be determined by QEMU. + * @shared: map has RAM_SHARED flag. + * @is_pmem: map has RAM_PMEM flag. + * + * Return: + * On success, return a pointer to the mapped area. + * On failure, return MAP_FAILED. + */ +void *qemu_ram_mmap(int fd, + size_t size, + size_t align, + bool shared, + bool is_pmem); void qemu_ram_munmap(int fd, void *ptr, size_t size); diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h index 840af09cb0..303d315c5d 100644 --- a/include/qemu/osdep.h +++ b/include/qemu/osdep.h @@ -571,6 +571,19 @@ void os_mem_prealloc(int fd, char *area, size_t sz, int smp_cpus, Error **errp); /** + * qemu_get_pmem_size: + * @filename: path to a pmem file + * @errp: pointer to a NULL-initialized error object + * + * Determine the size of a persistent memory file. Besides supporting files on + * DAX file systems, this function also supports Linux devdax character + * devices. + * + * Returns: the size or 0 on failure + */ +uint64_t qemu_get_pmem_size(const char *filename, Error **errp); + +/** * qemu_get_pid_name: * @pid: pid of a process * diff --git a/include/qemu/qemu-print.h b/include/qemu/qemu-print.h new file mode 100644 index 0000000000..40b596262f --- /dev/null +++ b/include/qemu/qemu-print.h @@ -0,0 +1,23 @@ +/* + * Print to stream or current monitor + * + * Copyright (C) 2019 Red Hat Inc. + * + * Authors: + * Markus Armbruster <armbru@redhat.com>, + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef QEMU_PRINT_H +#define QEMU_PRINT_H + +int qemu_vprintf(const char *fmt, va_list ap) GCC_FMT_ATTR(1, 0); +int qemu_printf(const char *fmt, ...) GCC_FMT_ATTR(1, 2); + +int qemu_vfprintf(FILE *stream, const char *fmt, va_list ap) + GCC_FMT_ATTR(2, 0); +int qemu_fprintf(FILE *stream, const char *fmt, ...) GCC_FMT_ATTR(2, 3); + +#endif diff --git a/include/qemu/qsp.h b/include/qemu/qsp.h index a94c464f90..bf36aabfa8 100644 --- a/include/qemu/qsp.h +++ b/include/qemu/qsp.h @@ -11,15 +11,13 @@ #ifndef QEMU_QSP_H #define QEMU_QSP_H -#include "qemu/fprintf-fn.h" - enum QSPSortBy { QSP_SORT_BY_TOTAL_WAIT_TIME, QSP_SORT_BY_AVG_WAIT_TIME, }; -void qsp_report(FILE *f, fprintf_function cpu_fprintf, size_t max, - enum QSPSortBy sort_by, bool callsite_coalesce); +void qsp_report(size_t max, enum QSPSortBy sort_by, + bool callsite_coalesce); bool qsp_is_enabled(void); void qsp_enable(void); diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h index e4a0a656d1..fcdaae58c4 100644 --- a/include/qemu/typedefs.h +++ b/include/qemu/typedefs.h @@ -99,7 +99,6 @@ typedef struct RAMBlock RAMBlock; typedef struct Range Range; typedef struct SHPCDevice SHPCDevice; typedef struct SSIBus SSIBus; -typedef struct uWireSlave uWireSlave; typedef struct VirtIODevice VirtIODevice; typedef struct Visitor Visitor; typedef void SaveStateHandler(QEMUFile *f, void *opaque); diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 1d6099e5d4..08abcbd3fe 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -21,12 +21,11 @@ #define QEMU_CPU_H #include "hw/qdev-core.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" #include "exec/hwaddr.h" #include "exec/memattrs.h" #include "qapi/qapi-types-run-state.h" #include "qemu/bitmap.h" -#include "qemu/fprintf-fn.h" #include "qemu/rcu_queue.h" #include "qemu/queue.h" #include "qemu/thread.h" @@ -181,11 +180,9 @@ typedef struct CPUClass { bool (*virtio_is_big_endian)(CPUState *cpu); int (*memory_rw_debug)(CPUState *cpu, vaddr addr, uint8_t *buf, int len, bool is_write); - void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, - int flags); + void (*dump_state)(CPUState *cpu, FILE *, int flags); GuestPanicInformation* (*get_crash_info)(CPUState *cpu); - void (*dump_statistics)(CPUState *cpu, FILE *f, - fprintf_function cpu_fprintf, int flags); + void (*dump_statistics)(CPUState *cpu, int flags); int64_t (*get_arch_id)(CPUState *cpu); bool (*get_paging_enabled)(const CPUState *cpu); void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, @@ -564,26 +561,21 @@ enum CPUDumpFlags { /** * cpu_dump_state: * @cpu: The CPU whose state is to be dumped. - * @f: File to dump to. - * @cpu_fprintf: Function to dump with. - * @flags: Flags what to dump. + * @f: If non-null, dump to this stream, else to current print sink. * * Dumps CPU state. */ -void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, - int flags); +void cpu_dump_state(CPUState *cpu, FILE *f, int flags); /** * cpu_dump_statistics: * @cpu: The CPU whose state is to be dumped. - * @f: File to dump to. - * @cpu_fprintf: Function to dump with. * @flags: Flags what to dump. * - * Dumps CPU statistics. + * Dump CPU statistics to the current monitor if we have one, else to + * stdout. */ -void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, - int flags); +void cpu_dump_statistics(CPUState *cpu, int flags); #ifndef CONFIG_USER_ONLY /** @@ -689,15 +681,15 @@ ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model); CPUState *cpu_create(const char *typename); /** - * parse_cpu_model: - * @cpu_model: The model string including optional parameters. + * parse_cpu_option: + * @cpu_option: The -cpu option including optional parameters. * * processes optional parameters and registers them as global properties * * Returns: type of CPU to create or prints error and terminates process * if an error occurred. */ -const char *parse_cpu_model(const char *cpu_model); +const char *parse_cpu_option(const char *cpu_option); /** * cpu_has_work: diff --git a/include/sysemu/block-backend.h b/include/sysemu/block-backend.h index e2066eb06b..5be6224226 100644 --- a/include/sysemu/block-backend.h +++ b/include/sysemu/block-backend.h @@ -124,6 +124,25 @@ int coroutine_fn blk_co_preadv(BlockBackend *blk, int64_t offset, int coroutine_fn blk_co_pwritev(BlockBackend *blk, int64_t offset, unsigned int bytes, QEMUIOVector *qiov, BdrvRequestFlags flags); + +static inline int coroutine_fn blk_co_pread(BlockBackend *blk, int64_t offset, + unsigned int bytes, void *buf, + BdrvRequestFlags flags) +{ + QEMUIOVector qiov = QEMU_IOVEC_INIT_BUF(qiov, buf, bytes); + + return blk_co_preadv(blk, offset, bytes, &qiov, flags); +} + +static inline int coroutine_fn blk_co_pwrite(BlockBackend *blk, int64_t offset, + unsigned int bytes, void *buf, + BdrvRequestFlags flags) +{ + QEMUIOVector qiov = QEMU_IOVEC_INIT_BUF(qiov, buf, bytes); + + return blk_co_pwritev(blk, offset, bytes, &qiov, flags); +} + int blk_pwrite_zeroes(BlockBackend *blk, int64_t offset, int bytes, BdrvRequestFlags flags); BlockAIOCB *blk_aio_pwrite_zeroes(BlockBackend *blk, int64_t offset, @@ -177,6 +196,7 @@ bool blk_is_available(BlockBackend *blk); void blk_lock_medium(BlockBackend *blk, bool locked); void blk_eject(BlockBackend *blk, bool eject_flag); int blk_get_flags(BlockBackend *blk); +uint32_t blk_get_request_alignment(BlockBackend *blk); uint32_t blk_get_max_transfer(BlockBackend *blk); int blk_get_max_iov(BlockBackend *blk); void blk_set_guest_block_size(BlockBackend *blk, int align); diff --git a/include/sysemu/cpus.h b/include/sysemu/cpus.h index 731756d948..32c05f27e7 100644 --- a/include/sysemu/cpus.h +++ b/include/sysemu/cpus.h @@ -18,7 +18,7 @@ extern int icount_align_option; /* drift information for info jit command */ extern int64_t max_delay; extern int64_t max_advance; -void dump_drift_info(FILE *f, fprintf_function cpu_fprintf); +void dump_drift_info(void); /* Unblock cpu */ void qemu_cpu_kick_self(void); @@ -38,7 +38,7 @@ extern int smp_cores; extern int smp_threads; #endif -void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg); +void list_cpus(const char *optarg); void qemu_tcg_configure(QemuOpts *opts, Error **errp); diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h index 6065d9e420..5f133cae83 100644 --- a/include/sysemu/sysemu.h +++ b/include/sysemu/sysemu.h @@ -14,6 +14,7 @@ /* vl.c */ extern const char *bios_name; +extern int only_migratable; extern const char *qemu_name; extern QemuUUID qemu_uuid; extern bool qemu_uuid_set; diff --git a/io/channel-websock.c b/io/channel-websock.c index dc43dc6bb9..77d30f0e4a 100644 --- a/io/channel-websock.c +++ b/io/channel-websock.c @@ -1225,12 +1225,18 @@ qio_channel_websock_source_check(GSource *source) QIOChannelWebsockSource *wsource = (QIOChannelWebsockSource *)source; GIOCondition cond = 0; - if (wsource->wioc->rawinput.offset || wsource->wioc->io_eof) { + if (wsource->wioc->rawinput.offset) { cond |= G_IO_IN; } if (wsource->wioc->encoutput.offset < QIO_CHANNEL_WEBSOCK_MAX_BUFFER) { cond |= G_IO_OUT; } + if (wsource->wioc->io_eof) { + cond |= G_IO_HUP; + } + if (wsource->wioc->io_err) { + cond |= G_IO_ERR; + } return cond & wsource->condition; } diff --git a/io/trace-events b/io/trace-events index 07a7bbec6a..378390521e 100644 --- a/io/trace-events +++ b/io/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# io/task.c +# task.c qio_task_new(void *task, void *source, void *func, void *opaque) "Task new task=%p source=%p func=%p opaque=%p" qio_task_complete(void *task) "Task complete task=%p" qio_task_thread_start(void *task, void *worker, void *opaque) "Task thread start task=%p worker=%p opaque=%p" @@ -10,7 +10,7 @@ qio_task_thread_result(void *task) "Task thread result task=%p" qio_task_thread_source_attach(void *task, void *source) "Task thread source attach task=%p source=%p" qio_task_thread_source_cancel(void *task, void *source) "Task thread source cancel task=%p source=%p" -# io/channel-socket.c +# channel-socket.c qio_channel_socket_new(void *ioc) "Socket new ioc=%p" qio_channel_socket_new_fd(void *ioc, int fd) "Socket new ioc=%p fd=%d" qio_channel_socket_connect_sync(void *ioc, void *addr) "Socket connect sync ioc=%p addr=%p" @@ -29,11 +29,11 @@ qio_channel_socket_accept(void *ioc) "Socket accept start ioc=%p" qio_channel_socket_accept_fail(void *ioc) "Socket accept fail ioc=%p" qio_channel_socket_accept_complete(void *ioc, void *cioc, int fd) "Socket accept complete ioc=%p cioc=%p fd=%d" -# io/channel-file.c +# channel-file.c qio_channel_file_new_fd(void *ioc, int fd) "File new fd ioc=%p fd=%d" qio_channel_file_new_path(void *ioc, const char *path, int flags, int mode, int fd) "File new fd ioc=%p path=%s flags=%d mode=%d fd=%d" -# io/channel-tls.c +# channel-tls.c qio_channel_tls_new_client(void *ioc, void *master, void *creds, const char *hostname) "TLS new client ioc=%p master=%p creds=%p hostname=%s" qio_channel_tls_new_server(void *ioc, void *master, void *creds, const char *aclname) "TLS new client ioc=%p master=%p creds=%p acltname=%s" qio_channel_tls_handshake_start(void *ioc) "TLS handshake start ioc=%p" @@ -43,7 +43,7 @@ qio_channel_tls_handshake_complete(void *ioc) "TLS handshake complete ioc=%p" qio_channel_tls_credentials_allow(void *ioc) "TLS credentials allow ioc=%p" qio_channel_tls_credentials_deny(void *ioc) "TLS credentials deny ioc=%p" -# io/channel-websock.c +# channel-websock.c qio_channel_websock_new_server(void *ioc, void *master) "Websock new client ioc=%p master=%p" qio_channel_websock_handshake_start(void *ioc) "Websock handshake start ioc=%p" qio_channel_websock_handshake_pending(void *ioc, int status) "Websock handshake pending ioc=%p status=%d" @@ -58,7 +58,7 @@ qio_channel_websock_payload_decode(void *ioc, uint8_t opcode, size_t payload_rem qio_channel_websock_encode(void *ioc, uint8_t opcode, size_t payloadlen, size_t headerlen) "Websocket encoded ioc=%p opcode=0x%x header-len=%zu payload-len=%zu" qio_channel_websock_close(void *ioc) "Websocket close ioc=%p" -# io/channel-command.c +# channel-command.c qio_channel_command_new_pid(void *ioc, int writefd, int readfd, int pid) "Command new pid ioc=%p writefd=%d readfd=%d pid=%d" qio_channel_command_new_spawn(void *ioc, const char *binary, int flags) "Command new spawn ioc=%p binary=%s flags=%d" qio_channel_command_abort(void *ioc, int pid) "Command abort ioc=%p pid=%d" diff --git a/linux-headers/asm-arm/mman.h b/linux-headers/asm-arm/mman.h new file mode 100644 index 0000000000..41f99c573b --- /dev/null +++ b/linux-headers/asm-arm/mman.h @@ -0,0 +1,4 @@ +#include <asm-generic/mman.h> + +#define arch_mmap_check(addr, len, flags) \ + (((flags) & MAP_FIXED && (addr) < FIRST_USER_ADDRESS) ? -EINVAL : 0) diff --git a/linux-headers/asm-arm64/mman.h b/linux-headers/asm-arm64/mman.h new file mode 100644 index 0000000000..8eebf89f5a --- /dev/null +++ b/linux-headers/asm-arm64/mman.h @@ -0,0 +1 @@ +#include <asm-generic/mman.h> diff --git a/linux-headers/asm-generic/hugetlb_encode.h b/linux-headers/asm-generic/hugetlb_encode.h new file mode 100644 index 0000000000..b0f8e87235 --- /dev/null +++ b/linux-headers/asm-generic/hugetlb_encode.h @@ -0,0 +1,36 @@ +#ifndef _ASM_GENERIC_HUGETLB_ENCODE_H_ +#define _ASM_GENERIC_HUGETLB_ENCODE_H_ + +/* + * Several system calls take a flag to request "hugetlb" huge pages. + * Without further specification, these system calls will use the + * system's default huge page size. If a system supports multiple + * huge page sizes, the desired huge page size can be specified in + * bits [26:31] of the flag arguments. The value in these 6 bits + * will encode the log2 of the huge page size. + * + * The following definitions are associated with this huge page size + * encoding in flag arguments. System call specific header files + * that use this encoding should include this file. They can then + * provide definitions based on these with their own specific prefix. + * for example: + * #define MAP_HUGE_SHIFT HUGETLB_FLAG_ENCODE_SHIFT + */ + +#define HUGETLB_FLAG_ENCODE_SHIFT 26 +#define HUGETLB_FLAG_ENCODE_MASK 0x3f + +#define HUGETLB_FLAG_ENCODE_64KB (16 << HUGETLB_FLAG_ENCODE_SHIFT) +#define HUGETLB_FLAG_ENCODE_512KB (19 << HUGETLB_FLAG_ENCODE_SHIFT) +#define HUGETLB_FLAG_ENCODE_1MB (20 << HUGETLB_FLAG_ENCODE_SHIFT) +#define HUGETLB_FLAG_ENCODE_2MB (21 << HUGETLB_FLAG_ENCODE_SHIFT) +#define HUGETLB_FLAG_ENCODE_8MB (23 << HUGETLB_FLAG_ENCODE_SHIFT) +#define HUGETLB_FLAG_ENCODE_16MB (24 << HUGETLB_FLAG_ENCODE_SHIFT) +#define HUGETLB_FLAG_ENCODE_32MB (25 << HUGETLB_FLAG_ENCODE_SHIFT) +#define HUGETLB_FLAG_ENCODE_256MB (28 << HUGETLB_FLAG_ENCODE_SHIFT) +#define HUGETLB_FLAG_ENCODE_512MB (29 << HUGETLB_FLAG_ENCODE_SHIFT) +#define HUGETLB_FLAG_ENCODE_1GB (30 << HUGETLB_FLAG_ENCODE_SHIFT) +#define HUGETLB_FLAG_ENCODE_2GB (31 << HUGETLB_FLAG_ENCODE_SHIFT) +#define HUGETLB_FLAG_ENCODE_16GB (34 << HUGETLB_FLAG_ENCODE_SHIFT) + +#endif /* _ASM_GENERIC_HUGETLB_ENCODE_H_ */ diff --git a/linux-headers/asm-generic/mman-common.h b/linux-headers/asm-generic/mman-common.h new file mode 100644 index 0000000000..e7ee32861d --- /dev/null +++ b/linux-headers/asm-generic/mman-common.h @@ -0,0 +1,77 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +#ifndef __ASM_GENERIC_MMAN_COMMON_H +#define __ASM_GENERIC_MMAN_COMMON_H + +/* + Author: Michael S. Tsirkin <mst@mellanox.co.il>, Mellanox Technologies Ltd. + Based on: asm-xxx/mman.h +*/ + +#define PROT_READ 0x1 /* page can be read */ +#define PROT_WRITE 0x2 /* page can be written */ +#define PROT_EXEC 0x4 /* page can be executed */ +#define PROT_SEM 0x8 /* page may be used for atomic ops */ +#define PROT_NONE 0x0 /* page can not be accessed */ +#define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */ +#define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */ + +#define MAP_SHARED 0x01 /* Share changes */ +#define MAP_PRIVATE 0x02 /* Changes are private */ +#define MAP_SHARED_VALIDATE 0x03 /* share + validate extension flags */ +#define MAP_TYPE 0x0f /* Mask for type of mapping */ +#define MAP_FIXED 0x10 /* Interpret addr exactly */ +#define MAP_ANONYMOUS 0x20 /* don't use a file */ +#ifdef CONFIG_MMAP_ALLOW_UNINITIALIZED +# define MAP_UNINITIALIZED 0x4000000 /* For anonymous mmap, memory could be uninitialized */ +#else +# define MAP_UNINITIALIZED 0x0 /* Don't support this flag */ +#endif + +/* 0x0100 - 0x80000 flags are defined in asm-generic/mman.h */ +#define MAP_FIXED_NOREPLACE 0x100000 /* MAP_FIXED which doesn't unmap underlying mapping */ + +/* + * Flags for mlock + */ +#define MLOCK_ONFAULT 0x01 /* Lock pages in range after they are faulted in, do not prefault */ + +#define MS_ASYNC 1 /* sync memory asynchronously */ +#define MS_INVALIDATE 2 /* invalidate the caches */ +#define MS_SYNC 4 /* synchronous memory sync */ + +#define MADV_NORMAL 0 /* no further special treatment */ +#define MADV_RANDOM 1 /* expect random page references */ +#define MADV_SEQUENTIAL 2 /* expect sequential page references */ +#define MADV_WILLNEED 3 /* will need these pages */ +#define MADV_DONTNEED 4 /* don't need these pages */ + +/* common parameters: try to keep these consistent across architectures */ +#define MADV_FREE 8 /* free pages only if memory pressure */ +#define MADV_REMOVE 9 /* remove these pages & resources */ +#define MADV_DONTFORK 10 /* don't inherit across fork */ +#define MADV_DOFORK 11 /* do inherit across fork */ +#define MADV_HWPOISON 100 /* poison a page for testing */ +#define MADV_SOFT_OFFLINE 101 /* soft offline page for testing */ + +#define MADV_MERGEABLE 12 /* KSM may merge identical pages */ +#define MADV_UNMERGEABLE 13 /* KSM may not merge identical pages */ + +#define MADV_HUGEPAGE 14 /* Worth backing with hugepages */ +#define MADV_NOHUGEPAGE 15 /* Not worth backing with hugepages */ + +#define MADV_DONTDUMP 16 /* Explicity exclude from the core dump, + overrides the coredump filter bits */ +#define MADV_DODUMP 17 /* Clear the MADV_DONTDUMP flag */ + +#define MADV_WIPEONFORK 18 /* Zero memory on fork, child only */ +#define MADV_KEEPONFORK 19 /* Undo MADV_WIPEONFORK */ + +/* compatibility flags */ +#define MAP_FILE 0 + +#define PKEY_DISABLE_ACCESS 0x1 +#define PKEY_DISABLE_WRITE 0x2 +#define PKEY_ACCESS_MASK (PKEY_DISABLE_ACCESS |\ + PKEY_DISABLE_WRITE) + +#endif /* __ASM_GENERIC_MMAN_COMMON_H */ diff --git a/linux-headers/asm-generic/mman.h b/linux-headers/asm-generic/mman.h new file mode 100644 index 0000000000..653687d977 --- /dev/null +++ b/linux-headers/asm-generic/mman.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +#ifndef __ASM_GENERIC_MMAN_H +#define __ASM_GENERIC_MMAN_H + +#include <asm-generic/mman-common.h> + +#define MAP_GROWSDOWN 0x0100 /* stack-like segment */ +#define MAP_DENYWRITE 0x0800 /* ETXTBSY */ +#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ +#define MAP_LOCKED 0x2000 /* pages are locked */ +#define MAP_NORESERVE 0x4000 /* don't check for reservations */ +#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */ +#define MAP_NONBLOCK 0x10000 /* do not block on IO */ +#define MAP_STACK 0x20000 /* give out an address that is best suited for process/thread stacks */ +#define MAP_HUGETLB 0x40000 /* create a huge page mapping */ +#define MAP_SYNC 0x80000 /* perform synchronous page faults for the mapping */ + +/* Bits [26:31] are reserved, see mman-common.h for MAP_HUGETLB usage */ + +#define MCL_CURRENT 1 /* lock all current mappings */ +#define MCL_FUTURE 2 /* lock all future mappings */ +#define MCL_ONFAULT 4 /* lock all pages that are faulted in */ + +#endif /* __ASM_GENERIC_MMAN_H */ diff --git a/linux-headers/asm-mips/mman.h b/linux-headers/asm-mips/mman.h new file mode 100644 index 0000000000..3035ca499c --- /dev/null +++ b/linux-headers/asm-mips/mman.h @@ -0,0 +1,108 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1995, 1999, 2002 by Ralf Baechle + */ +#ifndef _ASM_MMAN_H +#define _ASM_MMAN_H + +/* + * Protections are chosen from these bits, OR'd together. The + * implementation does not necessarily support PROT_EXEC or PROT_WRITE + * without PROT_READ. The only guarantees are that no writing will be + * allowed without PROT_WRITE and no access will be allowed for PROT_NONE. + */ +#define PROT_NONE 0x00 /* page can not be accessed */ +#define PROT_READ 0x01 /* page can be read */ +#define PROT_WRITE 0x02 /* page can be written */ +#define PROT_EXEC 0x04 /* page can be executed */ +/* 0x08 reserved for PROT_EXEC_NOFLUSH */ +#define PROT_SEM 0x10 /* page may be used for atomic ops */ +#define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */ +#define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */ + +/* + * Flags for mmap + */ +#define MAP_SHARED 0x001 /* Share changes */ +#define MAP_PRIVATE 0x002 /* Changes are private */ +#define MAP_SHARED_VALIDATE 0x003 /* share + validate extension flags */ +#define MAP_TYPE 0x00f /* Mask for type of mapping */ +#define MAP_FIXED 0x010 /* Interpret addr exactly */ + +/* not used by linux, but here to make sure we don't clash with ABI defines */ +#define MAP_RENAME 0x020 /* Assign page to file */ +#define MAP_AUTOGROW 0x040 /* File may grow by writing */ +#define MAP_LOCAL 0x080 /* Copy on fork/sproc */ +#define MAP_AUTORSRV 0x100 /* Logical swap reserved on demand */ + +/* These are linux-specific */ +#define MAP_NORESERVE 0x0400 /* don't check for reservations */ +#define MAP_ANONYMOUS 0x0800 /* don't use a file */ +#define MAP_GROWSDOWN 0x1000 /* stack-like segment */ +#define MAP_DENYWRITE 0x2000 /* ETXTBSY */ +#define MAP_EXECUTABLE 0x4000 /* mark it as an executable */ +#define MAP_LOCKED 0x8000 /* pages are locked */ +#define MAP_POPULATE 0x10000 /* populate (prefault) pagetables */ +#define MAP_NONBLOCK 0x20000 /* do not block on IO */ +#define MAP_STACK 0x40000 /* give out an address that is best suited for process/thread stacks */ +#define MAP_HUGETLB 0x80000 /* create a huge page mapping */ +#define MAP_FIXED_NOREPLACE 0x100000 /* MAP_FIXED which doesn't unmap underlying mapping */ + +/* + * Flags for msync + */ +#define MS_ASYNC 0x0001 /* sync memory asynchronously */ +#define MS_INVALIDATE 0x0002 /* invalidate mappings & caches */ +#define MS_SYNC 0x0004 /* synchronous memory sync */ + +/* + * Flags for mlockall + */ +#define MCL_CURRENT 1 /* lock all current mappings */ +#define MCL_FUTURE 2 /* lock all future mappings */ +#define MCL_ONFAULT 4 /* lock all pages that are faulted in */ + +/* + * Flags for mlock + */ +#define MLOCK_ONFAULT 0x01 /* Lock pages in range after they are faulted in, do not prefault */ + +#define MADV_NORMAL 0 /* no further special treatment */ +#define MADV_RANDOM 1 /* expect random page references */ +#define MADV_SEQUENTIAL 2 /* expect sequential page references */ +#define MADV_WILLNEED 3 /* will need these pages */ +#define MADV_DONTNEED 4 /* don't need these pages */ + +/* common parameters: try to keep these consistent across architectures */ +#define MADV_FREE 8 /* free pages only if memory pressure */ +#define MADV_REMOVE 9 /* remove these pages & resources */ +#define MADV_DONTFORK 10 /* don't inherit across fork */ +#define MADV_DOFORK 11 /* do inherit across fork */ + +#define MADV_MERGEABLE 12 /* KSM may merge identical pages */ +#define MADV_UNMERGEABLE 13 /* KSM may not merge identical pages */ +#define MADV_HWPOISON 100 /* poison a page for testing */ + +#define MADV_HUGEPAGE 14 /* Worth backing with hugepages */ +#define MADV_NOHUGEPAGE 15 /* Not worth backing with hugepages */ + +#define MADV_DONTDUMP 16 /* Explicity exclude from the core dump, + overrides the coredump filter bits */ +#define MADV_DODUMP 17 /* Clear the MADV_NODUMP flag */ + +#define MADV_WIPEONFORK 18 /* Zero memory on fork, child only */ +#define MADV_KEEPONFORK 19 /* Undo MADV_WIPEONFORK */ + +/* compatibility flags */ +#define MAP_FILE 0 + +#define PKEY_DISABLE_ACCESS 0x1 +#define PKEY_DISABLE_WRITE 0x2 +#define PKEY_ACCESS_MASK (PKEY_DISABLE_ACCESS |\ + PKEY_DISABLE_WRITE) + +#endif /* _ASM_MMAN_H */ diff --git a/linux-headers/asm-powerpc/mman.h b/linux-headers/asm-powerpc/mman.h new file mode 100644 index 0000000000..1c2b3fca05 --- /dev/null +++ b/linux-headers/asm-powerpc/mman.h @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ +#ifndef _ASM_POWERPC_MMAN_H +#define _ASM_POWERPC_MMAN_H + +#include <asm-generic/mman-common.h> + + +#define PROT_SAO 0x10 /* Strong Access Ordering */ + +#define MAP_RENAME MAP_ANONYMOUS /* In SunOS terminology */ +#define MAP_NORESERVE 0x40 /* don't reserve swap pages */ +#define MAP_LOCKED 0x80 + +#define MAP_GROWSDOWN 0x0100 /* stack-like segment */ +#define MAP_DENYWRITE 0x0800 /* ETXTBSY */ +#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ + +#define MCL_CURRENT 0x2000 /* lock all currently mapped pages */ +#define MCL_FUTURE 0x4000 /* lock all additions to address space */ +#define MCL_ONFAULT 0x8000 /* lock all pages that are faulted in */ + +#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */ +#define MAP_NONBLOCK 0x10000 /* do not block on IO */ +#define MAP_STACK 0x20000 /* give out an address that is best suited for process/thread stacks */ +#define MAP_HUGETLB 0x40000 /* create a huge page mapping */ + +/* Override any generic PKEY permission defines */ +#define PKEY_DISABLE_EXECUTE 0x4 +#undef PKEY_ACCESS_MASK +#define PKEY_ACCESS_MASK (PKEY_DISABLE_ACCESS |\ + PKEY_DISABLE_WRITE |\ + PKEY_DISABLE_EXECUTE) +#endif /* _ASM_POWERPC_MMAN_H */ diff --git a/linux-headers/asm-s390/mman.h b/linux-headers/asm-s390/mman.h new file mode 100644 index 0000000000..8eebf89f5a --- /dev/null +++ b/linux-headers/asm-s390/mman.h @@ -0,0 +1 @@ +#include <asm-generic/mman.h> diff --git a/linux-headers/asm-x86/mman.h b/linux-headers/asm-x86/mman.h new file mode 100644 index 0000000000..d4a8d0424b --- /dev/null +++ b/linux-headers/asm-x86/mman.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +#ifndef _ASM_X86_MMAN_H +#define _ASM_X86_MMAN_H + +#define MAP_32BIT 0x40 /* only give out 32bit addresses */ + +#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS +/* + * Take the 4 protection key bits out of the vma->vm_flags + * value and turn them in to the bits that we can put in + * to a pte. + * + * Only override these if Protection Keys are available + * (which is only on 64-bit). + */ +#define arch_vm_get_page_prot(vm_flags) __pgprot( \ + ((vm_flags) & VM_PKEY_BIT0 ? _PAGE_PKEY_BIT0 : 0) | \ + ((vm_flags) & VM_PKEY_BIT1 ? _PAGE_PKEY_BIT1 : 0) | \ + ((vm_flags) & VM_PKEY_BIT2 ? _PAGE_PKEY_BIT2 : 0) | \ + ((vm_flags) & VM_PKEY_BIT3 ? _PAGE_PKEY_BIT3 : 0)) + +#define arch_calc_vm_prot_bits(prot, key) ( \ + ((key) & 0x1 ? VM_PKEY_BIT0 : 0) | \ + ((key) & 0x2 ? VM_PKEY_BIT1 : 0) | \ + ((key) & 0x4 ? VM_PKEY_BIT2 : 0) | \ + ((key) & 0x8 ? VM_PKEY_BIT3 : 0)) +#endif + +#include <asm-generic/mman.h> + +#endif /* _ASM_X86_MMAN_H */ diff --git a/linux-headers/linux/mman.h b/linux-headers/linux/mman.h new file mode 100644 index 0000000000..3c44b6f480 --- /dev/null +++ b/linux-headers/linux/mman.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +#ifndef _LINUX_MMAN_H +#define _LINUX_MMAN_H + +#include <asm/mman.h> +#include <asm-generic/hugetlb_encode.h> + +#define MREMAP_MAYMOVE 1 +#define MREMAP_FIXED 2 + +#define OVERCOMMIT_GUESS 0 +#define OVERCOMMIT_ALWAYS 1 +#define OVERCOMMIT_NEVER 2 + +/* + * Huge page size encoding when MAP_HUGETLB is specified, and a huge page + * size other than the default is desired. See hugetlb_encode.h. + * All known huge page size encodings are provided here. It is the + * responsibility of the application to know which sizes are supported on + * the running system. See mmap(2) man page for details. + */ +#define MAP_HUGE_SHIFT HUGETLB_FLAG_ENCODE_SHIFT +#define MAP_HUGE_MASK HUGETLB_FLAG_ENCODE_MASK + +#define MAP_HUGE_64KB HUGETLB_FLAG_ENCODE_64KB +#define MAP_HUGE_512KB HUGETLB_FLAG_ENCODE_512KB +#define MAP_HUGE_1MB HUGETLB_FLAG_ENCODE_1MB +#define MAP_HUGE_2MB HUGETLB_FLAG_ENCODE_2MB +#define MAP_HUGE_8MB HUGETLB_FLAG_ENCODE_8MB +#define MAP_HUGE_16MB HUGETLB_FLAG_ENCODE_16MB +#define MAP_HUGE_32MB HUGETLB_FLAG_ENCODE_32MB +#define MAP_HUGE_256MB HUGETLB_FLAG_ENCODE_256MB +#define MAP_HUGE_512MB HUGETLB_FLAG_ENCODE_512MB +#define MAP_HUGE_1GB HUGETLB_FLAG_ENCODE_1GB +#define MAP_HUGE_2GB HUGETLB_FLAG_ENCODE_2GB +#define MAP_HUGE_16GB HUGETLB_FLAG_ENCODE_16GB + +#endif /* _LINUX_MMAN_H */ diff --git a/linux-user/alpha/cpu_loop.c b/linux-user/alpha/cpu_loop.c index 824b6d6658..61992571e1 100644 --- a/linux-user/alpha/cpu_loop.c +++ b/linux-user/alpha/cpu_loop.c @@ -193,7 +193,7 @@ void cpu_loop(CPUAlphaState *env) break; default: fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr); - cpu_dump_state(cs, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, 0); exit(EXIT_FAILURE); } process_pending_signals (env); diff --git a/linux-user/cpu_loop-common.h b/linux-user/cpu_loop-common.h index ffe3fe9ad5..c1d554a249 100644 --- a/linux-user/cpu_loop-common.h +++ b/linux-user/cpu_loop-common.h @@ -26,7 +26,7 @@ do { \ CPUState *cs = ENV_GET_CPU(env); \ fprintf(stderr, fmt , ## __VA_ARGS__); \ - cpu_dump_state(cs, stderr, fprintf, 0); \ + cpu_dump_state(cs, stderr, 0); \ if (qemu_log_separate()) { \ qemu_log(fmt, ## __VA_ARGS__); \ log_cpu_state(cs, 0); \ diff --git a/linux-user/cris/cpu_loop.c b/linux-user/cris/cpu_loop.c index dacf604c7d..af8c128bf8 100644 --- a/linux-user/cris/cpu_loop.c +++ b/linux-user/cris/cpu_loop.c @@ -74,7 +74,7 @@ void cpu_loop(CPUCRISState *env) break; default: fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr); - cpu_dump_state(cs, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, 0); exit(EXIT_FAILURE); } process_pending_signals (env); diff --git a/linux-user/main.c b/linux-user/main.c index a0aba9cb1e..3d2230320b 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -27,6 +27,7 @@ #include "qemu/path.h" #include "qemu/config-file.h" #include "qemu/cutils.h" +#include "qemu/error-report.h" #include "qemu/help_option.h" #include "cpu.h" #include "exec/exec-all.h" @@ -316,7 +317,7 @@ static void handle_arg_cpu(const char *arg) if (cpu_model == NULL || is_help_option(cpu_model)) { /* XXX: implement xxx_cpu_list for targets that still miss it */ #if defined(cpu_list) - cpu_list(stdout, &fprintf); + cpu_list(); #endif exit(EXIT_FAILURE); } @@ -600,6 +601,7 @@ int main(int argc, char **argv, char **envp) int ret; int execfd; + error_init(argv[0]); module_call_init(MODULE_INIT_TRACE); qemu_init_cpu_list(); module_call_init(MODULE_INIT_QOM); @@ -660,7 +662,7 @@ int main(int argc, char **argv, char **envp) if (cpu_model == NULL) { cpu_model = cpu_get_model(get_elf_eflags(execfd)); } - cpu_type = parse_cpu_model(cpu_model); + cpu_type = parse_cpu_option(cpu_model); /* init tcg before creating CPUs and to get qemu_host_page_size */ tcg_exec_init(0); diff --git a/linux-user/microblaze/cpu_loop.c b/linux-user/microblaze/cpu_loop.c index c2190e15fd..076bdb9a61 100644 --- a/linux-user/microblaze/cpu_loop.c +++ b/linux-user/microblaze/cpu_loop.c @@ -107,7 +107,7 @@ void cpu_loop(CPUMBState *env) default: fprintf(stderr, "Unhandled hw-exception: 0x%" PRIx64 "\n", env->sregs[SR_ESR] & ESR_EC_MASK); - cpu_dump_state(cs, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, 0); exit(EXIT_FAILURE); break; } @@ -123,7 +123,7 @@ void cpu_loop(CPUMBState *env) break; default: fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr); - cpu_dump_state(cs, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, 0); exit(EXIT_FAILURE); } process_pending_signals (env); diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c index 4cf3e94632..a9bac4ca79 100644 --- a/linux-user/riscv/cpu_loop.c +++ b/linux-user/riscv/cpu_loop.c @@ -18,8 +18,10 @@ */ #include "qemu/osdep.h" +#include "qemu/error-report.h" #include "qemu.h" #include "cpu_loop-common.h" +#include "elf.h" void cpu_loop(CPURISCVState *env) { @@ -53,7 +55,8 @@ void cpu_loop(CPURISCVState *env) ret = 0; } else { ret = do_syscall(env, - env->gpr[xA7], + env->gpr[(env->elf_flags & EF_RISCV_RVE) + ? xT0 : xA7], env->gpr[xA0], env->gpr[xA1], env->gpr[xA2], @@ -113,6 +116,16 @@ void cpu_loop(CPURISCVState *env) void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) { + CPUState *cpu = ENV_GET_CPU(env); + TaskState *ts = cpu->opaque; + struct image_info *info = ts->info; + env->pc = regs->sepc; env->gpr[xSP] = regs->sp; + env->elf_flags = info->elf_flags; + + if ((env->misa & RVE) && !(env->elf_flags & EF_RISCV_RVE)) { + error_report("Incompatible ELF: RVE cpu requires RVE ABI binary"); + exit(EXIT_FAILURE); + } } diff --git a/linux-user/s390x/cpu_loop.c b/linux-user/s390x/cpu_loop.c index 51b5412ea2..b8bd1c956c 100644 --- a/linux-user/s390x/cpu_loop.c +++ b/linux-user/s390x/cpu_loop.c @@ -124,7 +124,7 @@ void cpu_loop(CPUS390XState *env) default: fprintf(stderr, "Unhandled program exception: %#x\n", n); - cpu_dump_state(cs, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, 0); exit(EXIT_FAILURE); } break; @@ -144,7 +144,7 @@ void cpu_loop(CPUS390XState *env) break; default: fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr); - cpu_dump_state(cs, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, 0); exit(EXIT_FAILURE); } process_pending_signals (env); diff --git a/linux-user/sh4/cpu_loop.c b/linux-user/sh4/cpu_loop.c index 47e54b9b61..59cbbeda7e 100644 --- a/linux-user/sh4/cpu_loop.c +++ b/linux-user/sh4/cpu_loop.c @@ -76,7 +76,7 @@ void cpu_loop(CPUSH4State *env) break; default: fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr); - cpu_dump_state(cs, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, 0); exit(EXIT_FAILURE); } process_pending_signals (env); diff --git a/linux-user/sparc/cpu_loop.c b/linux-user/sparc/cpu_loop.c index 7d5b337b97..9e357229c0 100644 --- a/linux-user/sparc/cpu_loop.c +++ b/linux-user/sparc/cpu_loop.c @@ -278,7 +278,7 @@ void cpu_loop (CPUSPARCState *env) break; default: fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr); - cpu_dump_state(cs, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, 0); exit(EXIT_FAILURE); } process_pending_signals (env); diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 208fd1813d..96cd4bf86d 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -249,15 +249,8 @@ static type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5, \ #define TARGET_NR__llseek TARGET_NR_llseek #endif -#ifdef __NR_gettid -_syscall0(int, gettid) -#else -/* This is a replacement for the host gettid() and must return a host - errno. */ -static int gettid(void) { - return -ENOSYS; -} -#endif +#define __NR_sys_gettid __NR_gettid +_syscall0(int, sys_gettid) /* For the 64-bit guest on 32-bit host case we must emulate * getdents using getdents64, because otherwise the host @@ -5442,7 +5435,7 @@ static void *clone_func(void *arg) cpu = ENV_GET_CPU(env); thread_cpu = cpu; ts = (TaskState *)cpu->opaque; - info->tid = gettid(); + info->tid = sys_gettid(); task_settid(ts); if (info->child_tidptr) put_user_u32(info->tid, info->child_tidptr); @@ -5587,9 +5580,9 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, mapping. We can't repeat the spinlock hack used above because the child process gets its own copy of the lock. */ if (flags & CLONE_CHILD_SETTID) - put_user_u32(gettid(), child_tidptr); + put_user_u32(sys_gettid(), child_tidptr); if (flags & CLONE_PARENT_SETTID) - put_user_u32(gettid(), parent_tidptr); + put_user_u32(sys_gettid(), parent_tidptr); ts = (TaskState *)cpu->opaque; if (flags & CLONE_SETTLS) cpu_set_tls (env, newtls); @@ -10629,7 +10622,7 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1, return TARGET_PAGE_SIZE; #endif case TARGET_NR_gettid: - return get_errno(gettid()); + return get_errno(sys_gettid()); #ifdef TARGET_NR_readahead case TARGET_NR_readahead: #if TARGET_ABI_BITS == 32 diff --git a/linux-user/trace-events b/linux-user/trace-events index 68f36ac8fd..6df234bbb6 100644 --- a/linux-user/trace-events +++ b/linux-user/trace-events @@ -1,6 +1,7 @@ # See docs/devel/tracing.txt for syntax documentation. -# linux-user/signal.c +# signal.c +# */signal.c user_setup_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=0x%"PRIx64 user_setup_rt_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=0x%"PRIx64 user_do_rt_sigreturn(void *env, uint64_t frame_addr) "env=%p frame_addr=0x%"PRIx64 diff --git a/memory.c b/memory.c index e49369d85d..bb2b71ee38 100644 --- a/memory.c +++ b/memory.c @@ -22,6 +22,7 @@ #include "qapi/visitor.h" #include "qemu/bitops.h" #include "qemu/error-report.h" +#include "qemu/qemu-print.h" #include "qom/object.h" #include "trace-root.h" @@ -1649,10 +1650,17 @@ void memory_region_init_ram_device_ptr(MemoryRegion *mr, uint64_t size, void *ptr) { - memory_region_init_ram_ptr(mr, owner, name, size, ptr); + memory_region_init(mr, owner, name, size); + mr->ram = true; + mr->terminates = true; mr->ram_device = true; mr->ops = &ram_device_mem_ops; mr->opaque = mr; + mr->destructor = memory_region_destructor_ram; + mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; + /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */ + assert(ptr != NULL); + mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal); } void memory_region_init_alias(MemoryRegion *mr, @@ -2793,46 +2801,43 @@ typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead; int128_sub((size), int128_one())) : 0) #define MTREE_INDENT " " -static void mtree_expand_owner(fprintf_function mon_printf, void *f, - const char *label, Object *obj) +static void mtree_expand_owner(const char *label, Object *obj) { DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE); - mon_printf(f, " %s:{%s", label, dev ? "dev" : "obj"); + qemu_printf(" %s:{%s", label, dev ? "dev" : "obj"); if (dev && dev->id) { - mon_printf(f, " id=%s", dev->id); + qemu_printf(" id=%s", dev->id); } else { gchar *canonical_path = object_get_canonical_path(obj); if (canonical_path) { - mon_printf(f, " path=%s", canonical_path); + qemu_printf(" path=%s", canonical_path); g_free(canonical_path); } else { - mon_printf(f, " type=%s", object_get_typename(obj)); + qemu_printf(" type=%s", object_get_typename(obj)); } } - mon_printf(f, "}"); + qemu_printf("}"); } -static void mtree_print_mr_owner(fprintf_function mon_printf, void *f, - const MemoryRegion *mr) +static void mtree_print_mr_owner(const MemoryRegion *mr) { Object *owner = mr->owner; Object *parent = memory_region_owner((MemoryRegion *)mr); if (!owner && !parent) { - mon_printf(f, " orphan"); + qemu_printf(" orphan"); return; } if (owner) { - mtree_expand_owner(mon_printf, f, "owner", owner); + mtree_expand_owner("owner", owner); } if (parent && parent != owner) { - mtree_expand_owner(mon_printf, f, "parent", parent); + mtree_expand_owner("parent", parent); } } -static void mtree_print_mr(fprintf_function mon_printf, void *f, - const MemoryRegion *mr, unsigned int level, +static void mtree_print_mr(const MemoryRegion *mr, unsigned int level, hwaddr base, MemoryRegionListHead *alias_print_queue, bool owner) @@ -2848,7 +2853,7 @@ static void mtree_print_mr(fprintf_function mon_printf, void *f, } for (i = 0; i < level; i++) { - mon_printf(f, MTREE_INDENT); + qemu_printf(MTREE_INDENT); } cur_start = base + mr->addr; @@ -2860,7 +2865,7 @@ static void mtree_print_mr(fprintf_function mon_printf, void *f, * user who is observing this. */ if (cur_start < base || cur_end < cur_start) { - mon_printf(f, "[DETECTED OVERFLOW!] "); + qemu_printf("[DETECTED OVERFLOW!] "); } if (mr->alias) { @@ -2879,35 +2884,35 @@ static void mtree_print_mr(fprintf_function mon_printf, void *f, ml->mr = mr->alias; QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue); } - mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx - " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx - "-" TARGET_FMT_plx "%s", - cur_start, cur_end, - mr->priority, - mr->nonvolatile ? "nv-" : "", - memory_region_type((MemoryRegion *)mr), - memory_region_name(mr), - memory_region_name(mr->alias), - mr->alias_offset, - mr->alias_offset + MR_SIZE(mr->size), - mr->enabled ? "" : " [disabled]"); + qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx + " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx + "-" TARGET_FMT_plx "%s", + cur_start, cur_end, + mr->priority, + mr->nonvolatile ? "nv-" : "", + memory_region_type((MemoryRegion *)mr), + memory_region_name(mr), + memory_region_name(mr->alias), + mr->alias_offset, + mr->alias_offset + MR_SIZE(mr->size), + mr->enabled ? "" : " [disabled]"); if (owner) { - mtree_print_mr_owner(mon_printf, f, mr); + mtree_print_mr_owner(mr); } } else { - mon_printf(f, - TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s%s): %s%s", - cur_start, cur_end, - mr->priority, - mr->nonvolatile ? "nv-" : "", - memory_region_type((MemoryRegion *)mr), - memory_region_name(mr), - mr->enabled ? "" : " [disabled]"); + qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx + " (prio %d, %s%s): %s%s", + cur_start, cur_end, + mr->priority, + mr->nonvolatile ? "nv-" : "", + memory_region_type((MemoryRegion *)mr), + memory_region_name(mr), + mr->enabled ? "" : " [disabled]"); if (owner) { - mtree_print_mr_owner(mon_printf, f, mr); + mtree_print_mr_owner(mr); } } - mon_printf(f, "\n"); + qemu_printf("\n"); QTAILQ_INIT(&submr_print_queue); @@ -2929,7 +2934,7 @@ static void mtree_print_mr(fprintf_function mon_printf, void *f, } QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) { - mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start, + mtree_print_mr(ml->mr, level + 1, cur_start, alias_print_queue, owner); } @@ -2939,8 +2944,6 @@ static void mtree_print_mr(fprintf_function mon_printf, void *f, } struct FlatViewInfo { - fprintf_function mon_printf; - void *f; int counter; bool dispatch_tree; bool owner; @@ -2952,70 +2955,71 @@ static void mtree_print_flatview(gpointer key, gpointer value, FlatView *view = key; GArray *fv_address_spaces = value; struct FlatViewInfo *fvi = user_data; - fprintf_function p = fvi->mon_printf; - void *f = fvi->f; FlatRange *range = &view->ranges[0]; MemoryRegion *mr; int n = view->nr; int i; AddressSpace *as; - p(f, "FlatView #%d\n", fvi->counter); + qemu_printf("FlatView #%d\n", fvi->counter); ++fvi->counter; for (i = 0; i < fv_address_spaces->len; ++i) { as = g_array_index(fv_address_spaces, AddressSpace*, i); - p(f, " AS \"%s\", root: %s", as->name, memory_region_name(as->root)); + qemu_printf(" AS \"%s\", root: %s", + as->name, memory_region_name(as->root)); if (as->root->alias) { - p(f, ", alias %s", memory_region_name(as->root->alias)); + qemu_printf(", alias %s", memory_region_name(as->root->alias)); } - p(f, "\n"); + qemu_printf("\n"); } - p(f, " Root memory region: %s\n", + qemu_printf(" Root memory region: %s\n", view->root ? memory_region_name(view->root) : "(none)"); if (n <= 0) { - p(f, MTREE_INDENT "No rendered FlatView\n\n"); + qemu_printf(MTREE_INDENT "No rendered FlatView\n\n"); return; } while (n--) { mr = range->mr; if (range->offset_in_region) { - p(f, MTREE_INDENT TARGET_FMT_plx "-" - TARGET_FMT_plx " (prio %d, %s%s): %s @" TARGET_FMT_plx, - int128_get64(range->addr.start), - int128_get64(range->addr.start) + MR_SIZE(range->addr.size), - mr->priority, - range->nonvolatile ? "nv-" : "", - range->readonly ? "rom" : memory_region_type(mr), - memory_region_name(mr), - range->offset_in_region); + qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx + " (prio %d, %s%s): %s @" TARGET_FMT_plx, + int128_get64(range->addr.start), + int128_get64(range->addr.start) + + MR_SIZE(range->addr.size), + mr->priority, + range->nonvolatile ? "nv-" : "", + range->readonly ? "rom" : memory_region_type(mr), + memory_region_name(mr), + range->offset_in_region); } else { - p(f, MTREE_INDENT TARGET_FMT_plx "-" - TARGET_FMT_plx " (prio %d, %s%s): %s", - int128_get64(range->addr.start), - int128_get64(range->addr.start) + MR_SIZE(range->addr.size), - mr->priority, - range->nonvolatile ? "nv-" : "", - range->readonly ? "rom" : memory_region_type(mr), - memory_region_name(mr)); + qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx + " (prio %d, %s%s): %s", + int128_get64(range->addr.start), + int128_get64(range->addr.start) + + MR_SIZE(range->addr.size), + mr->priority, + range->nonvolatile ? "nv-" : "", + range->readonly ? "rom" : memory_region_type(mr), + memory_region_name(mr)); } if (fvi->owner) { - mtree_print_mr_owner(p, f, mr); + mtree_print_mr_owner(mr); } - p(f, "\n"); + qemu_printf("\n"); range++; } #if !defined(CONFIG_USER_ONLY) if (fvi->dispatch_tree && view->root) { - mtree_print_dispatch(p, f, view->dispatch, view->root); + mtree_print_dispatch(view->dispatch, view->root); } #endif - p(f, "\n"); + qemu_printf("\n"); } static gboolean mtree_info_flatview_free(gpointer key, gpointer value, @@ -3030,8 +3034,7 @@ static gboolean mtree_info_flatview_free(gpointer key, gpointer value, return true; } -void mtree_info(fprintf_function mon_printf, void *f, bool flatview, - bool dispatch_tree, bool owner) +void mtree_info(bool flatview, bool dispatch_tree, bool owner) { MemoryRegionListHead ml_head; MemoryRegionList *ml, *ml2; @@ -3040,8 +3043,6 @@ void mtree_info(fprintf_function mon_printf, void *f, bool flatview, if (flatview) { FlatView *view; struct FlatViewInfo fvi = { - .mon_printf = mon_printf, - .f = f, .counter = 0, .dispatch_tree = dispatch_tree, .owner = owner, @@ -3075,16 +3076,16 @@ void mtree_info(fprintf_function mon_printf, void *f, bool flatview, QTAILQ_INIT(&ml_head); QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { - mon_printf(f, "address-space: %s\n", as->name); - mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head, owner); - mon_printf(f, "\n"); + qemu_printf("address-space: %s\n", as->name); + mtree_print_mr(as->root, 1, 0, &ml_head, owner); + qemu_printf("\n"); } /* print aliased regions */ QTAILQ_FOREACH(ml, &ml_head, mrqueue) { - mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr)); - mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head, owner); - mon_printf(f, "\n"); + qemu_printf("memory-region: %s\n", memory_region_name(ml->mr)); + mtree_print_mr(ml->mr, 1, 0, &ml_head, owner); + qemu_printf("\n"); } QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) { diff --git a/migration/block-dirty-bitmap.c b/migration/block-dirty-bitmap.c index 6426151e4f..d1bb863cb6 100644 --- a/migration/block-dirty-bitmap.c +++ b/migration/block-dirty-bitmap.c @@ -261,7 +261,7 @@ static void dirty_bitmap_mig_cleanup(void) while ((dbms = QSIMPLEQ_FIRST(&dirty_bitmap_mig_state.dbms_list)) != NULL) { QSIMPLEQ_REMOVE_HEAD(&dirty_bitmap_mig_state.dbms_list, entry); - bdrv_dirty_bitmap_set_qmp_locked(dbms->bitmap, false); + bdrv_dirty_bitmap_set_busy(dbms->bitmap, false); bdrv_unref(dbms->bs); g_free(dbms); } @@ -274,6 +274,7 @@ static int init_dirty_bitmap_migration(void) BdrvDirtyBitmap *bitmap; DirtyBitmapMigBitmapState *dbms; BdrvNextIterator it; + Error *local_err = NULL; dirty_bitmap_mig_state.bulk_completed = false; dirty_bitmap_mig_state.prev_bs = NULL; @@ -301,20 +302,14 @@ static int init_dirty_bitmap_migration(void) goto fail; } - if (bdrv_dirty_bitmap_user_locked(bitmap)) { - error_report("Can't migrate a bitmap that is in use by another operation: '%s'", - bdrv_dirty_bitmap_name(bitmap)); - goto fail; - } - - if (bdrv_dirty_bitmap_readonly(bitmap)) { - error_report("Can't migrate read-only dirty bitmap: '%s", - bdrv_dirty_bitmap_name(bitmap)); + if (bdrv_dirty_bitmap_check(bitmap, BDRV_BITMAP_DEFAULT, + &local_err)) { + error_report_err(local_err); goto fail; } bdrv_ref(bs); - bdrv_dirty_bitmap_set_qmp_locked(bitmap, true); + bdrv_dirty_bitmap_set_busy(bitmap, true); dbms = g_new0(DirtyBitmapMigBitmapState, 1); dbms->bs = bs; @@ -326,7 +321,7 @@ static int init_dirty_bitmap_migration(void) if (bdrv_dirty_bitmap_enabled(bitmap)) { dbms->flags |= DIRTY_BITMAP_MIG_START_FLAG_ENABLED; } - if (bdrv_dirty_bitmap_get_persistance(bitmap)) { + if (bdrv_dirty_bitmap_get_persistence(bitmap)) { dbms->flags |= DIRTY_BITMAP_MIG_START_FLAG_PERSISTENT; } @@ -478,7 +473,7 @@ static int dirty_bitmap_load_start(QEMUFile *f, DirtyBitmapLoadState *s) } if (flags & DIRTY_BITMAP_MIG_START_FLAG_PERSISTENT) { - bdrv_dirty_bitmap_set_persistance(s->bitmap, true); + bdrv_dirty_bitmap_set_persistence(s->bitmap, true); } bdrv_disable_dirty_bitmap(s->bitmap); @@ -542,7 +537,7 @@ static void dirty_bitmap_load_complete(QEMUFile *f, DirtyBitmapLoadState *s) } } - if (bdrv_dirty_bitmap_frozen(s->bitmap)) { + if (bdrv_dirty_bitmap_has_successor(s->bitmap)) { bdrv_dirty_bitmap_lock(s->bitmap); if (enabled_bitmaps == NULL) { /* in postcopy */ diff --git a/migration/colo.c b/migration/colo.c index 5ba610dc01..238a6d62c7 100644 --- a/migration/colo.c +++ b/migration/colo.c @@ -38,6 +38,9 @@ static bool vmstate_loading; static Notifier packets_compare_notifier; +/* User need to know colo mode after COLO failover */ +static COLOMode last_colo_mode; + #define COLO_BUFFER_BASE_SIZE (4 * 1024 * 1024) bool migration_in_colo_state(void) @@ -121,6 +124,7 @@ static void secondary_vm_do_failover(void) } /* Notify COLO incoming thread that failover work is finished */ qemu_sem_post(&mis->colo_incoming_sem); + /* For Secondary VM, jump to incoming co */ if (mis->migration_incoming_co) { qemu_coroutine_enter(mis->migration_incoming_co); @@ -196,10 +200,16 @@ void colo_do_failover(MigrationState *s) vm_stop_force_state(RUN_STATE_COLO); } - if (get_colo_mode() == COLO_MODE_PRIMARY) { + switch (get_colo_mode()) { + case COLO_MODE_PRIMARY: primary_vm_do_failover(); - } else { + break; + case COLO_MODE_SECONDARY: secondary_vm_do_failover(); + break; + default: + error_report("colo_do_failover failed because the colo mode" + " could not be obtained"); } } @@ -257,16 +267,21 @@ COLOStatus *qmp_query_colo_status(Error **errp) COLOStatus *s = g_new0(COLOStatus, 1); s->mode = get_colo_mode(); + s->last_mode = last_colo_mode; switch (failover_get_state()) { case FAILOVER_STATUS_NONE: s->reason = COLO_EXIT_REASON_NONE; break; - case FAILOVER_STATUS_REQUIRE: + case FAILOVER_STATUS_COMPLETED: s->reason = COLO_EXIT_REASON_REQUEST; break; default: - s->reason = COLO_EXIT_REASON_ERROR; + if (migration_in_colo_state()) { + s->reason = COLO_EXIT_REASON_PROCESSING; + } else { + s->reason = COLO_EXIT_REASON_ERROR; + } } return s; @@ -504,6 +519,12 @@ static void colo_process_checkpoint(MigrationState *s) Error *local_err = NULL; int ret; + last_colo_mode = get_colo_mode(); + if (last_colo_mode != COLO_MODE_PRIMARY) { + error_report("COLO mode must be COLO_MODE_PRIMARY"); + return; + } + failover_init_state(); s->rp_state.from_dst_file = qemu_file_get_return_path(s->to_dst_file); @@ -578,16 +599,13 @@ out: * or the user triggered failover. */ switch (failover_get_state()) { - case FAILOVER_STATUS_NONE: - qapi_event_send_colo_exit(COLO_MODE_PRIMARY, - COLO_EXIT_REASON_ERROR); - break; - case FAILOVER_STATUS_REQUIRE: + case FAILOVER_STATUS_COMPLETED: qapi_event_send_colo_exit(COLO_MODE_PRIMARY, COLO_EXIT_REASON_REQUEST); break; default: - abort(); + qapi_event_send_colo_exit(COLO_MODE_PRIMARY, + COLO_EXIT_REASON_ERROR); } /* Hope this not to be too long to wait here */ @@ -680,6 +698,12 @@ void *colo_process_incoming_thread(void *opaque) migrate_set_state(&mis->state, MIGRATION_STATUS_ACTIVE, MIGRATION_STATUS_COLO); + last_colo_mode = get_colo_mode(); + if (last_colo_mode != COLO_MODE_SECONDARY) { + error_report("COLO mode must be COLO_MODE_SECONDARY"); + return NULL; + } + failover_init_state(); mis->to_src_file = qemu_file_get_return_path(mis->from_src_file); @@ -849,17 +873,18 @@ out: error_report_err(local_err); } + /* + * There are only two reasons we can get here, some error happened + * or the user triggered failover. + */ switch (failover_get_state()) { - case FAILOVER_STATUS_NONE: - qapi_event_send_colo_exit(COLO_MODE_SECONDARY, - COLO_EXIT_REASON_ERROR); - break; - case FAILOVER_STATUS_REQUIRE: + case FAILOVER_STATUS_COMPLETED: qapi_event_send_colo_exit(COLO_MODE_SECONDARY, COLO_EXIT_REASON_REQUEST); break; default: - abort(); + qapi_event_send_colo_exit(COLO_MODE_SECONDARY, + COLO_EXIT_REASON_ERROR); } if (fb) { diff --git a/migration/migration.c b/migration/migration.c index df6fd8e0e5..609e0df5d0 100644 --- a/migration/migration.c +++ b/migration/migration.c @@ -82,7 +82,6 @@ /* The delay time (in ms) between two COLO checkpoints */ #define DEFAULT_MIGRATE_X_CHECKPOINT_DELAY (200 * 100) #define DEFAULT_MIGRATE_MULTIFD_CHANNELS 2 -#define DEFAULT_MIGRATE_MULTIFD_PAGE_COUNT 16 /* Background transfer rate for postcopy, 0 means unlimited, note * that page requests can still exceed this limit. @@ -758,6 +757,8 @@ MigrationParameters *qmp_query_migrate_parameters(Error **errp) params->tls_creds = g_strdup(s->parameters.tls_creds); params->has_tls_hostname = true; params->tls_hostname = g_strdup(s->parameters.tls_hostname); + params->has_tls_authz = true; + params->tls_authz = g_strdup(s->parameters.tls_authz); params->has_max_bandwidth = true; params->max_bandwidth = s->parameters.max_bandwidth; params->has_downtime_limit = true; @@ -766,10 +767,8 @@ MigrationParameters *qmp_query_migrate_parameters(Error **errp) params->x_checkpoint_delay = s->parameters.x_checkpoint_delay; params->has_block_incremental = true; params->block_incremental = s->parameters.block_incremental; - params->has_x_multifd_channels = true; - params->x_multifd_channels = s->parameters.x_multifd_channels; - params->has_x_multifd_page_count = true; - params->x_multifd_page_count = s->parameters.x_multifd_page_count; + params->has_multifd_channels = true; + params->multifd_channels = s->parameters.multifd_channels; params->has_xbzrle_cache_size = true; params->xbzrle_cache_size = s->parameters.xbzrle_cache_size; params->has_max_postcopy_bandwidth = true; @@ -1152,20 +1151,12 @@ static bool migrate_params_check(MigrationParameters *params, Error **errp) /* x_checkpoint_delay is now always positive */ - if (params->has_x_multifd_channels && (params->x_multifd_channels < 1)) { + if (params->has_multifd_channels && (params->multifd_channels < 1)) { error_setg(errp, QERR_INVALID_PARAMETER_VALUE, "multifd_channels", "is invalid, it should be in the range of 1 to 255"); return false; } - if (params->has_x_multifd_page_count && - (params->x_multifd_page_count < 1 || - params->x_multifd_page_count > 10000)) { - error_setg(errp, QERR_INVALID_PARAMETER_VALUE, - "multifd_page_count", - "is invalid, it should be in the range of 1 to 10000"); - return false; - } if (params->has_xbzrle_cache_size && (params->xbzrle_cache_size < qemu_target_page_size() || @@ -1274,11 +1265,8 @@ static void migrate_params_test_apply(MigrateSetParameters *params, if (params->has_block_incremental) { dest->block_incremental = params->block_incremental; } - if (params->has_x_multifd_channels) { - dest->x_multifd_channels = params->x_multifd_channels; - } - if (params->has_x_multifd_page_count) { - dest->x_multifd_page_count = params->x_multifd_page_count; + if (params->has_multifd_channels) { + dest->multifd_channels = params->multifd_channels; } if (params->has_xbzrle_cache_size) { dest->xbzrle_cache_size = params->xbzrle_cache_size; @@ -1345,9 +1333,15 @@ static void migrate_params_apply(MigrateSetParameters *params, Error **errp) s->parameters.tls_hostname = g_strdup(params->tls_hostname->u.s); } + if (params->has_tls_authz) { + g_free(s->parameters.tls_authz); + assert(params->tls_authz->type == QTYPE_QSTRING); + s->parameters.tls_authz = g_strdup(params->tls_authz->u.s); + } + if (params->has_max_bandwidth) { s->parameters.max_bandwidth = params->max_bandwidth; - if (s->to_dst_file) { + if (s->to_dst_file && !migration_in_postcopy()) { qemu_file_set_rate_limit(s->to_dst_file, s->parameters.max_bandwidth / XFER_LIMIT_RATIO); } @@ -1367,11 +1361,8 @@ static void migrate_params_apply(MigrateSetParameters *params, Error **errp) if (params->has_block_incremental) { s->parameters.block_incremental = params->block_incremental; } - if (params->has_x_multifd_channels) { - s->parameters.x_multifd_channels = params->x_multifd_channels; - } - if (params->has_x_multifd_page_count) { - s->parameters.x_multifd_page_count = params->x_multifd_page_count; + if (params->has_multifd_channels) { + s->parameters.multifd_channels = params->multifd_channels; } if (params->has_xbzrle_cache_size) { s->parameters.xbzrle_cache_size = params->xbzrle_cache_size; @@ -1379,6 +1370,10 @@ static void migrate_params_apply(MigrateSetParameters *params, Error **errp) } if (params->has_max_postcopy_bandwidth) { s->parameters.max_postcopy_bandwidth = params->max_postcopy_bandwidth; + if (s->to_dst_file && migration_in_postcopy()) { + qemu_file_set_rate_limit(s->to_dst_file, + s->parameters.max_postcopy_bandwidth / XFER_LIMIT_RATIO); + } } if (params->has_max_cpu_throttle) { s->parameters.max_cpu_throttle = params->max_cpu_throttle; @@ -1651,7 +1646,11 @@ bool migration_in_postcopy_after_devices(MigrationState *s) bool migration_is_idle(void) { - MigrationState *s = migrate_get_current(); + MigrationState *s = current_migration; + + if (!s) { + return true; + } switch (s->state) { case MIGRATION_STATUS_NONE: @@ -1712,7 +1711,7 @@ static GSList *migration_blockers; int migrate_add_blocker(Error *reason, Error **errp) { - if (migrate_get_current()->only_migratable) { + if (only_migratable) { error_propagate_prepend(errp, error_copy(reason), "disallowing migration blocker " "(--only_migratable) for: "); @@ -2130,7 +2129,7 @@ bool migrate_use_multifd(void) s = migrate_get_current(); - return s->enabled_capabilities[MIGRATION_CAPABILITY_X_MULTIFD]; + return s->enabled_capabilities[MIGRATION_CAPABILITY_MULTIFD]; } bool migrate_pause_before_switchover(void) @@ -2149,16 +2148,7 @@ int migrate_multifd_channels(void) s = migrate_get_current(); - return s->parameters.x_multifd_channels; -} - -int migrate_multifd_page_count(void) -{ - MigrationState *s; - - s = migrate_get_current(); - - return s->parameters.x_multifd_page_count; + return s->parameters.multifd_channels; } int migrate_use_xbzrle(void) @@ -3351,7 +3341,7 @@ void migration_global_dump(Monitor *mon) monitor_printf(mon, "store-global-state: %s\n", ms->store_global_state ? "on" : "off"); monitor_printf(mon, "only-migratable: %s\n", - ms->only_migratable ? "on" : "off"); + only_migratable ? "on" : "off"); monitor_printf(mon, "send-configuration: %s\n", ms->send_configuration ? "on" : "off"); monitor_printf(mon, "send-section-footer: %s\n", @@ -3366,7 +3356,6 @@ void migration_global_dump(Monitor *mon) static Property migration_properties[] = { DEFINE_PROP_BOOL("store-global-state", MigrationState, store_global_state, true), - DEFINE_PROP_BOOL("only-migratable", MigrationState, only_migratable, false), DEFINE_PROP_BOOL("send-configuration", MigrationState, send_configuration, true), DEFINE_PROP_BOOL("send-section-footer", MigrationState, @@ -3400,12 +3389,9 @@ static Property migration_properties[] = { DEFINE_PROP_UINT32("x-checkpoint-delay", MigrationState, parameters.x_checkpoint_delay, DEFAULT_MIGRATE_X_CHECKPOINT_DELAY), - DEFINE_PROP_UINT8("x-multifd-channels", MigrationState, - parameters.x_multifd_channels, + DEFINE_PROP_UINT8("multifd-channels", MigrationState, + parameters.multifd_channels, DEFAULT_MIGRATE_MULTIFD_CHANNELS), - DEFINE_PROP_UINT32("x-multifd-page-count", MigrationState, - parameters.x_multifd_page_count, - DEFAULT_MIGRATE_MULTIFD_PAGE_COUNT), DEFINE_PROP_SIZE("xbzrle-cache-size", MigrationState, parameters.xbzrle_cache_size, DEFAULT_MIGRATE_XBZRLE_CACHE_SIZE), @@ -3440,7 +3426,7 @@ static Property migration_properties[] = { DEFINE_PROP_MIG_CAP("x-release-ram", MIGRATION_CAPABILITY_RELEASE_RAM), DEFINE_PROP_MIG_CAP("x-block", MIGRATION_CAPABILITY_BLOCK), DEFINE_PROP_MIG_CAP("x-return-path", MIGRATION_CAPABILITY_RETURN_PATH), - DEFINE_PROP_MIG_CAP("x-multifd", MIGRATION_CAPABILITY_X_MULTIFD), + DEFINE_PROP_MIG_CAP("x-multifd", MIGRATION_CAPABILITY_MULTIFD), DEFINE_PROP_END_OF_LIST(), }; @@ -3494,8 +3480,7 @@ static void migration_instance_init(Object *obj) params->has_downtime_limit = true; params->has_x_checkpoint_delay = true; params->has_block_incremental = true; - params->has_x_multifd_channels = true; - params->has_x_multifd_page_count = true; + params->has_multifd_channels = true; params->has_xbzrle_cache_size = true; params->has_max_postcopy_bandwidth = true; params->has_max_cpu_throttle = true; diff --git a/migration/migration.h b/migration/migration.h index 99e99e56bd..438f17edad 100644 --- a/migration/migration.h +++ b/migration/migration.h @@ -219,9 +219,6 @@ struct MigrationState */ bool store_global_state; - /* Whether the VM is only allowing for migratable devices */ - bool only_migratable; - /* Whether we send QEMU_VM_CONFIGURATION during migration */ bool send_configuration; /* Whether we send section footer during migration */ @@ -274,7 +271,6 @@ bool migrate_auto_converge(void); bool migrate_use_multifd(void); bool migrate_pause_before_switchover(void); int migrate_multifd_channels(void); -int migrate_multifd_page_count(void); int migrate_use_xbzrle(void); int64_t migrate_xbzrle_cache_size(void); diff --git a/migration/ram.c b/migration/ram.c index 35bd6213e9..1ca9ba77b6 100644 --- a/migration/ram.c +++ b/migration/ram.c @@ -583,20 +583,29 @@ exit: #define MULTIFD_FLAG_SYNC (1 << 0) +/* This value needs to be a multiple of qemu_target_page_size() */ +#define MULTIFD_PACKET_SIZE (512 * 1024) + typedef struct { uint32_t magic; uint32_t version; unsigned char uuid[16]; /* QemuUUID */ uint8_t id; + uint8_t unused1[7]; /* Reserved for future use */ + uint64_t unused2[4]; /* Reserved for future use */ } __attribute__((packed)) MultiFDInit_t; typedef struct { uint32_t magic; uint32_t version; uint32_t flags; - uint32_t size; - uint32_t used; + /* maximum number of allocated pages */ + uint32_t pages_alloc; + uint32_t pages_used; + /* size of the next packet that contains pages */ + uint32_t next_packet_size; uint64_t packet_num; + uint64_t unused[4]; /* Reserved for future use */ char ramblock[256]; uint64_t offset[]; } __attribute__((packed)) MultiFDPacket_t; @@ -643,6 +652,8 @@ typedef struct { MultiFDPacket_t *packet; /* multifd flags for each packet */ uint32_t flags; + /* size of the next packet that contains pages */ + uint32_t next_packet_size; /* global number of generated multifd packets */ uint64_t packet_num; /* thread local variables */ @@ -679,6 +690,8 @@ typedef struct { /* global number of generated multifd packets */ uint64_t packet_num; /* thread local variables */ + /* size of the next packet that contains pages */ + uint32_t next_packet_size; /* packets sent through this channel */ uint64_t num_packets; /* pages sent through this channel */ @@ -776,13 +789,15 @@ static void multifd_pages_clear(MultiFDPages_t *pages) static void multifd_send_fill_packet(MultiFDSendParams *p) { MultiFDPacket_t *packet = p->packet; + uint32_t page_max = MULTIFD_PACKET_SIZE / qemu_target_page_size(); int i; packet->magic = cpu_to_be32(MULTIFD_MAGIC); packet->version = cpu_to_be32(MULTIFD_VERSION); packet->flags = cpu_to_be32(p->flags); - packet->size = cpu_to_be32(migrate_multifd_page_count()); - packet->used = cpu_to_be32(p->pages->used); + packet->pages_alloc = cpu_to_be32(page_max); + packet->pages_used = cpu_to_be32(p->pages->used); + packet->next_packet_size = cpu_to_be32(p->next_packet_size); packet->packet_num = cpu_to_be64(p->packet_num); if (p->pages->block) { @@ -797,6 +812,7 @@ static void multifd_send_fill_packet(MultiFDSendParams *p) static int multifd_recv_unfill_packet(MultiFDRecvParams *p, Error **errp) { MultiFDPacket_t *packet = p->packet; + uint32_t pages_max = MULTIFD_PACKET_SIZE / qemu_target_page_size(); RAMBlock *block; int i; @@ -818,22 +834,35 @@ static int multifd_recv_unfill_packet(MultiFDRecvParams *p, Error **errp) p->flags = be32_to_cpu(packet->flags); - packet->size = be32_to_cpu(packet->size); - if (packet->size > migrate_multifd_page_count()) { + packet->pages_alloc = be32_to_cpu(packet->pages_alloc); + /* + * If we recevied a packet that is 100 times bigger than expected + * just stop migration. It is a magic number. + */ + if (packet->pages_alloc > pages_max * 100) { error_setg(errp, "multifd: received packet " - "with size %d and expected maximum size %d", - packet->size, migrate_multifd_page_count()) ; + "with size %d and expected a maximum size of %d", + packet->pages_alloc, pages_max * 100) ; return -1; } + /* + * We received a packet that is bigger than expected but inside + * reasonable limits (see previous comment). Just reallocate. + */ + if (packet->pages_alloc > p->pages->allocated) { + multifd_pages_clear(p->pages); + p->pages = multifd_pages_init(packet->pages_alloc); + } - p->pages->used = be32_to_cpu(packet->used); - if (p->pages->used > packet->size) { + p->pages->used = be32_to_cpu(packet->pages_used); + if (p->pages->used > packet->pages_alloc) { error_setg(errp, "multifd: received packet " - "with size %d and expected maximum size %d", - p->pages->used, packet->size) ; + "with %d pages and expected maximum pages are %d", + p->pages->used, packet->pages_alloc) ; return -1; } + p->next_packet_size = be32_to_cpu(packet->next_packet_size); p->packet_num = be64_to_cpu(packet->packet_num); if (p->pages->used) { @@ -1073,6 +1102,7 @@ static void *multifd_send_thread(void *opaque) uint64_t packet_num = p->packet_num; uint32_t flags = p->flags; + p->next_packet_size = used * qemu_target_page_size(); multifd_send_fill_packet(p); p->flags = 0; p->num_packets++; @@ -1080,7 +1110,8 @@ static void *multifd_send_thread(void *opaque) p->pages->used = 0; qemu_mutex_unlock(&p->mutex); - trace_multifd_send(p->id, packet_num, used, flags); + trace_multifd_send(p->id, packet_num, used, flags, + p->next_packet_size); ret = qio_channel_write_all(p->c, (void *)p->packet, p->packet_len, &local_err); @@ -1088,9 +1119,12 @@ static void *multifd_send_thread(void *opaque) break; } - ret = qio_channel_writev_all(p->c, p->pages->iov, used, &local_err); - if (ret != 0) { - break; + if (used) { + ret = qio_channel_writev_all(p->c, p->pages->iov, + used, &local_err); + if (ret != 0) { + break; + } } qemu_mutex_lock(&p->mutex); @@ -1148,7 +1182,7 @@ static void multifd_new_send_channel_async(QIOTask *task, gpointer opaque) int multifd_save_setup(void) { int thread_count; - uint32_t page_count = migrate_multifd_page_count(); + uint32_t page_count = MULTIFD_PACKET_SIZE / qemu_target_page_size(); uint8_t i; if (!migrate_use_multifd()) { @@ -1312,14 +1346,18 @@ static void *multifd_recv_thread(void *opaque) used = p->pages->used; flags = p->flags; - trace_multifd_recv(p->id, p->packet_num, used, flags); + trace_multifd_recv(p->id, p->packet_num, used, flags, + p->next_packet_size); p->num_packets++; p->num_pages += used; qemu_mutex_unlock(&p->mutex); - ret = qio_channel_readv_all(p->c, p->pages->iov, used, &local_err); - if (ret != 0) { - break; + if (used) { + ret = qio_channel_readv_all(p->c, p->pages->iov, + used, &local_err); + if (ret != 0) { + break; + } } if (flags & MULTIFD_FLAG_SYNC) { @@ -1344,7 +1382,7 @@ static void *multifd_recv_thread(void *opaque) int multifd_load_setup(void) { int thread_count; - uint32_t page_count = migrate_multifd_page_count(); + uint32_t page_count = MULTIFD_PACKET_SIZE / qemu_target_page_size(); uint8_t i; if (!migrate_use_multifd()) { @@ -3880,6 +3918,7 @@ int colo_init_ram_cache(void) } ram_state = g_new0(RAMState, 1); ram_state->migration_dirty_pages = 0; + qemu_mutex_init(&ram_state->bitmap_mutex); memory_global_dirty_log_start(); return 0; @@ -3918,6 +3957,7 @@ void colo_release_ram_cache(void) } rcu_read_unlock(); + qemu_mutex_destroy(&ram_state->bitmap_mutex); g_free(ram_state); ram_state = NULL; } diff --git a/migration/rdma.c b/migration/rdma.c index 63c118af09..c1bcece53b 100644 --- a/migration/rdma.c +++ b/migration/rdma.c @@ -641,10 +641,14 @@ static int qemu_rdma_init_one_block(RAMBlock *rb, void *opaque) static int qemu_rdma_init_ram_blocks(RDMAContext *rdma) { RDMALocalBlocks *local = &rdma->local_ram_blocks; + int ret; assert(rdma->blockmap == NULL); memset(local, 0, sizeof *local); - foreach_not_ignored_block(qemu_rdma_init_one_block, rdma); + ret = foreach_not_ignored_block(qemu_rdma_init_one_block, rdma); + if (ret) { + return ret; + } trace_qemu_rdma_init_ram_blocks(local->nb_blocks); rdma->dest_blocks = g_new0(RDMADestBlock, rdma->local_ram_blocks.nb_blocks); diff --git a/migration/savevm.c b/migration/savevm.c index 1415001d1c..34bcad3807 100644 --- a/migration/savevm.c +++ b/migration/savevm.c @@ -2844,7 +2844,7 @@ void vmstate_register_ram_global(MemoryRegion *mr) bool vmstate_check_only_migratable(const VMStateDescription *vmsd) { /* check needed if --only-migratable is specified */ - if (!migrate_get_current()->only_migratable) { + if (!only_migratable) { return true; } diff --git a/migration/socket.c b/migration/socket.c index 239527fb1f..49bacf78fd 100644 --- a/migration/socket.c +++ b/migration/socket.c @@ -199,6 +199,7 @@ static void socket_start_incoming_migration(SocketAddress *saddr, return; } migrate_add_address(address); + qapi_free_SocketAddress(address); } } diff --git a/migration/tls.c b/migration/tls.c index 3b9e8c9263..5171afc6c4 100644 --- a/migration/tls.c +++ b/migration/tls.c @@ -94,7 +94,7 @@ void migration_tls_channel_process_incoming(MigrationState *s, tioc = qio_channel_tls_new_server( ioc, creds, - NULL, /* XXX pass ACL name */ + s->parameters.tls_authz, errp); if (!tioc) { return; diff --git a/migration/trace-events b/migration/trace-events index 72e3fcb885..de2e136e57 100644 --- a/migration/trace-events +++ b/migration/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# migration/savevm.c +# savevm.c qemu_loadvm_state_section(unsigned int section_type) "%d" qemu_loadvm_state_section_command(int ret) "%d" qemu_loadvm_state_section_partend(uint32_t section_id) "%u" @@ -46,14 +46,11 @@ savevm_state_iterate(void) "" savevm_state_cleanup(void) "" savevm_state_complete_precopy(void) "" vmstate_save(const char *idstr, const char *vmsd_name) "%s, %s" -vmstate_save_state_pre_save_res(const char *name, int res) "%s/%d" -vmstate_save_state_loop(const char *name, const char *field, int n_elems) "%s/%s[%d]" -vmstate_save_state_top(const char *idstr) "%s" -vmstate_subsection_save_loop(const char *name, const char *sub) "%s/%s" -vmstate_subsection_save_top(const char *idstr) "%s" vmstate_load(const char *idstr, const char *vmsd_name) "%s, %s" +postcopy_pause_incoming(void) "" +postcopy_pause_incoming_continued(void) "" -# migration/vmstate.c +# vmstate.c vmstate_load_field_error(const char *field, int ret) "field \"%s\" load failed, ret = %d" vmstate_load_state(const char *name, int version_id) "%s v%d" vmstate_load_state_end(const char *name, const char *reason, int val) "%s %s/%d" @@ -62,27 +59,34 @@ vmstate_n_elems(const char *name, int n_elems) "%s: %d" vmstate_subsection_load(const char *parent) "%s" vmstate_subsection_load_bad(const char *parent, const char *sub, const char *sub2) "%s: %s/%s" vmstate_subsection_load_good(const char *parent) "%s" +vmstate_save_state_pre_save_res(const char *name, int res) "%s/%d" +vmstate_save_state_loop(const char *name, const char *field, int n_elems) "%s/%s[%d]" +vmstate_save_state_top(const char *idstr) "%s" +vmstate_subsection_save_loop(const char *name, const char *sub) "%s/%s" +vmstate_subsection_save_top(const char *idstr) "%s" + +# vmstate-types.c get_qtailq(const char *name, int version_id) "%s v%d" get_qtailq_end(const char *name, const char *reason, int val) "%s %s/%d" put_qtailq(const char *name, int version_id) "%s v%d" put_qtailq_end(const char *name, const char *reason) "%s %s" -# migration/qemu-file.c +# qemu-file.c qemu_file_fclose(void) "" -# migration/ram.c +# ram.c get_queued_page(const char *block_name, uint64_t tmp_offset, unsigned long page_abs) "%s/0x%" PRIx64 " page_abs=0x%lx" get_queued_page_not_dirty(const char *block_name, uint64_t tmp_offset, unsigned long page_abs, int sent) "%s/0x%" PRIx64 " page_abs=0x%lx (sent=%d)" migration_bitmap_sync_start(void) "" migration_bitmap_sync_end(uint64_t dirty_pages) "dirty_pages %" PRIu64 migration_throttle(void) "" -multifd_recv(uint8_t id, uint64_t packet_num, uint32_t used, uint32_t flags) "channel %d packet number %" PRIu64 " pages %d flags 0x%x" +multifd_recv(uint8_t id, uint64_t packet_num, uint32_t used, uint32_t flags, uint32_t next_packet_size) "channel %d packet number %" PRIu64 " pages %d flags 0x%x next packet size %d" multifd_recv_sync_main(long packet_num) "packet num %ld" multifd_recv_sync_main_signal(uint8_t id) "channel %d" multifd_recv_sync_main_wait(uint8_t id) "channel %d" multifd_recv_thread_end(uint8_t id, uint64_t packets, uint64_t pages) "channel %d packets %" PRIu64 " pages %" PRIu64 multifd_recv_thread_start(uint8_t id) "%d" -multifd_send(uint8_t id, uint64_t packet_num, uint32_t used, uint32_t flags) "channel %d packet_num %" PRIu64 " pages %d flags 0x%x" +multifd_send(uint8_t id, uint64_t packet_num, uint32_t used, uint32_t flags, uint32_t next_packet_size) "channel %d packet_num %" PRIu64 " pages %d flags 0x%x next packet size %d" multifd_send_sync_main(long packet_num) "packet num %ld" multifd_send_sync_main_signal(uint8_t id) "channel %d" multifd_send_sync_main_wait(uint8_t id) "channel %d" @@ -103,8 +107,12 @@ ram_dirty_bitmap_sync_complete(void) "" ram_state_resume_prepare(uint64_t v) "%" PRId64 colo_flush_ram_cache_begin(uint64_t dirty_pages) "dirty_pages %" PRIu64 colo_flush_ram_cache_end(void) "" +save_xbzrle_page_skipping(void) "" +save_xbzrle_page_overflow(void) "" +ram_save_iterate_big_wait(uint64_t milliconds, int iterations) "big wait: %" PRIu64 " milliseconds, %d iterations" +ram_load_complete(int ret, uint64_t seq_iter) "exit_code %d seq iteration %" PRIu64 -# migration/migration.c +# migration.c await_return_path_close_on_source_close(void) "" await_return_path_close_on_source_joining(void) "" migrate_set_state(const char *new_state) "new state %s" @@ -130,11 +138,7 @@ open_return_path_on_source_continue(void) "" postcopy_start(void) "" postcopy_pause_return_path(void) "" postcopy_pause_return_path_continued(void) "" -postcopy_pause_fault_thread(void) "" -postcopy_pause_fault_thread_continued(void) "" postcopy_pause_continued(void) "" -postcopy_pause_incoming(void) "" -postcopy_pause_incoming_continued(void) "" postcopy_start_set_run(void) "" source_return_path_thread_bad_end(void) "" source_return_path_thread_end(void) "" @@ -143,19 +147,21 @@ source_return_path_thread_loop_top(void) "" source_return_path_thread_pong(uint32_t val) "0x%x" source_return_path_thread_shut(uint32_t val) "0x%x" source_return_path_thread_resume_ack(uint32_t v) "%"PRIu32 -migrate_global_state_post_load(const char *state) "loaded state: %s" -migrate_global_state_pre_save(const char *state) "saved state: %s" migration_thread_low_pending(uint64_t pending) "%" PRIu64 -migrate_state_too_big(void) "" migrate_transferred(uint64_t tranferred, uint64_t time_spent, uint64_t bandwidth, uint64_t size) "transferred %" PRIu64 " time_spent %" PRIu64 " bandwidth %" PRIu64 " max_size %" PRId64 process_incoming_migration_co_end(int ret, int ps) "ret=%d postcopy-state=%d" process_incoming_migration_co_postcopy_end_main(void) "" + +# channel.c migration_set_incoming_channel(void *ioc, const char *ioctype) "ioc=%p ioctype=%s" migration_set_outgoing_channel(void *ioc, const char *ioctype, const char *hostname, void *err) "ioc=%p ioctype=%s hostname=%s err=%p" -mark_postcopy_blocktime_begin(uint64_t addr, void *dd, uint32_t time, int cpu, int received) "addr: 0x%" PRIx64 ", dd: %p, time: %u, cpu: %d, already_received: %d" -mark_postcopy_blocktime_end(uint64_t addr, void *dd, uint32_t time, int affected_cpu) "addr: 0x%" PRIx64 ", dd: %p, time: %u, affected_cpu: %d" -# migration/rdma.c +# global_state.c +migrate_state_too_big(void) "" +migrate_global_state_post_load(const char *state) "loaded state: %s" +migrate_global_state_pre_save(const char *state) "saved state: %s" + +# rdma.c qemu_rdma_accept_incoming_migration(void) "" qemu_rdma_accept_incoming_migration_accepted(void) "" qemu_rdma_accept_pin_state(bool pin) "%d" @@ -217,7 +223,7 @@ rdma_start_incoming_migration_after_rdma_listen(void) "" rdma_start_outgoing_migration_after_rdma_connect(void) "" rdma_start_outgoing_migration_after_rdma_source_init(void) "" -# migration/postcopy-ram.c +# postcopy-ram.c postcopy_discard_send_finish(const char *ramblock, int nwords, int ncmds) "%s mask words sent=%d in %d commands" postcopy_discard_send_range(const char *ramblock, unsigned long start, unsigned long length) "%s:%lx/%lx" postcopy_cleanup_range(const char *ramblock, void *host_addr, size_t offset, size_t length) "%s: %p offset=0x%zx length=0x%zx" @@ -226,6 +232,10 @@ postcopy_nhp_range(const char *ramblock, void *host_addr, size_t offset, size_t postcopy_place_page(void *host_addr) "host=%p" postcopy_place_page_zero(void *host_addr) "host=%p" postcopy_ram_enable_notify(void) "" +mark_postcopy_blocktime_begin(uint64_t addr, void *dd, uint32_t time, int cpu, int received) "addr: 0x%" PRIx64 ", dd: %p, time: %u, cpu: %d, already_received: %d" +mark_postcopy_blocktime_end(uint64_t addr, void *dd, uint32_t time, int affected_cpu) "addr: 0x%" PRIx64 ", dd: %p, time: %u, affected_cpu: %d" +postcopy_pause_fault_thread(void) "" +postcopy_pause_fault_thread_continued(void) "" postcopy_ram_fault_thread_entry(void) "" postcopy_ram_fault_thread_exit(void) "" postcopy_ram_fault_thread_fds_core(int baseufd, int quitfd) "ufd: %d quitfd: %d" @@ -241,26 +251,22 @@ postcopy_request_shared_page(const char *sharer, const char *rb, uint64_t rb_off postcopy_request_shared_page_present(const char *sharer, const char *rb, uint64_t rb_offset) "%s already %s offset 0x%"PRIx64 postcopy_wake_shared(uint64_t client_addr, const char *rb) "at 0x%"PRIx64" in %s" -save_xbzrle_page_skipping(void) "" -save_xbzrle_page_overflow(void) "" -ram_save_iterate_big_wait(uint64_t milliconds, int iterations) "big wait: %" PRIu64 " milliseconds, %d iterations" -ram_load_complete(int ret, uint64_t seq_iter) "exit_code %d seq iteration %" PRIu64 get_mem_fault_cpu_index(int cpu, uint32_t pid) "cpu: %d, pid: %u" -# migration/exec.c +# exec.c migration_exec_outgoing(const char *cmd) "cmd=%s" migration_exec_incoming(const char *cmd) "cmd=%s" -# migration/fd.c +# fd.c migration_fd_outgoing(int fd) "fd=%d" migration_fd_incoming(int fd) "fd=%d" -# migration/socket.c +# socket.c migration_socket_incoming_accepted(void) "" migration_socket_outgoing_connected(const char *hostname) "hostname=%s" migration_socket_outgoing_error(const char *err) "error=%s" -# migration/tls.c +# tls.c migration_tls_outgoing_handshake_start(const char *hostname) "hostname=%s" migration_tls_outgoing_handshake_error(const char *err) "err=%s" migration_tls_outgoing_handshake_complete(void) "" @@ -268,13 +274,15 @@ migration_tls_incoming_handshake_start(void) "" migration_tls_incoming_handshake_error(const char *err) "err=%s" migration_tls_incoming_handshake_complete(void) "" -# migration/colo.c +# colo.c colo_vm_state_change(const char *old, const char *new) "Change '%s' => '%s'" colo_send_message(const char *msg) "Send '%s' message" colo_receive_message(const char *msg) "Receive '%s' message" + +# colo-failover.c colo_failover_set_state(const char *new_state) "new state %s" -# migration/block-dirty-bitmap.c +# block-dirty-bitmap.c send_bitmap_header_enter(void) "" send_bitmap_bits(uint32_t flags, uint64_t start_sector, uint32_t nr_sectors, uint64_t data_size) "flags: 0x%x, start_sector: %" PRIu64 ", nr_sectors: %" PRIu32 ", data_size: %" PRIu64 dirty_bitmap_save_iterate(int in_postcopy) "in postcopy: %d" diff --git a/monitor.c b/monitor.c index 72061d5bae..bb48997913 100644 --- a/monitor.c +++ b/monitor.c @@ -250,8 +250,6 @@ QEMUBH *qmp_dispatcher_bh; struct QMPRequest { /* Owner of the request */ Monitor *mon; - /* "id" field of the request */ - QObject *id; /* * Request object to be handled or Error to be reported * (exactly one of them is non-null) @@ -353,7 +351,6 @@ int monitor_read_password(Monitor *mon, ReadLineFunc *readline_func, static void qmp_request_free(QMPRequest *req) { - qobject_unref(req->id); qobject_unref(req->req); error_free(req->err); g_free(req); @@ -433,15 +430,14 @@ void monitor_flush(Monitor *mon) } /* flush at every end of line */ -static void monitor_puts(Monitor *mon, const char *str) +static int monitor_puts(Monitor *mon, const char *str) { + int i; char c; qemu_mutex_lock(&mon->mon_lock); - for(;;) { - c = *str++; - if (c == '\0') - break; + for (i = 0; str[i]; i++) { + c = str[i]; if (c == '\n') { qstring_append_chr(mon->outbuf, '\r'); } @@ -451,39 +447,37 @@ static void monitor_puts(Monitor *mon, const char *str) } } qemu_mutex_unlock(&mon->mon_lock); + + return i; } -void monitor_vprintf(Monitor *mon, const char *fmt, va_list ap) +int monitor_vprintf(Monitor *mon, const char *fmt, va_list ap) { char *buf; + int n; if (!mon) - return; + return -1; if (monitor_is_qmp(mon)) { - return; + return -1; } buf = g_strdup_vprintf(fmt, ap); - monitor_puts(mon, buf); + n = monitor_puts(mon, buf); g_free(buf); + return n; } -void monitor_printf(Monitor *mon, const char *fmt, ...) +int monitor_printf(Monitor *mon, const char *fmt, ...) { - va_list ap; - va_start(ap, fmt); - monitor_vprintf(mon, fmt, ap); - va_end(ap); -} + int ret; -int monitor_fprintf(FILE *stream, const char *fmt, ...) -{ va_list ap; va_start(ap, fmt); - monitor_vprintf((Monitor *)stream, fmt, ap); + ret = monitor_vprintf(mon, fmt, ap); va_end(ap); - return 0; + return ret; } static void qmp_send_response(Monitor *mon, const QDict *rsp) @@ -1051,7 +1045,7 @@ static void hmp_trace_file(Monitor *mon, const QDict *qdict) const char *arg = qdict_get_try_str(qdict, "arg"); if (!op) { - st_print_trace_file_status((FILE *)mon, &monitor_fprintf); + st_print_trace_file_status(); } else if (!strcmp(op, "on")) { st_set_trace_file_enabled(true); } else if (!strcmp(op, "off")) { @@ -1291,7 +1285,7 @@ static void hmp_info_registers(Monitor *mon, const QDict *qdict) if (all_cpus) { CPU_FOREACH(cs) { monitor_printf(mon, "\nCPU#%d\n", cs->cpu_index); - cpu_dump_state(cs, (FILE *)mon, monitor_fprintf, CPU_DUMP_FPU); + cpu_dump_state(cs, NULL, CPU_DUMP_FPU); } } else { cs = mon_get_cpu(); @@ -1301,7 +1295,7 @@ static void hmp_info_registers(Monitor *mon, const QDict *qdict) return; } - cpu_dump_state(cs, (FILE *)mon, monitor_fprintf, CPU_DUMP_FPU); + cpu_dump_state(cs, NULL, CPU_DUMP_FPU); } } @@ -1313,13 +1307,13 @@ static void hmp_info_jit(Monitor *mon, const QDict *qdict) return; } - dump_exec_info((FILE *)mon, monitor_fprintf); - dump_drift_info((FILE *)mon, monitor_fprintf); + dump_exec_info(); + dump_drift_info(); } static void hmp_info_opcount(Monitor *mon, const QDict *qdict) { - dump_opcount_info((FILE *)mon, monitor_fprintf); + dump_opcount_info(); } #endif @@ -1331,7 +1325,7 @@ static void hmp_info_sync_profile(Monitor *mon, const QDict *qdict) enum QSPSortBy sort_by; sort_by = mean ? QSP_SORT_BY_AVG_WAIT_TIME : QSP_SORT_BY_TOTAL_WAIT_TIME; - qsp_report((FILE *)mon, monitor_fprintf, max, sort_by, coalesce); + qsp_report(max, sort_by, coalesce); } static void hmp_info_history(Monitor *mon, const QDict *qdict) @@ -1359,7 +1353,7 @@ static void hmp_info_cpustats(Monitor *mon, const QDict *qdict) monitor_printf(mon, "No CPU available\n"); return; } - cpu_dump_statistics(cs, (FILE *)mon, &monitor_fprintf, 0); + cpu_dump_statistics(cs, 0); } static void hmp_info_trace_events(Monitor *mon, const QDict *qdict) @@ -1679,6 +1673,28 @@ static void hmp_gpa2hva(Monitor *mon, const QDict *qdict) memory_region_unref(mr); } +static void hmp_gva2gpa(Monitor *mon, const QDict *qdict) +{ + target_ulong addr = qdict_get_int(qdict, "addr"); + MemTxAttrs attrs; + CPUState *cs = mon_get_cpu(); + hwaddr gpa; + + if (!cs) { + monitor_printf(mon, "No cpu\n"); + return; + } + + gpa = cpu_get_phys_page_attrs_debug(mon_get_cpu(), + addr & TARGET_PAGE_MASK, &attrs); + if (gpa == -1) { + monitor_printf(mon, "Unmapped\n"); + } else { + monitor_printf(mon, "gpa: %#" HWADDR_PRIx "\n", + gpa + (addr & ~TARGET_PAGE_MASK)); + } +} + #ifdef CONFIG_LINUX static uint64_t vtop(void *ptr, Error **errp) { @@ -1902,8 +1918,7 @@ static void hmp_info_mtree(Monitor *mon, const QDict *qdict) bool dispatch_tree = qdict_get_try_bool(qdict, "dispatch_tree", false); bool owner = qdict_get_try_bool(qdict, "owner", false); - mtree_info((fprintf_function)monitor_printf, mon, flatview, dispatch_tree, - owner); + mtree_info(flatview, dispatch_tree, owner); } static void hmp_info_numa(Monitor *mon, const QDict *qdict) @@ -4108,18 +4123,14 @@ static int monitor_can_read(void *opaque) * Null @rsp can only happen for commands with QCO_NO_SUCCESS_RESP. * Nothing is emitted then. */ -static void monitor_qmp_respond(Monitor *mon, QDict *rsp, QObject *id) +static void monitor_qmp_respond(Monitor *mon, QDict *rsp) { if (rsp) { - if (id) { - qdict_put_obj(rsp, "id", qobject_ref(id)); - } - qmp_send_response(mon, rsp); } } -static void monitor_qmp_dispatch(Monitor *mon, QObject *req, QObject *id) +static void monitor_qmp_dispatch(Monitor *mon, QObject *req) { Monitor *old_mon; QDict *rsp; @@ -4144,7 +4155,7 @@ static void monitor_qmp_dispatch(Monitor *mon, QObject *req, QObject *id) } } - monitor_qmp_respond(mon, rsp, id); + monitor_qmp_respond(mon, rsp); qobject_unref(rsp); } @@ -4208,13 +4219,15 @@ static void monitor_qmp_bh_dispatcher(void *data) mon->qmp.qmp_requests->length == QMP_REQ_QUEUE_LEN_MAX - 1; qemu_mutex_unlock(&mon->qmp.qmp_queue_lock); if (req_obj->req) { - trace_monitor_qmp_cmd_in_band(qobject_get_try_str(req_obj->id) ?: ""); - monitor_qmp_dispatch(mon, req_obj->req, req_obj->id); + QDict *qdict = qobject_to(QDict, req_obj->req); + QObject *id = qdict ? qdict_get(qdict, "id") : NULL; + trace_monitor_qmp_cmd_in_band(qobject_get_try_str(id) ?: ""); + monitor_qmp_dispatch(mon, req_obj->req); } else { assert(req_obj->err); rsp = qmp_error_response(req_obj->err); req_obj->err = NULL; - monitor_qmp_respond(mon, rsp, NULL); + monitor_qmp_respond(mon, rsp); qobject_unref(rsp); } @@ -4239,8 +4252,7 @@ static void handle_qmp_command(void *opaque, QObject *req, Error *err) qdict = qobject_to(QDict, req); if (qdict) { - id = qobject_ref(qdict_get(qdict, "id")); - qdict_del(qdict, "id"); + id = qdict_get(qdict, "id"); } /* else will fail qmp_dispatch() */ if (req && trace_event_get_state_backends(TRACE_HANDLE_QMP_COMMAND)) { @@ -4251,17 +4263,14 @@ static void handle_qmp_command(void *opaque, QObject *req, Error *err) if (qdict && qmp_is_oob(qdict)) { /* OOB commands are executed immediately */ - trace_monitor_qmp_cmd_out_of_band(qobject_get_try_str(id) - ?: ""); - monitor_qmp_dispatch(mon, req, id); + trace_monitor_qmp_cmd_out_of_band(qobject_get_try_str(id) ?: ""); + monitor_qmp_dispatch(mon, req); qobject_unref(req); - qobject_unref(id); return; } req_obj = g_new0(QMPRequest, 1); req_obj->mon = mon; - req_obj->id = id; req_obj->req = req; req_obj->err = err; @@ -4281,7 +4290,7 @@ static void handle_qmp_command(void *opaque, QObject *req, Error *err) /* * Put the request to the end of queue so that requests will be - * handled in time order. Ownership for req_obj, req, id, + * handled in time order. Ownership for req_obj, req, * etc. will be delivered to the handler side. */ assert(mon->qmp.qmp_requests->length < QMP_REQ_QUEUE_LEN_MAX); @@ -4543,36 +4552,25 @@ static void monitor_readline_flush(void *opaque) } /* - * Print to current monitor if we have one, else to stream. - * TODO should return int, so callers can calculate width, but that - * requires surgery to monitor_vprintf(). Left for another day. + * Print to current monitor if we have one, else to stderr. */ -void monitor_vfprintf(FILE *stream, const char *fmt, va_list ap) +int error_vprintf(const char *fmt, va_list ap) { if (cur_mon && !monitor_cur_is_qmp()) { - monitor_vprintf(cur_mon, fmt, ap); - } else { - vfprintf(stream, fmt, ap); + return monitor_vprintf(cur_mon, fmt, ap); } + return vfprintf(stderr, fmt, ap); } -/* - * Print to current monitor if we have one, else to stderr. - * TODO should return int, so callers can calculate width, but that - * requires surgery to monitor_vprintf(). Left for another day. - */ -void error_vprintf(const char *fmt, va_list ap) -{ - monitor_vfprintf(stderr, fmt, ap); -} - -void error_vprintf_unless_qmp(const char *fmt, va_list ap) +int error_vprintf_unless_qmp(const char *fmt, va_list ap) { - if (cur_mon && !monitor_cur_is_qmp()) { - monitor_vprintf(cur_mon, fmt, ap); - } else if (!cur_mon) { - vfprintf(stderr, fmt, ap); + if (!cur_mon) { + return vfprintf(stderr, fmt, ap); } + if (!monitor_cur_is_qmp()) { + return monitor_vprintf(cur_mon, fmt, ap); + } + return -1; } static void monitor_list_append(Monitor *mon) diff --git a/nbd/client.c b/nbd/client.c index de7da48246..4de30630c7 100644 --- a/nbd/client.c +++ b/nbd/client.c @@ -426,6 +426,14 @@ static int nbd_opt_info_or_go(QIOChannel *ioc, uint32_t opt, nbd_send_opt_abort(ioc); return -1; } + if (info->min_block && + !QEMU_IS_ALIGNED(info->size, info->min_block)) { + error_setg(errp, "export size %" PRIu64 " is not multiple of " + "minimum block size %" PRIu32, info->size, + info->min_block); + nbd_send_opt_abort(ioc); + return -1; + } trace_nbd_receive_negotiate_size_flags(info->size, info->flags); break; diff --git a/nbd/server.c b/nbd/server.c index 8ddfd3e319..e21bd501dc 100644 --- a/nbd/server.c +++ b/nbd/server.c @@ -124,6 +124,8 @@ struct NBDClient { int nb_requests; bool closing; + uint32_t check_align; /* If non-zero, check for aligned client requests */ + bool structured_reply; NBDExportMetaContexts export_meta; @@ -533,6 +535,7 @@ static int nbd_negotiate_handle_info(NBDClient *client, uint16_t myflags, bool blocksize = false; uint32_t sizes[3]; char buf[sizeof(uint64_t) + sizeof(uint16_t)]; + uint32_t check_align = 0; /* Client sends: 4 bytes: L, name length (can be 0) @@ -607,13 +610,16 @@ static int nbd_negotiate_handle_info(NBDClient *client, uint16_t myflags, /* Send NBD_INFO_BLOCK_SIZE always, but tweak the minimum size * according to whether the client requested it, and according to * whether this is OPT_INFO or OPT_GO. */ - /* minimum - 1 for back-compat, or 512 if client is new enough. - * TODO: consult blk_bs(blk)->bl.request_alignment? */ - sizes[0] = - (client->opt == NBD_OPT_INFO || blocksize) ? BDRV_SECTOR_SIZE : 1; + /* minimum - 1 for back-compat, or actual if client will obey it. */ + if (client->opt == NBD_OPT_INFO || blocksize) { + check_align = sizes[0] = blk_get_request_alignment(exp->blk); + } else { + sizes[0] = 1; + } + assert(sizes[0] <= NBD_MAX_BUFFER_SIZE); /* preferred - Hard-code to 4096 for now. * TODO: is blk_bs(blk)->bl.opt_transfer appropriate? */ - sizes[1] = 4096; + sizes[1] = MAX(4096, sizes[0]); /* maximum - At most 32M, but smaller as appropriate. */ sizes[2] = MIN(blk_get_max_transfer(exp->blk), NBD_MAX_BUFFER_SIZE); trace_nbd_negotiate_handle_info_block_size(sizes[0], sizes[1], sizes[2]); @@ -637,11 +643,14 @@ static int nbd_negotiate_handle_info(NBDClient *client, uint16_t myflags, return rc; } - /* If the client is just asking for NBD_OPT_INFO, but forgot to - * request block sizes, return an error. - * TODO: consult blk_bs(blk)->request_align, and only error if it - * is not 1? */ - if (client->opt == NBD_OPT_INFO && !blocksize) { + /* + * If the client is just asking for NBD_OPT_INFO, but forgot to + * request block sizes in a situation that would impact + * performance, then return an error. But for NBD_OPT_GO, we + * tolerate all clients, regardless of alignments. + */ + if (client->opt == NBD_OPT_INFO && !blocksize && + blk_get_request_alignment(exp->blk) > 1) { return nbd_negotiate_send_rep_err(client, NBD_REP_ERR_BLOCK_SIZE_REQD, errp, @@ -657,6 +666,7 @@ static int nbd_negotiate_handle_info(NBDClient *client, uint16_t myflags, if (client->opt == NBD_OPT_GO) { client->exp = exp; + client->check_align = check_align; QTAILQ_INSERT_TAIL(&client->exp->clients, client, next); nbd_export_get(client->exp); nbd_check_meta_export(client); @@ -1510,6 +1520,10 @@ NBDExport *nbd_export_new(BlockDriverState *bs, uint64_t dev_offset, goto fail; } + if (bdrv_dirty_bitmap_check(bm, BDRV_BITMAP_ALLOW_RO, errp)) { + goto fail; + } + if ((nbdflags & NBD_FLAG_READ_ONLY) && bdrv_is_writable(bs) && bdrv_dirty_bitmap_enabled(bm)) { error_setg(errp, @@ -1518,12 +1532,7 @@ NBDExport *nbd_export_new(BlockDriverState *bs, uint64_t dev_offset, goto fail; } - if (bdrv_dirty_bitmap_user_locked(bm)) { - error_setg(errp, "Bitmap '%s' is in use", bitmap); - goto fail; - } - - bdrv_dirty_bitmap_set_qmp_locked(bm, true); + bdrv_dirty_bitmap_set_busy(bm, true); exp->export_bitmap = bm; exp->export_bitmap_context = g_strdup_printf("qemu:dirty-bitmap:%s", bitmap); @@ -1641,7 +1650,7 @@ void nbd_export_put(NBDExport *exp) } if (exp->export_bitmap) { - bdrv_dirty_bitmap_set_qmp_locked(exp->export_bitmap, false); + bdrv_dirty_bitmap_set_busy(exp->export_bitmap, false); g_free(exp->export_bitmap_context); } @@ -1878,17 +1887,12 @@ static int blockstatus_to_extents(BlockDriverState *bs, uint64_t offset, flags = (ret & BDRV_BLOCK_ALLOCATED ? 0 : NBD_STATE_HOLE) | (ret & BDRV_BLOCK_ZERO ? NBD_STATE_ZERO : 0); - offset += num; - remaining_bytes -= num; if (first_extent) { extent->flags = flags; extent->length = num; first_extent = false; - continue; - } - - if (flags == extent->flags) { + } else if (flags == extent->flags) { /* extend current extent */ extent->length += num; } else { @@ -1901,6 +1905,8 @@ static int blockstatus_to_extents(BlockDriverState *bs, uint64_t offset, extent->flags = flags; extent->length = num; } + offset += num; + remaining_bytes -= num; } extents_end = extent + 1; @@ -2127,6 +2133,17 @@ static int nbd_co_receive_request(NBDRequestData *req, NBDRequest *request, return (request->type == NBD_CMD_WRITE || request->type == NBD_CMD_WRITE_ZEROES) ? -ENOSPC : -EINVAL; } + if (client->check_align && !QEMU_IS_ALIGNED(request->from | request->len, + client->check_align)) { + /* + * The block layer gracefully handles unaligned requests, but + * it's still worth tracing client non-compliance + */ + trace_nbd_co_receive_align_compliance(nbd_cmd_lookup(request->type), + request->from, + request->len, + client->check_align); + } valid_flags = NBD_CMD_FLAG_FUA; if (request->type == NBD_CMD_READ && client->structured_reply) { valid_flags |= NBD_CMD_FLAG_DF; diff --git a/nbd/trace-events b/nbd/trace-events index 7f10ebd4e0..7ab6b3788c 100644 --- a/nbd/trace-events +++ b/nbd/trace-events @@ -1,4 +1,6 @@ -# nbd/client.c +# See docs/devel/tracing.txt for syntax documentation. + +# client.c nbd_send_option_request(uint32_t opt, const char *name, uint32_t len) "Sending option request %" PRIu32" (%s), len %" PRIu32 nbd_receive_option_reply(uint32_t option, const char *optname, uint32_t type, const char *typename, uint32_t length) "Received option reply %" PRIu32" (%s), type %" PRIu32" (%s), len %" PRIu32 nbd_server_error_msg(uint32_t err, const char *type, const char *msg) "server reported error 0x%" PRIx32 " (%s) with additional message: %s" @@ -33,10 +35,10 @@ nbd_send_request(uint64_t from, uint32_t len, uint64_t handle, uint16_t flags, u nbd_receive_simple_reply(int32_t error, const char *errname, uint64_t handle) "Got simple reply: { .error = %" PRId32 " (%s), handle = %" PRIu64" }" nbd_receive_structured_reply_chunk(uint16_t flags, uint16_t type, const char *name, uint64_t handle, uint32_t length) "Got structured reply chunk: { flags = 0x%" PRIx16 ", type = %d (%s), handle = %" PRIu64 ", length = %" PRIu32 " }" -# nbd/common.c +# common.c nbd_unknown_error(int err) "Squashing unexpected error %d to EINVAL" -# nbd/server.c +# server.c nbd_negotiate_send_rep_len(uint32_t opt, const char *optname, uint32_t type, const char *typename, uint32_t len) "Reply opt=%" PRIu32 " (%s), type=%" PRIu32 " (%s), len=%" PRIu32 nbd_negotiate_send_rep_err(const char *msg) "sending error message \"%s\"" nbd_negotiate_send_rep_list(const char *name, const char *desc) "Advertising export name '%s' description '%s'" @@ -56,7 +58,6 @@ nbd_negotiate_options_flags(uint32_t flags) "Received client flags 0x%" PRIx32 nbd_negotiate_options_check_magic(uint64_t magic) "Checking opts magic 0x%" PRIx64 nbd_negotiate_options_check_option(uint32_t option, const char *name) "Checking option %" PRIu32 " (%s)" nbd_negotiate_begin(void) "Beginning negotiation" -nbd_negotiate_old_style(uint64_t size, unsigned flags) "advertising size %" PRIu64 " and flags 0x%x" nbd_negotiate_new_style_size_flags(uint64_t size, unsigned flags) "advertising size %" PRIu64 " and flags 0x%x" nbd_negotiate_success(void) "Negotiation succeeded" nbd_receive_request(uint32_t magic, uint16_t flags, uint16_t type, uint64_t from, uint32_t len) "Got request: { magic = 0x%" PRIx32 ", .flags = 0x%" PRIx16 ", .type = 0x%" PRIx16 ", from = %" PRIu64 ", len = %" PRIu32 " }" @@ -70,5 +71,5 @@ nbd_co_send_extents(uint64_t handle, unsigned int extents, uint32_t id, uint64_t nbd_co_send_structured_error(uint64_t handle, int err, const char *errname, const char *msg) "Send structured error reply: handle = %" PRIu64 ", error = %d (%s), msg = '%s'" nbd_co_receive_request_decode_type(uint64_t handle, uint16_t type, const char *name) "Decoding type: handle = %" PRIu64 ", type = %" PRIu16 " (%s)" nbd_co_receive_request_payload_received(uint64_t handle, uint32_t len) "Payload received: handle = %" PRIu64 ", len = %" PRIu32 -nbd_co_receive_request_cmd_write(uint32_t len) "Reading %" PRIu32 " byte(s)" +nbd_co_receive_align_compliance(const char *op, uint64_t from, uint32_t len, uint32_t align) "client sent non-compliant unaligned %s request: from=0x%" PRIx64 ", len=0x%" PRIx32 ", align=0x%" PRIx32 nbd_trip(void) "Reading request" diff --git a/net/socket.c b/net/socket.c index 90ef3517be..c92354049b 100644 --- a/net/socket.c +++ b/net/socket.c @@ -119,9 +119,13 @@ static ssize_t net_socket_receive_dgram(NetClientState *nc, const uint8_t *buf, ssize_t ret; do { - ret = qemu_sendto(s->fd, buf, size, 0, - (struct sockaddr *)&s->dgram_dst, - sizeof(s->dgram_dst)); + if (s->dgram_dst.sin_family != AF_UNIX) { + ret = qemu_sendto(s->fd, buf, size, 0, + (struct sockaddr *)&s->dgram_dst, + sizeof(s->dgram_dst)); + } else { + ret = send(s->fd, buf, size, 0); + } } while (ret == -1 && errno == EINTR); if (ret == -1 && errno == EAGAIN) { @@ -336,6 +340,15 @@ static NetSocketState *net_socket_fd_init_dgram(NetClientState *peer, int newfd; NetClientState *nc; NetSocketState *s; + SocketAddress *sa; + SocketAddressType sa_type; + + sa = socket_local_address(fd, errp); + if (!sa) { + return NULL; + } + sa_type = sa->type; + qapi_free_SocketAddress(sa); /* fd passed: multicast: "learn" dgram_dst address from bound address and save it * Because this may be "shared" socket from a "master" process, datagrams would be recv() @@ -379,8 +392,12 @@ static NetSocketState *net_socket_fd_init_dgram(NetClientState *peer, "socket: fd=%d (cloned mcast=%s:%d)", fd, inet_ntoa(saddr.sin_addr), ntohs(saddr.sin_port)); } else { + if (sa_type == SOCKET_ADDRESS_TYPE_UNIX) { + s->dgram_dst.sin_family = AF_UNIX; + } + snprintf(nc->info_str, sizeof(nc->info_str), - "socket: fd=%d", fd); + "socket: fd=%d %s", fd, SocketAddressType_str(sa_type)); } return s; diff --git a/net/tap.c b/net/tap.c index cc8525f154..e8aadd8d4b 100644 --- a/net/tap.c +++ b/net/tap.c @@ -592,7 +592,7 @@ int net_init_bridge(const Netdev *netdev, const char *name, return -1; } - fcntl(fd, F_SETFL, O_NONBLOCK); + qemu_set_nonblock(fd); vnet_hdr = tap_probe_vnet_hdr(fd); s = net_tap_fd_init(peer, "bridge", name, fd, vnet_hdr); @@ -707,7 +707,7 @@ static void net_init_tap_one(const NetdevTapOptions *tap, NetClientState *peer, } return; } - fcntl(vhostfd, F_SETFL, O_NONBLOCK); + qemu_set_nonblock(vhostfd); } options.opaque = (void *)(uintptr_t)vhostfd; @@ -791,7 +791,7 @@ int net_init_tap(const Netdev *netdev, const char *name, return -1; } - fcntl(fd, F_SETFL, O_NONBLOCK); + qemu_set_nonblock(fd); vnet_hdr = tap_probe_vnet_hdr(fd); @@ -839,7 +839,7 @@ int net_init_tap(const Netdev *netdev, const char *name, goto free_fail; } - fcntl(fd, F_SETFL, O_NONBLOCK); + qemu_set_nonblock(fd); if (i == 0) { vnet_hdr = tap_probe_vnet_hdr(fd); @@ -887,7 +887,7 @@ free_fail: return -1; } - fcntl(fd, F_SETFL, O_NONBLOCK); + qemu_set_nonblock(fd); vnet_hdr = tap_probe_vnet_hdr(fd); net_init_tap_one(tap, peer, "bridge", name, ifname, diff --git a/net/trace-events b/net/trace-events index 3417ac05b0..a7937f3f3a 100644 --- a/net/trace-events +++ b/net/trace-events @@ -1,15 +1,15 @@ # See docs/devel/tracing.txt for syntax documentation. -# net/announce.c +# announce.c qemu_announce_self_iter(const char *mac) "%s" -# net/vhost-user.c +# vhost-user.c vhost_user_event(const char *chr, int event) "chr: %s got event: %d" -# net/colo.c +# colo.c colo_proxy_main(const char *chr) ": %s" -# net/colo-compare.c +# colo-compare.c colo_compare_main(const char *chr) ": %s" colo_compare_udp_miscompare(const char *sta, int size) ": %s = %d" colo_compare_icmp_miscompare(const char *sta, int size) ": %s = %d" @@ -18,7 +18,7 @@ colo_old_packet_check_found(int64_t old_time) "%" PRId64 colo_compare_miscompare(void) "" colo_compare_tcp_info(const char *pkt, uint32_t seq, uint32_t ack, int hdlen, int pdlen, int offset, int flags) "%s: seq/ack= %u/%u hdlen= %d pdlen= %d offset= %d flags=%d\n" -# net/filter-rewriter.c +# filter-rewriter.c colo_filter_rewriter_debug(void) "" colo_filter_rewriter_pkt_info(const char *func, const char *src, const char *dst, uint32_t seq, uint32_t ack, uint32_t flag) "%s: src/dst: %s/%s p: seq/ack=%u/%u flags=0x%x\n" colo_filter_rewriter_conn_offset(uint32_t offset) ": offset=%u\n" diff --git a/net/vhost-user.c b/net/vhost-user.c index cd9659df87..5a26a24708 100644 --- a/net/vhost-user.c +++ b/net/vhost-user.c @@ -304,19 +304,14 @@ static int net_vhost_user_init(NetClientState *peer, const char *device, { Error *err = NULL; NetClientState *nc, *nc0 = NULL; - VhostUserState *user = NULL; NetVhostUserState *s = NULL; + VhostUserState *user; int i; assert(name); assert(queues > 0); - user = vhost_user_init(); - if (!user) { - error_report("failed to init vhost_user"); - goto err; - } - + user = g_new0(struct VhostUserState, 1); for (i = 0; i < queues; i++) { nc = qemu_new_net_client(&net_vhost_user_info, peer, device, name); snprintf(nc->info_str, sizeof(nc->info_str), "vhost-user%d to %s", @@ -325,11 +320,11 @@ static int net_vhost_user_init(NetClientState *peer, const char *device, if (!nc0) { nc0 = nc; s = DO_UPCAST(NetVhostUserState, nc, nc); - if (!qemu_chr_fe_init(&s->chr, chr, &err)) { + if (!qemu_chr_fe_init(&s->chr, chr, &err) || + !vhost_user_init(user, &s->chr, &err)) { error_report_err(err); goto err; } - user->chr = &s->chr; } s = DO_UPCAST(NetVhostUserState, nc, nc); s->vhost_user = user; diff --git a/pc-bios/README b/pc-bios/README index d421cb3f1f..807d95dd54 100644 --- a/pc-bios/README +++ b/pc-bios/README @@ -50,3 +50,14 @@ - QemuMacDrivers (https://github.com/ozbenh/QemuMacDrivers) is a project to provide virtualised drivers for PPC MacOS guests. + +- The "edk2-*.fd.bz2" images are platform firmware binaries and matching UEFI + variable store templates built from the TianoCore community's EFI Development + Kit II project + <https://github.com/tianocore/tianocore.github.io/wiki/EDK-II>. The images + were built at git tag "edk2-stable201903". The firmware binaries bundle parts + of the OpenSSL project, at git tag "OpenSSL_1_1_0j" (the OpenSSL tag is a + function of the edk2 tag). Licensing information is given in + "edk2-licenses.txt". The image files are described by the JSON documents in + the "pc-bios/descriptors" directory, which conform to the + "docs/interop/firmware.json" schema. diff --git a/pc-bios/bios-256k.bin b/pc-bios/bios-256k.bin index 08ca873ab5..04671f160a 100644 --- a/pc-bios/bios-256k.bin +++ b/pc-bios/bios-256k.bin Binary files differdiff --git a/pc-bios/bios.bin b/pc-bios/bios.bin index 056e0f81f9..0159c9b5e9 100644 --- a/pc-bios/bios.bin +++ b/pc-bios/bios.bin Binary files differdiff --git a/pc-bios/descriptors/50-edk2-i386-secure.json b/pc-bios/descriptors/50-edk2-i386-secure.json new file mode 100644 index 0000000000..d7108c1da0 --- /dev/null +++ b/pc-bios/descriptors/50-edk2-i386-secure.json @@ -0,0 +1,34 @@ +{ + "description": "UEFI firmware for i386, with Secure Boot and SMM", + "interface-types": [ + "uefi" + ], + "mapping": { + "device": "flash", + "executable": { + "filename": "@DATADIR@/edk2-i386-secure-code.fd", + "format": "raw" + }, + "nvram-template": { + "filename": "@DATADIR@/edk2-i386-vars.fd", + "format": "raw" + } + }, + "targets": [ + { + "architecture": "i386", + "machines": [ + "pc-q35-*" + ] + } + ], + "features": [ + "acpi-s3", + "requires-smm", + "secure-boot", + "verbose-dynamic" + ], + "tags": [ + + ] +} diff --git a/pc-bios/descriptors/50-edk2-x86_64-secure.json b/pc-bios/descriptors/50-edk2-x86_64-secure.json new file mode 100644 index 0000000000..387eb35623 --- /dev/null +++ b/pc-bios/descriptors/50-edk2-x86_64-secure.json @@ -0,0 +1,35 @@ +{ + "description": "UEFI firmware for x86_64, with Secure Boot and SMM", + "interface-types": [ + "uefi" + ], + "mapping": { + "device": "flash", + "executable": { + "filename": "@DATADIR@/edk2-x86_64-secure-code.fd", + "format": "raw" + }, + "nvram-template": { + "filename": "@DATADIR@/edk2-i386-vars.fd", + "format": "raw" + } + }, + "targets": [ + { + "architecture": "x86_64", + "machines": [ + "pc-q35-*" + ] + } + ], + "features": [ + "acpi-s3", + "amd-sev", + "requires-smm", + "secure-boot", + "verbose-dynamic" + ], + "tags": [ + + ] +} diff --git a/pc-bios/descriptors/60-edk2-aarch64.json b/pc-bios/descriptors/60-edk2-aarch64.json new file mode 100644 index 0000000000..800a21bda6 --- /dev/null +++ b/pc-bios/descriptors/60-edk2-aarch64.json @@ -0,0 +1,31 @@ +{ + "description": "UEFI firmware for aarch64", + "interface-types": [ + "uefi" + ], + "mapping": { + "device": "flash", + "executable": { + "filename": "@DATADIR@/edk2-aarch64-code.fd", + "format": "raw" + }, + "nvram-template": { + "filename": "@DATADIR@/edk2-arm-vars.fd", + "format": "raw" + } + }, + "targets": [ + { + "architecture": "aarch64", + "machines": [ + "virt-*" + ] + } + ], + "features": [ + "verbose-static" + ], + "tags": [ + + ] +} diff --git a/pc-bios/descriptors/60-edk2-arm.json b/pc-bios/descriptors/60-edk2-arm.json new file mode 100644 index 0000000000..d5f1bba6cc --- /dev/null +++ b/pc-bios/descriptors/60-edk2-arm.json @@ -0,0 +1,31 @@ +{ + "description": "UEFI firmware for arm", + "interface-types": [ + "uefi" + ], + "mapping": { + "device": "flash", + "executable": { + "filename": "@DATADIR@/edk2-arm-code.fd", + "format": "raw" + }, + "nvram-template": { + "filename": "@DATADIR@/edk2-arm-vars.fd", + "format": "raw" + } + }, + "targets": [ + { + "architecture": "arm", + "machines": [ + "virt-*" + ] + } + ], + "features": [ + "verbose-static" + ], + "tags": [ + + ] +} diff --git a/pc-bios/descriptors/60-edk2-i386.json b/pc-bios/descriptors/60-edk2-i386.json new file mode 100644 index 0000000000..2f8dec74fe --- /dev/null +++ b/pc-bios/descriptors/60-edk2-i386.json @@ -0,0 +1,33 @@ +{ + "description": "UEFI firmware for i386", + "interface-types": [ + "uefi" + ], + "mapping": { + "device": "flash", + "executable": { + "filename": "@DATADIR@/edk2-i386-code.fd", + "format": "raw" + }, + "nvram-template": { + "filename": "@DATADIR@/edk2-i386-vars.fd", + "format": "raw" + } + }, + "targets": [ + { + "architecture": "i386", + "machines": [ + "pc-i440fx-*", + "pc-q35-*" + ] + } + ], + "features": [ + "acpi-s3", + "verbose-dynamic" + ], + "tags": [ + + ] +} diff --git a/pc-bios/descriptors/60-edk2-x86_64.json b/pc-bios/descriptors/60-edk2-x86_64.json new file mode 100644 index 0000000000..968cb65cf9 --- /dev/null +++ b/pc-bios/descriptors/60-edk2-x86_64.json @@ -0,0 +1,34 @@ +{ + "description": "UEFI firmware for x86_64", + "interface-types": [ + "uefi" + ], + "mapping": { + "device": "flash", + "executable": { + "filename": "@DATADIR@/edk2-x86_64-code.fd", + "format": "raw" + }, + "nvram-template": { + "filename": "@DATADIR@/edk2-i386-vars.fd", + "format": "raw" + } + }, + "targets": [ + { + "architecture": "x86_64", + "machines": [ + "pc-i440fx-*", + "pc-q35-*" + ] + } + ], + "features": [ + "acpi-s3", + "amd-sev", + "verbose-dynamic" + ], + "tags": [ + + ] +} diff --git a/pc-bios/edk2-aarch64-code.fd.bz2 b/pc-bios/edk2-aarch64-code.fd.bz2 new file mode 100644 index 0000000000..b213334d95 --- /dev/null +++ b/pc-bios/edk2-aarch64-code.fd.bz2 Binary files differdiff --git a/pc-bios/edk2-arm-code.fd.bz2 b/pc-bios/edk2-arm-code.fd.bz2 new file mode 100644 index 0000000000..a494a8391e --- /dev/null +++ b/pc-bios/edk2-arm-code.fd.bz2 Binary files differdiff --git a/pc-bios/edk2-arm-vars.fd.bz2 b/pc-bios/edk2-arm-vars.fd.bz2 new file mode 100644 index 0000000000..2a5a9af31a --- /dev/null +++ b/pc-bios/edk2-arm-vars.fd.bz2 Binary files differdiff --git a/pc-bios/edk2-i386-code.fd.bz2 b/pc-bios/edk2-i386-code.fd.bz2 new file mode 100644 index 0000000000..5440ca856d --- /dev/null +++ b/pc-bios/edk2-i386-code.fd.bz2 Binary files differdiff --git a/pc-bios/edk2-i386-secure-code.fd.bz2 b/pc-bios/edk2-i386-secure-code.fd.bz2 new file mode 100644 index 0000000000..24ae88ac3e --- /dev/null +++ b/pc-bios/edk2-i386-secure-code.fd.bz2 Binary files differdiff --git a/pc-bios/edk2-i386-vars.fd.bz2 b/pc-bios/edk2-i386-vars.fd.bz2 new file mode 100644 index 0000000000..4a1bc45238 --- /dev/null +++ b/pc-bios/edk2-i386-vars.fd.bz2 Binary files differdiff --git a/pc-bios/edk2-licenses.txt b/pc-bios/edk2-licenses.txt new file mode 100644 index 0000000000..8bdb1abc99 --- /dev/null +++ b/pc-bios/edk2-licenses.txt @@ -0,0 +1,209 @@ +==> edk2/License.txt <== +Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved. +Copyright (c) 2008 - 2010, Apple Inc. All rights reserved. +Copyright (c) 2011 - 2015, ARM Limited. All rights reserved. +Copyright (c) 2014 - 2015, Linaro Limited. All rights reserved. +Copyright (c) 2013 - 2015, Red Hat, Inc. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions +are met: + +* Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. +* Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the + distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +POSSIBILITY OF SUCH DAMAGE. + +==> edk2/OvmfPkg/License.txt <== +Copyright (c) 2012, Intel Corporation. All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions +are met: + +* Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. +* Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the + distribution. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +POSSIBILITY OF SUCH DAMAGE. + + +Some files are subject to the following license, the MIT license. Those files +are located in: +- OvmfPkg/Include/IndustryStandard/Xen/ +- OvmfPkg/XenBusDxe/ +- OvmfPkg/XenPvBlkDxe/ + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. + +==> edk2/CryptoPkg/Library/OpensslLib/openssl/LICENSE <== + + LICENSE ISSUES + ============== + + The OpenSSL toolkit stays under a double license, i.e. both the conditions of + the OpenSSL License and the original SSLeay license apply to the toolkit. + See below for the actual license texts. + + OpenSSL License + --------------- + +/* ==================================================================== + * Copyright (c) 1998-2018 The OpenSSL Project. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * 3. All advertising materials mentioning features or use of this + * software must display the following acknowledgment: + * "This product includes software developed by the OpenSSL Project + * for use in the OpenSSL Toolkit. (http://www.openssl.org/)" + * + * 4. The names "OpenSSL Toolkit" and "OpenSSL Project" must not be used to + * endorse or promote products derived from this software without + * prior written permission. For written permission, please contact + * openssl-core@openssl.org. + * + * 5. Products derived from this software may not be called "OpenSSL" + * nor may "OpenSSL" appear in their names without prior written + * permission of the OpenSSL Project. + * + * 6. Redistributions of any form whatsoever must retain the following + * acknowledgment: + * "This product includes software developed by the OpenSSL Project + * for use in the OpenSSL Toolkit (http://www.openssl.org/)" + * + * THIS SOFTWARE IS PROVIDED BY THE OpenSSL PROJECT ``AS IS'' AND ANY + * EXPRESSED OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE OpenSSL PROJECT OR + * ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + * ==================================================================== + * + * This product includes cryptographic software written by Eric Young + * (eay@cryptsoft.com). This product includes software written by Tim + * Hudson (tjh@cryptsoft.com). + * + */ + + Original SSLeay License + ----------------------- + +/* Copyright (C) 1995-1998 Eric Young (eay@cryptsoft.com) + * All rights reserved. + * + * This package is an SSL implementation written + * by Eric Young (eay@cryptsoft.com). + * The implementation was written so as to conform with Netscapes SSL. + * + * This library is free for commercial and non-commercial use as long as + * the following conditions are aheared to. The following conditions + * apply to all code found in this distribution, be it the RC4, RSA, + * lhash, DES, etc., code; not just the SSL code. The SSL documentation + * included with this distribution is covered by the same copyright terms + * except that the holder is Tim Hudson (tjh@cryptsoft.com). + * + * Copyright remains Eric Young's, and as such any Copyright notices in + * the code are not to be removed. + * If this package is used in a product, Eric Young should be given attribution + * as the author of the parts of the library used. + * This can be in the form of a textual message at program startup or + * in documentation (online or textual) provided with the package. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * "This product includes cryptographic software written by + * Eric Young (eay@cryptsoft.com)" + * The word 'cryptographic' can be left out if the rouines from the library + * being used are not cryptographic related :-). + * 4. If you include any Windows specific code (or a derivative thereof) from + * the apps directory (application code) you must include an acknowledgement: + * "This product includes software written by Tim Hudson (tjh@cryptsoft.com)" + * + * THIS SOFTWARE IS PROVIDED BY ERIC YOUNG ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * The licence and distribution terms for any publically available version or + * derivative of this code cannot be changed. i.e. this code cannot simply be + * copied and put under another distribution licence + * [including the GNU Public Licence.] + */ + diff --git a/pc-bios/edk2-x86_64-code.fd.bz2 b/pc-bios/edk2-x86_64-code.fd.bz2 new file mode 100644 index 0000000000..6a0b1f9831 --- /dev/null +++ b/pc-bios/edk2-x86_64-code.fd.bz2 Binary files differdiff --git a/pc-bios/edk2-x86_64-secure-code.fd.bz2 b/pc-bios/edk2-x86_64-secure-code.fd.bz2 new file mode 100644 index 0000000000..3ef6452c03 --- /dev/null +++ b/pc-bios/edk2-x86_64-secure-code.fd.bz2 Binary files differdiff --git a/pc-bios/hppa-firmware.img b/pc-bios/hppa-firmware.img index 86930974b9..c79e1e923c 100644 --- a/pc-bios/hppa-firmware.img +++ b/pc-bios/hppa-firmware.img Binary files differdiff --git a/pc-bios/keymaps/Makefile b/pc-bios/keymaps/Makefile index f0e44fd110..76217b0689 100644 --- a/pc-bios/keymaps/Makefile +++ b/pc-bios/keymaps/Makefile @@ -9,7 +9,7 @@ ar : MAP_FLAGS := -l ar bepo : MAP_FLAGS := -l fr -v dvorak cz : MAP_FLAGS := -l cz da : MAP_FLAGS := -l dk -de : MAP_FLAGS := -l de +de : MAP_FLAGS := -l de -v nodeadkeys de-ch : MAP_FLAGS := -l ch en-us : MAP_FLAGS := -l us en-gb : MAP_FLAGS := -l gb @@ -17,7 +17,7 @@ es : MAP_FLAGS := -l es et : MAP_FLAGS := -l et fi : MAP_FLAGS := -l fi fo : MAP_FLAGS := -l fo -fr : MAP_FLAGS := -l fr +fr : MAP_FLAGS := -l fr -v nodeadkeys fr-be : MAP_FLAGS := -l be fr-ca : MAP_FLAGS := -l ca -v fr fr-ch : MAP_FLAGS := -l ch -v fr diff --git a/pc-bios/keymaps/ar b/pc-bios/keymaps/ar index a763c9a027..f62b297c54 100644 --- a/pc-bios/keymaps/ar +++ b/pc-bios/keymaps/ar @@ -36,50 +36,65 @@ Escape 0x01 # evdev 2 (0x2), QKeyCode "1", number 0x2 1 0x02 exclam 0x02 shift +Arabic_1 0x02 altgr # evdev 3 (0x3), QKeyCode "2", number 0x3 2 0x03 at 0x03 shift +Arabic_2 0x03 altgr # evdev 4 (0x4), QKeyCode "3", number 0x4 3 0x04 numbersign 0x04 shift +Arabic_3 0x04 altgr # evdev 5 (0x5), QKeyCode "4", number 0x5 4 0x05 dollar 0x05 shift +Arabic_4 0x05 altgr # evdev 6 (0x6), QKeyCode "5", number 0x6 5 0x06 percent 0x06 shift +Arabic_5 0x06 altgr +U2030 0x06 shift altgr # evdev 7 (0x7), QKeyCode "6", number 0x7 6 0x07 asciicircum 0x07 shift +Arabic_6 0x07 altgr # evdev 8 (0x8), QKeyCode "7", number 0x8 7 0x08 ampersand 0x08 shift +Arabic_7 0x08 altgr # evdev 9 (0x9), QKeyCode "8", number 0x9 8 0x09 asterisk 0x09 shift +Arabic_8 0x09 altgr # evdev 10 (0xa), QKeyCode "9", number 0xa 9 0x0a parenright 0x0a shift +Arabic_9 0x0a altgr # evdev 11 (0xb), QKeyCode "0", number 0xb 0 0x0b parenleft 0x0b shift +Arabic_0 0x0b altgr # evdev 12 (0xc), QKeyCode "minus", number 0xc minus 0x0c underscore 0x0c shift +endash 0x0c altgr +U2011 0x0c shift altgr # evdev 13 (0xd), QKeyCode "equal", number 0xd equal 0x0d plus 0x0d shift +notequal 0x0d altgr +approxeq 0x0d shift altgr # evdev 14 (0xe), QKeyCode "backspace", number 0xe BackSpace 0x0e @@ -91,18 +106,22 @@ ISO_Left_Tab 0x0f shift # evdev 16 (0x10), QKeyCode "q", number 0x10 Arabic_dad 0x10 Arabic_fatha 0x10 shift +U2066 0x10 shift altgr # evdev 17 (0x11), QKeyCode "w", number 0x11 Arabic_sad 0x11 Arabic_fathatan 0x11 shift +U2067 0x11 shift altgr # evdev 18 (0x12), QKeyCode "e", number 0x12 Arabic_theh 0x12 Arabic_damma 0x12 shift +U2068 0x12 shift altgr # evdev 19 (0x13), QKeyCode "r", number 0x13 Arabic_qaf 0x13 Arabic_dammatan 0x13 shift +U2069 0x13 shift altgr # evdev 20 (0x14), QKeyCode "t", number 0x14 Arabic_feh 0x14 @@ -112,14 +131,17 @@ Arabic_veh 0x14 altgr # evdev 21 (0x15), QKeyCode "y", number 0x15 Arabic_ghain 0x15 Arabic_hamzaunderalef 0x15 shift +U202A 0x15 shift altgr # evdev 22 (0x16), QKeyCode "u", number 0x16 Arabic_ain 0x16 grave 0x16 shift +U202B 0x16 shift altgr # evdev 23 (0x17), QKeyCode "i", number 0x17 Arabic_ha 0x17 division 0x17 shift +U202C 0x17 shift altgr # evdev 24 (0x18), QKeyCode "o", number 0x18 Arabic_khah 0x18 @@ -128,15 +150,18 @@ multiply 0x18 shift # evdev 25 (0x19), QKeyCode "p", number 0x19 Arabic_hah 0x19 Arabic_semicolon 0x19 shift +U200E 0x19 shift altgr # evdev 26 (0x1a), QKeyCode "bracket_left", number 0x1a Arabic_jeem 0x1a less 0x1a shift Arabic_tcheh 0x1a altgr +U200F 0x1a shift altgr # evdev 27 (0x1b), QKeyCode "bracket_right", number 0x1b Arabic_dal 0x1b greater 0x1b shift +U061C 0x1b shift altgr # evdev 28 (0x1c), QKeyCode "ret", number 0x1c Return 0x1c @@ -177,6 +202,7 @@ Arabic_tatweel 0x24 shift # evdev 37 (0x25), QKeyCode "k", number 0x25 Arabic_noon 0x25 Arabic_comma 0x25 shift +U066B 0x25 altgr # evdev 38 (0x26), QKeyCode "l", number 0x26 Arabic_meem 0x26 @@ -190,27 +216,35 @@ Arabic_gaf 0x27 altgr # evdev 40 (0x28), QKeyCode "apostrophe", number 0x28 Arabic_tah 0x28 quotedbl 0x28 shift +U27E9 0x28 altgr +U200D 0x28 shift altgr # evdev 41 (0x29), QKeyCode "grave_accent", number 0x29 Arabic_thal 0x29 Arabic_shadda 0x29 shift +Arabic_percent 0x29 altgr +U0609 0x29 shift altgr # evdev 42 (0x2a), QKeyCode "shift", number 0x2a Shift_L 0x2a # evdev 43 (0x2b), QKeyCode "backslash", number 0x2b backslash 0x2b -bar 0x2b shift +ellipsis 0x2b shift +U27E8 0x2b altgr +U202F 0x2b shift altgr # evdev 44 (0x2c), QKeyCode "z", number 0x2c Arabic_hamzaonyeh 0x2c asciitilde 0x2c shift guillemotright 0x2c altgr +U203A 0x2c shift altgr # evdev 45 (0x2d), QKeyCode "x", number 0x2d Arabic_hamza 0x2d Arabic_sukun 0x2d shift guillemotleft 0x2d altgr +U2039 0x2d shift altgr # evdev 46 (0x2e), QKeyCode "c", number 0x2e Arabic_hamzaonwaw 0x2e @@ -236,14 +270,18 @@ apostrophe 0x32 shift # evdev 51 (0x33), QKeyCode "comma", number 0x33 Arabic_waw 0x33 comma 0x33 shift +U066C 0x33 altgr # evdev 52 (0x34), QKeyCode "dot", number 0x34 Arabic_zain 0x34 period 0x34 shift +Arabic_jeh 0x34 altgr # evdev 53 (0x35), QKeyCode "slash", number 0x35 Arabic_zah 0x35 Arabic_question_mark 0x35 shift +U066D 0x35 altgr +U200C 0x35 shift altgr # evdev 54 (0x36), QKeyCode "shift_r", number 0x36 Shift_R 0x36 @@ -371,9 +409,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -390,8 +430,7 @@ KP_Divide 0xb5 Print 0x54 # evdev 100 (0x64), QKeyCode "alt_r", number 0xb8 -Alt_R 0xb8 -Meta_R 0xb8 shift +ISO_Level3_Shift 0xb8 # evdev 101 (0x65), QKeyCode "lf", number 0x5b Linefeed 0x5b @@ -733,6 +772,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/bepo b/pc-bios/keymaps/bepo index dbe8daa257..2292cbc499 100644 --- a/pc-bios/keymaps/bepo +++ b/pc-bios/keymaps/bepo @@ -399,9 +399,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -761,6 +763,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/cz b/pc-bios/keymaps/cz index 46b37757fe..29cf2b05d8 100644 --- a/pc-bios/keymaps/cz +++ b/pc-bios/keymaps/cz @@ -456,9 +456,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -817,6 +819,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/da b/pc-bios/keymaps/da index f7cdad7420..547d8c716b 100644 --- a/pc-bios/keymaps/da +++ b/pc-bios/keymaps/da @@ -455,9 +455,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -816,6 +818,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym 0x0edd0160) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym 0x0edd0270) + # # quirks section start # diff --git a/pc-bios/keymaps/de b/pc-bios/keymaps/de index d0b4715474..261243edbc 100644 --- a/pc-bios/keymaps/de +++ b/pc-bios/keymaps/de @@ -2,10 +2,10 @@ # generated by qemu-keymap # model : pc105 # layout : de -# variant : - +# variant : nodeadkeys # options : - -# name: "German" +# name: "German (no dead keys)" # modifiers # 0: Shift @@ -100,10 +100,9 @@ backslash 0x0c altgr questiondown 0x0c shift altgr # evdev 13 (0xd), QKeyCode "equal", number 0xd -dead_acute 0x0d -dead_grave 0x0d shift -dead_cedilla 0x0d altgr -dead_ogonek 0x0d shift altgr +acute 0x0d +grave 0x0d shift +cedilla 0x0d altgr # evdev 14 (0xe), QKeyCode "backspace", number 0xe BackSpace 0x0e @@ -174,8 +173,7 @@ THORN 0x19 shift altgr # evdev 26 (0x1a), QKeyCode "bracket_left", number 0x1a udiaeresis 0x1a Udiaeresis 0x1a shift -dead_diaeresis 0x1a altgr -dead_abovering 0x1a shift altgr +diaeresis 0x1a altgr # evdev 27 (0x1b), QKeyCode "bracket_right", number 0x1b plus 0x1b @@ -246,20 +244,17 @@ Lstroke 0x26 shift altgr # evdev 39 (0x27), QKeyCode "semicolon", number 0x27 odiaeresis 0x27 Odiaeresis 0x27 shift -dead_doubleacute 0x27 altgr -dead_belowdot 0x27 shift altgr +doubleacute 0x27 altgr # evdev 40 (0x28), QKeyCode "apostrophe", number 0x28 adiaeresis 0x28 Adiaeresis 0x28 shift -dead_circumflex 0x28 altgr -dead_caron 0x28 shift altgr +asciicircum 0x28 altgr # evdev 41 (0x29), QKeyCode "grave_accent", number 0x29 -dead_circumflex 0x29 +asciicircum 0x29 degree 0x29 shift -U2032 0x29 altgr -U2033 0x29 shift altgr +notsign 0x29 altgr # evdev 42 (0x2a), QKeyCode "shift", number 0x2a Shift_L 0x2a @@ -268,7 +263,7 @@ Shift_L 0x2a numbersign 0x2b apostrophe 0x2b shift rightsinglequotemark 0x2b altgr -dead_breve 0x2b shift altgr +grave 0x2b shift altgr # evdev 44 (0x2c), QKeyCode "z", number 0x2c y 0x2c @@ -440,7 +435,7 @@ KP_Separator 0x53 numlock less 0x56 greater 0x56 shift bar 0x56 altgr -brokenbar 0x56 shift altgr +dead_belowmacron 0x56 shift altgr # evdev 87 (0x57), QKeyCode "f11", number 0x57 F11 0x57 @@ -458,9 +453,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -819,6 +816,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/de-ch b/pc-bios/keymaps/de-ch index ad37f6cc19..ed3da058e4 100644 --- a/pc-bios/keymaps/de-ch +++ b/pc-bios/keymaps/de-ch @@ -455,9 +455,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -816,6 +818,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/en-gb b/pc-bios/keymaps/en-gb index 999cca7c71..18d8fce4d4 100644 --- a/pc-bios/keymaps/en-gb +++ b/pc-bios/keymaps/en-gb @@ -453,9 +453,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -815,6 +817,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/en-us b/pc-bios/keymaps/en-us index a70e03adc0..06762cfc6c 100644 --- a/pc-bios/keymaps/en-us +++ b/pc-bios/keymaps/en-us @@ -365,9 +365,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -727,6 +729,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/es b/pc-bios/keymaps/es index 53e66e88c7..fde441492d 100644 --- a/pc-bios/keymaps/es +++ b/pc-bios/keymaps/es @@ -454,9 +454,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -815,6 +817,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/et b/pc-bios/keymaps/et index 7bed679bc9..a5dcbd18ab 100644 --- a/pc-bios/keymaps/et +++ b/pc-bios/keymaps/et @@ -363,9 +363,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -725,6 +727,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/fi b/pc-bios/keymaps/fi index 1c7653dc6b..816749421e 100644 --- a/pc-bios/keymaps/fi +++ b/pc-bios/keymaps/fi @@ -429,9 +429,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -790,6 +792,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/fo b/pc-bios/keymaps/fo index e69575bcb7..8bb6f97bba 100644 --- a/pc-bios/keymaps/fo +++ b/pc-bios/keymaps/fo @@ -456,9 +456,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -817,6 +819,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/fr b/pc-bios/keymaps/fr index 5b25227455..82ca812c7e 100644 --- a/pc-bios/keymaps/fr +++ b/pc-bios/keymaps/fr @@ -2,10 +2,10 @@ # generated by qemu-keymap # model : pc105 # layout : fr -# variant : - +# variant : nodeadkeys # options : - -# name: "French" +# name: "French (no dead keys)" # modifiers # 0: Shift @@ -103,7 +103,7 @@ questiondown 0x0c shift altgr equal 0x0d plus 0x0d shift braceright 0x0d altgr -dead_ogonek 0x0d shift altgr +ogonek 0x0d shift altgr # evdev 14 (0xe), QKeyCode "backspace", number 0xe BackSpace 0x0e @@ -173,8 +173,8 @@ thorn 0x19 altgr THORN 0x19 shift altgr # evdev 26 (0x1a), QKeyCode "bracket_left", number 0x1a -dead_circumflex 0x1a -dead_diaeresis 0x1a shift +asciicircum 0x1a +diaeresis 0x1a shift dead_diaeresis 0x1a altgr dead_abovering 0x1a shift altgr @@ -182,7 +182,7 @@ dead_abovering 0x1a shift altgr dollar 0x1b sterling 0x1b shift currency 0x1b altgr -dead_macron 0x1b shift altgr +macron 0x1b shift altgr # evdev 28 (0x1c), QKeyCode "ret", number 0x1c Return 0x1c @@ -253,8 +253,8 @@ masculine 0x27 shift altgr # evdev 40 (0x28), QKeyCode "apostrophe", number 0x28 ugrave 0x28 percent 0x28 shift -dead_circumflex 0x28 altgr -dead_caron 0x28 shift altgr +asciicircum 0x28 altgr +caron 0x28 shift altgr # evdev 41 (0x29), QKeyCode "grave_accent", number 0x29 twosuperior 0x29 @@ -267,8 +267,8 @@ Shift_L 0x2a # evdev 43 (0x2b), QKeyCode "backslash", number 0x2b asterisk 0x2b mu 0x2b shift -dead_grave 0x2b altgr -dead_breve 0x2b shift altgr +grave 0x2b altgr +breve 0x2b shift altgr # evdev 44 (0x2c), QKeyCode "z", number 0x2c w 0x2c @@ -307,8 +307,8 @@ N 0x31 shift # evdev 50 (0x32), QKeyCode "m", number 0x32 comma 0x32 question 0x32 shift -dead_acute 0x32 altgr -dead_doubleacute 0x32 shift altgr +acute 0x32 altgr +doubleacute 0x32 shift altgr # evdev 51 (0x33), QKeyCode "comma", number 0x33 semicolon 0x33 @@ -326,7 +326,7 @@ division 0x34 shift altgr exclam 0x35 section 0x35 shift dead_belowdot 0x35 altgr -dead_abovedot 0x35 shift altgr +abovedot 0x35 shift altgr # evdev 54 (0x36), QKeyCode "shift_r", number 0x36 Shift_R 0x36 @@ -456,9 +456,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -817,6 +819,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/fr-be b/pc-bios/keymaps/fr-be index 9d2ac5ddf9..f225f179a2 100644 --- a/pc-bios/keymaps/fr-be +++ b/pc-bios/keymaps/fr-be @@ -455,9 +455,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -816,6 +818,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/fr-ca b/pc-bios/keymaps/fr-ca index 736897bc43..f264d0a9c3 100644 --- a/pc-bios/keymaps/fr-ca +++ b/pc-bios/keymaps/fr-ca @@ -387,9 +387,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -748,6 +750,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/fr-ch b/pc-bios/keymaps/fr-ch index 40e1fefd54..bdd944da1c 100644 --- a/pc-bios/keymaps/fr-ch +++ b/pc-bios/keymaps/fr-ch @@ -455,9 +455,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -816,6 +818,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/hr b/pc-bios/keymaps/hr index 6b89f09922..252936c3ae 100644 --- a/pc-bios/keymaps/hr +++ b/pc-bios/keymaps/hr @@ -456,9 +456,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -817,6 +819,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/hu b/pc-bios/keymaps/hu index a6bd66d08d..853147610a 100644 --- a/pc-bios/keymaps/hu +++ b/pc-bios/keymaps/hu @@ -455,9 +455,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -816,6 +818,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym 0x0a865600) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym 0x0a865710) + # # quirks section start # diff --git a/pc-bios/keymaps/is b/pc-bios/keymaps/is index 063675d118..c88fa603aa 100644 --- a/pc-bios/keymaps/is +++ b/pc-bios/keymaps/is @@ -456,9 +456,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -817,6 +819,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/it b/pc-bios/keymaps/it index abc3ed15de..df00156cf8 100644 --- a/pc-bios/keymaps/it +++ b/pc-bios/keymaps/it @@ -459,9 +459,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -820,6 +822,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/ja b/pc-bios/keymaps/ja index aae93e8c52..6eb2e7bc20 100644 --- a/pc-bios/keymaps/ja +++ b/pc-bios/keymaps/ja @@ -367,9 +367,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -731,6 +733,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/lt b/pc-bios/keymaps/lt index 41013675f8..db9b24f611 100644 --- a/pc-bios/keymaps/lt +++ b/pc-bios/keymaps/lt @@ -454,9 +454,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -815,6 +817,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/lv b/pc-bios/keymaps/lv index 27260ce32e..54997ce092 100644 --- a/pc-bios/keymaps/lv +++ b/pc-bios/keymaps/lv @@ -429,9 +429,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -790,6 +792,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/mk b/pc-bios/keymaps/mk index 30a597caa2..cb362b6d39 100644 --- a/pc-bios/keymaps/mk +++ b/pc-bios/keymaps/mk @@ -365,9 +365,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -727,6 +729,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/nl b/pc-bios/keymaps/nl index ae7c8f5643..1579829eef 100644 --- a/pc-bios/keymaps/nl +++ b/pc-bios/keymaps/nl @@ -456,9 +456,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -817,6 +819,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/no b/pc-bios/keymaps/no index 8afd1996b5..cd634e7b90 100644 --- a/pc-bios/keymaps/no +++ b/pc-bios/keymaps/no @@ -467,9 +467,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -831,6 +833,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym 0x00408160) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym 0x00408270) + # # quirks section start # diff --git a/pc-bios/keymaps/pl b/pc-bios/keymaps/pl index df2720622f..30d93ca727 100644 --- a/pc-bios/keymaps/pl +++ b/pc-bios/keymaps/pl @@ -460,9 +460,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -821,6 +823,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/pt b/pc-bios/keymaps/pt index ab590017cf..c34d6e3761 100644 --- a/pc-bios/keymaps/pt +++ b/pc-bios/keymaps/pt @@ -453,9 +453,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -814,6 +816,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/pt-br b/pc-bios/keymaps/pt-br index fe9ec81303..2d409c0bc0 100644 --- a/pc-bios/keymaps/pt-br +++ b/pc-bios/keymaps/pt-br @@ -453,9 +453,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -814,6 +816,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/ru b/pc-bios/keymaps/ru index 7566052262..9502ba1269 100644 --- a/pc-bios/keymaps/ru +++ b/pc-bios/keymaps/ru @@ -366,9 +366,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -728,6 +730,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/th b/pc-bios/keymaps/th index 56a01354d6..b8298d902b 100644 --- a/pc-bios/keymaps/th +++ b/pc-bios/keymaps/th @@ -365,9 +365,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -727,6 +729,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/keymaps/tr b/pc-bios/keymaps/tr index 4d1a4c3311..8ef60a60c1 100644 --- a/pc-bios/keymaps/tr +++ b/pc-bios/keymaps/tr @@ -449,9 +449,11 @@ Hiragana 0x77 # evdev 92 (0x5c), QKeyCode "henkan", number 0x79 Henkan_Mode 0x79 -# evdev 93 (0x5d): no evdev -> QKeyCode mapping (xkb keysym Hiragana_Katakana) +# evdev 93 (0x5d), QKeyCode "katakanahiragana", number 0x70 +Hiragana_Katakana 0x70 -# evdev 94 (0x5e): no evdev -> QKeyCode mapping (xkb keysym Muhenkan) +# evdev 94 (0x5e), QKeyCode "muhenkan", number 0x7b +Muhenkan 0x7b # evdev 95 (0x5f): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) @@ -810,6 +812,10 @@ XF86AudioMedia 0xed # evdev 245 (0xf5): no evdev -> QKeyCode mapping (xkb keysym NoSymbol) +# evdev 246 (0xf6): no evdev -> QKeyCode mapping (xkb keysym Invalid) + +# evdev 247 (0xf7): no evdev -> QKeyCode mapping (xkb keysym Invalid) + # # quirks section start # diff --git a/pc-bios/palcode-clipper b/pc-bios/palcode-clipper index fb9026ae64..b7dbc5d88c 100644 --- a/pc-bios/palcode-clipper +++ b/pc-bios/palcode-clipper Binary files differdiff --git a/pc-bios/s390-ccw.img b/pc-bios/s390-ccw.img index 450a076dc0..ba054828d3 100644 --- a/pc-bios/s390-ccw.img +++ b/pc-bios/s390-ccw.img Binary files differdiff --git a/pc-bios/s390-ccw/Makefile b/pc-bios/s390-ccw/Makefile index 1eb316b02f..a048b6b077 100644 --- a/pc-bios/s390-ccw/Makefile +++ b/pc-bios/s390-ccw/Makefile @@ -10,7 +10,7 @@ $(call set-vpath, $(SRC_PATH)/pc-bios/s390-ccw) .PHONY : all clean build-all OBJECTS = start.o main.o bootmap.o jump2ipl.o sclp.o menu.o \ - virtio.o virtio-scsi.o virtio-blkdev.o libc.o + virtio.o virtio-scsi.o virtio-blkdev.o libc.o cio.o dasd-ipl.o QEMU_CFLAGS := $(filter -W%, $(QEMU_CFLAGS)) QEMU_CFLAGS += -ffreestanding -fno-delete-null-pointer-checks -msoft-float diff --git a/pc-bios/s390-ccw/cio.c b/pc-bios/s390-ccw/cio.c new file mode 100644 index 0000000000..339ec5fbe7 --- /dev/null +++ b/pc-bios/s390-ccw/cio.c @@ -0,0 +1,423 @@ +/* + * S390 Channel I/O + * + * Copyright (c) 2013 Alexander Graf <agraf@suse.de> + * Copyright (c) 2019 IBM Corp. + * + * Author(s): Jason J. Herne <jjherne@us.ibm.com> + * + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. + */ + +#include "libc.h" +#include "s390-ccw.h" +#include "s390-arch.h" +#include "helper.h" +#include "cio.h" + +static char chsc_page[PAGE_SIZE] __attribute__((__aligned__(PAGE_SIZE))); + +static int __do_cio(SubChannelId schid, uint32_t ccw_addr, int fmt, Irb *irb); + +int enable_mss_facility(void) +{ + int ret; + ChscAreaSda *sda_area = (ChscAreaSda *) chsc_page; + + memset(sda_area, 0, PAGE_SIZE); + sda_area->request.length = 0x0400; + sda_area->request.code = 0x0031; + sda_area->operation_code = 0x2; + + ret = chsc(sda_area); + if ((ret == 0) && (sda_area->response.code == 0x0001)) { + return 0; + } + return -EIO; +} + +void enable_subchannel(SubChannelId schid) +{ + Schib schib; + + stsch_err(schid, &schib); + schib.pmcw.ena = 1; + msch(schid, &schib); +} + +uint16_t cu_type(SubChannelId schid) +{ + Ccw1 sense_id_ccw; + SenseId sense_data; + + sense_id_ccw.cmd_code = CCW_CMD_SENSE_ID; + sense_id_ccw.cda = ptr2u32(&sense_data); + sense_id_ccw.count = sizeof(sense_data); + sense_id_ccw.flags |= CCW_FLAG_SLI; + + if (do_cio(schid, CU_TYPE_UNKNOWN, ptr2u32(&sense_id_ccw), CCW_FMT1)) { + panic("Failed to run SenseID CCw\n"); + } + + return sense_data.cu_type; +} + +int basic_sense(SubChannelId schid, uint16_t cutype, void *sense_data, + uint16_t data_size) +{ + Ccw1 senseCcw; + Irb irb; + + senseCcw.cmd_code = CCW_CMD_BASIC_SENSE; + senseCcw.cda = ptr2u32(sense_data); + senseCcw.count = data_size; + + return __do_cio(schid, ptr2u32(&senseCcw), CCW_FMT1, &irb); +} + +static bool irb_error(Irb *irb) +{ + if (irb->scsw.cstat) { + return true; + } + return irb->scsw.dstat != (SCSW_DSTAT_DEVEND | SCSW_DSTAT_CHEND); +} + +static void print_eckd_dasd_sense_data(SenseDataEckdDasd *sd) +{ + char msgline[512]; + + if (sd->config_info & 0x8000) { + sclp_print("Eckd Dasd Sense Data (fmt 24-bytes):\n"); + } else { + sclp_print("Eckd Dasd Sense Data (fmt 32-bytes):\n"); + } + + strcat(msgline, " Sense Condition Flags :"); + if (sd->common_status & SNS_STAT0_CMD_REJECT) { + strcat(msgline, " [Cmd-Reject]"); + } + if (sd->common_status & SNS_STAT0_INTERVENTION_REQ) { + strcat(msgline, " [Intervention-Required]"); + } + if (sd->common_status & SNS_STAT0_BUS_OUT_CHECK) { + strcat(msgline, " [Bus-Out-Parity-Check]"); + } + if (sd->common_status & SNS_STAT0_EQUIPMENT_CHECK) { + strcat(msgline, " [Equipment-Check]"); + } + if (sd->common_status & SNS_STAT0_DATA_CHECK) { + strcat(msgline, " [Data-Check]"); + } + if (sd->common_status & SNS_STAT0_OVERRUN) { + strcat(msgline, " [Overrun]"); + } + if (sd->common_status & SNS_STAT0_INCOMPL_DOMAIN) { + strcat(msgline, " [Incomplete-Domain]"); + } + + if (sd->status[0] & SNS_STAT1_PERM_ERR) { + strcat(msgline, " [Permanent-Error]"); + } + if (sd->status[0] & SNS_STAT1_INV_TRACK_FORMAT) { + strcat(msgline, " [Invalid-Track-Fmt]"); + } + if (sd->status[0] & SNS_STAT1_EOC) { + strcat(msgline, " [End-of-Cyl]"); + } + if (sd->status[0] & SNS_STAT1_MESSAGE_TO_OPER) { + strcat(msgline, " [Operator-Msg]"); + } + if (sd->status[0] & SNS_STAT1_NO_REC_FOUND) { + strcat(msgline, " [No-Record-Found]"); + } + if (sd->status[0] & SNS_STAT1_FILE_PROTECTED) { + strcat(msgline, " [File-Protected]"); + } + if (sd->status[0] & SNS_STAT1_WRITE_INHIBITED) { + strcat(msgline, " [Write-Inhibited]"); + } + if (sd->status[0] & SNS_STAT1_IMPRECISE_END) { + strcat(msgline, " [Imprecise-Ending]"); + } + + if (sd->status[1] & SNS_STAT2_REQ_INH_WRITE) { + strcat(msgline, " [Req-Inhibit-Write]"); + } + if (sd->status[1] & SNS_STAT2_CORRECTABLE) { + strcat(msgline, " [Correctable-Data-Check]"); + } + if (sd->status[1] & SNS_STAT2_FIRST_LOG_ERR) { + strcat(msgline, " [First-Error-Log]"); + } + if (sd->status[1] & SNS_STAT2_ENV_DATA_PRESENT) { + strcat(msgline, " [Env-Data-Present]"); + } + if (sd->status[1] & SNS_STAT2_IMPRECISE_END) { + strcat(msgline, " [Imprecise-End]"); + } + strcat(msgline, "\n"); + sclp_print(msgline); + + print_int(" Residual Count =", sd->res_count); + print_int(" Phys Drive ID =", sd->phys_drive_id); + print_int(" low cyl address =", sd->low_cyl_addr); + print_int(" head addr & hi cyl =", sd->head_high_cyl_addr); + print_int(" format/message =", sd->fmt_msg); + print_int(" fmt-dependent[0-7] =", sd->fmt_dependent_info[0]); + print_int(" fmt-dependent[8-15]=", sd->fmt_dependent_info[1]); + print_int(" prog action code =", sd->program_action_code); + print_int(" Configuration info =", sd->config_info); + print_int(" mcode / hi-cyl =", sd->mcode_hicyl); + print_int(" cyl & head addr [0]=", sd->cyl_head_addr[0]); + print_int(" cyl & head addr [1]=", sd->cyl_head_addr[1]); + print_int(" cyl & head addr [2]=", sd->cyl_head_addr[2]); +} + +static void print_irb_err(Irb *irb) +{ + uint64_t this_ccw = *(uint64_t *)u32toptr(irb->scsw.cpa); + uint64_t prev_ccw = *(uint64_t *)u32toptr(irb->scsw.cpa - 8); + char msgline[256]; + + sclp_print("Interrupt Response Block Data:\n"); + + strcat(msgline, " Function Ctrl :"); + if (irb->scsw.ctrl & SCSW_FCTL_START_FUNC) { + strcat(msgline, " [Start]"); + } + if (irb->scsw.ctrl & SCSW_FCTL_HALT_FUNC) { + strcat(msgline, " [Halt]"); + } + if (irb->scsw.ctrl & SCSW_FCTL_CLEAR_FUNC) { + strcat(msgline, " [Clear]"); + } + strcat(msgline, "\n"); + sclp_print(msgline); + + msgline[0] = '\0'; + strcat(msgline, " Activity Ctrl :"); + if (irb->scsw.ctrl & SCSW_ACTL_RESUME_PEND) { + strcat(msgline, " [Resume-Pending]"); + } + if (irb->scsw.ctrl & SCSW_ACTL_START_PEND) { + strcat(msgline, " [Start-Pending]"); + } + if (irb->scsw.ctrl & SCSW_ACTL_HALT_PEND) { + strcat(msgline, " [Halt-Pending]"); + } + if (irb->scsw.ctrl & SCSW_ACTL_CLEAR_PEND) { + strcat(msgline, " [Clear-Pending]"); + } + if (irb->scsw.ctrl & SCSW_ACTL_CH_ACTIVE) { + strcat(msgline, " [Channel-Active]"); + } + if (irb->scsw.ctrl & SCSW_ACTL_DEV_ACTIVE) { + strcat(msgline, " [Device-Active]"); + } + if (irb->scsw.ctrl & SCSW_ACTL_SUSPENDED) { + strcat(msgline, " [Suspended]"); + } + strcat(msgline, "\n"); + sclp_print(msgline); + + msgline[0] = '\0'; + strcat(msgline, " Status Ctrl :"); + if (irb->scsw.ctrl & SCSW_SCTL_ALERT) { + strcat(msgline, " [Alert]"); + } + if (irb->scsw.ctrl & SCSW_SCTL_INTERMED) { + strcat(msgline, " [Intermediate]"); + } + if (irb->scsw.ctrl & SCSW_SCTL_PRIMARY) { + strcat(msgline, " [Primary]"); + } + if (irb->scsw.ctrl & SCSW_SCTL_SECONDARY) { + strcat(msgline, " [Secondary]"); + } + if (irb->scsw.ctrl & SCSW_SCTL_STATUS_PEND) { + strcat(msgline, " [Status-Pending]"); + } + + strcat(msgline, "\n"); + sclp_print(msgline); + + msgline[0] = '\0'; + strcat(msgline, " Device Status :"); + if (irb->scsw.dstat & SCSW_DSTAT_ATTN) { + strcat(msgline, " [Attention]"); + } + if (irb->scsw.dstat & SCSW_DSTAT_STATMOD) { + strcat(msgline, " [Status-Modifier]"); + } + if (irb->scsw.dstat & SCSW_DSTAT_CUEND) { + strcat(msgline, " [Ctrl-Unit-End]"); + } + if (irb->scsw.dstat & SCSW_DSTAT_BUSY) { + strcat(msgline, " [Busy]"); + } + if (irb->scsw.dstat & SCSW_DSTAT_CHEND) { + strcat(msgline, " [Channel-End]"); + } + if (irb->scsw.dstat & SCSW_DSTAT_DEVEND) { + strcat(msgline, " [Device-End]"); + } + if (irb->scsw.dstat & SCSW_DSTAT_UCHK) { + strcat(msgline, " [Unit-Check]"); + } + if (irb->scsw.dstat & SCSW_DSTAT_UEXCP) { + strcat(msgline, " [Unit-Exception]"); + } + strcat(msgline, "\n"); + sclp_print(msgline); + + msgline[0] = '\0'; + strcat(msgline, " Channel Status :"); + if (irb->scsw.cstat & SCSW_CSTAT_PCINT) { + strcat(msgline, " [Program-Ctrl-Interruption]"); + } + if (irb->scsw.cstat & SCSW_CSTAT_BADLEN) { + strcat(msgline, " [Incorrect-Length]"); + } + if (irb->scsw.cstat & SCSW_CSTAT_PROGCHK) { + strcat(msgline, " [Program-Check]"); + } + if (irb->scsw.cstat & SCSW_CSTAT_PROTCHK) { + strcat(msgline, " [Protection-Check]"); + } + if (irb->scsw.cstat & SCSW_CSTAT_CHDCHK) { + strcat(msgline, " [Channel-Data-Check]"); + } + if (irb->scsw.cstat & SCSW_CSTAT_CHCCHK) { + strcat(msgline, " [Channel-Ctrl-Check]"); + } + if (irb->scsw.cstat & SCSW_CSTAT_ICCHK) { + strcat(msgline, " [Interface-Ctrl-Check]"); + } + if (irb->scsw.cstat & SCSW_CSTAT_CHAINCHK) { + strcat(msgline, " [Chaining-Check]"); + } + strcat(msgline, "\n"); + sclp_print(msgline); + + print_int(" cpa=", irb->scsw.cpa); + print_int(" prev_ccw=", prev_ccw); + print_int(" this_ccw=", this_ccw); +} + +/* + * Handles executing ssch, tsch and returns the irb obtained from tsch. + * Returns 0 on success, -1 if unexpected status pending and we need to retry, + * otherwise returns condition code from ssch/tsch for error cases. + */ +static int __do_cio(SubChannelId schid, uint32_t ccw_addr, int fmt, Irb *irb) +{ + CmdOrb orb = {}; + int rc; + + IPL_assert(fmt == 0 || fmt == 1, "Invalid ccw format"); + + /* ccw_addr must be <= 24 bits and point to at least one whole ccw. */ + if (fmt == 0) { + IPL_assert(ccw_addr <= 0xFFFFFF - 8, "Invalid ccw address"); + } + + orb.fmt = fmt; + orb.pfch = 1; /* QEMU's cio implementation requires prefetch */ + orb.c64 = 1; /* QEMU's cio implementation requires 64-bit idaws */ + orb.lpm = 0xFF; /* All paths allowed */ + orb.cpa = ccw_addr; + + rc = ssch(schid, &orb); + if (rc == 1 || rc == 2) { + /* Subchannel status pending or busy. Eat status and ask for retry. */ + tsch(schid, irb); + return -1; + } + if (rc) { + print_int("ssch failed with cc=", rc); + return rc; + } + + consume_io_int(); + + /* collect status */ + rc = tsch(schid, irb); + if (rc) { + print_int("tsch failed with cc=", rc); + } + + return rc; +} + +/* + * Executes a channel program at a given subchannel. The request to run the + * channel program is sent to the subchannel, we then wait for the interrupt + * signaling completion of the I/O operation(s) performed by the channel + * program. Lastly we verify that the i/o operation completed without error and + * that the interrupt we received was for the subchannel used to run the + * channel program. + * + * Note: This function assumes it is running in an environment where no other + * cpus are generating or receiving I/O interrupts. So either run it in a + * single-cpu environment or make sure all other cpus are not doing I/O and + * have I/O interrupts masked off. We also assume that only one device is + * active (generating i/o interrupts). + * + * Returns non-zero on error. + */ +int do_cio(SubChannelId schid, uint16_t cutype, uint32_t ccw_addr, int fmt) +{ + Irb irb = {}; + SenseDataEckdDasd sd; + int rc, retries = 0; + + while (true) { + rc = __do_cio(schid, ccw_addr, fmt, &irb); + + if (rc == -1) { + retries++; + continue; + } + if (rc) { + /* ssch/tsch error. Message already reported by __do_cio */ + break; + } + + if (!irb_error(&irb)) { + break; + } + + /* + * Unexpected unit check, or interface-control-check. Use sense to + * clear (unit check only) then retry. + */ + if ((unit_check(&irb) || iface_ctrl_check(&irb)) && retries <= 2) { + if (unit_check(&irb)) { + basic_sense(schid, cutype, &sd, sizeof(sd)); + } + retries++; + continue; + } + + sclp_print("cio device error\n"); + print_int(" ssid ", schid.ssid); + print_int(" cssid ", schid.cssid); + print_int(" sch_no", schid.sch_no); + print_int(" ctrl-unit type", cutype); + sclp_print("\n"); + print_irb_err(&irb); + if (cutype == CU_TYPE_DASD_3990 || cutype == CU_TYPE_DASD_2107 || + cutype == CU_TYPE_UNKNOWN) { + if (!basic_sense(schid, cutype, &sd, sizeof(sd))) { + print_eckd_dasd_sense_data(&sd); + } + } + rc = -1; + break; + } + + return rc; +} diff --git a/pc-bios/s390-ccw/cio.h b/pc-bios/s390-ccw/cio.h index 1a0795f645..aaa432dedd 100644 --- a/pc-bios/s390-ccw/cio.h +++ b/pc-bios/s390-ccw/cio.h @@ -17,35 +17,35 @@ * path management control word */ struct pmcw { - __u32 intparm; /* interruption parameter */ - __u32 qf : 1; /* qdio facility */ - __u32 w : 1; - __u32 isc : 3; /* interruption sublass */ - __u32 res5 : 3; /* reserved zeros */ - __u32 ena : 1; /* enabled */ - __u32 lm : 2; /* limit mode */ - __u32 mme : 2; /* measurement-mode enable */ - __u32 mp : 1; /* multipath mode */ - __u32 tf : 1; /* timing facility */ - __u32 dnv : 1; /* device number valid */ - __u32 dev : 16; /* device number */ - __u8 lpm; /* logical path mask */ - __u8 pnom; /* path not operational mask */ - __u8 lpum; /* last path used mask */ - __u8 pim; /* path installed mask */ - __u16 mbi; /* measurement-block index */ - __u8 pom; /* path operational mask */ - __u8 pam; /* path available mask */ - __u8 chpid[8]; /* CHPID 0-7 (if available) */ - __u32 unused1 : 8; /* reserved zeros */ - __u32 st : 3; /* subchannel type */ - __u32 unused2 : 18; /* reserved zeros */ - __u32 mbfc : 1; /* measurement block format control */ - __u32 xmwme : 1; /* extended measurement word mode enable */ - __u32 csense : 1; /* concurrent sense; can be enabled ...*/ - /* ... per MSCH, however, if facility */ - /* ... is not installed, this results */ - /* ... in an operand exception. */ + __u32 intparm; /* interruption parameter */ + __u32 qf:1; /* qdio facility */ + __u32 w:1; + __u32 isc:3; /* interruption sublass */ + __u32 res5:3; /* reserved zeros */ + __u32 ena:1; /* enabled */ + __u32 lm:2; /* limit mode */ + __u32 mme:2; /* measurement-mode enable */ + __u32 mp:1; /* multipath mode */ + __u32 tf:1; /* timing facility */ + __u32 dnv:1; /* device number valid */ + __u32 dev:16; /* device number */ + __u8 lpm; /* logical path mask */ + __u8 pnom; /* path not operational mask */ + __u8 lpum; /* last path used mask */ + __u8 pim; /* path installed mask */ + __u16 mbi; /* measurement-block index */ + __u8 pom; /* path operational mask */ + __u8 pam; /* path available mask */ + __u8 chpid[8]; /* CHPID 0-7 (if available) */ + __u32 unused1:8; /* reserved zeros */ + __u32 st:3; /* subchannel type */ + __u32 unused2:18; /* reserved zeros */ + __u32 mbfc:1; /* measurement block format control */ + __u32 xmwme:1; /* extended measurement word mode enable */ + __u32 csense:1; /* concurrent sense; can be enabled ...*/ + /* ... per MSCH, however, if facility */ + /* ... is not installed, this results */ + /* ... in an operand exception. */ } __attribute__ ((packed)); /* Target SCHIB configuration. */ @@ -70,35 +70,72 @@ struct scsw { __u16 count; } __attribute__ ((packed)); -#define SCSW_FCTL_CLEAR_FUNC 0x1000 -#define SCSW_FCTL_HALT_FUNC 0x2000 +/* Function Control */ #define SCSW_FCTL_START_FUNC 0x4000 +#define SCSW_FCTL_HALT_FUNC 0x2000 +#define SCSW_FCTL_CLEAR_FUNC 0x1000 + +/* Activity Control */ +#define SCSW_ACTL_RESUME_PEND 0x0800 +#define SCSW_ACTL_START_PEND 0x0400 +#define SCSW_ACTL_HALT_PEND 0x0200 +#define SCSW_ACTL_CLEAR_PEND 0x0100 +#define SCSW_ACTL_CH_ACTIVE 0x0080 +#define SCSW_ACTL_DEV_ACTIVE 0x0040 +#define SCSW_ACTL_SUSPENDED 0x0020 + +/* Status Control */ +#define SCSW_SCTL_ALERT 0x0010 +#define SCSW_SCTL_INTERMED 0x0008 +#define SCSW_SCTL_PRIMARY 0x0004 +#define SCSW_SCTL_SECONDARY 0x0002 +#define SCSW_SCTL_STATUS_PEND 0x0001 + +/* SCSW Device Status Flags */ +#define SCSW_DSTAT_ATTN 0x80 +#define SCSW_DSTAT_STATMOD 0x40 +#define SCSW_DSTAT_CUEND 0x20 +#define SCSW_DSTAT_BUSY 0x10 +#define SCSW_DSTAT_CHEND 0x08 +#define SCSW_DSTAT_DEVEND 0x04 +#define SCSW_DSTAT_UCHK 0x02 +#define SCSW_DSTAT_UEXCP 0x01 + +/* SCSW Subchannel Status Flags */ +#define SCSW_CSTAT_PCINT 0x80 +#define SCSW_CSTAT_BADLEN 0x40 +#define SCSW_CSTAT_PROGCHK 0x20 +#define SCSW_CSTAT_PROTCHK 0x10 +#define SCSW_CSTAT_CHDCHK 0x08 +#define SCSW_CSTAT_CHCCHK 0x04 +#define SCSW_CSTAT_ICCHK 0x02 +#define SCSW_CSTAT_CHAINCHK 0x01 /* * subchannel information block */ -struct schib { +typedef struct schib { struct pmcw pmcw; /* path management control word */ struct scsw scsw; /* subchannel status word */ __u64 mba; /* measurement block address */ __u8 mda[4]; /* model dependent area */ -} __attribute__ ((packed,aligned(4))); - -struct subchannel_id { - __u32 cssid : 8; - __u32 : 4; - __u32 m : 1; - __u32 ssid : 2; - __u32 one : 1; - __u32 sch_no : 16; -} __attribute__ ((packed, aligned(4))); +} __attribute__ ((packed, aligned(4))) Schib; + +typedef struct subchannel_id { + __u32 cssid:8; + __u32:4; + __u32 m:1; + __u32 ssid:2; + __u32 one:1; + __u32 sch_no:16; +} __attribute__ ((packed, aligned(4))) SubChannelId; struct chsc_header { __u16 length; __u16 code; } __attribute__((packed)); -struct chsc_area_sda { +typedef struct chsc_area_sda { struct chsc_header request; __u8 reserved1:4; __u8 format:4; @@ -111,29 +148,49 @@ struct chsc_area_sda { __u32 reserved5:4; __u32 format2:4; __u32 reserved6:24; -} __attribute__((packed)); +} __attribute__((packed)) ChscAreaSda; /* * TPI info structure */ struct tpi_info { struct subchannel_id schid; - __u32 intparm; /* interruption parameter */ - __u32 adapter_IO : 1; - __u32 reserved2 : 1; - __u32 isc : 3; - __u32 reserved3 : 12; - __u32 int_type : 3; - __u32 reserved4 : 12; + __u32 intparm; /* interruption parameter */ + __u32 adapter_IO:1; + __u32 reserved2:1; + __u32 isc:3; + __u32 reserved3:12; + __u32 int_type:3; + __u32 reserved4:12; } __attribute__ ((packed, aligned(4))); -/* channel command word (type 1) */ -struct ccw1 { +/* channel command word (format 0) */ +typedef struct ccw0 { + __u8 cmd_code; + __u32 cda:24; + __u32 chainData:1; + __u32 chain:1; + __u32 sli:1; + __u32 skip:1; + __u32 pci:1; + __u32 ida:1; + __u32 suspend:1; + __u32 mida:1; + __u8 reserved; + __u16 count; +} __attribute__ ((packed, aligned(8))) Ccw0; + +/* channel command word (format 1) */ +typedef struct ccw1 { __u8 cmd_code; __u8 flags; __u16 count; __u32 cda; -} __attribute__ ((packed, aligned(8))); +} __attribute__ ((packed, aligned(8))) Ccw1; + +/* do_cio() CCW formats */ +#define CCW_FMT0 0x00 +#define CCW_FMT1 0x01 #define CCW_FLAG_DC 0x80 #define CCW_FLAG_CC 0x40 @@ -143,11 +200,14 @@ struct ccw1 { #define CCW_FLAG_IDA 0x04 #define CCW_FLAG_SUSPEND 0x02 +/* Common CCW commands */ +#define CCW_CMD_READ_IPL 0x02 #define CCW_CMD_NOOP 0x03 #define CCW_CMD_BASIC_SENSE 0x04 #define CCW_CMD_TIC 0x08 #define CCW_CMD_SENSE_ID 0xe4 +/* Virtio CCW commands */ #define CCW_CMD_SET_VQ 0x13 #define CCW_CMD_VDEV_RESET 0x33 #define CCW_CMD_READ_FEAT 0x12 @@ -159,10 +219,16 @@ struct ccw1 { #define CCW_CMD_SET_CONF_IND 0x53 #define CCW_CMD_READ_VQ_CONF 0x32 +/* DASD CCW commands */ +#define CCW_CMD_DASD_READ 0x06 +#define CCW_CMD_DASD_SEEK 0x07 +#define CCW_CMD_DASD_SEARCH_ID_EQ 0x31 +#define CCW_CMD_DASD_READ_MT 0x86 + /* * Command-mode operation request block */ -struct cmd_orb { +typedef struct cmd_orb { __u32 intparm; /* interruption parameter */ __u32 key:4; /* flags, like key, suspend control, etc. */ __u32 spnd:1; /* suspend control */ @@ -182,7 +248,7 @@ struct cmd_orb { __u32 zero:6; /* reserved zeros */ __u32 orbx:1; /* ORB extension control */ __u32 cpa; /* channel program address */ -} __attribute__ ((packed, aligned(4))); +} __attribute__ ((packed, aligned(4))) CmdOrb; struct ciw { __u8 type; @@ -190,10 +256,15 @@ struct ciw { __u16 count; }; +#define CU_TYPE_UNKNOWN 0x0000 +#define CU_TYPE_DASD_2107 0x2107 +#define CU_TYPE_VIRTIO 0x3832 +#define CU_TYPE_DASD_3990 0x3990 + /* * sense-id response buffer layout */ -struct senseid { +typedef struct senseid { /* common part */ __u8 reserved; /* always 0x'FF' */ __u16 cu_type; /* control unit type */ @@ -203,15 +274,94 @@ struct senseid { __u8 unused; /* padding byte */ /* extended part */ struct ciw ciw[62]; -} __attribute__ ((packed, aligned(4))); +} __attribute__ ((packed, aligned(4))) SenseId; + +/* + * architected values for first sense byte - common_status. Bits 0-5 of this + * field are common to all device types. + */ +#define SNS_STAT0_CMD_REJECT 0x80 +#define SNS_STAT0_INTERVENTION_REQ 0x40 +#define SNS_STAT0_BUS_OUT_CHECK 0x20 +#define SNS_STAT0_EQUIPMENT_CHECK 0x10 +#define SNS_STAT0_DATA_CHECK 0x08 +#define SNS_STAT0_OVERRUN 0x04 +#define SNS_STAT0_INCOMPL_DOMAIN 0x01 + +/* ECKD DASD status[0] byte */ +#define SNS_STAT1_PERM_ERR 0x80 +#define SNS_STAT1_INV_TRACK_FORMAT 0x40 +#define SNS_STAT1_EOC 0x20 +#define SNS_STAT1_MESSAGE_TO_OPER 0x10 +#define SNS_STAT1_NO_REC_FOUND 0x08 +#define SNS_STAT1_FILE_PROTECTED 0x04 +#define SNS_STAT1_WRITE_INHIBITED 0x02 +#define SNS_STAT1_IMPRECISE_END 0x01 + +/* ECKD DASD status[1] byte */ +#define SNS_STAT2_REQ_INH_WRITE 0x80 +#define SNS_STAT2_CORRECTABLE 0x40 +#define SNS_STAT2_FIRST_LOG_ERR 0x20 +#define SNS_STAT2_ENV_DATA_PRESENT 0x10 +#define SNS_STAT2_IMPRECISE_END 0x04 + +/* ECKD DASD 24-byte Sense fmt_msg codes */ +#define SENSE24_FMT_PROG_SYS 0x0 +#define SENSE24_FMT_EQUIPMENT 0x2 +#define SENSE24_FMT_CONTROLLER 0x3 +#define SENSE24_FMT_MISC 0xF + +/* basic sense response buffer layout */ +typedef struct SenseDataEckdDasd { + uint8_t common_status; + uint8_t status[2]; + uint8_t res_count; + uint8_t phys_drive_id; + uint8_t low_cyl_addr; + uint8_t head_high_cyl_addr; + uint8_t fmt_msg; + uint64_t fmt_dependent_info[2]; + uint8_t reserved; + uint8_t program_action_code; + uint16_t config_info; + uint8_t mcode_hicyl; + uint8_t cyl_head_addr[3]; +} __attribute__ ((packed, aligned(4))) SenseDataEckdDasd; + +#define ECKD_SENSE24_GET_FMT(sd) (sd->fmt_msg & 0xF0 >> 4) +#define ECKD_SENSE24_GET_MSG(sd) (sd->fmt_msg & 0x0F) + +#define unit_check(irb) ((irb)->scsw.dstat & SCSW_DSTAT_UCHK) +#define iface_ctrl_check(irb) ((irb)->scsw.cstat & SCSW_CSTAT_ICCHK) /* interruption response block */ -struct irb { +typedef struct irb { struct scsw scsw; __u32 esw[5]; __u32 ecw[8]; __u32 emw[8]; -} __attribute__ ((packed, aligned(4))); +} __attribute__ ((packed, aligned(4))) Irb; + +/* Used for SEEK ccw commands */ +typedef struct CcwSeekData { + uint16_t reserved; + uint16_t cyl; + uint16_t head; +} __attribute__((packed)) CcwSeekData; + +/* Used for SEARCH ID ccw commands */ +typedef struct CcwSearchIdData { + uint16_t cyl; + uint16_t head; + uint8_t record; +} __attribute__((packed)) CcwSearchIdData; + +int enable_mss_facility(void); +void enable_subchannel(SubChannelId schid); +uint16_t cu_type(SubChannelId schid); +int basic_sense(SubChannelId schid, uint16_t cutype, void *sense_data, + uint16_t data_size); +int do_cio(SubChannelId schid, uint16_t cutype, uint32_t ccw_addr, int fmt); /* * Some S390 specific IO instructions as inline diff --git a/pc-bios/s390-ccw/dasd-ipl.c b/pc-bios/s390-ccw/dasd-ipl.c new file mode 100644 index 0000000000..0fc879bb8e --- /dev/null +++ b/pc-bios/s390-ccw/dasd-ipl.c @@ -0,0 +1,235 @@ +/* + * S390 IPL (boot) from a real DASD device via vfio framework. + * + * Copyright (c) 2019 Jason J. Herne <jjherne@us.ibm.com> + * + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. + */ + +#include "libc.h" +#include "s390-ccw.h" +#include "s390-arch.h" +#include "dasd-ipl.h" +#include "helper.h" + +static char prefix_page[PAGE_SIZE * 2] + __attribute__((__aligned__(PAGE_SIZE * 2))); + +static void enable_prefixing(void) +{ + memcpy(&prefix_page, lowcore, 4096); + set_prefix(ptr2u32(&prefix_page)); +} + +static void disable_prefixing(void) +{ + set_prefix(0); + /* Copy io interrupt info back to low core */ + memcpy((void *)&lowcore->subchannel_id, prefix_page + 0xB8, 12); +} + +static bool is_read_tic_ccw_chain(Ccw0 *ccw) +{ + Ccw0 *next_ccw = ccw + 1; + + return ((ccw->cmd_code == CCW_CMD_DASD_READ || + ccw->cmd_code == CCW_CMD_DASD_READ_MT) && + ccw->chain && next_ccw->cmd_code == CCW_CMD_TIC); +} + +static bool dynamic_cp_fixup(uint32_t ccw_addr, uint32_t *next_cpa) +{ + Ccw0 *cur_ccw = (Ccw0 *)(uint64_t)ccw_addr; + Ccw0 *tic_ccw; + + while (true) { + /* Skip over inline TIC (it might not have the chain bit on) */ + if (cur_ccw->cmd_code == CCW_CMD_TIC && + cur_ccw->cda == ptr2u32(cur_ccw) - 8) { + cur_ccw += 1; + continue; + } + + if (!cur_ccw->chain) { + break; + } + if (is_read_tic_ccw_chain(cur_ccw)) { + /* + * Breaking a chain of CCWs may alter the semantics or even the + * validity of a channel program. The heuristic implemented below + * seems to work well in practice for the channel programs + * generated by zipl. + */ + tic_ccw = cur_ccw + 1; + *next_cpa = tic_ccw->cda; + cur_ccw->chain = 0; + return true; + } + cur_ccw += 1; + } + return false; +} + +static int run_dynamic_ccw_program(SubChannelId schid, uint16_t cutype, + uint32_t cpa) +{ + bool has_next; + uint32_t next_cpa = 0; + int rc; + + do { + has_next = dynamic_cp_fixup(cpa, &next_cpa); + + print_int("executing ccw chain at ", cpa); + enable_prefixing(); + rc = do_cio(schid, cutype, cpa, CCW_FMT0); + disable_prefixing(); + + if (rc) { + break; + } + cpa = next_cpa; + } while (has_next); + + return rc; +} + +static void make_readipl(void) +{ + Ccw0 *ccwIplRead = (Ccw0 *)0x00; + + /* Create Read IPL ccw at address 0 */ + ccwIplRead->cmd_code = CCW_CMD_READ_IPL; + ccwIplRead->cda = 0x00; /* Read into address 0x00 in main memory */ + ccwIplRead->chain = 0; /* Chain flag */ + ccwIplRead->count = 0x18; /* Read 0x18 bytes of data */ +} + +static void run_readipl(SubChannelId schid, uint16_t cutype) +{ + if (do_cio(schid, cutype, 0x00, CCW_FMT0)) { + panic("dasd-ipl: Failed to run Read IPL channel program\n"); + } +} + +/* + * The architecture states that IPL1 data should consist of a psw followed by + * format-0 READ and TIC CCWs. Let's sanity check. + */ +static void check_ipl1(void) +{ + Ccw0 *ccwread = (Ccw0 *)0x08; + Ccw0 *ccwtic = (Ccw0 *)0x10; + + if (ccwread->cmd_code != CCW_CMD_DASD_READ || + ccwtic->cmd_code != CCW_CMD_TIC) { + panic("dasd-ipl: IPL1 data invalid. Is this disk really bootable?\n"); + } +} + +static void check_ipl2(uint32_t ipl2_addr) +{ + Ccw0 *ccw = u32toptr(ipl2_addr); + + if (ipl2_addr == 0x00) { + panic("IPL2 address invalid. Is this disk really bootable?\n"); + } + if (ccw->cmd_code == 0x00) { + panic("IPL2 ccw data invalid. Is this disk really bootable?\n"); + } +} + +static uint32_t read_ipl2_addr(void) +{ + Ccw0 *ccwtic = (Ccw0 *)0x10; + + return ccwtic->cda; +} + +static void ipl1_fixup(void) +{ + Ccw0 *ccwSeek = (Ccw0 *) 0x08; + Ccw0 *ccwSearchID = (Ccw0 *) 0x10; + Ccw0 *ccwSearchTic = (Ccw0 *) 0x18; + Ccw0 *ccwRead = (Ccw0 *) 0x20; + CcwSeekData *seekData = (CcwSeekData *) 0x30; + CcwSearchIdData *searchData = (CcwSearchIdData *) 0x38; + + /* move IPL1 CCWs to make room for CCWs needed to locate record 2 */ + memcpy(ccwRead, (void *)0x08, 16); + + /* Disable chaining so we don't TIC to IPL2 channel program */ + ccwRead->chain = 0x00; + + ccwSeek->cmd_code = CCW_CMD_DASD_SEEK; + ccwSeek->cda = ptr2u32(seekData); + ccwSeek->chain = 1; + ccwSeek->count = sizeof(*seekData); + seekData->reserved = 0x00; + seekData->cyl = 0x00; + seekData->head = 0x00; + + ccwSearchID->cmd_code = CCW_CMD_DASD_SEARCH_ID_EQ; + ccwSearchID->cda = ptr2u32(searchData); + ccwSearchID->chain = 1; + ccwSearchID->count = sizeof(*searchData); + searchData->cyl = 0; + searchData->head = 0; + searchData->record = 2; + + /* Go back to Search CCW if correct record not yet found */ + ccwSearchTic->cmd_code = CCW_CMD_TIC; + ccwSearchTic->cda = ptr2u32(ccwSearchID); +} + +static void run_ipl1(SubChannelId schid, uint16_t cutype) + { + uint32_t startAddr = 0x08; + + if (do_cio(schid, cutype, startAddr, CCW_FMT0)) { + panic("dasd-ipl: Failed to run IPL1 channel program\n"); + } +} + +static void run_ipl2(SubChannelId schid, uint16_t cutype, uint32_t addr) +{ + if (run_dynamic_ccw_program(schid, cutype, addr)) { + panic("dasd-ipl: Failed to run IPL2 channel program\n"); + } +} + +/* + * Limitations in vfio-ccw support complicate the IPL process. Details can + * be found in docs/devel/s390-dasd-ipl.txt + */ +void dasd_ipl(SubChannelId schid, uint16_t cutype) +{ + PSWLegacy *pswl = (PSWLegacy *) 0x00; + uint32_t ipl2_addr; + + /* Construct Read IPL CCW and run it to read IPL1 from boot disk */ + make_readipl(); + run_readipl(schid, cutype); + ipl2_addr = read_ipl2_addr(); + check_ipl1(); + + /* + * Fixup IPL1 channel program to account for vfio-ccw limitations, then run + * it to read IPL2 channel program from boot disk. + */ + ipl1_fixup(); + run_ipl1(schid, cutype); + check_ipl2(ipl2_addr); + + /* + * Run IPL2 channel program to read operating system code from boot disk + */ + run_ipl2(schid, cutype, ipl2_addr); + + /* Transfer control to the guest operating system */ + pswl->mask |= PSW_MASK_EAMODE; /* Force z-mode */ + pswl->addr |= PSW_MASK_BAMODE; /* ... */ + jump_to_low_kernel(); +} diff --git a/pc-bios/s390-ccw/dasd-ipl.h b/pc-bios/s390-ccw/dasd-ipl.h new file mode 100644 index 0000000000..c394828906 --- /dev/null +++ b/pc-bios/s390-ccw/dasd-ipl.h @@ -0,0 +1,16 @@ +/* + * S390 IPL (boot) from a real DASD device via vfio framework. + * + * Copyright (c) 2019 Jason J. Herne <jjherne@us.ibm.com> + * + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. + */ + +#ifndef DASD_IPL_H +#define DASD_IPL_H + +void dasd_ipl(SubChannelId schid, uint16_t cutype); + +#endif /* DASD_IPL_H */ diff --git a/pc-bios/s390-ccw/helper.h b/pc-bios/s390-ccw/helper.h new file mode 100644 index 0000000000..78d5bc7442 --- /dev/null +++ b/pc-bios/s390-ccw/helper.h @@ -0,0 +1,31 @@ +/* + * Helper Functions + * + * Copyright (c) 2019 IBM Corp. + * + * Author(s): Jason J. Herne <jjherne@us.ibm.com> + * + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. + */ + +#ifndef S390_CCW_HELPER_H +#define S390_CCW_HELPER_H + +#include "s390-ccw.h" + +/* Avoids compiler warnings when casting a pointer to a u32 */ +static inline uint32_t ptr2u32(void *ptr) +{ + IPL_assert((uint64_t)ptr <= 0xffffffff, "ptr2u32: ptr too large"); + return (uint32_t)(uint64_t)ptr; +} + +/* Avoids compiler warnings when casting a u32 to a pointer */ +static inline void *u32toptr(uint32_t n) +{ + return (void *)(uint64_t)n; +} + +#endif diff --git a/pc-bios/s390-ccw/libc.h b/pc-bios/s390-ccw/libc.h index 818517ff5d..bcdc45732d 100644 --- a/pc-bios/s390-ccw/libc.h +++ b/pc-bios/s390-ccw/libc.h @@ -67,6 +67,17 @@ static inline size_t strlen(const char *str) return i; } +static inline char *strcat(char *dest, const char *src) +{ + int i; + char *dest_end = dest + strlen(dest); + + for (i = 0; i <= strlen(src); i++) { + dest_end[i] = src[i]; + } + return dest; +} + static inline int isdigit(int c) { return (c >= '0') && (c <= '9'); diff --git a/pc-bios/s390-ccw/main.c b/pc-bios/s390-ccw/main.c index 544851d672..a69c73349e 100644 --- a/pc-bios/s390-ccw/main.c +++ b/pc-bios/s390-ccw/main.c @@ -9,21 +9,27 @@ */ #include "libc.h" +#include "s390-arch.h" #include "s390-ccw.h" +#include "cio.h" #include "virtio.h" +#include "dasd-ipl.h" char stack[PAGE_SIZE * 8] __attribute__((__aligned__(PAGE_SIZE))); static SubChannelId blk_schid = { .one = 1 }; -IplParameterBlock iplb __attribute__((__aligned__(PAGE_SIZE))); static char loadparm_str[LOADPARM_LEN + 1] = { 0, 0, 0, 0, 0, 0, 0, 0, 0 }; QemuIplParameters qipl; +IplParameterBlock iplb __attribute__((__aligned__(PAGE_SIZE))); +static bool have_iplb; +static uint16_t cutype; +LowCore const *lowcore; /* Yes, this *is* a pointer to address 0 */ #define LOADPARM_PROMPT "PROMPT " #define LOADPARM_EMPTY " " #define BOOT_MENU_FLAG_MASK (QIPL_FLAG_BM_OPTS_CMD | QIPL_FLAG_BM_OPTS_ZIPL) /* - * Priniciples of Operations (SA22-7832-09) chapter 17 requires that + * Principles of Operations (SA22-7832-09) chapter 17 requires that * a subsystem-identification is at 184-187 and bytes 188-191 are zero * after list-directed-IPL and ccw-IPL. */ @@ -48,29 +54,64 @@ unsigned int get_loadparm_index(void) return atoui(loadparm_str); } -static bool find_dev(Schib *schib, int dev_no) +/* + * Find the subchannel connected to the given device (dev_no) and fill in the + * subchannel information block (schib) with the connected subchannel's info. + * NOTE: The global variable blk_schid is updated to contain the subchannel + * information. + * + * If the caller gives dev_no=-1 then the user did not specify a boot device. + * In this case we'll just use the first potentially bootable device we find. + */ +static bool find_subch(int dev_no) { + Schib schib; int i, r; + bool is_virtio; for (i = 0; i < 0x10000; i++) { blk_schid.sch_no = i; - r = stsch_err(blk_schid, schib); + r = stsch_err(blk_schid, &schib); if ((r == 3) || (r == -EIO)) { break; } - if (!schib->pmcw.dnv) { - continue; - } - if (!virtio_is_supported(blk_schid)) { + if (!schib.pmcw.dnv) { continue; } - /* Skip net devices since no IPLB is created and therefore no - * no network bootloader has been loaded + + enable_subchannel(blk_schid); + cutype = cu_type(blk_schid); + + /* + * Note: we always have to run virtio_is_supported() here to make + * sure that the vdev.senseid data gets pre-initialized correctly */ - if (virtio_get_device_type() == VIRTIO_ID_NET && dev_no < 0) { - continue; + is_virtio = virtio_is_supported(blk_schid); + + /* No specific devno given, just return 1st possibly bootable device */ + if (dev_no < 0) { + switch (cutype) { + case CU_TYPE_VIRTIO: + if (is_virtio) { + /* + * Skip net devices since no IPLB is created and therefore + * no network bootloader has been loaded + */ + if (virtio_get_device_type() != VIRTIO_ID_NET) { + return true; + } + } + continue; + case CU_TYPE_DASD_3990: + case CU_TYPE_DASD_2107: + return true; + default: + continue; + } } - if ((dev_no < 0) || (schib->pmcw.dev == dev_no)) { + + /* Caller asked for a specific devno */ + if (schib.pmcw.dev == dev_no) { return true; } } @@ -99,68 +140,88 @@ static void menu_setup(void) } } -static void virtio_setup(void) +/* + * Initialize the channel I/O subsystem so we can talk to our ipl/boot device. + */ +static void css_setup(void) { - Schib schib; - int ssid; - bool found = false; - uint16_t dev_no; - char ldp[] = "LOADPARM=[________]\n"; - VDev *vdev = virtio_get_device(); - QemuIplParameters *early_qipl = (QemuIplParameters *)QIPL_ADDRESS; - /* - * We unconditionally enable mss support. In every sane configuration, - * this will succeed; and even if it doesn't, stsch_err() can deal - * with the consequences. + * Unconditionally enable mss support. In every sane configuration this + * will succeed; and even if it doesn't, stsch_err() can handle it. */ enable_mss_facility(); +} + +/* + * Collect various pieces of information from the hypervisor/hardware that + * we'll use to determine exactly how we'll boot. + */ +static void boot_setup(void) +{ + char lpmsg[] = "LOADPARM=[________]\n"; sclp_get_loadparm_ascii(loadparm_str); - memcpy(ldp + 10, loadparm_str, LOADPARM_LEN); - sclp_print(ldp); + memcpy(lpmsg + 10, loadparm_str, 8); + sclp_print(lpmsg); - memcpy(&qipl, early_qipl, sizeof(QemuIplParameters)); + have_iplb = store_iplb(&iplb); +} - if (store_iplb(&iplb)) { - switch (iplb.pbt) { - case S390_IPL_TYPE_CCW: - dev_no = iplb.ccw.devno; - debug_print_int("device no. ", dev_no); - blk_schid.ssid = iplb.ccw.ssid & 0x3; - debug_print_int("ssid ", blk_schid.ssid); - found = find_dev(&schib, dev_no); - break; - case S390_IPL_TYPE_QEMU_SCSI: - vdev->scsi_device_selected = true; - vdev->selected_scsi_device.channel = iplb.scsi.channel; - vdev->selected_scsi_device.target = iplb.scsi.target; - vdev->selected_scsi_device.lun = iplb.scsi.lun; - blk_schid.ssid = iplb.scsi.ssid & 0x3; - found = find_dev(&schib, iplb.scsi.devno); - break; - default: - panic("List-directed IPL not supported yet!\n"); - } - menu_setup(); - } else { +static void find_boot_device(void) +{ + VDev *vdev = virtio_get_device(); + int ssid; + bool found; + + if (!have_iplb) { for (ssid = 0; ssid < 0x3; ssid++) { blk_schid.ssid = ssid; - found = find_dev(&schib, -1); + found = find_subch(-1); if (found) { - break; + return; } } + panic("Could not find a suitable boot device (none specified)\n"); + } + + switch (iplb.pbt) { + case S390_IPL_TYPE_CCW: + debug_print_int("device no. ", iplb.ccw.devno); + blk_schid.ssid = iplb.ccw.ssid & 0x3; + debug_print_int("ssid ", blk_schid.ssid); + found = find_subch(iplb.ccw.devno); + break; + case S390_IPL_TYPE_QEMU_SCSI: + vdev->scsi_device_selected = true; + vdev->selected_scsi_device.channel = iplb.scsi.channel; + vdev->selected_scsi_device.target = iplb.scsi.target; + vdev->selected_scsi_device.lun = iplb.scsi.lun; + blk_schid.ssid = iplb.scsi.ssid & 0x3; + found = find_subch(iplb.scsi.devno); + break; + default: + panic("List-directed IPL not supported yet!\n"); } - IPL_assert(found, "No virtio device found"); + IPL_assert(found, "Boot device not found\n"); +} + +static void virtio_setup(void) +{ + VDev *vdev = virtio_get_device(); + QemuIplParameters *early_qipl = (QemuIplParameters *)QIPL_ADDRESS; + + memcpy(&qipl, early_qipl, sizeof(QemuIplParameters)); + + if (have_iplb) { + menu_setup(); + } if (virtio_get_device_type() == VIRTIO_ID_NET) { sclp_print("Network boot device detected\n"); vdev->netboot_start_addr = qipl.netboot_start_addr; } else { virtio_blk_setup_device(blk_schid); - IPL_assert(virtio_ipl_disk_is_valid(), "No valid IPL device detected"); } } @@ -168,9 +229,24 @@ static void virtio_setup(void) int main(void) { sclp_setup(); - virtio_setup(); - - zipl_load(); /* no return */ + css_setup(); + boot_setup(); + find_boot_device(); + enable_subchannel(blk_schid); + + switch (cutype) { + case CU_TYPE_DASD_3990: + case CU_TYPE_DASD_2107: + dasd_ipl(blk_schid, cutype); /* no return */ + break; + case CU_TYPE_VIRTIO: + virtio_setup(); + zipl_load(); /* no return */ + break; + default: + print_int("Attempting to boot from unexpected device type", cutype); + panic(""); + } panic("Failed to load OS from hard disk\n"); return 0; /* make compiler happy */ diff --git a/pc-bios/s390-ccw/netboot.mak b/pc-bios/s390-ccw/netboot.mak index 14e96b2aa6..5eefb7c289 100644 --- a/pc-bios/s390-ccw/netboot.mak +++ b/pc-bios/s390-ccw/netboot.mak @@ -1,7 +1,7 @@ SLOF_DIR := $(SRC_PATH)/roms/SLOF -NETOBJS := start.o sclp.o virtio.o virtio-net.o jump2ipl.o netmain.o \ +NETOBJS := start.o sclp.o cio.o virtio.o virtio-net.o jump2ipl.o netmain.o \ libnet.a libc.a LIBC_INC := -nostdinc -I$(SLOF_DIR)/lib/libc/include diff --git a/pc-bios/s390-ccw/netmain.c b/pc-bios/s390-ccw/netmain.c index 0392131c27..f3542cb2cf 100644 --- a/pc-bios/s390-ccw/netmain.c +++ b/pc-bios/s390-ccw/netmain.c @@ -33,6 +33,7 @@ #include <pxelinux.h> #include "s390-ccw.h" +#include "cio.h" #include "virtio.h" #define DEFAULT_BOOT_RETRIES 10 @@ -475,6 +476,7 @@ static bool find_net_dev(Schib *schib, int dev_no) if (!schib->pmcw.dnv) { continue; } + enable_subchannel(net_schid); if (!virtio_is_supported(net_schid)) { continue; } diff --git a/pc-bios/s390-ccw/s390-arch.h b/pc-bios/s390-ccw/s390-arch.h new file mode 100644 index 0000000000..504fc7c2f0 --- /dev/null +++ b/pc-bios/s390-ccw/s390-arch.h @@ -0,0 +1,103 @@ +/* + * S390 Basic Architecture + * + * Copyright (c) 2019 Jason J. Herne <jjherne@us.ibm.com> + * + * This work is licensed under the terms of the GNU GPL, version 2 or (at + * your option) any later version. See the COPYING file in the top-level + * directory. + */ + +#ifndef S390_ARCH_H +#define S390_ARCH_H + +typedef struct PSW { + uint64_t mask; + uint64_t addr; +} __attribute__ ((aligned(8))) PSW; +_Static_assert(sizeof(struct PSW) == 16, "PSW size incorrect"); + +/* Older PSW format used by LPSW instruction */ +typedef struct PSWLegacy { + uint32_t mask; + uint32_t addr; +} __attribute__ ((aligned(8))) PSWLegacy; +_Static_assert(sizeof(struct PSWLegacy) == 8, "PSWLegacy size incorrect"); + +/* s390 psw bit masks */ +#define PSW_MASK_IOINT 0x0200000000000000ULL +#define PSW_MASK_WAIT 0x0002000000000000ULL +#define PSW_MASK_EAMODE 0x0000000100000000ULL +#define PSW_MASK_BAMODE 0x0000000080000000ULL +#define PSW_MASK_ZMODE (PSW_MASK_EAMODE | PSW_MASK_BAMODE) + +/* Low core mapping */ +typedef struct LowCore { + /* prefix area: defined by architecture */ + PSWLegacy ipl_psw; /* 0x000 */ + uint32_t ccw1[2]; /* 0x008 */ + uint32_t ccw2[2]; /* 0x010 */ + uint8_t pad1[0x80 - 0x18]; /* 0x018 */ + uint32_t ext_params; /* 0x080 */ + uint16_t cpu_addr; /* 0x084 */ + uint16_t ext_int_code; /* 0x086 */ + uint16_t svc_ilen; /* 0x088 */ + uint16_t svc_code; /* 0x08a */ + uint16_t pgm_ilen; /* 0x08c */ + uint16_t pgm_code; /* 0x08e */ + uint32_t data_exc_code; /* 0x090 */ + uint16_t mon_class_num; /* 0x094 */ + uint16_t per_perc_atmid; /* 0x096 */ + uint64_t per_address; /* 0x098 */ + uint8_t exc_access_id; /* 0x0a0 */ + uint8_t per_access_id; /* 0x0a1 */ + uint8_t op_access_id; /* 0x0a2 */ + uint8_t ar_access_id; /* 0x0a3 */ + uint8_t pad2[0xA8 - 0xA4]; /* 0x0a4 */ + uint64_t trans_exc_code; /* 0x0a8 */ + uint64_t monitor_code; /* 0x0b0 */ + uint16_t subchannel_id; /* 0x0b8 */ + uint16_t subchannel_nr; /* 0x0ba */ + uint32_t io_int_parm; /* 0x0bc */ + uint32_t io_int_word; /* 0x0c0 */ + uint8_t pad3[0xc8 - 0xc4]; /* 0x0c4 */ + uint32_t stfl_fac_list; /* 0x0c8 */ + uint8_t pad4[0xe8 - 0xcc]; /* 0x0cc */ + uint64_t mcic; /* 0x0e8 */ + uint8_t pad5[0xf4 - 0xf0]; /* 0x0f0 */ + uint32_t external_damage_code; /* 0x0f4 */ + uint64_t failing_storage_address; /* 0x0f8 */ + uint8_t pad6[0x110 - 0x100]; /* 0x100 */ + uint64_t per_breaking_event_addr; /* 0x110 */ + uint8_t pad7[0x120 - 0x118]; /* 0x118 */ + PSW restart_old_psw; /* 0x120 */ + PSW external_old_psw; /* 0x130 */ + PSW svc_old_psw; /* 0x140 */ + PSW program_old_psw; /* 0x150 */ + PSW mcck_old_psw; /* 0x160 */ + PSW io_old_psw; /* 0x170 */ + uint8_t pad8[0x1a0 - 0x180]; /* 0x180 */ + PSW restart_new_psw; /* 0x1a0 */ + PSW external_new_psw; /* 0x1b0 */ + PSW svc_new_psw; /* 0x1c0 */ + PSW program_new_psw; /* 0x1d0 */ + PSW mcck_new_psw; /* 0x1e0 */ + PSW io_new_psw; /* 0x1f0 */ +} __attribute__((packed, aligned(8192))) LowCore; + +extern LowCore const *lowcore; + +static inline void set_prefix(uint32_t address) +{ + asm volatile("spx %0" : : "m" (address) : "memory"); +} + +static inline uint32_t store_prefix(void) +{ + uint32_t address; + + asm volatile("stpx %0" : "=m" (address)); + return address; +} + +#endif diff --git a/pc-bios/s390-ccw/s390-ccw.h b/pc-bios/s390-ccw/s390-ccw.h index 9828aa233d..11bce7d73c 100644 --- a/pc-bios/s390-ccw/s390-ccw.h +++ b/pc-bios/s390-ccw/s390-ccw.h @@ -49,17 +49,10 @@ typedef unsigned long long __u64; #include "cio.h" #include "iplb.h" -typedef struct irb Irb; -typedef struct ccw1 Ccw1; -typedef struct cmd_orb CmdOrb; -typedef struct schib Schib; -typedef struct chsc_area_sda ChscAreaSda; -typedef struct senseid SenseId; -typedef struct subchannel_id SubChannelId; - /* start.s */ void disabled_wait(void); void consume_sclp_int(void); +void consume_io_int(void); /* main.c */ void panic(const char *string); @@ -80,7 +73,6 @@ unsigned long virtio_load_direct(ulong rec_list1, ulong rec_list2, bool virtio_is_supported(SubChannelId schid); void virtio_blk_setup_device(SubChannelId schid); int virtio_read(ulong sector, void *load_addr); -int enable_mss_facility(void); u64 get_clock(void); ulong get_second(void); diff --git a/pc-bios/s390-ccw/start.S b/pc-bios/s390-ccw/start.S index 5c22cb0849..aa8fceb19d 100644 --- a/pc-bios/s390-ccw/start.S +++ b/pc-bios/s390-ccw/start.S @@ -71,6 +71,26 @@ consume_sclp_int: larl %r1, enabled_wait_psw lpswe 0(%r1) +/* + * void consume_io_int(void) + * + * eats one I/O interrupt + */ + .globl consume_io_int +consume_io_int: + /* enable I/O interrupts in cr6 */ + stctg %c6,%c6,0(%r15) + oi 4(%r15), 0xff + lctlg %c6,%c6,0(%r15) + /* prepare i/o call handler */ + larl %r1, io_new_code + stg %r1, 0x1f8 + larl %r1, io_new_mask + mvc 0x1f0(8),0(%r1) + /* load enabled wait PSW */ + larl %r1, enabled_wait_psw + lpswe 0(%r1) + external_new_code: /* disable service interrupts in cr0 */ stctg %c0,%c0,0(%r15) @@ -78,6 +98,13 @@ external_new_code: lctlg %c0,%c0,0(%r15) br %r14 +io_new_code: + /* disable I/O interrupts in cr6 */ + stctg %c6,%c6,0(%r15) + ni 4(%r15), 0x00 + lctlg %c6,%c6,0(%r15) + br %r14 + .align 8 disabled_wait_psw: .quad 0x0002000180000000,0x0000000000000000 @@ -85,3 +112,5 @@ enabled_wait_psw: .quad 0x0302000180000000,0x0000000000000000 external_new_mask: .quad 0x0000000180000000 +io_new_mask: + .quad 0x0000000180000000 diff --git a/pc-bios/s390-ccw/virtio.c b/pc-bios/s390-ccw/virtio.c index cdb66f459e..fb40ca9828 100644 --- a/pc-bios/s390-ccw/virtio.c +++ b/pc-bios/s390-ccw/virtio.c @@ -10,9 +10,11 @@ #include "libc.h" #include "s390-ccw.h" +#include "cio.h" #include "virtio.h" #include "virtio-scsi.h" #include "bswap.h" +#include "helper.h" #define VRING_WAIT_REPLY_TIMEOUT 30 @@ -20,8 +22,6 @@ static VRing block[VIRTIO_MAX_VQS]; static char ring_area[VIRTIO_RING_SIZE * VIRTIO_MAX_VQS] __attribute__((__aligned__(PAGE_SIZE))); -static char chsc_page[PAGE_SIZE] __attribute__((__aligned__(PAGE_SIZE))); - static VDev vdev = { .nr_vqs = 1, .vrings = block, @@ -90,38 +90,19 @@ int drain_irqs(SubChannelId schid) } } -static int run_ccw(VDev *vdev, int cmd, void *ptr, int len) +static int run_ccw(VDev *vdev, int cmd, void *ptr, int len, bool sli) { Ccw1 ccw = {}; - CmdOrb orb = {}; - Schib schib; - int r; - - /* start command processing */ - stsch_err(vdev->schid, &schib); - /* enable the subchannel for IPL device */ - schib.pmcw.ena = 1; - msch(vdev->schid, &schib); - - /* start subchannel command */ - orb.fmt = 1; - orb.cpa = (u32)(long)&ccw; - orb.lpm = 0x80; ccw.cmd_code = cmd; ccw.cda = (long)ptr; ccw.count = len; - r = ssch(vdev->schid, &orb); - /* - * XXX Wait until device is done processing the CCW. For now we can - * assume that a simple tsch will have finished the CCW processing, - * but the architecture allows for asynchronous operation - */ - if (!r) { - r = drain_irqs(vdev->schid); + if (sli) { + ccw.flags |= CCW_FLAG_SLI; } - return r; + + return do_cio(vdev->schid, vdev->senseid.cu_type, ptr2u32(&ccw), CCW_FMT1); } static void vring_init(VRing *vr, VqInfo *info) @@ -263,7 +244,7 @@ void virtio_setup_ccw(VDev *vdev) vdev->config.blk.blk_size = 0; /* mark "illegal" - setup started... */ vdev->guessed_disk_nature = VIRTIO_GDN_NONE; - run_ccw(vdev, CCW_CMD_VDEV_RESET, NULL, 0); + run_ccw(vdev, CCW_CMD_VDEV_RESET, NULL, 0, false); switch (vdev->senseid.cu_model) { case VIRTIO_ID_NET: @@ -284,18 +265,19 @@ void virtio_setup_ccw(VDev *vdev) default: panic("Unsupported virtio device\n"); } - IPL_assert(run_ccw(vdev, CCW_CMD_READ_CONF, &vdev->config, cfg_size) == 0, - "Could not get block device configuration"); + IPL_assert( + run_ccw(vdev, CCW_CMD_READ_CONF, &vdev->config, cfg_size, false) == 0, + "Could not get block device configuration"); /* Feature negotiation */ for (i = 0; i < ARRAY_SIZE(vdev->guest_features); i++) { feats.features = 0; feats.index = i; - rc = run_ccw(vdev, CCW_CMD_READ_FEAT, &feats, sizeof(feats)); + rc = run_ccw(vdev, CCW_CMD_READ_FEAT, &feats, sizeof(feats), false); IPL_assert(rc == 0, "Could not get features bits"); vdev->guest_features[i] &= bswap32(feats.features); feats.features = bswap32(vdev->guest_features[i]); - rc = run_ccw(vdev, CCW_CMD_WRITE_FEAT, &feats, sizeof(feats)); + rc = run_ccw(vdev, CCW_CMD_WRITE_FEAT, &feats, sizeof(feats), false); IPL_assert(rc == 0, "Could not set features bits"); } @@ -312,16 +294,17 @@ void virtio_setup_ccw(VDev *vdev) }; IPL_assert( - run_ccw(vdev, CCW_CMD_READ_VQ_CONF, &config, sizeof(config)) == 0, + run_ccw(vdev, CCW_CMD_READ_VQ_CONF, &config, sizeof(config), false) == 0, "Could not get block device VQ configuration"); info.num = config.num; vring_init(&vdev->vrings[i], &info); vdev->vrings[i].schid = vdev->schid; - IPL_assert(run_ccw(vdev, CCW_CMD_SET_VQ, &info, sizeof(info)) == 0, - "Cannot set VQ info"); + IPL_assert( + run_ccw(vdev, CCW_CMD_SET_VQ, &info, sizeof(info), false) == 0, + "Cannot set VQ info"); } IPL_assert( - run_ccw(vdev, CCW_CMD_WRITE_STATUS, &status, sizeof(status)) == 0, + run_ccw(vdev, CCW_CMD_WRITE_STATUS, &status, sizeof(status), false) == 0, "Could not write status to host"); } @@ -329,8 +312,15 @@ bool virtio_is_supported(SubChannelId schid) { vdev.schid = schid; memset(&vdev.senseid, 0, sizeof(vdev.senseid)); - /* run sense id command */ - if (run_ccw(&vdev, CCW_CMD_SENSE_ID, &vdev.senseid, sizeof(vdev.senseid))) { + + /* + * Run sense id command. + * The size of the senseid data differs between devices (notably, + * between virtio devices and dasds), so specify the largest possible + * size and suppress the incorrect length indication for smaller sizes. + */ + if (run_ccw(&vdev, CCW_CMD_SENSE_ID, &vdev.senseid, sizeof(vdev.senseid), + true)) { return false; } if (vdev.senseid.cu_type == 0x3832) { @@ -343,20 +333,3 @@ bool virtio_is_supported(SubChannelId schid) } return false; } - -int enable_mss_facility(void) -{ - int ret; - ChscAreaSda *sda_area = (ChscAreaSda *) chsc_page; - - memset(sda_area, 0, PAGE_SIZE); - sda_area->request.length = 0x0400; - sda_area->request.code = 0x0031; - sda_area->operation_code = 0x2; - - ret = chsc(sda_area); - if ((ret == 0) && (sda_area->response.code == 0x0001)) { - return 0; - } - return -EIO; -} diff --git a/pc-bios/s390-netboot.img b/pc-bios/s390-netboot.img index 2c6886efb8..aa90fbccb1 100644 --- a/pc-bios/s390-netboot.img +++ b/pc-bios/s390-netboot.img Binary files differdiff --git a/pc-bios/skiboot.lid b/pc-bios/skiboot.lid index 70612962c6..6d5966c3ae 100644 --- a/pc-bios/skiboot.lid +++ b/pc-bios/skiboot.lid Binary files differdiff --git a/pc-bios/vgabios-bochs-display.bin b/pc-bios/vgabios-bochs-display.bin index 0657f6695d..dd8a1f7e66 100644 --- a/pc-bios/vgabios-bochs-display.bin +++ b/pc-bios/vgabios-bochs-display.bin Binary files differdiff --git a/pc-bios/vgabios-cirrus.bin b/pc-bios/vgabios-cirrus.bin index de36372725..66b2adc5ff 100644 --- a/pc-bios/vgabios-cirrus.bin +++ b/pc-bios/vgabios-cirrus.bin Binary files differdiff --git a/pc-bios/vgabios-qxl.bin b/pc-bios/vgabios-qxl.bin index ce2e2141ce..96aab241be 100644 --- a/pc-bios/vgabios-qxl.bin +++ b/pc-bios/vgabios-qxl.bin Binary files differdiff --git a/pc-bios/vgabios-ramfb.bin b/pc-bios/vgabios-ramfb.bin index 44b91cfd3d..04eb20ed89 100644 --- a/pc-bios/vgabios-ramfb.bin +++ b/pc-bios/vgabios-ramfb.bin Binary files differdiff --git a/pc-bios/vgabios-stdvga.bin b/pc-bios/vgabios-stdvga.bin index cfbcae944d..8559c4c562 100644 --- a/pc-bios/vgabios-stdvga.bin +++ b/pc-bios/vgabios-stdvga.bin Binary files differdiff --git a/pc-bios/vgabios-virtio.bin b/pc-bios/vgabios-virtio.bin index d81fd281a2..4e274c1e83 100644 --- a/pc-bios/vgabios-virtio.bin +++ b/pc-bios/vgabios-virtio.bin Binary files differdiff --git a/pc-bios/vgabios-vmware.bin b/pc-bios/vgabios-vmware.bin index 05db8b1b0d..c6df59fb67 100644 --- a/pc-bios/vgabios-vmware.bin +++ b/pc-bios/vgabios-vmware.bin Binary files differdiff --git a/pc-bios/vgabios.bin b/pc-bios/vgabios.bin index b469f5d0f0..6bf8e76874 100644 --- a/pc-bios/vgabios.bin +++ b/pc-bios/vgabios.bin Binary files differdiff --git a/qapi/Makefile.objs b/qapi/Makefile.objs index 77acca0209..729e5185c5 100644 --- a/qapi/Makefile.objs +++ b/qapi/Makefile.objs @@ -5,9 +5,9 @@ util-obj-y += opts-visitor.o qapi-clone-visitor.o util-obj-y += qmp-event.o util-obj-y += qapi-util.o -QAPI_COMMON_MODULES = authz block-core block char common crypto introspect -QAPI_COMMON_MODULES += job migration misc net rdma rocker run-state -QAPI_COMMON_MODULES += sockets tpm trace transaction ui +QAPI_COMMON_MODULES = audio authz block-core block char common crypto +QAPI_COMMON_MODULES += introspect job migration misc net rdma rocker +QAPI_COMMON_MODULES += run-state sockets tpm trace transaction ui QAPI_TARGET_MODULES = target QAPI_MODULES = $(QAPI_COMMON_MODULES) $(QAPI_TARGET_MODULES) diff --git a/qapi/audio.json b/qapi/audio.json new file mode 100644 index 0000000000..9fefdf5186 --- /dev/null +++ b/qapi/audio.json @@ -0,0 +1,308 @@ +# -*- mode: python -*- +# +# Copyright (C) 2015-2019 Zoltán KÅ‘vágó <DirtY.iCE.hu@gmail.com> +# +# This work is licensed under the terms of the GNU GPL, version 2 or later. +# See the COPYING file in the top-level directory. + +## +# @AudiodevPerDirectionOptions: +# +# General audio backend options that are used for both playback and +# recording. +# +# @fixed-settings: use fixed settings for host input/output. When off, +# frequency, channels and format must not be +# specified (default true) +# +# @frequency: frequency to use when using fixed settings +# (default 44100) +# +# @channels: number of channels when using fixed settings (default 2) +# +# @voices: number of voices to use (default 1) +# +# @format: sample format to use when using fixed settings +# (default s16) +# +# @buffer-length: the buffer length in microseconds +# +# Since: 4.0 +## +{ 'struct': 'AudiodevPerDirectionOptions', + 'data': { + '*fixed-settings': 'bool', + '*frequency': 'uint32', + '*channels': 'uint32', + '*voices': 'uint32', + '*format': 'AudioFormat', + '*buffer-length': 'uint32' } } + +## +# @AudiodevGenericOptions: +# +# Generic driver-specific options. +# +# @in: options of the capture stream +# +# @out: options of the playback stream +# +# Since: 4.0 +## +{ 'struct': 'AudiodevGenericOptions', + 'data': { + '*in': 'AudiodevPerDirectionOptions', + '*out': 'AudiodevPerDirectionOptions' } } + +## +# @AudiodevAlsaPerDirectionOptions: +# +# Options of the ALSA backend that are used for both playback and +# recording. +# +# @dev: the name of the ALSA device to use (default 'default') +# +# @period-length: the period length in microseconds +# +# @try-poll: attempt to use poll mode, falling back to non-polling +# access on failure (default true) +# +# Since: 4.0 +## +{ 'struct': 'AudiodevAlsaPerDirectionOptions', + 'base': 'AudiodevPerDirectionOptions', + 'data': { + '*dev': 'str', + '*period-length': 'uint32', + '*try-poll': 'bool' } } + +## +# @AudiodevAlsaOptions: +# +# Options of the ALSA audio backend. +# +# @in: options of the capture stream +# +# @out: options of the playback stream +# +# @threshold: set the threshold (in microseconds) when playback starts +# +# Since: 4.0 +## +{ 'struct': 'AudiodevAlsaOptions', + 'data': { + '*in': 'AudiodevAlsaPerDirectionOptions', + '*out': 'AudiodevAlsaPerDirectionOptions', + '*threshold': 'uint32' } } + +## +# @AudiodevCoreaudioPerDirectionOptions: +# +# Options of the Core Audio backend that are used for both playback and +# recording. +# +# @buffer-count: number of buffers +# +# Since: 4.0 +## +{ 'struct': 'AudiodevCoreaudioPerDirectionOptions', + 'base': 'AudiodevPerDirectionOptions', + 'data': { + '*buffer-count': 'uint32' } } + +## +# @AudiodevCoreaudioOptions: +# +# Options of the coreaudio audio backend. +# +# @in: options of the capture stream +# +# @out: options of the playback stream +# +# Since: 4.0 +## +{ 'struct': 'AudiodevCoreaudioOptions', + 'data': { + '*in': 'AudiodevCoreaudioPerDirectionOptions', + '*out': 'AudiodevCoreaudioPerDirectionOptions' } } + +## +# @AudiodevDsoundOptions: +# +# Options of the DirectSound audio backend. +# +# @in: options of the capture stream +# +# @out: options of the playback stream +# +# @latency: add extra latency to playback in microseconds +# (default 10000) +# +# Since: 4.0 +## +{ 'struct': 'AudiodevDsoundOptions', + 'data': { + '*in': 'AudiodevPerDirectionOptions', + '*out': 'AudiodevPerDirectionOptions', + '*latency': 'uint32' } } + +## +# @AudiodevOssPerDirectionOptions: +# +# Options of the OSS backend that are used for both playback and +# recording. +# +# @dev: file name of the OSS device (default '/dev/dsp') +# +# @buffer-count: number of buffers +# +# @try-poll: attempt to use poll mode, falling back to non-polling +# access on failure (default true) +# +# Since: 4.0 +## +{ 'struct': 'AudiodevOssPerDirectionOptions', + 'base': 'AudiodevPerDirectionOptions', + 'data': { + '*dev': 'str', + '*buffer-count': 'uint32', + '*try-poll': 'bool' } } + +## +# @AudiodevOssOptions: +# +# Options of the OSS audio backend. +# +# @in: options of the capture stream +# +# @out: options of the playback stream +# +# @try-mmap: try using memory-mapped access, falling back to +# non-memory-mapped access on failure (default true) +# +# @exclusive: open device in exclusive mode (vmix won't work) +# (default false) +# +# @dsp-policy: set the timing policy of the device (between 0 and 10, +# where smaller number means smaller latency but higher +# CPU usage) or -1 to use fragment mode (option ignored +# on some platforms) (default 5) +# +# Since: 4.0 +## +{ 'struct': 'AudiodevOssOptions', + 'data': { + '*in': 'AudiodevOssPerDirectionOptions', + '*out': 'AudiodevOssPerDirectionOptions', + '*try-mmap': 'bool', + '*exclusive': 'bool', + '*dsp-policy': 'uint32' } } + +## +# @AudiodevPaPerDirectionOptions: +# +# Options of the Pulseaudio backend that are used for both playback and +# recording. +# +# @name: name of the sink/source to use +# +# @latency: latency you want PulseAudio to achieve in microseconds +# (default 15000) +# +# Since: 4.0 +## +{ 'struct': 'AudiodevPaPerDirectionOptions', + 'base': 'AudiodevPerDirectionOptions', + 'data': { + '*name': 'str', + '*latency': 'uint32' } } + +## +# @AudiodevPaOptions: +# +# Options of the PulseAudio audio backend. +# +# @in: options of the capture stream +# +# @out: options of the playback stream +# +# @server: PulseAudio server address (default: let PulseAudio choose) +# +# Since: 4.0 +## +{ 'struct': 'AudiodevPaOptions', + 'data': { + '*in': 'AudiodevPaPerDirectionOptions', + '*out': 'AudiodevPaPerDirectionOptions', + '*server': 'str' } } + +## +# @AudiodevWavOptions: +# +# Options of the wav audio backend. +# +# @in: options of the capture stream +# +# @out: options of the playback stream +# +# @path: name of the wav file to record (default 'qemu.wav') +# +# Since: 4.0 +## +{ 'struct': 'AudiodevWavOptions', + 'data': { + '*in': 'AudiodevPerDirectionOptions', + '*out': 'AudiodevPerDirectionOptions', + '*path': 'str' } } + + +## +# @AudioFormat: +# +# An enumeration of possible audio formats. +# +# Since: 4.0 +## +{ 'enum': 'AudioFormat', + 'data': [ 'u8', 's8', 'u16', 's16', 'u32', 's32' ] } + +## +# @AudiodevDriver: +# +# An enumeration of possible audio backend drivers. +# +# Since: 4.0 +## +{ 'enum': 'AudiodevDriver', + 'data': [ 'none', 'alsa', 'coreaudio', 'dsound', 'oss', 'pa', 'sdl', + 'spice', 'wav' ] } + +## +# @Audiodev: +# +# Options of an audio backend. +# +# @id: identifier of the backend +# +# @driver: the backend driver to use +# +# @timer-period: timer period (in microseconds, 0: use lowest possible) +# +# Since: 4.0 +## +{ 'union': 'Audiodev', + 'base': { + 'id': 'str', + 'driver': 'AudiodevDriver', + '*timer-period': 'uint32' }, + 'discriminator': 'driver', + 'data': { + 'none': 'AudiodevGenericOptions', + 'alsa': 'AudiodevAlsaOptions', + 'coreaudio': 'AudiodevCoreaudioOptions', + 'dsound': 'AudiodevDsoundOptions', + 'oss': 'AudiodevOssOptions', + 'pa': 'AudiodevPaOptions', + 'sdl': 'AudiodevGenericOptions', + 'spice': 'AudiodevGenericOptions', + 'wav': 'AudiodevWavOptions' } } diff --git a/qapi/block-core.json b/qapi/block-core.json index 919d0530b2..7ccbfff9d0 100644 --- a/qapi/block-core.json +++ b/qapi/block-core.json @@ -451,10 +451,15 @@ # recording new writes. If the bitmap was @disabled, it is not # recording new writes. (Since 2.12) # +# @inconsistent: This is a persistent dirty bitmap that was marked in-use on +# disk, and is unusable by QEMU. It can only be deleted. +# Please rely on the inconsistent field in @BlockDirtyInfo +# instead, as the status field is deprecated. (Since 4.0) +# # Since: 2.4 ## { 'enum': 'DirtyBitmapStatus', - 'data': ['active', 'disabled', 'frozen', 'locked'] } + 'data': ['active', 'disabled', 'frozen', 'locked', 'inconsistent'] } ## # @BlockDirtyInfo: @@ -467,16 +472,29 @@ # # @granularity: granularity of the dirty bitmap in bytes (since 1.4) # -# @status: current status of the dirty bitmap (since 2.4) +# @status: Deprecated in favor of @recording and @locked. (since 2.4) +# +# @recording: true if the bitmap is recording new writes from the guest. +# Replaces `active` and `disabled` statuses. (since 4.0) +# +# @busy: true if the bitmap is in-use by some operation (NBD or jobs) +# and cannot be modified via QMP or used by another operation. +# Replaces `locked` and `frozen` statuses. (since 4.0) +# +# @persistent: true if the bitmap was stored on disk, is scheduled to be stored +# on disk, or both. (since 4.0) # -# @persistent: true if the bitmap will eventually be flushed to persistent -# storage (since 4.0) +# @inconsistent: true if this is a persistent bitmap that was improperly +# stored. Implies @persistent to be true; @recording and +# @busy to be false. This bitmap cannot be used. To remove +# it, use @block-dirty-bitmap-remove. (Since 4.0) # # Since: 1.3 ## { 'struct': 'BlockDirtyInfo', 'data': {'*name': 'str', 'count': 'int', 'granularity': 'uint32', - 'status': 'DirtyBitmapStatus', 'persistent': 'bool' } } + 'recording': 'bool', 'busy': 'bool', 'status': 'DirtyBitmapStatus', + 'persistent': 'bool', '*inconsistent': 'bool' } } ## # @Qcow2BitmapInfoFlags: @@ -537,20 +555,20 @@ # +------------------ # 10 50 100 # -# Since: 2.12 +# Since: 4.0 ## { 'struct': 'BlockLatencyHistogramInfo', 'data': {'boundaries': ['uint64'], 'bins': ['uint64'] } } ## -# @x-block-latency-histogram-set: +# @block-latency-histogram-set: # # Manage read, write and flush latency histograms for the device. # -# If only @device parameter is specified, remove all present latency histograms +# If only @id parameter is specified, remove all present latency histograms # for the device. Otherwise, add/reset some of (or all) latency histograms. # -# @device: device name to set latency histogram for. +# @id: The name or QOM path of the guest device. # # @boundaries: list of interval boundary values (see description in # BlockLatencyHistogramInfo definition). If specified, all @@ -573,13 +591,13 @@ # # Returns: error if device is not found or any boundary arrays are invalid. # -# Since: 2.12 +# Since: 4.0 # # Example: set new histograms for all io types with intervals # [0, 10), [10, 50), [50, 100), [100, +inf): # # -> { "execute": "block-latency-histogram-set", -# "arguments": { "device": "drive0", +# "arguments": { "id": "drive0", # "boundaries": [10, 50, 100] } } # <- { "return": {} } # @@ -587,7 +605,7 @@ # not changed (or not created): # # -> { "execute": "block-latency-histogram-set", -# "arguments": { "device": "drive0", +# "arguments": { "id": "drive0", # "boundaries-write": [10, 50, 100] } } # <- { "return": {} } # @@ -596,7 +614,7 @@ # write: [0, 1000), [1000, 5000), [5000, +inf) # # -> { "execute": "block-latency-histogram-set", -# "arguments": { "device": "drive0", +# "arguments": { "id": "drive0", # "boundaries": [10, 50, 100], # "boundaries-write": [1000, 5000] } } # <- { "return": {} } @@ -604,11 +622,11 @@ # Example: remove all latency histograms: # # -> { "execute": "block-latency-histogram-set", -# "arguments": { "device": "drive0" } } +# "arguments": { "id": "drive0" } } # <- { "return": {} } ## -{ 'command': 'x-block-latency-histogram-set', - 'data': {'device': 'str', +{ 'command': 'block-latency-histogram-set', + 'data': {'id': 'str', '*boundaries': ['uint64'], '*boundaries-read': ['uint64'], '*boundaries-write': ['uint64'], @@ -894,11 +912,11 @@ # @timed_stats: Statistics specific to the set of previously defined # intervals of time (Since 2.5) # -# @x_rd_latency_histogram: @BlockLatencyHistogramInfo. (Since 2.12) +# @rd_latency_histogram: @BlockLatencyHistogramInfo. (Since 4.0) # -# @x_wr_latency_histogram: @BlockLatencyHistogramInfo. (Since 2.12) +# @wr_latency_histogram: @BlockLatencyHistogramInfo. (Since 4.0) # -# @x_flush_latency_histogram: @BlockLatencyHistogramInfo. (Since 2.12) +# @flush_latency_histogram: @BlockLatencyHistogramInfo. (Since 4.0) # # Since: 0.14.0 ## @@ -913,9 +931,9 @@ 'invalid_wr_operations': 'int', 'invalid_flush_operations': 'int', 'account_invalid': 'bool', 'account_failed': 'bool', 'timed_stats': ['BlockDeviceTimedStats'], - '*x_rd_latency_histogram': 'BlockLatencyHistogramInfo', - '*x_wr_latency_histogram': 'BlockLatencyHistogramInfo', - '*x_flush_latency_histogram': 'BlockLatencyHistogramInfo' } } + '*rd_latency_histogram': 'BlockLatencyHistogramInfo', + '*wr_latency_histogram': 'BlockLatencyHistogramInfo', + '*flush_latency_histogram': 'BlockLatencyHistogramInfo' } } ## # @BlockStats: @@ -2816,6 +2834,10 @@ # @locking: whether to enable file locking. If set to 'auto', only enable # when Open File Descriptor (OFD) locking API is available # (default: auto, since 2.10) +# @drop-cache: invalidate page cache during live migration. This prevents +# stale data on the migration destination with cache.direct=off. +# Currently only supported on Linux hosts. +# (default: on, since: 4.0) # @x-check-cache-dropped: whether to check that page cache was dropped on live # migration. May cause noticeable delays if the image # file is large, do not use in production. @@ -2828,6 +2850,8 @@ '*pr-manager': 'str', '*locking': 'OnOffAuto', '*aio': 'BlockdevAioOptions', + '*drop-cache': {'type': 'bool', + 'if': 'defined(CONFIG_LINUX)'}, '*x-check-cache-dropped': 'bool' } } ## @@ -3998,6 +4022,48 @@ { 'command': 'blockdev-add', 'data': 'BlockdevOptions', 'boxed': true } ## +# @x-blockdev-reopen: +# +# Reopens a block device using the given set of options. Any option +# not specified will be reset to its default value regardless of its +# previous status. If an option cannot be changed or a particular +# driver does not support reopening then the command will return an +# error. +# +# The top-level @node-name option (from BlockdevOptions) must be +# specified and is used to select the block device to be reopened. +# Other @node-name options must be either omitted or set to the +# current name of the appropriate node. This command won't change any +# node name and any attempt to do it will result in an error. +# +# In the case of options that refer to child nodes, the behavior of +# this command depends on the value: +# +# 1) A set of options (BlockdevOptions): the child is reopened with +# the specified set of options. +# +# 2) A reference to the current child: the child is reopened using +# its existing set of options. +# +# 3) A reference to a different node: the current child is replaced +# with the specified one. +# +# 4) NULL: the current child (if any) is detached. +# +# Options (1) and (2) are supported in all cases, but at the moment +# only @backing allows replacing or detaching an existing child. +# +# Unlike with blockdev-add, the @backing option must always be present +# unless the node being reopened does not have a backing file and its +# image does not have a default backing file name as part of its +# metadata. +# +# Since: 4.0 +## +{ 'command': 'x-blockdev-reopen', + 'data': 'BlockdevOptions', 'boxed': true } + +## # @blockdev-del: # # Deletes a block device that has been added using blockdev-add. diff --git a/qapi/migration.json b/qapi/migration.json index 5684733754..9cfbaf8c6c 100644 --- a/qapi/migration.json +++ b/qapi/migration.json @@ -401,7 +401,7 @@ # @pause-before-switchover: Pause outgoing migration before serialising device # state and before disabling block IO (since 2.11) # -# @x-multifd: Use more than one fd for migration (since 2.11) +# @multifd: Use more than one fd for migration (since 4.0) # # @dirty-bitmaps: If enabled, QEMU will migrate named dirty bitmaps. # (since 2.12) @@ -420,7 +420,7 @@ { 'enum': 'MigrationCapability', 'data': ['xbzrle', 'rdma-pin-all', 'auto-converge', 'zero-blocks', 'compress', 'events', 'postcopy-ram', 'x-colo', 'release-ram', - 'block', 'return-path', 'pause-before-switchover', 'x-multifd', + 'block', 'return-path', 'pause-before-switchover', 'multifd', 'dirty-bitmaps', 'postcopy-blocktime', 'late-block-activate', 'x-ignore-shared' ] } @@ -541,6 +541,12 @@ # hostname must be provided so that the server's x509 # certificate identity can be validated. (Since 2.7) # +# @tls-authz: ID of the 'authz' object subclass that provides access control +# checking of the TLS x509 certificate distinguished name. +# This object is only resolved at time of use, so can be deleted +# and recreated on the fly while the migration server is active. +# If missing, it will default to denying access (Since 4.0) +# # @max-bandwidth: to set maximum speed for migration. maximum speed in # bytes per second. (Since 2.8) # @@ -557,13 +563,10 @@ # migrated and the destination must already have access to the # same backing chain as was used on the source. (since 2.10) # -# @x-multifd-channels: Number of channels used to migrate data in -# parallel. This is the same number that the -# number of sockets used for migration. The -# default value is 2 (since 2.11) -# -# @x-multifd-page-count: Number of pages sent together to a thread. -# The default value is 16 (since 2.11) +# @multifd-channels: Number of channels used to migrate data in +# parallel. This is the same number that the +# number of sockets used for migration. The +# default value is 2 (since 4.0) # # @xbzrle-cache-size: cache size to be used by XBZRLE migration. It # needs to be a multiple of the target page size @@ -585,9 +588,9 @@ 'compress-level', 'compress-threads', 'decompress-threads', 'compress-wait-thread', 'cpu-throttle-initial', 'cpu-throttle-increment', - 'tls-creds', 'tls-hostname', 'max-bandwidth', + 'tls-creds', 'tls-hostname', 'tls-authz', 'max-bandwidth', 'downtime-limit', 'x-checkpoint-delay', 'block-incremental', - 'x-multifd-channels', 'x-multifd-page-count', + 'multifd-channels', 'xbzrle-cache-size', 'max-postcopy-bandwidth', 'max-cpu-throttle' ] } @@ -662,13 +665,10 @@ # migrated and the destination must already have access to the # same backing chain as was used on the source. (since 2.10) # -# @x-multifd-channels: Number of channels used to migrate data in -# parallel. This is the same number that the -# number of sockets used for migration. The -# default value is 2 (since 2.11) -# -# @x-multifd-page-count: Number of pages sent together to a thread. -# The default value is 16 (since 2.11) +# @multifd-channels: Number of channels used to migrate data in +# parallel. This is the same number that the +# number of sockets used for migration. The +# default value is 2 (since 4.0) # # @xbzrle-cache-size: cache size to be used by XBZRLE migration. It # needs to be a multiple of the target page size @@ -699,12 +699,12 @@ '*cpu-throttle-increment': 'int', '*tls-creds': 'StrOrNull', '*tls-hostname': 'StrOrNull', + '*tls-authz': 'StrOrNull', '*max-bandwidth': 'int', '*downtime-limit': 'int', '*x-checkpoint-delay': 'int', '*block-incremental': 'bool', - '*x-multifd-channels': 'int', - '*x-multifd-page-count': 'int', + '*multifd-channels': 'int', '*xbzrle-cache-size': 'size', '*max-postcopy-bandwidth': 'size', '*max-cpu-throttle': 'int' } } @@ -780,6 +780,10 @@ # associated with the migration URI, if any. (Since 2.9) # Note: 2.8 reports this by omitting tls-hostname instead. # +# @tls-authz: ID of the 'authz' object subclass that provides access control +# checking of the TLS x509 certificate distinguished name. (Since +# 4.0) +# # @max-bandwidth: to set maximum speed for migration. maximum speed in # bytes per second. (Since 2.8) # @@ -795,13 +799,10 @@ # migrated and the destination must already have access to the # same backing chain as was used on the source. (since 2.10) # -# @x-multifd-channels: Number of channels used to migrate data in -# parallel. This is the same number that the -# number of sockets used for migration. -# The default value is 2 (since 2.11) -# -# @x-multifd-page-count: Number of pages sent together to a thread. -# The default value is 16 (since 2.11) +# @multifd-channels: Number of channels used to migrate data in +# parallel. This is the same number that the +# number of sockets used for migration. +# The default value is 2 (since 4.0) # # @xbzrle-cache-size: cache size to be used by XBZRLE migration. It # needs to be a multiple of the target page size @@ -831,12 +832,12 @@ '*cpu-throttle-increment': 'uint8', '*tls-creds': 'str', '*tls-hostname': 'str', + '*tls-authz': 'str', '*max-bandwidth': 'size', '*downtime-limit': 'uint64', '*x-checkpoint-delay': 'uint32', '*block-incremental': 'bool' , - '*x-multifd-channels': 'uint8', - '*x-multifd-page-count': 'uint32', + '*multifd-channels': 'uint8', '*xbzrle-cache-size': 'size', '*max-postcopy-bandwidth': 'size', '*max-cpu-throttle':'uint8'} } @@ -1037,19 +1038,22 @@ ## # @COLOExitReason: # -# The reason for a COLO exit +# The reason for a COLO exit. +# +# @none: failover has never happened. This state does not occur +# in the COLO_EXIT event, and is only visible in the result of +# query-colo-status. # -# @none: no failover has ever happened. This can't occur in the -# COLO_EXIT event, only in the result of query-colo-status. +# @request: COLO exit is due to an external request. # -# @request: COLO exit is due to an external request +# @error: COLO exit is due to an internal error. # -# @error: COLO exit is due to an internal error +# @processing: COLO is currently handling a failover (since 4.0). # # Since: 3.1 ## { 'enum': 'COLOExitReason', - 'data': [ 'none', 'request', 'error' ] } + 'data': [ 'none', 'request', 'error' , 'processing' ] } ## # @x-colo-lost-heartbeat: @@ -1376,12 +1380,17 @@ # @mode: COLO running mode. If COLO is running, this field will return # 'primary' or 'secondary'. # +# @last-mode: COLO last running mode. If COLO is running, this field +# will return same like mode field, after failover we can +# use this field to get last colo mode. (since 4.0) +# # @reason: describes the reason for the COLO exit. # # Since: 3.1 ## { 'struct': 'COLOStatus', - 'data': { 'mode': 'COLOMode', 'reason': 'COLOExitReason' } } + 'data': { 'mode': 'COLOMode', 'last-mode': 'COLOMode', + 'reason': 'COLOExitReason' } } ## # @query-colo-status: diff --git a/qapi/qapi-schema.json b/qapi/qapi-schema.json index a34899c626..4bd1223637 100644 --- a/qapi/qapi-schema.json +++ b/qapi/qapi-schema.json @@ -99,3 +99,4 @@ { 'include': 'introspect.json' } { 'include': 'misc.json' } { 'include': 'target.json' } +{ 'include': 'audio.json' } diff --git a/qapi/qmp-dispatch.c b/qapi/qmp-dispatch.c index 1d922e04f7..e2c366e09e 100644 --- a/qapi/qmp-dispatch.c +++ b/qapi/qmp-dispatch.c @@ -58,6 +58,8 @@ static QDict *qmp_dispatch_check_obj(const QObject *request, bool allow_oob, "QMP input member 'arguments' must be an object"); return NULL; } + } else if (!strcmp(arg_name, "id")) { + continue; } else { error_setg(errp, "QMP input member '%s' is unexpected", arg_name); @@ -109,7 +111,7 @@ static QObject *do_qmp_dispatch(QmpCommandList *cmds, QObject *request, if (oob && !(cmd->options & QCO_ALLOW_OOB)) { error_setg(errp, "The command %s does not support OOB", command); - return false; + return NULL; } if (runstate_check(RUN_STATE_PRECONFIG) && @@ -165,11 +167,11 @@ QDict *qmp_dispatch(QmpCommandList *cmds, QObject *request, bool allow_oob) { Error *err = NULL; - QObject *ret; + QDict *dict = qobject_to(QDict, request); + QObject *ret, *id = dict ? qdict_get(dict, "id") : NULL; QDict *rsp; ret = do_qmp_dispatch(cmds, request, allow_oob, &err); - if (err) { rsp = qmp_error_response(err); } else if (ret) { @@ -180,5 +182,9 @@ QDict *qmp_dispatch(QmpCommandList *cmds, QObject *request, rsp = NULL; } + if (rsp && id) { + qdict_put_obj(rsp, "id", qobject_ref(id)); + } + return rsp; } diff --git a/qapi/trace-events b/qapi/trace-events index 70e049ea80..5eb4afa110 100644 --- a/qapi/trace-events +++ b/qapi/trace-events @@ -1,4 +1,6 @@ -# qapi/qapi-visit-core.c +# See docs/devel/tracing.txt for syntax documentation. + +# qapi-visit-core.c visit_free(void *v) "v=%p" visit_complete(void *v, void *opaque) "v=%p opaque=%p" diff --git a/qapi/ui.json b/qapi/ui.json index c5d1d7f099..59e412139a 100644 --- a/qapi/ui.json +++ b/qapi/ui.json @@ -1081,6 +1081,19 @@ 'data' : [ 'off', 'on', 'core', 'es' ] } ## +# @DisplayCurses: +# +# Curses display options. +# +# @charset: Font charset used by guest (default: CP437). +# +# Since: 4.0 +# +## +{ 'struct' : 'DisplayCurses', + 'data' : { '*charset' : 'str' } } + +## # @DisplayType: # # Display (user interface) type. @@ -1142,6 +1155,7 @@ '*gl' : 'DisplayGLMode' }, 'discriminator' : 'type', 'data' : { 'gtk' : 'DisplayGTK', + 'curses' : 'DisplayCurses', 'egl-headless' : 'DisplayEGLHeadless'} } ## diff --git a/qdev-monitor.c b/qdev-monitor.c index d4320986a2..373b9ad445 100644 --- a/qdev-monitor.c +++ b/qdev-monitor.c @@ -31,6 +31,7 @@ #include "qemu/error-report.h" #include "qemu/help_option.h" #include "qemu/option.h" +#include "qemu/qemu-print.h" #include "sysemu/block-backend.h" #include "migration/misc.h" @@ -104,31 +105,22 @@ static bool qdev_class_has_alias(DeviceClass *dc) return (qdev_class_get_alias(dc) != NULL); } -static void out_printf(const char *fmt, ...) -{ - va_list ap; - - va_start(ap, fmt); - monitor_vfprintf(stdout, fmt, ap); - va_end(ap); -} - static void qdev_print_devinfo(DeviceClass *dc) { - out_printf("name \"%s\"", object_class_get_name(OBJECT_CLASS(dc))); + qemu_printf("name \"%s\"", object_class_get_name(OBJECT_CLASS(dc))); if (dc->bus_type) { - out_printf(", bus %s", dc->bus_type); + qemu_printf(", bus %s", dc->bus_type); } if (qdev_class_has_alias(dc)) { - out_printf(", alias \"%s\"", qdev_class_get_alias(dc)); + qemu_printf(", alias \"%s\"", qdev_class_get_alias(dc)); } if (dc->desc) { - out_printf(", desc \"%s\"", dc->desc); + qemu_printf(", desc \"%s\"", dc->desc); } if (!dc->user_creatable) { - out_printf(", no-user"); + qemu_printf(", no-user"); } - out_printf("\n"); + qemu_printf("\n"); } static void qdev_print_devinfos(bool show_no_user) @@ -164,7 +156,7 @@ static void qdev_print_devinfos(bool show_no_user) continue; } if (!cat_printed) { - out_printf("%s%s devices:\n", i ? "\n" : "", cat_name[i]); + qemu_printf("%s%s devices:\n", i ? "\n" : "", cat_name[i]); cat_printed = true; } qdev_print_devinfo(dc); @@ -286,20 +278,20 @@ int qdev_device_help(QemuOpts *opts) } if (prop_list) { - out_printf("%s options:\n", driver); + qemu_printf("%s options:\n", driver); } else { - out_printf("There are no options for %s.\n", driver); + qemu_printf("There are no options for %s.\n", driver); } for (prop = prop_list; prop; prop = prop->next) { int len; - out_printf(" %s=<%s>%n", prop->value->name, prop->value->type, &len); + qemu_printf(" %s=<%s>%n", prop->value->name, prop->value->type, &len); if (prop->value->has_description) { if (len < 24) { - out_printf("%*s", 24 - len, ""); + qemu_printf("%*s", 24 - len, ""); } - out_printf(" - %s\n", prop->value->description); + qemu_printf(" - %s\n", prop->value->description); } else { - out_printf("\n"); + qemu_printf("\n"); } } diff --git a/qemu-deprecated.texi b/qemu-deprecated.texi index 1e15f57e9c..842e71b11d 100644 --- a/qemu-deprecated.texi +++ b/qemu-deprecated.texi @@ -65,6 +65,13 @@ topologies described with -smp include all possible cpus, i.e. The @code{acl} option to the @code{-vnc} argument has been replaced by the @code{tls-authz} and @code{sasl-authz} options. +@subsection QEMU_AUDIO_ environment variables and -audio-help (since 4.0) + +The ``-audiodev'' argument is now the preferred way to specify audio +backend settings instead of environment variables. To ease migration to +the new format, the ``-audiodev-help'' option can be used to convert +the current values of the environment variables to ``-audiodev'' options. + @section QEMU Machine Protocol (QMP) commands @subsection block-dirty-bitmap-add "autoload" parameter (since 2.12.0) @@ -72,6 +79,12 @@ by the @code{tls-authz} and @code{sasl-authz} options. "autoload" parameter is now ignored. All bitmaps are automatically loaded from qcow2 images. +@subsection query-block result field dirty-bitmaps[i].status (since 4.0) + +The ``status'' field of the ``BlockDirtyInfo'' structure, returned by +the query-block command is deprecated. Two new boolean fields, +``recording'' and ``busy'' effectively replace it. + @subsection query-cpus (since 2.12.0) The ``query-cpus'' command is replaced by the ``query-cpus-fast'' command. @@ -92,6 +105,11 @@ details. The ``query-events'' command has been superseded by the more powerful and accurate ``query-qmp-schema'' command. +@subsection chardev client socket with 'wait' option (since 4.0) + +Character devices creating sockets in client mode should not specify +the 'wait' field, which is only applicable to sockets in server mode + @section Human Monitor Protocol (HMP) commands @subsection The hub_id parameter of 'hostfwd_add' / 'hostfwd_remove' (since 3.1) diff --git a/qemu-img-cmds.hx b/qemu-img-cmds.hx index 1526f327a5..4b47f7495d 100644 --- a/qemu-img-cmds.hx +++ b/qemu-img-cmds.hx @@ -46,7 +46,7 @@ ETEXI DEF("convert", img_convert, "convert [--object objectdef] [--image-opts] [--target-image-opts] [-U] [-C] [-c] [-p] [-q] [-n] [-f fmt] [-t cache] [-T src_cache] [-O output_fmt] [-B backing_file] [-o options] [-l snapshot_param] [-S sparse_size] [-m num_coroutines] [-W] filename [filename2 [...]] output_filename") STEXI -@item convert [--object @var{objectdef}] [--image-opts] [--target-image-opts] [-U] [-c] [-p] [-q] [-n] [-f @var{fmt}] [-t @var{cache}] [-T @var{src_cache}] [-O @var{output_fmt}] [-B @var{backing_file}] [-o @var{options}] [-l @var{snapshot_param}] [-S @var{sparse_size}] [-m @var{num_coroutines}] [-W] @var{filename} [@var{filename2} [...]] @var{output_filename} +@item convert [--object @var{objectdef}] [--image-opts] [--target-image-opts] [-U] [-C] [-c] [-p] [-q] [-n] [-f @var{fmt}] [-t @var{cache}] [-T @var{src_cache}] [-O @var{output_fmt}] [-B @var{backing_file}] [-o @var{options}] [-l @var{snapshot_param}] [-S @var{sparse_size}] [-m @var{num_coroutines}] [-W] @var{filename} [@var{filename2} [...]] @var{output_filename} ETEXI DEF("create", img_create, diff --git a/qemu-img.c b/qemu-img.c index 5fac840742..e6ad5978e0 100644 --- a/qemu-img.c +++ b/qemu-img.c @@ -85,13 +85,11 @@ static void QEMU_NORETURN GCC_FMT_ATTR(1, 2) error_exit(const char *fmt, ...) { va_list ap; - error_printf("qemu-img: "); - va_start(ap, fmt); - error_vprintf(fmt, ap); + error_vreport(fmt, ap); va_end(ap); - error_printf("\nTry 'qemu-img --help' for more information\n"); + error_printf("Try 'qemu-img --help' for more information\n"); exit(EXIT_FAILURE); } @@ -269,9 +267,20 @@ static int print_block_option_help(const char *filename, const char *fmt) create_opts = qemu_opts_append(create_opts, proto_drv->create_opts); } - printf("Supported options:\n"); + if (filename) { + printf("Supported options:\n"); + } else { + printf("Supported %s options:\n", fmt); + } qemu_opts_print_help(create_opts, false); qemu_opts_free(create_opts); + + if (!filename) { + printf("\n" + "The protocol level may support further options.\n" + "Specify the target filename to include those options.\n"); + } + return 0; } @@ -1630,6 +1639,8 @@ static int convert_iteration_sectors(ImgConvertState *s, int64_t sector_num) count, &count, NULL, NULL); } if (ret < 0) { + error_report("error while reading block status of sector %" PRId64 + ": %s", sector_num, strerror(-ret)); return ret; } n = DIV_ROUND_UP(count, BDRV_SECTOR_SIZE); @@ -1669,7 +1680,6 @@ static int coroutine_fn convert_co_read(ImgConvertState *s, int64_t sector_num, int nb_sectors, uint8_t *buf) { int n, ret; - QEMUIOVector qiov; assert(nb_sectors <= s->buf_sectors); while (nb_sectors > 0) { @@ -1685,11 +1695,10 @@ static int coroutine_fn convert_co_read(ImgConvertState *s, int64_t sector_num, bs_sectors = s->src_sectors[src_cur]; n = MIN(nb_sectors, bs_sectors - (sector_num - src_cur_offset)); - qemu_iovec_init_buf(&qiov, buf, n << BDRV_SECTOR_BITS); - ret = blk_co_preadv( + ret = blk_co_pread( blk, (sector_num - src_cur_offset) << BDRV_SECTOR_BITS, - n << BDRV_SECTOR_BITS, &qiov, 0); + n << BDRV_SECTOR_BITS, buf, 0); if (ret < 0) { return ret; } @@ -1708,7 +1717,6 @@ static int coroutine_fn convert_co_write(ImgConvertState *s, int64_t sector_num, enum ImgConvertBlockStatus status) { int ret; - QEMUIOVector qiov; while (nb_sectors > 0) { int n = nb_sectors; @@ -1736,10 +1744,8 @@ static int coroutine_fn convert_co_write(ImgConvertState *s, int64_t sector_num, (s->compressed && !buffer_is_zero(buf, n * BDRV_SECTOR_SIZE))) { - qemu_iovec_init_buf(&qiov, buf, n << BDRV_SECTOR_BITS); - - ret = blk_co_pwritev(s->target, sector_num << BDRV_SECTOR_BITS, - n << BDRV_SECTOR_BITS, &qiov, flags); + ret = blk_co_pwrite(s->target, sector_num << BDRV_SECTOR_BITS, + n << BDRV_SECTOR_BITS, buf, flags); if (ret < 0) { return ret; } @@ -1754,7 +1760,8 @@ static int coroutine_fn convert_co_write(ImgConvertState *s, int64_t sector_num, } ret = blk_co_pwrite_zeroes(s->target, sector_num << BDRV_SECTOR_BITS, - n << BDRV_SECTOR_BITS, 0); + n << BDRV_SECTOR_BITS, + BDRV_REQ_MAY_UNMAP); if (ret < 0) { return ret; } @@ -1932,7 +1939,7 @@ static int convert_do_copy(ImgConvertState *s) if (!s->has_zero_init && !s->target_has_backing && bdrv_can_write_zeroes_with_unmap(blk_bs(s->target))) { - ret = blk_make_zero(s->target, BDRV_REQ_MAY_UNMAP); + ret = blk_make_zero(s->target, BDRV_REQ_MAY_UNMAP | BDRV_REQ_NO_FALLBACK); if (ret == 0) { s->has_zero_init = true; } @@ -2482,11 +2489,11 @@ static void dump_snapshots(BlockDriverState *bs) if (nb_sns <= 0) return; printf("Snapshot list:\n"); - bdrv_snapshot_dump(fprintf, stdout, NULL); + bdrv_snapshot_dump(NULL); printf("\n"); for(i = 0; i < nb_sns; i++) { sn = &sn_tab[i]; - bdrv_snapshot_dump(fprintf, stdout, sn); + bdrv_snapshot_dump(sn); printf("\n"); } g_free(sn_tab); @@ -2535,7 +2542,7 @@ static void dump_human_image_info_list(ImageInfoList *list) } delim = true; - bdrv_image_info_dump(fprintf, stdout, elem->value); + bdrv_image_info_dump(elem->value); } } @@ -2734,14 +2741,14 @@ static int img_info(int argc, char **argv) return 0; } -static void dump_map_entry(OutputFormat output_format, MapEntry *e, - MapEntry *next) +static int dump_map_entry(OutputFormat output_format, MapEntry *e, + MapEntry *next) { switch (output_format) { case OFORMAT_HUMAN: if (e->data && !e->has_offset) { error_report("File contains external, encrypted or compressed clusters."); - exit(1); + return -1; } if (e->data && !e->zero) { printf("%#-16"PRIx64"%#-16"PRIx64"%#-16"PRIx64"%s\n", @@ -2774,6 +2781,7 @@ static void dump_map_entry(OutputFormat output_format, MapEntry *e, } break; } + return 0; } static int get_block_status(BlockDriverState *bs, int64_t offset, @@ -2966,12 +2974,15 @@ static int img_map(int argc, char **argv) } if (curr.length > 0) { - dump_map_entry(output_format, &curr, &next); + ret = dump_map_entry(output_format, &curr, &next); + if (ret < 0) { + goto out; + } } curr = next; } - dump_map_entry(output_format, &curr, NULL); + ret = dump_map_entry(output_format, &curr, NULL); out: blk_unref(blk); @@ -4916,8 +4927,8 @@ int main(int argc, char **argv) signal(SIGPIPE, SIG_IGN); #endif + error_init(argv[0]); module_call_init(MODULE_INIT_TRACE); - error_set_progname(argv[0]); qemu_init_exec_dir(argv[0]); if (qemu_init_main_loop(&local_error)) { diff --git a/qemu-img.texi b/qemu-img.texi index 3b6710a580..724f244ba1 100644 --- a/qemu-img.texi +++ b/qemu-img.texi @@ -197,7 +197,7 @@ Command description: @table @option -@item amend [--object @var{objectdef}] [--image-opts] [-p] [-p] [-f @var{fmt}] [-t @var{cache}] -o @var{options} @var{filename} +@item amend [--object @var{objectdef}] [--image-opts] [-p] [-q] [-f @var{fmt}] [-t @var{cache}] -o @var{options} @var{filename} Amends the image format specific @var{options} for the image file @var{filename}. Not all file formats support this operation. @@ -424,7 +424,7 @@ To enumerate information about each disk image in the above chain, starting from qemu-img info --backing-chain snap2.qcow2 @end example -@item map [-f @var{fmt}] [--output=@var{ofmt}] @var{filename} +@item map [--object @var{objectdef}] [--image-opts] [-f @var{fmt}] [--output=@var{ofmt}] [-U] @var{filename} Dump the metadata of image @var{filename} and its backing file chain. In particular, this commands dumps the allocation state of every sector diff --git a/qemu-io-cmds.c b/qemu-io-cmds.c index b9f189f09b..8826bebaf6 100644 --- a/qemu-io-cmds.c +++ b/qemu-io-cmds.c @@ -946,6 +946,7 @@ static void write_help(void) " -b, -- write to the VM state rather than the virtual disk\n" " -c, -- write compressed data with blk_write_compressed\n" " -f, -- use Force Unit Access semantics\n" +" -n, -- with -z, don't allow slow fallback\n" " -p, -- ignored for backwards compatibility\n" " -P, -- use different pattern to fill file\n" " -C, -- report statistics in a machine parsable format\n" @@ -964,7 +965,7 @@ static const cmdinfo_t write_cmd = { .perm = BLK_PERM_WRITE, .argmin = 2, .argmax = -1, - .args = "[-bcCfquz] [-P pattern] off len", + .args = "[-bcCfnquz] [-P pattern] off len", .oneline = "writes a number of bytes at a specified offset", .help = write_help, }; @@ -983,7 +984,7 @@ static int write_f(BlockBackend *blk, int argc, char **argv) int64_t total = 0; int pattern = 0xcd; - while ((c = getopt(argc, argv, "bcCfpP:quz")) != -1) { + while ((c = getopt(argc, argv, "bcCfnpP:quz")) != -1) { switch (c) { case 'b': bflag = true; @@ -997,6 +998,9 @@ static int write_f(BlockBackend *blk, int argc, char **argv) case 'f': flags |= BDRV_REQ_FUA; break; + case 'n': + flags |= BDRV_REQ_NO_FALLBACK; + break; case 'p': /* Ignored for backwards compatibility */ break; @@ -1037,6 +1041,11 @@ static int write_f(BlockBackend *blk, int argc, char **argv) return -EINVAL; } + if ((flags & BDRV_REQ_NO_FALLBACK) && !zflag) { + printf("-n requires -z to be specified\n"); + return -EINVAL; + } + if ((flags & BDRV_REQ_MAY_UNMAP) && !zflag) { printf("-u requires -z to be specified\n"); return -EINVAL; @@ -1690,7 +1699,7 @@ static int info_f(BlockBackend *blk, int argc, char **argv) } if (spec_info) { printf("Format specific information:\n"); - bdrv_image_info_specific_dump(fprintf, stdout, spec_info); + bdrv_image_info_specific_dump(spec_info); qapi_free_ImageInfoSpecific(spec_info); } @@ -2080,8 +2089,8 @@ static int reopen_f(BlockBackend *blk, int argc, char **argv) } bdrv_subtree_drained_begin(bs); - brq = bdrv_reopen_queue(NULL, bs, opts); - bdrv_reopen_multiple(bdrv_get_aio_context(bs), brq, &local_err); + brq = bdrv_reopen_queue(NULL, bs, opts, true); + bdrv_reopen_multiple(brq, &local_err); bdrv_subtree_drained_end(bs); if (local_err) { diff --git a/qemu-io.c b/qemu-io.c index 6df7731af4..8d5d5911cb 100644 --- a/qemu-io.c +++ b/qemu-io.c @@ -34,8 +34,6 @@ #define CMD_NOFILE_OK 0x01 -static char *progname; - static BlockBackend *qemuio_blk; static bool quit_qemu_io; @@ -312,7 +310,7 @@ static char *get_prompt(void) static char prompt[FILENAME_MAX + 2 /*"> "*/ + 1 /*"\0"*/ ]; if (!prompt[0]) { - snprintf(prompt, sizeof(prompt), "%s> ", progname); + snprintf(prompt, sizeof(prompt), "%s> ", error_get_progname()); } return prompt; @@ -524,8 +522,8 @@ int main(int argc, char **argv) signal(SIGPIPE, SIG_IGN); #endif + error_init(argv[0]); module_call_init(MODULE_INIT_TRACE); - progname = g_path_get_basename(argv[0]); qemu_init_exec_dir(argv[0]); qcrypto_init(&error_fatal); @@ -580,10 +578,10 @@ int main(int argc, char **argv) break; case 'V': printf("%s version " QEMU_FULL_VERSION "\n" - QEMU_COPYRIGHT "\n", progname); + QEMU_COPYRIGHT "\n", error_get_progname()); exit(0); case 'h': - usage(progname); + usage(error_get_progname()); exit(0); case 'U': force_share = true; @@ -600,13 +598,13 @@ int main(int argc, char **argv) imageOpts = true; break; default: - usage(progname); + usage(error_get_progname()); exit(1); } } if ((argc - optind) > 1) { - usage(progname); + usage(error_get_progname()); exit(1); } diff --git a/qemu-nbd.c b/qemu-nbd.c index 941ba729c2..dca9e72cee 100644 --- a/qemu-nbd.c +++ b/qemu-nbd.c @@ -690,8 +690,8 @@ int main(int argc, char **argv) signal(SIGPIPE, SIG_IGN); #endif + error_init(argv[0]); module_call_init(MODULE_INIT_TRACE); - error_set_progname(argv[0]); qcrypto_init(&error_fatal); module_call_init(MODULE_INIT_QOM); diff --git a/qemu-options.hx b/qemu-options.hx index 7118d90352..51802cbb26 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -416,14 +416,244 @@ The default is @code{en-us}. ETEXI +HXCOMM Deprecated by -audiodev DEF("audio-help", 0, QEMU_OPTION_audio_help, - "-audio-help print list of audio drivers and their options\n", + "-audio-help show -audiodev equivalent of the currently specified audio settings\n", QEMU_ARCH_ALL) STEXI @item -audio-help @findex -audio-help -Will show the audio subsystem help: list of drivers, tunable -parameters. +Will show the -audiodev equivalent of the currently specified +(deprecated) environment variables. +ETEXI + +DEF("audiodev", HAS_ARG, QEMU_OPTION_audiodev, + "-audiodev [driver=]driver,id=id[,prop[=value][,...]]\n" + " specifies the audio backend to use\n" + " id= identifier of the backend\n" + " timer-period= timer period in microseconds\n" + " in|out.fixed-settings= use fixed settings for host audio\n" + " in|out.frequency= frequency to use with fixed settings\n" + " in|out.channels= number of channels to use with fixed settings\n" + " in|out.format= sample format to use with fixed settings\n" + " valid values: s8, s16, s32, u8, u16, u32\n" + " in|out.voices= number of voices to use\n" + " in|out.buffer-len= length of buffer in microseconds\n" + "-audiodev none,id=id,[,prop[=value][,...]]\n" + " dummy driver that discards all output\n" +#ifdef CONFIG_AUDIO_ALSA + "-audiodev alsa,id=id[,prop[=value][,...]]\n" + " in|out.dev= name of the audio device to use\n" + " in|out.period-len= length of period in microseconds\n" + " in|out.try-poll= attempt to use poll mode\n" + " threshold= threshold (in microseconds) when playback starts\n" +#endif +#ifdef CONFIG_AUDIO_COREAUDIO + "-audiodev coreaudio,id=id[,prop[=value][,...]]\n" + " in|out.buffer-count= number of buffers\n" +#endif +#ifdef CONFIG_AUDIO_DSOUND + "-audiodev dsound,id=id[,prop[=value][,...]]\n" + " latency= add extra latency to playback in microseconds\n" +#endif +#ifdef CONFIG_AUDIO_OSS + "-audiodev oss,id=id[,prop[=value][,...]]\n" + " in|out.dev= path of the audio device to use\n" + " in|out.buffer-count= number of buffers\n" + " in|out.try-poll= attempt to use poll mode\n" + " try-mmap= try using memory mapped access\n" + " exclusive= open device in exclusive mode\n" + " dsp-policy= set timing policy (0..10), -1 to use fragment mode\n" +#endif +#ifdef CONFIG_AUDIO_PA + "-audiodev pa,id=id[,prop[=value][,...]]\n" + " server= PulseAudio server address\n" + " in|out.name= source/sink device name\n" +#endif +#ifdef CONFIG_AUDIO_SDL + "-audiodev sdl,id=id[,prop[=value][,...]]\n" +#endif +#ifdef CONFIG_SPICE + "-audiodev spice,id=id[,prop[=value][,...]]\n" +#endif + "-audiodev wav,id=id[,prop[=value][,...]]\n" + " path= path of wav file to record\n", + QEMU_ARCH_ALL) +STEXI +@item -audiodev [driver=]@var{driver},id=@var{id}[,@var{prop}[=@var{value}][,...]] +@findex -audiodev +Adds a new audio backend @var{driver} identified by @var{id}. There are +global and driver specific properties. Some values can be set +differently for input and output, they're marked with @code{in|out.}. +You can set the input's property with @code{in.@var{prop}} and the +output's property with @code{out.@var{prop}}. For example: +@example +-audiodev alsa,id=example,in.frequency=44110,out.frequency=8000 +-audiodev alsa,id=example,out.channels=1 # leaves in.channels unspecified +@end example + +Valid global options are: + +@table @option +@item id=@var{identifier} +Identifies the audio backend. + +@item timer-period=@var{period} +Sets the timer @var{period} used by the audio subsystem in microseconds. +Default is 10000 (10 ms). + +@item in|out.fixed-settings=on|off +Use fixed settings for host audio. When off, it will change based on +how the guest opens the sound card. In this case you must not specify +@var{frequency}, @var{channels} or @var{format}. Default is on. + +@item in|out.frequency=@var{frequency} +Specify the @var{frequency} to use when using @var{fixed-settings}. +Default is 44100Hz. + +@item in|out.channels=@var{channels} +Specify the number of @var{channels} to use when using +@var{fixed-settings}. Default is 2 (stereo). + +@item in|out.format=@var{format} +Specify the sample @var{format} to use when using @var{fixed-settings}. +Valid values are: @code{s8}, @code{s16}, @code{s32}, @code{u8}, +@code{u16}, @code{u32}. Default is @code{s16}. + +@item in|out.voices=@var{voices} +Specify the number of @var{voices} to use. Default is 1. + +@item in|out.buffer=@var{usecs} +Sets the size of the buffer in microseconds. + +@end table + +@item -audiodev none,id=@var{id}[,@var{prop}[=@var{value}][,...]] +Creates a dummy backend that discards all outputs. This backend has no +backend specific properties. + +@item -audiodev alsa,id=@var{id}[,@var{prop}[=@var{value}][,...]] +Creates backend using the ALSA. This backend is only available on +Linux. + +ALSA specific options are: + +@table @option + +@item in|out.dev=@var{device} +Specify the ALSA @var{device} to use for input and/or output. Default +is @code{default}. + +@item in|out.period-len=@var{usecs} +Sets the period length in microseconds. + +@item in|out.try-poll=on|off +Attempt to use poll mode with the device. Default is on. + +@item threshold=@var{threshold} +Threshold (in microseconds) when playback starts. Default is 0. + +@end table + +@item -audiodev coreaudio,id=@var{id}[,@var{prop}[=@var{value}][,...]] +Creates a backend using Apple's Core Audio. This backend is only +available on Mac OS and only supports playback. + +Core Audio specific options are: + +@table @option + +@item in|out.buffer-count=@var{count} +Sets the @var{count} of the buffers. + +@end table + +@item -audiodev dsound,id=@var{id}[,@var{prop}[=@var{value}][,...]] +Creates a backend using Microsoft's DirectSound. This backend is only +available on Windows and only supports playback. + +DirectSound specific options are: + +@table @option + +@item latency=@var{usecs} +Add extra @var{usecs} microseconds latency to playback. Default is +10000 (10 ms). + +@end table + +@item -audiodev oss,id=@var{id}[,@var{prop}[=@var{value}][,...]] +Creates a backend using OSS. This backend is available on most +Unix-like systems. + +OSS specific options are: + +@table @option + +@item in|out.dev=@var{device} +Specify the file name of the OSS @var{device} to use. Default is +@code{/dev/dsp}. + +@item in|out.buffer-count=@var{count} +Sets the @var{count} of the buffers. + +@item in|out.try-poll=on|of +Attempt to use poll mode with the device. Default is on. + +@item try-mmap=on|off +Try using memory mapped device access. Default is off. + +@item exclusive=on|off +Open the device in exclusive mode (vmix won't work in this case). +Default is off. + +@item dsp-policy=@var{policy} +Sets the timing policy (between 0 and 10, where smaller number means +smaller latency but higher CPU usage). Use -1 to use buffer sizes +specified by @code{buffer} and @code{buffer-count}. This option is +ignored if you do not have OSS 4. Default is 5. + +@end table + +@item -audiodev pa,id=@var{id}[,@var{prop}[=@var{value}][,...]] +Creates a backend using PulseAudio. This backend is available on most +systems. + +PulseAudio specific options are: + +@table @option + +@item server=@var{server} +Sets the PulseAudio @var{server} to connect to. + +@item in|out.name=@var{sink} +Use the specified source/sink for recording/playback. + +@end table + +@item -audiodev sdl,id=@var{id}[,@var{prop}[=@var{value}][,...]] +Creates a backend using SDL. This backend is available on most systems, +but you should use your platform's native backend if possible. This +backend has no backend specific properties. + +@item -audiodev spice,id=@var{id}[,@var{prop}[=@var{value}][,...]] +Creates a backend that sends audio through SPICE. This backend requires +@code{-spice} and automatically selected in that case, so usually you +can ignore this option. This backend has no backend specific +properties. + +@item -audiodev wav,id=@var{id}[,@var{prop}[=@var{value}][,...]] +Creates a backend that writes audio to a WAV file. + +Backend specific options are: + +@table @option + +@item path=@var{path} +Write recorded audio into the specified file. Default is +@code{qemu.wav}. + +@end table ETEXI DEF("soundhw", HAS_ARG, QEMU_OPTION_soundhw, @@ -1216,7 +1446,7 @@ DEF("display", HAS_ARG, QEMU_OPTION_display, " [,window_close=on|off][,gl=on|core|es|off]\n" "-display gtk[,grab_on_hover=on|off][,gl=on|off]|\n" "-display vnc=<display>[,<optargs>]\n" - "-display curses\n" + "-display curses[,charset=<encoding>]\n" "-display none\n" "-display egl-headless[,rendernode=<file>]" " select display type\n" @@ -1248,6 +1478,9 @@ support a text mode, QEMU can display this output using a curses/ncurses interface. Nothing is displayed when the graphics device is in graphical mode or if the graphics device does not support a text mode. Generally only the VGA device models support text mode. +The font charset used by the guest can be specified with the +@code{charset} option, for example @code{charset=CP850} for IBM CP850 +encoding. The default is @code{CP437}. @item none Do not display video output. The guest will still see an emulated graphics card, but its output will not be displayed to the QEMU @@ -3735,21 +3968,21 @@ ETEXI DEF("semihosting", 0, QEMU_OPTION_semihosting, "-semihosting semihosting mode\n", QEMU_ARCH_ARM | QEMU_ARCH_M68K | QEMU_ARCH_XTENSA | QEMU_ARCH_LM32 | - QEMU_ARCH_MIPS) + QEMU_ARCH_MIPS | QEMU_ARCH_NIOS2) STEXI @item -semihosting @findex -semihosting -Enable semihosting mode (ARM, M68K, Xtensa, MIPS only). +Enable semihosting mode (ARM, M68K, Xtensa, MIPS, Nios II only). ETEXI DEF("semihosting-config", HAS_ARG, QEMU_OPTION_semihosting_config, "-semihosting-config [enable=on|off][,target=native|gdb|auto][,arg=str[,...]]\n" \ " semihosting configuration\n", QEMU_ARCH_ARM | QEMU_ARCH_M68K | QEMU_ARCH_XTENSA | QEMU_ARCH_LM32 | -QEMU_ARCH_MIPS) +QEMU_ARCH_MIPS | QEMU_ARCH_NIOS2) STEXI @item -semihosting-config [enable=on|off][,target=native|gdb|auto][,arg=str[,...]] @findex -semihosting-config -Enable and configure semihosting (ARM, M68K, Xtensa, MIPS only). +Enable and configure semihosting (ARM, M68K, Xtensa, MIPS, Nios II only). @table @option @item target=@code{native|gdb|auto} Defines where the semihosting calls will be addressed, to QEMU (@code{native}) @@ -4000,6 +4233,11 @@ using the SNIA NVM programming model (e.g. Intel NVDIMM). If @option{pmem} is set to 'on', QEMU will take necessary operations to guarantee the persistence of its own writes to @option{mem-path} (e.g. in vNVDIMM label emulation and live migration). +Also, we will map the backend-file with MAP_SYNC flag, which ensures the +file metadata is in sync for @option{mem-path} in case of host crash +or a power failure. MAP_SYNC requires support from both the host kernel +(since Linux kernel 4.15) and the filesystem of @option{mem-path} mounted +with DAX option. @item -object memory-backend-ram,id=@var{id},merge=@var{on|off},dump=@var{on|off},share=@var{on|off},prealloc=@var{on|off},size=@var{size},host-nodes=@var{host-nodes},policy=@var{default|preferred|bind|interleave} diff --git a/qemu-seccomp.c b/qemu-seccomp.c index 36d5829831..e0a1829b3d 100644 --- a/qemu-seccomp.c +++ b/qemu-seccomp.c @@ -121,58 +121,84 @@ qemu_seccomp(unsigned int operation, unsigned int flags, void *args) #endif } -static uint32_t qemu_seccomp_get_kill_action(void) +static uint32_t qemu_seccomp_get_action(int set) { + switch (set) { + case QEMU_SECCOMP_SET_DEFAULT: + case QEMU_SECCOMP_SET_OBSOLETE: + case QEMU_SECCOMP_SET_PRIVILEGED: + case QEMU_SECCOMP_SET_SPAWN: { #if defined(SECCOMP_GET_ACTION_AVAIL) && defined(SCMP_ACT_KILL_PROCESS) && \ defined(SECCOMP_RET_KILL_PROCESS) - { - uint32_t action = SECCOMP_RET_KILL_PROCESS; + static int kill_process = -1; + if (kill_process == -1) { + uint32_t action = SECCOMP_RET_KILL_PROCESS; - if (qemu_seccomp(SECCOMP_GET_ACTION_AVAIL, 0, &action) == 0) { + if (qemu_seccomp(SECCOMP_GET_ACTION_AVAIL, 0, &action) == 0) { + kill_process = 1; + } + kill_process = 0; + } + if (kill_process == 1) { return SCMP_ACT_KILL_PROCESS; } - } #endif + return SCMP_ACT_TRAP; + } - return SCMP_ACT_TRAP; + case QEMU_SECCOMP_SET_RESOURCECTL: + return SCMP_ACT_ERRNO(EPERM); + + default: + g_assert_not_reached(); + } } -static int seccomp_start(uint32_t seccomp_opts) +static int seccomp_start(uint32_t seccomp_opts, Error **errp) { - int rc = 0; + int rc = -1; unsigned int i = 0; scmp_filter_ctx ctx; - uint32_t action = qemu_seccomp_get_kill_action(); ctx = seccomp_init(SCMP_ACT_ALLOW); if (ctx == NULL) { - rc = -1; + error_setg(errp, "failed to initialize seccomp context"); goto seccomp_return; } rc = seccomp_attr_set(ctx, SCMP_FLTATR_CTL_TSYNC, 1); if (rc != 0) { + error_setg_errno(errp, -rc, + "failed to set seccomp thread synchronization"); goto seccomp_return; } for (i = 0; i < ARRAY_SIZE(blacklist); i++) { + uint32_t action; if (!(seccomp_opts & blacklist[i].set)) { continue; } + action = qemu_seccomp_get_action(blacklist[i].set); rc = seccomp_rule_add_array(ctx, action, blacklist[i].num, blacklist[i].narg, blacklist[i].arg_cmp); if (rc < 0) { + error_setg_errno(errp, -rc, + "failed to add seccomp blacklist rules"); goto seccomp_return; } } rc = seccomp_load(ctx); + if (rc < 0) { + error_setg_errno(errp, -rc, + "failed to load seccomp syscall filter in kernel"); + } seccomp_return: seccomp_release(ctx); - return rc; + return rc < 0 ? -1 : 0; } #ifdef CONFIG_SECCOMP @@ -242,9 +268,7 @@ int parse_sandbox(void *opaque, QemuOpts *opts, Error **errp) } } - if (seccomp_start(seccomp_opts) < 0) { - error_setg(errp, "failed to install seccomp syscall filter " - "in the kernel"); + if (seccomp_start(seccomp_opts, errp) < 0) { return -1; } } diff --git a/qga/commands-win32.c b/qga/commands-win32.c index 989b93e702..d40d61f605 100644 --- a/qga/commands-win32.c +++ b/qga/commands-win32.c @@ -22,6 +22,7 @@ #include <winioctl.h> #include <ntddscsi.h> #include <setupapi.h> +#include <cfgmgr32.h> #include <initguid.h> #endif #include <lm.h> @@ -485,56 +486,29 @@ static GuestDiskBusType find_bus_type(STORAGE_BUS_TYPE bus) return win2qemu[(int)bus]; } -/* XXX: The following function is BROKEN! - * - * It does not work and probably has never worked. When we query for list of - * disks we get cryptic names like "\Device\0000001d" instead of - * "\PhysicalDriveX" or "\HarddiskX". Whether the names can be translated one - * way or the other for comparison is an open question. - * - * When we query volume names (the original version) we are able to match those - * but then the property queries report error "Invalid function". (duh!) - */ - -/* -DEFINE_GUID(GUID_DEVINTERFACE_VOLUME, - 0x53f5630dL, 0xb6bf, 0x11d0, 0x94, 0xf2, - 0x00, 0xa0, 0xc9, 0x1e, 0xfb, 0x8b); -*/ DEFINE_GUID(GUID_DEVINTERFACE_DISK, 0x53f56307L, 0xb6bf, 0x11d0, 0x94, 0xf2, 0x00, 0xa0, 0xc9, 0x1e, 0xfb, 0x8b); +DEFINE_GUID(GUID_DEVINTERFACE_STORAGEPORT, + 0x2accfe60L, 0xc130, 0x11d2, 0xb0, 0x82, + 0x00, 0xa0, 0xc9, 0x1e, 0xfb, 0x8b); - -static GuestPCIAddress *get_pci_info(char *guid, Error **errp) +static GuestPCIAddress *get_pci_info(int number, Error **errp) { HDEVINFO dev_info; SP_DEVINFO_DATA dev_info_data; - DWORD size = 0; + SP_DEVICE_INTERFACE_DATA dev_iface_data; + HANDLE dev_file; int i; - char dev_name[MAX_PATH]; - char *buffer = NULL; GuestPCIAddress *pci = NULL; - char *name = NULL; bool partial_pci = false; + pci = g_malloc0(sizeof(*pci)); pci->domain = -1; pci->slot = -1; pci->function = -1; pci->bus = -1; - if (g_str_has_prefix(guid, "\\\\.\\") || - g_str_has_prefix(guid, "\\\\?\\")) { - name = g_strdup(guid + 4); - } else { - name = g_strdup(guid); - } - - if (!QueryDosDevice(name, dev_name, ARRAY_SIZE(dev_name))) { - error_setg_win32(errp, GetLastError(), "failed to get dos device name"); - goto out; - } - dev_info = SetupDiGetClassDevs(&GUID_DEVINTERFACE_DISK, 0, 0, DIGCF_PRESENT | DIGCF_DEVICEINTERFACE); if (dev_info == INVALID_HANDLE_VALUE) { @@ -544,90 +518,220 @@ static GuestPCIAddress *get_pci_info(char *guid, Error **errp) g_debug("enumerating devices"); dev_info_data.cbSize = sizeof(SP_DEVINFO_DATA); + dev_iface_data.cbSize = sizeof(SP_DEVICE_INTERFACE_DATA); for (i = 0; SetupDiEnumDeviceInfo(dev_info, i, &dev_info_data); i++) { - DWORD addr, bus, slot, data, size2; - int func, dev; - while (!SetupDiGetDeviceRegistryProperty(dev_info, &dev_info_data, - SPDRP_PHYSICAL_DEVICE_OBJECT_NAME, - &data, (PBYTE)buffer, size, - &size2)) { - size = MAX(size, size2); - if (GetLastError() == ERROR_INSUFFICIENT_BUFFER) { - g_free(buffer); - /* Double the size to avoid problems on - * W2k MBCS systems per KB 888609. - * https://support.microsoft.com/en-us/kb/259695 */ - buffer = g_malloc(size * 2); - } else { + PSP_DEVICE_INTERFACE_DETAIL_DATA pdev_iface_detail_data = NULL; + STORAGE_DEVICE_NUMBER sdn; + char *parent_dev_id = NULL; + HDEVINFO parent_dev_info; + SP_DEVINFO_DATA parent_dev_info_data; + DWORD j; + DWORD size = 0; + + g_debug("getting device path"); + if (SetupDiEnumDeviceInterfaces(dev_info, &dev_info_data, + &GUID_DEVINTERFACE_DISK, 0, + &dev_iface_data)) { + while (!SetupDiGetDeviceInterfaceDetail(dev_info, &dev_iface_data, + pdev_iface_detail_data, + size, &size, + &dev_info_data)) { + if (GetLastError() == ERROR_INSUFFICIENT_BUFFER) { + pdev_iface_detail_data = g_malloc(size); + pdev_iface_detail_data->cbSize = + sizeof(*pdev_iface_detail_data); + } else { + error_setg_win32(errp, GetLastError(), + "failed to get device interfaces"); + goto free_dev_info; + } + } + + dev_file = CreateFile(pdev_iface_detail_data->DevicePath, 0, + FILE_SHARE_READ, NULL, OPEN_EXISTING, 0, + NULL); + g_free(pdev_iface_detail_data); + + if (!DeviceIoControl(dev_file, IOCTL_STORAGE_GET_DEVICE_NUMBER, + NULL, 0, &sdn, sizeof(sdn), &size, NULL)) { + CloseHandle(dev_file); error_setg_win32(errp, GetLastError(), - "failed to get device name"); + "failed to get device slot number"); goto free_dev_info; } - } - if (g_strcmp0(buffer, dev_name)) { - continue; + CloseHandle(dev_file); + if (sdn.DeviceNumber != number) { + continue; + } + } else { + error_setg_win32(errp, GetLastError(), + "failed to get device interfaces"); + goto free_dev_info; } - g_debug("found device %s", dev_name); - /* There is no need to allocate buffer in the next functions. The size - * is known and ULONG according to - * https://support.microsoft.com/en-us/kb/253232 - * https://msdn.microsoft.com/en-us/library/windows/hardware/ff543095(v=vs.85).aspx - */ - if (!SetupDiGetDeviceRegistryProperty(dev_info, &dev_info_data, - SPDRP_BUSNUMBER, &data, (PBYTE)&bus, size, NULL)) { - debug_error("failed to get bus"); - bus = -1; - partial_pci = true; + g_debug("found device slot %d. Getting storage controller", number); + { + CONFIGRET cr; + DEVINST dev_inst, parent_dev_inst; + ULONG dev_id_size = 0; + + size = 0; + while (!SetupDiGetDeviceInstanceId(dev_info, &dev_info_data, + parent_dev_id, size, &size)) { + if (GetLastError() == ERROR_INSUFFICIENT_BUFFER) { + parent_dev_id = g_malloc(size); + } else { + error_setg_win32(errp, GetLastError(), + "failed to get device instance ID"); + goto out; + } + } + + /* + * CM API used here as opposed to + * SetupDiGetDeviceProperty(..., DEVPKEY_Device_Parent, ...) + * which exports are only available in mingw-w64 6+ + */ + cr = CM_Locate_DevInst(&dev_inst, parent_dev_id, 0); + if (cr != CR_SUCCESS) { + g_error("CM_Locate_DevInst failed with code %lx", cr); + error_setg_win32(errp, GetLastError(), + "failed to get device instance"); + goto out; + } + cr = CM_Get_Parent(&parent_dev_inst, dev_inst, 0); + if (cr != CR_SUCCESS) { + g_error("CM_Get_Parent failed with code %lx", cr); + error_setg_win32(errp, GetLastError(), + "failed to get parent device instance"); + goto out; + } + + cr = CM_Get_Device_ID_Size(&dev_id_size, parent_dev_inst, 0); + if (cr != CR_SUCCESS) { + g_error("CM_Get_Device_ID_Size failed with code %lx", cr); + error_setg_win32(errp, GetLastError(), + "failed to get parent device ID length"); + goto out; + } + + ++dev_id_size; + if (dev_id_size > size) { + g_free(parent_dev_id); + parent_dev_id = g_malloc(dev_id_size); + } + + cr = CM_Get_Device_ID(parent_dev_inst, parent_dev_id, dev_id_size, + 0); + if (cr != CR_SUCCESS) { + g_error("CM_Get_Device_ID failed with code %lx", cr); + error_setg_win32(errp, GetLastError(), + "failed to get parent device ID"); + goto out; + } } - /* The function retrieves the device's address. This value will be - * transformed into device function and number */ - if (!SetupDiGetDeviceRegistryProperty(dev_info, &dev_info_data, - SPDRP_ADDRESS, &data, (PBYTE)&addr, size, NULL)) { - debug_error("failed to get address"); - addr = -1; - partial_pci = true; + g_debug("querying storage controller %s for PCI information", + parent_dev_id); + parent_dev_info = + SetupDiGetClassDevs(&GUID_DEVINTERFACE_STORAGEPORT, parent_dev_id, + NULL, DIGCF_PRESENT | DIGCF_DEVICEINTERFACE); + g_free(parent_dev_id); + + if (parent_dev_info == INVALID_HANDLE_VALUE) { + error_setg_win32(errp, GetLastError(), + "failed to get parent device"); + goto out; } - /* This call returns UINumber of DEVICE_CAPABILITIES structure. - * This number is typically a user-perceived slot number. */ - if (!SetupDiGetDeviceRegistryProperty(dev_info, &dev_info_data, - SPDRP_UI_NUMBER, &data, (PBYTE)&slot, size, NULL)) { - debug_error("failed to get slot"); - slot = -1; - partial_pci = true; + parent_dev_info_data.cbSize = sizeof(SP_DEVINFO_DATA); + if (!SetupDiEnumDeviceInfo(parent_dev_info, 0, &parent_dev_info_data)) { + error_setg_win32(errp, GetLastError(), + "failed to get parent device data"); + goto out; } - /* SetupApi gives us the same information as driver with - * IoGetDeviceProperty. According to Microsoft - * https://support.microsoft.com/en-us/kb/253232 - * FunctionNumber = (USHORT)((propertyAddress) & 0x0000FFFF); - * DeviceNumber = (USHORT)(((propertyAddress) >> 16) & 0x0000FFFF); - * SPDRP_ADDRESS is propertyAddress, so we do the same.*/ - - if (partial_pci) { - pci->domain = -1; - pci->slot = -1; - pci->function = -1; - pci->bus = -1; - } else { - func = ((int) addr == -1) ? -1 : addr & 0x0000FFFF; - dev = ((int) addr == -1) ? -1 : (addr >> 16) & 0x0000FFFF; - pci->domain = dev; - pci->slot = (int) slot; - pci->function = func; - pci->bus = (int) bus; + for (j = 0; + SetupDiEnumDeviceInfo(parent_dev_info, j, &parent_dev_info_data); + j++) { + DWORD addr, bus, ui_slot, type; + int func, slot; + + /* + * There is no need to allocate buffer in the next functions. The + * size is known and ULONG according to + * https://msdn.microsoft.com/en-us/library/windows/hardware/ff543095(v=vs.85).aspx + */ + if (!SetupDiGetDeviceRegistryProperty( + parent_dev_info, &parent_dev_info_data, SPDRP_BUSNUMBER, + &type, (PBYTE)&bus, size, NULL)) { + debug_error("failed to get PCI bus"); + bus = -1; + partial_pci = true; + } + + /* + * The function retrieves the device's address. This value will be + * transformed into device function and number + */ + if (!SetupDiGetDeviceRegistryProperty( + parent_dev_info, &parent_dev_info_data, SPDRP_ADDRESS, + &type, (PBYTE)&addr, size, NULL)) { + debug_error("failed to get PCI address"); + addr = -1; + partial_pci = true; + } + + /* + * This call returns UINumber of DEVICE_CAPABILITIES structure. + * This number is typically a user-perceived slot number. + */ + if (!SetupDiGetDeviceRegistryProperty( + parent_dev_info, &parent_dev_info_data, SPDRP_UI_NUMBER, + &type, (PBYTE)&ui_slot, size, NULL)) { + debug_error("failed to get PCI slot"); + ui_slot = -1; + partial_pci = true; + } + + /* + * SetupApi gives us the same information as driver with + * IoGetDeviceProperty. According to Microsoft: + * + * FunctionNumber = (USHORT)((propertyAddress) & 0x0000FFFF) + * DeviceNumber = (USHORT)(((propertyAddress) >> 16) & 0x0000FFFF) + * SPDRP_ADDRESS is propertyAddress, so we do the same. + * + * https://docs.microsoft.com/en-us/windows/desktop/api/setupapi/nf-setupapi-setupdigetdeviceregistrypropertya + */ + if (partial_pci) { + pci->domain = -1; + pci->slot = -1; + pci->function = -1; + pci->bus = -1; + continue; + } else { + func = ((int)addr == -1) ? -1 : addr & 0x0000FFFF; + slot = ((int)addr == -1) ? -1 : (addr >> 16) & 0x0000FFFF; + if ((int)ui_slot != slot) { + g_debug("mismatch with reported slot values: %d vs %d", + (int)ui_slot, slot); + } + pci->domain = 0; + pci->slot = (int)ui_slot; + pci->function = func; + pci->bus = (int)bus; + break; + } } + SetupDiDestroyDeviceInfoList(parent_dev_info); break; } free_dev_info: SetupDiDestroyDeviceInfoList(dev_info); out: - g_free(buffer); - g_free(name); return pci; } @@ -685,7 +789,8 @@ out_free: return; } -static void get_single_disk_info(GuestDiskAddress *disk, Error **errp) +static void get_single_disk_info(int disk_number, + GuestDiskAddress *disk, Error **errp) { SCSI_ADDRESS addr, *scsi_ad; DWORD len; @@ -714,7 +819,7 @@ static void get_single_disk_info(GuestDiskAddress *disk, Error **errp) * if that doesn't hold since that suggests some other unexpected * breakage */ - disk->pci_controller = get_pci_info(disk->dev, &local_err); + disk->pci_controller = get_pci_info(disk_number, &local_err); if (local_err) { error_propagate(errp, local_err); goto err_close; @@ -728,7 +833,7 @@ static void get_single_disk_info(GuestDiskAddress *disk, Error **errp) /* We are able to use the same ioctls for different bus types * according to Microsoft docs * https://technet.microsoft.com/en-us/library/ee851589(v=ws.10).aspx */ - g_debug("getting pci-controller info"); + g_debug("getting SCSI info"); if (DeviceIoControl(disk_h, IOCTL_SCSI_GET_ADDRESS, NULL, 0, scsi_ad, sizeof(SCSI_ADDRESS), &len, NULL)) { disk->unit = addr.Lun; @@ -776,12 +881,10 @@ static GuestDiskAddressList *build_guest_disk_info(char *guid, Error **errp) size = sizeof(VOLUME_DISK_EXTENTS); extents = g_malloc0(size); if (!DeviceIoControl(vol_h, IOCTL_VOLUME_GET_VOLUME_DISK_EXTENTS, NULL, - 0, extents, size, NULL, NULL)) { + 0, extents, size, &size, NULL)) { DWORD last_err = GetLastError(); if (last_err == ERROR_MORE_DATA) { /* Try once more with big enough buffer */ - size = sizeof(VOLUME_DISK_EXTENTS) - + extents->NumberOfDiskExtents*sizeof(DISK_EXTENT); g_free(extents); extents = g_malloc0(size); if (!DeviceIoControl( @@ -797,7 +900,7 @@ static GuestDiskAddressList *build_guest_disk_info(char *guid, Error **errp) disk = g_malloc0(sizeof(GuestDiskAddress)); disk->has_dev = true; disk->dev = g_strdup(name); - get_single_disk_info(disk, &local_err); + get_single_disk_info(0xffffffff, disk, &local_err); if (local_err) { g_debug("failed to get disk info, ignoring error: %s", error_get_pretty(local_err)); @@ -831,9 +934,9 @@ static GuestDiskAddressList *build_guest_disk_info(char *guid, Error **errp) */ disk->has_dev = true; disk->dev = g_strdup_printf("\\\\.\\PhysicalDrive%lu", - extents->Extents[i].DiskNumber); + extents->Extents[i].DiskNumber); - get_single_disk_info(disk, &local_err); + get_single_disk_info(extents->Extents[i].DiskNumber, disk, &local_err); if (local_err) { error_propagate(errp, local_err); goto out; @@ -1941,12 +2044,24 @@ static ga_matrix_lookup_t const WIN_VERSION_MATRIX[2][8] = { { 6, 1, "Microsoft Windows Server 2008 R2", "2008r2"}, { 6, 2, "Microsoft Windows Server 2012", "2012"}, { 6, 3, "Microsoft Windows Server 2012 R2", "2012r2"}, - {10, 0, "Microsoft Windows Server 2016", "2016"}, + { 0, 0, 0}, { 0, 0, 0}, { 0, 0, 0} } }; +typedef struct _ga_win_10_0_server_t { + int final_build; + char const *version; + char const *version_id; +} ga_win_10_0_server_t; + +static ga_win_10_0_server_t const WIN_10_0_SERVER_VERSION_MATRIX[3] = { + {14393, "Microsoft Windows Server 2016", "2016"}, + {17763, "Microsoft Windows Server 2019", "2019"}, + {0, 0} +}; + static void ga_get_win_version(RTL_OSVERSIONINFOEXW *info, Error **errp) { typedef NTSTATUS(WINAPI * rtl_get_version_t)( @@ -1971,10 +2086,23 @@ static char *ga_get_win_name(OSVERSIONINFOEXW const *os_version, bool id) { DWORD major = os_version->dwMajorVersion; DWORD minor = os_version->dwMinorVersion; + DWORD build = os_version->dwBuildNumber; int tbl_idx = (os_version->wProductType != VER_NT_WORKSTATION); ga_matrix_lookup_t const *table = WIN_VERSION_MATRIX[tbl_idx]; + ga_win_10_0_server_t const *win_10_0_table = WIN_10_0_SERVER_VERSION_MATRIX; while (table->version != NULL) { - if (major == table->major && minor == table->minor) { + if (major == 10 && minor == 0 && tbl_idx) { + while (win_10_0_table->version != NULL) { + if (build <= win_10_0_table->final_build) { + if (id) { + return g_strdup(win_10_0_table->version_id); + } else { + return g_strdup(win_10_0_table->version); + } + } + win_10_0_table++; + } + } else if (major == table->major && minor == table->minor) { if (id) { return g_strdup(table->version_id); } else { diff --git a/qga/main.c b/qga/main.c index 87a0711c14..c0d77c79c4 100644 --- a/qga/main.c +++ b/qga/main.c @@ -523,15 +523,15 @@ fail: #endif } -static int send_response(GAState *s, QDict *payload) +static int send_response(GAState *s, const QDict *rsp) { const char *buf; QString *payload_qstr, *response_qstr; GIOStatus status; - g_assert(payload && s->channel); + g_assert(rsp && s->channel); - payload_qstr = qobject_to_json(QOBJECT(payload)); + payload_qstr = qobject_to_json(QOBJECT(rsp)); if (!payload_qstr) { return -EINVAL; } @@ -557,53 +557,24 @@ static int send_response(GAState *s, QDict *payload) return 0; } -static void process_command(GAState *s, QDict *req) -{ - QDict *rsp; - int ret; - - g_assert(req); - g_debug("processing command"); - rsp = qmp_dispatch(&ga_commands, QOBJECT(req), false); - if (rsp) { - ret = send_response(s, rsp); - if (ret < 0) { - g_warning("error sending response: %s", strerror(-ret)); - } - qobject_unref(rsp); - } -} - /* handle requests/control events coming in over the channel */ static void process_event(void *opaque, QObject *obj, Error *err) { GAState *s = opaque; - QDict *req, *rsp; + QDict *rsp; int ret; g_debug("process_event: called"); assert(!obj != !err); if (err) { - goto err; - } - req = qobject_to(QDict, obj); - if (!req) { - error_setg(&err, "Input must be a JSON object"); - goto err; - } - if (!qdict_haskey(req, "execute")) { - g_warning("unrecognized payload format"); - error_setg(&err, QERR_UNSUPPORTED); - goto err; + rsp = qmp_error_response(err); + goto end; } - process_command(s, req); - qobject_unref(obj); - return; + g_debug("processing command"); + rsp = qmp_dispatch(&ga_commands, obj, false); -err: - g_warning("failed to parse event: %s", error_get_pretty(err)); - rsp = qmp_error_response(err); +end: ret = send_response(s, rsp); if (ret < 0) { g_warning("error sending error response: %s", strerror(-ret)); diff --git a/qga/qapi-schema.json b/qga/qapi-schema.json index a4ff5b8fc9..fb4605cc19 100644 --- a/qga/qapi-schema.json +++ b/qga/qapi-schema.json @@ -532,12 +532,12 @@ # # Suspend guest to disk. # -# This command tries to execute the scripts provided by the pm-utils package. -# If it's not available, the suspend operation will be performed by manually -# writing to a sysfs file. +# This command attempts to suspend the guest using three strategies, in this +# order: # -# For the best results it's strongly recommended to have the pm-utils -# package installed in the guest. +# - systemd hibernate +# - pm-utils (via pm-hibernate) +# - manual write into sysfs # # This command does NOT return a response on success. There is a high chance # the command succeeded if the VM exits with a zero exit status or, when @@ -560,12 +560,12 @@ # # Suspend guest to ram. # -# This command tries to execute the scripts provided by the pm-utils package. -# If it's not available, the suspend operation will be performed by manually -# writing to a sysfs file. +# This command attempts to suspend the guest using three strategies, in this +# order: # -# For the best results it's strongly recommended to have the pm-utils -# package installed in the guest. +# - systemd suspend +# - pm-utils (via pm-suspend) +# - manual write into sysfs # # IMPORTANT: guest-suspend-ram requires working wakeup support in # QEMU. You should check QMP command query-current-machine returns @@ -594,7 +594,10 @@ # # Save guest state to disk and suspend to ram. # -# This command requires the pm-utils package to be installed in the guest. +# This command attempts to suspend the guest by executing, in this order: +# +# - systemd hybrid-sleep +# - pm-utils (via pm-suspend-hybrid) # # IMPORTANT: guest-suspend-hybrid requires working wakeup support in # QEMU. You should check QMP command query-current-machine returns diff --git a/qga/vss-win32/Makefile.objs b/qga/vss-win32/Makefile.objs index 23d08da225..fd3ba1896b 100644 --- a/qga/vss-win32/Makefile.objs +++ b/qga/vss-win32/Makefile.objs @@ -3,9 +3,9 @@ qga-vss-dll-obj-y += requester.o provider.o install.o obj-qga-vss-dll-obj-y = $(addprefix $(obj)/, $(qga-vss-dll-obj-y)) -$(obj-qga-vss-dll-obj-y): QEMU_CXXFLAGS = $(filter-out -Wstrict-prototypes -Wmissing-prototypes -Wnested-externs -Wold-style-declaration -Wold-style-definition -Wredundant-decls -fstack-protector-all -fstack-protector-strong, $(QEMU_CFLAGS)) -Wno-unknown-pragmas -Wno-delete-non-virtual-dtor +$(obj-qga-vss-dll-obj-y): QEMU_CXXFLAGS := $(filter-out -fstack-protector-all -fstack-protector-strong, $(QEMU_CXXFLAGS)) -Wno-unknown-pragmas -Wno-delete-non-virtual-dtor -$(obj)/qga-vss.dll: LDFLAGS = -shared -Wl,--add-stdcall-alias,--enable-stdcall-fixup -lole32 -loleaut32 -lshlwapi -luuid -static +$(obj)/qga-vss.dll: LDFLAGS = -shared -Wl,--add-stdcall-alias,--enable-stdcall-fixup -lglib-2.0 -lole32 -loleaut32 -lshlwapi -luuid -lintl -lws2_32 -static $(obj)/qga-vss.dll: $(obj-qga-vss-dll-obj-y) $(SRC_PATH)/$(obj)/qga-vss.def $(call quiet-command,$(CXX) -o $@ $(qga-vss-dll-obj-y) $(SRC_PATH)/qga/vss-win32/qga-vss.def $(CXXFLAGS) $(LDFLAGS),"LINK","$(TARGET_DIR)$@") diff --git a/qobject/json-lexer.c b/qobject/json-lexer.c index a7df2093aa..632320d72d 100644 --- a/qobject/json-lexer.c +++ b/qobject/json-lexer.c @@ -266,7 +266,7 @@ static inline uint8_t next_state(JSONLexer *lexer, char ch, bool flush, { uint8_t next; - assert(lexer->state <= ARRAY_SIZE(json_lexer)); + assert(lexer->state < ARRAY_SIZE(json_lexer)); next = json_lexer[lexer->state][(uint8_t)ch]; *char_consumed = !flush && !(next & LOOKAHEAD); return next & ~LOOKAHEAD; diff --git a/qom/cpu.c b/qom/cpu.c index a8d2958956..3c5493c96c 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -28,6 +28,7 @@ #include "exec/log.h" #include "exec/cpu-common.h" #include "qemu/error-report.h" +#include "qemu/qemu-print.h" #include "sysemu/sysemu.h" #include "hw/boards.h" #include "hw/qdev-properties.h" @@ -219,24 +220,22 @@ GuestPanicInformation *cpu_get_crash_info(CPUState *cpu) return res; } -void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, - int flags) +void cpu_dump_state(CPUState *cpu, FILE *f, int flags) { CPUClass *cc = CPU_GET_CLASS(cpu); if (cc->dump_state) { cpu_synchronize_state(cpu); - cc->dump_state(cpu, f, cpu_fprintf, flags); + cc->dump_state(cpu, f, flags); } } -void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, - int flags) +void cpu_dump_statistics(CPUState *cpu, int flags) { CPUClass *cc = CPU_GET_CLASS(cpu); if (cc->dump_statistics) { - cc->dump_statistics(cpu, f, cpu_fprintf, flags); + cc->dump_statistics(cpu, flags); } } diff --git a/qom/trace-events b/qom/trace-events index 5d86fbf019..945205bd10 100644 --- a/qom/trace-events +++ b/qom/trace-events @@ -1,5 +1,5 @@ # See docs/devel/tracing.txt for syntax documentation. -# qom/object.c +# object.c object_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)" object_class_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)" diff --git a/roms/Makefile b/roms/Makefile index 78d5dd18c3..0ce84a45ad 100644 --- a/roms/Makefile +++ b/roms/Makefile @@ -47,7 +47,7 @@ SEABIOS_EXTRAVERSION="-prebuilt.qemu.org" # We need that to combine multiple images (legacy bios, # efi ia32, efi x64) into a single rom binary. # -EFIROM = edk2/BaseTools/Source/C/bin/EfiRom +EDK2_EFIROM = edk2/BaseTools/Source/C/bin/EfiRom default: @echo "nothing is build by default" @@ -61,6 +61,7 @@ default: @echo " skiboot -- update skiboot.lid" @echo " u-boot.e500 -- update u-boot.e500" @echo " u-boot.sam460 -- update u-boot.sam460" + @echo " efi -- update UEFI (edk2) platform firmware" bios: build-seabios-config-seabios-128k build-seabios-config-seabios-256k cp seabios/builds/seabios-128k/bios.bin ../pc-bios/bios.bin @@ -102,8 +103,8 @@ pxe-rom-%: build-pxe-roms efirom: $(patsubst %,efi-rom-%,$(pxerom_variants)) -efi-rom-%: build-pxe-roms build-efi-roms $(EFIROM) - $(EFIROM) -f "0x$(VID)" -i "0x$(DID)" -l 0x02 \ +efi-rom-%: build-pxe-roms build-efi-roms edk2-basetools + $(EDK2_EFIROM) -f "0x$(VID)" -i "0x$(DID)" -l 0x02 \ -b ipxe/src/bin/$(VID)$(DID).rom \ -ec ipxe/src/bin-i386-efi/$(VID)$(DID).efidrv \ -ec ipxe/src/bin-x86_64-efi/$(VID)$(DID).efidrv \ @@ -120,8 +121,21 @@ build-efi-roms: build-pxe-roms $(patsubst %,bin-i386-efi/%.efidrv,$(pxerom_targets)) \ $(patsubst %,bin-x86_64-efi/%.efidrv,$(pxerom_targets)) -$(EFIROM): - $(MAKE) -C edk2/BaseTools +# Build scripts can pass compiler/linker flags to the EDK2 build tools +# via the EDK2_BASETOOLS_OPTFLAGS (CPPFLAGS and CFLAGS) and +# EDK2_BASETOOLS_LDFLAGS (LDFLAGS) environment variables. +# +# Example: +# +# make -C roms \ +# EDK2_BASETOOLS_OPTFLAGS='...' \ +# EDK2_BASETOOLS_LDFLAGS='...' \ +# efirom +# +edk2-basetools: + $(MAKE) -C edk2/BaseTools \ + EXTRA_OPTFLAGS='$(EDK2_BASETOOLS_OPTFLAGS)' \ + EXTRA_LDFLAGS='$(EDK2_BASETOOLS_LDFLAGS)' slof: $(MAKE) -C SLOF CROSS=$(powerpc64_cross_prefix) qemu @@ -143,6 +157,9 @@ skiboot: $(MAKE) -C skiboot CROSS=$(powerpc64_cross_prefix) cp skiboot/skiboot.lid ../pc-bios/skiboot.lid +efi: edk2-basetools + $(MAKE) -f Makefile.edk2 + clean: rm -rf seabios/.config seabios/out seabios/builds $(MAKE) -C sgabios clean @@ -153,3 +170,4 @@ clean: rm -rf u-boot/build.e500 $(MAKE) -C u-boot-sam460ex distclean $(MAKE) -C skiboot clean + $(MAKE) -f Makefile.edk2 clean diff --git a/roms/Makefile.edk2 b/roms/Makefile.edk2 new file mode 100644 index 0000000000..822c547fec --- /dev/null +++ b/roms/Makefile.edk2 @@ -0,0 +1,148 @@ +# Makefile for building firmware binaries and variable store templates for a +# number of virtual platforms in edk2. +# +# Copyright (C) 2019 Red Hat, Inc. +# +# This program and the accompanying materials are licensed and made available +# under the terms and conditions of the BSD License that accompanies this +# distribution. The full text of the license may be found at +# <http://opensource.org/licenses/bsd-license.php>. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT +# WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +SHELL = /bin/bash + +toolchain = $(shell source ./edk2-funcs.sh && qemu_edk2_get_toolchain $(1)) + +licenses := \ + edk2/License.txt \ + edk2/OvmfPkg/License.txt \ + edk2/CryptoPkg/Library/OpensslLib/openssl/LICENSE + +# The "edk2-arm-vars.fd" varstore template is suitable for aarch64 as well. +# Similarly, the "edk2-i386-vars.fd" varstore template is suitable for x86_64 +# as well, independently of "secure" too. +flashdevs := \ + aarch64-code \ + arm-code \ + i386-code \ + i386-secure-code \ + x86_64-code \ + x86_64-secure-code \ + \ + arm-vars \ + i386-vars + +all: $(foreach flashdev,$(flashdevs),../pc-bios/edk2-$(flashdev).fd.bz2) \ + ../pc-bios/edk2-licenses.txt + +../pc-bios/edk2-%.fd.bz2: ../pc-bios/edk2-%.fd + bzip2 -9 -c $< > $@ + +# When the build completes, we need not keep the uncompressed flash device +# files. +.INTERMEDIATE: $(foreach flashdev,$(flashdevs),../pc-bios/edk2-$(flashdev).fd) + +submodules: + cd edk2 && git submodule update --init --force + +# See notes on the ".NOTPARALLEL" target and the "+" indicator in +# "tests/uefi-test-tools/Makefile". +.NOTPARALLEL: + +../pc-bios/edk2-aarch64-code.fd: submodules + +./edk2-build.sh \ + aarch64 \ + --arch=AARCH64 \ + --platform=ArmVirtPkg/ArmVirtQemu.dsc \ + -D NETWORK_IP6_ENABLE \ + -D HTTP_BOOT_ENABLE + cp edk2/Build/ArmVirtQemu-AARCH64/DEBUG_$(call toolchain,aarch64)/FV/QEMU_EFI.fd \ + $@ + truncate --size=64M $@ + +../pc-bios/edk2-arm-code.fd: submodules + +./edk2-build.sh \ + arm \ + --arch=ARM \ + --platform=ArmVirtPkg/ArmVirtQemu.dsc \ + -D NETWORK_IP6_ENABLE \ + -D HTTP_BOOT_ENABLE + cp edk2/Build/ArmVirtQemu-ARM/DEBUG_$(call toolchain,arm)/FV/QEMU_EFI.fd \ + $@ + truncate --size=64M $@ + +../pc-bios/edk2-i386-code.fd: submodules + +./edk2-build.sh \ + i386 \ + --arch=IA32 \ + --platform=OvmfPkg/OvmfPkgIa32.dsc \ + -D NETWORK_IP6_ENABLE \ + -D HTTP_BOOT_ENABLE \ + -D TLS_ENABLE \ + -D TPM2_ENABLE \ + -D TPM2_CONFIG_ENABLE + cp edk2/Build/OvmfIa32/DEBUG_$(call toolchain,i386)/FV/OVMF_CODE.fd $@ + +../pc-bios/edk2-i386-secure-code.fd: submodules + +./edk2-build.sh \ + i386 \ + --arch=IA32 \ + --platform=OvmfPkg/OvmfPkgIa32.dsc \ + -D NETWORK_IP6_ENABLE \ + -D HTTP_BOOT_ENABLE \ + -D TLS_ENABLE \ + -D TPM2_ENABLE \ + -D TPM2_CONFIG_ENABLE \ + -D SECURE_BOOT_ENABLE \ + -D SMM_REQUIRE + cp edk2/Build/OvmfIa32/DEBUG_$(call toolchain,i386)/FV/OVMF_CODE.fd $@ + +../pc-bios/edk2-x86_64-code.fd: submodules + +./edk2-build.sh \ + x86_64 \ + --arch=X64 \ + --platform=OvmfPkg/OvmfPkgX64.dsc \ + -D NETWORK_IP6_ENABLE \ + -D HTTP_BOOT_ENABLE \ + -D TLS_ENABLE \ + -D TPM2_ENABLE \ + -D TPM2_CONFIG_ENABLE + cp edk2/Build/OvmfX64/DEBUG_$(call toolchain,x86_64)/FV/OVMF_CODE.fd $@ + +../pc-bios/edk2-x86_64-secure-code.fd: submodules + +./edk2-build.sh \ + x86_64 \ + --arch=IA32 \ + --arch=X64 \ + --platform=OvmfPkg/OvmfPkgIa32X64.dsc \ + -D NETWORK_IP6_ENABLE \ + -D HTTP_BOOT_ENABLE \ + -D TLS_ENABLE \ + -D TPM2_ENABLE \ + -D TPM2_CONFIG_ENABLE \ + -D SECURE_BOOT_ENABLE \ + -D SMM_REQUIRE + cp edk2/Build/Ovmf3264/DEBUG_$(call toolchain,x86_64)/FV/OVMF_CODE.fd $@ + +../pc-bios/edk2-arm-vars.fd: ../pc-bios/edk2-arm-code.fd + cp edk2/Build/ArmVirtQemu-ARM/DEBUG_$(call toolchain,arm)/FV/QEMU_VARS.fd \ + $@ + truncate --size=64M $@ + +../pc-bios/edk2-i386-vars.fd: ../pc-bios/edk2-i386-code.fd + cp edk2/Build/OvmfIa32/DEBUG_$(call toolchain,i386)/FV/OVMF_VARS.fd $@ + +# The license file accumulates several individual licenses from under edk2, +# prefixing each individual license with a header (generated by "tail") that +# states its pathname. +../pc-bios/edk2-licenses.txt: submodules + tail -n $(shell cat $(licenses) | wc -l) $(licenses) > $@ + dos2unix $@ + +clean: + rm -rf edk2/Build + cd edk2/Conf && \ + rm -rf .cache BuildEnv.sh build_rule.txt target.txt \ + tools_def.txt diff --git a/roms/config.seabios-128k b/roms/config.seabios-128k index 35b5a07d8f..a17502ca0f 100644 --- a/roms/config.seabios-128k +++ b/roms/config.seabios-128k @@ -2,7 +2,7 @@ # need to turn off features (xhci,uas) to make it fit into 128k CONFIG_QEMU=y CONFIG_ROM_SIZE=128 -CONFIG_ATA_DMA=y +CONFIG_ATA_DMA=n CONFIG_BOOTSPLASH=n CONFIG_XEN=n CONFIG_USB_OHCI=n diff --git a/roms/config.seabios-256k b/roms/config.seabios-256k index b14b614fcc..d1bcc9453c 100644 --- a/roms/config.seabios-256k +++ b/roms/config.seabios-256k @@ -1,4 +1,4 @@ # for qemu machine types 2.0 + newer CONFIG_QEMU=y CONFIG_ROM_SIZE=256 -CONFIG_ATA_DMA=y +CONFIG_ATA_DMA=n diff --git a/roms/edk2 b/roms/edk2 -Subproject 85588389222a3636baf0f9ed8227f2434af4c3f +Subproject 89910a39dcfd788057caa5d88b7e76e112d187b diff --git a/roms/edk2-build.sh b/roms/edk2-build.sh new file mode 100755 index 0000000000..4f46f8a6a2 --- /dev/null +++ b/roms/edk2-build.sh @@ -0,0 +1,55 @@ +#!/bin/bash + +# Wrapper shell script for building a virtual platform firmware in edk2. +# +# Copyright (C) 2019 Red Hat, Inc. +# +# This program and the accompanying materials are licensed and made available +# under the terms and conditions of the BSD License that accompanies this +# distribution. The full text of the license may be found at +# <http://opensource.org/licenses/bsd-license.php>. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT +# WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +set -e -u -C + +# Save the command line arguments. We need to reset $# to 0 before sourcing +# "edksetup.sh", as it will inherit $@. +emulation_target=$1 +shift +num_args=0 +args=() +for arg in "$@"; do + args[num_args++]="$arg" +done +shift $num_args + +cd edk2 + +# Work around <https://bugzilla.tianocore.org/show_bug.cgi?id=1607>. +export PYTHON_COMMAND=python2 + +# Source "edksetup.sh" carefully. +set +e +u +C +source ./edksetup.sh +ret=$? +set -e -u -C +if [ $ret -ne 0 ]; then + exit $ret +fi + +# Fetch some option arguments, and set the cross-compilation environment (if +# any), for the edk2 "build" utility. +source ../edk2-funcs.sh +edk2_toolchain=$(qemu_edk2_get_toolchain "$emulation_target") +edk2_thread_count=$(qemu_edk2_get_thread_count "$MAKEFLAGS") +qemu_edk2_set_cross_env "$emulation_target" + +# Build the platform firmware. +build \ + --cmd-len=65536 \ + -n "$edk2_thread_count" \ + --buildtarget=DEBUG \ + --tagname="$edk2_toolchain" \ + "${args[@]}" diff --git a/roms/edk2-funcs.sh b/roms/edk2-funcs.sh new file mode 100644 index 0000000000..a9fae7ee89 --- /dev/null +++ b/roms/edk2-funcs.sh @@ -0,0 +1,253 @@ +# Shell script that defines functions for determining some environmental +# characteristics for the edk2 "build" utility. +# +# This script is meant to be sourced, in a bash environment. +# +# Copyright (C) 2019 Red Hat, Inc. +# +# This program and the accompanying materials are licensed and made available +# under the terms and conditions of the BSD License that accompanies this +# distribution. The full text of the license may be found at +# <http://opensource.org/licenses/bsd-license.php>. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT +# WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +# Verify whether the QEMU system emulation target is supported by the UEFI spec +# and edk2. Print a message to the standard error, and return with nonzero +# status, if verification fails. +# +# Parameters: +# $1: QEMU system emulation target +qemu_edk2_verify_arch() +{ + local emulation_target="$1" + local program_name=$(basename -- "$0") + + case "$emulation_target" in + (arm|aarch64|i386|x86_64) + ;; + (*) + printf '%s: unknown/unsupported QEMU system emulation target "%s"\n' \ + "$program_name" "$emulation_target" >&2 + return 1 + ;; + esac +} + + +# Translate the QEMU system emulation target to the edk2 architecture +# identifier. Print the result to the standard output. +# +# Parameters: +# $1: QEMU system emulation target +qemu_edk2_get_arch() +{ + local emulation_target="$1" + + if ! qemu_edk2_verify_arch "$emulation_target"; then + return 1 + fi + + case "$emulation_target" in + (arm) + printf 'ARM\n' + ;; + (aarch64) + printf 'AARCH64\n' + ;; + (i386) + printf 'IA32\n' + ;; + (x86_64) + printf 'X64\n' + ;; + esac +} + + +# Translate the QEMU system emulation target to the gcc cross-compilation +# architecture identifier. Print the result to the standard output. +# +# Parameters: +# $1: QEMU system emulation target +qemu_edk2_get_gcc_arch() +{ + local emulation_target="$1" + + if ! qemu_edk2_verify_arch "$emulation_target"; then + return 1 + fi + + case "$emulation_target" in + (arm|aarch64|x86_64) + printf '%s\n' "$emulation_target" + ;; + (i386) + printf 'i686\n' + ;; + esac +} + + +# Determine the gcc cross-compiler prefix (if any) for use with the edk2 +# toolchain. Print the result to the standard output. +# +# Parameters: +# $1: QEMU system emulation target +qemu_edk2_get_cross_prefix() +{ + local emulation_target="$1" + local gcc_arch + local host_arch + + if ! gcc_arch=$(qemu_edk2_get_gcc_arch "$emulation_target"); then + return 1 + fi + + host_arch=$(uname -m) + + if [ "$gcc_arch" == "$host_arch" ] || + ( [ "$gcc_arch" == i686 ] && [ "$host_arch" == x86_64 ] ); then + # no cross-compiler needed + : + else + printf '%s-linux-gnu-\n' "$gcc_arch" + fi +} + + +# Determine the edk2 toolchain tag for the QEMU system emulation target. Print +# the result to the standard output. Print a message to the standard error, and +# return with nonzero status, if the (conditional) gcc version check fails. +# +# Parameters: +# $1: QEMU system emulation target +qemu_edk2_get_toolchain() +{ + local emulation_target="$1" + local program_name=$(basename -- "$0") + local cross_prefix + local gcc_version + + if ! qemu_edk2_verify_arch "$emulation_target"; then + return 1 + fi + + case "$emulation_target" in + (arm|aarch64) + printf 'GCC5\n' + ;; + + (i386|x86_64) + if ! cross_prefix=$(qemu_edk2_get_cross_prefix "$emulation_target"); then + return 1 + fi + + gcc_version=$("${cross_prefix}gcc" -v 2>&1 | tail -1 | awk '{print $3}') + # Run "git-blame" on "OvmfPkg/build.sh" in edk2 for more information on + # the mapping below. + case "$gcc_version" in + ([1-3].*|4.[0-7].*) + printf '%s: unsupported gcc version "%s"\n' \ + "$program_name" "$gcc_version" >&2 + return 1 + ;; + (4.8.*) + printf 'GCC48\n' + ;; + (4.9.*|6.[0-2].*) + printf 'GCC49\n' + ;; + (*) + printf 'GCC5\n' + ;; + esac + ;; + esac +} + + +# Determine the name of the environment variable that exposes the +# cross-compiler prefix to the edk2 "build" utility. Print the result to the +# standard output. +# +# Parameters: +# $1: QEMU system emulation target +qemu_edk2_get_cross_prefix_var() +{ + local emulation_target="$1" + local edk2_toolchain + local edk2_arch + + if ! edk2_toolchain=$(qemu_edk2_get_toolchain "$emulation_target"); then + return 1 + fi + + case "$emulation_target" in + (arm|aarch64) + if ! edk2_arch=$(qemu_edk2_get_arch "$emulation_target"); then + return 1 + fi + printf '%s_%s_PREFIX\n' "$edk2_toolchain" "$edk2_arch" + ;; + (i386|x86_64) + printf '%s_BIN\n' "$edk2_toolchain" + ;; + esac +} + + +# Set and export the environment variable(s) necessary for cross-compilation, +# whenever needed by the edk2 "build" utility. +# +# Parameters: +# $1: QEMU system emulation target +qemu_edk2_set_cross_env() +{ + local emulation_target="$1" + local cross_prefix + local cross_prefix_var + + if ! cross_prefix=$(qemu_edk2_get_cross_prefix "$emulation_target"); then + return 1 + fi + + if [ -z "$cross_prefix" ]; then + # Nothing to do. + return 0 + fi + + if ! cross_prefix_var=$(qemu_edk2_get_cross_prefix_var \ + "$emulation_target"); then + return 1 + fi + + eval "export $cross_prefix_var=\$cross_prefix" +} + + +# Determine the "-n" option argument (that is, the number of modules to build +# in parallel) for the edk2 "build" utility. Print the result to the standard +# output. +# +# Parameters: +# $1: the value of the MAKEFLAGS variable +qemu_edk2_get_thread_count() +{ + local makeflags="$1" + + if [[ "$makeflags" == *--jobserver-auth=* ]] || + [[ "$makeflags" == *--jobserver-fds=* ]]; then + # If there is a job server, allow the edk2 "build" utility to parallelize + # as many module builds as there are logical CPUs in the system. The "make" + # instances forked by "build" are supposed to limit themselves through the + # job server. The zero value below causes the edk2 "build" utility to fetch + # the logical CPU count with Python's multiprocessing.cpu_count() method. + printf '0\n' + else + # Build a single module at a time. + printf '1\n' + fi +} diff --git a/roms/qemu-palcode b/roms/qemu-palcode -Subproject 51c237d7e20d05100eacadee2f61abc17e6bc09 +Subproject bf0e13698872450164fa7040da36a95d2d4b326 diff --git a/roms/seabios b/roms/seabios -Subproject a698c8995ffb2838296ec284fe3c4ad33dfca30 +Subproject a5cab58e9a3fb6e168aba919c5669bea406573b diff --git a/roms/seabios-hppa b/roms/seabios-hppa -Subproject 1ef99a01572c2581c30e16e6fe69e9ea2ef92ce +Subproject 0f4fe84658165e96ce35870fd19fc634e182e77 diff --git a/roms/skiboot b/roms/skiboot -Subproject e0ee24c27a172bcf482f6f2bc905e6211c134bc +Subproject 261ca8e779e5138869a45f174caa49be6a27450 diff --git a/scripts/cleanup-trace-events.pl b/scripts/cleanup-trace-events.pl index e93abc00da..d4f0e4cab5 100755 --- a/scripts/cleanup-trace-events.pl +++ b/scripts/cleanup-trace-events.pl @@ -13,6 +13,7 @@ use warnings; use strict; +use File::Basename; my $buf = ''; my %seen = (); @@ -23,12 +24,19 @@ sub out { %seen = (); } -while (<>) { - if (/^(disable )?([a-z_0-9]+)\(/) { - open GREP, '-|', 'git', 'grep', '-lw', "trace_$2" +$#ARGV == 0 or die "usage: $0 FILE"; +my $in = $ARGV[0]; +my $dir = dirname($in); +open(IN, $in) or die "open $in: $!"; +chdir($dir) or die "chdir $dir: $!"; + +while (<IN>) { + if (/^(disable |(tcg) |vcpu )*([a-z_0-9]+)\(/i) { + my $pat = "trace_$3"; + $pat .= '_tcg' if (defined $2); + open GREP, '-|', 'git', 'grep', '-lw', '--max-depth', '1', $pat or die "run git grep: $!"; - my $fname; - while ($fname = <GREP>) { + while (my $fname = <GREP>) { chomp $fname; next if $seen{$fname} || $fname eq 'trace-events'; $seen{$fname} = 1; @@ -49,3 +57,4 @@ while (<>) { } out; +close(IN) or die "close $in: $!"; diff --git a/scripts/decodetree.py b/scripts/decodetree.py index e342d278b8..aa790b596a 100755 --- a/scripts/decodetree.py +++ b/scripts/decodetree.py @@ -17,139 +17,7 @@ # # Generate a decoding tree from a specification file. -# -# The tree is built from instruction "patterns". A pattern may represent -# a single architectural instruction or a group of same, depending on what -# is convenient for further processing. -# -# Each pattern has "fixedbits" & "fixedmask", the combination of which -# describes the condition under which the pattern is matched: -# -# (insn & fixedmask) == fixedbits -# -# Each pattern may have "fields", which are extracted from the insn and -# passed along to the translator. Examples of such are registers, -# immediates, and sub-opcodes. -# -# In support of patterns, one may declare fields, argument sets, and -# formats, each of which may be re-used to simplify further definitions. -# -# *** Field syntax: -# -# field_def := '%' identifier ( unnamed_field )+ ( !function=identifier )? -# unnamed_field := number ':' ( 's' ) number -# -# For unnamed_field, the first number is the least-significant bit position of -# the field and the second number is the length of the field. If the 's' is -# present, the field is considered signed. If multiple unnamed_fields are -# present, they are concatenated. In this way one can define disjoint fields. -# -# If !function is specified, the concatenated result is passed through the -# named function, taking and returning an integral value. -# -# FIXME: the fields of the structure into which this result will be stored -# is restricted to "int". Which means that we cannot expand 64-bit items. -# -# Field examples: -# -# %disp 0:s16 -- sextract(i, 0, 16) -# %imm9 16:6 10:3 -- extract(i, 16, 6) << 3 | extract(i, 10, 3) -# %disp12 0:s1 1:1 2:10 -- sextract(i, 0, 1) << 11 -# | extract(i, 1, 1) << 10 -# | extract(i, 2, 10) -# %shimm8 5:s8 13:1 !function=expand_shimm8 -# -- expand_shimm8(sextract(i, 5, 8) << 1 -# | extract(i, 13, 1)) -# -# *** Argument set syntax: -# -# args_def := '&' identifier ( args_elt )+ ( !extern )? -# args_elt := identifier -# -# Each args_elt defines an argument within the argument set. -# Each argument set will be rendered as a C structure "arg_$name" -# with each of the fields being one of the member arguments. -# -# If !extern is specified, the backing structure is assumed to -# have been already declared, typically via a second decoder. -# -# Argument set examples: -# -# ®3 ra rb rc -# &loadstore reg base offset -# -# *** Format syntax: -# -# fmt_def := '@' identifier ( fmt_elt )+ -# fmt_elt := fixedbit_elt | field_elt | field_ref | args_ref -# fixedbit_elt := [01.-]+ -# field_elt := identifier ':' 's'? number -# field_ref := '%' identifier | identifier '=' '%' identifier -# args_ref := '&' identifier -# -# Defining a format is a handy way to avoid replicating groups of fields -# across many instruction patterns. -# -# A fixedbit_elt describes a contiguous sequence of bits that must -# be 1, 0, [.-] for don't care. The difference between '.' and '-' -# is that '.' means that the bit will be covered with a field or a -# final [01] from the pattern, and '-' means that the bit is really -# ignored by the cpu and will not be specified. -# -# A field_elt describes a simple field only given a width; the position of -# the field is implied by its position with respect to other fixedbit_elt -# and field_elt. -# -# If any fixedbit_elt or field_elt appear then all bits must be defined. -# Padding with a fixedbit_elt of all '.' is an easy way to accomplish that. -# -# A field_ref incorporates a field by reference. This is the only way to -# add a complex field to a format. A field may be renamed in the process -# via assignment to another identifier. This is intended to allow the -# same argument set be used with disjoint named fields. -# -# A single args_ref may specify an argument set to use for the format. -# The set of fields in the format must be a subset of the arguments in -# the argument set. If an argument set is not specified, one will be -# inferred from the set of fields. -# -# It is recommended, but not required, that all field_ref and args_ref -# appear at the end of the line, not interleaving with fixedbit_elf or -# field_elt. -# -# Format examples: -# -# @opr ...... ra:5 rb:5 ... 0 ....... rc:5 -# @opi ...... ra:5 lit:8 1 ....... rc:5 -# -# *** Pattern syntax: -# -# pat_def := identifier ( pat_elt )+ -# pat_elt := fixedbit_elt | field_elt | field_ref -# | args_ref | fmt_ref | const_elt -# fmt_ref := '@' identifier -# const_elt := identifier '=' number -# -# The fixedbit_elt and field_elt specifiers are unchanged from formats. -# A pattern that does not specify a named format will have one inferred -# from a referenced argument set (if present) and the set of fields. -# -# A const_elt allows a argument to be set to a constant value. This may -# come in handy when fields overlap between patterns and one has to -# include the values in the fixedbit_elt instead. -# -# The decoder will call a translator function for each pattern matched. -# -# Pattern examples: -# -# addl_r 010000 ..... ..... .... 0000000 ..... @opr -# addl_i 010000 ..... ..... .... 0000000 ..... @opi -# -# which will, in part, invoke -# -# trans_addl_r(ctx, &arg_opr, insn) -# and -# trans_addl_i(ctx, &arg_opi, insn) +# See the syntax and semantics in docs/devel/decodetree.rst. # import os @@ -163,6 +31,7 @@ fields = {} arguments = {} formats = {} patterns = [] +allpatterns = [] translate_prefix = 'trans' translate_scope = 'static ' @@ -432,13 +301,7 @@ class General: self.fields = flds def __str__(self): - r = self.name - if self.base: - r = r + ' ' + self.base.name - else: - r = r + ' ' + str(self.fields) - r = r + ' ' + str_match_bits(self.fixedbits, self.fixedmask) - return r + return self.name + ' ' + str_match_bits(self.fixedbits, self.fixedmask) def str1(self, i): return str_indent(i) + self.__str__() @@ -449,7 +312,8 @@ class Format(General): """Class representing an instruction format""" def extract_name(self): - return 'extract_' + self.name + global decode_function + return decode_function + '_extract_' + self.name def output_extract(self): output('static void ', self.extract_name(), '(', @@ -480,11 +344,52 @@ class Pattern(General): output(ind, self.base.extract_name(), '(&u.f_', arg, ', insn);\n') for n, f in self.fields.items(): output(ind, 'u.f_', arg, '.', n, ' = ', f.str_extract(), ';\n') - output(ind, 'return ', translate_prefix, '_', self.name, - '(ctx, &u.f_', arg, ');\n') + output(ind, 'if (', translate_prefix, '_', self.name, + '(ctx, &u.f_', arg, ')) return true;\n') # end Pattern +class MultiPattern(General): + """Class representing an overlapping set of instruction patterns""" + + def __init__(self, lineno, pats, fixb, fixm, udfm): + self.file = input_file + self.lineno = lineno + self.pats = pats + self.base = None + self.fixedbits = fixb + self.fixedmask = fixm + self.undefmask = udfm + + def __str__(self): + r = "{" + for p in self.pats: + r = r + ' ' + str(p) + return r + "}" + + def output_decl(self): + for p in self.pats: + p.output_decl() + + def output_code(self, i, extracted, outerbits, outermask): + global translate_prefix + ind = str_indent(i) + for p in self.pats: + if outermask != p.fixedmask: + innermask = p.fixedmask & ~outermask + innerbits = p.fixedbits & ~outermask + output(ind, 'if ((insn & ', + '0x{0:08x}) == 0x{1:08x}'.format(innermask, innerbits), + ') {\n') + output(ind, ' /* ', + str_match_bits(p.fixedbits, p.fixedmask), ' */\n') + p.output_code(i + 4, extracted, p.fixedbits, p.fixedmask) + output(ind, '}\n') + else: + p.output_code(i, extracted, p.fixedbits, p.fixedmask) +#end MultiPattern + + def parse_field(lineno, name, toks): """Parse one instruction field from TOKS at LINENO""" global fields @@ -637,6 +542,7 @@ def parse_generic(lineno, is_format, name, toks): global arguments global formats global patterns + global allpatterns global re_ident global insnwidth global insnmask @@ -684,7 +590,7 @@ def parse_generic(lineno, is_format, name, toks): continue # 'Foo=number' sets an argument field to a constant value - if re_fullmatch(re_ident + '=[0-9]+', t): + if re_fullmatch(re_ident + '=[+-]?[0-9]+', t): (fname, value) = t.split('=') value = int(value) flds = add_field(lineno, flds, fname, ConstField(value)) @@ -716,6 +622,8 @@ def parse_generic(lineno, is_format, name, toks): sign = True flen = flen[1:] shift = int(flen, 10) + if shift + width > insnwidth: + error(lineno, 'field {0} exceeds insnwidth'.format(fname)) f = Field(sign, insnwidth - width - shift, shift) flds = add_field(lineno, flds, fname, f) fixedbits <<= shift @@ -781,6 +689,7 @@ def parse_generic(lineno, is_format, name, toks): pat = Pattern(name, lineno, fmt, fixedbits, fixedmask, undefmask, fieldmask, flds) patterns.append(pat) + allpatterns.append(pat) # Validate the masks that we have assembled. if fieldmask & fixedmask: @@ -799,17 +708,66 @@ def parse_generic(lineno, is_format, name, toks): .format(allbits ^ insnmask)) # end parse_general +def build_multi_pattern(lineno, pats): + """Validate the Patterns going into a MultiPattern.""" + global patterns + global insnmask + + if len(pats) < 2: + error(lineno, 'less than two patterns within braces') + + fixedmask = insnmask + undefmask = insnmask + + # Collect fixed/undefmask for all of the children. + # Move the defining lineno back to that of the first child. + for p in pats: + fixedmask &= p.fixedmask + undefmask &= p.undefmask + if p.lineno < lineno: + lineno = p.lineno + + repeat = True + while repeat: + if fixedmask == 0: + error(lineno, 'no overlap in patterns within braces') + fixedbits = None + for p in pats: + thisbits = p.fixedbits & fixedmask + if fixedbits is None: + fixedbits = thisbits + elif fixedbits != thisbits: + fixedmask &= ~(fixedbits ^ thisbits) + break + else: + repeat = False + + mp = MultiPattern(lineno, pats, fixedbits, fixedmask, undefmask) + patterns.append(mp) +# end build_multi_pattern def parse_file(f): """Parse all of the patterns within a file""" + global patterns + # Read all of the lines of the file. Concatenate lines # ending in backslash; discard empty lines and comments. toks = [] lineno = 0 + nesting = 0 + saved_pats = [] + for line in f: lineno += 1 + # Expand and strip spaces, to find indent. + line = line.rstrip() + line = line.expandtabs() + len1 = len(line) + line = line.lstrip() + len2 = len(line) + # Discard comments end = line.find('#') if end >= 0: @@ -819,10 +777,18 @@ def parse_file(f): if len(toks) != 0: # Next line after continuation toks.extend(t) - elif len(t) == 0: - # Empty line - continue else: + # Allow completely blank lines. + if len1 == 0: + continue + indent = len1 - len2 + # Empty line due to comment. + if len(t) == 0: + # Indentation must be correct, even for comment lines. + if indent != nesting: + error(lineno, 'indentation ', indent, ' != ', nesting) + continue + start_lineno = lineno toks = t # Continuation? @@ -830,21 +796,47 @@ def parse_file(f): toks.pop() continue - if len(toks) < 2: - error(lineno, 'short line') - name = toks[0] del toks[0] + # End nesting? + if name == '}': + if nesting == 0: + error(start_lineno, 'mismatched close brace') + if len(toks) != 0: + error(start_lineno, 'extra tokens after close brace') + nesting -= 2 + if indent != nesting: + error(start_lineno, 'indentation ', indent, ' != ', nesting) + pats = patterns + patterns = saved_pats.pop() + build_multi_pattern(lineno, pats) + toks = [] + continue + + # Everything else should have current indentation. + if indent != nesting: + error(start_lineno, 'indentation ', indent, ' != ', nesting) + + # Start nesting? + if name == '{': + if len(toks) != 0: + error(start_lineno, 'extra tokens after open brace') + saved_pats.append(patterns) + patterns = [] + nesting += 2 + toks = [] + continue + # Determine the type of object needing to be parsed. if name[0] == '%': - parse_field(lineno, name[1:], toks) + parse_field(start_lineno, name[1:], toks) elif name[0] == '&': - parse_arguments(lineno, name[1:], toks) + parse_arguments(start_lineno, name[1:], toks) elif name[0] == '@': - parse_generic(lineno, True, name[1:], toks) + parse_generic(start_lineno, True, name[1:], toks) else: - parse_generic(lineno, False, name, toks) + parse_generic(start_lineno, False, name, toks) toks = [] # end parse_file @@ -909,23 +901,22 @@ class Tree: output(ind, ' /* ', str_match_bits(innerbits, innermask), ' */\n') s.output_code(i + 4, extracted, innerbits, innermask) + output(ind, ' return false;\n') output(ind, '}\n') - output(ind, 'return false;\n') # end Tree def build_tree(pats, outerbits, outermask): # Find the intersection of all remaining fixedmask. - innermask = ~outermask + innermask = ~outermask & insnmask for i in pats: innermask &= i.fixedmask if innermask == 0: - pnames = [] + text = 'overlapping patterns:' for p in pats: - pnames.append(p.name + ':' + p.file + ':' + str(p.lineno)) - error_with_file(pats[0].file, pats[0].lineno, - 'overlapping patterns:', pnames) + text += '\n' + p.file + ':' + str(p.lineno) + ': ' + str(p) + error_with_file(pats[0].file, pats[0].lineno, text) fullmask = outermask | innermask @@ -978,6 +969,7 @@ def main(): global arguments global formats global patterns + global allpatterns global translate_scope global translate_prefix global output_fd @@ -990,7 +982,8 @@ def main(): decode_scope = 'static ' - long_opts = ['decode=', 'translate=', 'output=', 'insnwidth='] + long_opts = ['decode=', 'translate=', 'output=', 'insnwidth=', + 'static-decode='] try: (opts, args) = getopt.getopt(sys.argv[1:], 'o:w:', long_opts) except getopt.GetoptError as err: @@ -1001,6 +994,8 @@ def main(): elif o == '--decode': decode_function = a decode_scope = '' + elif o == '--static-decode': + decode_function = a elif o == '--translate': translate_prefix = a translate_scope = '' @@ -1039,7 +1034,7 @@ def main(): # Make sure that the argument sets are the same, and declare the # function only once. out_pats = {} - for i in patterns: + for i in allpatterns: if i.name in out_pats: p = out_pats[i.name] if i.base.base != p.base.base: @@ -1057,14 +1052,16 @@ def main(): '(DisasContext *ctx, ', insntype, ' insn)\n{\n') i4 = str_indent(4) - output(i4, 'union {\n') - for n in sorted(arguments.keys()): - f = arguments[n] - output(i4, i4, f.struct_name(), ' f_', f.name, ';\n') - output(i4, '} u;\n\n') - t.output_code(4, False, 0, 0) + if len(allpatterns) != 0: + output(i4, 'union {\n') + for n in sorted(arguments.keys()): + f = arguments[n] + output(i4, i4, f.struct_name(), ' f_', f.name, ';\n') + output(i4, '} u;\n\n') + t.output_code(4, False, 0, 0) + output(i4, 'return false;\n') output('}\n') if output_file: diff --git a/scripts/make-release b/scripts/make-release index c14f75b12c..b4af9c9e52 100755 --- a/scripts/make-release +++ b/scripts/make-release @@ -20,10 +20,6 @@ git checkout "v${version}" git submodule update --init (cd roms/seabios && git describe --tags --long --dirty > .version) (cd roms/skiboot && ./make_version.sh > .version) -# FIXME: The following line is a workaround for avoiding filename collisions -# when unpacking u-boot sources on case-insensitive filesystems. Once we -# update to something with u-boot commit 610eec7f0 we can drop this line. -tar --exclude=.git -cjf roms/u-boot.tar.bz2 -C roms u-boot && rm -rf roms/u-boot popd tar --exclude=.git -cjf ${destination}.tar.bz2 ${destination} rm -rf ${destination} diff --git a/scripts/minikconf.py b/scripts/minikconf.py index 5421db0ed0..0ffc6c38da 100644 --- a/scripts/minikconf.py +++ b/scripts/minikconf.py @@ -592,7 +592,7 @@ class KconfigParser: if not self.src.startswith(rest, self.cursor): return False length = len(rest) - if self.src[self.cursor + length].isalnum() or self.src[self.cursor + length] == '|': + if self.src[self.cursor + length].isalnum() or self.src[self.cursor + length] == '_': return False self.cursor += length return True diff --git a/scripts/qemugdb/timers.py b/scripts/qemugdb/timers.py index 51ea04b5e2..f0e132d27a 100644 --- a/scripts/qemugdb/timers.py +++ b/scripts/qemugdb/timers.py @@ -6,8 +6,10 @@ # # Author: Alex Bennée <alex.bennee@linaro.org> # -# This work is licensed under the terms of the GNU GPL, version 2. See -# the COPYING file in the top-level directory. +# This work is licensed under the terms of the GNU GPL, version 2 or later. +# See the COPYING file in the top-level directory. +# +# SPDX-License-Identifier: GPL-2.0-or-later # 'qemu timers' -- display the current timerlists diff --git a/scripts/qmp/qmp-shell b/scripts/qmp/qmp-shell index 9fec46e2ed..7776c7b141 100755 --- a/scripts/qmp/qmp-shell +++ b/scripts/qmp/qmp-shell @@ -73,7 +73,7 @@ import sys import os import errno import atexit -import shlex +import re sys.path.append(os.path.join(os.path.dirname(__file__), '..', '..', 'python')) from qemu import qmp @@ -222,7 +222,7 @@ class QMPShell(qmp.QEMUMonitorProtocol): < command-name > [ arg-name1=arg1 ] ... [ arg-nameN=argN ] """ - cmdargs = shlex.split(cmdline) + cmdargs = re.findall(r'''(?:[^\s"']|"(?:\\.|[^"])*"|'(?:\\.|[^'])*')+''', cmdline) # Transactional CLI entry/exit: if cmdargs[0] == 'transaction(': diff --git a/scripts/tracetool/format/d.py b/scripts/tracetool/format/d.py index 78397c24d2..c7cb2a93a6 100644 --- a/scripts/tracetool/format/d.py +++ b/scripts/tracetool/format/d.py @@ -33,6 +33,11 @@ def generate(events, backend, group): events = [e for e in events if "disable" not in e.properties] + # SystemTap's dtrace(1) warns about empty "provider qemu {}" but is happy + # with an empty file. Avoid the warning. + if not events: + return + out('/* This file is autogenerated by tracetool, do not edit. */' '', 'provider qemu {') diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh index a310a9072b..c3819d2b98 100755 --- a/scripts/update-linux-headers.sh +++ b/scripts/update-linux-headers.sh @@ -95,7 +95,7 @@ for arch in $ARCHLIST; do rm -rf "$output/linux-headers/asm-$arch" mkdir -p "$output/linux-headers/asm-$arch" - for header in kvm.h unistd.h bitsperlong.h; do + for header in kvm.h unistd.h bitsperlong.h mman.h; do cp "$tmpdir/include/asm/$header" "$output/linux-headers/asm-$arch" done @@ -139,13 +139,13 @@ done rm -rf "$output/linux-headers/linux" mkdir -p "$output/linux-headers/linux" for header in kvm.h vfio.h vfio_ccw.h vhost.h \ - psci.h psp-sev.h userfaultfd.h; do + psci.h psp-sev.h userfaultfd.h mman.h; do cp "$tmpdir/include/linux/$header" "$output/linux-headers/linux" done rm -rf "$output/linux-headers/asm-generic" mkdir -p "$output/linux-headers/asm-generic" -for header in unistd.h bitsperlong.h; do +for header in unistd.h bitsperlong.h mman-common.h mman.h hugetlb_encode.h; do cp "$tmpdir/include/asm-generic/$header" "$output/linux-headers/asm-generic" done diff --git a/scsi/qemu-pr-helper.c b/scsi/qemu-pr-helper.c index e7af637232..2541fbbd1b 100644 --- a/scsi/qemu-pr-helper.c +++ b/scsi/qemu-pr-helper.c @@ -895,6 +895,7 @@ int main(int argc, char **argv) signal(SIGPIPE, SIG_IGN); + error_init(argv[0]); module_call_init(MODULE_INIT_TRACE); module_call_init(MODULE_INIT_QOM); qemu_add_opts(&qemu_trace_opts); diff --git a/scsi/trace-events b/scsi/trace-events index f8a68b11eb..6dbfeae790 100644 --- a/scsi/trace-events +++ b/scsi/trace-events @@ -1,3 +1,5 @@ -# scsi/pr-manager.c +# See docs/devel/tracing.txt for syntax documentation. + +# pr-manager.c pr_manager_execute(int fd, int cmd, int sa) "fd=%d cmd=0x%02x service action=0x%02x" pr_manager_run(int fd, int cmd, int sa) "fd=%d cmd=0x%02x service action=0x%02x" diff --git a/slirp/COPYRIGHT b/slirp/COPYRIGHT index 1bc83d497e..ed49512dbc 100644 --- a/slirp/COPYRIGHT +++ b/slirp/COPYRIGHT @@ -1,8 +1,6 @@ Slirp was written by Danny Gasparovski. Copyright (c), 1995,1996 All Rights Reserved. -Slirp is maintained by Kelly Price <tygris+slirp@erols.com> - Slirp is free software; "free" as in you don't have to pay for it, and you are free to do whatever you want with it. I do not accept any donations, monetary or otherwise, for Slirp. Instead, I would ask you to pass this @@ -25,6 +23,9 @@ The copyright terms and conditions: 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution. + 3. Neither the name of the copyright holder nor the names of its + contributors may be used to endorse or promote products derived + from this software without specific prior written permission. THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY diff --git a/slirp/src/arp_table.c b/slirp/src/arp_table.c index 58eafdcfd8..9d7a59eb2c 100644 --- a/slirp/src/arp_table.c +++ b/slirp/src/arp_table.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: MIT */ /* * ARP table * diff --git a/slirp/src/bootp.c b/slirp/src/bootp.c index d396849a05..b208e3b216 100644 --- a/slirp/src/bootp.c +++ b/slirp/src/bootp.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: MIT */ /* * QEMU BOOTP/DHCP server * diff --git a/slirp/src/bootp.h b/slirp/src/bootp.h index 4043489835..d881ad620a 100644 --- a/slirp/src/bootp.h +++ b/slirp/src/bootp.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* bootp/dhcp defines */ #ifndef SLIRP_BOOTP_H diff --git a/slirp/src/cksum.c b/slirp/src/cksum.c index 25bfa67348..9599f6a280 100644 --- a/slirp/src/cksum.c +++ b/slirp/src/cksum.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1988, 1992, 1993 * The Regents of the University of California. All rights reserved. diff --git a/slirp/src/debug.h b/slirp/src/debug.h index 44d922df37..c95fd8ffd2 100644 --- a/slirp/src/debug.h +++ b/slirp/src/debug.h @@ -1,8 +1,6 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1995 Danny Gasparovski. - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ #ifndef DEBUG_H_ diff --git a/slirp/src/dhcpv6.c b/slirp/src/dhcpv6.c index e655c7d5b1..3c8f420912 100644 --- a/slirp/src/dhcpv6.c +++ b/slirp/src/dhcpv6.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * SLIRP stateless DHCPv6 * @@ -6,18 +7,35 @@ * * Copyright 2016 Thomas Huth, Red Hat Inc. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, - * or (at your option) any later version. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * 1. Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see <http://www.gnu.org/licenses/>. + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "slirp.h" diff --git a/slirp/src/dhcpv6.h b/slirp/src/dhcpv6.h index 3373f6cb89..dc26a93cff 100644 --- a/slirp/src/dhcpv6.h +++ b/slirp/src/dhcpv6.h @@ -1,10 +1,38 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Definitions and prototypes for SLIRP stateless DHCPv6 * * Copyright 2016 Thomas Huth, Red Hat Inc. * - * This work is licensed under the terms of the GNU GPL, version 2 - * or later. See the COPYING file in the top-level directory. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef SLIRP_DHCPV6_H #define SLIRP_DHCPV6_H diff --git a/slirp/src/dnssearch.c b/slirp/src/dnssearch.c index c459cece8d..12c488971e 100644 --- a/slirp/src/dnssearch.c +++ b/slirp/src/dnssearch.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: MIT */ /* * Domain search option for DHCP (RFC 3397) * diff --git a/slirp/src/if.c b/slirp/src/if.c index 1830cc396c..6eaac7292a 100644 --- a/slirp/src/if.c +++ b/slirp/src/if.c @@ -1,8 +1,6 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1995 Danny Gasparovski. - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ #include "slirp.h" diff --git a/slirp/src/if.h b/slirp/src/if.h index 69569c10df..b71c37d6ea 100644 --- a/slirp/src/if.h +++ b/slirp/src/if.h @@ -1,8 +1,6 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1995 Danny Gasparovski. - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ #ifndef IF_H diff --git a/slirp/src/ip.h b/slirp/src/ip.h index 73a4d2a3d2..1484de1176 100644 --- a/slirp/src/ip.h +++ b/slirp/src/ip.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1993 * The Regents of the University of California. All rights reserved. diff --git a/slirp/src/ip6.h b/slirp/src/ip6.h index 1b3364f960..33683c8e20 100644 --- a/slirp/src/ip6.h +++ b/slirp/src/ip6.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 2013 * Guillaume Subiron, Yann Bordenave, Serigne Modou Wagne. diff --git a/slirp/src/ip6_icmp.c b/slirp/src/ip6_icmp.c index c1e3d30470..5642457fdd 100644 --- a/slirp/src/ip6_icmp.c +++ b/slirp/src/ip6_icmp.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 2013 * Guillaume Subiron, Yann Bordenave, Serigne Modou Wagne. diff --git a/slirp/src/ip6_icmp.h b/slirp/src/ip6_icmp.h index e8ed753db5..d8d13e30fc 100644 --- a/slirp/src/ip6_icmp.h +++ b/slirp/src/ip6_icmp.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 2013 * Guillaume Subiron, Yann Bordenave, Serigne Modou Wagne. diff --git a/slirp/src/ip6_input.c b/slirp/src/ip6_input.c index 1b8c003c66..d9d2b7e9cd 100644 --- a/slirp/src/ip6_input.c +++ b/slirp/src/ip6_input.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 2013 * Guillaume Subiron, Yann Bordenave, Serigne Modou Wagne. diff --git a/slirp/src/ip6_output.c b/slirp/src/ip6_output.c index 19d1ae7748..b86110662c 100644 --- a/slirp/src/ip6_output.c +++ b/slirp/src/ip6_output.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 2013 * Guillaume Subiron, Yann Bordenave, Serigne Modou Wagne. diff --git a/slirp/src/ip_icmp.c b/slirp/src/ip_icmp.c index 120108f582..1aea18afa7 100644 --- a/slirp/src/ip_icmp.c +++ b/slirp/src/ip_icmp.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1988, 1993 * The Regents of the University of California. All rights reserved. diff --git a/slirp/src/ip_icmp.h b/slirp/src/ip_icmp.h index a4e5b8b265..05d85c59dd 100644 --- a/slirp/src/ip_icmp.h +++ b/slirp/src/ip_icmp.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1993 * The Regents of the University of California. All rights reserved. diff --git a/slirp/src/ip_input.c b/slirp/src/ip_input.c index e0b94b0e42..a714fecd58 100644 --- a/slirp/src/ip_input.c +++ b/slirp/src/ip_input.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1988, 1993 * The Regents of the University of California. All rights reserved. @@ -33,9 +34,6 @@ /* * Changes and additions relating to SLiRP are * Copyright (c) 1995 Danny Gasparovski. - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ #include "slirp.h" diff --git a/slirp/src/ip_output.c b/slirp/src/ip_output.c index f6ec141df5..8560197cf6 100644 --- a/slirp/src/ip_output.c +++ b/slirp/src/ip_output.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1988, 1990, 1993 * The Regents of the University of California. All rights reserved. @@ -33,9 +34,6 @@ /* * Changes and additions relating to SLiRP are * Copyright (c) 1995 Danny Gasparovski. - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ #include "slirp.h" diff --git a/slirp/src/libslirp.h b/slirp/src/libslirp.h index 2d13950065..3b28764bec 100644 --- a/slirp/src/libslirp.h +++ b/slirp/src/libslirp.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ #ifndef LIBSLIRP_H #define LIBSLIRP_H diff --git a/slirp/src/main.h b/slirp/src/main.h index f11d4572b7..3b3f883703 100644 --- a/slirp/src/main.h +++ b/slirp/src/main.h @@ -1,8 +1,6 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1995 Danny Gasparovski. - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ #ifndef SLIRP_MAIN_H diff --git a/slirp/src/mbuf.c b/slirp/src/mbuf.c index 521c02c967..800406ca9e 100644 --- a/slirp/src/mbuf.c +++ b/slirp/src/mbuf.c @@ -1,8 +1,6 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1995 Danny Gasparovski - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ /* diff --git a/slirp/src/mbuf.h b/slirp/src/mbuf.h index e2d443418a..732c85c63c 100644 --- a/slirp/src/mbuf.h +++ b/slirp/src/mbuf.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1988, 1993 * The Regents of the University of California. All rights reserved. diff --git a/slirp/src/misc.c b/slirp/src/misc.c index 937a418d4e..7c5db0e0aa 100644 --- a/slirp/src/misc.c +++ b/slirp/src/misc.c @@ -1,8 +1,6 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1995 Danny Gasparovski. - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ #include "slirp.h" diff --git a/slirp/src/misc.h b/slirp/src/misc.h index c2ceadb591..23b7490448 100644 --- a/slirp/src/misc.h +++ b/slirp/src/misc.h @@ -1,8 +1,6 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1995 Danny Gasparovski. - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ #ifndef MISC_H diff --git a/slirp/src/ncsi-pkt.h b/slirp/src/ncsi-pkt.h index ea07d1cd0f..4c0be39f6e 100644 --- a/slirp/src/ncsi-pkt.h +++ b/slirp/src/ncsi-pkt.h @@ -1,10 +1,36 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright Gavin Shan, IBM Corporation 2016. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef NCSI_PKT_H diff --git a/slirp/src/ncsi.c b/slirp/src/ncsi.c index 359f52c284..6d574ec5ec 100644 --- a/slirp/src/ncsi.c +++ b/slirp/src/ncsi.c @@ -1,10 +1,38 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * NC-SI (Network Controller Sideband Interface) "echo" model * * Copyright (C) 2016-2018 IBM Corp. * - * This code is licensed under the GPL version 2 or later. See the - * COPYING file in the top-level directory. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include "slirp.h" diff --git a/slirp/src/ndp_table.c b/slirp/src/ndp_table.c index 34ea4fdf1f..78324877e2 100644 --- a/slirp/src/ndp_table.c +++ b/slirp/src/ndp_table.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 2013 * Guillaume Subiron, Yann Bordenave, Serigne Modou Wagne. diff --git a/slirp/src/qtailq.h b/slirp/src/qtailq.h index a89b0c439a..d8aa0e19a4 100644 --- a/slirp/src/qtailq.h +++ b/slirp/src/qtailq.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* $NetBSD: queue.h,v 1.52 2009/04/20 09:56:08 mschuett Exp $ */ /* diff --git a/slirp/src/sbuf.c b/slirp/src/sbuf.c index 51a9f0cc7d..9c0b31b513 100644 --- a/slirp/src/sbuf.c +++ b/slirp/src/sbuf.c @@ -1,8 +1,6 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1995 Danny Gasparovski. - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ #include "slirp.h" diff --git a/slirp/src/sbuf.h b/slirp/src/sbuf.h index 1cb9a42834..337af1bbde 100644 --- a/slirp/src/sbuf.h +++ b/slirp/src/sbuf.h @@ -1,8 +1,6 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1995 Danny Gasparovski. - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ #ifndef SBUF_H diff --git a/slirp/src/slirp.c b/slirp/src/slirp.c index 18af670a0a..169c85b906 100644 --- a/slirp/src/slirp.c +++ b/slirp/src/slirp.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: MIT */ /* * libslirp glue * diff --git a/slirp/src/slirp.h b/slirp/src/slirp.h index 8068ba1d1e..39580934f3 100644 --- a/slirp/src/slirp.h +++ b/slirp/src/slirp.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ #ifndef SLIRP_H #define SLIRP_H diff --git a/slirp/src/socket.c b/slirp/src/socket.c index f2428a3ae8..bb752fdcae 100644 --- a/slirp/src/socket.c +++ b/slirp/src/socket.c @@ -1,8 +1,6 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1995 Danny Gasparovski. - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ #include "slirp.h" @@ -173,6 +171,7 @@ int soread(struct socket *so) { int n, nn; + size_t buf_len; struct sbuf *sb = &so->so_snd; struct iovec iov[2]; @@ -183,7 +182,8 @@ soread(struct socket *so) * No need to check if there's enough room to read. * soread wouldn't have been called if there weren't */ - sopreprbuf(so, iov, &n); + buf_len = sopreprbuf(so, iov, &n); + assert(buf_len != 0); nn = recv(so->s, iov[0].iov_base, iov[0].iov_len,0); if (nn <= 0) { @@ -259,6 +259,7 @@ int soreadbuf(struct socket *so, const char *buf, int size) * No need to check if there's enough room to read. * soread wouldn't have been called if there weren't */ + assert(size > 0); if (sopreprbuf(so, iov, &n) < size) goto err; diff --git a/slirp/src/socket.h b/slirp/src/socket.h index e4d12cd591..25403898cd 100644 --- a/slirp/src/socket.h +++ b/slirp/src/socket.h @@ -1,8 +1,6 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1995 Danny Gasparovski. - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ #ifndef SLIRP_SOCKET_H diff --git a/slirp/src/state.c b/slirp/src/state.c index f5dd80cdc8..09cea3590e 100644 --- a/slirp/src/state.c +++ b/slirp/src/state.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: MIT */ /* * libslirp * @@ -23,7 +24,6 @@ */ #include "slirp.h" #include "vmstate.h" -#include "state.h" #include "stream.h" static int slirp_tcp_post_load(void *opaque, int version) diff --git a/slirp/src/state.h b/slirp/src/state.h deleted file mode 100644 index e69de29bb2..0000000000 --- a/slirp/src/state.h +++ /dev/null diff --git a/slirp/src/stream.c b/slirp/src/stream.c index d114dde334..9c1764c0b7 100644 --- a/slirp/src/stream.c +++ b/slirp/src/stream.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: MIT */ /* * libslirp io streams * diff --git a/slirp/src/stream.h b/slirp/src/stream.h index 985334c043..08bb5b6610 100644 --- a/slirp/src/stream.h +++ b/slirp/src/stream.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ #ifndef STREAM_H_ #define STREAM_H_ diff --git a/slirp/src/tcp.h b/slirp/src/tcp.h index 47aaea6c5b..79d3251bb5 100644 --- a/slirp/src/tcp.h +++ b/slirp/src/tcp.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1993 * The Regents of the University of California. All rights reserved. diff --git a/slirp/src/tcp_input.c b/slirp/src/tcp_input.c index b10477fc57..50a1145ec9 100644 --- a/slirp/src/tcp_input.c +++ b/slirp/src/tcp_input.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1988, 1990, 1993, 1994 * The Regents of the University of California. All rights reserved. @@ -33,9 +34,6 @@ /* * Changes and additions relating to SLiRP * Copyright (c) 1995 Danny Gasparovski. - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ #include "slirp.h" diff --git a/slirp/src/tcp_output.c b/slirp/src/tcp_output.c index e9674df121..6bbaf6ca6f 100644 --- a/slirp/src/tcp_output.c +++ b/slirp/src/tcp_output.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1988, 1990, 1993 * The Regents of the University of California. All rights reserved. @@ -33,9 +34,6 @@ /* * Changes and additions relating to SLiRP * Copyright (c) 1995 Danny Gasparovski. - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ #include "slirp.h" diff --git a/slirp/src/tcp_subr.c b/slirp/src/tcp_subr.c index 1db59caa89..fde9207b0c 100644 --- a/slirp/src/tcp_subr.c +++ b/slirp/src/tcp_subr.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1988, 1990, 1993 * The Regents of the University of California. All rights reserved. @@ -33,9 +34,6 @@ /* * Changes and additions relating to SLiRP * Copyright (c) 1995 Danny Gasparovski. - * - * Please read the file COPYRIGHT for the - * terms and conditions of the copyright. */ #include "slirp.h" diff --git a/slirp/src/tcp_timer.c b/slirp/src/tcp_timer.c index 7be54570af..be361a1bb6 100644 --- a/slirp/src/tcp_timer.c +++ b/slirp/src/tcp_timer.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1988, 1990, 1993 * The Regents of the University of California. All rights reserved. diff --git a/slirp/src/tcp_timer.h b/slirp/src/tcp_timer.h index b25b3911d7..709f63987a 100644 --- a/slirp/src/tcp_timer.h +++ b/slirp/src/tcp_timer.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1993 * The Regents of the University of California. All rights reserved. diff --git a/slirp/src/tcp_var.h b/slirp/src/tcp_var.h index 27ef1a51cb..162be6e95e 100644 --- a/slirp/src/tcp_var.h +++ b/slirp/src/tcp_var.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1993, 1994 * The Regents of the University of California. All rights reserved. diff --git a/slirp/src/tcpip.h b/slirp/src/tcpip.h index 07dbf2c432..560a86417c 100644 --- a/slirp/src/tcpip.h +++ b/slirp/src/tcpip.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1993 * The Regents of the University of California. All rights reserved. diff --git a/slirp/src/tftp.c b/slirp/src/tftp.c index 2d8f978786..2071dca2a6 100644 --- a/slirp/src/tftp.c +++ b/slirp/src/tftp.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: MIT */ /* * tftp.c - a simple, read-only tftp server for qemu * diff --git a/slirp/src/tftp.h b/slirp/src/tftp.h index a4c4a64e64..3fe3b70205 100644 --- a/slirp/src/tftp.h +++ b/slirp/src/tftp.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* tftp defines */ #ifndef SLIRP_TFTP_H diff --git a/slirp/src/udp.c b/slirp/src/udp.c index fa9f4a08bd..27bb829c37 100644 --- a/slirp/src/udp.c +++ b/slirp/src/udp.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1988, 1990, 1993 * The Regents of the University of California. All rights reserved. diff --git a/slirp/src/udp.h b/slirp/src/udp.h index 3d29504caa..29c0297179 100644 --- a/slirp/src/udp.h +++ b/slirp/src/udp.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 1982, 1986, 1993 * The Regents of the University of California. All rights reserved. diff --git a/slirp/src/udp6.c b/slirp/src/udp6.c index be5cba1f54..bfcc7ec6fa 100644 --- a/slirp/src/udp6.c +++ b/slirp/src/udp6.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * Copyright (c) 2013 * Guillaume Subiron diff --git a/slirp/src/util.c b/slirp/src/util.c index 5ec2fa87ab..60bb200801 100644 --- a/slirp/src/util.c +++ b/slirp/src/util.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: MIT */ /* * util.c (mostly based on QEMU os-win32.c) * diff --git a/slirp/src/util.h b/slirp/src/util.h index e94ee4e7f1..01f1e0e068 100644 --- a/slirp/src/util.h +++ b/slirp/src/util.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: MIT */ /* * Copyright (c) 2003-2008 Fabrice Bellard * Copyright (c) 2010-2019 Red Hat, Inc. diff --git a/slirp/src/vmstate.c b/slirp/src/vmstate.c index 4d08b47c61..43bb3ebc6f 100644 --- a/slirp/src/vmstate.c +++ b/slirp/src/vmstate.c @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * VMState interpreter * @@ -6,8 +7,35 @@ * Authors: * Juan Quintela <quintela@redhat.com> * - * This work is licensed under the terms of the GNU GPL, version 2 or later. - * See the COPYING file in the top-level directory. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. */ #include <assert.h> #include <errno.h> diff --git a/slirp/src/vmstate.h b/slirp/src/vmstate.h index cfa7b8c825..44efea7b50 100644 --- a/slirp/src/vmstate.h +++ b/slirp/src/vmstate.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: BSD-3-Clause */ /* * QEMU migration/snapshot declarations * @@ -5,23 +6,35 @@ * * Original author: Juan Quintela <quintela@redhat.com> * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. + * 1. Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef VMSTATE_H_ #define VMSTATE_H_ diff --git a/stubs/error-printf.c b/stubs/error-printf.c index 99c6406668..1f9d3b3714 100644 --- a/stubs/error-printf.c +++ b/stubs/error-printf.c @@ -2,19 +2,22 @@ #include "qemu-common.h" #include "qemu/error-report.h" -void error_vprintf(const char *fmt, va_list ap) +int error_vprintf(const char *fmt, va_list ap) { + int ret; + if (g_test_initialized() && !g_test_subprocess() && getenv("QTEST_SILENT_ERRORS")) { char *msg = g_strdup_vprintf(fmt, ap); g_test_message("%s", msg); + ret = strlen(msg); g_free(msg); - } else { - vfprintf(stderr, fmt, ap); + return ret; } + return vfprintf(stderr, fmt, ap); } -void error_vprintf_unless_qmp(const char *fmt, va_list ap) +int error_vprintf_unless_qmp(const char *fmt, va_list ap) { - error_vprintf(fmt, ap); + return error_vprintf(fmt, ap); } diff --git a/stubs/monitor.c b/stubs/monitor.c index b57fe6c32f..b2ea975e40 100644 --- a/stubs/monitor.c +++ b/stubs/monitor.c @@ -6,6 +6,11 @@ __thread Monitor *cur_mon; +int monitor_vprintf(Monitor *mon, const char *fmt, va_list ap) +{ + abort(); +} + int monitor_get_fd(Monitor *mon, const char *name, Error **errp) { error_setg(errp, "only QEMU supports file descriptor passing"); diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 1fd95d6c0f..ad3588a44a 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" +#include "qemu/qemu-print.h" #include "cpu.h" #include "qemu-common.h" #include "exec/exec-all.h" @@ -74,23 +75,17 @@ static void alpha_cpu_realizefn(DeviceState *dev, Error **errp) static void alpha_cpu_list_entry(gpointer data, gpointer user_data) { ObjectClass *oc = data; - CPUListState *s = user_data; - (*s->cpu_fprintf)(s->file, " %s\n", - object_class_get_name(oc)); + qemu_printf(" %s\n", object_class_get_name(oc)); } -void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf) +void alpha_cpu_list(void) { - CPUListState s = { - .file = f, - .cpu_fprintf = cpu_fprintf, - }; GSList *list; list = object_class_get_list_sorted(TYPE_ALPHA_CPU, false); - (*cpu_fprintf)(f, "Available CPUs:\n"); - g_slist_foreach(list, alpha_cpu_list_entry, &s); + qemu_printf("Available CPUs:\n"); + g_slist_foreach(list, alpha_cpu_list_entry, NULL); g_slist_free(list); } diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index 7b50be785d..63bf3618ff 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -311,8 +311,7 @@ extern const struct VMStateDescription vmstate_alpha_cpu; void alpha_cpu_do_interrupt(CPUState *cpu); bool alpha_cpu_exec_interrupt(CPUState *cpu, int int_req); -void alpha_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags); +void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags); hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int alpha_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); @@ -470,7 +469,7 @@ void alpha_translate_init(void); #define ALPHA_CPU_TYPE_NAME(model) model ALPHA_CPU_TYPE_SUFFIX #define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU -void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf); +void alpha_cpu_list(void); /* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ diff --git a/target/alpha/helper.c b/target/alpha/helper.c index 57e2c212b3..7201576aae 100644 --- a/target/alpha/helper.c +++ b/target/alpha/helper.c @@ -23,6 +23,7 @@ #include "exec/exec-all.h" #include "fpu/softfloat.h" #include "exec/helper-proto.h" +#include "qemu/qemu-print.h" #define CONVERT_BIT(X, SRC, DST) \ @@ -426,8 +427,7 @@ bool alpha_cpu_exec_interrupt(CPUState *cs, int interrupt_request) return false; } -void alpha_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags) +void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags) { static const char *linux_reg_names[] = { "v0 ", "t0 ", "t1 ", "t2 ", "t3 ", "t4 ", "t5 ", "t6 ", @@ -439,24 +439,24 @@ void alpha_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, CPUAlphaState *env = &cpu->env; int i; - cpu_fprintf(f, " PC " TARGET_FMT_lx " PS %02x\n", - env->pc, extract32(env->flags, ENV_FLAG_PS_SHIFT, 8)); + qemu_fprintf(f, " PC " TARGET_FMT_lx " PS %02x\n", + env->pc, extract32(env->flags, ENV_FLAG_PS_SHIFT, 8)); for (i = 0; i < 31; i++) { - cpu_fprintf(f, "IR%02d %s " TARGET_FMT_lx "%c", i, - linux_reg_names[i], cpu_alpha_load_gr(env, i), - (i % 3) == 2 ? '\n' : ' '); + qemu_fprintf(f, "IR%02d %s " TARGET_FMT_lx "%c", i, + linux_reg_names[i], cpu_alpha_load_gr(env, i), + (i % 3) == 2 ? '\n' : ' '); } - cpu_fprintf(f, "lock_a " TARGET_FMT_lx " lock_v " TARGET_FMT_lx "\n", - env->lock_addr, env->lock_value); + qemu_fprintf(f, "lock_a " TARGET_FMT_lx " lock_v " TARGET_FMT_lx "\n", + env->lock_addr, env->lock_value); if (flags & CPU_DUMP_FPU) { for (i = 0; i < 31; i++) { - cpu_fprintf(f, "FIR%02d %016" PRIx64 "%c", i, env->fir[i], - (i % 3) == 2 ? '\n' : ' '); + qemu_fprintf(f, "FIR%02d %016" PRIx64 "%c", i, env->fir[i], + (i % 3) == 2 ? '\n' : ' '); } } - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } /* This should only be called from translate, via gen_excp. diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 9d8f9b3eea..2c9cccf6c1 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -3049,10 +3049,10 @@ static const TranslatorOps alpha_tr_ops = { .disas_log = alpha_tr_disas_log, }; -void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb) +void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns) { DisasContext dc; - translator_loop(&alpha_tr_ops, &dc.base, cpu, tb); + translator_loop(&alpha_tr_ops, &dc.base, cpu, tb, max_insns); } void restore_state_to_opc(CPUAlphaState *env, TranslationBlock *tb, diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c index b2b22d231e..8b5fd7bc6e 100644 --- a/target/arm/arm-semi.c +++ b/target/arm/arm-semi.c @@ -650,7 +650,7 @@ target_ulong do_arm_semihosting(CPUARMState *env) /* fall through -- invalid for A32/T32 */ default: fprintf(stderr, "qemu: Unsupported SemiHosting SWI 0x%02x\n", nr); - cpu_dump_state(cs, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, 0); abort(); } } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 96f0ff0ec7..a181fa8dc1 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -20,7 +20,6 @@ #include "qemu/osdep.h" #include "target/arm/idau.h" -#include "qemu/error-report.h" #include "qapi/error.h" #include "qapi/visitor.h" #include "cpu.h" @@ -282,6 +281,11 @@ static void arm_cpu_reset(CPUState *s) env->v7m.ccr[M_REG_S] |= R_V7M_CCR_UNALIGN_TRP_MASK; } + if (arm_feature(env, ARM_FEATURE_VFP)) { + env->v7m.fpccr[M_REG_NS] = R_V7M_FPCCR_ASPEN_MASK; + env->v7m.fpccr[M_REG_S] = R_V7M_FPCCR_ASPEN_MASK | + R_V7M_FPCCR_LSPEN_MASK | R_V7M_FPCCR_S_MASK; + } /* Unlike A/R profile, M profile defines the reset LR value */ env->regs[14] = 0xffffffff; @@ -1030,6 +1034,13 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) set_feature(env, ARM_FEATURE_THUMB_DSP); } + /* + * We rely on no XScale CPU having VFP so we can use the same bits in the + * TB flags field for VECSTRIDE and XSCALE_CPAR. + */ + assert(!(arm_feature(env, ARM_FEATURE_VFP) && + arm_feature(env, ARM_FEATURE_XSCALE))); + if (arm_feature(env, ARM_FEATURE_V7) && !arm_feature(env, ARM_FEATURE_M) && !arm_feature(env, ARM_FEATURE_PMSA)) { @@ -1109,6 +1120,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) #endif } else { cpu->id_aa64dfr0 &= ~0xf00; + cpu->id_dfr0 &= ~(0xf << 24); cpu->pmceid0 = 0; cpu->pmceid1 = 0; } @@ -1481,8 +1493,12 @@ static void cortex_m4_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_M); set_feature(&cpu->env, ARM_FEATURE_M_MAIN); set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP); + set_feature(&cpu->env, ARM_FEATURE_VFP4); cpu->midr = 0x410fc240; /* r0p0 */ cpu->pmsav7_dregion = 8; + cpu->isar.mvfr0 = 0x10110021; + cpu->isar.mvfr1 = 0x11000011; + cpu->isar.mvfr2 = 0x00000000; cpu->id_pfr0 = 0x00000030; cpu->id_pfr1 = 0x00000200; cpu->id_dfr0 = 0x00100000; @@ -1509,9 +1525,13 @@ static void cortex_m33_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_M_MAIN); set_feature(&cpu->env, ARM_FEATURE_M_SECURITY); set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP); + set_feature(&cpu->env, ARM_FEATURE_VFP4); cpu->midr = 0x410fd213; /* r0p3 */ cpu->pmsav7_dregion = 16; cpu->sau_sregion = 8; + cpu->isar.mvfr0 = 0x10110021; + cpu->isar.mvfr1 = 0x11000011; + cpu->isar.mvfr2 = 0x00000040; cpu->id_pfr0 = 0x00000030; cpu->id_pfr1 = 0x00000210; cpu->id_dfr0 = 0x00200000; @@ -1744,6 +1764,7 @@ static void cortex_a7_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); set_feature(&cpu->env, ARM_FEATURE_EL2); set_feature(&cpu->env, ARM_FEATURE_EL3); + set_feature(&cpu->env, ARM_FEATURE_PMU); cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A7; cpu->midr = 0x410fc075; cpu->reset_fpsid = 0x41023075; @@ -1789,6 +1810,7 @@ static void cortex_a15_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); set_feature(&cpu->env, ARM_FEATURE_EL2); set_feature(&cpu->env, ARM_FEATURE_EL3); + set_feature(&cpu->env, ARM_FEATURE_PMU); cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A15; cpu->midr = 0x412fc0f1; cpu->reset_fpsid = 0x410430f0; @@ -2025,6 +2047,11 @@ static void arm_max_initfn(Object *obj) t = FIELD_DP32(t, ID_ISAR6, SPECRES, 1); cpu->isar.id_isar6 = t; + t = cpu->isar.mvfr2; + t = FIELD_DP32(t, MVFR2, SIMDMISC, 3); /* SIMD MaxNum */ + t = FIELD_DP32(t, MVFR2, FPMISC, 4); /* FP MaxNum */ + cpu->isar.mvfr2 = t; + t = cpu->id_mmfr4; t = FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* AA32HPD */ cpu->id_mmfr4 = t; diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 5f23c62132..22bc6e00ab 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -57,6 +57,9 @@ #define EXCP_NOCP 17 /* v7M NOCP UsageFault */ #define EXCP_INVSTATE 18 /* v7M INVSTATE UsageFault */ #define EXCP_STKOF 19 /* v8M STKOF UsageFault */ +#define EXCP_LAZYFP 20 /* v7M fault during lazy FP stacking */ +#define EXCP_LSERR 21 /* v8M LSERR SecureFault */ +#define EXCP_UNALIGNED 22 /* v7M UNALIGNED UsageFault */ /* NB: add new EXCP_ defines to the array in arm_log_exception() too */ #define ARMV7M_EXCP_RESET 1 @@ -533,6 +536,11 @@ typedef struct CPUARMState { uint32_t scr[M_REG_NUM_BANKS]; uint32_t msplim[M_REG_NUM_BANKS]; uint32_t psplim[M_REG_NUM_BANKS]; + uint32_t fpcar[M_REG_NUM_BANKS]; + uint32_t fpccr[M_REG_NUM_BANKS]; + uint32_t fpdscr[M_REG_NUM_BANKS]; + uint32_t cpacr[M_REG_NUM_BANKS]; + uint32_t nsacr; } v7m; /* Information associated with an exception about to be taken: @@ -935,8 +943,7 @@ void arm_cpu_do_interrupt(CPUState *cpu); void arm_v7m_cpu_do_interrupt(CPUState *cpu); bool arm_cpu_exec_interrupt(CPUState *cpu, int int_req); -void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags); +void arm_cpu_dump_state(CPUState *cs, FILE *f, int flags); hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr, MemTxAttrs *attrs); @@ -993,17 +1000,6 @@ int cpu_arm_signal_handler(int host_signum, void *pinfo, void *puc); /** - * pmccntr_op_start/finish - * @env: CPUARMState - * - * Convert the counter in the PMCCNTR between its delta form (the typical mode - * when it's enabled) and the guest-visible value. These two calls must always - * surround any action which might affect the counter. - */ -void pmccntr_op_start(CPUARMState *env); -void pmccntr_op_finish(CPUARMState *env); - -/** * pmu_op_start/finish * @env: CPUARMState * @@ -1588,6 +1584,35 @@ FIELD(V7M_CSSELR, LEVEL, 1, 3) */ FIELD(V7M_CSSELR, INDEX, 0, 4) +/* v7M FPCCR bits */ +FIELD(V7M_FPCCR, LSPACT, 0, 1) +FIELD(V7M_FPCCR, USER, 1, 1) +FIELD(V7M_FPCCR, S, 2, 1) +FIELD(V7M_FPCCR, THREAD, 3, 1) +FIELD(V7M_FPCCR, HFRDY, 4, 1) +FIELD(V7M_FPCCR, MMRDY, 5, 1) +FIELD(V7M_FPCCR, BFRDY, 6, 1) +FIELD(V7M_FPCCR, SFRDY, 7, 1) +FIELD(V7M_FPCCR, MONRDY, 8, 1) +FIELD(V7M_FPCCR, SPLIMVIOL, 9, 1) +FIELD(V7M_FPCCR, UFRDY, 10, 1) +FIELD(V7M_FPCCR, RES0, 11, 15) +FIELD(V7M_FPCCR, TS, 26, 1) +FIELD(V7M_FPCCR, CLRONRETS, 27, 1) +FIELD(V7M_FPCCR, CLRONRET, 28, 1) +FIELD(V7M_FPCCR, LSPENS, 29, 1) +FIELD(V7M_FPCCR, LSPEN, 30, 1) +FIELD(V7M_FPCCR, ASPEN, 31, 1) +/* These bits are banked. Others are non-banked and live in the M_REG_S bank */ +#define R_V7M_FPCCR_BANKED_MASK \ + (R_V7M_FPCCR_LSPACT_MASK | \ + R_V7M_FPCCR_USER_MASK | \ + R_V7M_FPCCR_THREAD_MASK | \ + R_V7M_FPCCR_MMRDY_MASK | \ + R_V7M_FPCCR_SPLIMVIOL_MASK | \ + R_V7M_FPCCR_UFRDY_MASK | \ + R_V7M_FPCCR_ASPEN_MASK) + /* * System register ID fields. */ @@ -1947,7 +1972,7 @@ static inline bool access_secure_reg(CPUARMState *env) (arm_is_secure(_env) && !arm_el_is_aa64((_env), 3)), \ (_val)) -void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf); +void arm_cpu_list(void); uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx, uint32_t cur_el, bool secure); @@ -1987,6 +2012,18 @@ void armv7m_nvic_set_pending(void *opaque, int irq, bool secure); */ void armv7m_nvic_set_pending_derived(void *opaque, int irq, bool secure); /** + * armv7m_nvic_set_pending_lazyfp: mark this lazy FP exception as pending + * @opaque: the NVIC + * @irq: the exception number to mark pending + * @secure: false for non-banked exceptions or for the nonsecure + * version of a banked exception, true for the secure version of a banked + * exception. + * + * Similar to armv7m_nvic_set_pending(), but specifically for exceptions + * generated in the course of lazy stacking of FP registers. + */ +void armv7m_nvic_set_pending_lazyfp(void *opaque, int irq, bool secure); +/** * armv7m_nvic_get_pending_irq_info: return highest priority pending * exception, and whether it targets Secure state * @opaque: the NVIC @@ -2023,6 +2060,20 @@ void armv7m_nvic_acknowledge_irq(void *opaque); */ int armv7m_nvic_complete_irq(void *opaque, int irq, bool secure); /** + * armv7m_nvic_get_ready_status(void *opaque, int irq, bool secure) + * @opaque: the NVIC + * @irq: the exception number to mark pending + * @secure: false for non-banked exceptions or for the nonsecure + * version of a banked exception, true for the secure version of a banked + * exception. + * + * Return whether an exception is "ready", i.e. whether the exception is + * enabled and is configured at a priority which would allow it to + * interrupt the current execution priority. This controls whether the + * RDY bit for it in the FPCCR is set. + */ +bool armv7m_nvic_get_ready_status(void *opaque, int irq, bool secure); +/** * armv7m_nvic_raw_execution_priority: return the raw execution priority * @opaque: the NVIC * @@ -2875,6 +2926,13 @@ static inline int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx) } } +/* + * Return the MMU index for a v7M CPU with all relevant information + * manually specified. + */ +ARMMMUIdx arm_v7m_mmu_idx_all(CPUARMState *env, + bool secstate, bool priv, bool negpri); + /* Return the MMU index for a v7M CPU in the specified security and * privilege state. */ @@ -3102,18 +3160,27 @@ FIELD(TBFLAG_ANY, BE_DATA, 23, 1) FIELD(TBFLAG_A32, THUMB, 0, 1) FIELD(TBFLAG_A32, VECLEN, 1, 3) FIELD(TBFLAG_A32, VECSTRIDE, 4, 2) -FIELD(TBFLAG_A32, VFPEN, 7, 1) -FIELD(TBFLAG_A32, CONDEXEC, 8, 8) -FIELD(TBFLAG_A32, SCTLR_B, 16, 1) -/* We store the bottom two bits of the CPAR as TB flags and handle - * checks on the other bits at runtime +/* + * We store the bottom two bits of the CPAR as TB flags and handle + * checks on the other bits at runtime. This shares the same bits as + * VECSTRIDE, which is OK as no XScale CPU has VFP. */ -FIELD(TBFLAG_A32, XSCALE_CPAR, 17, 2) -/* Indicates whether cp register reads and writes by guest code should access +FIELD(TBFLAG_A32, XSCALE_CPAR, 4, 2) +/* + * Indicates whether cp register reads and writes by guest code should access * the secure or nonsecure bank of banked registers; note that this is not * the same thing as the current security state of the processor! */ -FIELD(TBFLAG_A32, NS, 19, 1) +FIELD(TBFLAG_A32, NS, 6, 1) +FIELD(TBFLAG_A32, VFPEN, 7, 1) +FIELD(TBFLAG_A32, CONDEXEC, 8, 8) +FIELD(TBFLAG_A32, SCTLR_B, 16, 1) +/* For M profile only, set if FPCCR.LSPACT is set */ +FIELD(TBFLAG_A32, LSPACT, 18, 1) +/* For M profile only, set if we must create a new FP context */ +FIELD(TBFLAG_A32, NEW_FP_CTXT_NEEDED, 19, 1) +/* For M profile only, set if FPCCR.S does not match current security state */ +FIELD(TBFLAG_A32, FPCCR_S_WRONG, 20, 1) /* For M profile only, Handler (ie not Thread) mode */ FIELD(TBFLAG_A32, HANDLER, 21, 1) /* For M profile only, whether we should generate stack-limit checks */ diff --git a/target/arm/helper.c b/target/arm/helper.c index 2607d39ad1..81a92ab491 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -10,6 +10,7 @@ #include "sysemu/sysemu.h" #include "qemu/bitops.h" #include "qemu/crc32c.h" +#include "qemu/qemu-print.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" #include "arm_ldst.h" @@ -1259,6 +1260,10 @@ static bool pmu_counter_enabled(CPUARMState *env, uint8_t counter) int el = arm_current_el(env); uint8_t hpmn = env->cp15.mdcr_el2 & MDCR_HPMN; + if (!arm_feature(env, ARM_FEATURE_PMU)) { + return false; + } + if (!arm_feature(env, ARM_FEATURE_EL2) || (counter < hpmn || counter == 31)) { e = env->cp15.c9_pmcr & PMCRE; @@ -1333,7 +1338,7 @@ static void pmu_update_irq(CPUARMState *env) * etc. can be done logically. This is essentially a no-op if the counter is * not enabled at the time of the call. */ -void pmccntr_op_start(CPUARMState *env) +static void pmccntr_op_start(CPUARMState *env) { uint64_t cycles = cycles_get_count(env); @@ -1363,7 +1368,7 @@ void pmccntr_op_start(CPUARMState *env) * guest-visible count. A call to pmccntr_op_finish should follow every call to * pmccntr_op_start. */ -void pmccntr_op_finish(CPUARMState *env) +static void pmccntr_op_finish(CPUARMState *env) { if (pmu_counter_enabled(env, 31)) { #ifndef CONFIG_USER_ONLY @@ -2665,7 +2670,7 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = { /* per-timer control */ { .name = "CNTP_CTL", .cp = 15, .crn = 14, .crm = 2, .opc1 = 0, .opc2 = 1, .secure = ARM_CP_SECSTATE_NS, - .type = ARM_CP_IO | ARM_CP_ALIAS, .access = PL1_RW | PL0_R, + .type = ARM_CP_IO | ARM_CP_ALIAS, .access = PL0_RW, .accessfn = gt_ptimer_access, .fieldoffset = offsetoflow32(CPUARMState, cp15.c14_timer[GTIMER_PHYS].ctl), @@ -2674,7 +2679,7 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = { { .name = "CNTP_CTL_S", .cp = 15, .crn = 14, .crm = 2, .opc1 = 0, .opc2 = 1, .secure = ARM_CP_SECSTATE_S, - .type = ARM_CP_IO | ARM_CP_ALIAS, .access = PL1_RW | PL0_R, + .type = ARM_CP_IO | ARM_CP_ALIAS, .access = PL0_RW, .accessfn = gt_ptimer_access, .fieldoffset = offsetoflow32(CPUARMState, cp15.c14_timer[GTIMER_SEC].ctl), @@ -2682,14 +2687,14 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = { }, { .name = "CNTP_CTL_EL0", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 2, .opc2 = 1, - .type = ARM_CP_IO, .access = PL1_RW | PL0_R, + .type = ARM_CP_IO, .access = PL0_RW, .accessfn = gt_ptimer_access, .fieldoffset = offsetof(CPUARMState, cp15.c14_timer[GTIMER_PHYS].ctl), .resetvalue = 0, .writefn = gt_phys_ctl_write, .raw_writefn = raw_write, }, { .name = "CNTV_CTL", .cp = 15, .crn = 14, .crm = 3, .opc1 = 0, .opc2 = 1, - .type = ARM_CP_IO | ARM_CP_ALIAS, .access = PL1_RW | PL0_R, + .type = ARM_CP_IO | ARM_CP_ALIAS, .access = PL0_RW, .accessfn = gt_vtimer_access, .fieldoffset = offsetoflow32(CPUARMState, cp15.c14_timer[GTIMER_VIRT].ctl), @@ -2697,7 +2702,7 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = { }, { .name = "CNTV_CTL_EL0", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 3, .opc2 = 1, - .type = ARM_CP_IO, .access = PL1_RW | PL0_R, + .type = ARM_CP_IO, .access = PL0_RW, .accessfn = gt_vtimer_access, .fieldoffset = offsetof(CPUARMState, cp15.c14_timer[GTIMER_VIRT].ctl), .resetvalue = 0, @@ -2706,31 +2711,31 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = { /* TimerValue views: a 32 bit downcounting view of the underlying state */ { .name = "CNTP_TVAL", .cp = 15, .crn = 14, .crm = 2, .opc1 = 0, .opc2 = 0, .secure = ARM_CP_SECSTATE_NS, - .type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL1_RW | PL0_R, + .type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL0_RW, .accessfn = gt_ptimer_access, .readfn = gt_phys_tval_read, .writefn = gt_phys_tval_write, }, { .name = "CNTP_TVAL_S", .cp = 15, .crn = 14, .crm = 2, .opc1 = 0, .opc2 = 0, .secure = ARM_CP_SECSTATE_S, - .type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL1_RW | PL0_R, + .type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL0_RW, .accessfn = gt_ptimer_access, .readfn = gt_sec_tval_read, .writefn = gt_sec_tval_write, }, { .name = "CNTP_TVAL_EL0", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 2, .opc2 = 0, - .type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL1_RW | PL0_R, + .type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL0_RW, .accessfn = gt_ptimer_access, .resetfn = gt_phys_timer_reset, .readfn = gt_phys_tval_read, .writefn = gt_phys_tval_write, }, { .name = "CNTV_TVAL", .cp = 15, .crn = 14, .crm = 3, .opc1 = 0, .opc2 = 0, - .type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL1_RW | PL0_R, + .type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL0_RW, .accessfn = gt_vtimer_access, .readfn = gt_virt_tval_read, .writefn = gt_virt_tval_write, }, { .name = "CNTV_TVAL_EL0", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 3, .opc2 = 0, - .type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL1_RW | PL0_R, + .type = ARM_CP_NO_RAW | ARM_CP_IO, .access = PL0_RW, .accessfn = gt_vtimer_access, .resetfn = gt_virt_timer_reset, .readfn = gt_virt_tval_read, .writefn = gt_virt_tval_write, }, @@ -2758,7 +2763,7 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = { /* Comparison value, indicating when the timer goes off */ { .name = "CNTP_CVAL", .cp = 15, .crm = 14, .opc1 = 2, .secure = ARM_CP_SECSTATE_NS, - .access = PL1_RW | PL0_R, + .access = PL0_RW, .type = ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, .fieldoffset = offsetof(CPUARMState, cp15.c14_timer[GTIMER_PHYS].cval), .accessfn = gt_ptimer_access, @@ -2766,7 +2771,7 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = { }, { .name = "CNTP_CVAL_S", .cp = 15, .crm = 14, .opc1 = 2, .secure = ARM_CP_SECSTATE_S, - .access = PL1_RW | PL0_R, + .access = PL0_RW, .type = ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, .fieldoffset = offsetof(CPUARMState, cp15.c14_timer[GTIMER_SEC].cval), .accessfn = gt_ptimer_access, @@ -2774,14 +2779,14 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = { }, { .name = "CNTP_CVAL_EL0", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 2, .opc2 = 2, - .access = PL1_RW | PL0_R, + .access = PL0_RW, .type = ARM_CP_IO, .fieldoffset = offsetof(CPUARMState, cp15.c14_timer[GTIMER_PHYS].cval), .resetvalue = 0, .accessfn = gt_ptimer_access, .writefn = gt_phys_cval_write, .raw_writefn = raw_write, }, { .name = "CNTV_CVAL", .cp = 15, .crm = 14, .opc1 = 3, - .access = PL1_RW | PL0_R, + .access = PL0_RW, .type = ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, .fieldoffset = offsetof(CPUARMState, cp15.c14_timer[GTIMER_VIRT].cval), .accessfn = gt_vtimer_access, @@ -2789,7 +2794,7 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = { }, { .name = "CNTV_CVAL_EL0", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 3, .crn = 14, .crm = 3, .opc2 = 2, - .access = PL1_RW | PL0_R, + .access = PL0_RW, .type = ARM_CP_IO, .fieldoffset = offsetof(CPUARMState, cp15.c14_timer[GTIMER_VIRT].cval), .resetvalue = 0, .accessfn = gt_vtimer_access, @@ -6720,29 +6725,23 @@ static gint arm_cpu_list_compare(gconstpointer a, gconstpointer b) static void arm_cpu_list_entry(gpointer data, gpointer user_data) { ObjectClass *oc = data; - CPUListState *s = user_data; const char *typename; char *name; typename = object_class_get_name(oc); name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_ARM_CPU)); - (*s->cpu_fprintf)(s->file, " %s\n", - name); + qemu_printf(" %s\n", name); g_free(name); } -void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf) +void arm_cpu_list(void) { - CPUListState s = { - .file = f, - .cpu_fprintf = cpu_fprintf, - }; GSList *list; list = object_class_get_list(TYPE_ARM_CPU, false); list = g_slist_sort(list, arm_cpu_list_compare); - (*cpu_fprintf)(f, "Available CPUs:\n"); - g_slist_foreach(list, arm_cpu_list_entry, &s); + qemu_printf("Available CPUs:\n"); + g_slist_foreach(list, arm_cpu_list_entry, NULL); g_slist_free(list); } @@ -7379,6 +7378,24 @@ void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest) g_assert_not_reached(); } +void HELPER(v7m_preserve_fp_state)(CPUARMState *env) +{ + /* translate.c should never generate calls here in user-only mode */ + g_assert_not_reached(); +} + +void HELPER(v7m_vlstm)(CPUARMState *env, uint32_t fptr) +{ + /* translate.c should never generate calls here in user-only mode */ + g_assert_not_reached(); +} + +void HELPER(v7m_vlldm)(CPUARMState *env, uint32_t fptr) +{ + /* translate.c should never generate calls here in user-only mode */ + g_assert_not_reached(); +} + uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t addr, uint32_t op) { /* The TT instructions can be used by unprivileged code, but in @@ -7557,8 +7574,37 @@ uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx, return target_el; } +/* + * Return true if the v7M CPACR permits access to the FPU for the specified + * security state and privilege level. + */ +static bool v7m_cpacr_pass(CPUARMState *env, bool is_secure, bool is_priv) +{ + switch (extract32(env->v7m.cpacr[is_secure], 20, 2)) { + case 0: + case 2: /* UNPREDICTABLE: we treat like 0 */ + return false; + case 1: + return is_priv; + case 3: + return true; + default: + g_assert_not_reached(); + } +} + +/* + * What kind of stack write are we doing? This affects how exceptions + * generated during the stacking are treated. + */ +typedef enum StackingMode { + STACK_NORMAL, + STACK_IGNFAULTS, + STACK_LAZYFP, +} StackingMode; + static bool v7m_stack_write(ARMCPU *cpu, uint32_t addr, uint32_t value, - ARMMMUIdx mmu_idx, bool ignfault) + ARMMMUIdx mmu_idx, StackingMode mode) { CPUState *cs = CPU(cpu); CPUARMState *env = &cpu->env; @@ -7576,15 +7622,31 @@ static bool v7m_stack_write(ARMCPU *cpu, uint32_t addr, uint32_t value, &attrs, &prot, &page_size, &fi, NULL)) { /* MPU/SAU lookup failed */ if (fi.type == ARMFault_QEMU_SFault) { - qemu_log_mask(CPU_LOG_INT, - "...SecureFault with SFSR.AUVIOL during stacking\n"); - env->v7m.sfsr |= R_V7M_SFSR_AUVIOL_MASK | R_V7M_SFSR_SFARVALID_MASK; + if (mode == STACK_LAZYFP) { + qemu_log_mask(CPU_LOG_INT, + "...SecureFault with SFSR.LSPERR " + "during lazy stacking\n"); + env->v7m.sfsr |= R_V7M_SFSR_LSPERR_MASK; + } else { + qemu_log_mask(CPU_LOG_INT, + "...SecureFault with SFSR.AUVIOL " + "during stacking\n"); + env->v7m.sfsr |= R_V7M_SFSR_AUVIOL_MASK; + } + env->v7m.sfsr |= R_V7M_SFSR_SFARVALID_MASK; env->v7m.sfar = addr; exc = ARMV7M_EXCP_SECURE; exc_secure = false; } else { - qemu_log_mask(CPU_LOG_INT, "...MemManageFault with CFSR.MSTKERR\n"); - env->v7m.cfsr[secure] |= R_V7M_CFSR_MSTKERR_MASK; + if (mode == STACK_LAZYFP) { + qemu_log_mask(CPU_LOG_INT, + "...MemManageFault with CFSR.MLSPERR\n"); + env->v7m.cfsr[secure] |= R_V7M_CFSR_MLSPERR_MASK; + } else { + qemu_log_mask(CPU_LOG_INT, + "...MemManageFault with CFSR.MSTKERR\n"); + env->v7m.cfsr[secure] |= R_V7M_CFSR_MSTKERR_MASK; + } exc = ARMV7M_EXCP_MEM; exc_secure = secure; } @@ -7594,8 +7656,13 @@ static bool v7m_stack_write(ARMCPU *cpu, uint32_t addr, uint32_t value, attrs, &txres); if (txres != MEMTX_OK) { /* BusFault trying to write the data */ - qemu_log_mask(CPU_LOG_INT, "...BusFault with BFSR.STKERR\n"); - env->v7m.cfsr[M_REG_NS] |= R_V7M_CFSR_STKERR_MASK; + if (mode == STACK_LAZYFP) { + qemu_log_mask(CPU_LOG_INT, "...BusFault with BFSR.LSPERR\n"); + env->v7m.cfsr[M_REG_NS] |= R_V7M_CFSR_LSPERR_MASK; + } else { + qemu_log_mask(CPU_LOG_INT, "...BusFault with BFSR.STKERR\n"); + env->v7m.cfsr[M_REG_NS] |= R_V7M_CFSR_STKERR_MASK; + } exc = ARMV7M_EXCP_BUS; exc_secure = false; goto pend_fault; @@ -7610,11 +7677,19 @@ pend_fault: * later if we have two derived exceptions. * The only case when we must not pend the exception but instead * throw it away is if we are doing the push of the callee registers - * and we've already generated a derived exception. Even in this - * case we will still update the fault status registers. + * and we've already generated a derived exception (this is indicated + * by the caller passing STACK_IGNFAULTS). Even in this case we will + * still update the fault status registers. */ - if (!ignfault) { + switch (mode) { + case STACK_NORMAL: armv7m_nvic_set_pending_derived(env->nvic, exc, exc_secure); + break; + case STACK_LAZYFP: + armv7m_nvic_set_pending_lazyfp(env->nvic, exc, exc_secure); + break; + case STACK_IGNFAULTS: + break; } return false; } @@ -7680,6 +7755,97 @@ pend_fault: return false; } +void HELPER(v7m_preserve_fp_state)(CPUARMState *env) +{ + /* + * Preserve FP state (because LSPACT was set and we are about + * to execute an FP instruction). This corresponds to the + * PreserveFPState() pseudocode. + * We may throw an exception if the stacking fails. + */ + ARMCPU *cpu = arm_env_get_cpu(env); + bool is_secure = env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_S_MASK; + bool negpri = !(env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_HFRDY_MASK); + bool is_priv = !(env->v7m.fpccr[is_secure] & R_V7M_FPCCR_USER_MASK); + bool splimviol = env->v7m.fpccr[is_secure] & R_V7M_FPCCR_SPLIMVIOL_MASK; + uint32_t fpcar = env->v7m.fpcar[is_secure]; + bool stacked_ok = true; + bool ts = is_secure && (env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_TS_MASK); + bool take_exception; + + /* Take the iothread lock as we are going to touch the NVIC */ + qemu_mutex_lock_iothread(); + + /* Check the background context had access to the FPU */ + if (!v7m_cpacr_pass(env, is_secure, is_priv)) { + armv7m_nvic_set_pending_lazyfp(env->nvic, ARMV7M_EXCP_USAGE, is_secure); + env->v7m.cfsr[is_secure] |= R_V7M_CFSR_NOCP_MASK; + stacked_ok = false; + } else if (!is_secure && !extract32(env->v7m.nsacr, 10, 1)) { + armv7m_nvic_set_pending_lazyfp(env->nvic, ARMV7M_EXCP_USAGE, M_REG_S); + env->v7m.cfsr[M_REG_S] |= R_V7M_CFSR_NOCP_MASK; + stacked_ok = false; + } + + if (!splimviol && stacked_ok) { + /* We only stack if the stack limit wasn't violated */ + int i; + ARMMMUIdx mmu_idx; + + mmu_idx = arm_v7m_mmu_idx_all(env, is_secure, is_priv, negpri); + for (i = 0; i < (ts ? 32 : 16); i += 2) { + uint64_t dn = *aa32_vfp_dreg(env, i / 2); + uint32_t faddr = fpcar + 4 * i; + uint32_t slo = extract64(dn, 0, 32); + uint32_t shi = extract64(dn, 32, 32); + + if (i >= 16) { + faddr += 8; /* skip the slot for the FPSCR */ + } + stacked_ok = stacked_ok && + v7m_stack_write(cpu, faddr, slo, mmu_idx, STACK_LAZYFP) && + v7m_stack_write(cpu, faddr + 4, shi, mmu_idx, STACK_LAZYFP); + } + + stacked_ok = stacked_ok && + v7m_stack_write(cpu, fpcar + 0x40, + vfp_get_fpscr(env), mmu_idx, STACK_LAZYFP); + } + + /* + * We definitely pended an exception, but it's possible that it + * might not be able to be taken now. If its priority permits us + * to take it now, then we must not update the LSPACT or FP regs, + * but instead jump out to take the exception immediately. + * If it's just pending and won't be taken until the current + * handler exits, then we do update LSPACT and the FP regs. + */ + take_exception = !stacked_ok && + armv7m_nvic_can_take_pending_exception(env->nvic); + + qemu_mutex_unlock_iothread(); + + if (take_exception) { + raise_exception_ra(env, EXCP_LAZYFP, 0, 1, GETPC()); + } + + env->v7m.fpccr[is_secure] &= ~R_V7M_FPCCR_LSPACT_MASK; + + if (ts) { + /* Clear s0 to s31 and the FPSCR */ + int i; + + for (i = 0; i < 32; i += 2) { + *aa32_vfp_dreg(env, i / 2) = 0; + } + vfp_set_fpscr(env, 0); + } + /* + * Otherwise s0 to s15 and FPSCR are UNKNOWN; we choose to leave them + * unchanged. + */ +} + /* Write to v7M CONTROL.SPSEL bit for the specified security bank. * This may change the current stack pointer between Main and Process * stack pointers if it is done for the CONTROL register for the current @@ -7801,6 +7967,9 @@ void HELPER(v7m_bxns)(CPUARMState *env, uint32_t dest) /* translate.c should have made BXNS UNDEF unless we're secure */ assert(env->v7m.secure); + if (!(dest & 1)) { + env->v7m.control[M_REG_S] &= ~R_V7M_CONTROL_SFPA_MASK; + } switch_v7m_security_state(env, dest & 1); env->thumb = 1; env->regs[15] = dest & ~1; @@ -7858,6 +8027,7 @@ void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest) */ write_v7m_exception(env, 1); } + env->v7m.control[M_REG_S] &= ~R_V7M_CONTROL_SFPA_MASK; switch_v7m_security_state(env, 0); env->thumb = 1; env->regs[15] = dest; @@ -7957,6 +8127,21 @@ load_fail: return false; } +static uint32_t v7m_integrity_sig(CPUARMState *env, uint32_t lr) +{ + /* + * Return the integrity signature value for the callee-saves + * stack frame section. @lr is the exception return payload/LR value + * whose FType bit forms bit 0 of the signature if FP is present. + */ + uint32_t sig = 0xfefa125a; + + if (!arm_feature(env, ARM_FEATURE_VFP) || (lr & R_V7M_EXCRET_FTYPE_MASK)) { + sig |= 1; + } + return sig; +} + static bool v7m_push_callee_stack(ARMCPU *cpu, uint32_t lr, bool dotailchain, bool ignore_faults) { @@ -7971,6 +8156,8 @@ static bool v7m_push_callee_stack(ARMCPU *cpu, uint32_t lr, bool dotailchain, bool stacked_ok; uint32_t limit; bool want_psp; + uint32_t sig; + StackingMode smode = ignore_faults ? STACK_IGNFAULTS : STACK_NORMAL; if (dotailchain) { bool mode = lr & R_V7M_EXCRET_MODE_MASK; @@ -8012,24 +8199,17 @@ static bool v7m_push_callee_stack(ARMCPU *cpu, uint32_t lr, bool dotailchain, /* Write as much of the stack frame as we can. A write failure may * cause us to pend a derived exception. */ + sig = v7m_integrity_sig(env, lr); stacked_ok = - v7m_stack_write(cpu, frameptr, 0xfefa125b, mmu_idx, ignore_faults) && - v7m_stack_write(cpu, frameptr + 0x8, env->regs[4], mmu_idx, - ignore_faults) && - v7m_stack_write(cpu, frameptr + 0xc, env->regs[5], mmu_idx, - ignore_faults) && - v7m_stack_write(cpu, frameptr + 0x10, env->regs[6], mmu_idx, - ignore_faults) && - v7m_stack_write(cpu, frameptr + 0x14, env->regs[7], mmu_idx, - ignore_faults) && - v7m_stack_write(cpu, frameptr + 0x18, env->regs[8], mmu_idx, - ignore_faults) && - v7m_stack_write(cpu, frameptr + 0x1c, env->regs[9], mmu_idx, - ignore_faults) && - v7m_stack_write(cpu, frameptr + 0x20, env->regs[10], mmu_idx, - ignore_faults) && - v7m_stack_write(cpu, frameptr + 0x24, env->regs[11], mmu_idx, - ignore_faults); + v7m_stack_write(cpu, frameptr, sig, mmu_idx, smode) && + v7m_stack_write(cpu, frameptr + 0x8, env->regs[4], mmu_idx, smode) && + v7m_stack_write(cpu, frameptr + 0xc, env->regs[5], mmu_idx, smode) && + v7m_stack_write(cpu, frameptr + 0x10, env->regs[6], mmu_idx, smode) && + v7m_stack_write(cpu, frameptr + 0x14, env->regs[7], mmu_idx, smode) && + v7m_stack_write(cpu, frameptr + 0x18, env->regs[8], mmu_idx, smode) && + v7m_stack_write(cpu, frameptr + 0x1c, env->regs[9], mmu_idx, smode) && + v7m_stack_write(cpu, frameptr + 0x20, env->regs[10], mmu_idx, smode) && + v7m_stack_write(cpu, frameptr + 0x24, env->regs[11], mmu_idx, smode); /* Update SP regardless of whether any of the stack accesses failed. */ *frame_sp_p = frameptr; @@ -8054,6 +8234,14 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain, qemu_log_mask(CPU_LOG_INT, "...taking pending %s exception %d\n", targets_secure ? "secure" : "nonsecure", exc); + if (dotailchain) { + /* Sanitize LR FType and PREFIX bits */ + if (!arm_feature(env, ARM_FEATURE_VFP)) { + lr |= R_V7M_EXCRET_FTYPE_MASK; + } + lr = deposit32(lr, 24, 8, 0xff); + } + if (arm_feature(env, ARM_FEATURE_V8)) { if (arm_feature(env, ARM_FEATURE_M_SECURITY) && (lr & R_V7M_EXCRET_S_MASK)) { @@ -8149,6 +8337,9 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain, switch_v7m_security_state(env, targets_secure); write_v7m_control_spsel(env, 0); arm_clear_exclusive(env); + /* Clear SFPA and FPCA (has no effect if no FPU) */ + env->v7m.control[M_REG_S] &= + ~(R_V7M_CONTROL_FPCA_MASK | R_V7M_CONTROL_SFPA_MASK); /* Clear IT bits */ env->condexec_bits = 0; env->regs[14] = lr; @@ -8156,6 +8347,187 @@ static void v7m_exception_taken(ARMCPU *cpu, uint32_t lr, bool dotailchain, env->thumb = addr & 1; } +static void v7m_update_fpccr(CPUARMState *env, uint32_t frameptr, + bool apply_splim) +{ + /* + * Like the pseudocode UpdateFPCCR: save state in FPCAR and FPCCR + * that we will need later in order to do lazy FP reg stacking. + */ + bool is_secure = env->v7m.secure; + void *nvic = env->nvic; + /* + * Some bits are unbanked and live always in fpccr[M_REG_S]; some bits + * are banked and we want to update the bit in the bank for the + * current security state; and in one case we want to specifically + * update the NS banked version of a bit even if we are secure. + */ + uint32_t *fpccr_s = &env->v7m.fpccr[M_REG_S]; + uint32_t *fpccr_ns = &env->v7m.fpccr[M_REG_NS]; + uint32_t *fpccr = &env->v7m.fpccr[is_secure]; + bool hfrdy, bfrdy, mmrdy, ns_ufrdy, s_ufrdy, sfrdy, monrdy; + + env->v7m.fpcar[is_secure] = frameptr & ~0x7; + + if (apply_splim && arm_feature(env, ARM_FEATURE_V8)) { + bool splimviol; + uint32_t splim = v7m_sp_limit(env); + bool ign = armv7m_nvic_neg_prio_requested(nvic, is_secure) && + (env->v7m.ccr[is_secure] & R_V7M_CCR_STKOFHFNMIGN_MASK); + + splimviol = !ign && frameptr < splim; + *fpccr = FIELD_DP32(*fpccr, V7M_FPCCR, SPLIMVIOL, splimviol); + } + + *fpccr = FIELD_DP32(*fpccr, V7M_FPCCR, LSPACT, 1); + + *fpccr_s = FIELD_DP32(*fpccr_s, V7M_FPCCR, S, is_secure); + + *fpccr = FIELD_DP32(*fpccr, V7M_FPCCR, USER, arm_current_el(env) == 0); + + *fpccr = FIELD_DP32(*fpccr, V7M_FPCCR, THREAD, + !arm_v7m_is_handler_mode(env)); + + hfrdy = armv7m_nvic_get_ready_status(nvic, ARMV7M_EXCP_HARD, false); + *fpccr_s = FIELD_DP32(*fpccr_s, V7M_FPCCR, HFRDY, hfrdy); + + bfrdy = armv7m_nvic_get_ready_status(nvic, ARMV7M_EXCP_BUS, false); + *fpccr_s = FIELD_DP32(*fpccr_s, V7M_FPCCR, BFRDY, bfrdy); + + mmrdy = armv7m_nvic_get_ready_status(nvic, ARMV7M_EXCP_MEM, is_secure); + *fpccr = FIELD_DP32(*fpccr, V7M_FPCCR, MMRDY, mmrdy); + + ns_ufrdy = armv7m_nvic_get_ready_status(nvic, ARMV7M_EXCP_USAGE, false); + *fpccr_ns = FIELD_DP32(*fpccr_ns, V7M_FPCCR, UFRDY, ns_ufrdy); + + monrdy = armv7m_nvic_get_ready_status(nvic, ARMV7M_EXCP_DEBUG, false); + *fpccr_s = FIELD_DP32(*fpccr_s, V7M_FPCCR, MONRDY, monrdy); + + if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { + s_ufrdy = armv7m_nvic_get_ready_status(nvic, ARMV7M_EXCP_USAGE, true); + *fpccr_s = FIELD_DP32(*fpccr_s, V7M_FPCCR, UFRDY, s_ufrdy); + + sfrdy = armv7m_nvic_get_ready_status(nvic, ARMV7M_EXCP_SECURE, false); + *fpccr_s = FIELD_DP32(*fpccr_s, V7M_FPCCR, SFRDY, sfrdy); + } +} + +void HELPER(v7m_vlstm)(CPUARMState *env, uint32_t fptr) +{ + /* fptr is the value of Rn, the frame pointer we store the FP regs to */ + bool s = env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_S_MASK; + bool lspact = env->v7m.fpccr[s] & R_V7M_FPCCR_LSPACT_MASK; + + assert(env->v7m.secure); + + if (!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_SFPA_MASK)) { + return; + } + + /* Check access to the coprocessor is permitted */ + if (!v7m_cpacr_pass(env, true, arm_current_el(env) != 0)) { + raise_exception_ra(env, EXCP_NOCP, 0, 1, GETPC()); + } + + if (lspact) { + /* LSPACT should not be active when there is active FP state */ + raise_exception_ra(env, EXCP_LSERR, 0, 1, GETPC()); + } + + if (fptr & 7) { + raise_exception_ra(env, EXCP_UNALIGNED, 0, 1, GETPC()); + } + + /* + * Note that we do not use v7m_stack_write() here, because the + * accesses should not set the FSR bits for stacking errors if they + * fail. (In pseudocode terms, they are AccType_NORMAL, not AccType_STACK + * or AccType_LAZYFP). Faults in cpu_stl_data() will throw exceptions + * and longjmp out. + */ + if (!(env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_LSPEN_MASK)) { + bool ts = env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_TS_MASK; + int i; + + for (i = 0; i < (ts ? 32 : 16); i += 2) { + uint64_t dn = *aa32_vfp_dreg(env, i / 2); + uint32_t faddr = fptr + 4 * i; + uint32_t slo = extract64(dn, 0, 32); + uint32_t shi = extract64(dn, 32, 32); + + if (i >= 16) { + faddr += 8; /* skip the slot for the FPSCR */ + } + cpu_stl_data(env, faddr, slo); + cpu_stl_data(env, faddr + 4, shi); + } + cpu_stl_data(env, fptr + 0x40, vfp_get_fpscr(env)); + + /* + * If TS is 0 then s0 to s15 and FPSCR are UNKNOWN; we choose to + * leave them unchanged, matching our choice in v7m_preserve_fp_state. + */ + if (ts) { + for (i = 0; i < 32; i += 2) { + *aa32_vfp_dreg(env, i / 2) = 0; + } + vfp_set_fpscr(env, 0); + } + } else { + v7m_update_fpccr(env, fptr, false); + } + + env->v7m.control[M_REG_S] &= ~R_V7M_CONTROL_FPCA_MASK; +} + +void HELPER(v7m_vlldm)(CPUARMState *env, uint32_t fptr) +{ + /* fptr is the value of Rn, the frame pointer we load the FP regs from */ + assert(env->v7m.secure); + + if (!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_SFPA_MASK)) { + return; + } + + /* Check access to the coprocessor is permitted */ + if (!v7m_cpacr_pass(env, true, arm_current_el(env) != 0)) { + raise_exception_ra(env, EXCP_NOCP, 0, 1, GETPC()); + } + + if (env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_LSPACT_MASK) { + /* State in FP is still valid */ + env->v7m.fpccr[M_REG_S] &= ~R_V7M_FPCCR_LSPACT_MASK; + } else { + bool ts = env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_TS_MASK; + int i; + uint32_t fpscr; + + if (fptr & 7) { + raise_exception_ra(env, EXCP_UNALIGNED, 0, 1, GETPC()); + } + + for (i = 0; i < (ts ? 32 : 16); i += 2) { + uint32_t slo, shi; + uint64_t dn; + uint32_t faddr = fptr + 4 * i; + + if (i >= 16) { + faddr += 8; /* skip the slot for the FPSCR */ + } + + slo = cpu_ldl_data(env, faddr); + shi = cpu_ldl_data(env, faddr + 4); + + dn = (uint64_t) shi << 32 | slo; + *aa32_vfp_dreg(env, i / 2) = dn; + } + fpscr = cpu_ldl_data(env, fptr + 0x40); + vfp_set_fpscr(env, fpscr); + } + + env->v7m.control[M_REG_S] |= R_V7M_CONTROL_FPCA_MASK; +} + static bool v7m_push_stack(ARMCPU *cpu) { /* Do the "set up stack frame" part of exception entry, @@ -8164,11 +8536,25 @@ static bool v7m_push_stack(ARMCPU *cpu) * should ignore further stack faults trying to process * that derived exception.) */ - bool stacked_ok; + bool stacked_ok = true, limitviol = false; CPUARMState *env = &cpu->env; uint32_t xpsr = xpsr_read(env); uint32_t frameptr = env->regs[13]; ARMMMUIdx mmu_idx = arm_mmu_idx(env); + uint32_t framesize; + bool nsacr_cp10 = extract32(env->v7m.nsacr, 10, 1); + + if ((env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK) && + (env->v7m.secure || nsacr_cp10)) { + if (env->v7m.secure && + env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_TS_MASK) { + framesize = 0xa8; + } else { + framesize = 0x68; + } + } else { + framesize = 0x20; + } /* Align stack pointer if the guest wants that */ if ((frameptr & 4) && @@ -8177,7 +8563,13 @@ static bool v7m_push_stack(ARMCPU *cpu) xpsr |= XPSR_SPREALIGN; } - frameptr -= 0x20; + xpsr &= ~XPSR_SFPA; + if (env->v7m.secure && + (env->v7m.control[M_REG_S] & R_V7M_CONTROL_SFPA_MASK)) { + xpsr |= XPSR_SFPA; + } + + frameptr -= framesize; if (arm_feature(env, ARM_FEATURE_V8)) { uint32_t limit = v7m_sp_limit(env); @@ -8195,7 +8587,14 @@ static bool v7m_push_stack(ARMCPU *cpu) armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure); env->regs[13] = limit; - return true; + /* + * We won't try to perform any further memory accesses but + * we must continue through the following code to check for + * permission faults during FPU state preservation, and we + * must update FPCCR if lazy stacking is enabled. + */ + limitviol = true; + stacked_ok = false; } } @@ -8204,18 +8603,99 @@ static bool v7m_push_stack(ARMCPU *cpu) * (which may be taken in preference to the one we started with * if it has higher priority). */ - stacked_ok = - v7m_stack_write(cpu, frameptr, env->regs[0], mmu_idx, false) && - v7m_stack_write(cpu, frameptr + 4, env->regs[1], mmu_idx, false) && - v7m_stack_write(cpu, frameptr + 8, env->regs[2], mmu_idx, false) && - v7m_stack_write(cpu, frameptr + 12, env->regs[3], mmu_idx, false) && - v7m_stack_write(cpu, frameptr + 16, env->regs[12], mmu_idx, false) && - v7m_stack_write(cpu, frameptr + 20, env->regs[14], mmu_idx, false) && - v7m_stack_write(cpu, frameptr + 24, env->regs[15], mmu_idx, false) && - v7m_stack_write(cpu, frameptr + 28, xpsr, mmu_idx, false); + stacked_ok = stacked_ok && + v7m_stack_write(cpu, frameptr, env->regs[0], mmu_idx, STACK_NORMAL) && + v7m_stack_write(cpu, frameptr + 4, env->regs[1], + mmu_idx, STACK_NORMAL) && + v7m_stack_write(cpu, frameptr + 8, env->regs[2], + mmu_idx, STACK_NORMAL) && + v7m_stack_write(cpu, frameptr + 12, env->regs[3], + mmu_idx, STACK_NORMAL) && + v7m_stack_write(cpu, frameptr + 16, env->regs[12], + mmu_idx, STACK_NORMAL) && + v7m_stack_write(cpu, frameptr + 20, env->regs[14], + mmu_idx, STACK_NORMAL) && + v7m_stack_write(cpu, frameptr + 24, env->regs[15], + mmu_idx, STACK_NORMAL) && + v7m_stack_write(cpu, frameptr + 28, xpsr, mmu_idx, STACK_NORMAL); + + if (env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK) { + /* FPU is active, try to save its registers */ + bool fpccr_s = env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_S_MASK; + bool lspact = env->v7m.fpccr[fpccr_s] & R_V7M_FPCCR_LSPACT_MASK; + + if (lspact && arm_feature(env, ARM_FEATURE_M_SECURITY)) { + qemu_log_mask(CPU_LOG_INT, + "...SecureFault because LSPACT and FPCA both set\n"); + env->v7m.sfsr |= R_V7M_SFSR_LSERR_MASK; + armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false); + } else if (!env->v7m.secure && !nsacr_cp10) { + qemu_log_mask(CPU_LOG_INT, + "...Secure UsageFault with CFSR.NOCP because " + "NSACR.CP10 prevents stacking FP regs\n"); + armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, M_REG_S); + env->v7m.cfsr[M_REG_S] |= R_V7M_CFSR_NOCP_MASK; + } else { + if (!(env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_LSPEN_MASK)) { + /* Lazy stacking disabled, save registers now */ + int i; + bool cpacr_pass = v7m_cpacr_pass(env, env->v7m.secure, + arm_current_el(env) != 0); - /* Update SP regardless of whether any of the stack accesses failed. */ - env->regs[13] = frameptr; + if (stacked_ok && !cpacr_pass) { + /* + * Take UsageFault if CPACR forbids access. The pseudocode + * here does a full CheckCPEnabled() but we know the NSACR + * check can never fail as we have already handled that. + */ + qemu_log_mask(CPU_LOG_INT, + "...UsageFault with CFSR.NOCP because " + "CPACR.CP10 prevents stacking FP regs\n"); + armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, + env->v7m.secure); + env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_NOCP_MASK; + stacked_ok = false; + } + + for (i = 0; i < ((framesize == 0xa8) ? 32 : 16); i += 2) { + uint64_t dn = *aa32_vfp_dreg(env, i / 2); + uint32_t faddr = frameptr + 0x20 + 4 * i; + uint32_t slo = extract64(dn, 0, 32); + uint32_t shi = extract64(dn, 32, 32); + + if (i >= 16) { + faddr += 8; /* skip the slot for the FPSCR */ + } + stacked_ok = stacked_ok && + v7m_stack_write(cpu, faddr, slo, + mmu_idx, STACK_NORMAL) && + v7m_stack_write(cpu, faddr + 4, shi, + mmu_idx, STACK_NORMAL); + } + stacked_ok = stacked_ok && + v7m_stack_write(cpu, frameptr + 0x60, + vfp_get_fpscr(env), mmu_idx, STACK_NORMAL); + if (cpacr_pass) { + for (i = 0; i < ((framesize == 0xa8) ? 32 : 16); i += 2) { + *aa32_vfp_dreg(env, i / 2) = 0; + } + vfp_set_fpscr(env, 0); + } + } else { + /* Lazy stacking enabled, save necessary info to stack later */ + v7m_update_fpccr(env, frameptr + 0x20, true); + } + } + } + + /* + * If we broke a stack limit then SP was already updated earlier; + * otherwise we update SP regardless of whether any of the stack + * accesses failed or we took some other kind of fault. + */ + if (!limitviol) { + env->regs[13] = frameptr; + } return !stacked_ok; } @@ -8232,6 +8712,8 @@ static void do_v7m_exception_exit(ARMCPU *cpu) bool rettobase = false; bool exc_secure = false; bool return_to_secure; + bool ftype; + bool restore_s16_s31; /* If we're not in Handler mode then jumps to magic exception-exit * addresses don't have magic behaviour. However for the v8M @@ -8269,6 +8751,16 @@ static void do_v7m_exception_exit(ARMCPU *cpu) excret); } + ftype = excret & R_V7M_EXCRET_FTYPE_MASK; + + if (!arm_feature(env, ARM_FEATURE_VFP) && !ftype) { + qemu_log_mask(LOG_GUEST_ERROR, "M profile: zero FTYPE in exception " + "exit PC value 0x%" PRIx32 " is UNPREDICTABLE " + "if FPU not present\n", + excret); + ftype = true; + } + if (arm_feature(env, ARM_FEATURE_M_SECURITY)) { /* EXC_RETURN.ES validation check (R_SMFL). We must do this before * we pick which FAULTMASK to clear. @@ -8369,6 +8861,30 @@ static void do_v7m_exception_exit(ARMCPU *cpu) */ write_v7m_control_spsel_for_secstate(env, return_to_sp_process, exc_secure); + /* + * Clear scratch FP values left in caller saved registers; this + * must happen before any kind of tail chaining. + */ + if ((env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_CLRONRET_MASK) && + (env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK)) { + if (env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_LSPACT_MASK) { + env->v7m.sfsr |= R_V7M_SFSR_LSERR_MASK; + armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false); + qemu_log_mask(CPU_LOG_INT, "...taking SecureFault on existing " + "stackframe: error during lazy state deactivation\n"); + v7m_exception_taken(cpu, excret, true, false); + return; + } else { + /* Clear s0..s15 and FPSCR */ + int i; + + for (i = 0; i < 16; i += 2) { + *aa32_vfp_dreg(env, i / 2) = 0; + } + vfp_set_fpscr(env, 0); + } + } + if (sfault) { env->v7m.sfsr |= R_V7M_SFSR_INVER_MASK; armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false); @@ -8442,12 +8958,11 @@ static void do_v7m_exception_exit(ARMCPU *cpu) if (return_to_secure && ((excret & R_V7M_EXCRET_ES_MASK) == 0 || (excret & R_V7M_EXCRET_DCRS_MASK) == 0)) { - uint32_t expected_sig = 0xfefa125b; uint32_t actual_sig; pop_ok = v7m_stack_read(cpu, &actual_sig, frameptr, mmu_idx); - if (pop_ok && expected_sig != actual_sig) { + if (pop_ok && v7m_integrity_sig(env, excret) != actual_sig) { /* Take a SecureFault on the current stack */ env->v7m.sfsr |= R_V7M_SFSR_INVIS_MASK; armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false); @@ -8531,8 +9046,105 @@ static void do_v7m_exception_exit(ARMCPU *cpu) } } + if (!ftype) { + /* FP present and we need to handle it */ + if (!return_to_secure && + (env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_LSPACT_MASK)) { + armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false); + env->v7m.sfsr |= R_V7M_SFSR_LSERR_MASK; + qemu_log_mask(CPU_LOG_INT, + "...taking SecureFault on existing stackframe: " + "Secure LSPACT set but exception return is " + "not to secure state\n"); + v7m_exception_taken(cpu, excret, true, false); + return; + } + + restore_s16_s31 = return_to_secure && + (env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_TS_MASK); + + if (env->v7m.fpccr[return_to_secure] & R_V7M_FPCCR_LSPACT_MASK) { + /* State in FPU is still valid, just clear LSPACT */ + env->v7m.fpccr[return_to_secure] &= ~R_V7M_FPCCR_LSPACT_MASK; + } else { + int i; + uint32_t fpscr; + bool cpacr_pass, nsacr_pass; + + cpacr_pass = v7m_cpacr_pass(env, return_to_secure, + return_to_priv); + nsacr_pass = return_to_secure || + extract32(env->v7m.nsacr, 10, 1); + + if (!cpacr_pass) { + armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, + return_to_secure); + env->v7m.cfsr[return_to_secure] |= R_V7M_CFSR_NOCP_MASK; + qemu_log_mask(CPU_LOG_INT, + "...taking UsageFault on existing " + "stackframe: CPACR.CP10 prevents unstacking " + "FP regs\n"); + v7m_exception_taken(cpu, excret, true, false); + return; + } else if (!nsacr_pass) { + armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, true); + env->v7m.cfsr[M_REG_S] |= R_V7M_CFSR_INVPC_MASK; + qemu_log_mask(CPU_LOG_INT, + "...taking Secure UsageFault on existing " + "stackframe: NSACR.CP10 prevents unstacking " + "FP regs\n"); + v7m_exception_taken(cpu, excret, true, false); + return; + } + + for (i = 0; i < (restore_s16_s31 ? 32 : 16); i += 2) { + uint32_t slo, shi; + uint64_t dn; + uint32_t faddr = frameptr + 0x20 + 4 * i; + + if (i >= 16) { + faddr += 8; /* Skip the slot for the FPSCR */ + } + + pop_ok = pop_ok && + v7m_stack_read(cpu, &slo, faddr, mmu_idx) && + v7m_stack_read(cpu, &shi, faddr + 4, mmu_idx); + + if (!pop_ok) { + break; + } + + dn = (uint64_t)shi << 32 | slo; + *aa32_vfp_dreg(env, i / 2) = dn; + } + pop_ok = pop_ok && + v7m_stack_read(cpu, &fpscr, frameptr + 0x60, mmu_idx); + if (pop_ok) { + vfp_set_fpscr(env, fpscr); + } + if (!pop_ok) { + /* + * These regs are 0 if security extension present; + * otherwise merely UNKNOWN. We zero always. + */ + for (i = 0; i < (restore_s16_s31 ? 32 : 16); i += 2) { + *aa32_vfp_dreg(env, i / 2) = 0; + } + vfp_set_fpscr(env, 0); + } + } + } + env->v7m.control[M_REG_S] = FIELD_DP32(env->v7m.control[M_REG_S], + V7M_CONTROL, FPCA, !ftype); + /* Commit to consuming the stack frame */ frameptr += 0x20; + if (!ftype) { + frameptr += 0x48; + if (restore_s16_s31) { + frameptr += 0x40; + } + } /* Undo stack alignment (the SPREALIGN bit indicates that the original * pre-exception SP was not 8-aligned and we added a padding word to * align it, so we undo this by ORing in the bit that increases it @@ -8545,7 +9157,14 @@ static void do_v7m_exception_exit(ARMCPU *cpu) *frame_sp_p = frameptr; } /* This xpsr_write() will invalidate frame_sp_p as it may switch stack */ - xpsr_write(env, xpsr, ~XPSR_SPREALIGN); + xpsr_write(env, xpsr, ~(XPSR_SPREALIGN | XPSR_SFPA)); + + if (env->v7m.secure) { + bool sfpa = xpsr & XPSR_SFPA; + + env->v7m.control[M_REG_S] = FIELD_DP32(env->v7m.control[M_REG_S], + V7M_CONTROL, SFPA, sfpa); + } /* The restored xPSR exception field will be zero if we're * resuming in Thread mode. If that doesn't match what the @@ -8668,6 +9287,9 @@ static void arm_log_exception(int idx) [EXCP_NOCP] = "v7M NOCP UsageFault", [EXCP_INVSTATE] = "v7M INVSTATE UsageFault", [EXCP_STKOF] = "v8M STKOF UsageFault", + [EXCP_LAZYFP] = "v7M exception during lazy FP stacking", + [EXCP_LSERR] = "v8M LSERR UsageFault", + [EXCP_UNALIGNED] = "v7M UNALIGNED UsageFault", }; if (idx >= 0 && idx < ARRAY_SIZE(excnames)) { @@ -8786,6 +9408,7 @@ static bool v7m_handle_execute_nsc(ARMCPU *cpu) qemu_log_mask(CPU_LOG_INT, "...really an SG instruction at 0x%08" PRIx32 ", executing it\n", env->regs[15]); env->regs[14] &= ~1; + env->v7m.control[M_REG_S] &= ~R_V7M_CONTROL_SFPA_MASK; switch_v7m_security_state(env, true); xpsr_write(env, 0, XPSR_IT); env->regs[15] += 4; @@ -8816,9 +9439,23 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_UNDEFINSTR_MASK; break; case EXCP_NOCP: - armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure); - env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_NOCP_MASK; + { + /* + * NOCP might be directed to something other than the current + * security state if this fault is because of NSACR; we indicate + * the target security state using exception.target_el. + */ + int target_secstate; + + if (env->exception.target_el == 3) { + target_secstate = M_REG_S; + } else { + target_secstate = env->v7m.secure; + } + armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, target_secstate); + env->v7m.cfsr[target_secstate] |= R_V7M_CFSR_NOCP_MASK; break; + } case EXCP_INVSTATE: armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure); env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_INVSTATE_MASK; @@ -8827,6 +9464,14 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure); env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_STKOF_MASK; break; + case EXCP_LSERR: + armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false); + env->v7m.sfsr |= R_V7M_SFSR_LSERR_MASK; + break; + case EXCP_UNALIGNED: + armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure); + env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_UNALIGNED_MASK; + break; case EXCP_SWI: /* The PC already points to the next instruction. */ armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SVC, env->v7m.secure); @@ -8946,6 +9591,12 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) return; } break; + case EXCP_LAZYFP: + /* + * We already pended the specific exception in the NVIC in the + * v7m_preserve_fp_state() helper function. + */ + break; default: cpu_abort(cs, "Unhandled exception 0x%x\n", cs->exception_index); return; /* Never happens. Keep compiler happy. */ @@ -8953,8 +9604,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) if (arm_feature(env, ARM_FEATURE_V8)) { lr = R_V7M_EXCRET_RES1_MASK | - R_V7M_EXCRET_DCRS_MASK | - R_V7M_EXCRET_FTYPE_MASK; + R_V7M_EXCRET_DCRS_MASK; /* The S bit indicates whether we should return to Secure * or NonSecure (ie our current state). * The ES bit indicates whether we're taking this exception @@ -8969,6 +9619,9 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) if (env->v7m.secure) { lr |= R_V7M_EXCRET_S_MASK; } + if (!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK)) { + lr |= R_V7M_EXCRET_FTYPE_MASK; + } } else { lr = R_V7M_EXCRET_RES1_MASK | R_V7M_EXCRET_S_MASK | @@ -11994,7 +12647,14 @@ uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg) return xpsr_read(env) & mask; break; case 20: /* CONTROL */ - return env->v7m.control[env->v7m.secure]; + { + uint32_t value = env->v7m.control[env->v7m.secure]; + if (!env->v7m.secure) { + /* SFPA is RAZ/WI from NS; FPCA is stored in the M_REG_S bank */ + value |= env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK; + } + return value; + } case 0x94: /* CONTROL_NS */ /* We have to handle this here because unprivileged Secure code * can read the NS CONTROL register. @@ -12002,7 +12662,8 @@ uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg) if (!env->v7m.secure) { return 0; } - return env->v7m.control[M_REG_NS]; + return env->v7m.control[M_REG_NS] | + (env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK); } if (el == 0) { @@ -12108,9 +12769,13 @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t maskreg, uint32_t val) */ uint32_t mask = extract32(maskreg, 8, 4); uint32_t reg = extract32(maskreg, 0, 8); + int cur_el = arm_current_el(env); - if (arm_current_el(env) == 0 && reg > 7) { - /* only xPSR sub-fields may be written by unprivileged */ + if (cur_el == 0 && reg > 7 && reg != 20) { + /* + * only xPSR sub-fields and CONTROL.SFPA may be written by + * unprivileged code + */ return; } @@ -12169,6 +12834,15 @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t maskreg, uint32_t val) env->v7m.control[M_REG_NS] &= ~R_V7M_CONTROL_NPRIV_MASK; env->v7m.control[M_REG_NS] |= val & R_V7M_CONTROL_NPRIV_MASK; } + /* + * SFPA is RAZ/WI from NS. FPCA is RO if NSACR.CP10 == 0, + * RES0 if the FPU is not present, and is stored in the S bank + */ + if (arm_feature(env, ARM_FEATURE_VFP) && + extract32(env->v7m.nsacr, 10, 1)) { + env->v7m.control[M_REG_S] &= ~R_V7M_CONTROL_FPCA_MASK; + env->v7m.control[M_REG_S] |= val & R_V7M_CONTROL_FPCA_MASK; + } return; case 0x98: /* SP_NS */ { @@ -12271,21 +12945,41 @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t maskreg, uint32_t val) env->v7m.faultmask[env->v7m.secure] = val & 1; break; case 20: /* CONTROL */ - /* Writing to the SPSEL bit only has an effect if we are in + /* + * Writing to the SPSEL bit only has an effect if we are in * thread mode; other bits can be updated by any privileged code. * write_v7m_control_spsel() deals with updating the SPSEL bit in * env->v7m.control, so we only need update the others. * For v7M, we must just ignore explicit writes to SPSEL in handler * mode; for v8M the write is permitted but will have no effect. + * All these bits are writes-ignored from non-privileged code, + * except for SFPA. */ - if (arm_feature(env, ARM_FEATURE_V8) || - !arm_v7m_is_handler_mode(env)) { + if (cur_el > 0 && (arm_feature(env, ARM_FEATURE_V8) || + !arm_v7m_is_handler_mode(env))) { write_v7m_control_spsel(env, (val & R_V7M_CONTROL_SPSEL_MASK) != 0); } - if (arm_feature(env, ARM_FEATURE_M_MAIN)) { + if (cur_el > 0 && arm_feature(env, ARM_FEATURE_M_MAIN)) { env->v7m.control[env->v7m.secure] &= ~R_V7M_CONTROL_NPRIV_MASK; env->v7m.control[env->v7m.secure] |= val & R_V7M_CONTROL_NPRIV_MASK; } + if (arm_feature(env, ARM_FEATURE_VFP)) { + /* + * SFPA is RAZ/WI from NS or if no FPU. + * FPCA is RO if NSACR.CP10 == 0, RES0 if the FPU is not present. + * Both are stored in the S bank. + */ + if (env->v7m.secure) { + env->v7m.control[M_REG_S] &= ~R_V7M_CONTROL_SFPA_MASK; + env->v7m.control[M_REG_S] |= val & R_V7M_CONTROL_SFPA_MASK; + } + if (cur_el > 0 && + (env->v7m.secure || !arm_feature(env, ARM_FEATURE_M_SECURITY) || + extract32(env->v7m.nsacr, 10, 1))) { + env->v7m.control[M_REG_S] &= ~R_V7M_CONTROL_FPCA_MASK; + env->v7m.control[M_REG_S] |= val & R_V7M_CONTROL_FPCA_MASK; + } + } break; default: bad_reg: @@ -12752,6 +13446,22 @@ int fp_exception_el(CPUARMState *env, int cur_el) return 0; } + if (arm_feature(env, ARM_FEATURE_M)) { + /* CPACR can cause a NOCP UsageFault taken to current security state */ + if (!v7m_cpacr_pass(env, env->v7m.secure, cur_el != 0)) { + return 1; + } + + if (arm_feature(env, ARM_FEATURE_M_SECURITY) && !env->v7m.secure) { + if (!extract32(env->v7m.nsacr, 10, 1)) { + /* FP insns cause a NOCP UsageFault taken to Secure */ + return 3; + } + } + + return 0; + } + /* The CPACR controls traps to EL1, or PL1 if we're 32 bit: * 0, 2 : trap EL0 and EL1/PL1 accesses * 1 : trap only EL0 accesses @@ -12802,8 +13512,8 @@ int fp_exception_el(CPUARMState *env, int cur_el) return 0; } -ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env, - bool secstate, bool priv) +ARMMMUIdx arm_v7m_mmu_idx_all(CPUARMState *env, + bool secstate, bool priv, bool negpri) { ARMMMUIdx mmu_idx = ARM_MMU_IDX_M; @@ -12811,7 +13521,7 @@ ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env, mmu_idx |= ARM_MMU_IDX_M_PRIV; } - if (armv7m_nvic_neg_prio_requested(env->nvic, secstate)) { + if (negpri) { mmu_idx |= ARM_MMU_IDX_M_NEGPRI; } @@ -12822,6 +13532,14 @@ ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env, return mmu_idx; } +ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env, + bool secstate, bool priv) +{ + bool negpri = armv7m_nvic_neg_prio_requested(env->nvic, secstate); + + return arm_v7m_mmu_idx_all(env, secstate, priv, negpri); +} + /* Return the MMU index for a v7M CPU in the specified security state */ ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate) { @@ -12939,10 +13657,14 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, flags = FIELD_DP32(flags, TBFLAG_A32, SCTLR_B, arm_sctlr_b(env)); flags = FIELD_DP32(flags, TBFLAG_A32, NS, !access_secure_reg(env)); if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30) - || arm_el_is_aa64(env, 1)) { + || arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) { flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1); } - flags = FIELD_DP32(flags, TBFLAG_A32, XSCALE_CPAR, env->cp15.c15_cpar); + /* Note that XSCALE_CPAR shares bits with VECSTRIDE */ + if (arm_feature(env, ARM_FEATURE_XSCALE)) { + flags = FIELD_DP32(flags, TBFLAG_A32, + XSCALE_CPAR, env->cp15.c15_cpar); + } } flags = FIELD_DP32(flags, TBFLAG_ANY, MMUIDX, arm_to_core_mmu_idx(mmu_idx)); @@ -12985,6 +13707,32 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, flags = FIELD_DP32(flags, TBFLAG_A32, STACKCHECK, 1); } + if (arm_feature(env, ARM_FEATURE_M_SECURITY) && + FIELD_EX32(env->v7m.fpccr[M_REG_S], V7M_FPCCR, S) != env->v7m.secure) { + flags = FIELD_DP32(flags, TBFLAG_A32, FPCCR_S_WRONG, 1); + } + + if (arm_feature(env, ARM_FEATURE_M) && + (env->v7m.fpccr[env->v7m.secure] & R_V7M_FPCCR_ASPEN_MASK) && + (!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK) || + (env->v7m.secure && + !(env->v7m.control[M_REG_S] & R_V7M_CONTROL_SFPA_MASK)))) { + /* + * ASPEN is set, but FPCA/SFPA indicate that there is no active + * FP context; we must create a new FP context before executing + * any FP insn. + */ + flags = FIELD_DP32(flags, TBFLAG_A32, NEW_FP_CTXT_NEEDED, 1); + } + + if (arm_feature(env, ARM_FEATURE_M)) { + bool is_secure = env->v7m.fpccr[M_REG_S] & R_V7M_FPCCR_S_MASK; + + if (env->v7m.fpccr[is_secure] & R_V7M_FPCCR_LSPACT_MASK) { + flags = FIELD_DP32(flags, TBFLAG_A32, LSPACT, 1); + } + } + *pflags = flags; *cs_base = 0; } diff --git a/target/arm/helper.h b/target/arm/helper.h index a09566f795..50cb036378 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -69,6 +69,11 @@ DEF_HELPER_2(v7m_blxns, void, env, i32) DEF_HELPER_3(v7m_tt, i32, env, i32, i32) +DEF_HELPER_1(v7m_preserve_fp_state, void, env) + +DEF_HELPER_2(v7m_vlstm, void, env, i32) +DEF_HELPER_2(v7m_vlldm, void, env, i32) + DEF_HELPER_2(v8m_stackcheck, void, env, i32) DEF_HELPER_4(access_check_cp_reg, void, env, ptr, i32, i32) diff --git a/target/arm/machine.c b/target/arm/machine.c index b292549614..09567d4fc6 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -305,6 +305,21 @@ static const VMStateDescription vmstate_m_v8m = { } }; +static const VMStateDescription vmstate_m_fp = { + .name = "cpu/m/fp", + .version_id = 1, + .minimum_version_id = 1, + .needed = vfp_needed, + .fields = (VMStateField[]) { + VMSTATE_UINT32_ARRAY(env.v7m.fpcar, ARMCPU, M_REG_NUM_BANKS), + VMSTATE_UINT32_ARRAY(env.v7m.fpccr, ARMCPU, M_REG_NUM_BANKS), + VMSTATE_UINT32_ARRAY(env.v7m.fpdscr, ARMCPU, M_REG_NUM_BANKS), + VMSTATE_UINT32_ARRAY(env.v7m.cpacr, ARMCPU, M_REG_NUM_BANKS), + VMSTATE_UINT32(env.v7m.nsacr, ARMCPU), + VMSTATE_END_OF_LIST() + } +}; + static const VMStateDescription vmstate_m = { .name = "cpu/m", .version_id = 4, @@ -330,6 +345,7 @@ static const VMStateDescription vmstate_m = { &vmstate_m_scr, &vmstate_m_other_sp, &vmstate_m_v8m, + &vmstate_m_fp, NULL } }; diff --git a/target/arm/trace-events b/target/arm/trace-events index 6b759f9d4f..41c63d7570 100644 --- a/target/arm/trace-events +++ b/target/arm/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# target/arm/helper.c +# helper.c arm_gt_recalc(int timer, int irqstate, uint64_t nexttick) "gt recalc: timer %d irqstate %d next tick 0x%" PRIx64 arm_gt_recalc_disabled(int timer) "gt recalc: timer %d irqstate 0 timer disabled" arm_gt_cval_write(int timer, uint64_t value) "gt_cval_write: timer %d value 0x%" PRIx64 @@ -9,5 +9,5 @@ arm_gt_ctl_write(int timer, uint64_t value) "gt_ctl_write: timer %d value 0x%" P arm_gt_imask_toggle(int timer, int irqstate) "gt_ctl_write: timer %d IMASK toggle, new irqstate %d" arm_gt_cntvoff_write(uint64_t value) "gt_cntvoff_write: value 0x%" PRIx64 -# target/arm/kvm.c +# kvm.c kvm_arm_fixup_msi_route(uint64_t iova, uint64_t gpa) "MSI iova = 0x%"PRIx64" is translated into 0x%"PRIx64 diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 1959046343..9dcc5ff3a3 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -27,6 +27,7 @@ #include "translate.h" #include "internals.h" #include "qemu/host-utils.h" +#include "qemu/qemu-print.h" #include "exec/semihost.h" #include "exec/gen-icount.h" @@ -151,8 +152,7 @@ static void set_btype(DisasContext *s, int val) s->btype = -1; } -void aarch64_cpu_dump_state(CPUState *cs, FILE *f, - fprintf_function cpu_fprintf, int flags) +void aarch64_cpu_dump_state(CPUState *cs, FILE *f, int flags) { ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; @@ -161,13 +161,13 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, int el = arm_current_el(env); const char *ns_status; - cpu_fprintf(f, " PC=%016" PRIx64 " ", env->pc); + qemu_fprintf(f, " PC=%016" PRIx64 " ", env->pc); for (i = 0; i < 32; i++) { if (i == 31) { - cpu_fprintf(f, " SP=%016" PRIx64 "\n", env->xregs[i]); + qemu_fprintf(f, " SP=%016" PRIx64 "\n", env->xregs[i]); } else { - cpu_fprintf(f, "X%02d=%016" PRIx64 "%s", i, env->xregs[i], - (i + 2) % 3 ? " " : "\n"); + qemu_fprintf(f, "X%02d=%016" PRIx64 "%s", i, env->xregs[i], + (i + 2) % 3 ? " " : "\n"); } } @@ -176,29 +176,29 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, } else { ns_status = ""; } - cpu_fprintf(f, "PSTATE=%08x %c%c%c%c %sEL%d%c", - psr, - psr & PSTATE_N ? 'N' : '-', - psr & PSTATE_Z ? 'Z' : '-', - psr & PSTATE_C ? 'C' : '-', - psr & PSTATE_V ? 'V' : '-', - ns_status, - el, - psr & PSTATE_SP ? 'h' : 't'); + qemu_fprintf(f, "PSTATE=%08x %c%c%c%c %sEL%d%c", + psr, + psr & PSTATE_N ? 'N' : '-', + psr & PSTATE_Z ? 'Z' : '-', + psr & PSTATE_C ? 'C' : '-', + psr & PSTATE_V ? 'V' : '-', + ns_status, + el, + psr & PSTATE_SP ? 'h' : 't'); if (cpu_isar_feature(aa64_bti, cpu)) { - cpu_fprintf(f, " BTYPE=%d", (psr & PSTATE_BTYPE) >> 10); + qemu_fprintf(f, " BTYPE=%d", (psr & PSTATE_BTYPE) >> 10); } if (!(flags & CPU_DUMP_FPU)) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); return; } if (fp_exception_el(env, el) != 0) { - cpu_fprintf(f, " FPU disabled\n"); + qemu_fprintf(f, " FPU disabled\n"); return; } - cpu_fprintf(f, " FPCR=%08x FPSR=%08x\n", - vfp_get_fpcr(env), vfp_get_fpsr(env)); + qemu_fprintf(f, " FPCR=%08x FPSR=%08x\n", + vfp_get_fpcr(env), vfp_get_fpsr(env)); if (cpu_isar_feature(aa64_sve, cpu) && sve_exception_el(env, el) == 0) { int j, zcr_len = sve_zcr_len_for_el(env, el); @@ -206,11 +206,11 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, for (i = 0; i <= FFR_PRED_NUM; i++) { bool eol; if (i == FFR_PRED_NUM) { - cpu_fprintf(f, "FFR="); + qemu_fprintf(f, "FFR="); /* It's last, so end the line. */ eol = true; } else { - cpu_fprintf(f, "P%02d=", i); + qemu_fprintf(f, "P%02d=", i); switch (zcr_len) { case 0: eol = i % 8 == 7; @@ -235,46 +235,46 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, } else { digits = (zcr_len % 4 + 1) * 4; } - cpu_fprintf(f, "%0*" PRIx64 "%s", digits, - env->vfp.pregs[i].p[j], - j ? ":" : eol ? "\n" : " "); + qemu_fprintf(f, "%0*" PRIx64 "%s", digits, + env->vfp.pregs[i].p[j], + j ? ":" : eol ? "\n" : " "); } } for (i = 0; i < 32; i++) { if (zcr_len == 0) { - cpu_fprintf(f, "Z%02d=%016" PRIx64 ":%016" PRIx64 "%s", - i, env->vfp.zregs[i].d[1], - env->vfp.zregs[i].d[0], i & 1 ? "\n" : " "); + qemu_fprintf(f, "Z%02d=%016" PRIx64 ":%016" PRIx64 "%s", + i, env->vfp.zregs[i].d[1], + env->vfp.zregs[i].d[0], i & 1 ? "\n" : " "); } else if (zcr_len == 1) { - cpu_fprintf(f, "Z%02d=%016" PRIx64 ":%016" PRIx64 - ":%016" PRIx64 ":%016" PRIx64 "\n", - i, env->vfp.zregs[i].d[3], env->vfp.zregs[i].d[2], - env->vfp.zregs[i].d[1], env->vfp.zregs[i].d[0]); + qemu_fprintf(f, "Z%02d=%016" PRIx64 ":%016" PRIx64 + ":%016" PRIx64 ":%016" PRIx64 "\n", + i, env->vfp.zregs[i].d[3], env->vfp.zregs[i].d[2], + env->vfp.zregs[i].d[1], env->vfp.zregs[i].d[0]); } else { for (j = zcr_len; j >= 0; j--) { bool odd = (zcr_len - j) % 2 != 0; if (j == zcr_len) { - cpu_fprintf(f, "Z%02d[%x-%x]=", i, j, j - 1); + qemu_fprintf(f, "Z%02d[%x-%x]=", i, j, j - 1); } else if (!odd) { if (j > 0) { - cpu_fprintf(f, " [%x-%x]=", j, j - 1); + qemu_fprintf(f, " [%x-%x]=", j, j - 1); } else { - cpu_fprintf(f, " [%x]=", j); + qemu_fprintf(f, " [%x]=", j); } } - cpu_fprintf(f, "%016" PRIx64 ":%016" PRIx64 "%s", - env->vfp.zregs[i].d[j * 2 + 1], - env->vfp.zregs[i].d[j * 2], - odd || j == 0 ? "\n" : ":"); + qemu_fprintf(f, "%016" PRIx64 ":%016" PRIx64 "%s", + env->vfp.zregs[i].d[j * 2 + 1], + env->vfp.zregs[i].d[j * 2], + odd || j == 0 ? "\n" : ":"); } } } } else { for (i = 0; i < 32; i++) { uint64_t *q = aa64_vfp_qreg(env, i); - cpu_fprintf(f, "Q%02d=%016" PRIx64 ":%016" PRIx64 "%s", - i, q[1], q[0], (i & 1 ? "\n" : " ")); + qemu_fprintf(f, "Q%02d=%016" PRIx64 ":%016" PRIx64 "%s", + i, q[1], q[0], (i & 1 ? "\n" : " ")); } } } @@ -2510,7 +2510,7 @@ static void gen_compare_and_swap_pair(DisasContext *s, int rs, int rt, tcg_gen_qemu_ld_i64(d1, clean_addr, memidx, MO_64 | MO_ALIGN_16 | s->be_data); tcg_gen_addi_i64(a2, clean_addr, 8); - tcg_gen_qemu_ld_i64(d2, clean_addr, memidx, MO_64 | s->be_data); + tcg_gen_qemu_ld_i64(d2, a2, memidx, MO_64 | s->be_data); /* Compare the two words, also in memory order. */ tcg_gen_setcond_i64(TCG_COND_EQ, c1, d1, s1); diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c index 3a2eb51566..245cd82621 100644 --- a/target/arm/translate-sve.c +++ b/target/arm/translate-sve.c @@ -943,24 +943,30 @@ static bool trans_INDEX_rr(DisasContext *s, arg_INDEX_rr *a) static bool trans_ADDVL(DisasContext *s, arg_ADDVL *a) { - TCGv_i64 rd = cpu_reg_sp(s, a->rd); - TCGv_i64 rn = cpu_reg_sp(s, a->rn); - tcg_gen_addi_i64(rd, rn, a->imm * vec_full_reg_size(s)); + if (sve_access_check(s)) { + TCGv_i64 rd = cpu_reg_sp(s, a->rd); + TCGv_i64 rn = cpu_reg_sp(s, a->rn); + tcg_gen_addi_i64(rd, rn, a->imm * vec_full_reg_size(s)); + } return true; } static bool trans_ADDPL(DisasContext *s, arg_ADDPL *a) { - TCGv_i64 rd = cpu_reg_sp(s, a->rd); - TCGv_i64 rn = cpu_reg_sp(s, a->rn); - tcg_gen_addi_i64(rd, rn, a->imm * pred_full_reg_size(s)); + if (sve_access_check(s)) { + TCGv_i64 rd = cpu_reg_sp(s, a->rd); + TCGv_i64 rn = cpu_reg_sp(s, a->rn); + tcg_gen_addi_i64(rd, rn, a->imm * pred_full_reg_size(s)); + } return true; } static bool trans_RDVL(DisasContext *s, arg_RDVL *a) { - TCGv_i64 reg = cpu_reg(s, a->rd); - tcg_gen_movi_i64(reg, a->imm * vec_full_reg_size(s)); + if (sve_access_check(s)) { + TCGv_i64 reg = cpu_reg(s, a->rd); + tcg_gen_movi_i64(reg, a->imm * vec_full_reg_size(s)); + } return true; } diff --git a/target/arm/translate.c b/target/arm/translate.c index d408e4d7ef..10bc53f91c 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -28,6 +28,7 @@ #include "tcg-op-gvec.h" #include "qemu/log.h" #include "qemu/bitops.h" +#include "qemu/qemu-print.h" #include "arm_ldst.h" #include "exec/semihost.h" @@ -3398,8 +3399,14 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn) * for attempts to execute invalid vfp/neon encodings with FP disabled. */ if (s->fp_excp_el) { - gen_exception_insn(s, 4, EXCP_UDEF, - syn_fp_access_trap(1, 0xe, false), s->fp_excp_el); + if (arm_dc_feature(s, ARM_FEATURE_M)) { + gen_exception_insn(s, 4, EXCP_NOCP, syn_uncategorized(), + s->fp_excp_el); + } else { + gen_exception_insn(s, 4, EXCP_UDEF, + syn_fp_access_trap(1, 0xe, false), + s->fp_excp_el); + } return 0; } @@ -3414,6 +3421,73 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn) } } + if (arm_dc_feature(s, ARM_FEATURE_M)) { + /* Handle M-profile lazy FP state mechanics */ + + /* Trigger lazy-state preservation if necessary */ + if (s->v7m_lspact) { + /* + * Lazy state saving affects external memory and also the NVIC, + * so we must mark it as an IO operation for icount. + */ + if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { + gen_io_start(); + } + gen_helper_v7m_preserve_fp_state(cpu_env); + if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { + gen_io_end(); + } + /* + * If the preserve_fp_state helper doesn't throw an exception + * then it will clear LSPACT; we don't need to repeat this for + * any further FP insns in this TB. + */ + s->v7m_lspact = false; + } + + /* Update ownership of FP context: set FPCCR.S to match current state */ + if (s->v8m_fpccr_s_wrong) { + TCGv_i32 tmp; + + tmp = load_cpu_field(v7m.fpccr[M_REG_S]); + if (s->v8m_secure) { + tcg_gen_ori_i32(tmp, tmp, R_V7M_FPCCR_S_MASK); + } else { + tcg_gen_andi_i32(tmp, tmp, ~R_V7M_FPCCR_S_MASK); + } + store_cpu_field(tmp, v7m.fpccr[M_REG_S]); + /* Don't need to do this for any further FP insns in this TB */ + s->v8m_fpccr_s_wrong = false; + } + + if (s->v7m_new_fp_ctxt_needed) { + /* + * Create new FP context by updating CONTROL.FPCA, CONTROL.SFPA + * and the FPSCR. + */ + TCGv_i32 control, fpscr; + uint32_t bits = R_V7M_CONTROL_FPCA_MASK; + + fpscr = load_cpu_field(v7m.fpdscr[s->v8m_secure]); + gen_helper_vfp_set_fpscr(cpu_env, fpscr); + tcg_temp_free_i32(fpscr); + /* + * We don't need to arrange to end the TB, because the only + * parts of FPSCR which we cache in the TB flags are the VECLEN + * and VECSTRIDE, and those don't exist for M-profile. + */ + + if (s->v8m_secure) { + bits |= R_V7M_CONTROL_SFPA_MASK; + } + control = load_cpu_field(v7m.control[M_REG_S]); + tcg_gen_ori_i32(control, control, bits); + store_cpu_field(control, v7m.control[M_REG_S]); + /* Don't need to do this for any further FP insns in this TB */ + s->v7m_new_fp_ctxt_needed = false; + } + } + if (extract32(insn, 28, 4) == 0xf) { /* * Encodings with T=1 (Thumb) or unconditional (ARM): @@ -3512,12 +3586,27 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn) } } } else { /* !dp */ + bool is_sysreg; + if ((insn & 0x6f) != 0x00) return 1; rn = VFP_SREG_N(insn); + + is_sysreg = extract32(insn, 21, 1); + + if (arm_dc_feature(s, ARM_FEATURE_M)) { + /* + * The only M-profile VFP vmrs/vmsr sysreg is FPSCR. + * Writes to R15 are UNPREDICTABLE; we choose to undef. + */ + if (is_sysreg && (rd == 15 || (rn >> 1) != ARM_VFP_FPSCR)) { + return 1; + } + } + if (insn & ARM_CP_RW_BIT) { /* vfp->arm */ - if (insn & (1 << 21)) { + if (is_sysreg) { /* system register */ rn >>= 1; @@ -3584,7 +3673,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn) } } else { /* arm->vfp */ - if (insn & (1 << 21)) { + if (is_sysreg) { rn >>= 1; /* system register */ switch (rn) { @@ -11706,10 +11795,19 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn) case 6: case 7: case 14: case 15: /* Coprocessor. */ if (arm_dc_feature(s, ARM_FEATURE_M)) { - /* We don't currently implement M profile FP support, - * so this entire space should give a NOCP fault, with - * the exception of the v8M VLLDM and VLSTM insns, which - * must be NOPs in Secure state and UNDEF in Nonsecure state. + /* 0b111x_11xx_xxxx_xxxx_xxxx_xxxx_xxxx_xxxx */ + if (extract32(insn, 24, 2) == 3) { + goto illegal_op; /* op0 = 0b11 : unallocated */ + } + + /* + * Decode VLLDM and VLSTM first: these are nonstandard because: + * * if there is no FPU then these insns must NOP in + * Secure state and UNDEF in Nonsecure state + * * if there is an FPU then these insns do not have + * the usual behaviour that disas_vfp_insn() provides of + * being controlled by CPACR/NSACR enable bits or the + * lazy-stacking logic. */ if (arm_dc_feature(s, ARM_FEATURE_V8) && (insn & 0xffa00f00) == 0xec200a00) { @@ -11720,9 +11818,31 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn) if (!s->v8m_secure || (insn & 0x0040f0ff)) { goto illegal_op; } - /* Just NOP since FP support is not implemented */ + + if (arm_dc_feature(s, ARM_FEATURE_VFP)) { + TCGv_i32 fptr = load_reg(s, rn); + + if (extract32(insn, 20, 1)) { + gen_helper_v7m_vlldm(cpu_env, fptr); + } else { + gen_helper_v7m_vlstm(cpu_env, fptr); + } + tcg_temp_free_i32(fptr); + + /* End the TB, because we have updated FP control bits */ + s->base.is_jmp = DISAS_UPDATE; + } break; } + if (arm_dc_feature(s, ARM_FEATURE_VFP) && + ((insn >> 8) & 0xe) == 10) { + /* FP, and the CPU supports it */ + if (disas_vfp_insn(s, insn)) { + goto illegal_op; + } + break; + } + /* All other insns: NOCP */ gen_exception_insn(s, 4, EXCP_NOCP, syn_uncategorized(), default_exception_el(s)); @@ -13290,12 +13410,21 @@ static void arm_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) dc->fp_excp_el = FIELD_EX32(tb_flags, TBFLAG_ANY, FPEXC_EL); dc->vfp_enabled = FIELD_EX32(tb_flags, TBFLAG_A32, VFPEN); dc->vec_len = FIELD_EX32(tb_flags, TBFLAG_A32, VECLEN); - dc->vec_stride = FIELD_EX32(tb_flags, TBFLAG_A32, VECSTRIDE); - dc->c15_cpar = FIELD_EX32(tb_flags, TBFLAG_A32, XSCALE_CPAR); + if (arm_feature(env, ARM_FEATURE_XSCALE)) { + dc->c15_cpar = FIELD_EX32(tb_flags, TBFLAG_A32, XSCALE_CPAR); + dc->vec_stride = 0; + } else { + dc->vec_stride = FIELD_EX32(tb_flags, TBFLAG_A32, VECSTRIDE); + dc->c15_cpar = 0; + } dc->v7m_handler_mode = FIELD_EX32(tb_flags, TBFLAG_A32, HANDLER); dc->v8m_secure = arm_feature(env, ARM_FEATURE_M_SECURITY) && regime_is_secure(env, dc->mmu_idx); dc->v8m_stackcheck = FIELD_EX32(tb_flags, TBFLAG_A32, STACKCHECK); + dc->v8m_fpccr_s_wrong = FIELD_EX32(tb_flags, TBFLAG_A32, FPCCR_S_WRONG); + dc->v7m_new_fp_ctxt_needed = + FIELD_EX32(tb_flags, TBFLAG_A32, NEW_FP_CTXT_NEEDED); + dc->v7m_lspact = FIELD_EX32(tb_flags, TBFLAG_A32, LSPACT); dc->cp_regs = cpu->cp_regs; dc->features = env->features; @@ -13755,7 +13884,7 @@ static const TranslatorOps thumb_translator_ops = { }; /* generate intermediate code for basic block 'tb'. */ -void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb) +void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns) { DisasContext dc; const TranslatorOps *ops = &arm_translator_ops; @@ -13769,27 +13898,26 @@ void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb) } #endif - translator_loop(ops, &dc.base, cpu, tb); + translator_loop(ops, &dc.base, cpu, tb, max_insns); } -void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags) +void arm_cpu_dump_state(CPUState *cs, FILE *f, int flags) { ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; int i; if (is_a64(env)) { - aarch64_cpu_dump_state(cs, f, cpu_fprintf, flags); + aarch64_cpu_dump_state(cs, f, flags); return; } for(i=0;i<16;i++) { - cpu_fprintf(f, "R%02d=%08x", i, env->regs[i]); + qemu_fprintf(f, "R%02d=%08x", i, env->regs[i]); if ((i % 4) == 3) - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); else - cpu_fprintf(f, " "); + qemu_fprintf(f, " "); } if (arm_feature(env, ARM_FEATURE_M)) { @@ -13811,15 +13939,15 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, } } - cpu_fprintf(f, "XPSR=%08x %c%c%c%c %c %s%s\n", - xpsr, - xpsr & XPSR_N ? 'N' : '-', - xpsr & XPSR_Z ? 'Z' : '-', - xpsr & XPSR_C ? 'C' : '-', - xpsr & XPSR_V ? 'V' : '-', - xpsr & XPSR_T ? 'T' : 'A', - ns_status, - mode); + qemu_fprintf(f, "XPSR=%08x %c%c%c%c %c %s%s\n", + xpsr, + xpsr & XPSR_N ? 'N' : '-', + xpsr & XPSR_Z ? 'Z' : '-', + xpsr & XPSR_C ? 'C' : '-', + xpsr & XPSR_V ? 'V' : '-', + xpsr & XPSR_T ? 'T' : 'A', + ns_status, + mode); } else { uint32_t psr = cpsr_read(env); const char *ns_status = ""; @@ -13829,15 +13957,15 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, ns_status = env->cp15.scr_el3 & SCR_NS ? "NS " : "S "; } - cpu_fprintf(f, "PSR=%08x %c%c%c%c %c %s%s%d\n", - psr, - psr & CPSR_N ? 'N' : '-', - psr & CPSR_Z ? 'Z' : '-', - psr & CPSR_C ? 'C' : '-', - psr & CPSR_V ? 'V' : '-', - psr & CPSR_T ? 'T' : 'A', - ns_status, - aarch32_mode_name(psr), (psr & 0x10) ? 32 : 26); + qemu_fprintf(f, "PSR=%08x %c%c%c%c %c %s%s%d\n", + psr, + psr & CPSR_N ? 'N' : '-', + psr & CPSR_Z ? 'Z' : '-', + psr & CPSR_C ? 'C' : '-', + psr & CPSR_V ? 'V' : '-', + psr & CPSR_T ? 'T' : 'A', + ns_status, + aarch32_mode_name(psr), (psr & 0x10) ? 32 : 26); } if (flags & CPU_DUMP_FPU) { @@ -13850,12 +13978,12 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, } for (i = 0; i < numvfpregs; i++) { uint64_t v = *aa32_vfp_dreg(env, i); - cpu_fprintf(f, "s%02d=%08x s%02d=%08x d%02d=%016" PRIx64 "\n", - i * 2, (uint32_t)v, - i * 2 + 1, (uint32_t)(v >> 32), - i, v); + qemu_fprintf(f, "s%02d=%08x s%02d=%08x d%02d=%016" PRIx64 "\n", + i * 2, (uint32_t)v, + i * 2 + 1, (uint32_t)(v >> 32), + i, v); } - cpu_fprintf(f, "FPSCR: %08x\n", vfp_get_fpscr(env)); + qemu_fprintf(f, "FPSCR: %08x\n", vfp_get_fpscr(env)); } } diff --git a/target/arm/translate.h b/target/arm/translate.h index 912cc2a4a5..c2348def0d 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -40,6 +40,9 @@ typedef struct DisasContext { bool v7m_handler_mode; bool v8m_secure; /* true if v8M and we're in Secure mode */ bool v8m_stackcheck; /* true if we need to perform v8M stack limit checks */ + bool v8m_fpccr_s_wrong; /* true if v8M FPCCR.S != v8m_secure */ + bool v7m_new_fp_ctxt_needed; /* ASPEN set but no active FP context */ + bool v7m_lspact; /* FPCCR.LSPACT set */ /* Immediate value in AArch32 SVC insn; must be set if is_jmp == DISAS_SWI * so that top level loop can generate correct syndrome information. */ @@ -166,8 +169,7 @@ static inline void disas_set_insn_syndrome(DisasContext *s, uint32_t syn) #ifdef TARGET_AARCH64 void a64_translate_init(void); void gen_a64_set_pc_im(uint64_t val); -void aarch64_cpu_dump_state(CPUState *cs, FILE *f, - fprintf_function cpu_fprintf, int flags); +void aarch64_cpu_dump_state(CPUState *cs, FILE *f, int flags); extern const TranslatorOps aarch64_translator_ops; #else static inline void a64_translate_init(void) @@ -178,9 +180,7 @@ static inline void gen_a64_set_pc_im(uint64_t val) { } -static inline void aarch64_cpu_dump_state(CPUState *cs, FILE *f, - fprintf_function cpu_fprintf, - int flags) +static inline void aarch64_cpu_dump_state(CPUState *cs, FILE *f, int flags) { } #endif diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c index 2468fc1629..7a46d99148 100644 --- a/target/arm/vfp_helper.c +++ b/target/arm/vfp_helper.c @@ -105,6 +105,14 @@ void HELPER(vfp_set_fpscr)(CPUARMState *env, uint32_t val) val &= ~FPCR_FZ16; } + if (arm_feature(env, ARM_FEATURE_M)) { + /* + * M profile FPSCR is RES0 for the QC, STRIDE, FZ16, LEN bits + * and also for the trapped-exception-handling bits IxE. + */ + val &= 0xf7c0009f; + } + /* * We don't implement trapped exception handling, so the * trap enable bits, IDE|IXE|UFE|OFE|DZE|IOE are all RAZ/WI (not RES0!) diff --git a/target/cris/cpu.c b/target/cris/cpu.c index a23aba2688..75729bfdd5 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -23,6 +23,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" +#include "qemu/qemu-print.h" #include "cpu.h" #include "qemu-common.h" #include "mmu.h" @@ -103,27 +104,22 @@ static gint cris_cpu_list_compare(gconstpointer a, gconstpointer b) static void cris_cpu_list_entry(gpointer data, gpointer user_data) { ObjectClass *oc = data; - CPUListState *s = user_data; const char *typename = object_class_get_name(oc); char *name; name = g_strndup(typename, strlen(typename) - strlen(CRIS_CPU_TYPE_SUFFIX)); - (*s->cpu_fprintf)(s->file, " %s\n", name); + qemu_printf(" %s\n", name); g_free(name); } -void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf) +void cris_cpu_list(void) { - CPUListState s = { - .file = f, - .cpu_fprintf = cpu_fprintf, - }; GSList *list; list = object_class_get_list(TYPE_CRIS_CPU, false); list = g_slist_sort(list, cris_cpu_list_compare); - (*cpu_fprintf)(f, "Available CPUs:\n"); - g_slist_foreach(list, cris_cpu_list_entry, &s); + qemu_printf("Available CPUs:\n"); + g_slist_foreach(list, cris_cpu_list_entry, NULL); g_slist_free(list); } diff --git a/target/cris/cpu.h b/target/cris/cpu.h index 8bb1dbc989..0fbe771639 100644 --- a/target/cris/cpu.h +++ b/target/cris/cpu.h @@ -207,8 +207,7 @@ void cris_cpu_do_interrupt(CPUState *cpu); void crisv10_cpu_do_interrupt(CPUState *cpu); bool cris_cpu_exec_interrupt(CPUState *cpu, int int_req); -void cris_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags); +void cris_cpu_dump_state(CPUState *cs, FILE *f, int flags); hwaddr cris_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); @@ -308,6 +307,6 @@ static inline void cpu_get_tb_cpu_state(CPUCRISState *env, target_ulong *pc, } #define cpu_list cris_cpu_list -void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf); +void cris_cpu_list(void); #endif diff --git a/target/cris/helper.c b/target/cris/helper.c index b2dbb2075c..3939603c73 100644 --- a/target/cris/helper.c +++ b/target/cris/helper.c @@ -60,7 +60,7 @@ int cris_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, cs->exception_index = 0xaa; cpu->env.pregs[PR_EDA] = address; - cpu_dump_state(cs, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, 0); return 1; } diff --git a/target/cris/translate.c b/target/cris/translate.c index 11b2c11174..b005a5c20e 100644 --- a/target/cris/translate.c +++ b/target/cris/translate.c @@ -33,6 +33,7 @@ #include "exec/cpu_ldst.h" #include "exec/translator.h" #include "crisv32-decode.h" +#include "qemu/qemu-print.h" #include "exec/helper-gen.h" @@ -3080,7 +3081,7 @@ static unsigned int crisv32_decoder(CPUCRISState *env, DisasContext *dc) */ /* generate intermediate code for basic block 'tb'. */ -void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { CPUCRISState *env = cs->env_ptr; uint32_t pc_start; @@ -3090,7 +3091,6 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) uint32_t page_start; target_ulong npc; int num_insns; - int max_insns; if (env->pregs[PR_VR] == 32) { dc->decoder = crisv32_decoder; @@ -3136,13 +3136,6 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) page_start = pc_start & TARGET_PAGE_MASK; num_insns = 0; - max_insns = tb_cflags(tb) & CF_COUNT_MASK; - if (max_insns == 0) { - max_insns = CF_COUNT_MASK; - } - if (max_insns > TCG_MAX_INSNS) { - max_insns = TCG_MAX_INSNS; - } gen_tb_start(tb); do { @@ -3299,8 +3292,7 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) #endif } -void cris_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags) +void cris_cpu_dump_state(CPUState *cs, FILE *f, int flags) { CRISCPU *cpu = CRIS_CPU(cs); CPUCRISState *env = &cpu->env; @@ -3308,7 +3300,7 @@ void cris_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, const char **pregnames; int i; - if (!env || !f) { + if (!env) { return; } if (env->pregs[PR_VR] < 32) { @@ -3319,40 +3311,40 @@ void cris_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, regnames = regnames_v32; } - cpu_fprintf(f, "PC=%x CCS=%x btaken=%d btarget=%x\n" - "cc_op=%d cc_src=%d cc_dest=%d cc_result=%x cc_mask=%x\n", - env->pc, env->pregs[PR_CCS], env->btaken, env->btarget, - env->cc_op, - env->cc_src, env->cc_dest, env->cc_result, env->cc_mask); + qemu_fprintf(f, "PC=%x CCS=%x btaken=%d btarget=%x\n" + "cc_op=%d cc_src=%d cc_dest=%d cc_result=%x cc_mask=%x\n", + env->pc, env->pregs[PR_CCS], env->btaken, env->btarget, + env->cc_op, + env->cc_src, env->cc_dest, env->cc_result, env->cc_mask); for (i = 0; i < 16; i++) { - cpu_fprintf(f, "%s=%8.8x ", regnames[i], env->regs[i]); + qemu_fprintf(f, "%s=%8.8x ", regnames[i], env->regs[i]); if ((i + 1) % 4 == 0) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } } - cpu_fprintf(f, "\nspecial regs:\n"); + qemu_fprintf(f, "\nspecial regs:\n"); for (i = 0; i < 16; i++) { - cpu_fprintf(f, "%s=%8.8x ", pregnames[i], env->pregs[i]); + qemu_fprintf(f, "%s=%8.8x ", pregnames[i], env->pregs[i]); if ((i + 1) % 4 == 0) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } } if (env->pregs[PR_VR] >= 32) { uint32_t srs = env->pregs[PR_SRS]; - cpu_fprintf(f, "\nsupport function regs bank %x:\n", srs); + qemu_fprintf(f, "\nsupport function regs bank %x:\n", srs); if (srs < ARRAY_SIZE(env->sregs)) { for (i = 0; i < 16; i++) { - cpu_fprintf(f, "s%2.2d=%8.8x ", - i, env->sregs[srs][i]); + qemu_fprintf(f, "s%2.2d=%8.8x ", + i, env->sregs[srs][i]); if ((i + 1) % 4 == 0) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } } } } - cpu_fprintf(f, "\n\n"); + qemu_fprintf(f, "\n\n"); } diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 00bf444620..e64f48581e 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" +#include "qemu/qemu-print.h" #include "cpu.h" #include "qemu-common.h" #include "exec/exec-all.h" @@ -113,22 +114,17 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error **errp) static void hppa_cpu_list_entry(gpointer data, gpointer user_data) { ObjectClass *oc = data; - CPUListState *s = user_data; - (*s->cpu_fprintf)(s->file, " %s\n", object_class_get_name(oc)); + qemu_printf(" %s\n", object_class_get_name(oc)); } -void hppa_cpu_list(FILE *f, fprintf_function cpu_fprintf) +void hppa_cpu_list(void) { - CPUListState s = { - .file = f, - .cpu_fprintf = cpu_fprintf, - }; GSList *list; list = object_class_get_list_sorted(TYPE_HPPA_CPU, false); - (*cpu_fprintf)(f, "Available CPUs:\n"); - g_slist_foreach(list, hppa_cpu_list_entry, &s); + qemu_printf("Available CPUs:\n"); + g_slist_foreach(list, hppa_cpu_list_entry, NULL); g_slist_free(list); } diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 861bbb1f16..923346adb6 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -143,6 +143,10 @@ #endif #define CR_RC 0 +#define CR_PID1 8 +#define CR_PID2 9 +#define CR_PID3 12 +#define CR_PID4 13 #define CR_SCRCCR 10 #define CR_SAR 11 #define CR_IVA 14 @@ -268,7 +272,7 @@ void hppa_translate_init(void); #define CPU_RESOLVING_TYPE TYPE_HPPA_CPU -void hppa_cpu_list(FILE *f, fprintf_function cpu_fprintf); +void hppa_cpu_list(void); static inline target_ulong hppa_form_gva_psw(target_ureg psw, uint64_t spc, target_ureg off) @@ -341,6 +345,12 @@ target_ureg cpu_hppa_get_psw(CPUHPPAState *env); void cpu_hppa_put_psw(CPUHPPAState *env, target_ureg); void cpu_hppa_loaded_fr0(CPUHPPAState *env); +#ifdef CONFIG_USER_ONLY +static inline void cpu_hppa_change_prot_id(CPUHPPAState *env) { } +#else +void cpu_hppa_change_prot_id(CPUHPPAState *env); +#endif + #define cpu_signal_handler cpu_hppa_signal_handler int cpu_hppa_signal_handler(int host_signum, void *pinfo, void *puc); @@ -349,7 +359,7 @@ int hppa_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void hppa_cpu_do_interrupt(CPUState *cpu); bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req); -void hppa_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function, int); +void hppa_cpu_dump_state(CPUState *cs, FILE *f, int); #ifdef CONFIG_USER_ONLY int hppa_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int midx); diff --git a/target/hppa/gdbstub.c b/target/hppa/gdbstub.c index 3157a690f2..983bf92aaf 100644 --- a/target/hppa/gdbstub.c +++ b/target/hppa/gdbstub.c @@ -93,19 +93,19 @@ int hppa_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) val = env->cr[CR_RC]; break; case 52: - val = env->cr[8]; + val = env->cr[CR_PID1]; break; case 53: - val = env->cr[9]; + val = env->cr[CR_PID2]; break; case 54: val = env->cr[CR_SCRCCR]; break; case 55: - val = env->cr[12]; + val = env->cr[CR_PID3]; break; case 56: - val = env->cr[13]; + val = env->cr[CR_PID4]; break; case 57: val = env->cr[24]; @@ -224,19 +224,23 @@ int hppa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) env->cr[CR_RC] = val; break; case 52: - env->cr[8] = val; + env->cr[CR_PID1] = val; + cpu_hppa_change_prot_id(env); break; case 53: - env->cr[9] = val; + env->cr[CR_PID2] = val; + cpu_hppa_change_prot_id(env); break; case 54: env->cr[CR_SCRCCR] = val; break; case 55: - env->cr[12] = val; + env->cr[CR_PID3] = val; + cpu_hppa_change_prot_id(env); break; case 56: - env->cr[13] = val; + env->cr[CR_PID4] = val; + cpu_hppa_change_prot_id(env); break; case 57: env->cr[24] = val; diff --git a/target/hppa/helper.c b/target/hppa/helper.c index 6539061e52..11c61b3ca2 100644 --- a/target/hppa/helper.c +++ b/target/hppa/helper.c @@ -21,7 +21,9 @@ #include "cpu.h" #include "fpu/softfloat.h" +#include "exec/exec-all.h" #include "exec/helper-proto.h" +#include "qemu/qemu-print.h" target_ureg cpu_hppa_get_psw(CPUHPPAState *env) { @@ -49,6 +51,7 @@ target_ureg cpu_hppa_get_psw(CPUHPPAState *env) void cpu_hppa_put_psw(CPUHPPAState *env, target_ureg psw) { + target_ureg old_psw = env->psw; target_ureg cb = 0; env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); @@ -64,10 +67,17 @@ void cpu_hppa_put_psw(CPUHPPAState *env, target_ureg psw) cb |= ((psw >> 9) & 1) << 8; cb |= ((psw >> 8) & 1) << 4; env->psw_cb = cb; + + /* If PSW_P changes, it affects how we translate addresses. */ + if ((psw ^ old_psw) & PSW_P) { +#ifndef CONFIG_USER_ONLY + CPUState *src = CPU(hppa_env_get_cpu(env)); + tlb_flush_by_mmuidx(src, 0xf); +#endif + } } -void hppa_cpu_dump_state(CPUState *cs, FILE *f, - fprintf_function cpu_fprintf, int flags) +void hppa_cpu_dump_state(CPUState *cs, FILE *f, int flags) { HPPACPU *cpu = HPPA_CPU(cs); CPUHPPAState *env = &cpu->env; @@ -76,9 +86,9 @@ void hppa_cpu_dump_state(CPUState *cs, FILE *f, char psw_c[20]; int i; - cpu_fprintf(f, "IA_F " TARGET_FMT_lx " IA_B " TARGET_FMT_lx "\n", - hppa_form_gva_psw(psw, env->iasq_f, env->iaoq_f), - hppa_form_gva_psw(psw, env->iasq_b, env->iaoq_b)); + qemu_fprintf(f, "IA_F " TARGET_FMT_lx " IA_B " TARGET_FMT_lx "\n", + hppa_form_gva_psw(psw, env->iasq_f, env->iaoq_f), + hppa_form_gva_psw(psw, env->iasq_b, env->iaoq_b)); psw_c[0] = (psw & PSW_W ? 'W' : '-'); psw_c[1] = (psw & PSW_E ? 'E' : '-'); @@ -101,20 +111,20 @@ void hppa_cpu_dump_state(CPUState *cs, FILE *f, psw_c[18] = '\0'; psw_cb = ((env->psw_cb >> 4) & 0x01111111) | (env->psw_cb_msb << 28); - cpu_fprintf(f, "PSW " TREG_FMT_lx " CB " TREG_FMT_lx " %s\n", - psw, psw_cb, psw_c); + qemu_fprintf(f, "PSW " TREG_FMT_lx " CB " TREG_FMT_lx " %s\n", + psw, psw_cb, psw_c); for (i = 0; i < 32; i++) { - cpu_fprintf(f, "GR%02d " TREG_FMT_lx "%c", i, env->gr[i], - (i & 3) == 3 ? '\n' : ' '); + qemu_fprintf(f, "GR%02d " TREG_FMT_lx "%c", i, env->gr[i], + (i & 3) == 3 ? '\n' : ' '); } #ifndef CONFIG_USER_ONLY for (i = 0; i < 8; i++) { - cpu_fprintf(f, "SR%02d %08x%c", i, (uint32_t)(env->sr[i] >> 32), - (i & 3) == 3 ? '\n' : ' '); + qemu_fprintf(f, "SR%02d %08x%c", i, (uint32_t)(env->sr[i] >> 32), + (i & 3) == 3 ? '\n' : ' '); } #endif - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); /* ??? FR */ } diff --git a/target/hppa/helper.h b/target/hppa/helper.h index bfe0dd1db1..38d834ef6b 100644 --- a/target/hppa/helper.h +++ b/target/hppa/helper.h @@ -92,4 +92,5 @@ DEF_HELPER_FLAGS_3(itlbp, TCG_CALL_NO_RWG, void, env, tl, tr) DEF_HELPER_FLAGS_2(ptlb, TCG_CALL_NO_RWG, void, env, tl) DEF_HELPER_FLAGS_1(ptlbe, TCG_CALL_NO_RWG, void, env) DEF_HELPER_FLAGS_2(lpa, TCG_CALL_NO_WG, tr, env, tl) +DEF_HELPER_FLAGS_1(change_prot_id, TCG_CALL_NO_RWG, void, env) #endif diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index 55ff39dd05..f0dd71dd08 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -133,6 +133,9 @@ ixtlbx 000001 b:5 r:5 sp:2 0100000 addr:1 0 00000 data=1 ixtlbx 000001 b:5 r:5 ... 000000 addr:1 0 00000 \ sp=%assemble_sr3x data=0 +# pcxl and pcxl2 Fast TLB Insert instructions +ixtlbxf 000001 00000 r:5 00 0 data:1 01000 addr:1 0 00000 + pxtlbx 000001 b:5 x:5 sp:2 0100100 local:1 m:1 ----- data=1 pxtlbx 000001 b:5 x:5 ... 000100 local:1 m:1 ----- \ sp=%assemble_sr3x data=0 @@ -525,3 +528,6 @@ fmpy_d 001110 ..... ..... 010 ..... ... ..... @f0e_d_3 fdiv_d 001110 ..... ..... 011 ..... ... ..... @f0e_d_3 xmpyu 001110 ..... ..... 010 .0111 .00 t:5 r1=%ra64 r2=%rb64 + +# diag +diag 000101 ----- ----- ---- ---- ---- ---- diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index aecf3075f6..77fb544838 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -22,6 +22,7 @@ #include "exec/exec-all.h" #include "exec/helper-proto.h" #include "qom/cpu.h" +#include "trace.h" #ifdef CONFIG_USER_ONLY int hppa_cpu_handle_mmu_fault(CPUState *cs, vaddr address, @@ -43,9 +44,12 @@ static hppa_tlb_entry *hppa_find_tlb(CPUHPPAState *env, vaddr addr) for (i = 0; i < ARRAY_SIZE(env->tlb); ++i) { hppa_tlb_entry *ent = &env->tlb[i]; if (ent->va_b <= addr && addr <= ent->va_e) { + trace_hppa_tlb_find_entry(env, ent + i, ent->entry_valid, + ent->va_b, ent->va_e, ent->pa); return ent; } } + trace_hppa_tlb_find_entry_not_found(env, addr); return NULL; } @@ -55,6 +59,8 @@ static void hppa_flush_tlb_ent(CPUHPPAState *env, hppa_tlb_entry *ent) unsigned i, n = 1 << (2 * ent->page_size); uint64_t addr = ent->va_b; + trace_hppa_tlb_flush_ent(env, ent, ent->va_b, ent->va_e, ent->pa); + for (i = 0; i < n; ++i, addr += TARGET_PAGE_SIZE) { /* Do not flush MMU_PHYS_IDX. */ tlb_flush_page_by_mmuidx(cs, addr, 0xf); @@ -96,9 +102,7 @@ int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx, if (ent == NULL || !ent->entry_valid) { phys = 0; prot = 0; - /* ??? Unconditionally report data tlb miss, - even if this is an instruction fetch. */ - ret = EXCP_DTLB_MISS; + ret = (type == PAGE_EXEC) ? EXCP_ITLB_MISS : EXCP_DTLB_MISS; goto egress; } @@ -127,7 +131,20 @@ int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx, break; } - /* ??? Check PSW_P and ent->access_prot. This can remove PAGE_WRITE. */ + /* access_id == 0 means public page and no check is performed */ + if ((env->psw & PSW_P) && ent->access_id) { + /* If bits [31:1] match, and bit 0 is set, suppress write. */ + int match = ent->access_id * 2 + 1; + + if (match == env->cr[CR_PID1] || match == env->cr[CR_PID2] || + match == env->cr[CR_PID3] || match == env->cr[CR_PID4]) { + prot &= PAGE_READ | PAGE_EXEC; + if (type == PAGE_WRITE) { + ret = EXCP_DMPI; + goto egress; + } + } + } /* No guest access type indicates a non-architectural access from within QEMU. Bypass checks for access, D, B and T bits. */ @@ -137,8 +154,7 @@ int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx, if (unlikely(!(prot & type))) { /* The access isn't allowed -- Inst/Data Memory Protection Fault. */ - ret = (type & PAGE_EXEC ? EXCP_IMP : - prot & PAGE_READ ? EXCP_DMP : EXCP_DMAR); + ret = (type & PAGE_EXEC) ? EXCP_IMP : EXCP_DMAR; goto egress; } @@ -171,6 +187,7 @@ int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx, egress: *pphys = phys; *pprot = prot; + trace_hppa_tlb_get_physical_address(env, ret, prot, addr, phys); return ret; } @@ -200,6 +217,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int size, MMUAccessType type, int mmu_idx, uintptr_t retaddr) { HPPACPU *cpu = HPPA_CPU(cs); + CPUHPPAState *env = &cpu->env; int prot, excp, a_prot; hwaddr phys; @@ -215,9 +233,10 @@ void tlb_fill(CPUState *cs, target_ulong addr, int size, break; } - excp = hppa_get_physical_address(&cpu->env, addr, mmu_idx, + excp = hppa_get_physical_address(env, addr, mmu_idx, a_prot, &phys, &prot); if (unlikely(excp >= 0)) { + trace_hppa_tlb_fill_excp(env, addr, size, type, mmu_idx); /* Failure. Raise the indicated exception. */ cs->exception_index = excp; if (cpu->env.psw & PSW_Q) { @@ -228,6 +247,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, int size, cpu_loop_exit_restore(cs, retaddr); } + trace_hppa_tlb_fill_success(env, addr & TARGET_PAGE_MASK, + phys & TARGET_PAGE_MASK, size, type, mmu_idx); /* Success! Store the translation into the QEMU TLB. */ tlb_set_page(cs, addr & TARGET_PAGE_MASK, phys & TARGET_PAGE_MASK, prot, mmu_idx, TARGET_PAGE_SIZE); @@ -242,11 +263,13 @@ void HELPER(itlba)(CPUHPPAState *env, target_ulong addr, target_ureg reg) /* Zap any old entries covering ADDR; notice empty entries on the way. */ for (i = 0; i < ARRAY_SIZE(env->tlb); ++i) { hppa_tlb_entry *ent = &env->tlb[i]; - if (!ent->entry_valid) { - empty = ent; - } else if (ent->va_b <= addr && addr <= ent->va_e) { - hppa_flush_tlb_ent(env, ent); - empty = ent; + if (ent->va_b <= addr && addr <= ent->va_e) { + if (ent->entry_valid) { + hppa_flush_tlb_ent(env, ent); + } + if (!empty) { + empty = ent; + } } } @@ -259,6 +282,7 @@ void HELPER(itlba)(CPUHPPAState *env, target_ulong addr, target_ureg reg) empty->va_b = addr & TARGET_PAGE_MASK; empty->va_e = empty->va_b + TARGET_PAGE_SIZE - 1; empty->pa = extract32(reg, 5, 20) << TARGET_PAGE_BITS; + trace_hppa_tlb_itlba(env, empty, empty->va_b, empty->va_e, empty->pa); } /* Insert (Insn/Data) TLB Protection. Note this is PA 1.1 only. */ @@ -266,7 +290,7 @@ void HELPER(itlbp)(CPUHPPAState *env, target_ulong addr, target_ureg reg) { hppa_tlb_entry *ent = hppa_find_tlb(env, addr); - if (unlikely(ent == NULL || ent->entry_valid)) { + if (unlikely(ent == NULL)) { qemu_log_mask(LOG_GUEST_ERROR, "ITLBP not following ITLBA\n"); return; } @@ -280,6 +304,8 @@ void HELPER(itlbp)(CPUHPPAState *env, target_ulong addr, target_ureg reg) ent->d = extract32(reg, 28, 1); ent->t = extract32(reg, 29, 1); ent->entry_valid = 1; + trace_hppa_tlb_itlbp(env, ent, ent->access_id, ent->u, ent->ar_pl2, + ent->ar_pl1, ent->ar_type, ent->b, ent->d, ent->t); } /* Purge (Insn/Data) TLB. This is explicitly page-based, and is @@ -299,6 +325,7 @@ void HELPER(ptlb)(CPUHPPAState *env, target_ulong addr) { CPUState *src = CPU(hppa_env_get_cpu(env)); CPUState *cpu; + trace_hppa_tlb_ptlb(env); run_on_cpu_data data = RUN_ON_CPU_TARGET_PTR(addr); CPU_FOREACH(cpu) { @@ -314,11 +341,24 @@ void HELPER(ptlb)(CPUHPPAState *env, target_ulong addr) void HELPER(ptlbe)(CPUHPPAState *env) { CPUState *src = CPU(hppa_env_get_cpu(env)); - + trace_hppa_tlb_ptlbe(env); memset(env->tlb, 0, sizeof(env->tlb)); tlb_flush_by_mmuidx(src, 0xf); } +void cpu_hppa_change_prot_id(CPUHPPAState *env) +{ + if (env->psw & PSW_P) { + CPUState *src = CPU(hppa_env_get_cpu(env)); + tlb_flush_by_mmuidx(src, 0xf); + } +} + +void HELPER(change_prot_id)(CPUHPPAState *env) +{ + cpu_hppa_change_prot_id(env); +} + target_ureg HELPER(lpa)(CPUHPPAState *env, target_ulong addr) { hwaddr phys; @@ -335,8 +375,10 @@ target_ureg HELPER(lpa)(CPUHPPAState *env, target_ulong addr) if (excp == EXCP_DTLB_MISS) { excp = EXCP_NA_DTLB_MISS; } + trace_hppa_tlb_lpa_failed(env, addr); hppa_dynamic_excp(env, excp, GETPC()); } + trace_hppa_tlb_lpa_success(env, addr, phys); return phys; } diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index 268caaaa20..a55a5dfc02 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -25,6 +25,7 @@ #include "sysemu/sysemu.h" #include "qemu/timer.h" #include "fpu/softfloat.h" +#include "trace.h" void QEMU_NORETURN HELPER(excp)(CPUHPPAState *env, int excp) { @@ -165,6 +166,7 @@ target_ureg HELPER(probe)(CPUHPPAState *env, target_ulong addr, int prot, excp; hwaddr phys; + trace_hppa_tlb_probe(addr, level, want); /* Fail if the requested privilege level is higher than current. */ if (level < (env->iaoq_f & 3)) { return 0; @@ -676,11 +678,6 @@ target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm) void HELPER(rfi)(CPUHPPAState *env) { - /* ??? On second reading this condition simply seems - to be undefined rather than a diagnosed trap. */ - if (env->psw & (PSW_I | PSW_R | PSW_Q)) { - helper_excp(env, EXCP_ILL); - } env->iasq_f = (uint64_t)env->cr[CR_IIASQ] << 32; env->iasq_b = (uint64_t)env->cr_back[0] << 32; env->iaoq_f = env->cr[CR_IIAOQ]; diff --git a/target/hppa/trace-events b/target/hppa/trace-events new file mode 100644 index 0000000000..0731ce7ce1 --- /dev/null +++ b/target/hppa/trace-events @@ -0,0 +1,18 @@ +# See docs/devel/tracing.txt for syntax documentation. + +# mem_helper.c +disable hppa_tlb_flush_ent(void *env, void *ent, uint64_t va_b, uint64_t va_e, uint64_t pa) "env=%p ent=%p va_b=0x%lx va_e=0x%lx pa=0x%lx" +disable hppa_tlb_find_entry(void *env, void *ent, int valid, uint64_t va_b, uint64_t va_e, uint64_t pa) "env=%p ent=%p valid=%d va_b=0x%lx va_e=0x%lx pa=0x%lx" +disable hppa_tlb_find_entry_not_found(void *env, uint64_t addr) "env=%p addr=%08lx" +disable hppa_tlb_get_physical_address(void *env, int ret, int prot, uint64_t addr, uint64_t phys) "env=%p ret=%d prot=%d addr=0x%lx phys=0x%lx" +disable hppa_tlb_fill_excp(void *env, uint64_t addr, int size, int type, int mmu_idx) "env=%p addr=0x%lx size=%d type=%d mmu_idx=%d" +disable hppa_tlb_fill_success(void *env, uint64_t addr, uint64_t phys, int size, int type, int mmu_idx) "env=%p addr=0x%lx phys=0x%lx size=%d type=%d mmu_idx=%d" +disable hppa_tlb_itlba(void *env, void *ent, uint64_t va_b, uint64_t va_e, uint64_t pa) "env=%p ent=%p va_b=0x%lx va_e=0x%lx pa=0x%lx" +disable hppa_tlb_itlbp(void *env, void *ent, int access_id, int u, int pl2, int pl1, int type, int b, int d, int t) "env=%p ent=%p access_id=%x u=%d pl2=%d pl1=%d type=%d b=%d d=%d t=%d" +disable hppa_tlb_ptlb(void *env) "env=%p" +disable hppa_tlb_ptlbe(void *env) "env=%p" +disable hppa_tlb_lpa_success(void *env, uint64_t addr, uint64_t phys) "env=%p addr=0x%lx phys=0x%lx" +disable hppa_tlb_lpa_failed(void *env, uint64_t addr) "env=%p addr=0x%lx" + +# op_helper.c +disable hppa_tlb_probe(uint64_t addr, int level, int want) "addr=0x%lx level=%d want=%d" diff --git a/target/hppa/translate.c b/target/hppa/translate.c index dc5636fe94..e1febdfea1 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -347,6 +347,7 @@ static int expand_shl11(int val) /* Similarly, but we want to return to the main loop immediately to recognize unmasked interrupts. */ #define DISAS_IAQ_N_STALE_EXIT DISAS_TARGET_2 +#define DISAS_EXIT DISAS_TARGET_3 /* global register indexes */ static TCGv_reg cpu_gr[32]; @@ -816,12 +817,10 @@ static bool gen_illegal(DisasContext *ctx) static bool use_goto_tb(DisasContext *ctx, target_ureg dest) { - /* Suppress goto_tb in the case of single-steping and IO. */ - if ((tb_cflags(ctx->base.tb) & CF_LAST_IO) - || ctx->base.singlestep_enabled) { - return false; - } - return true; + /* Suppress goto_tb for page crossing, IO, or single-steping. */ + return !(((ctx->base.pc_first ^ dest) & TARGET_PAGE_MASK) + || (tb_cflags(ctx->base.tb) & CF_LAST_IO) + || ctx->base.singlestep_enabled); } /* If the next insn is to be nullified, and it's on the same page, @@ -2258,6 +2257,16 @@ static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a) offsetof(CPUHPPAState, cr_back[ctl - CR_IIASQ])); break; + case CR_PID1: + case CR_PID2: + case CR_PID3: + case CR_PID4: + tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); +#ifndef CONFIG_USER_ONLY + gen_helper_change_prot_id(cpu_env); +#endif + break; + default: tcg_gen_st_reg(reg, cpu_env, offsetof(CPUHPPAState, cr[ctl])); break; @@ -2474,9 +2483,8 @@ static bool trans_ixtlbx(DisasContext *ctx, arg_ixtlbx *a) gen_helper_itlbp(cpu_env, addr, reg); } - /* Exit TB for ITLB change if mmu is enabled. This *should* not be - the case, since the OS TLB fill handler runs with mmu disabled. */ - if (!a->data && (ctx->tb_flags & PSW_C)) { + /* Exit TB for TLB change if mmu is enabled. */ + if (ctx->tb_flags & PSW_C) { ctx->base.is_jmp = DISAS_IAQ_N_STALE; } return nullify_end(ctx); @@ -2503,7 +2511,61 @@ static bool trans_pxtlbx(DisasContext *ctx, arg_pxtlbx *a) } /* Exit TB for TLB change if mmu is enabled. */ - if (!a->data && (ctx->tb_flags & PSW_C)) { + if (ctx->tb_flags & PSW_C) { + ctx->base.is_jmp = DISAS_IAQ_N_STALE; + } + return nullify_end(ctx); +#endif +} + +/* + * Implement the pcxl and pcxl2 Fast TLB Insert instructions. + * See + * https://parisc.wiki.kernel.org/images-parisc/a/a9/Pcxl2_ers.pdf + * page 13-9 (195/206) + */ +static bool trans_ixtlbxf(DisasContext *ctx, arg_ixtlbxf *a) +{ + CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); +#ifndef CONFIG_USER_ONLY + TCGv_tl addr, atl, stl; + TCGv_reg reg; + + nullify_over(ctx); + + /* + * FIXME: + * if (not (pcxl or pcxl2)) + * return gen_illegal(ctx); + * + * Note for future: these are 32-bit systems; no hppa64. + */ + + atl = tcg_temp_new_tl(); + stl = tcg_temp_new_tl(); + addr = tcg_temp_new_tl(); + + tcg_gen_ld32u_i64(stl, cpu_env, + a->data ? offsetof(CPUHPPAState, cr[CR_ISR]) + : offsetof(CPUHPPAState, cr[CR_IIASQ])); + tcg_gen_ld32u_i64(atl, cpu_env, + a->data ? offsetof(CPUHPPAState, cr[CR_IOR]) + : offsetof(CPUHPPAState, cr[CR_IIAOQ])); + tcg_gen_shli_i64(stl, stl, 32); + tcg_gen_or_tl(addr, atl, stl); + tcg_temp_free_tl(atl); + tcg_temp_free_tl(stl); + + reg = load_gpr(ctx, a->r); + if (a->addr) { + gen_helper_itlba(cpu_env, addr, reg); + } else { + gen_helper_itlbp(cpu_env, addr, reg); + } + tcg_temp_free_tl(addr); + + /* Exit TB for TLB change if mmu is enabled. */ + if (ctx->tb_flags & PSW_C) { ctx->base.is_jmp = DISAS_IAQ_N_STALE; } return nullify_end(ctx); @@ -3033,7 +3095,7 @@ static bool do_addb(DisasContext *ctx, unsigned r, TCGv_reg in1, DisasCond cond; in2 = load_gpr(ctx, r); - dest = dest_gpr(ctx, r); + dest = tcg_temp_new(); sv = NULL; cb_msb = NULL; @@ -3049,6 +3111,8 @@ static bool do_addb(DisasContext *ctx, unsigned r, TCGv_reg in1, } cond = do_cond(c * 2 + f, dest, cb_msb, sv); + save_gpr(ctx, r, dest); + tcg_temp_free(dest); return do_cbranch(ctx, disp, n, &cond); } @@ -3446,6 +3510,8 @@ static bool trans_b_gate(DisasContext *ctx, arg_b_gate *a) { target_ureg dest = iaoq_dest(ctx, a->disp); + nullify_over(ctx); + /* Make sure the caller hasn't done something weird with the queue. * ??? This is not quite the same as the PSW[B] bit, which would be * expensive to track. Real hardware will trap for @@ -3483,7 +3549,16 @@ static bool trans_b_gate(DisasContext *ctx, arg_b_gate *a) } #endif - return do_dbranch(ctx, dest, a->l, a->n); + if (a->l) { + TCGv_reg tmp = dest_gpr(ctx, a->l); + if (ctx->privilege < 3) { + tcg_gen_andi_reg(tmp, tmp, -4); + } + tcg_gen_ori_reg(tmp, tmp, ctx->privilege); + save_gpr(ctx, a->l, tmp); + } + + return do_dbranch(ctx, dest, 0, a->n); } static bool trans_blr(DisasContext *ctx, arg_blr *a) @@ -4048,6 +4123,13 @@ static bool trans_fmpyfadd_d(DisasContext *ctx, arg_fmpyfadd_d *a) return nullify_end(ctx); } +static bool trans_diag(DisasContext *ctx, arg_diag *a) +{ + qemu_log_mask(LOG_UNIMP, "DIAG opcode ignored\n"); + cond_free(&ctx->null_cond); + return true; +} + static void hppa_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) { DisasContext *ctx = container_of(dcbase, DisasContext, base); @@ -4191,19 +4273,31 @@ static void hppa_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) ctx->iaoq_b = ctx->iaoq_n; ctx->base.pc_next += 4; - if (ret == DISAS_NORETURN || ret == DISAS_IAQ_N_UPDATED) { - return; - } - if (ctx->iaoq_f == -1) { - tcg_gen_mov_reg(cpu_iaoq_f, cpu_iaoq_b); - copy_iaoq_entry(cpu_iaoq_b, ctx->iaoq_n, ctx->iaoq_n_var); + switch (ret) { + case DISAS_NORETURN: + case DISAS_IAQ_N_UPDATED: + break; + + case DISAS_NEXT: + case DISAS_IAQ_N_STALE: + case DISAS_IAQ_N_STALE_EXIT: + if (ctx->iaoq_f == -1) { + tcg_gen_mov_reg(cpu_iaoq_f, cpu_iaoq_b); + copy_iaoq_entry(cpu_iaoq_b, ctx->iaoq_n, ctx->iaoq_n_var); #ifndef CONFIG_USER_ONLY - tcg_gen_mov_i64(cpu_iasq_f, cpu_iasq_b); + tcg_gen_mov_i64(cpu_iasq_f, cpu_iasq_b); #endif - nullify_save(ctx); - ctx->base.is_jmp = DISAS_IAQ_N_UPDATED; - } else if (ctx->iaoq_b == -1) { - tcg_gen_mov_reg(cpu_iaoq_b, ctx->iaoq_n_var); + nullify_save(ctx); + ctx->base.is_jmp = (ret == DISAS_IAQ_N_STALE_EXIT + ? DISAS_EXIT + : DISAS_IAQ_N_UPDATED); + } else if (ctx->iaoq_b == -1) { + tcg_gen_mov_reg(cpu_iaoq_b, ctx->iaoq_n_var); + } + break; + + default: + g_assert_not_reached(); } } @@ -4225,11 +4319,12 @@ static void hppa_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) case DISAS_IAQ_N_UPDATED: if (ctx->base.singlestep_enabled) { gen_excp_1(EXCP_DEBUG); - } else if (is_jmp == DISAS_IAQ_N_STALE_EXIT) { - tcg_gen_exit_tb(NULL, 0); - } else { + } else if (is_jmp != DISAS_IAQ_N_STALE_EXIT) { tcg_gen_lookup_and_goto_ptr(); } + /* FALLTHRU */ + case DISAS_EXIT: + tcg_gen_exit_tb(NULL, 0); break; default: g_assert_not_reached(); @@ -4271,11 +4366,10 @@ static const TranslatorOps hppa_tr_ops = { .disas_log = hppa_tr_disas_log, }; -void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) - +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { DisasContext ctx; - translator_loop(&hppa_tr_ops, &ctx.base, cs, tb); + translator_loop(&hppa_tr_ops, &ctx.base, cs, tb, max_insns); } void restore_state_to_opc(CPUHPPAState *env, TranslationBlock *tb, diff --git a/target/i386/cpu.c b/target/i386/cpu.c index d90c01a059..722c5514d4 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -21,6 +21,7 @@ #include "qemu/units.h" #include "qemu/cutils.h" #include "qemu/bitops.h" +#include "qemu/qemu-print.h" #include "cpu.h" #include "exec/exec-all.h" @@ -1089,7 +1090,6 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { .reg = R_EDX, }, .tcg_features = TCG_7_0_EDX_FEATURES, - .unmigratable_flags = CPUID_7_0_EDX_ARCH_CAPABILITIES, }, [FEAT_8000_0007_EDX] = { .type = CPUID_FEATURE_WORD, @@ -2533,7 +2533,7 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD | CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT, .features[FEAT_7_0_ECX] = - CPUID_7_0_ECX_PKU | CPUID_7_0_ECX_OSPKE | + CPUID_7_0_ECX_PKU | CPUID_7_0_ECX_AVX512VNNI, .features[FEAT_7_0_EDX] = CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_SPEC_CTRL_SSBD, @@ -2586,7 +2586,7 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_7_0_EBX_SMAP, .features[FEAT_7_0_ECX] = CPUID_7_0_ECX_VBMI | CPUID_7_0_ECX_UMIP | CPUID_7_0_ECX_PKU | - CPUID_7_0_ECX_OSPKE | CPUID_7_0_ECX_VBMI2 | CPUID_7_0_ECX_GFNI | + CPUID_7_0_ECX_VBMI2 | CPUID_7_0_ECX_GFNI | CPUID_7_0_ECX_VAES | CPUID_7_0_ECX_VPCLMULQDQ | CPUID_7_0_ECX_AVX512VNNI | CPUID_7_0_ECX_AVX512BITALG | CPUID_7_0_ECX_AVX512_VPOPCNTDQ, @@ -2644,7 +2644,7 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT, .features[FEAT_7_0_ECX] = CPUID_7_0_ECX_VBMI | CPUID_7_0_ECX_UMIP | CPUID_7_0_ECX_PKU | - CPUID_7_0_ECX_OSPKE | CPUID_7_0_ECX_VBMI2 | CPUID_7_0_ECX_GFNI | + CPUID_7_0_ECX_VBMI2 | CPUID_7_0_ECX_GFNI | CPUID_7_0_ECX_VAES | CPUID_7_0_ECX_VPCLMULQDQ | CPUID_7_0_ECX_AVX512VNNI | CPUID_7_0_ECX_AVX512BITALG | CPUID_7_0_ECX_AVX512_VPOPCNTDQ | CPUID_7_0_ECX_LA57, @@ -2935,6 +2935,56 @@ static X86CPUDefinition builtin_x86_defs[] = { .model_id = "AMD EPYC Processor (with IBPB)", .cache_info = &epyc_cache_info, }, + { + .name = "Dhyana", + .level = 0xd, + .vendor = CPUID_VENDOR_HYGON, + .family = 24, + .model = 0, + .stepping = 1, + .features[FEAT_1_EDX] = + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | CPUID_CLFLUSH | + CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA | CPUID_PGE | + CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | CPUID_MCE | + CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | CPUID_DE | + CPUID_VME | CPUID_FP87, + .features[FEAT_1_ECX] = + CPUID_EXT_RDRAND | CPUID_EXT_F16C | CPUID_EXT_AVX | + CPUID_EXT_XSAVE | CPUID_EXT_POPCNT | + CPUID_EXT_MOVBE | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 | + CPUID_EXT_CX16 | CPUID_EXT_FMA | CPUID_EXT_SSSE3 | + CPUID_EXT_MONITOR | CPUID_EXT_SSE3, + .features[FEAT_8000_0001_EDX] = + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_PDPE1GB | + CPUID_EXT2_FFXSR | CPUID_EXT2_MMXEXT | CPUID_EXT2_NX | + CPUID_EXT2_SYSCALL, + .features[FEAT_8000_0001_ECX] = + CPUID_EXT3_OSVW | CPUID_EXT3_3DNOWPREFETCH | + CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | + CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM | + CPUID_EXT3_TOPOEXT, + .features[FEAT_8000_0008_EBX] = + CPUID_8000_0008_EBX_IBPB, + .features[FEAT_7_0_EBX] = + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2 | + CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED | + CPUID_7_0_EBX_ADX | CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLFLUSHOPT, + /* + * Missing: XSAVES (not supported by some Linux versions, + * including v4.1 to v4.12). + * KVM doesn't yet expose any XSAVES state save component. + */ + .features[FEAT_XSAVE] = + CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | + CPUID_XSAVE_XGETBV1, + .features[FEAT_6_EAX] = + CPUID_6_EAX_ARAT, + .features[FEAT_SVM] = + CPUID_SVM_NPT | CPUID_SVM_NRIPSAVE, + .xlevel = 0x8000001E, + .model_id = "Hygon Dhyana Processor", + .cache_info = &epyc_cache_info, + }, }; typedef struct PropValue { @@ -3672,7 +3722,7 @@ static void x86_cpu_class_check_missing_features(X86CPUClass *xcc, /* Print all cpuid feature names in featureset */ -static void listflags(FILE *f, fprintf_function print, GList *features) +static void listflags(GList *features) { size_t len = 0; GList *tmp; @@ -3680,13 +3730,13 @@ static void listflags(FILE *f, fprintf_function print, GList *features) for (tmp = features; tmp; tmp = tmp->next) { const char *name = tmp->data; if ((len + strlen(name) + 1) >= 75) { - print(f, "\n"); + qemu_printf("\n"); len = 0; } - print(f, "%s%s", len == 0 ? " " : " ", name); + qemu_printf("%s%s", len == 0 ? " " : " ", name); len += strlen(name) + 1; } - print(f, "\n"); + qemu_printf("\n"); } /* Sort alphabetically by type name, respecting X86CPUClass::ordering. */ @@ -3722,32 +3772,26 @@ static void x86_cpu_list_entry(gpointer data, gpointer user_data) { ObjectClass *oc = data; X86CPUClass *cc = X86_CPU_CLASS(oc); - CPUListState *s = user_data; char *name = x86_cpu_class_get_model_name(cc); const char *desc = cc->model_description; if (!desc && cc->cpu_def) { desc = cc->cpu_def->model_id; } - (*s->cpu_fprintf)(s->file, "x86 %-20s %-48s\n", - name, desc); + qemu_printf("x86 %-20s %-48s\n", name, desc); g_free(name); } /* list available CPU models and flags */ -void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf) +void x86_cpu_list(void) { int i, j; - CPUListState s = { - .file = f, - .cpu_fprintf = cpu_fprintf, - }; GSList *list; GList *names = NULL; - (*cpu_fprintf)(f, "Available CPUs:\n"); + qemu_printf("Available CPUs:\n"); list = get_sorted_cpu_model_list(); - g_slist_foreach(list, x86_cpu_list_entry, &s); + g_slist_foreach(list, x86_cpu_list_entry, NULL); g_slist_free(list); names = NULL; @@ -3762,9 +3806,9 @@ void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf) names = g_list_sort(names, (GCompareFunc)strcmp); - (*cpu_fprintf)(f, "\nRecognized CPUID flags:\n"); - listflags(f, cpu_fprintf, names); - (*cpu_fprintf)(f, "\n"); + qemu_printf("\nRecognized CPUID flags:\n"); + listflags(names); + qemu_printf("\n"); g_list_free(names); } @@ -4547,6 +4591,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, break; case 0x8000001D: *eax = 0; + if (cpu->cache_info_passthrough) { + host_cpuid(index, count, eax, ebx, ecx, edx); + break; + } switch (count) { case 0: /* L1 dcache info */ encode_cache_cpuid8000001d(env->cache_info_amd.l1d_cache, cs, diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 83fb522554..0128910661 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -726,6 +726,8 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_VENDOR_VIA "CentaurHauls" +#define CPUID_VENDOR_HYGON "HygonGenuine" + #define CPUID_MWAIT_IBE (1U << 1) /* Interrupts can exit capability */ #define CPUID_MWAIT_EMX (1U << 0) /* enumeration supported */ @@ -1521,8 +1523,7 @@ int x86_cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu, void x86_cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, Error **errp); -void x86_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags); +void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags); hwaddr x86_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); @@ -1532,7 +1533,7 @@ int x86_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void x86_cpu_exec_enter(CPUState *cpu); void x86_cpu_exec_exit(CPUState *cpu); -void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf); +void x86_cpu_list(void); int cpu_x86_support_mca_broadcast(CPUX86State *env); int cpu_get_pic_interrupt(CPUX86State *s); @@ -1924,8 +1925,7 @@ void enable_compat_apic_id_mode(void); #define APIC_DEFAULT_ADDRESS 0xfee00000 #define APIC_SPACE_SIZE 0x100000 -void x86_cpu_dump_local_apic_state(CPUState *cs, FILE *f, - fprintf_function cpu_fprintf, int flags); +void x86_cpu_dump_local_apic_state(CPUState *cs, int flags); /* cpu.c */ bool cpu_is_bsp(X86CPU *cpu); diff --git a/target/i386/hax-all.c b/target/i386/hax-all.c index b978a9b821..44b89c1d74 100644 --- a/target/i386/hax-all.c +++ b/target/i386/hax-all.c @@ -540,7 +540,7 @@ static int hax_vcpu_hax_exec(CPUArchState *env) ht->_exit_reason); qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); hax_vcpu_sync_state(env, 0); - cpu_dump_state(cpu, stderr, fprintf, 0); + cpu_dump_state(cpu, stderr, 0); ret = -1; break; case HAX_EXIT_HLT: @@ -571,7 +571,7 @@ static int hax_vcpu_hax_exec(CPUArchState *env) fprintf(stderr, "Unknown exit %x from HAX\n", ht->_exit_status); qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); hax_vcpu_sync_state(env, 0); - cpu_dump_state(cpu, stderr, fprintf, 0); + cpu_dump_state(cpu, stderr, 0); ret = 1; break; } diff --git a/target/i386/helper.c b/target/i386/helper.c index e695f8ba7a..96336055f3 100644 --- a/target/i386/helper.c +++ b/target/i386/helper.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "qemu/qemu-print.h" #include "sysemu/kvm.h" #include "kvm_i386.h" #ifndef CONFIG_USER_ONLY @@ -155,38 +156,41 @@ static const char *cc_op_str[CC_OP_NB] = { }; static void -cpu_x86_dump_seg_cache(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf, +cpu_x86_dump_seg_cache(CPUX86State *env, FILE *f, const char *name, struct SegmentCache *sc) { #ifdef TARGET_X86_64 if (env->hflags & HF_CS64_MASK) { - cpu_fprintf(f, "%-3s=%04x %016" PRIx64 " %08x %08x", name, - sc->selector, sc->base, sc->limit, sc->flags & 0x00ffff00); + qemu_fprintf(f, "%-3s=%04x %016" PRIx64 " %08x %08x", name, + sc->selector, sc->base, sc->limit, + sc->flags & 0x00ffff00); } else #endif { - cpu_fprintf(f, "%-3s=%04x %08x %08x %08x", name, sc->selector, - (uint32_t)sc->base, sc->limit, sc->flags & 0x00ffff00); + qemu_fprintf(f, "%-3s=%04x %08x %08x %08x", name, sc->selector, + (uint32_t)sc->base, sc->limit, + sc->flags & 0x00ffff00); } if (!(env->hflags & HF_PE_MASK) || !(sc->flags & DESC_P_MASK)) goto done; - cpu_fprintf(f, " DPL=%d ", (sc->flags & DESC_DPL_MASK) >> DESC_DPL_SHIFT); + qemu_fprintf(f, " DPL=%d ", + (sc->flags & DESC_DPL_MASK) >> DESC_DPL_SHIFT); if (sc->flags & DESC_S_MASK) { if (sc->flags & DESC_CS_MASK) { - cpu_fprintf(f, (sc->flags & DESC_L_MASK) ? "CS64" : - ((sc->flags & DESC_B_MASK) ? "CS32" : "CS16")); - cpu_fprintf(f, " [%c%c", (sc->flags & DESC_C_MASK) ? 'C' : '-', - (sc->flags & DESC_R_MASK) ? 'R' : '-'); + qemu_fprintf(f, (sc->flags & DESC_L_MASK) ? "CS64" : + ((sc->flags & DESC_B_MASK) ? "CS32" : "CS16")); + qemu_fprintf(f, " [%c%c", (sc->flags & DESC_C_MASK) ? 'C' : '-', + (sc->flags & DESC_R_MASK) ? 'R' : '-'); } else { - cpu_fprintf(f, - (sc->flags & DESC_B_MASK || env->hflags & HF_LMA_MASK) - ? "DS " : "DS16"); - cpu_fprintf(f, " [%c%c", (sc->flags & DESC_E_MASK) ? 'E' : '-', - (sc->flags & DESC_W_MASK) ? 'W' : '-'); + qemu_fprintf(f, (sc->flags & DESC_B_MASK + || env->hflags & HF_LMA_MASK) + ? "DS " : "DS16"); + qemu_fprintf(f, " [%c%c", (sc->flags & DESC_E_MASK) ? 'E' : '-', + (sc->flags & DESC_W_MASK) ? 'W' : '-'); } - cpu_fprintf(f, "%c]", (sc->flags & DESC_A_MASK) ? 'A' : '-'); + qemu_fprintf(f, "%c]", (sc->flags & DESC_A_MASK) ? 'A' : '-'); } else { static const char *sys_type_name[2][16] = { { /* 32 bit mode */ @@ -202,13 +206,12 @@ cpu_x86_dump_seg_cache(CPUX86State *env, FILE *f, fprintf_function cpu_fprintf, "Reserved", "IntGate64", "TrapGate64" } }; - cpu_fprintf(f, "%s", - sys_type_name[(env->hflags & HF_LMA_MASK) ? 1 : 0] - [(sc->flags & DESC_TYPE_MASK) - >> DESC_TYPE_SHIFT]); + qemu_fprintf(f, "%s", + sys_type_name[(env->hflags & HF_LMA_MASK) ? 1 : 0] + [(sc->flags & DESC_TYPE_MASK) >> DESC_TYPE_SHIFT]); } done: - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } #ifndef CONFIG_USER_ONLY @@ -231,12 +234,10 @@ static inline const char *dm2str(uint32_t dm) return str[dm]; } -static void dump_apic_lvt(FILE *f, fprintf_function cpu_fprintf, - const char *name, uint32_t lvt, bool is_timer) +static void dump_apic_lvt(const char *name, uint32_t lvt, bool is_timer) { uint32_t dm = (lvt & APIC_LVT_DELIV_MOD) >> APIC_LVT_DELIV_MOD_SHIFT; - cpu_fprintf(f, - "%s\t 0x%08x %s %-5s %-6s %-7s %-12s %-6s", + qemu_printf("%s\t 0x%08x %s %-5s %-6s %-7s %-12s %-6s", name, lvt, lvt & APIC_LVT_INT_POLARITY ? "active-lo" : "active-hi", lvt & APIC_LVT_LEVEL_TRIGGER ? "level" : "edge", @@ -248,9 +249,9 @@ static void dump_apic_lvt(FILE *f, fprintf_function cpu_fprintf, "tsc-deadline" : "one-shot", dm2str(dm)); if (dm != APIC_DM_NMI) { - cpu_fprintf(f, " (vec %u)\n", lvt & APIC_VECTOR_MASK); + qemu_printf(" (vec %u)\n", lvt & APIC_VECTOR_MASK); } else { - cpu_fprintf(f, "\n"); + qemu_printf("\n"); } } @@ -282,8 +283,7 @@ static inline void mask2str(char *str, uint32_t val, uint8_t size) #define MAX_LOGICAL_APIC_ID_MASK_SIZE 16 -static void dump_apic_icr(FILE *f, fprintf_function cpu_fprintf, - APICCommonState *s, CPUX86State *env) +static void dump_apic_icr(APICCommonState *s, CPUX86State *env) { uint32_t icr = s->icr[0], icr2 = s->icr[1]; uint8_t dest_shorthand = \ @@ -293,16 +293,16 @@ static void dump_apic_icr(FILE *f, fprintf_function cpu_fprintf, uint32_t dest_field; bool x2apic; - cpu_fprintf(f, "ICR\t 0x%08x %s %s %s %s\n", + qemu_printf("ICR\t 0x%08x %s %s %s %s\n", icr, logical_mod ? "logical" : "physical", icr & APIC_ICR_TRIGGER_MOD ? "level" : "edge", icr & APIC_ICR_LEVEL ? "assert" : "de-assert", shorthand2str(dest_shorthand)); - cpu_fprintf(f, "ICR2\t 0x%08x", icr2); + qemu_printf("ICR2\t 0x%08x", icr2); if (dest_shorthand != 0) { - cpu_fprintf(f, "\n"); + qemu_printf("\n"); return; } x2apic = env->features[FEAT_1_ECX] & CPUID_EXT_X2APIC; @@ -310,9 +310,9 @@ static void dump_apic_icr(FILE *f, fprintf_function cpu_fprintf, if (!logical_mod) { if (x2apic) { - cpu_fprintf(f, " cpu %u (X2APIC ID)\n", dest_field); + qemu_printf(" cpu %u (X2APIC ID)\n", dest_field); } else { - cpu_fprintf(f, " cpu %u (APIC ID)\n", + qemu_printf(" cpu %u (APIC ID)\n", dest_field & APIC_LOGDEST_XAPIC_ID); } return; @@ -320,87 +320,84 @@ static void dump_apic_icr(FILE *f, fprintf_function cpu_fprintf, if (s->dest_mode == 0xf) { /* flat mode */ mask2str(apic_id_str, icr2 >> APIC_ICR_DEST_SHIFT, 8); - cpu_fprintf(f, " mask %s (APIC ID)\n", apic_id_str); + qemu_printf(" mask %s (APIC ID)\n", apic_id_str); } else if (s->dest_mode == 0) { /* cluster mode */ if (x2apic) { mask2str(apic_id_str, dest_field & APIC_LOGDEST_X2APIC_ID, 16); - cpu_fprintf(f, " cluster %u mask %s (X2APIC ID)\n", + qemu_printf(" cluster %u mask %s (X2APIC ID)\n", dest_field >> APIC_LOGDEST_X2APIC_SHIFT, apic_id_str); } else { mask2str(apic_id_str, dest_field & APIC_LOGDEST_XAPIC_ID, 4); - cpu_fprintf(f, " cluster %u mask %s (APIC ID)\n", + qemu_printf(" cluster %u mask %s (APIC ID)\n", dest_field >> APIC_LOGDEST_XAPIC_SHIFT, apic_id_str); } } } -static void dump_apic_interrupt(FILE *f, fprintf_function cpu_fprintf, - const char *name, uint32_t *ireg_tab, +static void dump_apic_interrupt(const char *name, uint32_t *ireg_tab, uint32_t *tmr_tab) { int i, empty = true; - cpu_fprintf(f, "%s\t ", name); + qemu_printf("%s\t ", name); for (i = 0; i < 256; i++) { if (apic_get_bit(ireg_tab, i)) { - cpu_fprintf(f, "%u%s ", i, + qemu_printf("%u%s ", i, apic_get_bit(tmr_tab, i) ? "(level)" : ""); empty = false; } } - cpu_fprintf(f, "%s\n", empty ? "(none)" : ""); + qemu_printf("%s\n", empty ? "(none)" : ""); } -void x86_cpu_dump_local_apic_state(CPUState *cs, FILE *f, - fprintf_function cpu_fprintf, int flags) +void x86_cpu_dump_local_apic_state(CPUState *cs, int flags) { X86CPU *cpu = X86_CPU(cs); APICCommonState *s = APIC_COMMON(cpu->apic_state); if (!s) { - cpu_fprintf(f, "local apic state not available\n"); + qemu_printf("local apic state not available\n"); return; } uint32_t *lvt = s->lvt; - cpu_fprintf(f, "dumping local APIC state for CPU %-2u\n\n", + qemu_printf("dumping local APIC state for CPU %-2u\n\n", CPU(cpu)->cpu_index); - dump_apic_lvt(f, cpu_fprintf, "LVT0", lvt[APIC_LVT_LINT0], false); - dump_apic_lvt(f, cpu_fprintf, "LVT1", lvt[APIC_LVT_LINT1], false); - dump_apic_lvt(f, cpu_fprintf, "LVTPC", lvt[APIC_LVT_PERFORM], false); - dump_apic_lvt(f, cpu_fprintf, "LVTERR", lvt[APIC_LVT_ERROR], false); - dump_apic_lvt(f, cpu_fprintf, "LVTTHMR", lvt[APIC_LVT_THERMAL], false); - dump_apic_lvt(f, cpu_fprintf, "LVTT", lvt[APIC_LVT_TIMER], true); - - cpu_fprintf(f, "Timer\t DCR=0x%x (divide by %u) initial_count = %u\n", + dump_apic_lvt("LVT0", lvt[APIC_LVT_LINT0], false); + dump_apic_lvt("LVT1", lvt[APIC_LVT_LINT1], false); + dump_apic_lvt("LVTPC", lvt[APIC_LVT_PERFORM], false); + dump_apic_lvt("LVTERR", lvt[APIC_LVT_ERROR], false); + dump_apic_lvt("LVTTHMR", lvt[APIC_LVT_THERMAL], false); + dump_apic_lvt("LVTT", lvt[APIC_LVT_TIMER], true); + + qemu_printf("Timer\t DCR=0x%x (divide by %u) initial_count = %u\n", s->divide_conf & APIC_DCR_MASK, divider_conf(s->divide_conf), s->initial_count); - cpu_fprintf(f, "SPIV\t 0x%08x APIC %s, focus=%s, spurious vec %u\n", + qemu_printf("SPIV\t 0x%08x APIC %s, focus=%s, spurious vec %u\n", s->spurious_vec, s->spurious_vec & APIC_SPURIO_ENABLED ? "enabled" : "disabled", s->spurious_vec & APIC_SPURIO_FOCUS ? "on" : "off", s->spurious_vec & APIC_VECTOR_MASK); - dump_apic_icr(f, cpu_fprintf, s, &cpu->env); + dump_apic_icr(s, &cpu->env); - cpu_fprintf(f, "ESR\t 0x%08x\n", s->esr); + qemu_printf("ESR\t 0x%08x\n", s->esr); - dump_apic_interrupt(f, cpu_fprintf, "ISR", s->isr, s->tmr); - dump_apic_interrupt(f, cpu_fprintf, "IRR", s->irr, s->tmr); + dump_apic_interrupt("ISR", s->isr, s->tmr); + dump_apic_interrupt("IRR", s->irr, s->tmr); - cpu_fprintf(f, "\nAPR 0x%02x TPR 0x%02x DFR 0x%02x LDR 0x%02x", + qemu_printf("\nAPR 0x%02x TPR 0x%02x DFR 0x%02x LDR 0x%02x", s->arb_id, s->tpr, s->dest_mode, s->log_dest); if (s->dest_mode == 0) { - cpu_fprintf(f, "(cluster %u: id %u)", + qemu_printf("(cluster %u: id %u)", s->log_dest >> APIC_LOGDEST_XAPIC_SHIFT, s->log_dest & APIC_LOGDEST_XAPIC_ID); } - cpu_fprintf(f, " PPR 0x%02x\n", apic_get_ppr(s)); + qemu_printf(" PPR 0x%02x\n", apic_get_ppr(s)); } #else -void x86_cpu_dump_local_apic_state(CPUState *cs, FILE *f, - fprintf_function cpu_fprintf, int flags) +void x86_cpu_dump_local_apic_state(CPUState *cs, int flags) { } #endif /* !CONFIG_USER_ONLY */ @@ -408,8 +405,7 @@ void x86_cpu_dump_local_apic_state(CPUState *cs, FILE *f, #define DUMP_CODE_BYTES_TOTAL 50 #define DUMP_CODE_BYTES_BACKWARD 20 -void x86_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags) +void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags) { X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; @@ -420,109 +416,107 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, eflags = cpu_compute_eflags(env); #ifdef TARGET_X86_64 if (env->hflags & HF_CS64_MASK) { - cpu_fprintf(f, - "RAX=%016" PRIx64 " RBX=%016" PRIx64 " RCX=%016" PRIx64 " RDX=%016" PRIx64 "\n" - "RSI=%016" PRIx64 " RDI=%016" PRIx64 " RBP=%016" PRIx64 " RSP=%016" PRIx64 "\n" - "R8 =%016" PRIx64 " R9 =%016" PRIx64 " R10=%016" PRIx64 " R11=%016" PRIx64 "\n" - "R12=%016" PRIx64 " R13=%016" PRIx64 " R14=%016" PRIx64 " R15=%016" PRIx64 "\n" - "RIP=%016" PRIx64 " RFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d SMM=%d HLT=%d\n", - env->regs[R_EAX], - env->regs[R_EBX], - env->regs[R_ECX], - env->regs[R_EDX], - env->regs[R_ESI], - env->regs[R_EDI], - env->regs[R_EBP], - env->regs[R_ESP], - env->regs[8], - env->regs[9], - env->regs[10], - env->regs[11], - env->regs[12], - env->regs[13], - env->regs[14], - env->regs[15], - env->eip, eflags, - eflags & DF_MASK ? 'D' : '-', - eflags & CC_O ? 'O' : '-', - eflags & CC_S ? 'S' : '-', - eflags & CC_Z ? 'Z' : '-', - eflags & CC_A ? 'A' : '-', - eflags & CC_P ? 'P' : '-', - eflags & CC_C ? 'C' : '-', - env->hflags & HF_CPL_MASK, - (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, - (env->a20_mask >> 20) & 1, - (env->hflags >> HF_SMM_SHIFT) & 1, - cs->halted); + qemu_fprintf(f, "RAX=%016" PRIx64 " RBX=%016" PRIx64 " RCX=%016" PRIx64 " RDX=%016" PRIx64 "\n" + "RSI=%016" PRIx64 " RDI=%016" PRIx64 " RBP=%016" PRIx64 " RSP=%016" PRIx64 "\n" + "R8 =%016" PRIx64 " R9 =%016" PRIx64 " R10=%016" PRIx64 " R11=%016" PRIx64 "\n" + "R12=%016" PRIx64 " R13=%016" PRIx64 " R14=%016" PRIx64 " R15=%016" PRIx64 "\n" + "RIP=%016" PRIx64 " RFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d SMM=%d HLT=%d\n", + env->regs[R_EAX], + env->regs[R_EBX], + env->regs[R_ECX], + env->regs[R_EDX], + env->regs[R_ESI], + env->regs[R_EDI], + env->regs[R_EBP], + env->regs[R_ESP], + env->regs[8], + env->regs[9], + env->regs[10], + env->regs[11], + env->regs[12], + env->regs[13], + env->regs[14], + env->regs[15], + env->eip, eflags, + eflags & DF_MASK ? 'D' : '-', + eflags & CC_O ? 'O' : '-', + eflags & CC_S ? 'S' : '-', + eflags & CC_Z ? 'Z' : '-', + eflags & CC_A ? 'A' : '-', + eflags & CC_P ? 'P' : '-', + eflags & CC_C ? 'C' : '-', + env->hflags & HF_CPL_MASK, + (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, + (env->a20_mask >> 20) & 1, + (env->hflags >> HF_SMM_SHIFT) & 1, + cs->halted); } else #endif { - cpu_fprintf(f, "EAX=%08x EBX=%08x ECX=%08x EDX=%08x\n" - "ESI=%08x EDI=%08x EBP=%08x ESP=%08x\n" - "EIP=%08x EFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d SMM=%d HLT=%d\n", - (uint32_t)env->regs[R_EAX], - (uint32_t)env->regs[R_EBX], - (uint32_t)env->regs[R_ECX], - (uint32_t)env->regs[R_EDX], - (uint32_t)env->regs[R_ESI], - (uint32_t)env->regs[R_EDI], - (uint32_t)env->regs[R_EBP], - (uint32_t)env->regs[R_ESP], - (uint32_t)env->eip, eflags, - eflags & DF_MASK ? 'D' : '-', - eflags & CC_O ? 'O' : '-', - eflags & CC_S ? 'S' : '-', - eflags & CC_Z ? 'Z' : '-', - eflags & CC_A ? 'A' : '-', - eflags & CC_P ? 'P' : '-', - eflags & CC_C ? 'C' : '-', - env->hflags & HF_CPL_MASK, - (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, - (env->a20_mask >> 20) & 1, - (env->hflags >> HF_SMM_SHIFT) & 1, - cs->halted); + qemu_fprintf(f, "EAX=%08x EBX=%08x ECX=%08x EDX=%08x\n" + "ESI=%08x EDI=%08x EBP=%08x ESP=%08x\n" + "EIP=%08x EFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d SMM=%d HLT=%d\n", + (uint32_t)env->regs[R_EAX], + (uint32_t)env->regs[R_EBX], + (uint32_t)env->regs[R_ECX], + (uint32_t)env->regs[R_EDX], + (uint32_t)env->regs[R_ESI], + (uint32_t)env->regs[R_EDI], + (uint32_t)env->regs[R_EBP], + (uint32_t)env->regs[R_ESP], + (uint32_t)env->eip, eflags, + eflags & DF_MASK ? 'D' : '-', + eflags & CC_O ? 'O' : '-', + eflags & CC_S ? 'S' : '-', + eflags & CC_Z ? 'Z' : '-', + eflags & CC_A ? 'A' : '-', + eflags & CC_P ? 'P' : '-', + eflags & CC_C ? 'C' : '-', + env->hflags & HF_CPL_MASK, + (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, + (env->a20_mask >> 20) & 1, + (env->hflags >> HF_SMM_SHIFT) & 1, + cs->halted); } for(i = 0; i < 6; i++) { - cpu_x86_dump_seg_cache(env, f, cpu_fprintf, seg_name[i], - &env->segs[i]); + cpu_x86_dump_seg_cache(env, f, seg_name[i], &env->segs[i]); } - cpu_x86_dump_seg_cache(env, f, cpu_fprintf, "LDT", &env->ldt); - cpu_x86_dump_seg_cache(env, f, cpu_fprintf, "TR", &env->tr); + cpu_x86_dump_seg_cache(env, f, "LDT", &env->ldt); + cpu_x86_dump_seg_cache(env, f, "TR", &env->tr); #ifdef TARGET_X86_64 if (env->hflags & HF_LMA_MASK) { - cpu_fprintf(f, "GDT= %016" PRIx64 " %08x\n", - env->gdt.base, env->gdt.limit); - cpu_fprintf(f, "IDT= %016" PRIx64 " %08x\n", - env->idt.base, env->idt.limit); - cpu_fprintf(f, "CR0=%08x CR2=%016" PRIx64 " CR3=%016" PRIx64 " CR4=%08x\n", - (uint32_t)env->cr[0], - env->cr[2], - env->cr[3], - (uint32_t)env->cr[4]); + qemu_fprintf(f, "GDT= %016" PRIx64 " %08x\n", + env->gdt.base, env->gdt.limit); + qemu_fprintf(f, "IDT= %016" PRIx64 " %08x\n", + env->idt.base, env->idt.limit); + qemu_fprintf(f, "CR0=%08x CR2=%016" PRIx64 " CR3=%016" PRIx64 " CR4=%08x\n", + (uint32_t)env->cr[0], + env->cr[2], + env->cr[3], + (uint32_t)env->cr[4]); for(i = 0; i < 4; i++) - cpu_fprintf(f, "DR%d=%016" PRIx64 " ", i, env->dr[i]); - cpu_fprintf(f, "\nDR6=%016" PRIx64 " DR7=%016" PRIx64 "\n", - env->dr[6], env->dr[7]); + qemu_fprintf(f, "DR%d=%016" PRIx64 " ", i, env->dr[i]); + qemu_fprintf(f, "\nDR6=%016" PRIx64 " DR7=%016" PRIx64 "\n", + env->dr[6], env->dr[7]); } else #endif { - cpu_fprintf(f, "GDT= %08x %08x\n", - (uint32_t)env->gdt.base, env->gdt.limit); - cpu_fprintf(f, "IDT= %08x %08x\n", - (uint32_t)env->idt.base, env->idt.limit); - cpu_fprintf(f, "CR0=%08x CR2=%08x CR3=%08x CR4=%08x\n", - (uint32_t)env->cr[0], - (uint32_t)env->cr[2], - (uint32_t)env->cr[3], - (uint32_t)env->cr[4]); + qemu_fprintf(f, "GDT= %08x %08x\n", + (uint32_t)env->gdt.base, env->gdt.limit); + qemu_fprintf(f, "IDT= %08x %08x\n", + (uint32_t)env->idt.base, env->idt.limit); + qemu_fprintf(f, "CR0=%08x CR2=%08x CR3=%08x CR4=%08x\n", + (uint32_t)env->cr[0], + (uint32_t)env->cr[2], + (uint32_t)env->cr[3], + (uint32_t)env->cr[4]); for(i = 0; i < 4; i++) { - cpu_fprintf(f, "DR%d=" TARGET_FMT_lx " ", i, env->dr[i]); + qemu_fprintf(f, "DR%d=" TARGET_FMT_lx " ", i, env->dr[i]); } - cpu_fprintf(f, "\nDR6=" TARGET_FMT_lx " DR7=" TARGET_FMT_lx "\n", - env->dr[6], env->dr[7]); + qemu_fprintf(f, "\nDR6=" TARGET_FMT_lx " DR7=" TARGET_FMT_lx "\n", + env->dr[6], env->dr[7]); } if (flags & CPU_DUMP_CCOP) { if ((unsigned)env->cc_op < CC_OP_NB) @@ -531,55 +525,55 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, snprintf(cc_op_name, sizeof(cc_op_name), "[%d]", env->cc_op); #ifdef TARGET_X86_64 if (env->hflags & HF_CS64_MASK) { - cpu_fprintf(f, "CCS=%016" PRIx64 " CCD=%016" PRIx64 " CCO=%-8s\n", - env->cc_src, env->cc_dst, - cc_op_name); + qemu_fprintf(f, "CCS=%016" PRIx64 " CCD=%016" PRIx64 " CCO=%-8s\n", + env->cc_src, env->cc_dst, + cc_op_name); } else #endif { - cpu_fprintf(f, "CCS=%08x CCD=%08x CCO=%-8s\n", - (uint32_t)env->cc_src, (uint32_t)env->cc_dst, - cc_op_name); + qemu_fprintf(f, "CCS=%08x CCD=%08x CCO=%-8s\n", + (uint32_t)env->cc_src, (uint32_t)env->cc_dst, + cc_op_name); } } - cpu_fprintf(f, "EFER=%016" PRIx64 "\n", env->efer); + qemu_fprintf(f, "EFER=%016" PRIx64 "\n", env->efer); if (flags & CPU_DUMP_FPU) { int fptag; fptag = 0; for(i = 0; i < 8; i++) { fptag |= ((!env->fptags[i]) << i); } - cpu_fprintf(f, "FCW=%04x FSW=%04x [ST=%d] FTW=%02x MXCSR=%08x\n", - env->fpuc, - (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11, - env->fpstt, - fptag, - env->mxcsr); + qemu_fprintf(f, "FCW=%04x FSW=%04x [ST=%d] FTW=%02x MXCSR=%08x\n", + env->fpuc, + (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11, + env->fpstt, + fptag, + env->mxcsr); for(i=0;i<8;i++) { CPU_LDoubleU u; u.d = env->fpregs[i].d; - cpu_fprintf(f, "FPR%d=%016" PRIx64 " %04x", - i, u.l.lower, u.l.upper); + qemu_fprintf(f, "FPR%d=%016" PRIx64 " %04x", + i, u.l.lower, u.l.upper); if ((i & 1) == 1) - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); else - cpu_fprintf(f, " "); + qemu_fprintf(f, " "); } if (env->hflags & HF_CS64_MASK) nb = 16; else nb = 8; for(i=0;i<nb;i++) { - cpu_fprintf(f, "XMM%02d=%08x%08x%08x%08x", - i, - env->xmm_regs[i].ZMM_L(3), - env->xmm_regs[i].ZMM_L(2), - env->xmm_regs[i].ZMM_L(1), - env->xmm_regs[i].ZMM_L(0)); + qemu_fprintf(f, "XMM%02d=%08x%08x%08x%08x", + i, + env->xmm_regs[i].ZMM_L(3), + env->xmm_regs[i].ZMM_L(2), + env->xmm_regs[i].ZMM_L(1), + env->xmm_regs[i].ZMM_L(0)); if ((i & 1) == 1) - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); else - cpu_fprintf(f, " "); + qemu_fprintf(f, " "); } } if (flags & CPU_DUMP_CODE) { @@ -588,17 +582,17 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, uint8_t code; char codestr[3]; - cpu_fprintf(f, "Code="); + qemu_fprintf(f, "Code="); for (i = 0; i < DUMP_CODE_BYTES_TOTAL; i++) { if (cpu_memory_rw_debug(cs, base - offs + i, &code, 1, 0) == 0) { snprintf(codestr, sizeof(codestr), "%02x", code); } else { snprintf(codestr, sizeof(codestr), "??"); } - cpu_fprintf(f, "%s%s%s%s", i > 0 ? " " : "", - i == offs ? "<" : "", codestr, i == offs ? ">" : ""); + qemu_fprintf(f, "%s%s%s%s", i > 0 ? " " : "", + i == offs ? "<" : "", codestr, i == offs ? ">" : ""); } - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } } diff --git a/target/i386/kvm.c b/target/i386/kvm.c index beae1b99da..3b29ce5c0d 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -389,6 +389,15 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, if (host_tsx_blacklisted()) { ret &= ~(CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_HLE); } + } else if (function == 7 && index == 0 && reg == R_EDX) { + /* + * Linux v4.17-v4.20 incorrectly return ARCH_CAPABILITIES on SVM hosts. + * We can detect the bug by checking if MSR_IA32_ARCH_CAPABILITIES is + * returned by KVM_GET_MSR_INDEX_LIST. + */ + if (!has_msr_arch_capabs) { + ret &= ~CPUID_7_0_EDX_ARCH_CAPABILITIES; + } } else if (function == 0x80000001 && reg == R_ECX) { /* * It's safe to enable TOPOEXT even if it's not returned by diff --git a/target/i386/monitor.c b/target/i386/monitor.c index 74a13c571b..56e2dbece7 100644 --- a/target/i386/monitor.c +++ b/target/i386/monitor.c @@ -664,8 +664,7 @@ void hmp_info_local_apic(Monitor *mon, const QDict *qdict) monitor_printf(mon, "No CPU available\n"); return; } - x86_cpu_dump_local_apic_state(cs, (FILE *)mon, monitor_fprintf, - CPU_DUMP_FPU); + x86_cpu_dump_local_apic_state(cs, CPU_DUMP_FPU); } void hmp_info_io_apic(Monitor *mon, const QDict *qdict) diff --git a/target/i386/sev.c b/target/i386/sev.c index 20b2d325d8..cd77f6b5d4 100644 --- a/target/i386/sev.c +++ b/target/i386/sev.c @@ -131,6 +131,17 @@ sev_ram_block_added(RAMBlockNotifier *n, void *host, size_t size) { int r; struct kvm_enc_region range; + ram_addr_t offset; + MemoryRegion *mr; + + /* + * The RAM device presents a memory region that should be treated + * as IO region and should not be pinned. + */ + mr = memory_region_from_host(host, &offset); + if (mr && memory_region_is_ram_device(mr)) { + return; + } range.addr = (__u64)(unsigned long)host; range.size = size; diff --git a/target/i386/trace-events b/target/i386/trace-events index 6a19a69af5..789c700d4a 100644 --- a/target/i386/trace-events +++ b/target/i386/trace-events @@ -1,12 +1,12 @@ # See docs/devel/tracing.txt for syntax documentation. -# target/i386/kvm.c +# kvm.c kvm_x86_fixup_msi_error(uint32_t gsi) "VT-d failed to remap interrupt for GSI %" PRIu32 kvm_x86_add_msi_route(int virq) "Adding route entry for virq %d" kvm_x86_remove_msi_route(int virq) "Removing route entry for virq %d" kvm_x86_update_msi_routes(int num) "Updated %d MSI routes" -# target/i386/sev.c +# sev.c kvm_sev_init(void) "" kvm_memcrypt_register_region(void *addr, size_t len) "addr %p len 0x%zu" kvm_memcrypt_unregister_region(void *addr, size_t len) "addr %p len 0x%zu" diff --git a/target/i386/translate.c b/target/i386/translate.c index 49cd298374..77d6b73e42 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -1398,6 +1398,11 @@ static void gen_op(DisasContext *s1, int op, TCGMemOp ot, int d) static void gen_inc(DisasContext *s1, TCGMemOp ot, int d, int c) { if (s1->prefix & PREFIX_LOCK) { + if (d != OR_TMP0) { + /* Lock prefix when destination is not memory */ + gen_illegal_opcode(s1); + return; + } tcg_gen_movi_tl(s1->T0, c > 0 ? 1 : -1); tcg_gen_atomic_add_fetch_tl(s1->T0, s1->A0, s1->T0, s1->mem_index, ot | MO_LE); @@ -8585,11 +8590,11 @@ static const TranslatorOps i386_tr_ops = { }; /* generate intermediate code for basic block 'tb'. */ -void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb) +void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns) { DisasContext dc; - translator_loop(&i386_tr_ops, &dc.base, cpu, tb); + translator_loop(&i386_tr_ops, &dc.base, cpu, tb, max_insns); } void restore_state_to_opc(CPUX86State *env, TranslationBlock *tb, diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c index b7499cb627..282da19994 100644 --- a/target/lm32/cpu.c +++ b/target/lm32/cpu.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" +#include "qemu/qemu-print.h" #include "cpu.h" #include "qemu-common.h" @@ -34,27 +35,22 @@ static void lm32_cpu_set_pc(CPUState *cs, vaddr value) static void lm32_cpu_list_entry(gpointer data, gpointer user_data) { ObjectClass *oc = data; - CPUListState *s = user_data; const char *typename = object_class_get_name(oc); char *name; name = g_strndup(typename, strlen(typename) - strlen(LM32_CPU_TYPE_SUFFIX)); - (*s->cpu_fprintf)(s->file, " %s\n", name); + qemu_printf(" %s\n", name); g_free(name); } -void lm32_cpu_list(FILE *f, fprintf_function cpu_fprintf) +void lm32_cpu_list(void) { - CPUListState s = { - .file = f, - .cpu_fprintf = cpu_fprintf, - }; GSList *list; list = object_class_get_list_sorted(TYPE_LM32_CPU, false); - (*cpu_fprintf)(f, "Available CPUs:\n"); - g_slist_foreach(list, lm32_cpu_list_entry, &s); + qemu_printf("Available CPUs:\n"); + g_slist_foreach(list, lm32_cpu_list_entry, NULL); g_slist_free(list); } diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h index 66157eefe9..9b1e6c2d58 100644 --- a/target/lm32/cpu.h +++ b/target/lm32/cpu.h @@ -219,8 +219,7 @@ extern const struct VMStateDescription vmstate_lm32_cpu; void lm32_cpu_do_interrupt(CPUState *cpu); bool lm32_cpu_exec_interrupt(CPUState *cs, int int_req); -void lm32_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, - int flags); +void lm32_cpu_dump_state(CPUState *cpu, FILE *f, int flags); hwaddr lm32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int lm32_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int lm32_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); @@ -243,7 +242,7 @@ static inline lm32_wp_t lm32_wp_type(uint32_t dc, int idx) is returned if the signal was handled by the virtual CPU. */ int cpu_lm32_signal_handler(int host_signum, void *pinfo, void *puc); -void lm32_cpu_list(FILE *f, fprintf_function cpu_fprintf); +void lm32_cpu_list(void); void lm32_translate_init(void); void cpu_lm32_set_phys_msb_ignore(CPULM32State *env, int value); void QEMU_NORETURN raise_exception(CPULM32State *env, int index); diff --git a/target/lm32/translate.c b/target/lm32/translate.c index b32feb7564..f0e0e7058e 100644 --- a/target/lm32/translate.c +++ b/target/lm32/translate.c @@ -24,6 +24,7 @@ #include "exec/exec-all.h" #include "exec/translator.h" #include "tcg-op.h" +#include "qemu/qemu-print.h" #include "exec/cpu_ldst.h" #include "hw/lm32/lm32_pic.h" @@ -1049,7 +1050,7 @@ static inline void decode(DisasContext *dc, uint32_t ir) } /* generate intermediate code for basic block 'tb'. */ -void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { CPULM32State *env = cs->env_ptr; LM32CPU *cpu = lm32_env_get_cpu(env); @@ -1057,7 +1058,6 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) uint32_t pc_start; uint32_t page_start; int num_insns; - int max_insns; pc_start = tb->pc; dc->features = cpu->features; @@ -1077,13 +1077,6 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) page_start = pc_start & TARGET_PAGE_MASK; num_insns = 0; - max_insns = tb_cflags(tb) & CF_COUNT_MASK; - if (max_insns == 0) { - max_insns = CF_COUNT_MASK; - } - if (max_insns > TCG_MAX_INSNS) { - max_insns = TCG_MAX_INSNS; - } gen_tb_start(tb); do { @@ -1161,38 +1154,37 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) #endif } -void lm32_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags) +void lm32_cpu_dump_state(CPUState *cs, FILE *f, int flags) { LM32CPU *cpu = LM32_CPU(cs); CPULM32State *env = &cpu->env; int i; - if (!env || !f) { + if (!env) { return; } - cpu_fprintf(f, "IN: PC=%x %s\n", - env->pc, lookup_symbol(env->pc)); + qemu_fprintf(f, "IN: PC=%x %s\n", + env->pc, lookup_symbol(env->pc)); - cpu_fprintf(f, "ie=%8.8x (IE=%x EIE=%x BIE=%x) im=%8.8x ip=%8.8x\n", - env->ie, - (env->ie & IE_IE) ? 1 : 0, - (env->ie & IE_EIE) ? 1 : 0, - (env->ie & IE_BIE) ? 1 : 0, - lm32_pic_get_im(env->pic_state), - lm32_pic_get_ip(env->pic_state)); - cpu_fprintf(f, "eba=%8.8x deba=%8.8x\n", - env->eba, - env->deba); + qemu_fprintf(f, "ie=%8.8x (IE=%x EIE=%x BIE=%x) im=%8.8x ip=%8.8x\n", + env->ie, + (env->ie & IE_IE) ? 1 : 0, + (env->ie & IE_EIE) ? 1 : 0, + (env->ie & IE_BIE) ? 1 : 0, + lm32_pic_get_im(env->pic_state), + lm32_pic_get_ip(env->pic_state)); + qemu_fprintf(f, "eba=%8.8x deba=%8.8x\n", + env->eba, + env->deba); for (i = 0; i < 32; i++) { - cpu_fprintf(f, "r%2.2d=%8.8x ", i, env->regs[i]); + qemu_fprintf(f, "r%2.2d=%8.8x ", i, env->regs[i]); if ((i + 1) % 4 == 0) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } } - cpu_fprintf(f, "\n\n"); + qemu_fprintf(f, "\n\n"); } void restore_state_to_opc(CPULM32State *env, TranslationBlock *tb, diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index f154565117..ad41608341 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -179,8 +179,7 @@ static inline M68kCPU *m68k_env_get_cpu(CPUM68KState *env) void m68k_cpu_do_interrupt(CPUState *cpu); bool m68k_cpu_exec_interrupt(CPUState *cpu, int int_req); -void m68k_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, - int flags); +void m68k_cpu_dump_state(CPUState *cpu, FILE *f, int flags); hwaddr m68k_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int m68k_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int m68k_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); @@ -499,7 +498,7 @@ static inline int m68k_feature(CPUM68KState *env, int feature) return (env->features & (1u << feature)) != 0; } -void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf); +void m68k_cpu_list(void); void register_m68k_insns (CPUM68KState *env); @@ -573,5 +572,6 @@ static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc, } } -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUM68KState *env); +void dump_mmu(CPUM68KState *env); + #endif diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 3e26d337bf..d958a34959 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -22,9 +22,9 @@ #include "cpu.h" #include "exec/exec-all.h" #include "exec/gdbstub.h" - #include "exec/helper-proto.h" #include "fpu/softfloat.h" +#include "qemu/qemu-print.h" #define SIGNBIT (1u << 31) @@ -49,28 +49,22 @@ static gint m68k_cpu_list_compare(gconstpointer a, gconstpointer b) static void m68k_cpu_list_entry(gpointer data, gpointer user_data) { ObjectClass *c = data; - CPUListState *s = user_data; const char *typename; char *name; typename = object_class_get_name(c); name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_M68K_CPU)); - (*s->cpu_fprintf)(s->file, "%s\n", - name); + qemu_printf("%s\n", name); g_free(name); } -void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf) +void m68k_cpu_list(void) { - CPUListState s = { - .file = f, - .cpu_fprintf = cpu_fprintf, - }; GSList *list; list = object_class_get_list(TYPE_M68K_CPU, false); list = g_slist_sort(list, m68k_cpu_list_compare); - g_slist_foreach(list, m68k_cpu_list_entry, &s); + g_slist_foreach(list, m68k_cpu_list_entry, NULL); g_slist_free(list); } @@ -375,30 +369,28 @@ int m68k_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, /* MMU: 68040 only */ -static void print_address_zone(FILE *f, fprintf_function cpu_fprintf, - uint32_t logical, uint32_t physical, +static void print_address_zone(uint32_t logical, uint32_t physical, uint32_t size, int attr) { - cpu_fprintf(f, "%08x - %08x -> %08x - %08x %c ", + qemu_printf("%08x - %08x -> %08x - %08x %c ", logical, logical + size - 1, physical, physical + size - 1, attr & 4 ? 'W' : '-'); size >>= 10; if (size < 1024) { - cpu_fprintf(f, "(%d KiB)\n", size); + qemu_printf("(%d KiB)\n", size); } else { size >>= 10; if (size < 1024) { - cpu_fprintf(f, "(%d MiB)\n", size); + qemu_printf("(%d MiB)\n", size); } else { size >>= 10; - cpu_fprintf(f, "(%d GiB)\n", size); + qemu_printf("(%d GiB)\n", size); } } } -static void dump_address_map(FILE *f, fprintf_function cpu_fprintf, - CPUM68KState *env, uint32_t root_pointer) +static void dump_address_map(CPUM68KState *env, uint32_t root_pointer) { int i, j, k; int tic_size, tic_shift; @@ -460,7 +452,7 @@ static void dump_address_map(FILE *f, fprintf_function cpu_fprintf, if (first_logical != 0xffffffff) { size = last_logical + (1 << tic_shift) - first_logical; - print_address_zone(f, cpu_fprintf, first_logical, + print_address_zone(first_logical, first_physical, size, last_attr); } first_logical = logical; @@ -471,126 +463,125 @@ static void dump_address_map(FILE *f, fprintf_function cpu_fprintf, } if (first_logical != logical || (attr & 4) != (last_attr & 4)) { size = logical + (1 << tic_shift) - first_logical; - print_address_zone(f, cpu_fprintf, first_logical, first_physical, size, - last_attr); + print_address_zone(first_logical, first_physical, size, last_attr); } } #define DUMP_CACHEFLAGS(a) \ switch (a & M68K_DESC_CACHEMODE) { \ case M68K_DESC_CM_WRTHRU: /* cachable, write-through */ \ - cpu_fprintf(f, "T"); \ + qemu_printf("T"); \ break; \ case M68K_DESC_CM_COPYBK: /* cachable, copyback */ \ - cpu_fprintf(f, "C"); \ + qemu_printf("C"); \ break; \ case M68K_DESC_CM_SERIAL: /* noncachable, serialized */ \ - cpu_fprintf(f, "S"); \ + qemu_printf("S"); \ break; \ case M68K_DESC_CM_NCACHE: /* noncachable */ \ - cpu_fprintf(f, "N"); \ + qemu_printf("N"); \ break; \ } -static void dump_ttr(FILE *f, fprintf_function cpu_fprintf, uint32_t ttr) +static void dump_ttr(uint32_t ttr) { if ((ttr & M68K_TTR_ENABLED) == 0) { - cpu_fprintf(f, "disabled\n"); + qemu_printf("disabled\n"); return; } - cpu_fprintf(f, "Base: 0x%08x Mask: 0x%08x Control: ", + qemu_printf("Base: 0x%08x Mask: 0x%08x Control: ", ttr & M68K_TTR_ADDR_BASE, (ttr & M68K_TTR_ADDR_MASK) << M68K_TTR_ADDR_MASK_SHIFT); switch (ttr & M68K_TTR_SFIELD) { case M68K_TTR_SFIELD_USER: - cpu_fprintf(f, "U"); + qemu_printf("U"); break; case M68K_TTR_SFIELD_SUPER: - cpu_fprintf(f, "S"); + qemu_printf("S"); break; default: - cpu_fprintf(f, "*"); + qemu_printf("*"); break; } DUMP_CACHEFLAGS(ttr); if (ttr & M68K_DESC_WRITEPROT) { - cpu_fprintf(f, "R"); + qemu_printf("R"); } else { - cpu_fprintf(f, "W"); + qemu_printf("W"); } - cpu_fprintf(f, " U: %d\n", (ttr & M68K_DESC_USERATTR) >> + qemu_printf(" U: %d\n", (ttr & M68K_DESC_USERATTR) >> M68K_DESC_USERATTR_SHIFT); } -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUM68KState *env) +void dump_mmu(CPUM68KState *env) { if ((env->mmu.tcr & M68K_TCR_ENABLED) == 0) { - cpu_fprintf(f, "Translation disabled\n"); + qemu_printf("Translation disabled\n"); return; } - cpu_fprintf(f, "Page Size: "); + qemu_printf("Page Size: "); if (env->mmu.tcr & M68K_TCR_PAGE_8K) { - cpu_fprintf(f, "8kB\n"); + qemu_printf("8kB\n"); } else { - cpu_fprintf(f, "4kB\n"); + qemu_printf("4kB\n"); } - cpu_fprintf(f, "MMUSR: "); + qemu_printf("MMUSR: "); if (env->mmu.mmusr & M68K_MMU_B_040) { - cpu_fprintf(f, "BUS ERROR\n"); + qemu_printf("BUS ERROR\n"); } else { - cpu_fprintf(f, "Phy=%08x Flags: ", env->mmu.mmusr & 0xfffff000); + qemu_printf("Phy=%08x Flags: ", env->mmu.mmusr & 0xfffff000); /* flags found on the page descriptor */ if (env->mmu.mmusr & M68K_MMU_G_040) { - cpu_fprintf(f, "G"); /* Global */ + qemu_printf("G"); /* Global */ } else { - cpu_fprintf(f, "."); + qemu_printf("."); } if (env->mmu.mmusr & M68K_MMU_S_040) { - cpu_fprintf(f, "S"); /* Supervisor */ + qemu_printf("S"); /* Supervisor */ } else { - cpu_fprintf(f, "."); + qemu_printf("."); } if (env->mmu.mmusr & M68K_MMU_M_040) { - cpu_fprintf(f, "M"); /* Modified */ + qemu_printf("M"); /* Modified */ } else { - cpu_fprintf(f, "."); + qemu_printf("."); } if (env->mmu.mmusr & M68K_MMU_WP_040) { - cpu_fprintf(f, "W"); /* Write protect */ + qemu_printf("W"); /* Write protect */ } else { - cpu_fprintf(f, "."); + qemu_printf("."); } if (env->mmu.mmusr & M68K_MMU_T_040) { - cpu_fprintf(f, "T"); /* Transparent */ + qemu_printf("T"); /* Transparent */ } else { - cpu_fprintf(f, "."); + qemu_printf("."); } if (env->mmu.mmusr & M68K_MMU_R_040) { - cpu_fprintf(f, "R"); /* Resident */ + qemu_printf("R"); /* Resident */ } else { - cpu_fprintf(f, "."); + qemu_printf("."); } - cpu_fprintf(f, " Cache: "); + qemu_printf(" Cache: "); DUMP_CACHEFLAGS(env->mmu.mmusr); - cpu_fprintf(f, " U: %d\n", (env->mmu.mmusr >> 8) & 3); - cpu_fprintf(f, "\n"); + qemu_printf(" U: %d\n", (env->mmu.mmusr >> 8) & 3); + qemu_printf("\n"); } - cpu_fprintf(f, "ITTR0: "); - dump_ttr(f, cpu_fprintf, env->mmu.ttr[M68K_ITTR0]); - cpu_fprintf(f, "ITTR1: "); - dump_ttr(f, cpu_fprintf, env->mmu.ttr[M68K_ITTR1]); - cpu_fprintf(f, "DTTR0: "); - dump_ttr(f, cpu_fprintf, env->mmu.ttr[M68K_DTTR0]); - cpu_fprintf(f, "DTTR1: "); - dump_ttr(f, cpu_fprintf, env->mmu.ttr[M68K_DTTR1]); + qemu_printf("ITTR0: "); + dump_ttr(env->mmu.ttr[M68K_ITTR0]); + qemu_printf("ITTR1: "); + dump_ttr(env->mmu.ttr[M68K_ITTR1]); + qemu_printf("DTTR0: "); + dump_ttr(env->mmu.ttr[M68K_DTTR0]); + qemu_printf("DTTR1: "); + dump_ttr(env->mmu.ttr[M68K_DTTR1]); - cpu_fprintf(f, "SRP: 0x%08x\n", env->mmu.srp); - dump_address_map(f, cpu_fprintf, env, env->mmu.srp); + qemu_printf("SRP: 0x%08x\n", env->mmu.srp); + dump_address_map(env, env->mmu.srp); - cpu_fprintf(f, "URP: 0x%08x\n", env->mmu.urp); - dump_address_map(f, cpu_fprintf, env, env->mmu.urp); + qemu_printf("URP: 0x%08x\n", env->mmu.urp); + dump_address_map(env, env->mmu.urp); } static int check_TTR(uint32_t ttr, int *prot, target_ulong addr, diff --git a/target/m68k/monitor.c b/target/m68k/monitor.c index db582a34ac..2055fe8a00 100644 --- a/target/m68k/monitor.c +++ b/target/m68k/monitor.c @@ -19,7 +19,7 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict) return; } - dump_mmu((FILE *)mon, (fprintf_function)monitor_printf, env1); + dump_mmu(env1); } static const MonitorDef monitor_defs[] = { diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 6217a683f1..58596278c2 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -24,6 +24,7 @@ #include "exec/exec-all.h" #include "tcg-op.h" #include "qemu/log.h" +#include "qemu/qemu-print.h" #include "exec/cpu_ldst.h" #include "exec/translator.h" @@ -6169,10 +6170,10 @@ static const TranslatorOps m68k_tr_ops = { .disas_log = m68k_tr_disas_log, }; -void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb) +void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns) { DisasContext dc; - translator_loop(&m68k_tr_ops, &dc.base, cpu, tb); + translator_loop(&m68k_tr_ops, &dc.base, cpu, tb, max_insns); } static double floatx80_to_double(CPUM68KState *env, uint16_t high, uint64_t low) @@ -6187,76 +6188,75 @@ static double floatx80_to_double(CPUM68KState *env, uint16_t high, uint64_t low) return u.d; } -void m68k_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags) +void m68k_cpu_dump_state(CPUState *cs, FILE *f, int flags) { M68kCPU *cpu = M68K_CPU(cs); CPUM68KState *env = &cpu->env; int i; uint16_t sr; for (i = 0; i < 8; i++) { - cpu_fprintf(f, "D%d = %08x A%d = %08x " - "F%d = %04x %016"PRIx64" (%12g)\n", - i, env->dregs[i], i, env->aregs[i], - i, env->fregs[i].l.upper, env->fregs[i].l.lower, - floatx80_to_double(env, env->fregs[i].l.upper, - env->fregs[i].l.lower)); - } - cpu_fprintf (f, "PC = %08x ", env->pc); + qemu_fprintf(f, "D%d = %08x A%d = %08x " + "F%d = %04x %016"PRIx64" (%12g)\n", + i, env->dregs[i], i, env->aregs[i], + i, env->fregs[i].l.upper, env->fregs[i].l.lower, + floatx80_to_double(env, env->fregs[i].l.upper, + env->fregs[i].l.lower)); + } + qemu_fprintf(f, "PC = %08x ", env->pc); sr = env->sr | cpu_m68k_get_ccr(env); - cpu_fprintf(f, "SR = %04x T:%x I:%x %c%c %c%c%c%c%c\n", - sr, (sr & SR_T) >> SR_T_SHIFT, (sr & SR_I) >> SR_I_SHIFT, - (sr & SR_S) ? 'S' : 'U', (sr & SR_M) ? '%' : 'I', - (sr & CCF_X) ? 'X' : '-', (sr & CCF_N) ? 'N' : '-', - (sr & CCF_Z) ? 'Z' : '-', (sr & CCF_V) ? 'V' : '-', - (sr & CCF_C) ? 'C' : '-'); - cpu_fprintf(f, "FPSR = %08x %c%c%c%c ", env->fpsr, - (env->fpsr & FPSR_CC_A) ? 'A' : '-', - (env->fpsr & FPSR_CC_I) ? 'I' : '-', - (env->fpsr & FPSR_CC_Z) ? 'Z' : '-', - (env->fpsr & FPSR_CC_N) ? 'N' : '-'); - cpu_fprintf(f, "\n " - "FPCR = %04x ", env->fpcr); + qemu_fprintf(f, "SR = %04x T:%x I:%x %c%c %c%c%c%c%c\n", + sr, (sr & SR_T) >> SR_T_SHIFT, (sr & SR_I) >> SR_I_SHIFT, + (sr & SR_S) ? 'S' : 'U', (sr & SR_M) ? '%' : 'I', + (sr & CCF_X) ? 'X' : '-', (sr & CCF_N) ? 'N' : '-', + (sr & CCF_Z) ? 'Z' : '-', (sr & CCF_V) ? 'V' : '-', + (sr & CCF_C) ? 'C' : '-'); + qemu_fprintf(f, "FPSR = %08x %c%c%c%c ", env->fpsr, + (env->fpsr & FPSR_CC_A) ? 'A' : '-', + (env->fpsr & FPSR_CC_I) ? 'I' : '-', + (env->fpsr & FPSR_CC_Z) ? 'Z' : '-', + (env->fpsr & FPSR_CC_N) ? 'N' : '-'); + qemu_fprintf(f, "\n " + "FPCR = %04x ", env->fpcr); switch (env->fpcr & FPCR_PREC_MASK) { case FPCR_PREC_X: - cpu_fprintf(f, "X "); + qemu_fprintf(f, "X "); break; case FPCR_PREC_S: - cpu_fprintf(f, "S "); + qemu_fprintf(f, "S "); break; case FPCR_PREC_D: - cpu_fprintf(f, "D "); + qemu_fprintf(f, "D "); break; } switch (env->fpcr & FPCR_RND_MASK) { case FPCR_RND_N: - cpu_fprintf(f, "RN "); + qemu_fprintf(f, "RN "); break; case FPCR_RND_Z: - cpu_fprintf(f, "RZ "); + qemu_fprintf(f, "RZ "); break; case FPCR_RND_M: - cpu_fprintf(f, "RM "); + qemu_fprintf(f, "RM "); break; case FPCR_RND_P: - cpu_fprintf(f, "RP "); + qemu_fprintf(f, "RP "); break; } - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); #ifdef CONFIG_SOFTMMU - cpu_fprintf(f, "%sA7(MSP) = %08x %sA7(USP) = %08x %sA7(ISP) = %08x\n", - env->current_sp == M68K_SSP ? "->" : " ", env->sp[M68K_SSP], - env->current_sp == M68K_USP ? "->" : " ", env->sp[M68K_USP], - env->current_sp == M68K_ISP ? "->" : " ", env->sp[M68K_ISP]); - cpu_fprintf(f, "VBR = 0x%08x\n", env->vbr); - cpu_fprintf(f, "SFC = %x DFC %x\n", env->sfc, env->dfc); - cpu_fprintf(f, "SSW %08x TCR %08x URP %08x SRP %08x\n", - env->mmu.ssw, env->mmu.tcr, env->mmu.urp, env->mmu.srp); - cpu_fprintf(f, "DTTR0/1: %08x/%08x ITTR0/1: %08x/%08x\n", - env->mmu.ttr[M68K_DTTR0], env->mmu.ttr[M68K_DTTR1], - env->mmu.ttr[M68K_ITTR0], env->mmu.ttr[M68K_ITTR1]); - cpu_fprintf(f, "MMUSR %08x, fault at %08x\n", - env->mmu.mmusr, env->mmu.ar); + qemu_fprintf(f, "%sA7(MSP) = %08x %sA7(USP) = %08x %sA7(ISP) = %08x\n", + env->current_sp == M68K_SSP ? "->" : " ", env->sp[M68K_SSP], + env->current_sp == M68K_USP ? "->" : " ", env->sp[M68K_USP], + env->current_sp == M68K_ISP ? "->" : " ", env->sp[M68K_ISP]); + qemu_fprintf(f, "VBR = 0x%08x\n", env->vbr); + qemu_fprintf(f, "SFC = %x DFC %x\n", env->sfc, env->dfc); + qemu_fprintf(f, "SSW %08x TCR %08x URP %08x SRP %08x\n", + env->mmu.ssw, env->mmu.tcr, env->mmu.urp, env->mmu.srp); + qemu_fprintf(f, "DTTR0/1: %08x/%08x ITTR0/1: %08x/%08x\n", + env->mmu.ttr[M68K_DTTR0], env->mmu.ttr[M68K_DTTR1], + env->mmu.ttr[M68K_ITTR0], env->mmu.ttr[M68K_ITTR1]); + qemu_fprintf(f, "MMUSR %08x, fault at %08x\n", + env->mmu.mmusr, env->mmu.ar); #endif } diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 792bbc97c7..f20e796865 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -328,8 +328,7 @@ static inline MicroBlazeCPU *mb_env_get_cpu(CPUMBState *env) void mb_cpu_do_interrupt(CPUState *cs); bool mb_cpu_exec_interrupt(CPUState *cs, int int_req); -void mb_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, - int flags); +void mb_cpu_dump_state(CPUState *cpu, FILE *f, int flags); hwaddr mb_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int mb_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index bc753793ec..9848e31d7f 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -42,7 +42,7 @@ int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, int mmu_idx) { cs->exception_index = 0xaa; - cpu_dump_state(cs, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, 0); return 1; } diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 78ca265b04..885fc44b51 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -28,6 +28,7 @@ #include "exec/cpu_ldst.h" #include "exec/helper-gen.h" #include "exec/translator.h" +#include "qemu/qemu-print.h" #include "trace-tcg.h" #include "exec/log.h" @@ -1600,7 +1601,7 @@ static inline void decode(DisasContext *dc, uint32_t ir) } /* generate intermediate code for basic block 'tb'. */ -void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { CPUMBState *env = cs->env_ptr; MicroBlazeCPU *cpu = mb_env_get_cpu(env); @@ -1610,7 +1611,6 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) uint32_t page_start, org_flags; uint32_t npc; int num_insns; - int max_insns; pc_start = tb->pc; dc->cpu = cpu; @@ -1634,13 +1634,6 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) page_start = pc_start & TARGET_PAGE_MASK; num_insns = 0; - max_insns = tb_cflags(tb) & CF_COUNT_MASK; - if (max_insns == 0) { - max_insns = CF_COUNT_MASK; - } - if (max_insns > TCG_MAX_INSNS) { - max_insns = TCG_MAX_INSNS; - } gen_tb_start(tb); do @@ -1785,36 +1778,36 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) assert(!dc->abort_at_next_insn); } -void mb_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags) +void mb_cpu_dump_state(CPUState *cs, FILE *f, int flags) { MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); CPUMBState *env = &cpu->env; int i; - if (!env || !f) + if (!env) { return; + } - cpu_fprintf(f, "IN: PC=%" PRIx64 " %s\n", - env->sregs[SR_PC], lookup_symbol(env->sregs[SR_PC])); - cpu_fprintf(f, "rmsr=%" PRIx64 " resr=%" PRIx64 " rear=%" PRIx64 " " - "debug=%x imm=%x iflags=%x fsr=%" PRIx64 "\n", - env->sregs[SR_MSR], env->sregs[SR_ESR], env->sregs[SR_EAR], - env->debug, env->imm, env->iflags, env->sregs[SR_FSR]); - cpu_fprintf(f, "btaken=%d btarget=%" PRIx64 " mode=%s(saved=%s) " - "eip=%d ie=%d\n", - env->btaken, env->btarget, - (env->sregs[SR_MSR] & MSR_UM) ? "user" : "kernel", - (env->sregs[SR_MSR] & MSR_UMS) ? "user" : "kernel", - (bool)(env->sregs[SR_MSR] & MSR_EIP), - (bool)(env->sregs[SR_MSR] & MSR_IE)); + qemu_fprintf(f, "IN: PC=%" PRIx64 " %s\n", + env->sregs[SR_PC], lookup_symbol(env->sregs[SR_PC])); + qemu_fprintf(f, "rmsr=%" PRIx64 " resr=%" PRIx64 " rear=%" PRIx64 " " + "debug=%x imm=%x iflags=%x fsr=%" PRIx64 "\n", + env->sregs[SR_MSR], env->sregs[SR_ESR], env->sregs[SR_EAR], + env->debug, env->imm, env->iflags, env->sregs[SR_FSR]); + qemu_fprintf(f, "btaken=%d btarget=%" PRIx64 " mode=%s(saved=%s) " + "eip=%d ie=%d\n", + env->btaken, env->btarget, + (env->sregs[SR_MSR] & MSR_UM) ? "user" : "kernel", + (env->sregs[SR_MSR] & MSR_UMS) ? "user" : "kernel", + (bool)(env->sregs[SR_MSR] & MSR_EIP), + (bool)(env->sregs[SR_MSR] & MSR_IE)); for (i = 0; i < 32; i++) { - cpu_fprintf(f, "r%2.2d=%8.8x ", i, env->regs[i]); + qemu_fprintf(f, "r%2.2d=%8.8x ", i, env->regs[i]); if ((i + 1) % 4 == 0) - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } - cpu_fprintf(f, "\n\n"); + qemu_fprintf(f, "\n\n"); } void mb_tcg_init(void) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index a10eeb0de3..1f41cf66d5 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1065,7 +1065,7 @@ static inline MIPSCPU *mips_env_get_cpu(CPUMIPSState *env) #define ENV_OFFSET offsetof(MIPSCPU, env) -void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf); +void mips_cpu_list(void); #define cpu_signal_handler cpu_mips_signal_handler #define cpu_list mips_cpu_list diff --git a/target/mips/internal.h b/target/mips/internal.h index 8f6fc919d5..286e3888ab 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -76,8 +76,7 @@ enum CPUMIPSMSADataFormat { void mips_cpu_do_interrupt(CPUState *cpu); bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req); -void mips_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, - int flags); +void mips_cpu_dump_state(CPUState *cpu, FILE *f, int flags); hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int mips_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); diff --git a/target/mips/trace-events b/target/mips/trace-events index 05eafd7870..ba87fe6062 100644 --- a/target/mips/trace-events +++ b/target/mips/trace-events @@ -1,5 +1,5 @@ # See docs/devel/tracing.txt for syntax documentation. -# target/mips/translate.c +# translate.c mips_translate_c0(const char *instr, const char *rn, int reg, int sel) "%s %s (reg %d sel %d)" mips_translate_tr(const char *instr, int rt, int u, int sel, int h) "%s (reg %d u %d sel %d h %d)" diff --git a/target/mips/translate.c b/target/mips/translate.c index 364bd6dc4f..f96c0d01ef 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -38,6 +38,7 @@ #include "trace-tcg.h" #include "exec/translator.h" #include "exec/log.h" +#include "qemu/qemu-print.h" #define MIPS_DEBUG_DISAS 0 @@ -29720,15 +29721,14 @@ static const TranslatorOps mips_tr_ops = { .disas_log = mips_tr_disas_log, }; -void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { DisasContext ctx; - translator_loop(&mips_tr_ops, &ctx.base, cs, tb); + translator_loop(&mips_tr_ops, &ctx.base, cs, tb, max_insns); } -static void fpu_dump_state(CPUMIPSState *env, FILE *f, fprintf_function fpu_fprintf, - int flags) +static void fpu_dump_state(CPUMIPSState *env, FILE *f, int flags) { int i; int is_fpu64 = !!(env->hflags & MIPS_HFLAG_F64); @@ -29736,68 +29736,69 @@ static void fpu_dump_state(CPUMIPSState *env, FILE *f, fprintf_function fpu_fpri #define printfpr(fp) \ do { \ if (is_fpu64) \ - fpu_fprintf(f, "w:%08x d:%016" PRIx64 \ - " fd:%13g fs:%13g psu: %13g\n", \ - (fp)->w[FP_ENDIAN_IDX], (fp)->d, \ - (double)(fp)->fd, \ - (double)(fp)->fs[FP_ENDIAN_IDX], \ - (double)(fp)->fs[!FP_ENDIAN_IDX]); \ + qemu_fprintf(f, "w:%08x d:%016" PRIx64 \ + " fd:%13g fs:%13g psu: %13g\n", \ + (fp)->w[FP_ENDIAN_IDX], (fp)->d, \ + (double)(fp)->fd, \ + (double)(fp)->fs[FP_ENDIAN_IDX], \ + (double)(fp)->fs[!FP_ENDIAN_IDX]); \ else { \ fpr_t tmp; \ tmp.w[FP_ENDIAN_IDX] = (fp)->w[FP_ENDIAN_IDX]; \ tmp.w[!FP_ENDIAN_IDX] = ((fp) + 1)->w[FP_ENDIAN_IDX]; \ - fpu_fprintf(f, "w:%08x d:%016" PRIx64 \ - " fd:%13g fs:%13g psu:%13g\n", \ - tmp.w[FP_ENDIAN_IDX], tmp.d, \ - (double)tmp.fd, \ - (double)tmp.fs[FP_ENDIAN_IDX], \ - (double)tmp.fs[!FP_ENDIAN_IDX]); \ + qemu_fprintf(f, "w:%08x d:%016" PRIx64 \ + " fd:%13g fs:%13g psu:%13g\n", \ + tmp.w[FP_ENDIAN_IDX], tmp.d, \ + (double)tmp.fd, \ + (double)tmp.fs[FP_ENDIAN_IDX], \ + (double)tmp.fs[!FP_ENDIAN_IDX]); \ } \ } while(0) - fpu_fprintf(f, "CP1 FCR0 0x%08x FCR31 0x%08x SR.FR %d fp_status 0x%02x\n", - env->active_fpu.fcr0, env->active_fpu.fcr31, is_fpu64, - get_float_exception_flags(&env->active_fpu.fp_status)); + qemu_fprintf(f, + "CP1 FCR0 0x%08x FCR31 0x%08x SR.FR %d fp_status 0x%02x\n", + env->active_fpu.fcr0, env->active_fpu.fcr31, is_fpu64, + get_float_exception_flags(&env->active_fpu.fp_status)); for (i = 0; i < 32; (is_fpu64) ? i++ : (i += 2)) { - fpu_fprintf(f, "%3s: ", fregnames[i]); + qemu_fprintf(f, "%3s: ", fregnames[i]); printfpr(&env->active_fpu.fpr[i]); } #undef printfpr } -void mips_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags) +void mips_cpu_dump_state(CPUState *cs, FILE *f, int flags) { MIPSCPU *cpu = MIPS_CPU(cs); CPUMIPSState *env = &cpu->env; int i; - cpu_fprintf(f, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx - " LO=0x" TARGET_FMT_lx " ds %04x " - TARGET_FMT_lx " " TARGET_FMT_ld "\n", - env->active_tc.PC, env->active_tc.HI[0], env->active_tc.LO[0], - env->hflags, env->btarget, env->bcond); + qemu_fprintf(f, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx + " LO=0x" TARGET_FMT_lx " ds %04x " + TARGET_FMT_lx " " TARGET_FMT_ld "\n", + env->active_tc.PC, env->active_tc.HI[0], env->active_tc.LO[0], + env->hflags, env->btarget, env->bcond); for (i = 0; i < 32; i++) { if ((i & 3) == 0) - cpu_fprintf(f, "GPR%02d:", i); - cpu_fprintf(f, " %s " TARGET_FMT_lx, regnames[i], env->active_tc.gpr[i]); + qemu_fprintf(f, "GPR%02d:", i); + qemu_fprintf(f, " %s " TARGET_FMT_lx, + regnames[i], env->active_tc.gpr[i]); if ((i & 3) == 3) - cpu_fprintf(f, "\n"); - } - - cpu_fprintf(f, "CP0 Status 0x%08x Cause 0x%08x EPC 0x" TARGET_FMT_lx "\n", - env->CP0_Status, env->CP0_Cause, env->CP0_EPC); - cpu_fprintf(f, " Config0 0x%08x Config1 0x%08x LLAddr 0x%016" - PRIx64 "\n", - env->CP0_Config0, env->CP0_Config1, env->CP0_LLAddr); - cpu_fprintf(f, " Config2 0x%08x Config3 0x%08x\n", - env->CP0_Config2, env->CP0_Config3); - cpu_fprintf(f, " Config4 0x%08x Config5 0x%08x\n", - env->CP0_Config4, env->CP0_Config5); + qemu_fprintf(f, "\n"); + } + + qemu_fprintf(f, "CP0 Status 0x%08x Cause 0x%08x EPC 0x" TARGET_FMT_lx "\n", + env->CP0_Status, env->CP0_Cause, env->CP0_EPC); + qemu_fprintf(f, " Config0 0x%08x Config1 0x%08x LLAddr 0x%016" + PRIx64 "\n", + env->CP0_Config0, env->CP0_Config1, env->CP0_LLAddr); + qemu_fprintf(f, " Config2 0x%08x Config3 0x%08x\n", + env->CP0_Config2, env->CP0_Config3); + qemu_fprintf(f, " Config4 0x%08x Config5 0x%08x\n", + env->CP0_Config4, env->CP0_Config5); if ((flags & CPU_DUMP_FPU) && (env->hflags & MIPS_HFLAG_FPU)) { - fpu_dump_state(env, f, cpu_fprintf, flags); + fpu_dump_state(env, f, flags); } } diff --git a/target/mips/translate_init.inc.c b/target/mips/translate_init.inc.c index bf559aff08..1c2d017d36 100644 --- a/target/mips/translate_init.inc.c +++ b/target/mips/translate_init.inc.c @@ -835,13 +835,12 @@ const mips_def_t mips_defs[] = }; const int mips_defs_number = ARRAY_SIZE(mips_defs); -void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf) +void mips_cpu_list(void) { int i; for (i = 0; i < ARRAY_SIZE(mips_defs); i++) { - (*cpu_fprintf)(f, "MIPS '%s'\n", - mips_defs[i].name); + qemu_printf("MIPS '%s'\n", mips_defs[i].name); } } diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h index 080df4ee6f..f3b6d83ae7 100644 --- a/target/moxie/cpu.h +++ b/target/moxie/cpu.h @@ -112,8 +112,7 @@ static inline MoxieCPU *moxie_env_get_cpu(CPUMoxieState *env) #define ENV_OFFSET offsetof(MoxieCPU, env) void moxie_cpu_do_interrupt(CPUState *cs); -void moxie_cpu_dump_state(CPUState *cpu, FILE *f, - fprintf_function cpu_fprintf, int flags); +void moxie_cpu_dump_state(CPUState *cpu, FILE *f, int flags); hwaddr moxie_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); void moxie_translate_init(void); int cpu_moxie_signal_handler(int host_signum, void *pinfo, diff --git a/target/moxie/helper.c b/target/moxie/helper.c index f3d8ee7d6b..287a45232c 100644 --- a/target/moxie/helper.c +++ b/target/moxie/helper.c @@ -101,7 +101,7 @@ int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, cs->exception_index = 0xaa; cpu->env.debug1 = address; - cpu_dump_state(cs, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, 0); return 1; } diff --git a/target/moxie/translate.c b/target/moxie/translate.c index 68ca223e22..c668178f2c 100644 --- a/target/moxie/translate.c +++ b/target/moxie/translate.c @@ -28,6 +28,7 @@ #include "disas/disas.h" #include "tcg-op.h" #include "exec/cpu_ldst.h" +#include "qemu/qemu-print.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" @@ -69,24 +70,23 @@ static int extract_branch_offset(int opcode) return (((signed short)((opcode & ((1 << 10) - 1)) << 6)) >> 6) << 1; } -void moxie_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags) +void moxie_cpu_dump_state(CPUState *cs, FILE *f, int flags) { MoxieCPU *cpu = MOXIE_CPU(cs); CPUMoxieState *env = &cpu->env; int i; - cpu_fprintf(f, "pc=0x%08x\n", env->pc); - cpu_fprintf(f, "$fp=0x%08x $sp=0x%08x $r0=0x%08x $r1=0x%08x\n", - env->gregs[0], env->gregs[1], env->gregs[2], env->gregs[3]); + qemu_fprintf(f, "pc=0x%08x\n", env->pc); + qemu_fprintf(f, "$fp=0x%08x $sp=0x%08x $r0=0x%08x $r1=0x%08x\n", + env->gregs[0], env->gregs[1], env->gregs[2], env->gregs[3]); for (i = 4; i < 16; i += 4) { - cpu_fprintf(f, "$r%d=0x%08x $r%d=0x%08x $r%d=0x%08x $r%d=0x%08x\n", - i-2, env->gregs[i], i-1, env->gregs[i + 1], - i, env->gregs[i + 2], i+1, env->gregs[i + 3]); + qemu_fprintf(f, "$r%d=0x%08x $r%d=0x%08x $r%d=0x%08x $r%d=0x%08x\n", + i - 2, env->gregs[i], i - 1, env->gregs[i + 1], + i, env->gregs[i + 2], i + 1, env->gregs[i + 3]); } for (i = 4; i < 16; i += 4) { - cpu_fprintf(f, "sr%d=0x%08x sr%d=0x%08x sr%d=0x%08x sr%d=0x%08x\n", - i-2, env->sregs[i], i-1, env->sregs[i + 1], - i, env->sregs[i + 2], i+1, env->sregs[i + 3]); + qemu_fprintf(f, "sr%d=0x%08x sr%d=0x%08x sr%d=0x%08x sr%d=0x%08x\n", + i - 2, env->sregs[i], i - 1, env->sregs[i + 1], + i, env->sregs[i + 2], i + 1, env->sregs[i + 3]); } } @@ -813,13 +813,13 @@ static int decode_opc(MoxieCPU *cpu, DisasContext *ctx) } /* generate intermediate code for basic block 'tb'. */ -void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { CPUMoxieState *env = cs->env_ptr; MoxieCPU *cpu = moxie_env_get_cpu(env); DisasContext ctx; target_ulong pc_start; - int num_insns, max_insns; + int num_insns; pc_start = tb->pc; ctx.pc = pc_start; @@ -829,13 +829,6 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) ctx.singlestep_enabled = 0; ctx.bstate = BS_NONE; num_insns = 0; - max_insns = tb_cflags(tb) & CF_COUNT_MASK; - if (max_insns == 0) { - max_insns = CF_COUNT_MASK; - } - if (max_insns > TCG_MAX_INSNS) { - max_insns = TCG_MAX_INSNS; - } gen_tb_start(tb); do { diff --git a/target/nios2/Makefile.objs b/target/nios2/Makefile.objs index 2a11c5ce08..010de0e7a6 100644 --- a/target/nios2/Makefile.objs +++ b/target/nios2/Makefile.objs @@ -1,4 +1,4 @@ -obj-y += translate.o op_helper.o helper.o cpu.o mmu.o +obj-y += translate.o op_helper.o helper.o cpu.o mmu.o nios2-semi.o obj-$(CONFIG_SOFTMMU) += monitor.o $(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 047f3764b7..881e7d58c9 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -141,7 +141,7 @@ typedef struct Nios2CPUClass { #define R_PC 64 /* Exceptions */ -#define EXCP_BREAK -1 +#define EXCP_BREAK 0x1000 #define EXCP_RESET 0 #define EXCP_PRESET 1 #define EXCP_IRQ 2 @@ -212,9 +212,8 @@ static inline Nios2CPU *nios2_env_get_cpu(CPUNios2State *env) void nios2_tcg_init(void); void nios2_cpu_do_interrupt(CPUState *cs); int cpu_nios2_signal_handler(int host_signum, void *pinfo, void *puc); -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUNios2State *env); -void nios2_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, - int flags); +void dump_mmu(CPUNios2State *env); +void nios2_cpu_dump_state(CPUState *cpu, FILE *f, int flags); hwaddr nios2_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); void nios2_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, MMUAccessType access_type, @@ -223,6 +222,8 @@ void nios2_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, qemu_irq *nios2_cpu_pic_init(Nios2CPU *cpu); void nios2_check_interrupts(CPUNios2State *env); +void do_nios2_semihosting(CPUNios2State *env); + #define TARGET_PHYS_ADDR_SPACE_BITS 32 #ifdef CONFIG_USER_ONLY # define TARGET_VIRT_ADDR_SPACE_BITS 31 diff --git a/target/nios2/helper.c b/target/nios2/helper.c index a8b8ec662a..e01fc1ff3e 100644 --- a/target/nios2/helper.c +++ b/target/nios2/helper.c @@ -23,8 +23,10 @@ #include "cpu.h" #include "qemu/host-utils.h" #include "exec/exec-all.h" +#include "exec/cpu_ldst.h" #include "exec/log.h" #include "exec/helper-proto.h" +#include "exec/semihost.h" #if defined(CONFIG_USER_ONLY) @@ -42,7 +44,7 @@ int nios2_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, cs->exception_index = 0xaa; /* Page 0x1000 is kuser helper */ if (address < 0x1000 || address >= 0x2000) { - cpu_dump_state(cs, stderr, fprintf, 0); + cpu_dump_state(cs, stderr, 0); } return 1; } @@ -169,6 +171,17 @@ void nios2_cpu_do_interrupt(CPUState *cs) break; case EXCP_BREAK: + qemu_log_mask(CPU_LOG_INT, "BREAK exception at pc=%x\n", + env->regs[R_PC]); + /* The semihosting instruction is "break 1". */ + if (semihosting_enabled() && + cpu_ldl_code(env, env->regs[R_PC]) == 0x003da07a) { + qemu_log_mask(CPU_LOG_INT, "Entering semihosting\n"); + env->regs[R_PC] += 4; + do_nios2_semihosting(env); + break; + } + if ((env->regs[CR_STATUS] & CR_STATUS_EH) == 0) { env->regs[CR_BSTATUS] = env->regs[CR_STATUS]; env->regs[R_BA] = env->regs[R_PC] + 4; diff --git a/target/nios2/mmu.c b/target/nios2/mmu.c index 69b71cba4a..5acf442d8b 100644 --- a/target/nios2/mmu.c +++ b/target/nios2/mmu.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "qemu-common.h" +#include "qemu/qemu-print.h" #include "cpu.h" #include "exec/exec-all.h" #include "mmu.h" @@ -264,18 +265,18 @@ void mmu_init(CPUNios2State *env) mmu->tlb = g_new0(Nios2TLBEntry, cpu->tlb_num_entries); } -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUNios2State *env) +void dump_mmu(CPUNios2State *env) { Nios2CPU *cpu = nios2_env_get_cpu(env); int i; - cpu_fprintf(f, "MMU: ways %d, entries %d, pid bits %d\n", + qemu_printf("MMU: ways %d, entries %d, pid bits %d\n", cpu->tlb_num_ways, cpu->tlb_num_entries, cpu->pid_num_bits); for (i = 0; i < cpu->tlb_num_entries; i++) { Nios2TLBEntry *entry = &env->mmu.tlb[i]; - cpu_fprintf(f, "TLB[%d] = %08X %08X %c VPN %05X " + qemu_printf("TLB[%d] = %08X %08X %c VPN %05X " "PID %02X %c PFN %05X %c%c%c%c\n", i, entry->tag, entry->data, (entry->tag & (1 << 10)) ? 'V' : '-', diff --git a/target/nios2/monitor.c b/target/nios2/monitor.c index 422c81656a..d5e3393716 100644 --- a/target/nios2/monitor.c +++ b/target/nios2/monitor.c @@ -31,5 +31,5 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict) { CPUArchState *env1 = mon_get_cpu_env(); - dump_mmu((FILE *)mon, (fprintf_function)monitor_printf, env1); + dump_mmu(env1); } diff --git a/target/nios2/nios2-semi.c b/target/nios2/nios2-semi.c new file mode 100644 index 0000000000..cc2777d2f8 --- /dev/null +++ b/target/nios2/nios2-semi.c @@ -0,0 +1,455 @@ +/* + * Nios II Semihosting syscall interface. + * This code is derived from m68k-semi.c. + * The semihosting protocol implemented here is described in the + * libgloss sources: + * https://sourceware.org/git/gitweb.cgi?p=newlib-cygwin.git;a=blob;f=libgloss/nios2/nios2-semi.txt;hb=HEAD + * + * Copyright (c) 2017-2019 Mentor Graphics + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +#include "qemu/osdep.h" + +#include "cpu.h" +#if defined(CONFIG_USER_ONLY) +#include "qemu.h" +#else +#include "qemu-common.h" +#include "exec/gdbstub.h" +#include "exec/softmmu-semi.h" +#endif +#include "qemu/log.h" +#include "sysemu/sysemu.h" + +#define HOSTED_EXIT 0 +#define HOSTED_INIT_SIM 1 +#define HOSTED_OPEN 2 +#define HOSTED_CLOSE 3 +#define HOSTED_READ 4 +#define HOSTED_WRITE 5 +#define HOSTED_LSEEK 6 +#define HOSTED_RENAME 7 +#define HOSTED_UNLINK 8 +#define HOSTED_STAT 9 +#define HOSTED_FSTAT 10 +#define HOSTED_GETTIMEOFDAY 11 +#define HOSTED_ISATTY 12 +#define HOSTED_SYSTEM 13 + +typedef uint32_t gdb_mode_t; +typedef uint32_t gdb_time_t; + +struct nios2_gdb_stat { + uint32_t gdb_st_dev; /* device */ + uint32_t gdb_st_ino; /* inode */ + gdb_mode_t gdb_st_mode; /* protection */ + uint32_t gdb_st_nlink; /* number of hard links */ + uint32_t gdb_st_uid; /* user ID of owner */ + uint32_t gdb_st_gid; /* group ID of owner */ + uint32_t gdb_st_rdev; /* device type (if inode device) */ + uint64_t gdb_st_size; /* total size, in bytes */ + uint64_t gdb_st_blksize; /* blocksize for filesystem I/O */ + uint64_t gdb_st_blocks; /* number of blocks allocated */ + gdb_time_t gdb_st_atime; /* time of last access */ + gdb_time_t gdb_st_mtime; /* time of last modification */ + gdb_time_t gdb_st_ctime; /* time of last change */ +} QEMU_PACKED; + +struct gdb_timeval { + gdb_time_t tv_sec; /* second */ + uint64_t tv_usec; /* microsecond */ +} QEMU_PACKED; + +#define GDB_O_RDONLY 0x0 +#define GDB_O_WRONLY 0x1 +#define GDB_O_RDWR 0x2 +#define GDB_O_APPEND 0x8 +#define GDB_O_CREAT 0x200 +#define GDB_O_TRUNC 0x400 +#define GDB_O_EXCL 0x800 + +static int translate_openflags(int flags) +{ + int hf; + + if (flags & GDB_O_WRONLY) { + hf = O_WRONLY; + } else if (flags & GDB_O_RDWR) { + hf = O_RDWR; + } else { + hf = O_RDONLY; + } + + if (flags & GDB_O_APPEND) { + hf |= O_APPEND; + } + if (flags & GDB_O_CREAT) { + hf |= O_CREAT; + } + if (flags & GDB_O_TRUNC) { + hf |= O_TRUNC; + } + if (flags & GDB_O_EXCL) { + hf |= O_EXCL; + } + + return hf; +} + +static bool translate_stat(CPUNios2State *env, target_ulong addr, + struct stat *s) +{ + struct nios2_gdb_stat *p; + + p = lock_user(VERIFY_WRITE, addr, sizeof(struct nios2_gdb_stat), 0); + + if (!p) { + return false; + } + p->gdb_st_dev = cpu_to_be32(s->st_dev); + p->gdb_st_ino = cpu_to_be32(s->st_ino); + p->gdb_st_mode = cpu_to_be32(s->st_mode); + p->gdb_st_nlink = cpu_to_be32(s->st_nlink); + p->gdb_st_uid = cpu_to_be32(s->st_uid); + p->gdb_st_gid = cpu_to_be32(s->st_gid); + p->gdb_st_rdev = cpu_to_be32(s->st_rdev); + p->gdb_st_size = cpu_to_be64(s->st_size); +#ifdef _WIN32 + /* Windows stat is missing some fields. */ + p->gdb_st_blksize = 0; + p->gdb_st_blocks = 0; +#else + p->gdb_st_blksize = cpu_to_be64(s->st_blksize); + p->gdb_st_blocks = cpu_to_be64(s->st_blocks); +#endif + p->gdb_st_atime = cpu_to_be32(s->st_atime); + p->gdb_st_mtime = cpu_to_be32(s->st_mtime); + p->gdb_st_ctime = cpu_to_be32(s->st_ctime); + unlock_user(p, addr, sizeof(struct nios2_gdb_stat)); + return true; +} + +static void nios2_semi_return_u32(CPUNios2State *env, uint32_t ret, + uint32_t err) +{ + target_ulong args = env->regs[R_ARG1]; + if (put_user_u32(ret, args) || + put_user_u32(err, args + 4)) { + /* + * The nios2 semihosting ABI does not provide any way to report this + * error to the guest, so the best we can do is log it in qemu. + * It is always a guest error not to pass us a valid argument block. + */ + qemu_log_mask(LOG_GUEST_ERROR, "nios2-semihosting: return value " + "discarded because argument block not writable\n"); + } +} + +static void nios2_semi_return_u64(CPUNios2State *env, uint64_t ret, + uint32_t err) +{ + target_ulong args = env->regs[R_ARG1]; + if (put_user_u32(ret >> 32, args) || + put_user_u32(ret, args + 4) || + put_user_u32(err, args + 8)) { + /* No way to report this via nios2 semihosting ABI; just log it */ + qemu_log_mask(LOG_GUEST_ERROR, "nios2-semihosting: return value " + "discarded because argument block not writable\n"); + } +} + +static int nios2_semi_is_lseek; + +static void nios2_semi_cb(CPUState *cs, target_ulong ret, target_ulong err) +{ + Nios2CPU *cpu = NIOS2_CPU(cs); + CPUNios2State *env = &cpu->env; + + if (nios2_semi_is_lseek) { + /* + * FIXME: We've already lost the high bits of the lseek + * return value. + */ + nios2_semi_return_u64(env, ret, err); + nios2_semi_is_lseek = 0; + } else { + nios2_semi_return_u32(env, ret, err); + } +} + +/* + * Read the input value from the argument block; fail the semihosting + * call if the memory read fails. + */ +#define GET_ARG(n) do { \ + if (get_user_ual(arg ## n, args + (n) * 4)) { \ + result = -1; \ + errno = EFAULT; \ + goto failed; \ + } \ +} while (0) + +void do_nios2_semihosting(CPUNios2State *env) +{ + int nr; + uint32_t args; + target_ulong arg0, arg1, arg2, arg3; + void *p; + void *q; + uint32_t len; + uint32_t result; + + nr = env->regs[R_ARG0]; + args = env->regs[R_ARG1]; + switch (nr) { + case HOSTED_EXIT: + gdb_exit(env, env->regs[R_ARG0]); + exit(env->regs[R_ARG0]); + case HOSTED_OPEN: + GET_ARG(0); + GET_ARG(1); + GET_ARG(2); + GET_ARG(3); + if (use_gdb_syscalls()) { + gdb_do_syscall(nios2_semi_cb, "open,%s,%x,%x", arg0, (int)arg1, + arg2, arg3); + return; + } else { + p = lock_user_string(arg0); + if (!p) { + result = -1; + errno = EFAULT; + } else { + result = open(p, translate_openflags(arg2), arg3); + unlock_user(p, arg0, 0); + } + } + break; + case HOSTED_CLOSE: + { + /* Ignore attempts to close stdin/out/err. */ + GET_ARG(0); + int fd = arg0; + if (fd > 2) { + if (use_gdb_syscalls()) { + gdb_do_syscall(nios2_semi_cb, "close,%x", arg0); + return; + } else { + result = close(fd); + } + } else { + result = 0; + } + break; + } + case HOSTED_READ: + GET_ARG(0); + GET_ARG(1); + GET_ARG(2); + len = arg2; + if (use_gdb_syscalls()) { + gdb_do_syscall(nios2_semi_cb, "read,%x,%x,%x", + arg0, arg1, len); + return; + } else { + p = lock_user(VERIFY_WRITE, arg1, len, 0); + if (!p) { + result = -1; + errno = EFAULT; + } else { + result = read(arg0, p, len); + unlock_user(p, arg1, len); + } + } + break; + case HOSTED_WRITE: + GET_ARG(0); + GET_ARG(1); + GET_ARG(2); + len = arg2; + if (use_gdb_syscalls()) { + gdb_do_syscall(nios2_semi_cb, "write,%x,%x,%x", + arg0, arg1, len); + return; + } else { + p = lock_user(VERIFY_READ, arg1, len, 1); + if (!p) { + result = -1; + errno = EFAULT; + } else { + result = write(arg0, p, len); + unlock_user(p, arg0, 0); + } + } + break; + case HOSTED_LSEEK: + { + uint64_t off; + GET_ARG(0); + GET_ARG(1); + GET_ARG(2); + GET_ARG(3); + off = (uint32_t)arg2 | ((uint64_t)arg1 << 32); + if (use_gdb_syscalls()) { + nios2_semi_is_lseek = 1; + gdb_do_syscall(nios2_semi_cb, "lseek,%x,%lx,%x", + arg0, off, arg3); + } else { + off = lseek(arg0, off, arg3); + nios2_semi_return_u64(env, off, errno); + } + return; + } + case HOSTED_RENAME: + GET_ARG(0); + GET_ARG(1); + GET_ARG(2); + GET_ARG(3); + if (use_gdb_syscalls()) { + gdb_do_syscall(nios2_semi_cb, "rename,%s,%s", + arg0, (int)arg1, arg2, (int)arg3); + return; + } else { + p = lock_user_string(arg0); + q = lock_user_string(arg2); + if (!p || !q) { + result = -1; + errno = EFAULT; + } else { + result = rename(p, q); + } + unlock_user(p, arg0, 0); + unlock_user(q, arg2, 0); + } + break; + case HOSTED_UNLINK: + GET_ARG(0); + GET_ARG(1); + if (use_gdb_syscalls()) { + gdb_do_syscall(nios2_semi_cb, "unlink,%s", + arg0, (int)arg1); + return; + } else { + p = lock_user_string(arg0); + if (!p) { + result = -1; + errno = EFAULT; + } else { + result = unlink(p); + unlock_user(p, arg0, 0); + } + } + break; + case HOSTED_STAT: + GET_ARG(0); + GET_ARG(1); + GET_ARG(2); + if (use_gdb_syscalls()) { + gdb_do_syscall(nios2_semi_cb, "stat,%s,%x", + arg0, (int)arg1, arg2); + return; + } else { + struct stat s; + p = lock_user_string(arg0); + if (!p) { + result = -1; + errno = EFAULT; + } else { + result = stat(p, &s); + unlock_user(p, arg0, 0); + } + if (result == 0 && !translate_stat(env, arg2, &s)) { + result = -1; + errno = EFAULT; + } + } + break; + case HOSTED_FSTAT: + GET_ARG(0); + GET_ARG(1); + if (use_gdb_syscalls()) { + gdb_do_syscall(nios2_semi_cb, "fstat,%x,%x", + arg0, arg1); + return; + } else { + struct stat s; + result = fstat(arg0, &s); + if (result == 0 && !translate_stat(env, arg1, &s)) { + result = -1; + errno = EFAULT; + } + } + break; + case HOSTED_GETTIMEOFDAY: + /* Only the tv parameter is used. tz is assumed NULL. */ + GET_ARG(0); + if (use_gdb_syscalls()) { + gdb_do_syscall(nios2_semi_cb, "gettimeofday,%x,%x", + arg0, 0); + return; + } else { + qemu_timeval tv; + struct gdb_timeval *p; + result = qemu_gettimeofday(&tv); + if (result != 0) { + p = lock_user(VERIFY_WRITE, arg0, sizeof(struct gdb_timeval), + 0); + if (!p) { + result = -1; + errno = EFAULT; + } else { + p->tv_sec = cpu_to_be32(tv.tv_sec); + p->tv_usec = cpu_to_be64(tv.tv_usec); + unlock_user(p, arg0, sizeof(struct gdb_timeval)); + } + } + } + break; + case HOSTED_ISATTY: + GET_ARG(0); + if (use_gdb_syscalls()) { + gdb_do_syscall(nios2_semi_cb, "isatty,%x", arg0); + return; + } else { + result = isatty(arg0); + } + break; + case HOSTED_SYSTEM: + GET_ARG(0); + GET_ARG(1); + if (use_gdb_syscalls()) { + gdb_do_syscall(nios2_semi_cb, "system,%s", + arg0, (int)arg1); + return; + } else { + p = lock_user_string(arg0); + if (!p) { + result = -1; + errno = EFAULT; + } else { + result = system(p); + unlock_user(p, arg0, 0); + } + } + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, "nios2-semihosting: unsupported " + "semihosting syscall %d\n", nr); + result = 0; + } +failed: + nios2_semi_return_u32(env, result, errno); +} diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 7fa03ed05a..17d8f1877c 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -31,6 +31,7 @@ #include "exec/log.h" #include "exec/cpu_ldst.h" #include "exec/translator.h" +#include "qemu/qemu-print.h" /* is_jmp field values */ #define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically */ @@ -805,12 +806,11 @@ static void gen_exception(DisasContext *dc, uint32_t excp) } /* generate intermediate code for basic block 'tb'. */ -void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { CPUNios2State *env = cs->env_ptr; DisasContext dc1, *dc = &dc1; int num_insns; - int max_insns; /* Initialize DC */ dc->cpu_env = cpu_env; @@ -823,20 +823,11 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) /* Set up instruction counts */ num_insns = 0; - if (cs->singlestep_enabled || singlestep) { - max_insns = 1; - } else { + if (max_insns > 1) { int page_insns = (TARGET_PAGE_SIZE - (tb->pc & TARGET_PAGE_MASK)) / 4; - max_insns = tb_cflags(tb) & CF_COUNT_MASK; - if (max_insns == 0) { - max_insns = CF_COUNT_MASK; - } if (max_insns > page_insns) { max_insns = page_insns; } - if (max_insns > TCG_MAX_INSNS) { - max_insns = TCG_MAX_INSNS; - } } gen_tb_start(tb); @@ -914,33 +905,32 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) #endif } -void nios2_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags) +void nios2_cpu_dump_state(CPUState *cs, FILE *f, int flags) { Nios2CPU *cpu = NIOS2_CPU(cs); CPUNios2State *env = &cpu->env; int i; - if (!env || !f) { + if (!env) { return; } - cpu_fprintf(f, "IN: PC=%x %s\n", - env->regs[R_PC], lookup_symbol(env->regs[R_PC])); + qemu_fprintf(f, "IN: PC=%x %s\n", + env->regs[R_PC], lookup_symbol(env->regs[R_PC])); for (i = 0; i < NUM_CORE_REGS; i++) { - cpu_fprintf(f, "%9s=%8.8x ", regnames[i], env->regs[i]); + qemu_fprintf(f, "%9s=%8.8x ", regnames[i], env->regs[i]); if ((i + 1) % 4 == 0) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } } #if !defined(CONFIG_USER_ONLY) - cpu_fprintf(f, " mmu write: VPN=%05X PID %02X TLBACC %08X\n", - env->mmu.pteaddr_wr & CR_PTEADDR_VPN_MASK, - (env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> 4, - env->mmu.tlbacc_wr); + qemu_fprintf(f, " mmu write: VPN=%05X PID %02X TLBACC %08X\n", + env->mmu.pteaddr_wr & CR_PTEADDR_VPN_MASK, + (env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> 4, + env->mmu.tlbacc_wr); #endif - cpu_fprintf(f, "\n\n"); + qemu_fprintf(f, "\n\n"); } void nios2_tcg_init(void) diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 541b2a66c7..d125236977 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" +#include "qemu/qemu-print.h" #include "cpu.h" #include "qemu-common.h" @@ -180,30 +181,24 @@ static gint openrisc_cpu_list_compare(gconstpointer a, gconstpointer b) static void openrisc_cpu_list_entry(gpointer data, gpointer user_data) { ObjectClass *oc = data; - CPUListState *s = user_data; const char *typename; char *name; typename = object_class_get_name(oc); name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_OPENRISC_CPU)); - (*s->cpu_fprintf)(s->file, " %s\n", - name); + qemu_printf(" %s\n", name); g_free(name); } -void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf) +void cpu_openrisc_list(void) { - CPUListState s = { - .file = f, - .cpu_fprintf = cpu_fprintf, - }; GSList *list; list = object_class_get_list(TYPE_OPENRISC_CPU, false); list = g_slist_sort(list, openrisc_cpu_list_compare); - (*cpu_fprintf)(f, "Available CPUs:\n"); - g_slist_foreach(list, openrisc_cpu_list_entry, &s); + qemu_printf("Available CPUs:\n"); + g_slist_foreach(list, openrisc_cpu_list_entry, NULL); g_slist_free(list); } diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index f1b31bc24a..a50861955a 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -336,11 +336,10 @@ static inline OpenRISCCPU *openrisc_env_get_cpu(CPUOpenRISCState *env) #define ENV_OFFSET offsetof(OpenRISCCPU, env) -void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf); +void cpu_openrisc_list(void); void openrisc_cpu_do_interrupt(CPUState *cpu); bool openrisc_cpu_exec_interrupt(CPUState *cpu, int int_req); -void openrisc_cpu_dump_state(CPUState *cpu, FILE *f, - fprintf_function cpu_fprintf, int flags); +void openrisc_cpu_dump_state(CPUState *cpu, FILE *f, int flags); hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int openrisc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int openrisc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); diff --git a/target/openrisc/disas.c b/target/openrisc/disas.c index bc63093ee9..5923b2429e 100644 --- a/target/openrisc/disas.c +++ b/target/openrisc/disas.c @@ -19,7 +19,7 @@ #include "qemu/osdep.h" #include "qemu-common.h" -#include "disas/bfd.h" +#include "disas/dis-asm.h" #include "qemu/bitops.h" #include "cpu.h" diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index 89680f882d..36821948c0 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -26,6 +26,7 @@ #include "qemu-common.h" #include "qemu/log.h" #include "qemu/bitops.h" +#include "qemu/qemu-print.h" #include "exec/cpu_ldst.h" #include "exec/translator.h" @@ -1408,25 +1409,23 @@ static const TranslatorOps openrisc_tr_ops = { .disas_log = openrisc_tr_disas_log, }; -void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { DisasContext ctx; - translator_loop(&openrisc_tr_ops, &ctx.base, cs, tb); + translator_loop(&openrisc_tr_ops, &ctx.base, cs, tb, max_insns); } -void openrisc_cpu_dump_state(CPUState *cs, FILE *f, - fprintf_function cpu_fprintf, - int flags) +void openrisc_cpu_dump_state(CPUState *cs, FILE *f, int flags) { OpenRISCCPU *cpu = OPENRISC_CPU(cs); CPUOpenRISCState *env = &cpu->env; int i; - cpu_fprintf(f, "PC=%08x\n", env->pc); + qemu_fprintf(f, "PC=%08x\n", env->pc); for (i = 0; i < 32; ++i) { - cpu_fprintf(f, "R%02d=%08x%c", i, cpu_get_gpr(env, i), - (i % 4) == 3 ? '\n' : ' '); + qemu_fprintf(f, "R%02d=%08x%c", i, cpu_get_gpr(env, i), + (i % 4) == 3 ? '\n' : ' '); } } diff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c index 7c75963e3c..9d7050b5fa 100644 --- a/target/ppc/cpu-models.c +++ b/target/ppc/cpu-models.c @@ -740,7 +740,7 @@ POWERPC_DEF("7457a_v1.2", CPU_POWERPC_74x7A_v12, 7455, "PowerPC 7457A v1.2 (G4)") /* 64 bits PowerPC */ -#if defined (TARGET_PPC64) +#if defined(TARGET_PPC64) POWERPC_DEF("970_v2.2", CPU_POWERPC_970_v22, 970, "PowerPC 970 v2.2") POWERPC_DEF("970fx_v1.0", CPU_POWERPC_970FX_v10, 970, diff --git a/target/ppc/cpu-models.h b/target/ppc/cpu-models.h index efdb2fa53c..4fdb73034d 100644 --- a/target/ppc/cpu-models.h +++ b/target/ppc/cpu-models.h @@ -393,7 +393,8 @@ enum { CPU_POWERPC_RS64IV = 0x00370000, #endif /* defined(TARGET_PPC64) */ /* Original POWER */ - /* XXX: should be POWER (RIOS), RSC3308, RSC4608, + /* + * XXX: should be POWER (RIOS), RSC3308, RSC4608, * POWER2 (RIOS2) & RSC2 (P2SC) here */ /* PA Semi core */ diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index fc12b4688e..5e7cf54b2f 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -23,23 +23,28 @@ #include "qemu-common.h" #include "qemu/int128.h" -//#define PPC_EMULATE_32BITS_HYPV +/* #define PPC_EMULATE_32BITS_HYPV */ -#if defined (TARGET_PPC64) +#if defined(TARGET_PPC64) /* PowerPC 64 definitions */ #define TARGET_LONG_BITS 64 #define TARGET_PAGE_BITS 12 #define TCG_GUEST_DEFAULT_MO 0 -/* Note that the official physical address space bits is 62-M where M - is implementation dependent. I've not looked up M for the set of - cpus we emulate at the system level. */ +/* + * Note that the official physical address space bits is 62-M where M + * is implementation dependent. I've not looked up M for the set of + * cpus we emulate at the system level. + */ #define TARGET_PHYS_ADDR_SPACE_BITS 62 -/* Note that the PPC environment architecture talks about 80 bit virtual - addresses, with segmentation. Obviously that's not all visible to a - single process, which is all we're concerned with here. */ +/* + * Note that the PPC environment architecture talks about 80 bit + * virtual addresses, with segmentation. Obviously that's not all + * visible to a single process, which is all we're concerned with + * here. + */ #ifdef TARGET_ABI32 # define TARGET_VIRT_ADDR_SPACE_BITS 32 #else @@ -49,7 +54,7 @@ #define TARGET_PAGE_BITS_64K 16 #define TARGET_PAGE_BITS_16M 24 -#else /* defined (TARGET_PPC64) */ +#else /* defined(TARGET_PPC64) */ /* PowerPC 32 definitions */ #define TARGET_LONG_BITS 32 #define TARGET_PAGE_BITS 12 @@ -57,14 +62,14 @@ #define TARGET_PHYS_ADDR_SPACE_BITS 36 #define TARGET_VIRT_ADDR_SPACE_BITS 32 -#endif /* defined (TARGET_PPC64) */ +#endif /* defined(TARGET_PPC64) */ #define CPUArchState struct CPUPPCState #include "exec/cpu-defs.h" #include "cpu-qom.h" -#if defined (TARGET_PPC64) +#if defined(TARGET_PPC64) #define PPC_ELF_MACHINE EM_PPC64 #else #define PPC_ELF_MACHINE EM_PPC @@ -237,9 +242,11 @@ struct ppc_spr_t { const char *name; target_ulong default_value; #ifdef CONFIG_KVM - /* We (ab)use the fact that all the SPRs will have ids for the + /* + * We (ab)use the fact that all the SPRs will have ids for the * ONE_REG interface will have KVM_REG_PPC to use 0 as meaning, - * don't sync this */ + * don't sync this + */ uint64_t one_reg_id; #endif }; @@ -656,39 +663,39 @@ enum { #define fpscr_eex (((env->fpscr) >> FPSCR_XX) & ((env->fpscr) >> FPSCR_XE) & \ 0x1F) -#define FP_FX (1ull << FPSCR_FX) -#define FP_FEX (1ull << FPSCR_FEX) -#define FP_VX (1ull << FPSCR_VX) -#define FP_OX (1ull << FPSCR_OX) -#define FP_UX (1ull << FPSCR_UX) -#define FP_ZX (1ull << FPSCR_ZX) -#define FP_XX (1ull << FPSCR_XX) -#define FP_VXSNAN (1ull << FPSCR_VXSNAN) -#define FP_VXISI (1ull << FPSCR_VXISI) -#define FP_VXIDI (1ull << FPSCR_VXIDI) -#define FP_VXZDZ (1ull << FPSCR_VXZDZ) -#define FP_VXIMZ (1ull << FPSCR_VXIMZ) -#define FP_VXVC (1ull << FPSCR_VXVC) -#define FP_FR (1ull << FSPCR_FR) -#define FP_FI (1ull << FPSCR_FI) -#define FP_C (1ull << FPSCR_C) -#define FP_FL (1ull << FPSCR_FL) -#define FP_FG (1ull << FPSCR_FG) -#define FP_FE (1ull << FPSCR_FE) -#define FP_FU (1ull << FPSCR_FU) -#define FP_FPCC (FP_FL | FP_FG | FP_FE | FP_FU) -#define FP_FPRF (FP_C | FP_FL | FP_FG | FP_FE | FP_FU) -#define FP_VXSOFT (1ull << FPSCR_VXSOFT) -#define FP_VXSQRT (1ull << FPSCR_VXSQRT) -#define FP_VXCVI (1ull << FPSCR_VXCVI) -#define FP_VE (1ull << FPSCR_VE) -#define FP_OE (1ull << FPSCR_OE) -#define FP_UE (1ull << FPSCR_UE) -#define FP_ZE (1ull << FPSCR_ZE) -#define FP_XE (1ull << FPSCR_XE) -#define FP_NI (1ull << FPSCR_NI) -#define FP_RN1 (1ull << FPSCR_RN1) -#define FP_RN (1ull << FPSCR_RN) +#define FP_FX (1ull << FPSCR_FX) +#define FP_FEX (1ull << FPSCR_FEX) +#define FP_VX (1ull << FPSCR_VX) +#define FP_OX (1ull << FPSCR_OX) +#define FP_UX (1ull << FPSCR_UX) +#define FP_ZX (1ull << FPSCR_ZX) +#define FP_XX (1ull << FPSCR_XX) +#define FP_VXSNAN (1ull << FPSCR_VXSNAN) +#define FP_VXISI (1ull << FPSCR_VXISI) +#define FP_VXIDI (1ull << FPSCR_VXIDI) +#define FP_VXZDZ (1ull << FPSCR_VXZDZ) +#define FP_VXIMZ (1ull << FPSCR_VXIMZ) +#define FP_VXVC (1ull << FPSCR_VXVC) +#define FP_FR (1ull << FSPCR_FR) +#define FP_FI (1ull << FPSCR_FI) +#define FP_C (1ull << FPSCR_C) +#define FP_FL (1ull << FPSCR_FL) +#define FP_FG (1ull << FPSCR_FG) +#define FP_FE (1ull << FPSCR_FE) +#define FP_FU (1ull << FPSCR_FU) +#define FP_FPCC (FP_FL | FP_FG | FP_FE | FP_FU) +#define FP_FPRF (FP_C | FP_FL | FP_FG | FP_FE | FP_FU) +#define FP_VXSOFT (1ull << FPSCR_VXSOFT) +#define FP_VXSQRT (1ull << FPSCR_VXSQRT) +#define FP_VXCVI (1ull << FPSCR_VXCVI) +#define FP_VE (1ull << FPSCR_VE) +#define FP_OE (1ull << FPSCR_OE) +#define FP_UE (1ull << FPSCR_UE) +#define FP_ZE (1ull << FPSCR_ZE) +#define FP_XE (1ull << FPSCR_XE) +#define FP_NI (1ull << FPSCR_NI) +#define FP_RN1 (1ull << FPSCR_RN1) +#define FP_RN (1ull << FPSCR_RN) /* the exception bits which can be cleared by mcrfs - includes FX */ #define FP_EX_CLEAR_BITS (FP_FX | FP_OX | FP_UX | FP_ZX | \ @@ -698,8 +705,8 @@ enum { /*****************************************************************************/ /* Vector status and control register */ -#define VSCR_NJ 16 /* Vector non-java */ -#define VSCR_SAT 0 /* Vector saturation */ +#define VSCR_NJ 16 /* Vector non-java */ +#define VSCR_SAT 0 /* Vector saturation */ /*****************************************************************************/ /* BookE e500 MMU registers */ @@ -962,9 +969,10 @@ struct ppc_radix_page_info { /*****************************************************************************/ /* The whole PowerPC CPU context */ -/* PowerPC needs eight modes for different hypervisor/supervisor/guest + - * real/paged mode combinations. The other two modes are for external PID - * load/store. +/* + * PowerPC needs eight modes for different hypervisor/supervisor/guest + * + real/paged mode combinations. The other two modes are for + * external PID load/store. */ #define NB_MMU_MODES 10 #define MMU_MODE8_SUFFIX _epl @@ -976,8 +984,9 @@ struct ppc_radix_page_info { #define PPC_CPU_INDIRECT_OPCODES_LEN 0x20 struct CPUPPCState { - /* First are the most commonly used resources - * during translated code execution + /* + * First are the most commonly used resources during translated + * code execution */ /* general purpose registers */ target_ulong gpr[32]; @@ -1023,8 +1032,8 @@ struct CPUPPCState { /* High part of 128-bit helper return. */ uint64_t retxh; - int access_type; /* when a memory exception occurs, the access - type is stored here */ + /* when a memory exception occurs, the access type is stored here */ + int access_type; CPU_COMMON @@ -1072,8 +1081,10 @@ struct CPUPPCState { /* SPE registers */ uint64_t spe_acc; uint32_t spe_fscr; - /* SPE and Altivec can share a status since they will never be used - * simultaneously */ + /* + * SPE and Altivec can share a status since they will never be + * used simultaneously + */ float_status vec_status; /* Internal devices resources */ @@ -1103,7 +1114,8 @@ struct CPUPPCState { int error_code; uint32_t pending_interrupts; #if !defined(CONFIG_USER_ONLY) - /* This is the IRQ controller, which is implementation dependent + /* + * This is the IRQ controller, which is implementation dependent * and only relevant when emulating a complete machine. */ uint32_t irq_input_state; @@ -1117,7 +1129,8 @@ struct CPUPPCState { hwaddr mpic_iack; /* true when the external proxy facility mode is enabled */ bool mpic_proxy; - /* set when the processor has an HV mode, thus HV priv + /* + * set when the processor has an HV mode, thus HV priv * instructions and SPRs are diallowed if MSR:HV is 0 */ bool has_hv_mode; @@ -1149,8 +1162,10 @@ struct CPUPPCState { /* booke timers */ - /* Specifies bit locations of the Time Base used to signal a fixed timer - * exception on a transition from 0 to 1. (watchdog or fixed-interval timer) + /* + * Specifies bit locations of the Time Base used to signal a fixed + * timer exception on a transition from 0 to 1. (watchdog or + * fixed-interval timer) * * 0 selects the least significant bit. * 63 selects the most significant bit. @@ -1250,8 +1265,8 @@ struct PPCVirtualHypervisorClass { void (*unmap_hptes)(PPCVirtualHypervisor *vhyp, const ppc_hash_pte64_t *hptes, hwaddr ptex, int n); - void (*store_hpte)(PPCVirtualHypervisor *vhyp, hwaddr ptex, - uint64_t pte0, uint64_t pte1); + void (*hpte_set_c)(PPCVirtualHypervisor *vhyp, hwaddr ptex, uint64_t pte1); + void (*hpte_set_r)(PPCVirtualHypervisor *vhyp, hwaddr ptex, uint64_t pte1); void (*get_pate)(PPCVirtualHypervisor *vhyp, ppc_v3_pate_t *entry); target_ulong (*encode_hpt_for_kvm_pr)(PPCVirtualHypervisor *vhyp); }; @@ -1268,10 +1283,8 @@ struct PPCVirtualHypervisorClass { void ppc_cpu_do_interrupt(CPUState *cpu); bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req); -void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, - int flags); -void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f, - fprintf_function cpu_fprintf, int flags); +void ppc_cpu_dump_state(CPUState *cpu, FILE *f, int flags); +void ppc_cpu_dump_statistics(CPUState *cpu, int flags); hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int ppc_cpu_gdb_read_register_apple(CPUState *cpu, uint8_t *buf, int reg); @@ -1292,53 +1305,54 @@ extern const struct VMStateDescription vmstate_ppc_cpu; /*****************************************************************************/ void ppc_translate_init(void); -/* you can call this signal handler from your SIGBUS and SIGSEGV - signal handlers to inform the virtual CPU of exceptions. non zero - is returned if the signal was handled by the virtual CPU. */ -int cpu_ppc_signal_handler (int host_signum, void *pinfo, - void *puc); +/* + * you can call this signal handler from your SIGBUS and SIGSEGV + * signal handlers to inform the virtual CPU of exceptions. non zero + * is returned if the signal was handled by the virtual CPU. + */ +int cpu_ppc_signal_handler(int host_signum, void *pinfo, void *puc); #if defined(CONFIG_USER_ONLY) int ppc_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); #endif #if !defined(CONFIG_USER_ONLY) -void ppc_store_sdr1 (CPUPPCState *env, target_ulong value); +void ppc_store_sdr1(CPUPPCState *env, target_ulong value); void ppc_store_ptcr(CPUPPCState *env, target_ulong value); #endif /* !defined(CONFIG_USER_ONLY) */ -void ppc_store_msr (CPUPPCState *env, target_ulong value); +void ppc_store_msr(CPUPPCState *env, target_ulong value); -void ppc_cpu_list (FILE *f, fprintf_function cpu_fprintf); +void ppc_cpu_list(void); /* Time-base and decrementer management */ #ifndef NO_CPU_IO_DEFS -uint64_t cpu_ppc_load_tbl (CPUPPCState *env); -uint32_t cpu_ppc_load_tbu (CPUPPCState *env); -void cpu_ppc_store_tbu (CPUPPCState *env, uint32_t value); -void cpu_ppc_store_tbl (CPUPPCState *env, uint32_t value); -uint64_t cpu_ppc_load_atbl (CPUPPCState *env); -uint32_t cpu_ppc_load_atbu (CPUPPCState *env); -void cpu_ppc_store_atbl (CPUPPCState *env, uint32_t value); -void cpu_ppc_store_atbu (CPUPPCState *env, uint32_t value); +uint64_t cpu_ppc_load_tbl(CPUPPCState *env); +uint32_t cpu_ppc_load_tbu(CPUPPCState *env); +void cpu_ppc_store_tbu(CPUPPCState *env, uint32_t value); +void cpu_ppc_store_tbl(CPUPPCState *env, uint32_t value); +uint64_t cpu_ppc_load_atbl(CPUPPCState *env); +uint32_t cpu_ppc_load_atbu(CPUPPCState *env); +void cpu_ppc_store_atbl(CPUPPCState *env, uint32_t value); +void cpu_ppc_store_atbu(CPUPPCState *env, uint32_t value); bool ppc_decr_clear_on_delivery(CPUPPCState *env); target_ulong cpu_ppc_load_decr(CPUPPCState *env); void cpu_ppc_store_decr(CPUPPCState *env, target_ulong value); target_ulong cpu_ppc_load_hdecr(CPUPPCState *env); void cpu_ppc_store_hdecr(CPUPPCState *env, target_ulong value); -uint64_t cpu_ppc_load_purr (CPUPPCState *env); -uint32_t cpu_ppc601_load_rtcl (CPUPPCState *env); -uint32_t cpu_ppc601_load_rtcu (CPUPPCState *env); +uint64_t cpu_ppc_load_purr(CPUPPCState *env); +uint32_t cpu_ppc601_load_rtcl(CPUPPCState *env); +uint32_t cpu_ppc601_load_rtcu(CPUPPCState *env); #if !defined(CONFIG_USER_ONLY) -void cpu_ppc601_store_rtcl (CPUPPCState *env, uint32_t value); -void cpu_ppc601_store_rtcu (CPUPPCState *env, uint32_t value); -target_ulong load_40x_pit (CPUPPCState *env); -void store_40x_pit (CPUPPCState *env, target_ulong val); -void store_40x_dbcr0 (CPUPPCState *env, uint32_t val); -void store_40x_sler (CPUPPCState *env, uint32_t val); -void store_booke_tcr (CPUPPCState *env, target_ulong val); -void store_booke_tsr (CPUPPCState *env, target_ulong val); -void ppc_tlb_invalidate_all (CPUPPCState *env); -void ppc_tlb_invalidate_one (CPUPPCState *env, target_ulong addr); +void cpu_ppc601_store_rtcl(CPUPPCState *env, uint32_t value); +void cpu_ppc601_store_rtcu(CPUPPCState *env, uint32_t value); +target_ulong load_40x_pit(CPUPPCState *env); +void store_40x_pit(CPUPPCState *env, target_ulong val); +void store_40x_dbcr0(CPUPPCState *env, uint32_t val); +void store_40x_sler(CPUPPCState *env, uint32_t val); +void store_booke_tcr(CPUPPCState *env, target_ulong val); +void store_booke_tsr(CPUPPCState *env, target_ulong val); +void ppc_tlb_invalidate_all(CPUPPCState *env); +void ppc_tlb_invalidate_one(CPUPPCState *env, target_ulong addr); void cpu_ppc_set_vhyp(PowerPCCPU *cpu, PPCVirtualHypervisor *vhyp); #endif #endif @@ -1351,7 +1365,8 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn) gprv = env->gpr[gprn]; if (env->flags & POWERPC_FLAG_SPE) { - /* If the CPU implements the SPE extension, we have to get the + /* + * If the CPU implements the SPE extension, we have to get the * high bits of the GPR from the gprh storage area */ gprv &= 0xFFFFFFFFULL; @@ -1362,8 +1377,8 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn) } /* Device control registers */ -int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp); -int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val); +int ppc_dcr_read(ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp); +int ppc_dcr_write(ppc_dcr_t *dcr_env, int dcrn, uint32_t val); #define POWERPC_CPU_TYPE_SUFFIX "-" TYPE_POWERPC_CPU #define POWERPC_CPU_TYPE_NAME(model) model POWERPC_CPU_TYPE_SUFFIX @@ -1374,7 +1389,7 @@ int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val); /* MMU modes definitions */ #define MMU_USER_IDX 0 -static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) +static inline int cpu_mmu_index(CPUPPCState *env, bool ifetch) { return ifetch ? env->immu_idx : env->dmmu_idx; } @@ -1992,17 +2007,17 @@ void ppc_compat_add_property(Object *obj, const char *name, /* External Input Interrupt Directed to Guest State */ #define EPCR_EXTGS (1 << 31) -#define L1CSR0_CPE 0x00010000 /* Data Cache Parity Enable */ -#define L1CSR0_CUL 0x00000400 /* (D-)Cache Unable to Lock */ -#define L1CSR0_DCLFR 0x00000100 /* D-Cache Lock Flash Reset */ -#define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */ -#define L1CSR0_DCE 0x00000001 /* Data Cache Enable */ +#define L1CSR0_CPE 0x00010000 /* Data Cache Parity Enable */ +#define L1CSR0_CUL 0x00000400 /* (D-)Cache Unable to Lock */ +#define L1CSR0_DCLFR 0x00000100 /* D-Cache Lock Flash Reset */ +#define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */ +#define L1CSR0_DCE 0x00000001 /* Data Cache Enable */ -#define L1CSR1_CPE 0x00010000 /* Instruction Cache Parity Enable */ -#define L1CSR1_ICUL 0x00000400 /* I-Cache Unable to Lock */ -#define L1CSR1_ICLFR 0x00000100 /* I-Cache Lock Flash Reset */ -#define L1CSR1_ICFI 0x00000002 /* Instruction Cache Flash Invalidate */ -#define L1CSR1_ICE 0x00000001 /* Instruction Cache Enable */ +#define L1CSR1_CPE 0x00010000 /* Instruction Cache Parity Enable */ +#define L1CSR1_ICUL 0x00000400 /* I-Cache Unable to Lock */ +#define L1CSR1_ICLFR 0x00000100 /* I-Cache Lock Flash Reset */ +#define L1CSR1_ICFI 0x00000002 /* Instruction Cache Flash Invalidate */ +#define L1CSR1_ICE 0x00000001 /* Instruction Cache Enable */ /* HID0 bits */ #define HID0_DEEPNAP (1 << 24) /* pre-2.06 */ @@ -2228,7 +2243,8 @@ enum { }; /*****************************************************************************/ -/* Memory access type : +/* + * Memory access type : * may be needed for precise access rights control and precise exceptions. */ enum { @@ -2244,8 +2260,9 @@ enum { ACCESS_CACHE = 0x60, /* Cache manipulation */ }; -/* Hardware interruption sources: - * all those exception can be raised simulteaneously +/* + * Hardware interrupt sources: + * all those exception can be raised simulteaneously */ /* Input pins definitions */ enum { @@ -2327,9 +2344,11 @@ enum { enum { /* POWER7 input pins */ POWER7_INPUT_INT = 0, - /* POWER7 probably has other inputs, but we don't care about them + /* + * POWER7 probably has other inputs, but we don't care about them * for any existing machine. We can wire these up when we need - * them */ + * them + */ POWER7_INPUT_NB, }; @@ -2409,6 +2428,12 @@ enum { target_ulong cpu_read_xer(CPUPPCState *env); void cpu_write_xer(CPUPPCState *env, target_ulong xer); +/* + * All 64-bit server processors compliant with arch 2.x, ie. 970 and newer, + * have PPC_SEGMENT_64B. + */ +#define is_book3s_arch2x(ctx) (!!((ctx)->insns_flags & PPC_SEGMENT_64B)) + static inline void cpu_get_tb_cpu_state(CPUPPCState *env, target_ulong *pc, target_ulong *cs_base, uint32_t *flags) { @@ -2623,7 +2648,7 @@ static inline ppc_avr_t *cpu_avr_ptr(CPUPPCState *env, int i) return (ppc_avr_t *)((uintptr_t)env + avr_full_offset(i)); } -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env); +void dump_mmu(CPUPPCState *env); void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len); #endif /* PPC_CPU_H */ diff --git a/target/ppc/dfp_helper.c b/target/ppc/dfp_helper.c index 9164fe701b..f102177572 100644 --- a/target/ppc/dfp_helper.c +++ b/target/ppc/dfp_helper.c @@ -1104,19 +1104,19 @@ void helper_##op(CPUPPCState *env, uint64_t *t, uint64_t *b, uint32_t s) \ } \ } \ \ - while (offset < (size)/4) { \ + while (offset < (size) / 4) { \ n++; \ - digits[(size)/4-n] = dfp_get_bcd_digit_##size(dfp.b64, offset++); \ - if (digits[(size)/4-n] > 10) { \ + digits[(size) / 4 - n] = dfp_get_bcd_digit_##size(dfp.b64, offset++); \ + if (digits[(size) / 4 - n] > 10) { \ dfp_set_FPSCR_flag(&dfp, FP_VX | FP_VXCVI, FPSCR_VE); \ return; \ } else { \ - nonzero |= (digits[(size)/4-n] > 0); \ + nonzero |= (digits[(size) / 4 - n] > 0); \ } \ } \ \ if (nonzero) { \ - decNumberSetBCD(&dfp.t, digits+((size)/4)-n, n); \ + decNumberSetBCD(&dfp.t, digits + ((size) / 4) - n, n); \ } \ \ if (s && sgn) { \ @@ -1170,13 +1170,13 @@ DFP_HELPER_XEX(dxexq, 128) static void dfp_set_raw_exp_64(uint64_t *t, uint64_t raw) { *t &= 0x8003ffffffffffffULL; - *t |= (raw << (63-13)); + *t |= (raw << (63 - 13)); } static void dfp_set_raw_exp_128(uint64_t *t, uint64_t raw) { t[HI_IDX] &= 0x80003fffffffffffULL; - t[HI_IDX] |= (raw << (63-17)); + t[HI_IDX] |= (raw << (63 - 17)); } #define DFP_HELPER_IEX(op, size) \ diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index beafcf1ebd..ec2c177091 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -25,9 +25,9 @@ #include "internal.h" #include "helper_regs.h" -//#define DEBUG_OP -//#define DEBUG_SOFTWARE_TLB -//#define DEBUG_EXCEPTIONS +/* #define DEBUG_OP */ +/* #define DEBUG_SOFTWARE_TLB */ +/* #define DEBUG_EXCEPTIONS */ #ifdef DEBUG_EXCEPTIONS # define LOG_EXCP(...) qemu_log(__VA_ARGS__) @@ -126,8 +126,9 @@ static uint64_t ppc_excp_vector_offset(CPUState *cs, int ail) return offset; } -/* Note that this function should be greatly optimized - * when called with a constant excp, from ppc_hw_interrupt +/* + * Note that this function should be greatly optimized when called + * with a constant excp, from ppc_hw_interrupt */ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) { @@ -147,7 +148,8 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) msr = env->msr & ~0x783f0000ULL; } - /* new interrupt handler msr preserves existing HV and ME unless + /* + * new interrupt handler msr preserves existing HV and ME unless * explicitly overriden */ new_msr = env->msr & (((target_ulong)1 << MSR_ME) | MSR_HVB); @@ -166,7 +168,8 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) excp = powerpc_reset_wakeup(cs, env, excp, &msr); } - /* Exception targetting modifiers + /* + * Exception targetting modifiers * * LPES0 is supported on POWER7/8/9 * LPES1 is not supported (old iSeries mode) @@ -194,7 +197,8 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) ail = 0; } - /* Hypervisor emulation assistance interrupt only exists on server + /* + * Hypervisor emulation assistance interrupt only exists on server * arch 2.05 server or later. We also don't want to generate it if * we don't have HVB in msr_mask (PAPR mode). */ @@ -229,8 +233,9 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) break; case POWERPC_EXCP_MCHECK: /* Machine check exception */ if (msr_me == 0) { - /* Machine check exception is not enabled. - * Enter checkstop state. + /* + * Machine check exception is not enabled. Enter + * checkstop state. */ fprintf(stderr, "Machine check while not allowed. " "Entering checkstop state\n"); @@ -242,8 +247,9 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) cpu_interrupt_exittb(cs); } if (env->msr_mask & MSR_HVB) { - /* ISA specifies HV, but can be delivered to guest with HV clear - * (e.g., see FWNMI in PAPR). + /* + * ISA specifies HV, but can be delivered to guest with HV + * clear (e.g., see FWNMI in PAPR). */ new_msr |= (target_ulong)MSR_HVB; } @@ -294,9 +300,10 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) break; case POWERPC_EXCP_ALIGN: /* Alignment exception */ /* Get rS/rD and rA from faulting opcode */ - /* Note: the opcode fields will not be set properly for a direct - * store load/store, but nobody cares as nobody actually uses - * direct store segments. + /* + * Note: the opcode fields will not be set properly for a + * direct store load/store, but nobody cares as nobody + * actually uses direct store segments. */ env->spr[SPR_DSISR] |= (env->error_code & 0x03FF0000) >> 16; break; @@ -310,7 +317,8 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) return; } - /* FP exceptions always have NIP pointing to the faulting + /* + * FP exceptions always have NIP pointing to the faulting * instruction, so always use store_next and claim we are * precise in the MSR. */ @@ -341,7 +349,8 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) dump_syscall(env); lev = env->error_code; - /* We need to correct the NIP which in this case is supposed + /* + * We need to correct the NIP which in this case is supposed * to point to the next instruction */ env->nip += 4; @@ -425,8 +434,9 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) new_msr |= ((target_ulong)1 << MSR_ME); } if (env->msr_mask & MSR_HVB) { - /* ISA specifies HV, but can be delivered to guest with HV clear - * (e.g., see FWNMI in PAPR, NMI injection in QEMU). + /* + * ISA specifies HV, but can be delivered to guest with HV + * clear (e.g., see FWNMI in PAPR, NMI injection in QEMU). */ new_msr |= (target_ulong)MSR_HVB; } else { @@ -675,7 +685,8 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) env->spr[asrr1] = env->spr[srr1]; } - /* Sort out endianness of interrupt, this differs depending on the + /* + * Sort out endianness of interrupt, this differs depending on the * CPU, the HV mode, etc... */ #ifdef TARGET_PPC64 @@ -716,8 +727,9 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) } vector |= env->excp_prefix; - /* AIL only works if there is no HV transition and we are running with - * translations enabled + /* + * AIL only works if there is no HV transition and we are running + * with translations enabled */ if (!((msr >> MSR_IR) & 1) || !((msr >> MSR_DR) & 1) || ((new_msr & MSR_HVB) && !(msr & MSR_HVB))) { @@ -745,8 +757,9 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) } } #endif - /* We don't use hreg_store_msr here as already have treated - * any special case that could occur. Just store MSR and update hflags + /* + * We don't use hreg_store_msr here as already have treated any + * special case that could occur. Just store MSR and update hflags * * Note: We *MUST* not use hreg_store_msr() as-is anyway because it * will prevent setting of the HV bit which some exceptions might need @@ -762,8 +775,9 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) /* Reset the reservation */ env->reserve_addr = -1; - /* Any interrupt is context synchronizing, check if TCG TLB - * needs a delayed flush on ppc64 + /* + * Any interrupt is context synchronizing, check if TCG TLB needs + * a delayed flush on ppc64 */ check_tlb_flush(env, false); } @@ -1015,8 +1029,9 @@ void helper_pminsn(CPUPPCState *env, powerpc_pm_insn_t insn) cs = CPU(ppc_env_get_cpu(env)); cs->halted = 1; - /* The architecture specifies that HDEC interrupts are - * discarded in PM states + /* + * The architecture specifies that HDEC interrupts are discarded + * in PM states */ env->pending_interrupts &= ~(1 << PPC_INTERRUPT_HDECR); @@ -1047,8 +1062,9 @@ static inline void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr) #if defined(DEBUG_OP) cpu_dump_rfi(env->nip, env->msr); #endif - /* No need to raise an exception here, - * as rfi is always the last insn of a TB + /* + * No need to raise an exception here, as rfi is always the last + * insn of a TB */ cpu_interrupt_exittb(cs); /* Reset the reservation */ @@ -1067,8 +1083,9 @@ void helper_rfi(CPUPPCState *env) #if defined(TARGET_PPC64) void helper_rfid(CPUPPCState *env) { - /* The architeture defines a number of rules for which bits - * can change but in practice, we handle this in hreg_store_msr() + /* + * The architeture defines a number of rules for which bits can + * change but in practice, we handle this in hreg_store_msr() * which will be called by do_rfi(), so there is no need to filter * here */ @@ -1206,9 +1223,11 @@ static int book3s_dbell2irq(target_ulong rb) { int msg = rb & DBELL_TYPE_MASK; - /* A Directed Hypervisor Doorbell message is sent only if the + /* + * A Directed Hypervisor Doorbell message is sent only if the * message type is 5. All other types are reserved and the - * instruction is a no-op */ + * instruction is a no-op + */ return msg == DBELL_TYPE_DBELL_SERVER ? PPC_INTERRUPT_HDOORBELL : -1; } diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 2ed4f42275..0b7308f539 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -90,10 +90,12 @@ uint32_t helper_tosingle(uint64_t arg) ret = extract64(arg, 62, 2) << 30; ret |= extract64(arg, 29, 30); } else { - /* Zero or Denormal result. If the exponent is in bounds for - * a single-precision denormal result, extract the proper bits. - * If the input is not zero, and the exponent is out of bounds, - * then the result is undefined; this underflows to zero. + /* + * Zero or Denormal result. If the exponent is in bounds for + * a single-precision denormal result, extract the proper + * bits. If the input is not zero, and the exponent is out of + * bounds, then the result is undefined; this underflows to + * zero. */ ret = extract64(arg, 63, 1) << 31; if (unlikely(exp >= 874)) { @@ -1090,7 +1092,7 @@ uint32_t helper_ftsqrt(uint64_t frb) fe_flag = 1; } else if (unlikely(float64_is_neg(frb))) { fe_flag = 1; - } else if (!float64_is_zero(frb) && (e_b <= (-1022+52))) { + } else if (!float64_is_zero(frb) && (e_b <= (-1022 + 52))) { fe_flag = 1; } @@ -1789,7 +1791,8 @@ uint32_t helper_efdcmpeq(CPUPPCState *env, uint64_t op1, uint64_t op2) #define float64_to_float64(x, env) x -/* VSX_ADD_SUB - VSX floating point add/subract +/* + * VSX_ADD_SUB - VSX floating point add/subract * name - instruction mnemonic * op - operation (add or sub) * nels - number of elements (1, 2 or 4) @@ -1872,7 +1875,8 @@ void helper_xsaddqp(CPUPPCState *env, uint32_t opcode) do_float_check_status(env, GETPC()); } -/* VSX_MUL - VSX floating point multiply +/* + * VSX_MUL - VSX floating point multiply * op - instruction mnemonic * nels - number of elements (1, 2 or 4) * tp - type (float32 or float64) @@ -1950,7 +1954,8 @@ void helper_xsmulqp(CPUPPCState *env, uint32_t opcode) do_float_check_status(env, GETPC()); } -/* VSX_DIV - VSX floating point divide +/* + * VSX_DIV - VSX floating point divide * op - instruction mnemonic * nels - number of elements (1, 2 or 4) * tp - type (float32 or float64) @@ -2034,7 +2039,8 @@ void helper_xsdivqp(CPUPPCState *env, uint32_t opcode) do_float_check_status(env, GETPC()); } -/* VSX_RE - VSX floating point reciprocal estimate +/* + * VSX_RE - VSX floating point reciprocal estimate * op - instruction mnemonic * nels - number of elements (1, 2 or 4) * tp - type (float32 or float64) @@ -2075,7 +2081,8 @@ VSX_RE(xsresp, 1, float64, VsrD(0), 1, 1) VSX_RE(xvredp, 2, float64, VsrD(i), 0, 0) VSX_RE(xvresp, 4, float32, VsrW(i), 0, 0) -/* VSX_SQRT - VSX floating point square root +/* + * VSX_SQRT - VSX floating point square root * op - instruction mnemonic * nels - number of elements (1, 2 or 4) * tp - type (float32 or float64) @@ -2124,7 +2131,8 @@ VSX_SQRT(xssqrtsp, 1, float64, VsrD(0), 1, 1) VSX_SQRT(xvsqrtdp, 2, float64, VsrD(i), 0, 0) VSX_SQRT(xvsqrtsp, 4, float32, VsrW(i), 0, 0) -/* VSX_RSQRTE - VSX floating point reciprocal square root estimate +/* + *VSX_RSQRTE - VSX floating point reciprocal square root estimate * op - instruction mnemonic * nels - number of elements (1, 2 or 4) * tp - type (float32 or float64) @@ -2174,7 +2182,8 @@ VSX_RSQRTE(xsrsqrtesp, 1, float64, VsrD(0), 1, 1) VSX_RSQRTE(xvrsqrtedp, 2, float64, VsrD(i), 0, 0) VSX_RSQRTE(xvrsqrtesp, 4, float32, VsrW(i), 0, 0) -/* VSX_TDIV - VSX floating point test for divide +/* + * VSX_TDIV - VSX floating point test for divide * op - instruction mnemonic * nels - number of elements (1, 2 or 4) * tp - type (float32 or float64) @@ -2207,18 +2216,20 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ if (unlikely(tp##_is_any_nan(xa.fld) || \ tp##_is_any_nan(xb.fld))) { \ fe_flag = 1; \ - } else if ((e_b <= emin) || (e_b >= (emax-2))) { \ + } else if ((e_b <= emin) || (e_b >= (emax - 2))) { \ fe_flag = 1; \ } else if (!tp##_is_zero(xa.fld) && \ (((e_a - e_b) >= emax) || \ - ((e_a - e_b) <= (emin+1)) || \ - (e_a <= (emin+nbits)))) { \ + ((e_a - e_b) <= (emin + 1)) || \ + (e_a <= (emin + nbits)))) { \ fe_flag = 1; \ } \ \ if (unlikely(tp##_is_zero_or_denormal(xb.fld))) { \ - /* XB is not zero because of the above check and */ \ - /* so must be denormalized. */ \ + /* \ + * XB is not zero because of the above check and so \ + * must be denormalized. \ + */ \ fg_flag = 1; \ } \ } \ @@ -2231,7 +2242,8 @@ VSX_TDIV(xstdivdp, 1, float64, VsrD(0), -1022, 1023, 52) VSX_TDIV(xvtdivdp, 2, float64, VsrD(i), -1022, 1023, 52) VSX_TDIV(xvtdivsp, 4, float32, VsrW(i), -126, 127, 23) -/* VSX_TSQRT - VSX floating point test for square root +/* + * VSX_TSQRT - VSX floating point test for square root * op - instruction mnemonic * nels - number of elements (1, 2 or 4) * tp - type (float32 or float64) @@ -2266,13 +2278,15 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ } else if (unlikely(tp##_is_neg(xb.fld))) { \ fe_flag = 1; \ } else if (!tp##_is_zero(xb.fld) && \ - (e_b <= (emin+nbits))) { \ + (e_b <= (emin + nbits))) { \ fe_flag = 1; \ } \ \ if (unlikely(tp##_is_zero_or_denormal(xb.fld))) { \ - /* XB is not zero because of the above check and */ \ - /* therefore must be denormalized. */ \ + /* \ + * XB is not zero because of the above check and \ + * therefore must be denormalized. \ + */ \ fg_flag = 1; \ } \ } \ @@ -2285,7 +2299,8 @@ VSX_TSQRT(xstsqrtdp, 1, float64, VsrD(0), -1022, 52) VSX_TSQRT(xvtsqrtdp, 2, float64, VsrD(i), -1022, 52) VSX_TSQRT(xvtsqrtsp, 4, float32, VsrW(i), -126, 23) -/* VSX_MADD - VSX floating point muliply/add variations +/* + * VSX_MADD - VSX floating point muliply/add variations * op - instruction mnemonic * nels - number of elements (1, 2 or 4) * tp - type (float32 or float64) @@ -2322,8 +2337,10 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ float_status tstat = env->fp_status; \ set_float_exception_flags(0, &tstat); \ if (r2sp && (tstat.float_rounding_mode == float_round_nearest_even)) {\ - /* Avoid double rounding errors by rounding the intermediate */ \ - /* result to odd. */ \ + /* \ + * Avoid double rounding errors by rounding the intermediate \ + * result to odd. \ + */ \ set_float_rounding_mode(float_round_to_zero, &tstat); \ xt_out.fld = tp##_muladd(xa.fld, b->fld, c->fld, \ maddflgs, &tstat); \ @@ -2388,7 +2405,8 @@ VSX_MADD(xvnmaddmsp, 4, float32, VsrW(i), NMADD_FLGS, 0, 0, 0) VSX_MADD(xvnmsubasp, 4, float32, VsrW(i), NMSUB_FLGS, 1, 0, 0) VSX_MADD(xvnmsubmsp, 4, float32, VsrW(i), NMSUB_FLGS, 0, 0, 0) -/* VSX_SCALAR_CMP_DP - VSX scalar floating point compare double precision +/* + * VSX_SCALAR_CMP_DP - VSX scalar floating point compare double precision * op - instruction mnemonic * cmp - comparison operation * exp - expected result of comparison @@ -2604,7 +2622,8 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ VSX_SCALAR_CMPQ(xscmpoqp, 1) VSX_SCALAR_CMPQ(xscmpuqp, 0) -/* VSX_MAX_MIN - VSX floating point maximum/minimum +/* + * VSX_MAX_MIN - VSX floating point maximum/minimum * name - instruction mnemonic * op - operation (max or min) * nels - number of elements (1, 2 or 4) @@ -2733,7 +2752,8 @@ void helper_##name(CPUPPCState *env, uint32_t opcode) \ VSX_MAX_MINJ(xsmaxjdp, 1); VSX_MAX_MINJ(xsminjdp, 0); -/* VSX_CMP - VSX floating point compare +/* + * VSX_CMP - VSX floating point compare * op - instruction mnemonic * nels - number of elements (1, 2 or 4) * tp - type (float32 or float64) @@ -2778,7 +2798,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ } \ \ putVSR(xT(opcode), &xt, env); \ - if ((opcode >> (31-21)) & 1) { \ + if ((opcode >> (31 - 21)) & 1) { \ env->crf[6] = (all_true ? 0x8 : 0) | (all_false ? 0x2 : 0); \ } \ do_float_check_status(env, GETPC()); \ @@ -2793,7 +2813,8 @@ VSX_CMP(xvcmpgesp, 4, float32, VsrW(i), le, 1, 1) VSX_CMP(xvcmpgtsp, 4, float32, VsrW(i), lt, 1, 1) VSX_CMP(xvcmpnesp, 4, float32, VsrW(i), eq, 0, 0) -/* VSX_CVT_FP_TO_FP - VSX floating point/floating point conversion +/* + * VSX_CVT_FP_TO_FP - VSX floating point/floating point conversion * op - instruction mnemonic * nels - number of elements (1, 2 or 4) * stp - source type (float32 or float64) @@ -2829,10 +2850,11 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ VSX_CVT_FP_TO_FP(xscvdpsp, 1, float64, float32, VsrD(0), VsrW(0), 1) VSX_CVT_FP_TO_FP(xscvspdp, 1, float32, float64, VsrW(0), VsrD(0), 1) -VSX_CVT_FP_TO_FP(xvcvdpsp, 2, float64, float32, VsrD(i), VsrW(2*i), 0) -VSX_CVT_FP_TO_FP(xvcvspdp, 2, float32, float64, VsrW(2*i), VsrD(i), 0) +VSX_CVT_FP_TO_FP(xvcvdpsp, 2, float64, float32, VsrD(i), VsrW(2 * i), 0) +VSX_CVT_FP_TO_FP(xvcvspdp, 2, float32, float64, VsrW(2 * i), VsrD(i), 0) -/* VSX_CVT_FP_TO_FP_VECTOR - VSX floating point/floating point conversion +/* + * VSX_CVT_FP_TO_FP_VECTOR - VSX floating point/floating point conversion * op - instruction mnemonic * nels - number of elements (1, 2 or 4) * stp - source type (float32 or float64) @@ -2868,7 +2890,8 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ VSX_CVT_FP_TO_FP_VECTOR(xscvdpqp, 1, float64, float128, VsrD(0), f128, 1) -/* VSX_CVT_FP_TO_FP_HP - VSX floating point/floating point conversion +/* + * VSX_CVT_FP_TO_FP_HP - VSX floating point/floating point conversion * involving one half precision value * op - instruction mnemonic * nels - number of elements (1, 2 or 4) @@ -2953,7 +2976,8 @@ uint64_t helper_xscvspdpn(CPUPPCState *env, uint64_t xb) return float32_to_float64(xb >> 32, &tstat); } -/* VSX_CVT_FP_TO_INT - VSX floating point to integer conversion +/* + * VSX_CVT_FP_TO_INT - VSX floating point to integer conversion * op - instruction mnemonic * nels - number of elements (1, 2 or 4) * stp - source type (float32 or float64) @@ -2996,17 +3020,18 @@ VSX_CVT_FP_TO_INT(xscvdpuxds, 1, float64, uint64, VsrD(0), VsrD(0), 0ULL) VSX_CVT_FP_TO_INT(xscvdpuxws, 1, float64, uint32, VsrD(0), VsrW(1), 0U) VSX_CVT_FP_TO_INT(xvcvdpsxds, 2, float64, int64, VsrD(i), VsrD(i), \ 0x8000000000000000ULL) -VSX_CVT_FP_TO_INT(xvcvdpsxws, 2, float64, int32, VsrD(i), VsrW(2*i), \ +VSX_CVT_FP_TO_INT(xvcvdpsxws, 2, float64, int32, VsrD(i), VsrW(2 * i), \ 0x80000000U) VSX_CVT_FP_TO_INT(xvcvdpuxds, 2, float64, uint64, VsrD(i), VsrD(i), 0ULL) -VSX_CVT_FP_TO_INT(xvcvdpuxws, 2, float64, uint32, VsrD(i), VsrW(2*i), 0U) -VSX_CVT_FP_TO_INT(xvcvspsxds, 2, float32, int64, VsrW(2*i), VsrD(i), \ +VSX_CVT_FP_TO_INT(xvcvdpuxws, 2, float64, uint32, VsrD(i), VsrW(2 * i), 0U) +VSX_CVT_FP_TO_INT(xvcvspsxds, 2, float32, int64, VsrW(2 * i), VsrD(i), \ 0x8000000000000000ULL) VSX_CVT_FP_TO_INT(xvcvspsxws, 4, float32, int32, VsrW(i), VsrW(i), 0x80000000U) -VSX_CVT_FP_TO_INT(xvcvspuxds, 2, float32, uint64, VsrW(2*i), VsrD(i), 0ULL) +VSX_CVT_FP_TO_INT(xvcvspuxds, 2, float32, uint64, VsrW(2 * i), VsrD(i), 0ULL) VSX_CVT_FP_TO_INT(xvcvspuxws, 4, float32, uint32, VsrW(i), VsrW(i), 0U) -/* VSX_CVT_FP_TO_INT_VECTOR - VSX floating point to integer conversion +/* + * VSX_CVT_FP_TO_INT_VECTOR - VSX floating point to integer conversion * op - instruction mnemonic * stp - source type (float32 or float64) * ttp - target type (int32, uint32, int64 or uint64) @@ -3040,7 +3065,8 @@ VSX_CVT_FP_TO_INT_VECTOR(xscvqpswz, float128, int32, f128, VsrD(0), \ VSX_CVT_FP_TO_INT_VECTOR(xscvqpudz, float128, uint64, f128, VsrD(0), 0x0ULL) VSX_CVT_FP_TO_INT_VECTOR(xscvqpuwz, float128, uint32, f128, VsrD(0), 0x0ULL) -/* VSX_CVT_INT_TO_FP - VSX integer to floating point conversion +/* + * VSX_CVT_INT_TO_FP - VSX integer to floating point conversion * op - instruction mnemonic * nels - number of elements (1, 2 or 4) * stp - source type (int32, uint32, int64 or uint64) @@ -3079,14 +3105,15 @@ VSX_CVT_INT_TO_FP(xscvsxdsp, 1, int64, float64, VsrD(0), VsrD(0), 1, 1) VSX_CVT_INT_TO_FP(xscvuxdsp, 1, uint64, float64, VsrD(0), VsrD(0), 1, 1) VSX_CVT_INT_TO_FP(xvcvsxddp, 2, int64, float64, VsrD(i), VsrD(i), 0, 0) VSX_CVT_INT_TO_FP(xvcvuxddp, 2, uint64, float64, VsrD(i), VsrD(i), 0, 0) -VSX_CVT_INT_TO_FP(xvcvsxwdp, 2, int32, float64, VsrW(2*i), VsrD(i), 0, 0) -VSX_CVT_INT_TO_FP(xvcvuxwdp, 2, uint64, float64, VsrW(2*i), VsrD(i), 0, 0) -VSX_CVT_INT_TO_FP(xvcvsxdsp, 2, int64, float32, VsrD(i), VsrW(2*i), 0, 0) -VSX_CVT_INT_TO_FP(xvcvuxdsp, 2, uint64, float32, VsrD(i), VsrW(2*i), 0, 0) +VSX_CVT_INT_TO_FP(xvcvsxwdp, 2, int32, float64, VsrW(2 * i), VsrD(i), 0, 0) +VSX_CVT_INT_TO_FP(xvcvuxwdp, 2, uint64, float64, VsrW(2 * i), VsrD(i), 0, 0) +VSX_CVT_INT_TO_FP(xvcvsxdsp, 2, int64, float32, VsrD(i), VsrW(2 * i), 0, 0) +VSX_CVT_INT_TO_FP(xvcvuxdsp, 2, uint64, float32, VsrD(i), VsrW(2 * i), 0, 0) VSX_CVT_INT_TO_FP(xvcvsxwsp, 4, int32, float32, VsrW(i), VsrW(i), 0, 0) VSX_CVT_INT_TO_FP(xvcvuxwsp, 4, uint32, float32, VsrW(i), VsrW(i), 0, 0) -/* VSX_CVT_INT_TO_FP_VECTOR - VSX integer to floating point conversion +/* + * VSX_CVT_INT_TO_FP_VECTOR - VSX integer to floating point conversion * op - instruction mnemonic * stp - source type (int32, uint32, int64 or uint64) * ttp - target type (float32 or float64) @@ -3111,13 +3138,15 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ VSX_CVT_INT_TO_FP_VECTOR(xscvsdqp, int64, float128, VsrD(0), f128) VSX_CVT_INT_TO_FP_VECTOR(xscvudqp, uint64, float128, VsrD(0), f128) -/* For "use current rounding mode", define a value that will not be one of - * the existing rounding model enums. +/* + * For "use current rounding mode", define a value that will not be + * one of the existing rounding model enums. */ #define FLOAT_ROUND_CURRENT (float_round_nearest_even + float_round_down + \ float_round_up + float_round_to_zero) -/* VSX_ROUND - VSX floating point round +/* + * VSX_ROUND - VSX floating point round * op - instruction mnemonic * nels - number of elements (1, 2 or 4) * tp - type (float32 or float64) @@ -3150,9 +3179,11 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ } \ } \ \ - /* If this is not a "use current rounding mode" instruction, \ + /* \ + * If this is not a "use current rounding mode" instruction, \ * then inhibit setting of the XX bit and restore rounding \ - * mode from FPSCR */ \ + * mode from FPSCR \ + */ \ if (rmode != FLOAT_ROUND_CURRENT) { \ fpscr_set_rounding_mode(env); \ env->fp_status.float_exception_flags &= ~float_flag_inexact; \ @@ -3234,7 +3265,8 @@ void helper_xvxsigsp(CPUPPCState *env, uint32_t opcode) putVSR(xT(opcode), &xt, env); } -/* VSX_TEST_DC - VSX floating point test data class +/* + * VSX_TEST_DC - VSX floating point test data class * op - instruction mnemonic * nels - number of elements (1, 2 or 4) * xbn - VSR register number diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c index fbf3821f4b..ce3625f44e 100644 --- a/target/ppc/gdbstub.c +++ b/target/ppc/gdbstub.c @@ -33,14 +33,14 @@ static int ppc_gdb_register_len_apple(int n) return 8; case 64 ... 95: return 16; - case 64+32: /* nip */ - case 65+32: /* msr */ - case 67+32: /* lr */ - case 68+32: /* ctr */ - case 70+32: /* fpscr */ + case 64 + 32: /* nip */ + case 65 + 32: /* msr */ + case 67 + 32: /* lr */ + case 68 + 32: /* ctr */ + case 70 + 32: /* fpscr */ return 8; - case 66+32: /* cr */ - case 69+32: /* xer */ + case 66 + 32: /* cr */ + case 69 + 32: /* xer */ return 4; default: return 0; @@ -84,11 +84,14 @@ static int ppc_gdb_register_len(int n) } } -/* We need to present the registers to gdb in the "current" memory ordering. - For user-only mode we get this for free; TARGET_WORDS_BIGENDIAN is set to - the proper ordering for the binary, and cannot be changed. - For system mode, TARGET_WORDS_BIGENDIAN is always set, and we must check - the current mode of the chip to see if we're running in little-endian. */ +/* + * We need to present the registers to gdb in the "current" memory + * ordering. For user-only mode we get this for free; + * TARGET_WORDS_BIGENDIAN is set to the proper ordering for the + * binary, and cannot be changed. For system mode, + * TARGET_WORDS_BIGENDIAN is always set, and we must check the current + * mode of the chip to see if we're running in little-endian. + */ void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len) { #ifndef CONFIG_USER_ONLY @@ -104,11 +107,12 @@ void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len) #endif } -/* Old gdb always expects FP registers. Newer (xml-aware) gdb only +/* + * Old gdb always expects FP registers. Newer (xml-aware) gdb only * expects whatever the target description contains. Due to a * historical mishap the FP registers appear in between core integer - * regs and PC, MSR, CR, and so forth. We hack round this by giving the - * FP regs zero size when talking to a newer gdb. + * regs and PC, MSR, CR, and so forth. We hack round this by giving + * the FP regs zero size when talking to a newer gdb. */ int ppc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) diff --git a/target/ppc/helper_regs.h b/target/ppc/helper_regs.h index a2205e1044..922da76c6c 100644 --- a/target/ppc/helper_regs.h +++ b/target/ppc/helper_regs.h @@ -44,10 +44,11 @@ static inline void hreg_swap_gpr_tgpr(CPUPPCState *env) static inline void hreg_compute_mem_idx(CPUPPCState *env) { - /* This is our encoding for server processors. The architecture + /* + * This is our encoding for server processors. The architecture * specifies that there is no such thing as userspace with - * translation off, however it appears that MacOS does it and - * some 32-bit CPUs support it. Weird... + * translation off, however it appears that MacOS does it and some + * 32-bit CPUs support it. Weird... * * 0 = Guest User space virtual mode * 1 = Guest Kernel space virtual mode @@ -143,7 +144,8 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value, /* Change the exception prefix on PowerPC 601 */ env->excp_prefix = ((value >> MSR_EP) & 1) * 0xFFF00000; } - /* If PR=1 then EE, IR and DR must be 1 + /* + * If PR=1 then EE, IR and DR must be 1 * * Note: We only enforce this on 64-bit server processors. * It appears that: @@ -152,7 +154,7 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value, * - 64-bit embedded implementations do not need any operation to be * performed when PR is set. */ - if ((env->insns_flags & PPC_SEGMENT_64B) && ((value >> MSR_PR) & 1)) { + if (is_book3s_arch2x(env) && ((value >> MSR_PR) & 1)) { value |= (1 << MSR_EE) | (1 << MSR_DR) | (1 << MSR_IR); } #endif diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 162add561e..f6a088ac08 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -137,7 +137,8 @@ uint64_t helper_divde(CPUPPCState *env, uint64_t rau, uint64_t rbu, uint32_t oe) /* if x = 0xab, returns 0xababababababababa */ #define pattern(x) (((x) & 0xff) * (~(target_ulong)0 / 0xff)) -/* substract 1 from each byte, and with inverse, check if MSB is set at each +/* + * subtract 1 from each byte, and with inverse, check if MSB is set at each * byte. * i.e. ((0x00 - 0x01) & ~(0x00)) & 0x80 * (0xFF & 0xFF) & 0x80 = 0x80 (zero found) @@ -156,7 +157,8 @@ uint32_t helper_cmpeqb(target_ulong ra, target_ulong rb) #undef haszero #undef hasvalue -/* Return invalid random number. +/* + * Return invalid random number. * * FIXME: Add rng backend or other mechanism to get cryptographically suitable * random number @@ -181,7 +183,7 @@ uint64_t helper_bpermd(uint64_t rs, uint64_t rb) uint64_t ra = 0; for (i = 0; i < 8; i++) { - int index = (rs >> (i*8)) & 0xFF; + int index = (rs >> (i * 8)) & 0xFF; if (index < 64) { if (rb & PPC_BIT(index)) { ra |= 1 << i; @@ -370,7 +372,8 @@ target_ulong helper_divso(CPUPPCState *env, target_ulong arg1, /* 602 specific instructions */ /* mfrom is the most crazy instruction ever seen, imho ! */ /* Real implementation uses a ROM table. Do the same */ -/* Extremely decomposed: +/* + * Extremely decomposed: * -arg / 256 * return 256 * log10(10 + 1.0) + 0.5 */ @@ -393,7 +396,7 @@ target_ulong helper_602_mfrom(target_ulong arg) for (index = 0; index < ARRAY_SIZE(r->element); index++) #else #define VECTOR_FOR_INORDER_I(index, element) \ - for (index = ARRAY_SIZE(r->element)-1; index >= 0; index--) + for (index = ARRAY_SIZE(r->element) - 1; index >= 0; index--) #endif /* Saturating arithmetic helpers. */ @@ -634,7 +637,8 @@ void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ } \ } -/* VABSDU - Vector absolute difference unsigned +/* + * VABSDU - Vector absolute difference unsigned * name - instruction mnemonic suffix (b: byte, h: halfword, w: word) * element - element type to access from vector */ @@ -739,7 +743,8 @@ void helper_vcmpne##suffix(CPUPPCState *env, ppc_avr_t *r, \ } \ } -/* VCMPNEZ - Vector compare not equal to zero +/* + * VCMPNEZ - Vector compare not equal to zero * suffix - instruction mnemonic suffix (b: byte, h: halfword, w: word) * element - element type to access from vector */ @@ -1138,7 +1143,7 @@ void helper_vpermr(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, #define VBPERMQ_DW(index) (((index) & 0x40) != 0) #define EXTRACT_BIT(avr, i, index) (extract64((avr)->u64[i], index, 1)) #else -#define VBPERMQ_INDEX(avr, i) ((avr)->u8[15-(i)]) +#define VBPERMQ_INDEX(avr, i) ((avr)->u8[15 - (i)]) #define VBPERMD_INDEX(i) (1 - i) #define VBPERMQ_DW(index) (((index) & 0x40) == 0) #define EXTRACT_BIT(avr, i, index) \ @@ -1169,7 +1174,7 @@ void helper_vbpermq(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) int index = VBPERMQ_INDEX(b, i); if (index < 128) { - uint64_t mask = (1ull << (63-(index & 0x3F))); + uint64_t mask = (1ull << (63 - (index & 0x3F))); if (a->u64[VBPERMQ_DW(index)] & mask) { perm |= (0x8000 >> i); } @@ -1449,9 +1454,9 @@ void helper_vgbbd(ppc_avr_t *r, ppc_avr_t *b) VECTOR_FOR_INORDER_I(i, u8) { #if defined(HOST_WORDS_BIGENDIAN) - t[i>>3] |= VGBBD_MASKS[b->u8[i]] >> (i & 7); + t[i >> 3] |= VGBBD_MASKS[b->u8[i]] >> (i & 7); #else - t[i>>3] |= VGBBD_MASKS[b->u8[i]] >> (7-(i & 7)); + t[i >> 3] |= VGBBD_MASKS[b->u8[i]] >> (7 - (i & 7)); #endif } @@ -1463,19 +1468,19 @@ void helper_vgbbd(ppc_avr_t *r, ppc_avr_t *b) void helper_##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ int i, j; \ - trgtyp prod[sizeof(ppc_avr_t)/sizeof(a->srcfld[0])]; \ + trgtyp prod[sizeof(ppc_avr_t) / sizeof(a->srcfld[0])]; \ \ VECTOR_FOR_INORDER_I(i, srcfld) { \ prod[i] = 0; \ for (j = 0; j < sizeof(a->srcfld[0]) * 8; j++) { \ - if (a->srcfld[i] & (1ull<<j)) { \ + if (a->srcfld[i] & (1ull << j)) { \ prod[i] ^= ((trgtyp)b->srcfld[i] << j); \ } \ } \ } \ \ VECTOR_FOR_INORDER_I(i, trgfld) { \ - r->trgfld[i] = prod[2*i] ^ prod[2*i+1]; \ + r->trgfld[i] = prod[2 * i] ^ prod[2 * i + 1]; \ } \ } @@ -1493,7 +1498,7 @@ void helper_vpmsumd(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) VECTOR_FOR_INORDER_I(i, u64) { prod[i] = 0; for (j = 0; j < 64; j++) { - if (a->u64[i] & (1ull<<j)) { + if (a->u64[i] & (1ull << j)) { prod[i] ^= (((__uint128_t)b->u64[i]) << j); } } @@ -1508,7 +1513,7 @@ void helper_vpmsumd(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) VECTOR_FOR_INORDER_I(i, u64) { prod[i].VsrD(1) = prod[i].VsrD(0) = 0; for (j = 0; j < 64; j++) { - if (a->u64[i] & (1ull<<j)) { + if (a->u64[i] & (1ull << j)) { ppc_avr_t bshift; if (j == 0) { bshift.VsrD(0) = 0; @@ -1548,9 +1553,9 @@ void helper_vpkpx(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) VECTOR_FOR_INORDER_I(j, u32) { uint32_t e = x[i]->u32[j]; - result.u16[4*i+j] = (((e >> 9) & 0xfc00) | - ((e >> 6) & 0x3e0) | - ((e >> 3) & 0x1f)); + result.u16[4 * i + j] = (((e >> 9) & 0xfc00) | + ((e >> 6) & 0x3e0) | + ((e >> 3) & 0x1f)); } } *r = result; @@ -1568,7 +1573,7 @@ void helper_vpkpx(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ VECTOR_FOR_INORDER_I(i, from) { \ result.to[i] = cvt(a0->from[i], &sat); \ - result.to[i+ARRAY_SIZE(r->from)] = cvt(a1->from[i], &sat); \ + result.to[i + ARRAY_SIZE(r->from)] = cvt(a1->from[i], &sat);\ } \ *r = result; \ if (dosat && sat) { \ @@ -1736,9 +1741,11 @@ VEXTU_X_DO(vextuhrx, 16, 0) VEXTU_X_DO(vextuwrx, 32, 0) #undef VEXTU_X_DO -/* The specification says that the results are undefined if all of the - * shift counts are not identical. We check to make sure that they are - * to conform to what real hardware appears to do. */ +/* + * The specification says that the results are undefined if all of the + * shift counts are not identical. We check to make sure that they + * are to conform to what real hardware appears to do. + */ #define VSHIFT(suffix, leftp) \ void helper_vs##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ @@ -1805,9 +1812,10 @@ void helper_vsrv(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) int i; unsigned int shift, bytes; - /* Use reverse order, as destination and source register can be same. Its - * being modified in place saving temporary, reverse order will guarantee - * that computed result is not fed back. + /* + * Use reverse order, as destination and source register can be + * same. Its being modified in place saving temporary, reverse + * order will guarantee that computed result is not fed back. */ for (i = ARRAY_SIZE(r->u8) - 1; i >= 0; i--) { shift = b->u8[i] & 0x7; /* extract shift value */ @@ -1840,7 +1848,7 @@ void helper_vslo(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) #if defined(HOST_WORDS_BIGENDIAN) memmove(&r->u8[0], &a->u8[sh], 16 - sh); - memset(&r->u8[16-sh], 0, sh); + memset(&r->u8[16 - sh], 0, sh); #else memmove(&r->u8[sh], &a->u8[0], 16 - sh); memset(&r->u8[0], 0, sh); @@ -2112,7 +2120,7 @@ void helper_vsum4ubs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) ppc_avr_t result; \ \ for (i = 0; i < ARRAY_SIZE(r->u32); i++) { \ - uint16_t e = b->u16[hi ? i : i+4]; \ + uint16_t e = b->u16[hi ? i : i + 4]; \ uint8_t a = (e >> 15) ? 0xff : 0; \ uint8_t r = (e >> 10) & 0x1f; \ uint8_t g = (e >> 5) & 0x1f; \ @@ -2463,7 +2471,7 @@ static void bcd_put_digit(ppc_avr_t *bcd, uint8_t digit, int n) { if (n & 1) { bcd->u8[BCD_DIG_BYTE(n)] &= 0x0F; - bcd->u8[BCD_DIG_BYTE(n)] |= (digit<<4); + bcd->u8[BCD_DIG_BYTE(n)] |= (digit << 4); } else { bcd->u8[BCD_DIG_BYTE(n)] &= 0xF0; bcd->u8[BCD_DIG_BYTE(n)] |= digit; @@ -3220,7 +3228,7 @@ void helper_vshasigmad(ppc_avr_t *r, ppc_avr_t *a, uint32_t st_six) for (i = 0; i < ARRAY_SIZE(r->u64); i++) { if (st == 0) { - if ((six & (0x8 >> (2*i))) == 0) { + if ((six & (0x8 >> (2 * i))) == 0) { r->VsrD(i) = ror64(a->VsrD(i), 1) ^ ror64(a->VsrD(i), 8) ^ (a->VsrD(i) >> 7); @@ -3230,7 +3238,7 @@ void helper_vshasigmad(ppc_avr_t *r, ppc_avr_t *a, uint32_t st_six) (a->VsrD(i) >> 6); } } else { /* st == 1 */ - if ((six & (0x8 >> (2*i))) == 0) { + if ((six & (0x8 >> (2 * i))) == 0) { r->VsrD(i) = ror64(a->VsrD(i), 28) ^ ror64(a->VsrD(i), 34) ^ ror64(a->VsrD(i), 39); diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 2427c8ee13..02e22e2017 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -49,24 +49,14 @@ #include "elf.h" #include "sysemu/kvm_int.h" -//#define DEBUG_KVM - -#ifdef DEBUG_KVM -#define DPRINTF(fmt, ...) \ - do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) -#else -#define DPRINTF(fmt, ...) \ - do { } while (0) -#endif - #define PROC_DEVTREE_CPU "/proc/device-tree/cpus/" const KVMCapabilityInfo kvm_arch_required_capabilities[] = { KVM_CAP_LAST_INFO }; -static int cap_interrupt_unset = false; -static int cap_interrupt_level = false; +static int cap_interrupt_unset; +static int cap_interrupt_level; static int cap_segstate; static int cap_booke_sregs; static int cap_ppc_smt; @@ -96,7 +86,8 @@ static int cap_large_decr; static uint32_t debug_inst_opcode; -/* XXX We have a race condition where we actually have a level triggered +/* + * XXX We have a race condition where we actually have a level triggered * interrupt, but the infrastructure can't expose that yet, so the guest * takes but ignores it, goes to sleep and never gets notified that there's * still an interrupt pending. @@ -114,10 +105,12 @@ static void kvm_kick_cpu(void *opaque) qemu_cpu_kick(CPU(cpu)); } -/* Check whether we are running with KVM-PR (instead of KVM-HV). This +/* + * Check whether we are running with KVM-PR (instead of KVM-HV). This * should only be used for fallback tests - generally we should use * explicit capabilities for the features we want, rather than - * assuming what is/isn't available depending on the KVM variant. */ + * assuming what is/isn't available depending on the KVM variant. + */ static bool kvmppc_is_pr(KVMState *ks) { /* Assume KVM-PR if the GET_PVINFO capability is available */ @@ -143,8 +136,10 @@ int kvm_arch_init(MachineState *ms, KVMState *s) cap_hior = kvm_check_extension(s, KVM_CAP_PPC_HIOR); cap_epr = kvm_check_extension(s, KVM_CAP_PPC_EPR); cap_ppc_watchdog = kvm_check_extension(s, KVM_CAP_PPC_BOOKE_WATCHDOG); - /* Note: we don't set cap_papr here, because this capability is - * only activated after this by kvmppc_set_papr() */ + /* + * Note: we don't set cap_papr here, because this capability is + * only activated after this by kvmppc_set_papr() + */ cap_htab_fd = kvm_vm_check_extension(s, KVM_CAP_PPC_HTAB_FD); cap_fixup_hcalls = kvm_check_extension(s, KVM_CAP_PPC_FIXUP_HCALL); cap_ppc_smt = kvm_vm_check_extension(s, KVM_CAP_PPC_SMT); @@ -160,7 +155,8 @@ int kvm_arch_init(MachineState *ms, KVMState *s) * in KVM at this moment. * * TODO: call kvm_vm_check_extension() with the right capability - * after the kernel starts implementing it.*/ + * after the kernel starts implementing it. + */ cap_ppc_pvr_compat = false; if (!cap_interrupt_level) { @@ -186,10 +182,13 @@ static int kvm_arch_sync_sregs(PowerPCCPU *cpu) int ret; if (cenv->excp_model == POWERPC_EXCP_BOOKE) { - /* What we're really trying to say is "if we're on BookE, we use - the native PVR for now". This is the only sane way to check - it though, so we potentially confuse users that they can run - BookE guests on BookS. Let's hope nobody dares enough :) */ + /* + * What we're really trying to say is "if we're on BookE, we + * use the native PVR for now". This is the only sane way to + * check it though, so we potentially confuse users that they + * can run BookE guests on BookS. Let's hope nobody dares + * enough :) + */ return 0; } else { if (!cap_segstate) { @@ -421,12 +420,14 @@ void kvm_check_mmu(PowerPCCPU *cpu, Error **errp) } if (ppc_hash64_has(cpu, PPC_HASH64_CI_LARGEPAGE)) { - /* Mostly what guest pagesizes we can use are related to the + /* + * Mostly what guest pagesizes we can use are related to the * host pages used to map guest RAM, which is handled in the * platform code. Cache-Inhibited largepages (64k) however are * used for I/O, so if they're mapped to the host at all it * will be a normal mapping, not a special hugepage one used - * for RAM. */ + * for RAM. + */ if (getpagesize() < 0x10000) { error_setg(errp, "KVM can't supply 64kiB CI pages, which guest expects"); @@ -440,9 +441,9 @@ unsigned long kvm_arch_vcpu_id(CPUState *cpu) return POWERPC_CPU(cpu)->vcpu_id; } -/* e500 supports 2 h/w breakpoint and 2 watchpoint. - * book3s supports only 1 watchpoint, so array size - * of 4 is sufficient for now. +/* + * e500 supports 2 h/w breakpoint and 2 watchpoint. book3s supports + * only 1 watchpoint, so array size of 4 is sufficient for now. */ #define MAX_HW_BKPTS 4 @@ -497,9 +498,12 @@ int kvm_arch_init_vcpu(CPUState *cs) break; case POWERPC_MMU_2_07: if (!cap_htm && !kvmppc_is_pr(cs->kvm_state)) { - /* KVM-HV has transactional memory on POWER8 also without the - * KVM_CAP_PPC_HTM extension, so enable it here instead as - * long as it's availble to userspace on the host. */ + /* + * KVM-HV has transactional memory on POWER8 also without + * the KVM_CAP_PPC_HTM extension, so enable it here + * instead as long as it's availble to userspace on the + * host. + */ if (qemu_getauxval(AT_HWCAP2) & PPC_FEATURE2_HAS_HTM) { cap_htm = true; } @@ -626,7 +630,7 @@ static int kvm_put_fp(CPUState *cs) reg.addr = (uintptr_t)&fpscr; ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); if (ret < 0) { - DPRINTF("Unable to set FPSCR to KVM: %s\n", strerror(errno)); + trace_kvm_failed_fpscr_set(strerror(errno)); return ret; } @@ -647,8 +651,8 @@ static int kvm_put_fp(CPUState *cs) ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); if (ret < 0) { - DPRINTF("Unable to set %s%d to KVM: %s\n", vsx ? "VSR" : "FPR", - i, strerror(errno)); + trace_kvm_failed_fp_set(vsx ? "VSR" : "FPR", i, + strerror(errno)); return ret; } } @@ -659,7 +663,7 @@ static int kvm_put_fp(CPUState *cs) reg.addr = (uintptr_t)&env->vscr; ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); if (ret < 0) { - DPRINTF("Unable to set VSCR to KVM: %s\n", strerror(errno)); + trace_kvm_failed_vscr_set(strerror(errno)); return ret; } @@ -668,7 +672,7 @@ static int kvm_put_fp(CPUState *cs) reg.addr = (uintptr_t)cpu_avr_ptr(env, i); ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); if (ret < 0) { - DPRINTF("Unable to set VR%d to KVM: %s\n", i, strerror(errno)); + trace_kvm_failed_vr_set(i, strerror(errno)); return ret; } } @@ -693,7 +697,7 @@ static int kvm_get_fp(CPUState *cs) reg.addr = (uintptr_t)&fpscr; ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); if (ret < 0) { - DPRINTF("Unable to get FPSCR from KVM: %s\n", strerror(errno)); + trace_kvm_failed_fpscr_get(strerror(errno)); return ret; } else { env->fpscr = fpscr; @@ -709,8 +713,8 @@ static int kvm_get_fp(CPUState *cs) ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); if (ret < 0) { - DPRINTF("Unable to get %s%d from KVM: %s\n", - vsx ? "VSR" : "FPR", i, strerror(errno)); + trace_kvm_failed_fp_get(vsx ? "VSR" : "FPR", i, + strerror(errno)); return ret; } else { #ifdef HOST_WORDS_BIGENDIAN @@ -733,7 +737,7 @@ static int kvm_get_fp(CPUState *cs) reg.addr = (uintptr_t)&env->vscr; ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); if (ret < 0) { - DPRINTF("Unable to get VSCR from KVM: %s\n", strerror(errno)); + trace_kvm_failed_vscr_get(strerror(errno)); return ret; } @@ -742,8 +746,7 @@ static int kvm_get_fp(CPUState *cs) reg.addr = (uintptr_t)cpu_avr_ptr(env, i); ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); if (ret < 0) { - DPRINTF("Unable to get VR%d from KVM: %s\n", - i, strerror(errno)); + trace_kvm_failed_vr_get(i, strerror(errno)); return ret; } } @@ -764,7 +767,7 @@ static int kvm_get_vpa(CPUState *cs) reg.addr = (uintptr_t)&spapr_cpu->vpa_addr; ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); if (ret < 0) { - DPRINTF("Unable to get VPA address from KVM: %s\n", strerror(errno)); + trace_kvm_failed_vpa_addr_get(strerror(errno)); return ret; } @@ -774,8 +777,7 @@ static int kvm_get_vpa(CPUState *cs) reg.addr = (uintptr_t)&spapr_cpu->slb_shadow_addr; ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); if (ret < 0) { - DPRINTF("Unable to get SLB shadow state from KVM: %s\n", - strerror(errno)); + trace_kvm_failed_slb_get(strerror(errno)); return ret; } @@ -785,8 +787,7 @@ static int kvm_get_vpa(CPUState *cs) reg.addr = (uintptr_t)&spapr_cpu->dtl_addr; ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); if (ret < 0) { - DPRINTF("Unable to get dispatch trace log state from KVM: %s\n", - strerror(errno)); + trace_kvm_failed_dtl_get(strerror(errno)); return ret; } @@ -800,10 +801,12 @@ static int kvm_put_vpa(CPUState *cs) struct kvm_one_reg reg; int ret; - /* SLB shadow or DTL can't be registered unless a master VPA is + /* + * SLB shadow or DTL can't be registered unless a master VPA is * registered. That means when restoring state, if a VPA *is* * registered, we need to set that up first. If not, we need to - * deregister the others before deregistering the master VPA */ + * deregister the others before deregistering the master VPA + */ assert(spapr_cpu->vpa_addr || !(spapr_cpu->slb_shadow_addr || spapr_cpu->dtl_addr)); @@ -812,7 +815,7 @@ static int kvm_put_vpa(CPUState *cs) reg.addr = (uintptr_t)&spapr_cpu->vpa_addr; ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); if (ret < 0) { - DPRINTF("Unable to set VPA address to KVM: %s\n", strerror(errno)); + trace_kvm_failed_vpa_addr_set(strerror(errno)); return ret; } } @@ -823,7 +826,7 @@ static int kvm_put_vpa(CPUState *cs) reg.addr = (uintptr_t)&spapr_cpu->slb_shadow_addr; ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); if (ret < 0) { - DPRINTF("Unable to set SLB shadow state to KVM: %s\n", strerror(errno)); + trace_kvm_failed_slb_set(strerror(errno)); return ret; } @@ -833,8 +836,7 @@ static int kvm_put_vpa(CPUState *cs) reg.addr = (uintptr_t)&spapr_cpu->dtl_addr; ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); if (ret < 0) { - DPRINTF("Unable to set dispatch trace log state to KVM: %s\n", - strerror(errno)); + trace_kvm_failed_dtl_set(strerror(errno)); return ret; } @@ -843,7 +845,7 @@ static int kvm_put_vpa(CPUState *cs) reg.addr = (uintptr_t)&spapr_cpu->vpa_addr; ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); if (ret < 0) { - DPRINTF("Unable to set VPA address to KVM: %s\n", strerror(errno)); + trace_kvm_failed_null_vpa_addr_set(strerror(errno)); return ret; } } @@ -929,8 +931,9 @@ int kvm_arch_put_registers(CPUState *cs, int level) regs.pid = env->spr[SPR_BOOKE_PID]; - for (i = 0;i < 32; i++) + for (i = 0; i < 32; i++) { regs.gpr[i] = env->gpr[i]; + } regs.cr = 0; for (i = 0; i < 8; i++) { @@ -938,8 +941,9 @@ int kvm_arch_put_registers(CPUState *cs, int level) } ret = kvm_vcpu_ioctl(cs, KVM_SET_REGS, ®s); - if (ret < 0) + if (ret < 0) { return ret; + } kvm_put_fp(cs); @@ -962,10 +966,12 @@ int kvm_arch_put_registers(CPUState *cs, int level) if (cap_one_reg) { int i; - /* We deliberately ignore errors here, for kernels which have + /* + * We deliberately ignore errors here, for kernels which have * the ONE_REG calls, but don't support the specific * registers, there's a reasonable chance things will still - * work, at least until we try to migrate. */ + * work, at least until we try to migrate. + */ for (i = 0; i < 1024; i++) { uint64_t id = env->spr_cb[i].one_reg_id; @@ -996,7 +1002,7 @@ int kvm_arch_put_registers(CPUState *cs, int level) if (cap_papr) { if (kvm_put_vpa(cs) < 0) { - DPRINTF("Warning: Unable to set VPA information to KVM\n"); + trace_kvm_failed_put_vpa(); } } @@ -1207,8 +1213,9 @@ int kvm_arch_get_registers(CPUState *cs) int i, ret; ret = kvm_vcpu_ioctl(cs, KVM_GET_REGS, ®s); - if (ret < 0) + if (ret < 0) { return ret; + } cr = regs.cr; for (i = 7; i >= 0; i--) { @@ -1236,8 +1243,9 @@ int kvm_arch_get_registers(CPUState *cs) env->spr[SPR_BOOKE_PID] = regs.pid; - for (i = 0;i < 32; i++) + for (i = 0; i < 32; i++) { env->gpr[i] = regs.gpr[i]; + } kvm_get_fp(cs); @@ -1262,10 +1270,12 @@ int kvm_arch_get_registers(CPUState *cs) if (cap_one_reg) { int i; - /* We deliberately ignore errors here, for kernels which have + /* + * We deliberately ignore errors here, for kernels which have * the ONE_REG calls, but don't support the specific * registers, there's a reasonable chance things will still - * work, at least until we try to migrate. */ + * work, at least until we try to migrate. + */ for (i = 0; i < 1024; i++) { uint64_t id = env->spr_cb[i].one_reg_id; @@ -1296,7 +1306,7 @@ int kvm_arch_get_registers(CPUState *cs) if (cap_papr) { if (kvm_get_vpa(cs) < 0) { - DPRINTF("Warning: Unable to get VPA information from KVM\n"); + trace_kvm_failed_get_vpa(); } } @@ -1339,20 +1349,24 @@ void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) qemu_mutex_lock_iothread(); - /* PowerPC QEMU tracks the various core input pins (interrupt, critical - * interrupt, reset, etc) in PPC-specific env->irq_input_state. */ + /* + * PowerPC QEMU tracks the various core input pins (interrupt, + * critical interrupt, reset, etc) in PPC-specific + * env->irq_input_state. + */ if (!cap_interrupt_level && run->ready_for_interrupt_injection && (cs->interrupt_request & CPU_INTERRUPT_HARD) && - (env->irq_input_state & (1<<PPC_INPUT_INT))) + (env->irq_input_state & (1 << PPC_INPUT_INT))) { - /* For now KVM disregards the 'irq' argument. However, in the - * future KVM could cache it in-kernel to avoid a heavyweight exit - * when reading the UIC. + /* + * For now KVM disregards the 'irq' argument. However, in the + * future KVM could cache it in-kernel to avoid a heavyweight + * exit when reading the UIC. */ irq = KVM_INTERRUPT_SET; - DPRINTF("injected interrupt %d\n", irq); + trace_kvm_injected_interrupt(irq); r = kvm_vcpu_ioctl(cs, KVM_INTERRUPT, &irq); if (r < 0) { printf("cpu %d fail inject %x\n", cs->cpu_index, irq); @@ -1363,9 +1377,12 @@ void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) (NANOSECONDS_PER_SECOND / 50)); } - /* We don't know if there are more interrupts pending after this. However, - * the guest will return to userspace in the course of handling this one - * anyways, so we will get a chance to deliver the rest. */ + /* + * We don't know if there are more interrupts pending after + * this. However, the guest will return to userspace in the course + * of handling this one anyways, so we will get a chance to + * deliver the rest. + */ qemu_mutex_unlock_iothread(); } @@ -1394,18 +1411,22 @@ static int kvmppc_handle_halt(PowerPCCPU *cpu) } /* map dcr access to existing qemu dcr emulation */ -static int kvmppc_handle_dcr_read(CPUPPCState *env, uint32_t dcrn, uint32_t *data) +static int kvmppc_handle_dcr_read(CPUPPCState *env, + uint32_t dcrn, uint32_t *data) { - if (ppc_dcr_read(env->dcr_env, dcrn, data) < 0) + if (ppc_dcr_read(env->dcr_env, dcrn, data) < 0) { fprintf(stderr, "Read to unhandled DCR (0x%x)\n", dcrn); + } return 0; } -static int kvmppc_handle_dcr_write(CPUPPCState *env, uint32_t dcrn, uint32_t data) +static int kvmppc_handle_dcr_write(CPUPPCState *env, + uint32_t dcrn, uint32_t data) { - if (ppc_dcr_write(env->dcr_env, dcrn, data) < 0) + if (ppc_dcr_write(env->dcr_env, dcrn, data) < 0) { fprintf(stderr, "Write to unhandled DCR (0x%x)\n", dcrn); + } return 0; } @@ -1697,20 +1718,20 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) switch (run->exit_reason) { case KVM_EXIT_DCR: if (run->dcr.is_write) { - DPRINTF("handle dcr write\n"); + trace_kvm_handle_dcr_write(); ret = kvmppc_handle_dcr_write(env, run->dcr.dcrn, run->dcr.data); } else { - DPRINTF("handle dcr read\n"); + trace_kvm_handle_drc_read(); ret = kvmppc_handle_dcr_read(env, run->dcr.dcrn, &run->dcr.data); } break; case KVM_EXIT_HLT: - DPRINTF("handle halt\n"); + trace_kvm_handle_halt(); ret = kvmppc_handle_halt(cpu); break; #if defined(TARGET_PPC64) case KVM_EXIT_PAPR_HCALL: - DPRINTF("handle PAPR hypercall\n"); + trace_kvm_handle_papr_hcall(); run->papr_hcall.ret = spapr_hypercall(cpu, run->papr_hcall.nr, run->papr_hcall.args); @@ -1718,18 +1739,18 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) break; #endif case KVM_EXIT_EPR: - DPRINTF("handle epr\n"); + trace_kvm_handle_epr(); run->epr.epr = ldl_phys(cs->as, env->mpic_iack); ret = 0; break; case KVM_EXIT_WATCHDOG: - DPRINTF("handle watchdog expiry\n"); + trace_kvm_handle_watchdog_expiry(); watchdog_perform_action(); ret = 0; break; case KVM_EXIT_DEBUG: - DPRINTF("handle debug exception\n"); + trace_kvm_handle_debug_exception(); if (kvm_handle_debug(cpu, run)) { ret = EXCP_DEBUG; break; @@ -1832,7 +1853,7 @@ static int read_cpuinfo(const char *field, char *value, int len) ret = 0; break; } - } while(*line); + } while (*line); fclose(f); @@ -1849,7 +1870,8 @@ uint32_t kvmppc_get_tbfreq(void) return retval; } - if (!(ns = strchr(line, ':'))) { + ns = strchr(line, ':'); + if (!ns) { return retval; } @@ -1875,7 +1897,8 @@ static int kvmppc_find_cpu_dt(char *buf, int buf_len) struct dirent *dirp; DIR *dp; - if ((dp = opendir(PROC_DEVTREE_CPU)) == NULL) { + dp = opendir(PROC_DEVTREE_CPU); + if (!dp) { printf("Can't open directory " PROC_DEVTREE_CPU "\n"); return -1; } @@ -1929,10 +1952,11 @@ static uint64_t kvmppc_read_int_dt(const char *filename) return 0; } -/* Read a CPU node property from the host device tree that's a single +/* + * Read a CPU node property from the host device tree that's a single * integer (32-bit or 64-bit). Returns 0 if anything goes wrong - * (can't find or open the property, or doesn't understand the - * format) */ + * (can't find or open the property, or doesn't understand the format) + */ static uint64_t kvmppc_read_int_cpu_dt(const char *propname) { char buf[PATH_MAX], *tmp; @@ -1991,7 +2015,7 @@ int kvmppc_get_hasidle(CPUPPCState *env) int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len) { - uint32_t *hc = (uint32_t*)buf; + uint32_t *hc = (uint32_t *)buf; struct kvm_ppc_pvinfo pvinfo; if (!kvmppc_get_pvinfo(env, &pvinfo)) { @@ -2064,8 +2088,10 @@ void kvmppc_set_papr(PowerPCCPU *cpu) exit(1); } - /* Update the capability flag so we sync the right information - * with kvm */ + /* + * Update the capability flag so we sync the right information + * with kvm + */ cap_papr = 1; } @@ -2133,10 +2159,12 @@ uint64_t kvmppc_rma_size(uint64_t current_size, unsigned int hash_shift) long rampagesize, best_page_shift; int i; - /* Find the largest hardware supported page size that's less than - * or equal to the (logical) backing page size of guest RAM */ + /* + * Find the largest hardware supported page size that's less than + * or equal to the (logical) backing page size of guest RAM + */ kvm_get_smmu_info(&info, &error_fatal); - rampagesize = qemu_getrampagesize(); + rampagesize = qemu_minrampagesize(); best_page_shift = 0; for (i = 0; i < KVM_PPC_PAGE_SIZES_MAX_SZ; i++) { @@ -2184,7 +2212,8 @@ void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t page_shift, int fd; void *table; - /* Must set fd to -1 so we don't try to munmap when called for + /* + * Must set fd to -1 so we don't try to munmap when called for * destroying the table, which the upper layers -will- do */ *pfd = -1; @@ -2229,7 +2258,7 @@ void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t page_shift, len = nb_table * sizeof(uint64_t); /* FIXME: round this up to page size */ - table = mmap(NULL, len, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0); + table = mmap(NULL, len, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0); if (table == MAP_FAILED) { fprintf(stderr, "KVM: Failed to map TCE table for liobn 0x%x\n", liobn); @@ -2272,10 +2301,12 @@ int kvmppc_reset_htab(int shift_hint) int ret; ret = kvm_vm_ioctl(kvm_state, KVM_PPC_ALLOCATE_HTAB, &shift); if (ret == -ENOTTY) { - /* At least some versions of PR KVM advertise the + /* + * At least some versions of PR KVM advertise the * capability, but don't implement the ioctl(). Oops. * Return 0 so that we allocate the htab in qemu, as is - * correct for PR. */ + * correct for PR. + */ return 0; } else if (ret < 0) { return ret; @@ -2283,9 +2314,12 @@ int kvmppc_reset_htab(int shift_hint) return shift; } - /* We have a kernel that predates the htab reset calls. For PR + /* + * We have a kernel that predates the htab reset calls. For PR * KVM, we need to allocate the htab ourselves, for an HV KVM of - * this era, it has allocated a 16MB fixed size hash table already. */ + * this era, it has allocated a 16MB fixed size hash table + * already. + */ if (kvmppc_is_pr(kvm_state)) { /* PR - tell caller to allocate htab */ return 0; @@ -2667,8 +2701,8 @@ int kvmppc_save_htab(QEMUFile *f, int fd, size_t bufsize, int64_t max_ns) } } } while ((rc != 0) - && ((max_ns < 0) - || ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) < max_ns))); + && ((max_ns < 0) || + ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - starttime) < max_ns))); return (rc == 0) ? 1 : 0; } @@ -2677,7 +2711,7 @@ int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index, uint16_t n_valid, uint16_t n_invalid) { struct kvm_get_htab_header *buf; - size_t chunksize = sizeof(*buf) + n_valid*HASH_PTE_SIZE_64; + size_t chunksize = sizeof(*buf) + n_valid * HASH_PTE_SIZE_64; ssize_t rc; buf = alloca(chunksize); @@ -2685,7 +2719,7 @@ int kvmppc_load_htab_chunk(QEMUFile *f, int fd, uint32_t index, buf->n_valid = n_valid; buf->n_invalid = n_invalid; - qemu_get_buffer(f, (void *)(buf + 1), HASH_PTE_SIZE_64*n_valid); + qemu_get_buffer(f, (void *)(buf + 1), HASH_PTE_SIZE_64 * n_valid); rc = write(fd, buf, chunksize); if (rc < 0) { diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h index 2c2ea30e87..22385134b4 100644 --- a/target/ppc/kvm_ppc.h +++ b/target/ppc/kvm_ppc.h @@ -117,7 +117,8 @@ static inline int kvmppc_get_hasidle(CPUPPCState *env) return 0; } -static inline int kvmppc_get_hypercall(CPUPPCState *env, uint8_t *buf, int buf_len) +static inline int kvmppc_get_hypercall(CPUPPCState *env, + uint8_t *buf, int buf_len) { return -1; } diff --git a/target/ppc/machine.c b/target/ppc/machine.c index a92d0ad3a3..25cdb9088b 100644 --- a/target/ppc/machine.c +++ b/target/ppc/machine.c @@ -24,22 +24,26 @@ static int cpu_load_old(QEMUFile *f, void *opaque, int version_id) #endif target_ulong xer; - for (i = 0; i < 32; i++) + for (i = 0; i < 32; i++) { qemu_get_betls(f, &env->gpr[i]); + } #if !defined(TARGET_PPC64) - for (i = 0; i < 32; i++) + for (i = 0; i < 32; i++) { qemu_get_betls(f, &env->gprh[i]); + } #endif qemu_get_betls(f, &env->lr); qemu_get_betls(f, &env->ctr); - for (i = 0; i < 8; i++) + for (i = 0; i < 8; i++) { qemu_get_be32s(f, &env->crf[i]); + } qemu_get_betls(f, &xer); cpu_write_xer(env, xer); qemu_get_betls(f, &env->reserve_addr); qemu_get_betls(f, &env->msr); - for (i = 0; i < 4; i++) + for (i = 0; i < 4; i++) { qemu_get_betls(f, &env->tgpr[i]); + } for (i = 0; i < 32; i++) { union { float64 d; @@ -56,14 +60,19 @@ static int cpu_load_old(QEMUFile *f, void *opaque, int version_id) qemu_get_sbe32s(f, &slb_nr); #endif qemu_get_betls(f, &sdr1); - for (i = 0; i < 32; i++) + for (i = 0; i < 32; i++) { qemu_get_betls(f, &env->sr[i]); - for (i = 0; i < 2; i++) - for (j = 0; j < 8; j++) + } + for (i = 0; i < 2; i++) { + for (j = 0; j < 8; j++) { qemu_get_betls(f, &env->DBAT[i][j]); - for (i = 0; i < 2; i++) - for (j = 0; j < 8; j++) + } + } + for (i = 0; i < 2; i++) { + for (j = 0; j < 8; j++) { qemu_get_betls(f, &env->IBAT[i][j]); + } + } qemu_get_sbe32s(f, &env->nb_tlb); qemu_get_sbe32s(f, &env->tlb_per_way); qemu_get_sbe32s(f, &env->nb_ways); @@ -71,17 +80,19 @@ static int cpu_load_old(QEMUFile *f, void *opaque, int version_id) qemu_get_sbe32s(f, &env->id_tlbs); qemu_get_sbe32s(f, &env->nb_pids); if (env->tlb.tlb6) { - // XXX assumes 6xx + /* XXX assumes 6xx */ for (i = 0; i < env->nb_tlb; i++) { qemu_get_betls(f, &env->tlb.tlb6[i].pte0); qemu_get_betls(f, &env->tlb.tlb6[i].pte1); qemu_get_betls(f, &env->tlb.tlb6[i].EPN); } } - for (i = 0; i < 4; i++) + for (i = 0; i < 4; i++) { qemu_get_betls(f, &env->pb[i]); - for (i = 0; i < 1024; i++) + } + for (i = 0; i < 1024; i++) { qemu_get_betls(f, &env->spr[i]); + } if (!cpu->vhyp) { ppc_store_sdr1(env, sdr1); } @@ -94,8 +105,9 @@ static int cpu_load_old(QEMUFile *f, void *opaque, int version_id) qemu_get_sbe32s(f, &env->error_code); qemu_get_be32s(f, &env->pending_interrupts); qemu_get_be32s(f, &env->irq_input_state); - for (i = 0; i < POWERPC_EXCP_NB; i++) + for (i = 0; i < POWERPC_EXCP_NB; i++) { qemu_get_betls(f, &env->excp_vectors[i]); + } qemu_get_betls(f, &env->excp_prefix); qemu_get_betls(f, &env->ivor_mask); qemu_get_betls(f, &env->ivpr_mask); @@ -253,22 +265,24 @@ static int cpu_pre_save(void *opaque) env->spr[SPR_BOOKE_SPEFSCR] = env->spe_fscr; for (i = 0; (i < 4) && (i < env->nb_BATs); i++) { - env->spr[SPR_DBAT0U + 2*i] = env->DBAT[0][i]; - env->spr[SPR_DBAT0U + 2*i + 1] = env->DBAT[1][i]; - env->spr[SPR_IBAT0U + 2*i] = env->IBAT[0][i]; - env->spr[SPR_IBAT0U + 2*i + 1] = env->IBAT[1][i]; + env->spr[SPR_DBAT0U + 2 * i] = env->DBAT[0][i]; + env->spr[SPR_DBAT0U + 2 * i + 1] = env->DBAT[1][i]; + env->spr[SPR_IBAT0U + 2 * i] = env->IBAT[0][i]; + env->spr[SPR_IBAT0U + 2 * i + 1] = env->IBAT[1][i]; } - for (i = 0; (i < 4) && ((i+4) < env->nb_BATs); i++) { - env->spr[SPR_DBAT4U + 2*i] = env->DBAT[0][i+4]; - env->spr[SPR_DBAT4U + 2*i + 1] = env->DBAT[1][i+4]; - env->spr[SPR_IBAT4U + 2*i] = env->IBAT[0][i+4]; - env->spr[SPR_IBAT4U + 2*i + 1] = env->IBAT[1][i+4]; + for (i = 0; (i < 4) && ((i + 4) < env->nb_BATs); i++) { + env->spr[SPR_DBAT4U + 2 * i] = env->DBAT[0][i + 4]; + env->spr[SPR_DBAT4U + 2 * i + 1] = env->DBAT[1][i + 4]; + env->spr[SPR_IBAT4U + 2 * i] = env->IBAT[0][i + 4]; + env->spr[SPR_IBAT4U + 2 * i + 1] = env->IBAT[1][i + 4]; } /* Hacks for migration compatibility between 2.6, 2.7 & 2.8 */ if (cpu->pre_2_8_migration) { - /* Mask out bits that got added to msr_mask since the versions - * which stupidly included it in the migration stream. */ + /* + * Mask out bits that got added to msr_mask since the versions + * which stupidly included it in the migration stream. + */ target_ulong metamask = 0 #if defined(TARGET_PPC64) | (1ULL << MSR_TS0) @@ -277,9 +291,10 @@ static int cpu_pre_save(void *opaque) ; cpu->mig_msr_mask = env->msr_mask & ~metamask; cpu->mig_insns_flags = env->insns_flags & insns_compat_mask; - /* CPU models supported by old machines all have PPC_MEM_TLBIE, - * so we set it unconditionally to allow backward migration from - * a POWER9 host to a POWER8 host. + /* + * CPU models supported by old machines all have + * PPC_MEM_TLBIE, so we set it unconditionally to allow + * backward migration from a POWER9 host to a POWER8 host. */ cpu->mig_insns_flags |= PPC_MEM_TLBIE; cpu->mig_insns_flags2 = env->insns_flags2 & insns_compat_mask2; @@ -379,23 +394,26 @@ static int cpu_post_load(void *opaque, int version_id) env->spe_fscr = env->spr[SPR_BOOKE_SPEFSCR]; for (i = 0; (i < 4) && (i < env->nb_BATs); i++) { - env->DBAT[0][i] = env->spr[SPR_DBAT0U + 2*i]; - env->DBAT[1][i] = env->spr[SPR_DBAT0U + 2*i + 1]; - env->IBAT[0][i] = env->spr[SPR_IBAT0U + 2*i]; - env->IBAT[1][i] = env->spr[SPR_IBAT0U + 2*i + 1]; + env->DBAT[0][i] = env->spr[SPR_DBAT0U + 2 * i]; + env->DBAT[1][i] = env->spr[SPR_DBAT0U + 2 * i + 1]; + env->IBAT[0][i] = env->spr[SPR_IBAT0U + 2 * i]; + env->IBAT[1][i] = env->spr[SPR_IBAT0U + 2 * i + 1]; } - for (i = 0; (i < 4) && ((i+4) < env->nb_BATs); i++) { - env->DBAT[0][i+4] = env->spr[SPR_DBAT4U + 2*i]; - env->DBAT[1][i+4] = env->spr[SPR_DBAT4U + 2*i + 1]; - env->IBAT[0][i+4] = env->spr[SPR_IBAT4U + 2*i]; - env->IBAT[1][i+4] = env->spr[SPR_IBAT4U + 2*i + 1]; + for (i = 0; (i < 4) && ((i + 4) < env->nb_BATs); i++) { + env->DBAT[0][i + 4] = env->spr[SPR_DBAT4U + 2 * i]; + env->DBAT[1][i + 4] = env->spr[SPR_DBAT4U + 2 * i + 1]; + env->IBAT[0][i + 4] = env->spr[SPR_IBAT4U + 2 * i]; + env->IBAT[1][i + 4] = env->spr[SPR_IBAT4U + 2 * i + 1]; } if (!cpu->vhyp) { ppc_store_sdr1(env, env->spr[SPR_SDR1]); } - /* Invalidate all supported msr bits except MSR_TGPR/MSR_HVB before restoring */ + /* + * Invalidate all supported msr bits except MSR_TGPR/MSR_HVB + * before restoring + */ msr = env->msr; env->msr ^= env->msr_mask & ~((1ULL << MSR_TGPR) | MSR_HVB); ppc_store_msr(env, msr); @@ -409,7 +427,7 @@ static bool fpu_needed(void *opaque) { PowerPCCPU *cpu = opaque; - return (cpu->env.insns_flags & PPC_FLOAT); + return cpu->env.insns_flags & PPC_FLOAT; } static const VMStateDescription vmstate_fpu = { @@ -428,7 +446,7 @@ static bool altivec_needed(void *opaque) { PowerPCCPU *cpu = opaque; - return (cpu->env.insns_flags & PPC_ALTIVEC); + return cpu->env.insns_flags & PPC_ALTIVEC; } static int get_vscr(QEMUFile *f, void *opaque, size_t size, @@ -483,7 +501,7 @@ static bool vsx_needed(void *opaque) { PowerPCCPU *cpu = opaque; - return (cpu->env.insns_flags2 & PPC2_VSX); + return cpu->env.insns_flags2 & PPC2_VSX; } static const VMStateDescription vmstate_vsx = { @@ -591,7 +609,7 @@ static bool slb_needed(void *opaque) PowerPCCPU *cpu = opaque; /* We don't support any of the old segment table based 64-bit CPUs */ - return (cpu->env.mmu_model & POWERPC_MMU_64); + return cpu->env.mmu_model & POWERPC_MMU_64; } static int slb_post_load(void *opaque, int version_id) @@ -600,8 +618,10 @@ static int slb_post_load(void *opaque, int version_id) CPUPPCState *env = &cpu->env; int i; - /* We've pulled in the raw esid and vsid values from the migration - * stream, but we need to recompute the page size pointers */ + /* + * We've pulled in the raw esid and vsid values from the migration + * stream, but we need to recompute the page size pointers + */ for (i = 0; i < cpu->hash64_opts->slb_size; i++) { if (ppc_store_slb(cpu, i, env->slb[i].esid, env->slb[i].vsid) < 0) { /* Migration source had bad values in its SLB */ diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index 9c5a68579e..5b0f9ee50d 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -27,7 +27,7 @@ #include "internal.h" #include "qemu/atomic128.h" -//#define DEBUG_OP +/* #define DEBUG_OP */ static inline bool needs_byteswap(const CPUPPCState *env) { @@ -103,10 +103,11 @@ void helper_lsw(CPUPPCState *env, target_ulong addr, uint32_t nb, uint32_t reg) do_lsw(env, addr, nb, reg, GETPC()); } -/* PPC32 specification says we must generate an exception if - * rA is in the range of registers to be loaded. - * In an other hand, IBM says this is valid, but rA won't be loaded. - * For now, I'll follow the spec... +/* + * PPC32 specification says we must generate an exception if rA is in + * the range of registers to be loaded. In an other hand, IBM says + * this is valid, but rA won't be loaded. For now, I'll follow the + * spec... */ void helper_lswx(CPUPPCState *env, target_ulong addr, uint32_t reg, uint32_t ra, uint32_t rb) @@ -199,7 +200,8 @@ void helper_dcbzep(CPUPPCState *env, target_ulong addr, uint32_t opcode) void helper_icbi(CPUPPCState *env, target_ulong addr) { addr &= ~(env->dcache_line_size - 1); - /* Invalidate one cache line : + /* + * Invalidate one cache line : * PowerPC specification says this is to be treated like a load * (not a fetch) by the MMU. To be sure it will be so, * do the load "by hand". @@ -346,17 +348,19 @@ uint32_t helper_stqcx_be_parallel(CPUPPCState *env, target_ulong addr, #define LO_IDX 0 #endif -/* We use msr_le to determine index ordering in a vector. However, - byteswapping is not simply controlled by msr_le. We also need to take - into account endianness of the target. This is done for the little-endian - PPC64 user-mode target. */ +/* + * We use msr_le to determine index ordering in a vector. However, + * byteswapping is not simply controlled by msr_le. We also need to + * take into account endianness of the target. This is done for the + * little-endian PPC64 user-mode target. + */ #define LVE(name, access, swap, element) \ void helper_##name(CPUPPCState *env, ppc_avr_t *r, \ target_ulong addr) \ { \ size_t n_elems = ARRAY_SIZE(r->element); \ - int adjust = HI_IDX*(n_elems - 1); \ + int adjust = HI_IDX * (n_elems - 1); \ int sh = sizeof(r->element[0]) >> 1; \ int index = (addr & 0xf) >> sh; \ if (msr_le) { \ @@ -476,12 +480,13 @@ VSX_STXVL(stxvll, 1) void helper_tbegin(CPUPPCState *env) { - /* As a degenerate implementation, always fail tbegin. The reason + /* + * As a degenerate implementation, always fail tbegin. The reason * given is "Nesting overflow". The "persistent" bit is set, * providing a hint to the error handler to not retry. The TFIAR * captures the address of the failure, which is this tbegin - * instruction. Instruction execution will continue with the - * next instruction in memory, which is precisely what we want. + * instruction. Instruction execution will continue with the next + * instruction in memory, which is precisely what we want. */ env->spr[SPR_TEXASR] = diff --git a/target/ppc/mfrom_table.inc.c b/target/ppc/mfrom_table.inc.c index 6a1fa375c9..1653b974a4 100644 --- a/target/ppc/mfrom_table.inc.c +++ b/target/ppc/mfrom_table.inc.c @@ -1,5 +1,4 @@ -static const uint8_t mfrom_ROM_table[602] = -{ +static const uint8_t mfrom_ROM_table[602] = { 77, 77, 76, 76, 75, 75, 74, 74, 73, 73, 72, 72, 71, 71, 70, 70, 69, 69, 68, 68, 68, 67, 67, 66, diff --git a/target/ppc/mfrom_table_gen.c b/target/ppc/mfrom_table_gen.c index 631791808e..f96c4268ba 100644 --- a/target/ppc/mfrom_table_gen.c +++ b/target/ppc/mfrom_table_gen.c @@ -2,7 +2,7 @@ #include "qemu/osdep.h" #include <math.h> -int main (void) +int main(void) { double d; uint8_t n; @@ -10,7 +10,8 @@ int main (void) printf("static const uint8_t mfrom_ROM_table[602] =\n{\n "); for (i = 0; i < 602; i++) { - /* Extremely decomposed: + /* + * Extremely decomposed: * -T0 / 256 * T0 = 256 * log10(10 + 1.0) + 0.5 */ @@ -23,8 +24,9 @@ int main (void) d += 0.5; n = d; printf("%3d, ", n); - if ((i & 7) == 7) + if ((i & 7) == 7) { printf("\n "); + } } printf("\n};\n"); diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c index c65d1ade15..0a81e98ee9 100644 --- a/target/ppc/misc_helper.c +++ b/target/ppc/misc_helper.c @@ -210,10 +210,11 @@ void ppc_store_msr(CPUPPCState *env, target_ulong value) hreg_store_msr(env, value, 0); } -/* This code is lifted from MacOnLinux. It is called whenever - * THRM1,2 or 3 is read an fixes up the values in such a way - * that will make MacOS not hang. These registers exist on some - * 75x and 74xx processors. +/* + * This code is lifted from MacOnLinux. It is called whenever THRM1,2 + * or 3 is read an fixes up the values in such a way that will make + * MacOS not hang. These registers exist on some 75x and 74xx + * processors. */ void helper_fixup_thrm(CPUPPCState *env) { diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c index e8562a7c87..55cf156a0b 100644 --- a/target/ppc/mmu-hash32.c +++ b/target/ppc/mmu-hash32.c @@ -27,7 +27,7 @@ #include "mmu-hash32.h" #include "exec/log.h" -//#define DEBUG_BAT +/* #define DEBUG_BAT */ #ifdef DEBUG_BATS # define LOG_BATS(...) qemu_log_mask(CPU_LOG_MMU, __VA_ARGS__) @@ -228,8 +228,10 @@ static int ppc_hash32_direct_store(PowerPCCPU *cpu, target_ulong sr, qemu_log_mask(CPU_LOG_MMU, "direct store...\n"); if ((sr & 0x1FF00000) >> 20 == 0x07f) { - /* Memory-forced I/O controller interface access */ - /* If T=1 and BUID=x'07F', the 601 performs a memory access + /* + * Memory-forced I/O controller interface access + * + * If T=1 and BUID=x'07F', the 601 performs a memory access * to SR[28-31] LA[4-31], bypassing all protection mechanisms. */ *raddr = ((sr & 0xF) << 28) | (eaddr & 0x0FFFFFFF); @@ -265,9 +267,11 @@ static int ppc_hash32_direct_store(PowerPCCPU *cpu, target_ulong sr, } return 1; case ACCESS_CACHE: - /* dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi */ - /* Should make the instruction do no-op. - * As it already do no-op, it's quite easy :-) + /* + * dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi + * + * Should make the instruction do no-op. As it already do + * no-op, it's quite easy :-) */ *raddr = eaddr; return 0; @@ -341,6 +345,24 @@ static hwaddr ppc_hash32_pteg_search(PowerPCCPU *cpu, hwaddr pteg_off, return -1; } +static void ppc_hash32_set_r(PowerPCCPU *cpu, hwaddr pte_offset, uint32_t pte1) +{ + target_ulong base = ppc_hash32_hpt_base(cpu); + hwaddr offset = pte_offset + 6; + + /* The HW performs a non-atomic byte update */ + stb_phys(CPU(cpu)->as, base + offset, ((pte1 >> 8) & 0xff) | 0x01); +} + +static void ppc_hash32_set_c(PowerPCCPU *cpu, hwaddr pte_offset, uint64_t pte1) +{ + target_ulong base = ppc_hash32_hpt_base(cpu); + hwaddr offset = pte_offset + 7; + + /* The HW performs a non-atomic byte update */ + stb_phys(CPU(cpu)->as, base + offset, (pte1 & 0xff) | 0x80); +} + static hwaddr ppc_hash32_htab_lookup(PowerPCCPU *cpu, target_ulong sr, target_ulong eaddr, ppc_hash_pte32_t *pte) @@ -399,7 +421,6 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, hwaddr pte_offset; ppc_hash_pte32_t pte; int prot; - uint32_t new_pte1; const int need_prot[] = {PAGE_READ, PAGE_WRITE, PAGE_EXEC}; hwaddr raddr; @@ -515,18 +536,20 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, /* 8. Update PTE referenced and changed bits if necessary */ - new_pte1 = pte.pte1 | HPTE32_R_R; /* set referenced bit */ - if (rwx == 1) { - new_pte1 |= HPTE32_R_C; /* set changed (dirty) bit */ - } else { - /* Treat the page as read-only for now, so that a later write - * will pass through this function again to set the C bit */ - prot &= ~PAGE_WRITE; - } - - if (new_pte1 != pte.pte1) { - ppc_hash32_store_hpte1(cpu, pte_offset, new_pte1); + if (!(pte.pte1 & HPTE32_R_R)) { + ppc_hash32_set_r(cpu, pte_offset, pte.pte1); } + if (!(pte.pte1 & HPTE32_R_C)) { + if (rwx == 1) { + ppc_hash32_set_c(cpu, pte_offset, pte.pte1); + } else { + /* + * Treat the page as read-only for now, so that a later write + * will pass through this function again to set the C bit + */ + prot &= ~PAGE_WRITE; + } + } /* 9. Determine the real address from the PTE */ diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index a2b1ec5040..7899eb2918 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -22,6 +22,7 @@ #include "exec/exec-all.h" #include "exec/helper-proto.h" #include "qemu/error-report.h" +#include "qemu/qemu-print.h" #include "sysemu/hw_accel.h" #include "kvm_ppc.h" #include "mmu-hash64.h" @@ -29,7 +30,7 @@ #include "hw/hw.h" #include "mmu-book3s-v3.h" -//#define DEBUG_SLB +/* #define DEBUG_SLB */ #ifdef DEBUG_SLB # define LOG_SLB(...) qemu_log_mask(CPU_LOG_MMU, __VA_ARGS__) @@ -57,9 +58,11 @@ static ppc_slb_t *slb_lookup(PowerPCCPU *cpu, target_ulong eaddr) LOG_SLB("%s: slot %d %016" PRIx64 " %016" PRIx64 "\n", __func__, n, slb->esid, slb->vsid); - /* We check for 1T matches on all MMUs here - if the MMU + /* + * We check for 1T matches on all MMUs here - if the MMU * doesn't have 1T segment support, we will have prevented 1T - * entries from being inserted in the slbmte code. */ + * entries from being inserted in the slbmte code. + */ if (((slb->esid == esid_256M) && ((slb->vsid & SLB_VSID_B) == SLB_VSID_B_256M)) || ((slb->esid == esid_1T) && @@ -71,7 +74,7 @@ static ppc_slb_t *slb_lookup(PowerPCCPU *cpu, target_ulong eaddr) return NULL; } -void dump_slb(FILE *f, fprintf_function cpu_fprintf, PowerPCCPU *cpu) +void dump_slb(PowerPCCPU *cpu) { CPUPPCState *env = &cpu->env; int i; @@ -79,14 +82,14 @@ void dump_slb(FILE *f, fprintf_function cpu_fprintf, PowerPCCPU *cpu) cpu_synchronize_state(CPU(cpu)); - cpu_fprintf(f, "SLB\tESID\t\t\tVSID\n"); + qemu_printf("SLB\tESID\t\t\tVSID\n"); for (i = 0; i < cpu->hash64_opts->slb_size; i++) { slbe = env->slb[i].esid; slbv = env->slb[i].vsid; if (slbe == 0 && slbv == 0) { continue; } - cpu_fprintf(f, "%d\t0x%016" PRIx64 "\t0x%016" PRIx64 "\n", + qemu_printf("%d\t0x%016" PRIx64 "\t0x%016" PRIx64 "\n", i, slbe, slbv); } } @@ -102,7 +105,8 @@ void helper_slbia(CPUPPCState *env) if (slb->esid & SLB_ESID_V) { slb->esid &= ~SLB_ESID_V; - /* XXX: given the fact that segment size is 256 MB or 1TB, + /* + * XXX: given the fact that segment size is 256 MB or 1TB, * and we still don't have a tlb_flush_mask(env, n, mask) * in QEMU, we just invalidate all TLBs */ @@ -125,7 +129,8 @@ static void __helper_slbie(CPUPPCState *env, target_ulong addr, if (slb->esid & SLB_ESID_V) { slb->esid &= ~SLB_ESID_V; - /* XXX: given the fact that segment size is 256 MB or 1TB, + /* + * XXX: given the fact that segment size is 256 MB or 1TB, * and we still don't have a tlb_flush_mask(env, n, mask) * in QEMU, we just invalidate all TLBs */ @@ -305,8 +310,10 @@ static int ppc_hash64_pte_prot(PowerPCCPU *cpu, { CPUPPCState *env = &cpu->env; unsigned pp, key; - /* Some pp bit combinations have undefined behaviour, so default - * to no access in those cases */ + /* + * Some pp bit combinations have undefined behaviour, so default + * to no access in those cases + */ int prot = 0; key = !!(msr_pr ? (slb->vsid & SLB_VSID_KP) @@ -375,7 +382,7 @@ static int ppc_hash64_amr_prot(PowerPCCPU *cpu, ppc_hash_pte64_t pte) } key = HPTE64_R_KEY(pte.pte1); - amrbits = (env->spr[SPR_AMR] >> 2*(31 - key)) & 0x3; + amrbits = (env->spr[SPR_AMR] >> 2 * (31 - key)) & 0x3; /* fprintf(stderr, "AMR protection: key=%d AMR=0x%" PRIx64 "\n", key, */ /* env->spr[SPR_AMR]); */ @@ -546,8 +553,9 @@ static hwaddr ppc_hash64_pteg_search(PowerPCCPU *cpu, hwaddr hash, if (*pshift == 0) { continue; } - /* We don't do anything with pshift yet as qemu TLB only deals - * with 4K pages anyway + /* + * We don't do anything with pshift yet as qemu TLB only + * deals with 4K pages anyway */ pte->pte0 = pte0; pte->pte1 = pte1; @@ -571,8 +579,10 @@ static hwaddr ppc_hash64_htab_lookup(PowerPCCPU *cpu, uint64_t vsid, epnmask, epn, ptem; const PPCHash64SegmentPageSizes *sps = slb->sps; - /* The SLB store path should prevent any bad page size encodings - * getting in there, so: */ + /* + * The SLB store path should prevent any bad page size encodings + * getting in there, so: + */ assert(sps); /* If ISL is set in LPCR we need to clamp the page size to 4K */ @@ -715,6 +725,39 @@ static void ppc_hash64_set_dsi(CPUState *cs, uint64_t dar, uint64_t dsisr) } +static void ppc_hash64_set_r(PowerPCCPU *cpu, hwaddr ptex, uint64_t pte1) +{ + hwaddr base, offset = ptex * HASH_PTE_SIZE_64 + 16; + + if (cpu->vhyp) { + PPCVirtualHypervisorClass *vhc = + PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp); + vhc->hpte_set_r(cpu->vhyp, ptex, pte1); + return; + } + base = ppc_hash64_hpt_base(cpu); + + + /* The HW performs a non-atomic byte update */ + stb_phys(CPU(cpu)->as, base + offset, ((pte1 >> 8) & 0xff) | 0x01); +} + +static void ppc_hash64_set_c(PowerPCCPU *cpu, hwaddr ptex, uint64_t pte1) +{ + hwaddr base, offset = ptex * HASH_PTE_SIZE_64 + 15; + + if (cpu->vhyp) { + PPCVirtualHypervisorClass *vhc = + PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp); + vhc->hpte_set_c(cpu->vhyp, ptex, pte1); + return; + } + base = ppc_hash64_hpt_base(cpu); + + /* The HW performs a non-atomic byte update */ + stb_phys(CPU(cpu)->as, base + offset, (pte1 & 0xff) | 0x80); +} + int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx) { @@ -725,23 +768,25 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, hwaddr ptex; ppc_hash_pte64_t pte; int exec_prot, pp_prot, amr_prot, prot; - uint64_t new_pte1; const int need_prot[] = {PAGE_READ, PAGE_WRITE, PAGE_EXEC}; hwaddr raddr; assert((rwx == 0) || (rwx == 1) || (rwx == 2)); - /* Note on LPCR usage: 970 uses HID4, but our special variant - * of store_spr copies relevant fields into env->spr[SPR_LPCR]. - * Similarily we filter unimplemented bits when storing into - * LPCR depending on the MMU version. This code can thus just - * use the LPCR "as-is". + /* + * Note on LPCR usage: 970 uses HID4, but our special variant of + * store_spr copies relevant fields into env->spr[SPR_LPCR]. + * Similarily we filter unimplemented bits when storing into LPCR + * depending on the MMU version. This code can thus just use the + * LPCR "as-is". */ /* 1. Handle real mode accesses */ if (((rwx == 2) && (msr_ir == 0)) || ((rwx != 2) && (msr_dr == 0))) { - /* Translation is supposedly "off" */ - /* In real mode the top 4 effective address bits are (mostly) ignored */ + /* + * Translation is supposedly "off", but in real mode the top 4 + * effective address bits are (mostly) ignored + */ raddr = eaddr & 0x0FFFFFFFFFFFFFFFULL; /* In HV mode, add HRMOR if top EA bit is clear */ @@ -870,17 +915,19 @@ skip_slb_search: /* 6. Update PTE referenced and changed bits if necessary */ - new_pte1 = pte.pte1 | HPTE64_R_R; /* set referenced bit */ - if (rwx == 1) { - new_pte1 |= HPTE64_R_C; /* set changed (dirty) bit */ - } else { - /* Treat the page as read-only for now, so that a later write - * will pass through this function again to set the C bit */ - prot &= ~PAGE_WRITE; + if (!(pte.pte1 & HPTE64_R_R)) { + ppc_hash64_set_r(cpu, ptex, pte.pte1); } - - if (new_pte1 != pte.pte1) { - ppc_hash64_store_hpte(cpu, ptex, pte.pte0, new_pte1); + if (!(pte.pte1 & HPTE64_R_C)) { + if (rwx == 1) { + ppc_hash64_set_c(cpu, ptex, pte.pte1); + } else { + /* + * Treat the page as read-only for now, so that a later write + * will pass through this function again to set the C bit + */ + prot &= ~PAGE_WRITE; + } } /* 7. Determine the real address from the PTE */ @@ -939,24 +986,6 @@ hwaddr ppc_hash64_get_phys_page_debug(PowerPCCPU *cpu, target_ulong addr) & TARGET_PAGE_MASK; } -void ppc_hash64_store_hpte(PowerPCCPU *cpu, hwaddr ptex, - uint64_t pte0, uint64_t pte1) -{ - hwaddr base; - hwaddr offset = ptex * HASH_PTE_SIZE_64; - - if (cpu->vhyp) { - PPCVirtualHypervisorClass *vhc = - PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp); - vhc->store_hpte(cpu->vhyp, ptex, pte0, pte1); - return; - } - base = ppc_hash64_hpt_base(cpu); - - stq_phys(CPU(cpu)->as, base + offset, pte0); - stq_phys(CPU(cpu)->as, base + offset + HASH_PTE_SIZE_64 / 2, pte1); -} - void ppc_hash64_tlb_flush_hpte(PowerPCCPU *cpu, target_ulong ptex, target_ulong pte0, target_ulong pte1) { @@ -1022,8 +1051,9 @@ static void ppc_hash64_update_vrma(PowerPCCPU *cpu) return; } - /* Make one up. Mostly ignore the ESID which will not be - * needed for translation + /* + * Make one up. Mostly ignore the ESID which will not be needed + * for translation */ vsid = SLB_VSID_VRMA; vrmasd = (lpcr & LPCR_VRMASD) >> LPCR_VRMASD_SHIFT; @@ -1079,11 +1109,12 @@ void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) } env->spr[SPR_RMOR] = ((lpcr >> 41) & 0xffffull) << 26; - /* XXX We could also write LPID from HID4 here + /* + * XXX We could also write LPID from HID4 here * but since we don't tag any translation on it * it doesn't actually matter - */ - /* XXX For proper emulation of 970 we also need + * + * XXX For proper emulation of 970 we also need * to dig HRMOR out of HID5 */ break; diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h index 6b555b7220..87729d48b3 100644 --- a/target/ppc/mmu-hash64.h +++ b/target/ppc/mmu-hash64.h @@ -4,14 +4,12 @@ #ifndef CONFIG_USER_ONLY #ifdef TARGET_PPC64 -void dump_slb(FILE *f, fprintf_function cpu_fprintf, PowerPCCPU *cpu); +void dump_slb(PowerPCCPU *cpu); int ppc_store_slb(PowerPCCPU *cpu, target_ulong slot, target_ulong esid, target_ulong vsid); hwaddr ppc_hash64_get_phys_page_debug(PowerPCCPU *cpu, target_ulong addr); int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr address, int rw, int mmu_idx); -void ppc_hash64_store_hpte(PowerPCCPU *cpu, hwaddr ptex, - uint64_t pte0, uint64_t pte1); void ppc_hash64_tlb_flush_hpte(PowerPCCPU *cpu, target_ulong pte_index, target_ulong pte0, target_ulong pte1); diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index ca1fb2673f..066e324464 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -228,10 +228,10 @@ int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, ppc_v3_pate_t pate; assert((rwx == 0) || (rwx == 1) || (rwx == 2)); - assert(ppc64_use_proc_tbl(cpu)); - /* Real Mode Access */ - if (((rwx == 2) && (msr_ir == 0)) || ((rwx != 2) && (msr_dr == 0))) { + /* HV or virtual hypervisor Real Mode Access */ + if ((msr_hv || cpu->vhyp) && + (((rwx == 2) && (msr_ir == 0)) || ((rwx != 2) && (msr_dr == 0)))) { /* In real mode top 4 effective addr bits (mostly) ignored */ raddr = eaddr & 0x0FFFFFFFFFFFFFFFULL; @@ -241,6 +241,16 @@ int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, return 0; } + /* + * Check UPRT (we avoid the check in real mode to deal with + * transitional states during kexec. + */ + if (!ppc64_use_proc_tbl(cpu)) { + qemu_log_mask(LOG_GUEST_ERROR, + "LPCR:UPRT not set in radix mode ! LPCR=" + TARGET_FMT_lx "\n", env->spr[SPR_LPCR]); + } + /* Virtual Mode Access - get the fully qualified address */ if (!ppc_radix64_get_fully_qualified_addr(env, eaddr, &lpid, &pid)) { ppc_radix64_raise_segi(cpu, rwx, eaddr); diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 4a6be4d63b..1dbc9acb75 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -29,14 +29,15 @@ #include "exec/log.h" #include "helper_regs.h" #include "qemu/error-report.h" +#include "qemu/qemu-print.h" #include "mmu-book3s-v3.h" #include "mmu-radix64.h" -//#define DEBUG_MMU -//#define DEBUG_BATS -//#define DEBUG_SOFTWARE_TLB -//#define DUMP_PAGE_TABLES -//#define FLUSH_ALL_TLBS +/* #define DEBUG_MMU */ +/* #define DEBUG_BATS */ +/* #define DEBUG_SOFTWARE_TLB */ +/* #define DUMP_PAGE_TABLES */ +/* #define FLUSH_ALL_TLBS */ #ifdef DEBUG_MMU # define LOG_MMU_STATE(cpu) log_cpu_state_mask(CPU_LOG_MMU, (cpu), 0) @@ -151,7 +152,8 @@ static int check_prot(int prot, int rw, int access_type) } static inline int ppc6xx_tlb_pte_check(mmu_ctx_t *ctx, target_ulong pte0, - target_ulong pte1, int h, int rw, int type) + target_ulong pte1, int h, + int rw, int type) { target_ulong ptem, mmask; int access, ret, pteh, ptev, pp; @@ -331,7 +333,8 @@ static inline int ppc6xx_tlb_check(CPUPPCState *env, mmu_ctx_t *ctx, pte_is_valid(tlb->pte0) ? "valid" : "inval", tlb->EPN, eaddr, tlb->pte1, rw ? 'S' : 'L', access_type == ACCESS_CODE ? 'I' : 'D'); - switch (ppc6xx_tlb_pte_check(ctx, tlb->pte0, tlb->pte1, 0, rw, access_type)) { + switch (ppc6xx_tlb_pte_check(ctx, tlb->pte0, tlb->pte1, + 0, rw, access_type)) { case -3: /* TLB inconsistency */ return -1; @@ -346,9 +349,11 @@ static inline int ppc6xx_tlb_check(CPUPPCState *env, mmu_ctx_t *ctx, break; case 0: /* access granted */ - /* XXX: we should go on looping to check all TLBs consistency - * but we can speed-up the whole thing as the - * result would be undefined if TLBs are not consistent. + /* + * XXX: we should go on looping to check all TLBs + * consistency but we can speed-up the whole thing as + * the result would be undefined if TLBs are not + * consistent. */ ret = 0; best = nr; @@ -549,14 +554,18 @@ static inline int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx, qemu_log_mask(CPU_LOG_MMU, "direct store...\n"); /* Direct-store segment : absolutely *BUGGY* for now */ - /* Direct-store implies a 32-bit MMU. + /* + * Direct-store implies a 32-bit MMU. * Check the Segment Register's bus unit ID (BUID). */ sr = env->sr[eaddr >> 28]; if ((sr & 0x1FF00000) >> 20 == 0x07f) { - /* Memory-forced I/O controller interface access */ - /* If T=1 and BUID=x'07F', the 601 performs a memory access - * to SR[28-31] LA[4-31], bypassing all protection mechanisms. + /* + * Memory-forced I/O controller interface access + * + * If T=1 and BUID=x'07F', the 601 performs a memory + * access to SR[28-31] LA[4-31], bypassing all protection + * mechanisms. */ ctx->raddr = ((sr & 0xF) << 28) | (eaddr & 0x0FFFFFFF); ctx->prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; @@ -577,9 +586,11 @@ static inline int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx, /* lwarx, ldarx or srwcx. */ return -4; case ACCESS_CACHE: - /* dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi */ - /* Should make the instruction do no-op. - * As it already do no-op, it's quite easy :-) + /* + * dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi + * + * Should make the instruction do no-op. As it already do + * no-op, it's quite easy :-) */ ctx->raddr = eaddr; return 0; @@ -941,12 +952,14 @@ static uint32_t mmubooke206_esr(int mmu_idx, bool rw) return esr; } -/* Get EPID register given the mmu_idx. If this is regular load, - * construct the EPID access bits from current processor state */ - -/* Get the effective AS and PR bits and the PID. The PID is returned only if - * EPID load is requested, otherwise the caller must detect the correct EPID. - * Return true if valid EPID is returned. */ +/* + * Get EPID register given the mmu_idx. If this is regular load, + * construct the EPID access bits from current processor state + * + * Get the effective AS and PR bits and the PID. The PID is returned + * only if EPID load is requested, otherwise the caller must detect + * the correct EPID. Return true if valid EPID is returned. + */ static bool mmubooke206_get_as(CPUPPCState *env, int mmu_idx, uint32_t *epid_out, bool *as_out, bool *pr_out) @@ -1116,19 +1129,18 @@ static const char *book3e_tsize_to_str[32] = { "1T", "2T" }; -static void mmubooke_dump_mmu(FILE *f, fprintf_function cpu_fprintf, - CPUPPCState *env) +static void mmubooke_dump_mmu(CPUPPCState *env) { ppcemb_tlb_t *entry; int i; if (kvm_enabled() && !env->kvm_sw_tlb) { - cpu_fprintf(f, "Cannot access KVM TLB\n"); + qemu_printf("Cannot access KVM TLB\n"); return; } - cpu_fprintf(f, "\nTLB:\n"); - cpu_fprintf(f, "Effective Physical Size PID Prot " + qemu_printf("\nTLB:\n"); + qemu_printf("Effective Physical Size PID Prot " "Attr\n"); entry = &env->tlb.tlbe[0]; @@ -1153,22 +1165,21 @@ static void mmubooke_dump_mmu(FILE *f, fprintf_function cpu_fprintf, } else { snprintf(size_buf, sizeof(size_buf), "%3" PRId64 "k", size / KiB); } - cpu_fprintf(f, "0x%016" PRIx64 " 0x%016" PRIx64 " %s %-5u %08x %08x\n", + qemu_printf("0x%016" PRIx64 " 0x%016" PRIx64 " %s %-5u %08x %08x\n", (uint64_t)ea, (uint64_t)pa, size_buf, (uint32_t)entry->PID, entry->prot, entry->attr); } } -static void mmubooke206_dump_one_tlb(FILE *f, fprintf_function cpu_fprintf, - CPUPPCState *env, int tlbn, int offset, +static void mmubooke206_dump_one_tlb(CPUPPCState *env, int tlbn, int offset, int tlbsize) { ppcmas_tlb_t *entry; int i; - cpu_fprintf(f, "\nTLB%d:\n", tlbn); - cpu_fprintf(f, "Effective Physical Size TID TS SRWX" + qemu_printf("\nTLB%d:\n", tlbn); + qemu_printf("Effective Physical Size TID TS SRWX" " URWX WIMGE U0123\n"); entry = &env->tlb.tlbm[offset]; @@ -1185,7 +1196,7 @@ static void mmubooke206_dump_one_tlb(FILE *f, fprintf_function cpu_fprintf, ea = entry->mas2 & ~(size - 1); pa = entry->mas7_3 & ~(size - 1); - cpu_fprintf(f, "0x%016" PRIx64 " 0x%016" PRIx64 " %4s %-5u %1u S%c%c%c" + qemu_printf("0x%016" PRIx64 " 0x%016" PRIx64 " %4s %-5u %1u S%c%c%c" "U%c%c%c %c%c%c%c%c U%c%c%c%c\n", (uint64_t)ea, (uint64_t)pa, book3e_tsize_to_str[tsize], @@ -1209,14 +1220,13 @@ static void mmubooke206_dump_one_tlb(FILE *f, fprintf_function cpu_fprintf, } } -static void mmubooke206_dump_mmu(FILE *f, fprintf_function cpu_fprintf, - CPUPPCState *env) +static void mmubooke206_dump_mmu(CPUPPCState *env) { int offset = 0; int i; if (kvm_enabled() && !env->kvm_sw_tlb) { - cpu_fprintf(f, "Cannot access KVM TLB\n"); + qemu_printf("Cannot access KVM TLB\n"); return; } @@ -1227,13 +1237,12 @@ static void mmubooke206_dump_mmu(FILE *f, fprintf_function cpu_fprintf, continue; } - mmubooke206_dump_one_tlb(f, cpu_fprintf, env, i, offset, size); + mmubooke206_dump_one_tlb(env, i, offset, size); offset += size; } } -static void mmu6xx_dump_BATs(FILE *f, fprintf_function cpu_fprintf, - CPUPPCState *env, int type) +static void mmu6xx_dump_BATs(CPUPPCState *env, int type) { target_ulong *BATlt, *BATut, *BATu, *BATl; target_ulong BEPIl, BEPIu, bl; @@ -1256,7 +1265,7 @@ static void mmu6xx_dump_BATs(FILE *f, fprintf_function cpu_fprintf, BEPIu = *BATu & 0xF0000000; BEPIl = *BATu & 0x0FFE0000; bl = (*BATu & 0x00001FFC) << 15; - cpu_fprintf(f, "%s BAT%d BATu " TARGET_FMT_lx + qemu_printf("%s BAT%d BATu " TARGET_FMT_lx " BATl " TARGET_FMT_lx "\n\t" TARGET_FMT_lx " " TARGET_FMT_lx " " TARGET_FMT_lx "\n", type == ACCESS_CODE ? "code" : "data", i, @@ -1264,44 +1273,43 @@ static void mmu6xx_dump_BATs(FILE *f, fprintf_function cpu_fprintf, } } -static void mmu6xx_dump_mmu(FILE *f, fprintf_function cpu_fprintf, - CPUPPCState *env) +static void mmu6xx_dump_mmu(CPUPPCState *env) { PowerPCCPU *cpu = ppc_env_get_cpu(env); ppc6xx_tlb_t *tlb; target_ulong sr; int type, way, entry, i; - cpu_fprintf(f, "HTAB base = 0x%"HWADDR_PRIx"\n", ppc_hash32_hpt_base(cpu)); - cpu_fprintf(f, "HTAB mask = 0x%"HWADDR_PRIx"\n", ppc_hash32_hpt_mask(cpu)); + qemu_printf("HTAB base = 0x%"HWADDR_PRIx"\n", ppc_hash32_hpt_base(cpu)); + qemu_printf("HTAB mask = 0x%"HWADDR_PRIx"\n", ppc_hash32_hpt_mask(cpu)); - cpu_fprintf(f, "\nSegment registers:\n"); + qemu_printf("\nSegment registers:\n"); for (i = 0; i < 32; i++) { sr = env->sr[i]; if (sr & 0x80000000) { - cpu_fprintf(f, "%02d T=%d Ks=%d Kp=%d BUID=0x%03x " + qemu_printf("%02d T=%d Ks=%d Kp=%d BUID=0x%03x " "CNTLR_SPEC=0x%05x\n", i, sr & 0x80000000 ? 1 : 0, sr & 0x40000000 ? 1 : 0, sr & 0x20000000 ? 1 : 0, (uint32_t)((sr >> 20) & 0x1FF), (uint32_t)(sr & 0xFFFFF)); } else { - cpu_fprintf(f, "%02d T=%d Ks=%d Kp=%d N=%d VSID=0x%06x\n", i, + qemu_printf("%02d T=%d Ks=%d Kp=%d N=%d VSID=0x%06x\n", i, sr & 0x80000000 ? 1 : 0, sr & 0x40000000 ? 1 : 0, sr & 0x20000000 ? 1 : 0, sr & 0x10000000 ? 1 : 0, (uint32_t)(sr & 0x00FFFFFF)); } } - cpu_fprintf(f, "\nBATs:\n"); - mmu6xx_dump_BATs(f, cpu_fprintf, env, ACCESS_INT); - mmu6xx_dump_BATs(f, cpu_fprintf, env, ACCESS_CODE); + qemu_printf("\nBATs:\n"); + mmu6xx_dump_BATs(env, ACCESS_INT); + mmu6xx_dump_BATs(env, ACCESS_CODE); if (env->id_tlbs != 1) { - cpu_fprintf(f, "ERROR: 6xx MMU should have separated TLB" + qemu_printf("ERROR: 6xx MMU should have separated TLB" " for code and data\n"); } - cpu_fprintf(f, "\nTLBs [EPN EPN + SIZE]\n"); + qemu_printf("\nTLBs [EPN EPN + SIZE]\n"); for (type = 0; type < 2; type++) { for (way = 0; way < env->nb_ways; way++) { @@ -1310,7 +1318,7 @@ static void mmu6xx_dump_mmu(FILE *f, fprintf_function cpu_fprintf, entry++) { tlb = &env->tlb.tlb6[entry]; - cpu_fprintf(f, "%s TLB %02d/%02d way:%d %s [" + qemu_printf("%s TLB %02d/%02d way:%d %s [" TARGET_FMT_lx " " TARGET_FMT_lx "]\n", type ? "code" : "data", entry % env->nb_tlb, env->nb_tlb, way, @@ -1321,31 +1329,31 @@ static void mmu6xx_dump_mmu(FILE *f, fprintf_function cpu_fprintf, } } -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env) +void dump_mmu(CPUPPCState *env) { switch (env->mmu_model) { case POWERPC_MMU_BOOKE: - mmubooke_dump_mmu(f, cpu_fprintf, env); + mmubooke_dump_mmu(env); break; case POWERPC_MMU_BOOKE206: - mmubooke206_dump_mmu(f, cpu_fprintf, env); + mmubooke206_dump_mmu(env); break; case POWERPC_MMU_SOFT_6xx: case POWERPC_MMU_SOFT_74xx: - mmu6xx_dump_mmu(f, cpu_fprintf, env); + mmu6xx_dump_mmu(env); break; #if defined(TARGET_PPC64) case POWERPC_MMU_64B: case POWERPC_MMU_2_03: case POWERPC_MMU_2_06: case POWERPC_MMU_2_07: - dump_slb(f, cpu_fprintf, ppc_env_get_cpu(env)); + dump_slb(ppc_env_get_cpu(env)); break; case POWERPC_MMU_3_00: if (ppc64_v3_radix(ppc_env_get_cpu(env))) { /* TODO - Unsupported */ } else { - dump_slb(f, cpu_fprintf, ppc_env_get_cpu(env)); + dump_slb(ppc_env_get_cpu(env)); break; } #endif @@ -1373,8 +1381,9 @@ static inline int check_physical(CPUPPCState *env, mmu_ctx_t *ctx, case POWERPC_MMU_SOFT_4xx_Z: if (unlikely(msr_pe != 0)) { - /* 403 family add some particular protections, - * using PBL/PBU registers for accesses with no translation. + /* + * 403 family add some particular protections, using + * PBL/PBU registers for accesses with no translation. */ in_plb = /* Check PLB validity */ @@ -1457,7 +1466,8 @@ static int get_physical_address_wtlb( if (real_mode) { ret = check_physical(env, ctx, eaddr, rw); } else { - cpu_abort(CPU(cpu), "PowerPC in real mode do not do any translation\n"); + cpu_abort(CPU(cpu), + "PowerPC in real mode do not do any translation\n"); } return -1; default: @@ -1502,9 +1512,10 @@ hwaddr ppc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) if (unlikely(get_physical_address(env, &ctx, addr, 0, ACCESS_INT) != 0)) { - /* Some MMUs have separate TLBs for code and data. If we only try an - * ACCESS_INT, we may not be able to read instructions mapped by code - * TLBs, so we also try a ACCESS_CODE. + /* + * Some MMUs have separate TLBs for code and data. If we only + * try an ACCESS_INT, we may not be able to read instructions + * mapped by code TLBs, so we also try a ACCESS_CODE. */ if (unlikely(get_physical_address(env, &ctx, addr, 0, ACCESS_CODE) != 0)) { @@ -1809,6 +1820,13 @@ static inline void do_invalidate_BAT(CPUPPCState *env, target_ulong BATu, base = BATu & ~0x0001FFFF; end = base + mask + 0x00020000; + if (((end - base) >> TARGET_PAGE_BITS) > 1024) { + /* Flushing 1024 4K pages is slower than a complete flush */ + LOG_BATS("Flush all BATs\n"); + tlb_flush(CPU(cs)); + LOG_BATS("Flush done\n"); + return; + } LOG_BATS("Flush BAT from " TARGET_FMT_lx " to " TARGET_FMT_lx " (" TARGET_FMT_lx ")\n", base, end, mask); for (page = base; page != end; page += TARGET_PAGE_SIZE) { @@ -1838,8 +1856,9 @@ void helper_store_ibatu(CPUPPCState *env, uint32_t nr, target_ulong value) #if !defined(FLUSH_ALL_TLBS) do_invalidate_BAT(env, env->IBAT[0][nr], mask); #endif - /* When storing valid upper BAT, mask BEPI and BRPN - * and invalidate all TLBs covered by this BAT + /* + * When storing valid upper BAT, mask BEPI and BRPN and + * invalidate all TLBs covered by this BAT */ mask = (value << 15) & 0x0FFE0000UL; env->IBAT[0][nr] = (value & 0x00001FFFUL) | @@ -1869,8 +1888,9 @@ void helper_store_dbatu(CPUPPCState *env, uint32_t nr, target_ulong value) dump_store_bat(env, 'D', 0, nr, value); if (env->DBAT[0][nr] != value) { - /* When storing valid upper BAT, mask BEPI and BRPN - * and invalidate all TLBs covered by this BAT + /* + * When storing valid upper BAT, mask BEPI and BRPN and + * invalidate all TLBs covered by this BAT */ mask = (value << 15) & 0x0FFE0000UL; #if !defined(FLUSH_ALL_TLBS) @@ -1917,8 +1937,9 @@ void helper_store_601_batu(CPUPPCState *env, uint32_t nr, target_ulong value) do_inval = 1; #endif } - /* When storing valid upper BAT, mask BEPI and BRPN - * and invalidate all TLBs covered by this BAT + /* + * When storing valid upper BAT, mask BEPI and BRPN and + * invalidate all TLBs covered by this BAT */ env->IBAT[0][nr] = (value & 0x00001FFFUL) | (value & ~0x0001FFFFUL & ~mask); @@ -2031,7 +2052,8 @@ void ppc_tlb_invalidate_one(CPUPPCState *env, target_ulong addr) #if defined(TARGET_PPC64) if (env->mmu_model & POWERPC_MMU_64) { /* tlbie invalidate TLBs for all segments */ - /* XXX: given the fact that there are too many segments to invalidate, + /* + * XXX: given the fact that there are too many segments to invalidate, * and we still don't have a tlb_flush_mask(env, n, mask) in QEMU, * we just invalidate all TLBs */ @@ -2048,10 +2070,11 @@ void ppc_tlb_invalidate_one(CPUPPCState *env, target_ulong addr) break; case POWERPC_MMU_32B: case POWERPC_MMU_601: - /* Actual CPUs invalidate entire congruence classes based on the - * geometry of their TLBs and some OSes take that into account, - * we just mark the TLB to be flushed later (context synchronizing - * event or sync instruction on 32-bit). + /* + * Actual CPUs invalidate entire congruence classes based on + * the geometry of their TLBs and some OSes take that into + * account, we just mark the TLB to be flushed later (context + * synchronizing event or sync instruction on 32-bit). */ env->tlb_need_flush |= TLB_NEED_LOCAL_FLUSH; break; @@ -2156,8 +2179,10 @@ void helper_store_sr(CPUPPCState *env, target_ulong srnum, target_ulong value) #endif if (env->sr[srnum] != value) { env->sr[srnum] = value; -/* Invalidating 256MB of virtual memory in 4kB pages is way longer than - flusing the whole TLB. */ + /* + * Invalidating 256MB of virtual memory in 4kB pages is way + * longer than flusing the whole TLB. + */ #if !defined(FLUSH_ALL_TLBS) && 0 { target_ulong page, end; @@ -2268,10 +2293,12 @@ target_ulong helper_rac(CPUPPCState *env, target_ulong addr) int nb_BATs; target_ulong ret = 0; - /* We don't have to generate many instances of this instruction, + /* + * We don't have to generate many instances of this instruction, * as rac is supervisor only. + * + * XXX: FIX THIS: Pretend we have no BAT */ - /* XXX: FIX THIS: Pretend we have no BAT */ nb_BATs = env->nb_BATs; env->nb_BATs = 0; if (get_physical_address(env, &ctx, addr, 0, ACCESS_INT) == 0) { @@ -2426,7 +2453,8 @@ void helper_4xx_tlbwe_hi(CPUPPCState *env, target_ulong entry, } tlb->size = booke_tlb_to_page_size((val >> PPC4XX_TLBHI_SIZE_SHIFT) & PPC4XX_TLBHI_SIZE_MASK); - /* We cannot handle TLB size < TARGET_PAGE_SIZE. + /* + * We cannot handle TLB size < TARGET_PAGE_SIZE. * If this ever occurs, we should implement TARGET_PAGE_BITS_VARY */ if ((val & PPC4XX_TLBHI_V) && tlb->size < TARGET_PAGE_SIZE) { @@ -2746,7 +2774,8 @@ void helper_booke206_tlbwe(CPUPPCState *env) } if (tlb->mas1 & MAS1_VALID) { - /* Invalidate the page in QEMU TLB if it was a valid entry. + /* + * Invalidate the page in QEMU TLB if it was a valid entry. * * In "PowerPC e500 Core Family Reference Manual, Rev. 1", * Section "12.4.2 TLB Write Entry (tlbwe) Instruction": @@ -2755,7 +2784,8 @@ void helper_booke206_tlbwe(CPUPPCState *env) * "Note that when an L2 TLB entry is written, it may be displacing an * already valid entry in the same L2 TLB location (a victim). If a * valid L1 TLB entry corresponds to the L2 MMU victim entry, that L1 - * TLB entry is automatically invalidated." */ + * TLB entry is automatically invalidated." + */ flush_page(env, tlb); } @@ -2781,8 +2811,9 @@ void helper_booke206_tlbwe(CPUPPCState *env) mask |= MAS2_ACM | MAS2_VLE | MAS2_W | MAS2_I | MAS2_M | MAS2_G | MAS2_E; if (!msr_cm) { - /* Executing a tlbwe instruction in 32-bit mode will set - * bits 0:31 of the TLB EPN field to zero. + /* + * Executing a tlbwe instruction in 32-bit mode will set bits + * 0:31 of the TLB EPN field to zero. */ mask &= 0xffffffff; } @@ -3026,10 +3057,13 @@ void helper_check_tlb_flush_global(CPUPPCState *env) /*****************************************************************************/ -/* try to fill the TLB and return an exception if error. If retaddr is - NULL, it means that the function was called in C code (i.e. not - from generated code or from helper.c) */ -/* XXX: fix it to restore all registers */ +/* + * try to fill the TLB and return an exception if error. If retaddr is + * NULL, it means that the function was called in C code (i.e. not + * from generated code or from helper.c) + * + * XXX: fix it to restore all registers + */ void tlb_fill(CPUState *cs, target_ulong addr, int size, MMUAccessType access_type, int mmu_idx, uintptr_t retaddr) { diff --git a/target/ppc/monitor.c b/target/ppc/monitor.c index 04deec8030..ee9d6e81d2 100644 --- a/target/ppc/monitor.c +++ b/target/ppc/monitor.c @@ -27,32 +27,33 @@ #include "monitor/hmp-target.h" #include "hmp.h" -static target_long monitor_get_ccr (const struct MonitorDef *md, int val) +static target_long monitor_get_ccr(const struct MonitorDef *md, int val) { CPUArchState *env = mon_get_cpu_env(); unsigned int u; int i; u = 0; - for (i = 0; i < 8; i++) + for (i = 0; i < 8; i++) { u |= env->crf[i] << (32 - (4 * (i + 1))); + } return u; } -static target_long monitor_get_decr (const struct MonitorDef *md, int val) +static target_long monitor_get_decr(const struct MonitorDef *md, int val) { CPUArchState *env = mon_get_cpu_env(); return cpu_ppc_load_decr(env); } -static target_long monitor_get_tbu (const struct MonitorDef *md, int val) +static target_long monitor_get_tbu(const struct MonitorDef *md, int val) { CPUArchState *env = mon_get_cpu_env(); return cpu_ppc_load_tbu(env); } -static target_long monitor_get_tbl (const struct MonitorDef *md, int val) +static target_long monitor_get_tbl(const struct MonitorDef *md, int val) { CPUArchState *env = mon_get_cpu_env(); return cpu_ppc_load_tbl(env); @@ -66,7 +67,7 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict) monitor_printf(mon, "No CPU available\n"); return; } - dump_mmu((FILE*)mon, (fprintf_function)monitor_printf, env1); + dump_mmu(env1); } const MonitorDef monitor_defs[] = { diff --git a/target/ppc/trace-events b/target/ppc/trace-events index 35ee898566..7b3cfe11fd 100644 --- a/target/ppc/trace-events +++ b/target/ppc/trace-events @@ -1,5 +1,30 @@ # See docs/devel/tracing.txt for syntax documentation. -# target/ppc/kvm.c -kvm_failed_spr_set(int str, const char *msg) "Warning: Unable to set SPR %d to KVM: %s" -kvm_failed_spr_get(int str, const char *msg) "Warning: Unable to retrieve SPR %d from KVM: %s" +# kvm.c +kvm_failed_spr_set(int spr, const char *msg) "Warning: Unable to set SPR %d to KVM: %s" +kvm_failed_spr_get(int spr, const char *msg) "Warning: Unable to retrieve SPR %d from KVM: %s" +kvm_failed_fpscr_set(const char *msg) "Unable to set FPSCR to KVM: %s" +kvm_failed_fp_set(const char *fpname, int fpnum, const char *msg) "Unable to set %s%d to KVM: %s" +kvm_failed_vscr_set(const char *msg) "Unable to set VSCR to KVM: %s" +kvm_failed_vr_set(int vr, const char *msg) "Unable to set VR%d to KVM: %s" +kvm_failed_fpscr_get(const char *msg) "Unable to get FPSCR from KVM: %s" +kvm_failed_fp_get(const char *fpname, int fpnum, const char *msg) "Unable to get %s%d from KVM: %s" +kvm_failed_vscr_get(const char *msg) "Unable to get VSCR from KVM: %s" +kvm_failed_vr_get(int vr, const char *msg) "Unable to get VR%d from KVM: %s" +kvm_failed_vpa_addr_get(const char *msg) "Unable to get VPA address from KVM: %s" +kvm_failed_slb_get(const char *msg) "Unable to get SLB shadow state from KVM: %s" +kvm_failed_dtl_get(const char *msg) "Unable to get dispatch trace log state from KVM: %s" +kvm_failed_vpa_addr_set(const char *msg) "Unable to set VPA address to KVM: %s" +kvm_failed_slb_set(const char *msg) "Unable to set SLB shadow state to KVM: %s" +kvm_failed_dtl_set(const char *msg) "Unable to set dispatch trace log state to KVM: %s" +kvm_failed_null_vpa_addr_set(const char *msg) "Unable to set VPA address to KVM: %s" +kvm_failed_put_vpa(void) "Warning: Unable to set VPA information to KVM" +kvm_failed_get_vpa(void) "Warning: Unable to get VPA information from KVM" +kvm_injected_interrupt(int irq) "injected interrupt %d" +kvm_handle_dcr_write(void) "handle dcr write" +kvm_handle_drc_read(void) "handle dcr read" +kvm_handle_halt(void) "handle halt" +kvm_handle_papr_hcall(void) "handle PAPR hypercall" +kvm_handle_epr(void) "handle epr" +kvm_handle_watchdog_expiry(void) "handle watchdog expiry" +kvm_handle_debug_exception(void) "handle debug exception" diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 98b37cebc2..8d08625c33 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -42,8 +42,8 @@ #define GDBSTUB_SINGLE_STEP 0x4 /* Include definitions for instructions classes and implementations flags */ -//#define PPC_DEBUG_DISAS -//#define DO_PPC_STATISTICS +/* #define PPC_DEBUG_DISAS */ +/* #define DO_PPC_STATISTICS */ #ifdef PPC_DEBUG_DISAS # define LOG_DISAS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__) @@ -54,9 +54,9 @@ /* Code translation helpers */ /* global register indexes */ -static char cpu_reg_names[10*3 + 22*4 /* GPR */ - + 10*4 + 22*5 /* SPE GPRh */ - + 8*5 /* CRF */]; +static char cpu_reg_names[10 * 3 + 22 * 4 /* GPR */ + + 10 * 4 + 22 * 5 /* SPE GPRh */ + + 8 * 5 /* CRF */]; static TCGv cpu_gpr[32]; static TCGv cpu_gprh[32]; static TCGv_i32 cpu_crf[8]; @@ -78,7 +78,7 @@ static TCGv_i32 cpu_access_type; void ppc_translate_init(void) { int i; - char* p; + char *p; size_t cpu_reg_names_size; p = cpu_reg_names; @@ -146,7 +146,8 @@ void ppc_translate_init(void) offsetof(CPUPPCState, fpscr), "fpscr"); cpu_access_type = tcg_global_mem_new_i32(cpu_env, - offsetof(CPUPPCState, access_type), "access_type"); + offsetof(CPUPPCState, access_type), + "access_type"); } /* internal defines */ @@ -246,8 +247,9 @@ static void gen_exception_err(DisasContext *ctx, uint32_t excp, uint32_t error) { TCGv_i32 t0, t1; - /* These are all synchronous exceptions, we set the PC back to - * the faulting instruction + /* + * These are all synchronous exceptions, we set the PC back to the + * faulting instruction */ if (ctx->exception == POWERPC_EXCP_NONE) { gen_update_nip(ctx, ctx->base.pc_next - 4); @@ -264,8 +266,9 @@ static void gen_exception(DisasContext *ctx, uint32_t excp) { TCGv_i32 t0; - /* These are all synchronous exceptions, we set the PC back to - * the faulting instruction + /* + * These are all synchronous exceptions, we set the PC back to the + * faulting instruction */ if (ctx->exception == POWERPC_EXCP_NONE) { gen_update_nip(ctx, ctx->base.pc_next - 4); @@ -320,8 +323,9 @@ static void gen_debug_exception(DisasContext *ctx) { TCGv_i32 t0; - /* These are all synchronous exceptions, we set the PC back to - * the faulting instruction + /* + * These are all synchronous exceptions, we set the PC back to the + * faulting instruction */ if ((ctx->exception != POWERPC_EXCP_BRANCH) && (ctx->exception != POWERPC_EXCP_SYNC)) { @@ -602,9 +606,11 @@ static inline void gen_op_cmp(TCGv arg0, TCGv arg1, int s, int crf) tcg_gen_movi_tl(t0, CRF_EQ); tcg_gen_movi_tl(t1, CRF_LT); - tcg_gen_movcond_tl((s ? TCG_COND_LT : TCG_COND_LTU), t0, arg0, arg1, t1, t0); + tcg_gen_movcond_tl((s ? TCG_COND_LT : TCG_COND_LTU), + t0, arg0, arg1, t1, t0); tcg_gen_movi_tl(t1, CRF_GT); - tcg_gen_movcond_tl((s ? TCG_COND_GT : TCG_COND_GTU), t0, arg0, arg1, t1, t0); + tcg_gen_movcond_tl((s ? TCG_COND_GT : TCG_COND_GTU), + t0, arg0, arg1, t1, t0); tcg_gen_trunc_tl_i32(t, t0); tcg_gen_trunc_tl_i32(cpu_crf[crf], cpu_so); @@ -840,9 +846,11 @@ static inline void gen_op_arith_add(DisasContext *ctx, TCGv ret, TCGv arg1, if (compute_ca) { if (NARROW_MODE(ctx)) { - /* Caution: a non-obvious corner case of the spec is that we - must produce the *entire* 64-bit addition, but produce the - carry into bit 32. */ + /* + * Caution: a non-obvious corner case of the spec is that + * we must produce the *entire* 64-bit addition, but + * produce the carry into bit 32. + */ TCGv t1 = tcg_temp_new(); tcg_gen_xor_tl(t1, arg1, arg2); /* add without carry */ tcg_gen_add_tl(t0, arg1, arg2); @@ -1017,12 +1025,13 @@ static inline void gen_op_arith_divw(DisasContext *ctx, TCGv ret, TCGv arg1, tcg_temp_free_i32(t2); tcg_temp_free_i32(t3); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, ret); + } } /* Div functions */ #define GEN_INT_ARITH_DIVW(name, opc3, sign, compute_ov) \ -static void glue(gen_, name)(DisasContext *ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ gen_op_arith_divw(ctx, cpu_gpr[rD(ctx->opcode)], \ cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \ @@ -1091,12 +1100,13 @@ static inline void gen_op_arith_divd(DisasContext *ctx, TCGv ret, TCGv arg1, tcg_temp_free_i64(t2); tcg_temp_free_i64(t3); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, ret); + } } #define GEN_INT_ARITH_DIVD(name, opc3, sign, compute_ov) \ -static void glue(gen_, name)(DisasContext *ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ gen_op_arith_divd(ctx, cpu_gpr[rD(ctx->opcode)], \ cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], \ @@ -1219,8 +1229,9 @@ static void gen_mulhw(DisasContext *ctx) tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t1); tcg_temp_free_i32(t0); tcg_temp_free_i32(t1); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* mulhwu mulhwu. */ @@ -1235,8 +1246,9 @@ static void gen_mulhwu(DisasContext *ctx) tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], t1); tcg_temp_free_i32(t0); tcg_temp_free_i32(t1); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* mullw mullw. */ @@ -1255,8 +1267,9 @@ static void gen_mullw(DisasContext *ctx) tcg_gen_mul_i32(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); #endif - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* mullwo mullwo. */ @@ -1284,8 +1297,9 @@ static void gen_mullwo(DisasContext *ctx) tcg_temp_free_i32(t0); tcg_temp_free_i32(t1); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* mulli */ @@ -1325,8 +1339,9 @@ static void gen_mulld(DisasContext *ctx) { tcg_gen_mul_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* mulldo mulldo. */ @@ -1369,9 +1384,11 @@ static inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv arg1, if (compute_ca) { /* dest = ~arg1 + arg2 [+ ca]. */ if (NARROW_MODE(ctx)) { - /* Caution: a non-obvious corner case of the spec is that we - must produce the *entire* 64-bit addition, but produce the - carry into bit 32. */ + /* + * Caution: a non-obvious corner case of the spec is that + * we must produce the *entire* 64-bit addition, but + * produce the carry into bit 32. + */ TCGv inv1 = tcg_temp_new(); TCGv t1 = tcg_temp_new(); tcg_gen_not_tl(inv1, arg1); @@ -1404,8 +1421,10 @@ static inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv arg1, gen_op_arith_compute_ca32(ctx, t0, arg1, arg2, cpu_ca32, 1); } } else if (add_ca) { - /* Since we're ignoring carry-out, we can simplify the - standard ~arg1 + arg2 + ca to arg2 - arg1 + ca - 1. */ + /* + * Since we're ignoring carry-out, we can simplify the + * standard ~arg1 + arg2 + ca to arg2 - arg1 + ca - 1. + */ tcg_gen_sub_tl(t0, arg2, arg1); tcg_gen_add_tl(t0, t0, cpu_ca); tcg_gen_subi_tl(t0, t0, 1); @@ -1493,7 +1512,7 @@ static void gen_nego(DisasContext *ctx) /*** Integer logical ***/ #define GEN_LOGICAL2(name, tcg_op, opc, type) \ -static void glue(gen_, name)(DisasContext *ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ tcg_op(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], \ cpu_gpr[rB(ctx->opcode)]); \ @@ -1502,7 +1521,7 @@ static void glue(gen_, name)(DisasContext *ctx) } #define GEN_LOGICAL1(name, tcg_op, opc, type) \ -static void glue(gen_, name)(DisasContext *ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ tcg_op(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)]); \ if (unlikely(Rc(ctx->opcode) != 0)) \ @@ -1517,14 +1536,16 @@ GEN_LOGICAL2(andc, tcg_gen_andc_tl, 0x01, PPC_INTEGER); /* andi. */ static void gen_andi_(DisasContext *ctx) { - tcg_gen_andi_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], UIMM(ctx->opcode)); + tcg_gen_andi_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], + UIMM(ctx->opcode)); gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); } /* andis. */ static void gen_andis_(DisasContext *ctx) { - tcg_gen_andi_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], UIMM(ctx->opcode) << 16); + tcg_gen_andi_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], + UIMM(ctx->opcode) << 16); gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); } @@ -1538,8 +1559,9 @@ static void gen_cntlzw(DisasContext *ctx) tcg_gen_extu_i32_tl(cpu_gpr[rA(ctx->opcode)], t); tcg_temp_free_i32(t); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* cnttzw */ @@ -1591,12 +1613,14 @@ static void gen_or(DisasContext *ctx) rb = rB(ctx->opcode); /* Optimisation for mr. ri case */ if (rs != ra || rs != rb) { - if (rs != rb) + if (rs != rb) { tcg_gen_or_tl(cpu_gpr[ra], cpu_gpr[rs], cpu_gpr[rb]); - else + } else { tcg_gen_mov_tl(cpu_gpr[ra], cpu_gpr[rs]); - if (unlikely(Rc(ctx->opcode) != 0)) + } + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[ra]); + } } else if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rs]); #if defined(TARGET_PPC64) @@ -1654,10 +1678,11 @@ static void gen_or(DisasContext *ctx) tcg_temp_free(t0); } #if !defined(CONFIG_USER_ONLY) - /* Pause out of TCG otherwise spin loops with smt_low eat too much - * CPU and the kernel hangs. This applies to all encodings other - * than no-op, e.g., miso(rs=26), yield(27), mdoio(29), mdoom(30), - * and all currently undefined. + /* + * Pause out of TCG otherwise spin loops with smt_low eat too + * much CPU and the kernel hangs. This applies to all + * encodings other than no-op, e.g., miso(rs=26), yield(27), + * mdoio(29), mdoom(30), and all currently undefined. */ gen_pause(ctx); #endif @@ -1671,12 +1696,15 @@ GEN_LOGICAL2(orc, tcg_gen_orc_tl, 0x0C, PPC_INTEGER); static void gen_xor(DisasContext *ctx) { /* Optimisation for "set to zero" case */ - if (rS(ctx->opcode) != rB(ctx->opcode)) - tcg_gen_xor_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); - else + if (rS(ctx->opcode) != rB(ctx->opcode)) { + tcg_gen_xor_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], + cpu_gpr[rB(ctx->opcode)]); + } else { tcg_gen_movi_tl(cpu_gpr[rA(ctx->opcode)], 0); - if (unlikely(Rc(ctx->opcode) != 0)) + } + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* ori */ @@ -1699,7 +1727,8 @@ static void gen_oris(DisasContext *ctx) /* NOP */ return; } - tcg_gen_ori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], uimm << 16); + tcg_gen_ori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], + uimm << 16); } /* xori */ @@ -1723,7 +1752,8 @@ static void gen_xoris(DisasContext *ctx) /* NOP */ return; } - tcg_gen_xori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], uimm << 16); + tcg_gen_xori_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], + uimm << 16); } /* popcntb : PowerPC 2.03 specification */ @@ -1798,8 +1828,9 @@ GEN_LOGICAL1(extsw, tcg_gen_ext32s_tl, 0x1E, PPC_64B); static void gen_cntlzd(DisasContext *ctx) { tcg_gen_clzi_i64(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], 64); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* cnttzd */ @@ -1838,7 +1869,7 @@ static void gen_rlwimi(DisasContext *ctx) uint32_t mb = MB(ctx->opcode); uint32_t me = ME(ctx->opcode); - if (sh == (31-me) && mb <= me) { + if (sh == (31 - me) && mb <= me) { tcg_gen_deposit_tl(t_ra, t_ra, t_rs, sh, me - mb + 1); } else { target_ulong mask; @@ -2141,8 +2172,9 @@ static void gen_slw(DisasContext *ctx) tcg_temp_free(t1); tcg_temp_free(t0); tcg_gen_ext32u_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* sraw & sraw. */ @@ -2150,8 +2182,9 @@ static void gen_sraw(DisasContext *ctx) { gen_helper_sraw(cpu_gpr[rA(ctx->opcode)], cpu_env, cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* srawi & srawi. */ @@ -2206,8 +2239,9 @@ static void gen_srw(DisasContext *ctx) tcg_gen_shr_tl(cpu_gpr[rA(ctx->opcode)], t0, t1); tcg_temp_free(t1); tcg_temp_free(t0); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } #if defined(TARGET_PPC64) @@ -2226,8 +2260,9 @@ static void gen_sld(DisasContext *ctx) tcg_gen_shl_tl(cpu_gpr[rA(ctx->opcode)], t0, t1); tcg_temp_free(t1); tcg_temp_free(t0); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* srad & srad. */ @@ -2235,8 +2270,9 @@ static void gen_srad(DisasContext *ctx) { gen_helper_srad(cpu_gpr[rA(ctx->opcode)], cpu_env, cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* sradi & sradi. */ static inline void gen_sradi(DisasContext *ctx, int n) @@ -2317,8 +2353,9 @@ static void gen_srd(DisasContext *ctx) tcg_gen_shr_tl(cpu_gpr[rA(ctx->opcode)], t0, t1); tcg_temp_free(t1); tcg_temp_free(t0); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } #endif @@ -2463,7 +2500,7 @@ GEN_QEMU_STORE_64(st64r, BSWAP_MEMOP(MO_Q)) #endif #define GEN_LD(name, ldop, opc, type) \ -static void glue(gen_, name)(DisasContext *ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ TCGv EA; \ gen_set_access_type(ctx, ACCESS_INT); \ @@ -2474,7 +2511,7 @@ static void glue(gen_, name)(DisasContext *ctx) } #define GEN_LDU(name, ldop, opc, type) \ -static void glue(gen_, name##u)(DisasContext *ctx) \ +static void glue(gen_, name##u)(DisasContext *ctx) \ { \ TCGv EA; \ if (unlikely(rA(ctx->opcode) == 0 || \ @@ -2494,7 +2531,7 @@ static void glue(gen_, name##u)(DisasContext *ctx) } #define GEN_LDUX(name, ldop, opc2, opc3, type) \ -static void glue(gen_, name##ux)(DisasContext *ctx) \ +static void glue(gen_, name##ux)(DisasContext *ctx) \ { \ TCGv EA; \ if (unlikely(rA(ctx->opcode) == 0 || \ @@ -2598,8 +2635,9 @@ static void gen_ld(DisasContext *ctx) /* ld - ldu */ gen_qemu_ld64_i64(ctx, cpu_gpr[rD(ctx->opcode)], EA); } - if (Rc(ctx->opcode)) + if (Rc(ctx->opcode)) { tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); + } tcg_temp_free(EA); } @@ -2669,7 +2707,7 @@ static void gen_lq(DisasContext *ctx) /*** Integer store ***/ #define GEN_ST(name, stop, opc, type) \ -static void glue(gen_, name)(DisasContext *ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ TCGv EA; \ gen_set_access_type(ctx, ACCESS_INT); \ @@ -2680,7 +2718,7 @@ static void glue(gen_, name)(DisasContext *ctx) } #define GEN_STU(name, stop, opc, type) \ -static void glue(gen_, stop##u)(DisasContext *ctx) \ +static void glue(gen_, stop##u)(DisasContext *ctx) \ { \ TCGv EA; \ if (unlikely(rA(ctx->opcode) == 0)) { \ @@ -2699,7 +2737,7 @@ static void glue(gen_, stop##u)(DisasContext *ctx) } #define GEN_STUX(name, stop, opc2, opc3, type) \ -static void glue(gen_, name##ux)(DisasContext *ctx) \ +static void glue(gen_, name##ux)(DisasContext *ctx) \ { \ TCGv EA; \ if (unlikely(rA(ctx->opcode) == 0)) { \ @@ -2847,8 +2885,9 @@ static void gen_std(DisasContext *ctx) EA = tcg_temp_new(); gen_addr_imm_index(ctx, EA, 0x03); gen_qemu_st64_i64(ctx, cpu_gpr[rs], EA); - if (Rc(ctx->opcode)) + if (Rc(ctx->opcode)) { tcg_gen_mov_tl(cpu_gpr[rA(ctx->opcode)], EA); + } tcg_temp_free(EA); } } @@ -2916,10 +2955,11 @@ static void gen_stmw(DisasContext *ctx) /*** Integer load and store strings ***/ /* lswi */ -/* PowerPC32 specification says we must generate an exception if - * rA is in the range of registers to be loaded. - * In an other hand, IBM says this is valid, but rA won't be loaded. - * For now, I'll follow the spec... +/* + * PowerPC32 specification says we must generate an exception if rA is + * in the range of registers to be loaded. In an other hand, IBM says + * this is valid, but rA won't be loaded. For now, I'll follow the + * spec... */ static void gen_lswi(DisasContext *ctx) { @@ -2934,8 +2974,9 @@ static void gen_lswi(DisasContext *ctx) gen_align_no_le(ctx); return; } - if (nb == 0) + if (nb == 0) { nb = 32; + } nr = DIV_ROUND_UP(nb, 4); if (unlikely(lsw_reg_in_range(start, nr, ra))) { gen_inval_exception(ctx, POWERPC_EXCP_INVAL_LSWX); @@ -2989,8 +3030,9 @@ static void gen_stswi(DisasContext *ctx) gen_set_access_type(ctx, ACCESS_INT); t0 = tcg_temp_new(); gen_addr_register(ctx, t0); - if (nb == 0) + if (nb == 0) { nb = 32; + } t1 = tcg_const_i32(nb); t2 = tcg_const_i32(rS(ctx->opcode)); gen_helper_stsw(cpu_env, t0, t1, t2); @@ -3363,8 +3405,10 @@ static void gen_conditional_store(DisasContext *ctx, TCGMemOp memop) gen_set_label(l1); - /* Address mismatch implies failure. But we still need to provide the - memory barrier semantics of the instruction. */ + /* + * Address mismatch implies failure. But we still need to provide + * the memory barrier semantics of the instruction. + */ tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL); tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so); @@ -3639,8 +3683,9 @@ static void gen_rvwinkle(DisasContext *ctx) static inline void gen_update_cfar(DisasContext *ctx, target_ulong nip) { #if defined(TARGET_PPC64) - if (ctx->has_cfar) + if (ctx->has_cfar) { tcg_gen_movi_tl(cpu_cfar, nip); + } #endif } @@ -3732,35 +3777,69 @@ static void gen_bcond(DisasContext *ctx, int type) if (type == BCOND_LR || type == BCOND_CTR || type == BCOND_TAR) { target = tcg_temp_local_new(); - if (type == BCOND_CTR) + if (type == BCOND_CTR) { tcg_gen_mov_tl(target, cpu_ctr); - else if (type == BCOND_TAR) + } else if (type == BCOND_TAR) { gen_load_spr(target, SPR_TAR); - else + } else { tcg_gen_mov_tl(target, cpu_lr); + } } else { target = NULL; } - if (LK(ctx->opcode)) + if (LK(ctx->opcode)) { gen_setlr(ctx, ctx->base.pc_next); + } l1 = gen_new_label(); if ((bo & 0x4) == 0) { /* Decrement and test CTR */ TCGv temp = tcg_temp_new(); - if (unlikely(type == BCOND_CTR)) { - gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); - return; - } - tcg_gen_subi_tl(cpu_ctr, cpu_ctr, 1); - if (NARROW_MODE(ctx)) { - tcg_gen_ext32u_tl(temp, cpu_ctr); - } else { - tcg_gen_mov_tl(temp, cpu_ctr); - } - if (bo & 0x2) { - tcg_gen_brcondi_tl(TCG_COND_NE, temp, 0, l1); + + if (type == BCOND_CTR) { + /* + * All ISAs up to v3 describe this form of bcctr as invalid but + * some processors, ie. 64-bit server processors compliant with + * arch 2.x, do implement a "test and decrement" logic instead, + * as described in their respective UMs. This logic involves CTR + * to act as both the branch target and a counter, which makes + * it basically useless and thus never used in real code. + * + * This form was hence chosen to trigger extra micro-architectural + * side-effect on real HW needed for the Spectre v2 workaround. + * It is up to guests that implement such workaround, ie. linux, to + * use this form in a way it just triggers the side-effect without + * doing anything else harmful. + */ + if (unlikely(!is_book3s_arch2x(ctx))) { + gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); + tcg_temp_free(temp); + tcg_temp_free(target); + return; + } + + if (NARROW_MODE(ctx)) { + tcg_gen_ext32u_tl(temp, cpu_ctr); + } else { + tcg_gen_mov_tl(temp, cpu_ctr); + } + if (bo & 0x2) { + tcg_gen_brcondi_tl(TCG_COND_NE, temp, 0, l1); + } else { + tcg_gen_brcondi_tl(TCG_COND_EQ, temp, 0, l1); + } + tcg_gen_subi_tl(cpu_ctr, cpu_ctr, 1); } else { - tcg_gen_brcondi_tl(TCG_COND_EQ, temp, 0, l1); + tcg_gen_subi_tl(cpu_ctr, cpu_ctr, 1); + if (NARROW_MODE(ctx)) { + tcg_gen_ext32u_tl(temp, cpu_ctr); + } else { + tcg_gen_mov_tl(temp, cpu_ctr); + } + if (bo & 0x2) { + tcg_gen_brcondi_tl(TCG_COND_NE, temp, 0, l1); + } else { + tcg_gen_brcondi_tl(TCG_COND_EQ, temp, 0, l1); + } } tcg_temp_free(temp); } @@ -3825,7 +3904,7 @@ static void gen_bctar(DisasContext *ctx) /*** Condition register logical ***/ #define GEN_CRLOGIC(name, tcg_op, opc) \ -static void glue(gen_, name)(DisasContext *ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ uint8_t bitmask; \ int sh; \ @@ -3886,10 +3965,11 @@ static void gen_rfi(DisasContext *ctx) #if defined(CONFIG_USER_ONLY) GEN_PRIV; #else - /* This instruction doesn't exist anymore on 64-bit server + /* + * This instruction doesn't exist anymore on 64-bit server * processors compliant with arch 2.x */ - if (ctx->insns_flags & PPC_SEGMENT_64B) { + if (is_book3s_arch2x(ctx)) { gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); return; } @@ -4125,7 +4205,7 @@ static void gen_mfcr(DisasContext *ctx) if (likely(ctx->opcode & 0x00100000)) { crm = CRM(ctx->opcode); if (likely(crm && ((crm & (crm - 1)) == 0))) { - crn = ctz32 (crm); + crn = ctz32(crm); tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], cpu_crf[7 - crn]); tcg_gen_shli_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rD(ctx->opcode)], crn * 4); @@ -4190,7 +4270,8 @@ static inline void gen_op_mfspr(DisasContext *ctx) (*read_cb)(ctx, rD(ctx->opcode), sprn); } else { /* Privilege exception */ - /* This is a hack to avoid warnings when running Linux: + /* + * This is a hack to avoid warnings when running Linux: * this OS breaks the PowerPC virtualisation model, * allowing userland application to read the PVR */ @@ -4213,8 +4294,9 @@ static inline void gen_op_mfspr(DisasContext *ctx) "Trying to read invalid spr %d (0x%03x) at " TARGET_FMT_lx "\n", sprn, sprn, ctx->base.pc_next - 4); - /* The behaviour depends on MSR:PR and SPR# bit 0x10, - * it can generate a priv, a hv emu or a no-op + /* + * The behaviour depends on MSR:PR and SPR# bit 0x10, it can + * generate a priv, a hv emu or a no-op */ if (sprn & 0x10) { if (ctx->pr) { @@ -4248,7 +4330,7 @@ static void gen_mtcrf(DisasContext *ctx) if (likely((ctx->opcode & 0x00100000))) { if (crm && ((crm & (crm - 1)) == 0)) { TCGv_i32 temp = tcg_temp_new_i32(); - crn = ctz32 (crm); + crn = ctz32(crm); tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]); tcg_gen_shri_i32(temp, temp, crn * 4); tcg_gen_andi_i32(cpu_crf[7 - crn], temp, 0xf); @@ -4277,14 +4359,17 @@ static void gen_mtmsrd(DisasContext *ctx) if (ctx->opcode & 0x00010000) { /* Special form that does not need any synchronisation */ TCGv t0 = tcg_temp_new(); - tcg_gen_andi_tl(t0, cpu_gpr[rS(ctx->opcode)], (1 << MSR_RI) | (1 << MSR_EE)); - tcg_gen_andi_tl(cpu_msr, cpu_msr, ~(target_ulong)((1 << MSR_RI) | (1 << MSR_EE))); + tcg_gen_andi_tl(t0, cpu_gpr[rS(ctx->opcode)], + (1 << MSR_RI) | (1 << MSR_EE)); + tcg_gen_andi_tl(cpu_msr, cpu_msr, + ~(target_ulong)((1 << MSR_RI) | (1 << MSR_EE))); tcg_gen_or_tl(cpu_msr, cpu_msr, t0); tcg_temp_free(t0); } else { - /* XXX: we need to update nip before the store - * if we enter power saving mode, we will exit the loop - * directly from ppc_store_msr + /* + * XXX: we need to update nip before the store if we enter + * power saving mode, we will exit the loop directly from + * ppc_store_msr */ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { gen_io_start(); @@ -4310,16 +4395,19 @@ static void gen_mtmsr(DisasContext *ctx) if (ctx->opcode & 0x00010000) { /* Special form that does not need any synchronisation */ TCGv t0 = tcg_temp_new(); - tcg_gen_andi_tl(t0, cpu_gpr[rS(ctx->opcode)], (1 << MSR_RI) | (1 << MSR_EE)); - tcg_gen_andi_tl(cpu_msr, cpu_msr, ~(target_ulong)((1 << MSR_RI) | (1 << MSR_EE))); + tcg_gen_andi_tl(t0, cpu_gpr[rS(ctx->opcode)], + (1 << MSR_RI) | (1 << MSR_EE)); + tcg_gen_andi_tl(cpu_msr, cpu_msr, + ~(target_ulong)((1 << MSR_RI) | (1 << MSR_EE))); tcg_gen_or_tl(cpu_msr, cpu_msr, t0); tcg_temp_free(t0); } else { TCGv msr = tcg_temp_new(); - /* XXX: we need to update nip before the store - * if we enter power saving mode, we will exit the loop - * directly from ppc_store_msr + /* + * XXX: we need to update nip before the store if we enter + * power saving mode, we will exit the loop directly from + * ppc_store_msr */ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) { gen_io_start(); @@ -4383,8 +4471,9 @@ static void gen_mtspr(DisasContext *ctx) TARGET_FMT_lx "\n", sprn, sprn, ctx->base.pc_next - 4); - /* The behaviour depends on MSR:PR and SPR# bit 0x10, - * it can generate a priv, a hv emu or a no-op + /* + * The behaviour depends on MSR:PR and SPR# bit 0x10, it can + * generate a priv, a hv emu or a no-op */ if (sprn & 0x10) { if (ctx->pr) { @@ -4494,36 +4583,40 @@ static void gen_dcbstep(DisasContext *ctx) /* dcbt */ static void gen_dcbt(DisasContext *ctx) { - /* interpreted as no-op */ - /* XXX: specification say this is treated as a load by the MMU - * but does not generate any exception + /* + * interpreted as no-op + * XXX: specification say this is treated as a load by the MMU but + * does not generate any exception */ } /* dcbtep */ static void gen_dcbtep(DisasContext *ctx) { - /* interpreted as no-op */ - /* XXX: specification say this is treated as a load by the MMU - * but does not generate any exception + /* + * interpreted as no-op + * XXX: specification say this is treated as a load by the MMU but + * does not generate any exception */ } /* dcbtst */ static void gen_dcbtst(DisasContext *ctx) { - /* interpreted as no-op */ - /* XXX: specification say this is treated as a load by the MMU - * but does not generate any exception + /* + * interpreted as no-op + * XXX: specification say this is treated as a load by the MMU but + * does not generate any exception */ } /* dcbtstep */ static void gen_dcbtstep(DisasContext *ctx) { - /* interpreted as no-op */ - /* XXX: specification say this is treated as a load by the MMU - * but does not generate any exception + /* + * interpreted as no-op + * XXX: specification say this is treated as a load by the MMU but + * does not generate any exception */ } @@ -4621,8 +4714,9 @@ static void gen_icbiep(DisasContext *ctx) /* dcba */ static void gen_dcba(DisasContext *ctx) { - /* interpreted as no-op */ - /* XXX: specification say this is treated as a store by the MMU + /* + * interpreted as no-op + * XXX: specification say this is treated as a store by the MMU * but does not generate any exception */ } @@ -4989,8 +5083,9 @@ static void gen_abs(DisasContext *ctx) gen_set_label(l1); tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); gen_set_label(l2); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* abso - abso. */ @@ -5012,8 +5107,9 @@ static void gen_abso(DisasContext *ctx) gen_set_label(l2); tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); gen_set_label(l3); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* clcs */ @@ -5030,8 +5126,9 @@ static void gen_div(DisasContext *ctx) { gen_helper_div(cpu_gpr[rD(ctx->opcode)], cpu_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* divo - divo. */ @@ -5039,8 +5136,9 @@ static void gen_divo(DisasContext *ctx) { gen_helper_divo(cpu_gpr[rD(ctx->opcode)], cpu_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* divs - divs. */ @@ -5048,8 +5146,9 @@ static void gen_divs(DisasContext *ctx) { gen_helper_divs(cpu_gpr[rD(ctx->opcode)], cpu_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* divso - divso. */ @@ -5057,8 +5156,9 @@ static void gen_divso(DisasContext *ctx) { gen_helper_divso(cpu_gpr[rD(ctx->opcode)], cpu_env, cpu_gpr[rA(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* doz - doz. */ @@ -5066,14 +5166,17 @@ static void gen_doz(DisasContext *ctx) { TCGLabel *l1 = gen_new_label(); TCGLabel *l2 = gen_new_label(); - tcg_gen_brcond_tl(TCG_COND_GE, cpu_gpr[rB(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], l1); - tcg_gen_sub_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); + tcg_gen_brcond_tl(TCG_COND_GE, cpu_gpr[rB(ctx->opcode)], + cpu_gpr[rA(ctx->opcode)], l1); + tcg_gen_sub_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], + cpu_gpr[rA(ctx->opcode)]); tcg_gen_br(l2); gen_set_label(l1); tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], 0); gen_set_label(l2); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* dozo - dozo. */ @@ -5086,7 +5189,8 @@ static void gen_dozo(DisasContext *ctx) TCGv t2 = tcg_temp_new(); /* Start with XER OV disabled, the most likely case */ tcg_gen_movi_tl(cpu_ov, 0); - tcg_gen_brcond_tl(TCG_COND_GE, cpu_gpr[rB(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], l1); + tcg_gen_brcond_tl(TCG_COND_GE, cpu_gpr[rB(ctx->opcode)], + cpu_gpr[rA(ctx->opcode)], l1); tcg_gen_sub_tl(t0, cpu_gpr[rB(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); tcg_gen_xor_tl(t1, cpu_gpr[rB(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); tcg_gen_xor_tl(t2, cpu_gpr[rA(ctx->opcode)], t0); @@ -5102,8 +5206,9 @@ static void gen_dozo(DisasContext *ctx) tcg_temp_free(t0); tcg_temp_free(t1); tcg_temp_free(t2); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* dozi */ @@ -5118,8 +5223,9 @@ static void gen_dozi(DisasContext *ctx) gen_set_label(l1); tcg_gen_movi_tl(cpu_gpr[rD(ctx->opcode)], 0); gen_set_label(l2); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* lscbx - lscbx. */ @@ -5137,8 +5243,9 @@ static void gen_lscbx(DisasContext *ctx) tcg_temp_free_i32(t3); tcg_gen_andi_tl(cpu_xer, cpu_xer, ~0x7F); tcg_gen_or_tl(cpu_xer, cpu_xer, t0); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, t0); + } tcg_temp_free(t0); } @@ -5164,8 +5271,9 @@ static void gen_maskg(DisasContext *ctx) tcg_temp_free(t1); tcg_temp_free(t2); tcg_temp_free(t3); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* maskir - maskir. */ @@ -5178,8 +5286,9 @@ static void gen_maskir(DisasContext *ctx) tcg_gen_or_tl(cpu_gpr[rA(ctx->opcode)], t0, t1); tcg_temp_free(t0); tcg_temp_free(t1); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* mul - mul. */ @@ -5198,8 +5307,9 @@ static void gen_mul(DisasContext *ctx) tcg_temp_free_i64(t0); tcg_temp_free_i64(t1); tcg_temp_free(t2); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* mulo - mulo. */ @@ -5226,8 +5336,9 @@ static void gen_mulo(DisasContext *ctx) tcg_temp_free_i64(t0); tcg_temp_free_i64(t1); tcg_temp_free(t2); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* nabs - nabs. */ @@ -5241,8 +5352,9 @@ static void gen_nabs(DisasContext *ctx) gen_set_label(l1); tcg_gen_neg_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); gen_set_label(l2); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* nabso - nabso. */ @@ -5258,8 +5370,9 @@ static void gen_nabso(DisasContext *ctx) gen_set_label(l2); /* nabs never overflows */ tcg_gen_movi_tl(cpu_ov, 0); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]); + } } /* rlmi - rlmi. */ @@ -5271,11 +5384,13 @@ static void gen_rlmi(DisasContext *ctx) tcg_gen_andi_tl(t0, cpu_gpr[rB(ctx->opcode)], 0x1F); tcg_gen_rotl_tl(t0, cpu_gpr[rS(ctx->opcode)], t0); tcg_gen_andi_tl(t0, t0, MASK(mb, me)); - tcg_gen_andi_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], ~MASK(mb, me)); + tcg_gen_andi_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], + ~MASK(mb, me)); tcg_gen_or_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], t0); tcg_temp_free(t0); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* rrib - rrib. */ @@ -5292,8 +5407,9 @@ static void gen_rrib(DisasContext *ctx) tcg_gen_or_tl(cpu_gpr[rA(ctx->opcode)], t0, t1); tcg_temp_free(t0); tcg_temp_free(t1); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* sle - sle. */ @@ -5310,8 +5426,9 @@ static void gen_sle(DisasContext *ctx) gen_store_spr(SPR_MQ, t1); tcg_temp_free(t0); tcg_temp_free(t1); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* sleq - sleq. */ @@ -5332,8 +5449,9 @@ static void gen_sleq(DisasContext *ctx) tcg_temp_free(t0); tcg_temp_free(t1); tcg_temp_free(t2); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* sliq - sliq. */ @@ -5349,8 +5467,9 @@ static void gen_sliq(DisasContext *ctx) gen_store_spr(SPR_MQ, t1); tcg_temp_free(t0); tcg_temp_free(t1); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* slliq - slliq. */ @@ -5367,8 +5486,9 @@ static void gen_slliq(DisasContext *ctx) tcg_gen_or_tl(cpu_gpr[rA(ctx->opcode)], t0, t1); tcg_temp_free(t0); tcg_temp_free(t1); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* sllq - sllq. */ @@ -5396,8 +5516,9 @@ static void gen_sllq(DisasContext *ctx) tcg_temp_free(t0); tcg_temp_free(t1); tcg_temp_free(t2); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* slq - slq. */ @@ -5419,8 +5540,9 @@ static void gen_slq(DisasContext *ctx) gen_set_label(l1); tcg_temp_free(t0); tcg_temp_free(t1); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* sraiq - sraiq. */ @@ -5442,8 +5564,9 @@ static void gen_sraiq(DisasContext *ctx) tcg_gen_sari_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], sh); tcg_temp_free(t0); tcg_temp_free(t1); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* sraq - sraq. */ @@ -5475,8 +5598,9 @@ static void gen_sraq(DisasContext *ctx) gen_set_label(l2); tcg_temp_free(t1); tcg_temp_free(t2); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* sre - sre. */ @@ -5493,8 +5617,9 @@ static void gen_sre(DisasContext *ctx) gen_store_spr(SPR_MQ, t1); tcg_temp_free(t0); tcg_temp_free(t1); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* srea - srea. */ @@ -5508,8 +5633,9 @@ static void gen_srea(DisasContext *ctx) tcg_gen_sar_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], t1); tcg_temp_free(t0); tcg_temp_free(t1); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* sreq */ @@ -5530,8 +5656,9 @@ static void gen_sreq(DisasContext *ctx) tcg_temp_free(t0); tcg_temp_free(t1); tcg_temp_free(t2); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* sriq */ @@ -5547,8 +5674,9 @@ static void gen_sriq(DisasContext *ctx) gen_store_spr(SPR_MQ, t1); tcg_temp_free(t0); tcg_temp_free(t1); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* srliq */ @@ -5565,8 +5693,9 @@ static void gen_srliq(DisasContext *ctx) tcg_gen_or_tl(cpu_gpr[rA(ctx->opcode)], t0, t1); tcg_temp_free(t0); tcg_temp_free(t1); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* srlq */ @@ -5595,8 +5724,9 @@ static void gen_srlq(DisasContext *ctx) tcg_temp_free(t0); tcg_temp_free(t1); tcg_temp_free(t2); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* srq */ @@ -5618,8 +5748,9 @@ static void gen_srq(DisasContext *ctx) gen_set_label(l1); tcg_temp_free(t0); tcg_temp_free(t1); - if (unlikely(Rc(ctx->opcode) != 0)) + if (unlikely(Rc(ctx->opcode) != 0)) { gen_set_Rc0(ctx, cpu_gpr[rA(ctx->opcode)]); + } } /* PowerPC 602 specific instructions */ @@ -5737,8 +5868,9 @@ static void gen_mfsri(DisasContext *ctx) tcg_gen_extract_tl(t0, t0, 28, 4); gen_helper_load_sr(cpu_gpr[rd], cpu_env, t0); tcg_temp_free(t0); - if (ra != 0 && ra != rd) + if (ra != 0 && ra != rd) { tcg_gen_mov_tl(cpu_gpr[ra], cpu_gpr[rd]); + } #endif /* defined(CONFIG_USER_ONLY) */ } @@ -6115,9 +6247,10 @@ static void gen_dcread(DisasContext *ctx) /* icbt */ static void gen_icbt_40x(DisasContext *ctx) { - /* interpreted as no-op */ - /* XXX: specification say this is treated as a load by the MMU - * but does not generate any exception + /* + * interpreted as no-op + * XXX: specification say this is treated as a load by the MMU but + * does not generate any exception */ } @@ -6408,7 +6541,7 @@ static void gen_tlbilx_booke206(DisasContext *ctx) t0 = tcg_temp_new(); gen_addr_reg_index(ctx, t0); - switch((ctx->opcode >> 21) & 0x3) { + switch ((ctx->opcode >> 21) & 0x3) { case 0: gen_helper_booke206_tlbilx0(cpu_env, t0); break; @@ -6442,8 +6575,9 @@ static void gen_wrtee(DisasContext *ctx) tcg_gen_andi_tl(cpu_msr, cpu_msr, ~(1 << MSR_EE)); tcg_gen_or_tl(cpu_msr, cpu_msr, t0); tcg_temp_free(t0); - /* Stop translation to have a chance to raise an exception - * if we just set msr_ee to 1 + /* + * Stop translation to have a chance to raise an exception if we + * just set msr_ee to 1 */ gen_stop_exception(ctx); #endif /* defined(CONFIG_USER_ONLY) */ @@ -6497,9 +6631,10 @@ static void gen_msync_4xx(DisasContext *ctx) /* icbt */ static void gen_icbt_440(DisasContext *ctx) { - /* interpreted as no-op */ - /* XXX: specification say this is treated as a load by the MMU - * but does not generate any exception + /* + * interpreted as no-op + * XXX: specification say this is treated as a load by the MMU but + * does not generate any exception */ } @@ -6511,8 +6646,7 @@ static void gen_msgclr(DisasContext *ctx) GEN_PRIV; #else CHK_HV; - /* 64-bit server processors compliant with arch 2.x */ - if (ctx->insns_flags & PPC_SEGMENT_64B) { + if (is_book3s_arch2x(ctx)) { gen_helper_book3s_msgclr(cpu_env, cpu_gpr[rB(ctx->opcode)]); } else { gen_helper_msgclr(cpu_env, cpu_gpr[rB(ctx->opcode)]); @@ -6526,8 +6660,7 @@ static void gen_msgsnd(DisasContext *ctx) GEN_PRIV; #else CHK_HV; - /* 64-bit server processors compliant with arch 2.x */ - if (ctx->insns_flags & PPC_SEGMENT_64B) { + if (is_book3s_arch2x(ctx)) { gen_helper_book3s_msgsnd(cpu_gpr[rB(ctx->opcode)]); } else { gen_helper_msgsnd(cpu_gpr[rB(ctx->opcode)]); @@ -6595,7 +6728,8 @@ static inline void gen_##name(DisasContext *ctx) \ gen_exception_err(ctx, POWERPC_EXCP_FU, FSCR_IC_TM); \ return; \ } \ - /* Because tbegin always fails in QEMU, these user \ + /* \ + * Because tbegin always fails in QEMU, these user \ * space instructions all have a simple implementation: \ * \ * CR[0] = 0b0 || MSR[TS] || 0b0 \ @@ -6611,17 +6745,18 @@ GEN_TM_NOOP(tabortwci); GEN_TM_NOOP(tabortdc); GEN_TM_NOOP(tabortdci); GEN_TM_NOOP(tsr); + static inline void gen_cp_abort(DisasContext *ctx) { - // Do Nothing + /* Do Nothing */ } #define GEN_CP_PASTE_NOOP(name) \ static inline void gen_##name(DisasContext *ctx) \ { \ - /* Generate invalid exception until \ - * we have an implementation of the copy \ - * paste facility \ + /* \ + * Generate invalid exception until we have an \ + * implementation of the copy paste facility \ */ \ gen_invalid(ctx); \ } @@ -6635,8 +6770,9 @@ static void gen_tcheck(DisasContext *ctx) gen_exception_err(ctx, POWERPC_EXCP_FU, FSCR_IC_TM); return; } - /* Because tbegin always fails, the tcheck implementation - * is simple: + /* + * Because tbegin always fails, the tcheck implementation is + * simple: * * CR[CRF] = TDOOMED || MSR[TS] || 0b0 * = 0b1 || 0b00 || 0b0 @@ -6648,7 +6784,7 @@ static void gen_tcheck(DisasContext *ctx) #define GEN_TM_PRIV_NOOP(name) \ static inline void gen_##name(DisasContext *ctx) \ { \ - gen_priv_exception(ctx, POWERPC_EXCP_PRIV_OPC); \ + gen_priv_exception(ctx, POWERPC_EXCP_PRIV_OPC); \ } #else @@ -6661,7 +6797,8 @@ static inline void gen_##name(DisasContext *ctx) \ gen_exception_err(ctx, POWERPC_EXCP_FU, FSCR_IC_TM); \ return; \ } \ - /* Because tbegin always fails, the implementation is \ + /* \ + * Because tbegin always fails, the implementation is \ * simple: \ * \ * CR[0] = 0b0 || MSR[TS] || 0b0 \ @@ -6943,8 +7080,10 @@ GEN_HANDLER2(slbmfev, "slbmfev", 0x1F, 0x13, 0x1A, 0x001F0001, PPC_SEGMENT_64B), GEN_HANDLER2(slbfee_, "slbfee.", 0x1F, 0x13, 0x1E, 0x001F0000, PPC_SEGMENT_64B), #endif GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, PPC_MEM_TLBIA), -/* XXX Those instructions will need to be handled differently for - * different ISA versions */ +/* + * XXX Those instructions will need to be handled differently for + * different ISA versions + */ GEN_HANDLER(tlbiel, 0x1F, 0x12, 0x08, 0x001F0001, PPC_MEM_TLBIE), GEN_HANDLER(tlbie, 0x1F, 0x12, 0x09, 0x001F0001, PPC_MEM_TLBIE), GEN_HANDLER_E(tlbiel, 0x1F, 0x12, 0x08, 0x00100001, PPC_NONE, PPC2_ISA300), @@ -7384,8 +7523,7 @@ GEN_HANDLER2_E(trechkpt, "trechkpt", 0x1F, 0x0E, 0x1F, 0x03FFF800, \ /*****************************************************************************/ /* Misc PowerPC helpers */ -void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags) +void ppc_cpu_dump_state(CPUState *cs, FILE *f, int flags) { #define RGPL 4 #define RFPL 4 @@ -7394,113 +7532,116 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env = &cpu->env; int i; - cpu_fprintf(f, "NIP " TARGET_FMT_lx " LR " TARGET_FMT_lx " CTR " - TARGET_FMT_lx " XER " TARGET_FMT_lx " CPU#%d\n", - env->nip, env->lr, env->ctr, cpu_read_xer(env), - cs->cpu_index); - cpu_fprintf(f, "MSR " TARGET_FMT_lx " HID0 " TARGET_FMT_lx " HF " - TARGET_FMT_lx " iidx %d didx %d\n", - env->msr, env->spr[SPR_HID0], - env->hflags, env->immu_idx, env->dmmu_idx); + qemu_fprintf(f, "NIP " TARGET_FMT_lx " LR " TARGET_FMT_lx " CTR " + TARGET_FMT_lx " XER " TARGET_FMT_lx " CPU#%d\n", + env->nip, env->lr, env->ctr, cpu_read_xer(env), + cs->cpu_index); + qemu_fprintf(f, "MSR " TARGET_FMT_lx " HID0 " TARGET_FMT_lx " HF " + TARGET_FMT_lx " iidx %d didx %d\n", + env->msr, env->spr[SPR_HID0], + env->hflags, env->immu_idx, env->dmmu_idx); #if !defined(NO_TIMER_DUMP) - cpu_fprintf(f, "TB %08" PRIu32 " %08" PRIu64 + qemu_fprintf(f, "TB %08" PRIu32 " %08" PRIu64 #if !defined(CONFIG_USER_ONLY) - " DECR " TARGET_FMT_lu + " DECR " TARGET_FMT_lu #endif - "\n", - cpu_ppc_load_tbu(env), cpu_ppc_load_tbl(env) + "\n", + cpu_ppc_load_tbu(env), cpu_ppc_load_tbl(env) #if !defined(CONFIG_USER_ONLY) - , cpu_ppc_load_decr(env) + , cpu_ppc_load_decr(env) #endif - ); + ); #endif for (i = 0; i < 32; i++) { - if ((i & (RGPL - 1)) == 0) - cpu_fprintf(f, "GPR%02d", i); - cpu_fprintf(f, " %016" PRIx64, ppc_dump_gpr(env, i)); - if ((i & (RGPL - 1)) == (RGPL - 1)) - cpu_fprintf(f, "\n"); + if ((i & (RGPL - 1)) == 0) { + qemu_fprintf(f, "GPR%02d", i); + } + qemu_fprintf(f, " %016" PRIx64, ppc_dump_gpr(env, i)); + if ((i & (RGPL - 1)) == (RGPL - 1)) { + qemu_fprintf(f, "\n"); + } } - cpu_fprintf(f, "CR "); + qemu_fprintf(f, "CR "); for (i = 0; i < 8; i++) - cpu_fprintf(f, "%01x", env->crf[i]); - cpu_fprintf(f, " ["); + qemu_fprintf(f, "%01x", env->crf[i]); + qemu_fprintf(f, " ["); for (i = 0; i < 8; i++) { char a = '-'; - if (env->crf[i] & 0x08) + if (env->crf[i] & 0x08) { a = 'L'; - else if (env->crf[i] & 0x04) + } else if (env->crf[i] & 0x04) { a = 'G'; - else if (env->crf[i] & 0x02) + } else if (env->crf[i] & 0x02) { a = 'E'; - cpu_fprintf(f, " %c%c", a, env->crf[i] & 0x01 ? 'O' : ' '); + } + qemu_fprintf(f, " %c%c", a, env->crf[i] & 0x01 ? 'O' : ' '); } - cpu_fprintf(f, " ] RES " TARGET_FMT_lx "\n", - env->reserve_addr); + qemu_fprintf(f, " ] RES " TARGET_FMT_lx "\n", + env->reserve_addr); if (flags & CPU_DUMP_FPU) { for (i = 0; i < 32; i++) { if ((i & (RFPL - 1)) == 0) { - cpu_fprintf(f, "FPR%02d", i); + qemu_fprintf(f, "FPR%02d", i); } - cpu_fprintf(f, " %016" PRIx64, *cpu_fpr_ptr(env, i)); + qemu_fprintf(f, " %016" PRIx64, *cpu_fpr_ptr(env, i)); if ((i & (RFPL - 1)) == (RFPL - 1)) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } } - cpu_fprintf(f, "FPSCR " TARGET_FMT_lx "\n", env->fpscr); + qemu_fprintf(f, "FPSCR " TARGET_FMT_lx "\n", env->fpscr); } #if !defined(CONFIG_USER_ONLY) - cpu_fprintf(f, " SRR0 " TARGET_FMT_lx " SRR1 " TARGET_FMT_lx - " PVR " TARGET_FMT_lx " VRSAVE " TARGET_FMT_lx "\n", - env->spr[SPR_SRR0], env->spr[SPR_SRR1], - env->spr[SPR_PVR], env->spr[SPR_VRSAVE]); + qemu_fprintf(f, " SRR0 " TARGET_FMT_lx " SRR1 " TARGET_FMT_lx + " PVR " TARGET_FMT_lx " VRSAVE " TARGET_FMT_lx "\n", + env->spr[SPR_SRR0], env->spr[SPR_SRR1], + env->spr[SPR_PVR], env->spr[SPR_VRSAVE]); - cpu_fprintf(f, "SPRG0 " TARGET_FMT_lx " SPRG1 " TARGET_FMT_lx - " SPRG2 " TARGET_FMT_lx " SPRG3 " TARGET_FMT_lx "\n", - env->spr[SPR_SPRG0], env->spr[SPR_SPRG1], - env->spr[SPR_SPRG2], env->spr[SPR_SPRG3]); + qemu_fprintf(f, "SPRG0 " TARGET_FMT_lx " SPRG1 " TARGET_FMT_lx + " SPRG2 " TARGET_FMT_lx " SPRG3 " TARGET_FMT_lx "\n", + env->spr[SPR_SPRG0], env->spr[SPR_SPRG1], + env->spr[SPR_SPRG2], env->spr[SPR_SPRG3]); - cpu_fprintf(f, "SPRG4 " TARGET_FMT_lx " SPRG5 " TARGET_FMT_lx - " SPRG6 " TARGET_FMT_lx " SPRG7 " TARGET_FMT_lx "\n", - env->spr[SPR_SPRG4], env->spr[SPR_SPRG5], - env->spr[SPR_SPRG6], env->spr[SPR_SPRG7]); + qemu_fprintf(f, "SPRG4 " TARGET_FMT_lx " SPRG5 " TARGET_FMT_lx + " SPRG6 " TARGET_FMT_lx " SPRG7 " TARGET_FMT_lx "\n", + env->spr[SPR_SPRG4], env->spr[SPR_SPRG5], + env->spr[SPR_SPRG6], env->spr[SPR_SPRG7]); #if defined(TARGET_PPC64) if (env->excp_model == POWERPC_EXCP_POWER7 || env->excp_model == POWERPC_EXCP_POWER8 || env->excp_model == POWERPC_EXCP_POWER9) { - cpu_fprintf(f, "HSRR0 " TARGET_FMT_lx " HSRR1 " TARGET_FMT_lx "\n", - env->spr[SPR_HSRR0], env->spr[SPR_HSRR1]); + qemu_fprintf(f, "HSRR0 " TARGET_FMT_lx " HSRR1 " TARGET_FMT_lx "\n", + env->spr[SPR_HSRR0], env->spr[SPR_HSRR1]); } #endif if (env->excp_model == POWERPC_EXCP_BOOKE) { - cpu_fprintf(f, "CSRR0 " TARGET_FMT_lx " CSRR1 " TARGET_FMT_lx - " MCSRR0 " TARGET_FMT_lx " MCSRR1 " TARGET_FMT_lx "\n", - env->spr[SPR_BOOKE_CSRR0], env->spr[SPR_BOOKE_CSRR1], - env->spr[SPR_BOOKE_MCSRR0], env->spr[SPR_BOOKE_MCSRR1]); - - cpu_fprintf(f, " TCR " TARGET_FMT_lx " TSR " TARGET_FMT_lx - " ESR " TARGET_FMT_lx " DEAR " TARGET_FMT_lx "\n", - env->spr[SPR_BOOKE_TCR], env->spr[SPR_BOOKE_TSR], - env->spr[SPR_BOOKE_ESR], env->spr[SPR_BOOKE_DEAR]); - - cpu_fprintf(f, " PIR " TARGET_FMT_lx " DECAR " TARGET_FMT_lx - " IVPR " TARGET_FMT_lx " EPCR " TARGET_FMT_lx "\n", - env->spr[SPR_BOOKE_PIR], env->spr[SPR_BOOKE_DECAR], - env->spr[SPR_BOOKE_IVPR], env->spr[SPR_BOOKE_EPCR]); - - cpu_fprintf(f, " MCSR " TARGET_FMT_lx " SPRG8 " TARGET_FMT_lx - " EPR " TARGET_FMT_lx "\n", - env->spr[SPR_BOOKE_MCSR], env->spr[SPR_BOOKE_SPRG8], - env->spr[SPR_BOOKE_EPR]); + qemu_fprintf(f, "CSRR0 " TARGET_FMT_lx " CSRR1 " TARGET_FMT_lx + " MCSRR0 " TARGET_FMT_lx " MCSRR1 " TARGET_FMT_lx "\n", + env->spr[SPR_BOOKE_CSRR0], env->spr[SPR_BOOKE_CSRR1], + env->spr[SPR_BOOKE_MCSRR0], env->spr[SPR_BOOKE_MCSRR1]); + + qemu_fprintf(f, " TCR " TARGET_FMT_lx " TSR " TARGET_FMT_lx + " ESR " TARGET_FMT_lx " DEAR " TARGET_FMT_lx "\n", + env->spr[SPR_BOOKE_TCR], env->spr[SPR_BOOKE_TSR], + env->spr[SPR_BOOKE_ESR], env->spr[SPR_BOOKE_DEAR]); + + qemu_fprintf(f, " PIR " TARGET_FMT_lx " DECAR " TARGET_FMT_lx + " IVPR " TARGET_FMT_lx " EPCR " TARGET_FMT_lx "\n", + env->spr[SPR_BOOKE_PIR], env->spr[SPR_BOOKE_DECAR], + env->spr[SPR_BOOKE_IVPR], env->spr[SPR_BOOKE_EPCR]); + + qemu_fprintf(f, " MCSR " TARGET_FMT_lx " SPRG8 " TARGET_FMT_lx + " EPR " TARGET_FMT_lx "\n", + env->spr[SPR_BOOKE_MCSR], env->spr[SPR_BOOKE_SPRG8], + env->spr[SPR_BOOKE_EPR]); /* FSL-specific */ - cpu_fprintf(f, " MCAR " TARGET_FMT_lx " PID1 " TARGET_FMT_lx - " PID2 " TARGET_FMT_lx " SVR " TARGET_FMT_lx "\n", - env->spr[SPR_Exxx_MCAR], env->spr[SPR_BOOKE_PID1], - env->spr[SPR_BOOKE_PID2], env->spr[SPR_E500_SVR]); + qemu_fprintf(f, " MCAR " TARGET_FMT_lx " PID1 " TARGET_FMT_lx + " PID2 " TARGET_FMT_lx " SVR " TARGET_FMT_lx "\n", + env->spr[SPR_Exxx_MCAR], env->spr[SPR_BOOKE_PID1], + env->spr[SPR_BOOKE_PID2], env->spr[SPR_E500_SVR]); /* * IVORs are left out as they are large and do not change often -- @@ -7510,12 +7651,13 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, #if defined(TARGET_PPC64) if (env->flags & POWERPC_FLAG_CFAR) { - cpu_fprintf(f, " CFAR " TARGET_FMT_lx"\n", env->cfar); + qemu_fprintf(f, " CFAR " TARGET_FMT_lx"\n", env->cfar); } #endif - if (env->spr_cb[SPR_LPCR].name) - cpu_fprintf(f, " LPCR " TARGET_FMT_lx "\n", env->spr[SPR_LPCR]); + if (env->spr_cb[SPR_LPCR].name) { + qemu_fprintf(f, " LPCR " TARGET_FMT_lx "\n", env->spr[SPR_LPCR]); + } switch (env->mmu_model) { case POWERPC_MMU_32B: @@ -7530,29 +7672,29 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, case POWERPC_MMU_3_00: #endif if (env->spr_cb[SPR_SDR1].name) { /* SDR1 Exists */ - cpu_fprintf(f, " SDR1 " TARGET_FMT_lx " ", env->spr[SPR_SDR1]); + qemu_fprintf(f, " SDR1 " TARGET_FMT_lx " ", env->spr[SPR_SDR1]); } if (env->spr_cb[SPR_PTCR].name) { /* PTCR Exists */ - cpu_fprintf(f, " PTCR " TARGET_FMT_lx " ", env->spr[SPR_PTCR]); + qemu_fprintf(f, " PTCR " TARGET_FMT_lx " ", env->spr[SPR_PTCR]); } - cpu_fprintf(f, " DAR " TARGET_FMT_lx " DSISR " TARGET_FMT_lx "\n", - env->spr[SPR_DAR], env->spr[SPR_DSISR]); + qemu_fprintf(f, " DAR " TARGET_FMT_lx " DSISR " TARGET_FMT_lx "\n", + env->spr[SPR_DAR], env->spr[SPR_DSISR]); break; case POWERPC_MMU_BOOKE206: - cpu_fprintf(f, " MAS0 " TARGET_FMT_lx " MAS1 " TARGET_FMT_lx - " MAS2 " TARGET_FMT_lx " MAS3 " TARGET_FMT_lx "\n", - env->spr[SPR_BOOKE_MAS0], env->spr[SPR_BOOKE_MAS1], - env->spr[SPR_BOOKE_MAS2], env->spr[SPR_BOOKE_MAS3]); - - cpu_fprintf(f, " MAS4 " TARGET_FMT_lx " MAS6 " TARGET_FMT_lx - " MAS7 " TARGET_FMT_lx " PID " TARGET_FMT_lx "\n", - env->spr[SPR_BOOKE_MAS4], env->spr[SPR_BOOKE_MAS6], - env->spr[SPR_BOOKE_MAS7], env->spr[SPR_BOOKE_PID]); - - cpu_fprintf(f, "MMUCFG " TARGET_FMT_lx " TLB0CFG " TARGET_FMT_lx - " TLB1CFG " TARGET_FMT_lx "\n", - env->spr[SPR_MMUCFG], env->spr[SPR_BOOKE_TLB0CFG], - env->spr[SPR_BOOKE_TLB1CFG]); + qemu_fprintf(f, " MAS0 " TARGET_FMT_lx " MAS1 " TARGET_FMT_lx + " MAS2 " TARGET_FMT_lx " MAS3 " TARGET_FMT_lx "\n", + env->spr[SPR_BOOKE_MAS0], env->spr[SPR_BOOKE_MAS1], + env->spr[SPR_BOOKE_MAS2], env->spr[SPR_BOOKE_MAS3]); + + qemu_fprintf(f, " MAS4 " TARGET_FMT_lx " MAS6 " TARGET_FMT_lx + " MAS7 " TARGET_FMT_lx " PID " TARGET_FMT_lx "\n", + env->spr[SPR_BOOKE_MAS4], env->spr[SPR_BOOKE_MAS6], + env->spr[SPR_BOOKE_MAS7], env->spr[SPR_BOOKE_PID]); + + qemu_fprintf(f, "MMUCFG " TARGET_FMT_lx " TLB0CFG " TARGET_FMT_lx + " TLB1CFG " TARGET_FMT_lx "\n", + env->spr[SPR_MMUCFG], env->spr[SPR_BOOKE_TLB0CFG], + env->spr[SPR_BOOKE_TLB1CFG]); break; default: break; @@ -7563,8 +7705,7 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, #undef RFPL } -void ppc_cpu_dump_statistics(CPUState *cs, FILE*f, - fprintf_function cpu_fprintf, int flags) +void ppc_cpu_dump_statistics(CPUState *cs, int flags) { #if defined(DO_PPC_STATISTICS) PowerPCCPU *cpu = POWERPC_CPU(cs); @@ -7582,27 +7723,30 @@ void ppc_cpu_dump_statistics(CPUState *cs, FILE*f, t3 = ind_table(handler); for (op3 = 0; op3 < 32; op3++) { handler = t3[op3]; - if (handler->count == 0) + if (handler->count == 0) { continue; - cpu_fprintf(f, "%02x %02x %02x (%02x %04d) %16s: " + } + qemu_printf("%02x %02x %02x (%02x %04d) %16s: " "%016" PRIx64 " %" PRId64 "\n", op1, op2, op3, op1, (op3 << 5) | op2, handler->oname, handler->count, handler->count); } } else { - if (handler->count == 0) + if (handler->count == 0) { continue; - cpu_fprintf(f, "%02x %02x (%02x %04d) %16s: " + } + qemu_printf("%02x %02x (%02x %04d) %16s: " "%016" PRIx64 " %" PRId64 "\n", op1, op2, op1, op2, handler->oname, handler->count, handler->count); } } } else { - if (handler->count == 0) + if (handler->count == 0) { continue; - cpu_fprintf(f, "%02x (%02x ) %16s: %016" PRIx64 + } + qemu_printf("%02x (%02x ) %16s: %016" PRIx64 " %" PRId64 "\n", op1, op1, handler->oname, handler->count, handler->count); @@ -7641,14 +7785,16 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) || (env->mmu_model & POWERPC_MMU_64B); ctx->fpu_enabled = !!msr_fp; - if ((env->flags & POWERPC_FLAG_SPE) && msr_spe) + if ((env->flags & POWERPC_FLAG_SPE) && msr_spe) { ctx->spe_enabled = !!msr_spe; - else + } else { ctx->spe_enabled = false; - if ((env->flags & POWERPC_FLAG_VRE) && msr_vr) + } + if ((env->flags & POWERPC_FLAG_VRE) && msr_vr) { ctx->altivec_enabled = !!msr_vr; - else + } else { ctx->altivec_enabled = false; + } if ((env->flags & POWERPC_FLAG_VSX) && msr_vsx) { ctx->vsx_enabled = !!msr_vsx; } else { @@ -7662,12 +7808,14 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) } #endif ctx->gtse = !!(env->spr[SPR_LPCR] & LPCR_GTSE); - if ((env->flags & POWERPC_FLAG_SE) && msr_se) + if ((env->flags & POWERPC_FLAG_SE) && msr_se) { ctx->singlestep_enabled = CPU_SINGLE_STEP; - else + } else { ctx->singlestep_enabled = 0; - if ((env->flags & POWERPC_FLAG_BE) && msr_be) + } + if ((env->flags & POWERPC_FLAG_BE) && msr_be) { ctx->singlestep_enabled |= CPU_BRANCH_STEP; + } if ((env->flags & POWERPC_FLAG_DE) && msr_de) { ctx->singlestep_enabled = 0; target_ulong dbcr0 = env->spr[SPR_BOOKE_DBCR0]; @@ -7682,7 +7830,7 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) if (unlikely(ctx->base.singlestep_enabled)) { ctx->singlestep_enabled |= GDBSTUB_SINGLE_STEP; } -#if defined (DO_SINGLE_STEP) && 0 +#if defined(DO_SINGLE_STEP) && 0 /* Single step trace mode */ msr_se = 1; #endif @@ -7707,10 +7855,12 @@ static bool ppc_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, gen_debug_exception(ctx); dcbase->is_jmp = DISAS_NORETURN; - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size below does the right thing. */ + /* + * The address covered by the breakpoint must be included in + * [tb->pc, tb->pc + tb->size) in order to for it to be properly + * cleared -- thus we increment the PC here so that the logic + * setting tb->size below does the right thing. + */ ctx->base.pc_next += 4; return true; } @@ -7834,11 +7984,11 @@ static const TranslatorOps ppc_tr_ops = { .disas_log = ppc_tr_disas_log, }; -void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { DisasContext ctx; - translator_loop(&ppc_tr_ops, &ctx.base, cs, tb); + translator_loop(&ppc_tr_ops, &ctx.base, cs, tb, max_insns); } void restore_state_to_opc(CPUPPCState *env, TranslationBlock *tb, diff --git a/target/ppc/translate/fp-impl.inc.c b/target/ppc/translate/fp-impl.inc.c index 0f21a4e477..9dcff947c0 100644 --- a/target/ppc/translate/fp-impl.inc.c +++ b/target/ppc/translate/fp-impl.inc.c @@ -585,11 +585,13 @@ static void gen_mcrfs(DisasContext *ctx) shift = 4 * nibble; tcg_gen_shri_tl(tmp, cpu_fpscr, shift); tcg_gen_trunc_tl_i32(cpu_crf[crfD(ctx->opcode)], tmp); - tcg_gen_andi_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfD(ctx->opcode)], 0xf); + tcg_gen_andi_i32(cpu_crf[crfD(ctx->opcode)], cpu_crf[crfD(ctx->opcode)], + 0xf); tcg_temp_free(tmp); tcg_gen_extu_tl_i64(tnew_fpscr, cpu_fpscr); /* Only the exception bits (including FX) should be cleared if read */ - tcg_gen_andi_i64(tnew_fpscr, tnew_fpscr, ~((0xF << shift) & FP_EX_CLEAR_BITS)); + tcg_gen_andi_i64(tnew_fpscr, tnew_fpscr, + ~((0xF << shift) & FP_EX_CLEAR_BITS)); /* FEX and VX need to be updated, so don't set fpscr directly */ tmask = tcg_const_i32(1 << nibble); gen_helper_store_fpscr(cpu_env, tnew_fpscr, tmask); @@ -735,7 +737,7 @@ static void gen_mtfsfi(DisasContext *ctx) /*** Floating-point load ***/ #define GEN_LDF(name, ldop, opc, type) \ -static void glue(gen_, name)(DisasContext *ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ TCGv EA; \ TCGv_i64 t0; \ @@ -754,7 +756,7 @@ static void glue(gen_, name)(DisasContext *ctx) } #define GEN_LDUF(name, ldop, opc, type) \ -static void glue(gen_, name##u)(DisasContext *ctx) \ +static void glue(gen_, name##u)(DisasContext *ctx) \ { \ TCGv EA; \ TCGv_i64 t0; \ @@ -778,7 +780,7 @@ static void glue(gen_, name##u)(DisasContext *ctx) } #define GEN_LDUXF(name, ldop, opc, type) \ -static void glue(gen_, name##ux)(DisasContext *ctx) \ +static void glue(gen_, name##ux)(DisasContext *ctx) \ { \ TCGv EA; \ TCGv_i64 t0; \ @@ -802,7 +804,7 @@ static void glue(gen_, name##ux)(DisasContext *ctx) } #define GEN_LDXF(name, ldop, opc2, opc3, type) \ -static void glue(gen_, name##x)(DisasContext *ctx) \ +static void glue(gen_, name##x)(DisasContext *ctx) \ { \ TCGv EA; \ TCGv_i64 t0; \ @@ -872,8 +874,10 @@ static void gen_lfdp(DisasContext *ctx) EA = tcg_temp_new(); gen_addr_imm_index(ctx, EA, 0); t0 = tcg_temp_new_i64(); - /* We only need to swap high and low halves. gen_qemu_ld64_i64 does - necessary 64-bit byteswap already. */ + /* + * We only need to swap high and low halves. gen_qemu_ld64_i64 + * does necessary 64-bit byteswap already. + */ if (unlikely(ctx->le_mode)) { gen_qemu_ld64_i64(ctx, t0, EA); set_fpr(rD(ctx->opcode) + 1, t0); @@ -904,8 +908,10 @@ static void gen_lfdpx(DisasContext *ctx) EA = tcg_temp_new(); gen_addr_reg_index(ctx, EA); t0 = tcg_temp_new_i64(); - /* We only need to swap high and low halves. gen_qemu_ld64_i64 does - necessary 64-bit byteswap already. */ + /* + * We only need to swap high and low halves. gen_qemu_ld64_i64 + * does necessary 64-bit byteswap already. + */ if (unlikely(ctx->le_mode)) { gen_qemu_ld64_i64(ctx, t0, EA); set_fpr(rD(ctx->opcode) + 1, t0); @@ -966,7 +972,7 @@ static void gen_lfiwzx(DisasContext *ctx) } /*** Floating-point store ***/ #define GEN_STF(name, stop, opc, type) \ -static void glue(gen_, name)(DisasContext *ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ TCGv EA; \ TCGv_i64 t0; \ @@ -985,7 +991,7 @@ static void glue(gen_, name)(DisasContext *ctx) } #define GEN_STUF(name, stop, opc, type) \ -static void glue(gen_, name##u)(DisasContext *ctx) \ +static void glue(gen_, name##u)(DisasContext *ctx) \ { \ TCGv EA; \ TCGv_i64 t0; \ @@ -1009,7 +1015,7 @@ static void glue(gen_, name##u)(DisasContext *ctx) } #define GEN_STUXF(name, stop, opc, type) \ -static void glue(gen_, name##ux)(DisasContext *ctx) \ +static void glue(gen_, name##ux)(DisasContext *ctx) \ { \ TCGv EA; \ TCGv_i64 t0; \ @@ -1033,7 +1039,7 @@ static void glue(gen_, name##ux)(DisasContext *ctx) } #define GEN_STXF(name, stop, opc2, opc3, type) \ -static void glue(gen_, name##x)(DisasContext *ctx) \ +static void glue(gen_, name##x)(DisasContext *ctx) \ { \ TCGv EA; \ TCGv_i64 t0; \ @@ -1103,8 +1109,10 @@ static void gen_stfdp(DisasContext *ctx) EA = tcg_temp_new(); t0 = tcg_temp_new_i64(); gen_addr_imm_index(ctx, EA, 0); - /* We only need to swap high and low halves. gen_qemu_st64_i64 does - necessary 64-bit byteswap already. */ + /* + * We only need to swap high and low halves. gen_qemu_st64_i64 + * does necessary 64-bit byteswap already. + */ if (unlikely(ctx->le_mode)) { get_fpr(t0, rD(ctx->opcode) + 1); gen_qemu_st64_i64(ctx, t0, EA); @@ -1135,8 +1143,10 @@ static void gen_stfdpx(DisasContext *ctx) EA = tcg_temp_new(); t0 = tcg_temp_new_i64(); gen_addr_reg_index(ctx, EA); - /* We only need to swap high and low halves. gen_qemu_st64_i64 does - necessary 64-bit byteswap already. */ + /* + * We only need to swap high and low halves. gen_qemu_st64_i64 + * does necessary 64-bit byteswap already. + */ if (unlikely(ctx->le_mode)) { get_fpr(t0, rD(ctx->opcode) + 1); gen_qemu_st64_i64(ctx, t0, EA); @@ -1204,8 +1214,9 @@ static void gen_lfqu(DisasContext *ctx) gen_addr_add(ctx, t1, t0, 8); gen_qemu_ld64_i64(ctx, t2, t1); set_fpr((rd + 1) % 32, t2); - if (ra != 0) + if (ra != 0) { tcg_gen_mov_tl(cpu_gpr[ra], t0); + } tcg_temp_free(t0); tcg_temp_free(t1); tcg_temp_free_i64(t2); @@ -1229,8 +1240,9 @@ static void gen_lfqux(DisasContext *ctx) gen_qemu_ld64_i64(ctx, t2, t1); set_fpr((rd + 1) % 32, t2); tcg_temp_free(t1); - if (ra != 0) + if (ra != 0) { tcg_gen_mov_tl(cpu_gpr[ra], t0); + } tcg_temp_free(t0); tcg_temp_free_i64(t2); } diff --git a/target/ppc/translate/spe-impl.inc.c b/target/ppc/translate/spe-impl.inc.c index 8c1c16c63e..7ab0a29b5f 100644 --- a/target/ppc/translate/spe-impl.inc.c +++ b/target/ppc/translate/spe-impl.inc.c @@ -18,7 +18,8 @@ static inline void gen_evmra(DisasContext *ctx) TCGv_i64 tmp = tcg_temp_new_i64(); /* tmp := rA_lo + rA_hi << 32 */ - tcg_gen_concat_tl_i64(tmp, cpu_gpr[rA(ctx->opcode)], cpu_gprh[rA(ctx->opcode)]); + tcg_gen_concat_tl_i64(tmp, cpu_gpr[rA(ctx->opcode)], + cpu_gprh[rA(ctx->opcode)]); /* spe_acc := tmp */ tcg_gen_st_i64(tmp, cpu_env, offsetof(CPUPPCState, spe_acc)); @@ -780,7 +781,7 @@ static inline void gen_op_evstwwo(DisasContext *ctx, TCGv addr) } #define GEN_SPEOP_LDST(name, opc2, sh) \ -static void glue(gen_, name)(DisasContext *ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ TCGv t0; \ if (unlikely(!ctx->spe_enabled)) { \ @@ -1089,7 +1090,8 @@ static inline void gen_efsabs(DisasContext *ctx) gen_exception(ctx, POWERPC_EXCP_SPEU); return; } - tcg_gen_andi_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], (target_long)~0x80000000LL); + tcg_gen_andi_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], + (target_long)~0x80000000LL); } static inline void gen_efsnabs(DisasContext *ctx) { @@ -1097,7 +1099,8 @@ static inline void gen_efsnabs(DisasContext *ctx) gen_exception(ctx, POWERPC_EXCP_SPEU); return; } - tcg_gen_ori_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 0x80000000); + tcg_gen_ori_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], + 0x80000000); } static inline void gen_efsneg(DisasContext *ctx) { @@ -1105,7 +1108,8 @@ static inline void gen_efsneg(DisasContext *ctx) gen_exception(ctx, POWERPC_EXCP_SPEU); return; } - tcg_gen_xori_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], 0x80000000); + tcg_gen_xori_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], + 0x80000000); } /* Conversion */ diff --git a/target/ppc/translate/vmx-impl.inc.c b/target/ppc/translate/vmx-impl.inc.c index eb10c533ca..bd3ff40e68 100644 --- a/target/ppc/translate/vmx-impl.inc.c +++ b/target/ppc/translate/vmx-impl.inc.c @@ -15,7 +15,7 @@ static inline TCGv_ptr gen_avr_ptr(int reg) } #define GEN_VR_LDX(name, opc2, opc3) \ -static void glue(gen_, name)(DisasContext *ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ TCGv EA; \ TCGv_i64 avr; \ @@ -28,8 +28,10 @@ static void glue(gen_, name)(DisasContext *ctx) EA = tcg_temp_new(); \ gen_addr_reg_index(ctx, EA); \ tcg_gen_andi_tl(EA, EA, ~0xf); \ - /* We only need to swap high and low halves. gen_qemu_ld64_i64 does \ - necessary 64-bit byteswap already. */ \ + /* \ + * We only need to swap high and low halves. gen_qemu_ld64_i64 \ + * does necessary 64-bit byteswap already. \ + */ \ if (ctx->le_mode) { \ gen_qemu_ld64_i64(ctx, avr, EA); \ set_avr64(rD(ctx->opcode), avr, false); \ @@ -61,8 +63,10 @@ static void gen_st##name(DisasContext *ctx) \ EA = tcg_temp_new(); \ gen_addr_reg_index(ctx, EA); \ tcg_gen_andi_tl(EA, EA, ~0xf); \ - /* We only need to swap high and low halves. gen_qemu_st64_i64 does \ - necessary 64-bit byteswap already. */ \ + /* \ + * We only need to swap high and low halves. gen_qemu_st64_i64 \ + * does necessary 64-bit byteswap already. \ + */ \ if (ctx->le_mode) { \ get_avr64(avr, rD(ctx->opcode), false); \ gen_qemu_st64_i64(ctx, avr, EA); \ @@ -296,7 +300,7 @@ GEN_VXFORM_V(vnand, MO_64, tcg_gen_gvec_nand, 2, 22); GEN_VXFORM_V(vorc, MO_64, tcg_gen_gvec_orc, 2, 21); #define GEN_VXFORM(name, opc2, opc3) \ -static void glue(gen_, name)(DisasContext *ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ TCGv_ptr ra, rb, rd; \ if (unlikely(!ctx->altivec_enabled)) { \ @@ -306,7 +310,7 @@ static void glue(gen_, name)(DisasContext *ctx) ra = gen_avr_ptr(rA(ctx->opcode)); \ rb = gen_avr_ptr(rB(ctx->opcode)); \ rd = gen_avr_ptr(rD(ctx->opcode)); \ - gen_helper_##name (rd, ra, rb); \ + gen_helper_##name(rd, ra, rb); \ tcg_temp_free_ptr(ra); \ tcg_temp_free_ptr(rb); \ tcg_temp_free_ptr(rd); \ @@ -758,7 +762,7 @@ GEN_VXFORM_DUPI(vspltish, tcg_gen_gvec_dup16i, 6, 13); GEN_VXFORM_DUPI(vspltisw, tcg_gen_gvec_dup32i, 6, 14); #define GEN_VXFORM_NOA(name, opc2, opc3) \ -static void glue(gen_, name)(DisasContext *ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ TCGv_ptr rb, rd; \ if (unlikely(!ctx->altivec_enabled)) { \ @@ -767,9 +771,9 @@ static void glue(gen_, name)(DisasContext *ctx) } \ rb = gen_avr_ptr(rB(ctx->opcode)); \ rd = gen_avr_ptr(rD(ctx->opcode)); \ - gen_helper_##name (rd, rb); \ + gen_helper_##name(rd, rb); \ tcg_temp_free_ptr(rb); \ - tcg_temp_free_ptr(rd); \ + tcg_temp_free_ptr(rd); \ } #define GEN_VXFORM_NOA_ENV(name, opc2, opc3) \ @@ -943,7 +947,7 @@ static void gen_vsldoi(DisasContext *ctx) rb = gen_avr_ptr(rB(ctx->opcode)); rd = gen_avr_ptr(rD(ctx->opcode)); sh = tcg_const_i32(VSH(ctx->opcode)); - gen_helper_vsldoi (rd, ra, rb, sh); + gen_helper_vsldoi(rd, ra, rb, sh); tcg_temp_free_ptr(ra); tcg_temp_free_ptr(rb); tcg_temp_free_ptr(rd); diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c index 508e9199c8..11d9b75d01 100644 --- a/target/ppc/translate/vsx-impl.inc.c +++ b/target/ppc/translate/vsx-impl.inc.c @@ -356,8 +356,8 @@ static void gen_##name(DisasContext *ctx) \ gen_set_access_type(ctx, ACCESS_INT); \ EA = tcg_temp_new(); \ gen_addr_reg_index(ctx, EA); \ + get_cpu_vsrh(t0, xS(ctx->opcode)); \ gen_qemu_##operation(ctx, t0, EA); \ - set_cpu_vsrh(xS(ctx->opcode), t0); \ tcg_temp_free(EA); \ tcg_temp_free_i64(t0); \ } @@ -751,7 +751,7 @@ static void gen_xxpermdi(DisasContext *ctx) #define SGN_MASK_SP 0x8000000080000000ull #define VSX_SCALAR_MOVE(name, op, sgn_mask) \ -static void glue(gen_, name)(DisasContext * ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ TCGv_i64 xb, sgm; \ if (unlikely(!ctx->vsx_enabled)) { \ @@ -848,7 +848,7 @@ VSX_SCALAR_MOVE_QP(xsnegqp, OP_NEG, SGN_MASK_DP) VSX_SCALAR_MOVE_QP(xscpsgnqp, OP_CPSGN, SGN_MASK_DP) #define VSX_VECTOR_MOVE(name, op, sgn_mask) \ -static void glue(gen_, name)(DisasContext * ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ TCGv_i64 xbh, xbl, sgm; \ if (unlikely(!ctx->vsx_enabled)) { \ @@ -910,7 +910,7 @@ VSX_VECTOR_MOVE(xvnegsp, OP_NEG, SGN_MASK_SP) VSX_VECTOR_MOVE(xvcpsgnsp, OP_CPSGN, SGN_MASK_SP) #define GEN_VSX_HELPER_2(name, op1, op2, inval, type) \ -static void gen_##name(DisasContext * ctx) \ +static void gen_##name(DisasContext *ctx) \ { \ TCGv_i32 opc; \ if (unlikely(!ctx->vsx_enabled)) { \ @@ -923,7 +923,7 @@ static void gen_##name(DisasContext * ctx) \ } #define GEN_VSX_HELPER_XT_XB_ENV(name, op1, op2, inval, type) \ -static void gen_##name(DisasContext * ctx) \ +static void gen_##name(DisasContext *ctx) \ { \ TCGv_i64 t0; \ TCGv_i64 t1; \ @@ -1230,7 +1230,7 @@ static void gen_xxbrw(DisasContext *ctx) } #define VSX_LOGICAL(name, vece, tcg_op) \ -static void glue(gen_, name)(DisasContext * ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ if (unlikely(!ctx->vsx_enabled)) { \ gen_exception(ctx, POWERPC_EXCP_VSXU); \ @@ -1251,7 +1251,7 @@ VSX_LOGICAL(xxlnand, MO_64, tcg_gen_gvec_nand) VSX_LOGICAL(xxlorc, MO_64, tcg_gen_gvec_orc) #define VSX_XXMRG(name, high) \ -static void glue(gen_, name)(DisasContext * ctx) \ +static void glue(gen_, name)(DisasContext *ctx) \ { \ TCGv_i64 a0, a1, b0, b1, tmp; \ if (unlikely(!ctx->vsx_enabled)) { \ @@ -1444,7 +1444,8 @@ static void gen_##name(DisasContext *ctx) \ xb = tcg_const_tl(xB(ctx->opcode)); \ t0 = tcg_temp_new_i32(); \ t1 = tcg_temp_new_i64(); \ - /* uimm > 15 out of bound and for \ + /* \ + * uimm > 15 out of bound and for \ * uimm > 12 handle as per hardware in helper \ */ \ if (uimm > 15) { \ diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c index 0bd555eb19..0394a9ddad 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -18,7 +18,7 @@ * License along with this library; if not, see <http://www.gnu.org/licenses/>. */ -#include "disas/bfd.h" +#include "disas/dis-asm.h" #include "exec/gdbstub.h" #include "kvm_ppc.h" #include "sysemu/arch_init.h" @@ -28,6 +28,7 @@ #include "mmu-hash32.h" #include "mmu-hash64.h" #include "qemu/error-report.h" +#include "qemu/qemu-print.h" #include "qapi/error.h" #include "qapi/qmp/qnull.h" #include "qapi/visitor.h" @@ -40,12 +41,13 @@ #include "fpu/softfloat.h" #include "qapi/qapi-commands-target.h" -//#define PPC_DUMP_CPU -//#define PPC_DEBUG_SPR -//#define PPC_DUMP_SPR_ACCESSES +/* #define PPC_DUMP_CPU */ +/* #define PPC_DEBUG_SPR */ +/* #define PPC_DUMP_SPR_ACCESSES */ /* #define USE_APPLE_GDB */ -/* Generic callbacks: +/* + * Generic callbacks: * do nothing but store/retrieve spr value */ static void spr_load_dump_spr(int sprn) @@ -57,7 +59,7 @@ static void spr_load_dump_spr(int sprn) #endif } -static void spr_read_generic (DisasContext *ctx, int gprn, int sprn) +static void spr_read_generic(DisasContext *ctx, int gprn, int sprn) { gen_load_spr(cpu_gpr[gprn], sprn); spr_load_dump_spr(sprn); @@ -229,13 +231,13 @@ static void spr_read_tbu(DisasContext *ctx, int gprn, int sprn) } } -__attribute__ (( unused )) +ATTRIBUTE_UNUSED static void spr_read_atbl(DisasContext *ctx, int gprn, int sprn) { gen_helper_load_atbl(cpu_gpr[gprn], cpu_env); } -__attribute__ (( unused )) +ATTRIBUTE_UNUSED static void spr_read_atbu(DisasContext *ctx, int gprn, int sprn) { gen_helper_load_atbu(cpu_gpr[gprn], cpu_env); @@ -266,20 +268,20 @@ static void spr_write_tbu(DisasContext *ctx, int sprn, int gprn) } } -__attribute__ (( unused )) +ATTRIBUTE_UNUSED static void spr_write_atbl(DisasContext *ctx, int sprn, int gprn) { gen_helper_store_atbl(cpu_env, cpu_gpr[gprn]); } -__attribute__ (( unused )) +ATTRIBUTE_UNUSED static void spr_write_atbu(DisasContext *ctx, int sprn, int gprn) { gen_helper_store_atbu(cpu_env, cpu_gpr[gprn]); } #if defined(TARGET_PPC64) -__attribute__ (( unused )) +ATTRIBUTE_UNUSED static void spr_read_purr(DisasContext *ctx, int gprn, int sprn) { gen_helper_load_purr(cpu_gpr[gprn], cpu_env); @@ -318,12 +320,16 @@ static void spr_write_hdecr(DisasContext *ctx, int sprn, int gprn) /* IBAT0L...IBAT7L */ static void spr_read_ibat(DisasContext *ctx, int gprn, int sprn) { - tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUPPCState, IBAT[sprn & 1][(sprn - SPR_IBAT0U) / 2])); + tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, + offsetof(CPUPPCState, + IBAT[sprn & 1][(sprn - SPR_IBAT0U) / 2])); } static void spr_read_ibat_h(DisasContext *ctx, int gprn, int sprn) { - tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUPPCState, IBAT[sprn & 1][((sprn - SPR_IBAT4U) / 2) + 4])); + tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, + offsetof(CPUPPCState, + IBAT[sprn & 1][((sprn - SPR_IBAT4U) / 2) + 4])); } static void spr_write_ibatu(DisasContext *ctx, int sprn, int gprn) @@ -358,12 +364,16 @@ static void spr_write_ibatl_h(DisasContext *ctx, int sprn, int gprn) /* DBAT0L...DBAT7L */ static void spr_read_dbat(DisasContext *ctx, int gprn, int sprn) { - tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUPPCState, DBAT[sprn & 1][(sprn - SPR_DBAT0U) / 2])); + tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, + offsetof(CPUPPCState, + DBAT[sprn & 1][(sprn - SPR_DBAT0U) / 2])); } static void spr_read_dbat_h(DisasContext *ctx, int gprn, int sprn) { - tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUPPCState, DBAT[sprn & 1][((sprn - SPR_DBAT4U) / 2) + 4])); + tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, + offsetof(CPUPPCState, + DBAT[sprn & 1][((sprn - SPR_DBAT4U) / 2) + 4])); } static void spr_write_dbatu(DisasContext *ctx, int sprn, int gprn) @@ -472,7 +482,9 @@ static void spr_write_hid0_601(DisasContext *ctx, int sprn, int gprn) #if !defined(CONFIG_USER_ONLY) static void spr_read_601_ubat(DisasContext *ctx, int gprn, int sprn) { - tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUPPCState, IBAT[sprn & 1][(sprn - SPR_IBAT0U) / 2])); + tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, + offsetof(CPUPPCState, + IBAT[sprn & 1][(sprn - SPR_IBAT0U) / 2])); } static void spr_write_601_ubatu(DisasContext *ctx, int sprn, int gprn) @@ -531,7 +543,8 @@ static void spr_write_booke_tsr(DisasContext *ctx, int sprn, int gprn) #if !defined(CONFIG_USER_ONLY) static void spr_read_403_pbr(DisasContext *ctx, int gprn, int sprn) { - tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUPPCState, pb[sprn - SPR_403_PBL1])); + tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, + offsetof(CPUPPCState, pb[sprn - SPR_403_PBL1])); } static void spr_write_403_pbr(DisasContext *ctx, int sprn, int gprn) @@ -660,14 +673,20 @@ static inline void vscr_init(CPUPPCState *env, uint32_t val) static inline void _spr_register(CPUPPCState *env, int num, const char *name, - void (*uea_read)(DisasContext *ctx, int gprn, int sprn), - void (*uea_write)(DisasContext *ctx, int sprn, int gprn), + void (*uea_read)(DisasContext *ctx, + int gprn, int sprn), + void (*uea_write)(DisasContext *ctx, + int sprn, int gprn), #if !defined(CONFIG_USER_ONLY) - void (*oea_read)(DisasContext *ctx, int gprn, int sprn), - void (*oea_write)(DisasContext *ctx, int sprn, int gprn), - void (*hea_read)(DisasContext *opaque, int gprn, int sprn), - void (*hea_write)(DisasContext *opaque, int sprn, int gprn), + void (*oea_read)(DisasContext *ctx, + int gprn, int sprn), + void (*oea_write)(DisasContext *ctx, + int sprn, int gprn), + void (*hea_read)(DisasContext *opaque, + int gprn, int sprn), + void (*hea_write)(DisasContext *opaque, + int sprn, int gprn), #endif #if defined(CONFIG_KVM) uint64_t one_reg_id, @@ -677,7 +696,7 @@ static inline void _spr_register(CPUPPCState *env, int num, ppc_spr_t *spr; spr = &env->spr_cb[num]; - if (spr->name != NULL ||env-> spr[num] != 0x00000000 || + if (spr->name != NULL || env->spr[num] != 0x00000000 || #if !defined(CONFIG_USER_ONLY) spr->oea_read != NULL || spr->oea_write != NULL || #endif @@ -773,8 +792,10 @@ static void gen_spr_sdr1(CPUPPCState *env) { #ifndef CONFIG_USER_ONLY if (env->has_hv_mode) { - /* SDR1 is a hypervisor resource on CPUs which have a - * hypervisor mode */ + /* + * SDR1 is a hypervisor resource on CPUs which have a + * hypervisor mode + */ spr_register_hv(env, SPR_SDR1, "SDR1", SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, @@ -1122,7 +1143,8 @@ static void spr_write_amr(DisasContext *ctx, int sprn, int gprn) TCGv t1 = tcg_temp_new(); TCGv t2 = tcg_temp_new(); - /* Note, the HV=1 PR=0 case is handled earlier by simply using + /* + * Note, the HV=1 PR=0 case is handled earlier by simply using * spr_write_generic for HV mode in the SPR table */ @@ -1156,7 +1178,8 @@ static void spr_write_uamor(DisasContext *ctx, int sprn, int gprn) TCGv t1 = tcg_temp_new(); TCGv t2 = tcg_temp_new(); - /* Note, the HV=1 case is handled earlier by simply using + /* + * Note, the HV=1 case is handled earlier by simply using * spr_write_generic for HV mode in the SPR table */ @@ -1186,7 +1209,8 @@ static void spr_write_iamr(DisasContext *ctx, int sprn, int gprn) TCGv t1 = tcg_temp_new(); TCGv t2 = tcg_temp_new(); - /* Note, the HV=1 case is handled earlier by simply using + /* + * Note, the HV=1 case is handled earlier by simply using * spr_write_generic for HV mode in the SPR table */ @@ -1214,10 +1238,13 @@ static void spr_write_iamr(DisasContext *ctx, int sprn, int gprn) static void gen_spr_amr(CPUPPCState *env) { #ifndef CONFIG_USER_ONLY - /* Virtual Page Class Key protection */ - /* The AMR is accessible either via SPR 13 or SPR 29. 13 is + /* + * Virtual Page Class Key protection + * + * The AMR is accessible either via SPR 13 or SPR 29. 13 is * userspace accessible, 29 is privileged. So we only need to set - * the kvm ONE_REG id on one of them, we use 29 */ + * the kvm ONE_REG id on one of them, we use 29 + */ spr_register(env, SPR_UAMR, "UAMR", &spr_read_generic, &spr_write_amr, &spr_read_generic, &spr_write_amr, @@ -1901,7 +1928,8 @@ static void gen_spr_BookE206(CPUPPCState *env, uint32_t mas_mask, /* TLB assist registers */ /* XXX : not implemented */ for (i = 0; i < 8; i++) { - void (*uea_write)(DisasContext *ctx, int sprn, int gprn) = &spr_write_generic32; + void (*uea_write)(DisasContext *ctx, int sprn, int gprn) = + &spr_write_generic32; if (i == 2 && (mas_mask & (1 << i)) && (env->insns_flags & PPC_64B)) { uea_write = &spr_write_generic; } @@ -2797,7 +2825,6 @@ static void gen_spr_8xx(CPUPPCState *env) 0x00000000); } -// XXX: TODO /* * AMR => SPR 29 (Power 2.04) * CTRL => SPR 136 (Power 2.04) @@ -3343,16 +3370,18 @@ static int check_pow_nocheck(CPUPPCState *env) static int check_pow_hid0(CPUPPCState *env) { - if (env->spr[SPR_HID0] & 0x00E00000) + if (env->spr[SPR_HID0] & 0x00E00000) { return 1; + } return 0; } static int check_pow_hid0_74xx(CPUPPCState *env) { - if (env->spr[SPR_HID0] & 0x00600000) + if (env->spr[SPR_HID0] & 0x00600000) { return 1; + } return 0; } @@ -4601,7 +4630,8 @@ POWERPC_FAMILY(e200)(ObjectClass *oc, void *data) dc->desc = "e200 core"; pcc->init_proc = init_proc_e200; pcc->check_pow = check_pow_hid0; - /* XXX: unimplemented instructions: + /* + * XXX: unimplemented instructions: * dcblc * dcbtlst * dcbtstls @@ -4796,18 +4826,18 @@ static void init_proc_e500(CPUPPCState *env, int version) * gen_spr_BookE(env, 0x0000000F0000FD7FULL); */ switch (version) { - case fsl_e500v1: - case fsl_e500v2: - default: - ivor_mask = 0x0000000F0000FFFFULL; - break; - case fsl_e500mc: - case fsl_e5500: - ivor_mask = 0x000003FE0000FFFFULL; - break; - case fsl_e6500: - ivor_mask = 0x000003FF0000FFFFULL; - break; + case fsl_e500v1: + case fsl_e500v2: + default: + ivor_mask = 0x0000000F0000FFFFULL; + break; + case fsl_e500mc: + case fsl_e5500: + ivor_mask = 0x000003FE0000FFFFULL; + break; + case fsl_e6500: + ivor_mask = 0x000003FF0000FFFFULL; + break; } gen_spr_BookE(env, ivor_mask); gen_spr_usprg3(env); @@ -4847,7 +4877,8 @@ static void init_proc_e500(CPUPPCState *env, int version) tlbncfg[1] = 0x40028040; break; default: - cpu_abort(CPU(cpu), "Unknown CPU: " TARGET_FMT_lx "\n", env->spr[SPR_PVR]); + cpu_abort(CPU(cpu), "Unknown CPU: " TARGET_FMT_lx "\n", + env->spr[SPR_PVR]); } #endif /* Cache sizes */ @@ -4871,7 +4902,8 @@ static void init_proc_e500(CPUPPCState *env, int version) l1cfg1 |= 0x0B83820; break; default: - cpu_abort(CPU(cpu), "Unknown CPU: " TARGET_FMT_lx "\n", env->spr[SPR_PVR]); + cpu_abort(CPU(cpu), "Unknown CPU: " TARGET_FMT_lx "\n", + env->spr[SPR_PVR]); } gen_spr_BookE206(env, 0x000000DF, tlbncfg, mmucfg); /* XXX : not implemented */ @@ -5251,7 +5283,8 @@ static void init_proc_601(CPUPPCState *env) 0x00000000); /* Memory management */ init_excp_601(env); - /* XXX: beware that dcache line size is 64 + /* + * XXX: beware that dcache line size is 64 * but dcbz uses 32 bytes "sectors" * XXX: this breaks clcs instruction ! */ @@ -5788,7 +5821,8 @@ static void init_proc_750(CPUPPCState *env) 0x00000000); /* Memory management */ gen_low_BATs(env); - /* XXX: high BATs are also present but are known to be bugged on + /* + * XXX: high BATs are also present but are known to be bugged on * die version 1.x */ init_excp_7x0(env); @@ -5970,7 +6004,8 @@ POWERPC_FAMILY(750cl)(ObjectClass *oc, void *data) dc->desc = "PowerPC 750 CL"; pcc->init_proc = init_proc_750cl; pcc->check_pow = check_pow_hid0; - /* XXX: not implemented: + /* + * XXX: not implemented: * cache lock instructions: * dcbz_l * floating point paired instructions @@ -7568,8 +7603,10 @@ static void gen_spr_book3s_altivec(CPUPPCState *env) &spr_read_generic, &spr_write_generic, KVM_REG_PPC_VRSAVE, 0x00000000); - /* Can't find information on what this should be on reset. This - * value is the one used by 74xx processors. */ + /* + * Can't find information on what this should be on reset. This + * value is the one used by 74xx processors. + */ vscr_init(env, 0x00010000); } @@ -8974,8 +9011,9 @@ static void init_ppc_proc(PowerPCCPU *cpu) env->irq_inputs = NULL; /* Set all exception vectors to an invalid address */ - for (i = 0; i < POWERPC_EXCP_NB; i++) + for (i = 0; i < POWERPC_EXCP_NB; i++) { env->excp_vectors[i] = (target_ulong)(-1ULL); + } env->ivor_mask = 0x00000000; env->ivpr_mask = 0x00000000; /* Default MMU definitions */ @@ -9107,8 +9145,9 @@ static void init_ppc_proc(PowerPCCPU *cpu) #if !defined(CONFIG_USER_ONLY) if (env->nb_tlb != 0) { int nb_tlb = env->nb_tlb; - if (env->id_tlbs != 0) + if (env->id_tlbs != 0) { nb_tlb *= 2; + } switch (env->tlb_type) { case TLB_6XX: env->tlb.tlb6 = g_new0(ppc6xx_tlb_t, nb_tlb); @@ -9200,8 +9239,9 @@ static void fill_new_table(opc_handler_t **table, int len) { int i; - for (i = 0; i < len; i++) + for (i = 0; i < len; i++) { table[i] = &invalid_handler; + } } static int create_new_table(opc_handler_t **table, unsigned char idx) @@ -9218,8 +9258,9 @@ static int create_new_table(opc_handler_t **table, unsigned char idx) static int insert_in_table(opc_handler_t **table, unsigned char idx, opc_handler_t *handler) { - if (table[idx] != &invalid_handler) + if (table[idx] != &invalid_handler) { return -1; + } table[idx] = handler; return 0; @@ -9340,17 +9381,20 @@ static int register_insn(opc_handler_t **ppc_opcodes, opcode_t *insn) } } else { if (register_dblind_insn(ppc_opcodes, insn->opc1, insn->opc2, - insn->opc3, &insn->handler) < 0) + insn->opc3, &insn->handler) < 0) { return -1; + } } } else { if (register_ind_insn(ppc_opcodes, insn->opc1, - insn->opc2, &insn->handler) < 0) + insn->opc2, &insn->handler) < 0) { return -1; + } } } else { - if (register_direct_insn(ppc_opcodes, insn->opc1, &insn->handler) < 0) + if (register_direct_insn(ppc_opcodes, insn->opc1, &insn->handler) < 0) { return -1; + } } return 0; @@ -9362,8 +9406,9 @@ static int test_opcode_table(opc_handler_t **table, int len) for (i = 0, count = 0; i < len; i++) { /* Consistency fixup */ - if (table[i] == NULL) + if (table[i] == NULL) { table[i] = &invalid_handler; + } if (table[i] != &invalid_handler) { if (is_indirect_opcode(table[i])) { tmp = test_opcode_table(ind_table(table[i]), @@ -9385,8 +9430,9 @@ static int test_opcode_table(opc_handler_t **table, int len) static void fix_opcode_tables(opc_handler_t **ppc_opcodes) { - if (test_opcode_table(ppc_opcodes, PPC_CPU_OPCODES_LEN) == 0) + if (test_opcode_table(ppc_opcodes, PPC_CPU_OPCODES_LEN) == 0) { printf("*** WARNING: no opcode defined !\n"); + } } /*****************************************************************************/ @@ -9725,14 +9771,15 @@ static int ppc_fixup_cpu(PowerPCCPU *cpu) { CPUPPCState *env = &cpu->env; - /* TCG doesn't (yet) emulate some groups of instructions that - * are implemented on some otherwise supported CPUs (e.g. VSX - * and decimal floating point instructions on POWER7). We - * remove unsupported instruction groups from the cpu state's - * instruction masks and hope the guest can cope. For at - * least the pseries machine, the unavailability of these - * instructions can be advertised to the guest via the device - * tree. */ + /* + * TCG doesn't (yet) emulate some groups of instructions that are + * implemented on some otherwise supported CPUs (e.g. VSX and + * decimal floating point instructions on POWER7). We remove + * unsupported instruction groups from the cpu state's instruction + * masks and hope the guest can cope. For at least the pseries + * machine, the unavailability of these instructions can be + * advertised to the guest via the device tree. + */ if ((env->insns_flags & ~PPC_TCG_INSNS) || (env->insns_flags2 & ~PPC_TCG_INSNS2)) { warn_report("Disabling some instructions which are not " @@ -9927,31 +9974,37 @@ static void ppc_cpu_realize(DeviceState *dev, Error **errp) " Bus model : %s\n", excp_model, bus_model); printf(" MSR features :\n"); - if (env->flags & POWERPC_FLAG_SPE) + if (env->flags & POWERPC_FLAG_SPE) { printf(" signal processing engine enable" "\n"); - else if (env->flags & POWERPC_FLAG_VRE) + } else if (env->flags & POWERPC_FLAG_VRE) { printf(" vector processor enable\n"); - if (env->flags & POWERPC_FLAG_TGPR) + } + if (env->flags & POWERPC_FLAG_TGPR) { printf(" temporary GPRs\n"); - else if (env->flags & POWERPC_FLAG_CE) + } else if (env->flags & POWERPC_FLAG_CE) { printf(" critical input enable\n"); - if (env->flags & POWERPC_FLAG_SE) + } + if (env->flags & POWERPC_FLAG_SE) { printf(" single-step trace mode\n"); - else if (env->flags & POWERPC_FLAG_DWE) + } else if (env->flags & POWERPC_FLAG_DWE) { printf(" debug wait enable\n"); - else if (env->flags & POWERPC_FLAG_UBLE) + } else if (env->flags & POWERPC_FLAG_UBLE) { printf(" user BTB lock enable\n"); - if (env->flags & POWERPC_FLAG_BE) + } + if (env->flags & POWERPC_FLAG_BE) { printf(" branch-step trace mode\n"); - else if (env->flags & POWERPC_FLAG_DE) + } else if (env->flags & POWERPC_FLAG_DE) { printf(" debug interrupt enable\n"); - if (env->flags & POWERPC_FLAG_PX) + } + if (env->flags & POWERPC_FLAG_PX) { printf(" inclusive protection\n"); - else if (env->flags & POWERPC_FLAG_PMM) + } else if (env->flags & POWERPC_FLAG_PMM) { printf(" performance monitor mark\n"); - if (env->flags == POWERPC_FLAG_NONE) + } + if (env->flags == POWERPC_FLAG_NONE) { printf(" none\n"); + } printf(" Time-base/decrementer clock source: %s\n", env->flags & POWERPC_FLAG_RTC_CLK ? "RTC clock" : "bus clock"); dump_ppc_insns(env); @@ -10093,8 +10146,9 @@ static ObjectClass *ppc_cpu_class_by_name(const char *name) const char *p; unsigned long pvr; - /* Lookup by PVR if cpu_model is valid 8 digit hex number - * (excl: 0x prefix if present) + /* + * Lookup by PVR if cpu_model is valid 8 digit hex number (excl: + * 0x prefix if present) */ if (!qemu_strtoul(name, &p, 16, &pvr)) { int len = p - name; @@ -10215,7 +10269,6 @@ static gint ppc_cpu_list_compare(gconstpointer a, gconstpointer b) static void ppc_cpu_list_entry(gpointer data, gpointer user_data) { ObjectClass *oc = data; - CPUListState *s = user_data; PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); DeviceClass *family = DEVICE_CLASS(ppc_cpu_get_family_class(pcc)); const char *typename = object_class_get_name(oc); @@ -10228,8 +10281,7 @@ static void ppc_cpu_list_entry(gpointer data, gpointer user_data) name = g_strndup(typename, strlen(typename) - strlen(POWERPC_CPU_TYPE_SUFFIX)); - (*s->cpu_fprintf)(s->file, "PowerPC %-16s PVR %08x\n", - name, pcc->pvr); + qemu_printf("PowerPC %-16s PVR %08x\n", name, pcc->pvr); for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) { PowerPCCPUAlias *alias = &ppc_cpu_aliases[i]; ObjectClass *alias_oc = ppc_cpu_class_by_name(alias->model); @@ -10242,33 +10294,28 @@ static void ppc_cpu_list_entry(gpointer data, gpointer user_data) * avoid printing the wrong alias here and use "preferred" instead */ if (strcmp(alias->alias, family->desc) == 0) { - (*s->cpu_fprintf)(s->file, - "PowerPC %-16s (alias for preferred %s CPU)\n", - alias->alias, family->desc); + qemu_printf("PowerPC %-16s (alias for preferred %s CPU)\n", + alias->alias, family->desc); } else { - (*s->cpu_fprintf)(s->file, "PowerPC %-16s (alias for %s)\n", - alias->alias, name); + qemu_printf("PowerPC %-16s (alias for %s)\n", + alias->alias, name); } } g_free(name); } -void ppc_cpu_list(FILE *f, fprintf_function cpu_fprintf) +void ppc_cpu_list(void) { - CPUListState s = { - .file = f, - .cpu_fprintf = cpu_fprintf, - }; GSList *list; list = object_class_get_list(TYPE_POWERPC_CPU, false); list = g_slist_sort(list, ppc_cpu_list_compare); - g_slist_foreach(list, ppc_cpu_list_entry, &s); + g_slist_foreach(list, ppc_cpu_list_entry, NULL); g_slist_free(list); #ifdef CONFIG_KVM - cpu_fprintf(f, "\n"); - cpu_fprintf(f, "PowerPC %-16s\n", "host"); + qemu_printf("\n"); + qemu_printf("PowerPC %-16s\n", "host"); #endif } @@ -10445,14 +10492,14 @@ static void ppc_cpu_instance_init(Object *obj) env->bfd_mach = pcc->bfd_mach; env->check_pow = pcc->check_pow; - /* Mark HV mode as supported if the CPU has an MSR_HV bit - * in the msr_mask. The mask can later be cleared by PAPR - * mode but the hv mode support will remain, thus enforcing - * that we cannot use priv. instructions in guest in PAPR - * mode. For 970 we currently simply don't set HV in msr_mask - * thus simulating an "Apple mode" 970. If we ever want to - * support 970 HV mode, we'll have to add a processor attribute - * of some sort. + /* + * Mark HV mode as supported if the CPU has an MSR_HV bit in the + * msr_mask. The mask can later be cleared by PAPR mode but the hv + * mode support will remain, thus enforcing that we cannot use + * priv. instructions in guest in PAPR mode. For 970 we currently + * simply don't set HV in msr_mask thus simulating an "Apple mode" + * 970. If we ever want to support 970 HV mode, we'll have to add + * a processor attribute of some sort. */ #if !defined(CONFIG_USER_ONLY) env->has_hv_mode = !!(env->msr_mask & MSR_HVB); @@ -10579,7 +10626,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data) cc->tcg_initialize = ppc_translate_init; #endif cc->disas_set_info = ppc_disas_set_info; - + dc->fw_name = "PowerPC,UNKNOWN"; } diff --git a/target/riscv/Makefile.objs b/target/riscv/Makefile.objs index 4072abe3e4..9c6c109327 100644 --- a/target/riscv/Makefile.objs +++ b/target/riscv/Makefile.objs @@ -1 +1,20 @@ obj-y += translate.o op_helper.o cpu_helper.o cpu.o csr.o fpu_helper.o gdbstub.o pmp.o + +DECODETREE = $(SRC_PATH)/scripts/decodetree.py + +decode32-y = $(SRC_PATH)/target/riscv/insn32.decode +decode32-$(TARGET_RISCV64) += $(SRC_PATH)/target/riscv/insn32-64.decode + +target/riscv/decode_insn32.inc.c: $(decode32-y) $(DECODETREE) + $(call quiet-command, \ + $(PYTHON) $(DECODETREE) -o $@ --decode decode_insn32 $(decode32-y), \ + "GEN", $(TARGET_DIR)$@) + +target/riscv/decode_insn16.inc.c: \ + $(SRC_PATH)/target/riscv/insn16.decode $(DECODETREE) + $(call quiet-command, \ + $(PYTHON) $(DECODETREE) -o $@ --decode decode_insn16 --insnwidth 16 $<, \ + "GEN", $(TARGET_DIR)$@) + +target/riscv/translate.o: target/riscv/decode_insn32.inc.c \ + target/riscv/decode_insn16.inc.c diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index cc3ddc0ae4..1bcf4eaeb8 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" +#include "qemu/qemu-print.h" #include "qemu/log.h" #include "cpu.h" #include "exec/exec-all.h" @@ -80,12 +81,6 @@ const char * const riscv_intr_names[] = { "reserved" }; -typedef struct RISCVCPUInfo { - const int bit_widths; - const char *name; - void (*initfn)(Object *obj); -} RISCVCPUInfo; - static void set_misa(CPURISCVState *env, target_ulong misa) { env->misa_mask = env->misa = misa; @@ -199,40 +194,39 @@ static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model) return oc; } -static void riscv_cpu_dump_state(CPUState *cs, FILE *f, - fprintf_function cpu_fprintf, int flags) +static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags) { RISCVCPU *cpu = RISCV_CPU(cs); CPURISCVState *env = &cpu->env; int i; - cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "pc ", env->pc); + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "pc ", env->pc); #ifndef CONFIG_USER_ONLY - cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mhartid ", env->mhartid); - cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mstatus ", env->mstatus); - cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mip ", - (target_ulong)atomic_read(&env->mip)); - cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mie ", env->mie); - cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mideleg ", env->mideleg); - cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "medeleg ", env->medeleg); - cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mtvec ", env->mtvec); - cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mepc ", env->mepc); - cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mcause ", env->mcause); + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mhartid ", env->mhartid); + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mstatus ", env->mstatus); + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mip ", + (target_ulong)atomic_read(&env->mip)); + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mie ", env->mie); + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mideleg ", env->mideleg); + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "medeleg ", env->medeleg); + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mtvec ", env->mtvec); + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mepc ", env->mepc); + qemu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mcause ", env->mcause); #endif for (i = 0; i < 32; i++) { - cpu_fprintf(f, " %s " TARGET_FMT_lx, - riscv_int_regnames[i], env->gpr[i]); + qemu_fprintf(f, " %s " TARGET_FMT_lx, + riscv_int_regnames[i], env->gpr[i]); if ((i & 3) == 3) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } } if (flags & CPU_DUMP_FPU) { for (i = 0; i < 32; i++) { - cpu_fprintf(f, " %s %016" PRIx64, - riscv_fpr_regnames[i], env->fpr[i]); + qemu_fprintf(f, " %s %016" PRIx64, + riscv_fpr_regnames[i], env->fpr[i]); if ((i & 3) == 3) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } } } @@ -311,6 +305,8 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) return; } + riscv_cpu_register_gdb_regs_for_features(cs); + qemu_init_vcpu(cs); cpu_reset(cs); @@ -351,7 +347,12 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) cc->synchronize_from_tb = riscv_cpu_synchronize_from_tb; cc->gdb_read_register = riscv_cpu_gdb_read_register; cc->gdb_write_register = riscv_cpu_gdb_write_register; - cc->gdb_num_core_regs = 65; + cc->gdb_num_core_regs = 33; +#if defined(TARGET_RISCV32) + cc->gdb_core_xml_file = "riscv-32bit-cpu.xml"; +#elif defined(TARGET_RISCV64) + cc->gdb_core_xml_file = "riscv-64bit-cpu.xml"; +#endif cc->gdb_stop_before_watchpoint = true; cc->disas_set_info = riscv_cpu_disas_set_info; #ifdef CONFIG_USER_ONLY @@ -382,11 +383,6 @@ char *riscv_isa_string(RISCVCPU *cpu) return isa_str; } -typedef struct RISCVCPUListState { - fprintf_function cpu_fprintf; - FILE *file; -} RISCVCPUListState; - static gint riscv_cpu_list_compare(gconstpointer a, gconstpointer b) { ObjectClass *class_a = (ObjectClass *)a; @@ -400,24 +396,19 @@ static gint riscv_cpu_list_compare(gconstpointer a, gconstpointer b) static void riscv_cpu_list_entry(gpointer data, gpointer user_data) { - RISCVCPUListState *s = user_data; const char *typename = object_class_get_name(OBJECT_CLASS(data)); int len = strlen(typename) - strlen(RISCV_CPU_TYPE_SUFFIX); - (*s->cpu_fprintf)(s->file, "%.*s\n", len, typename); + qemu_printf("%.*s\n", len, typename); } -void riscv_cpu_list(FILE *f, fprintf_function cpu_fprintf) +void riscv_cpu_list(void) { - RISCVCPUListState s = { - .cpu_fprintf = cpu_fprintf, - .file = f, - }; GSList *list; list = object_class_get_list(TYPE_RISCV_CPU, false); list = g_slist_sort(list, riscv_cpu_list_compare); - g_slist_foreach(list, riscv_cpu_list_entry, &s); + g_slist_foreach(list, riscv_cpu_list_entry, NULL); g_slist_free(list); } diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 5c2aebf132..7d9f48973f 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -123,6 +123,10 @@ struct CPURISCVState { uint32_t features; +#ifdef CONFIG_USER_ONLY + uint32_t elf_flags; +#endif + #ifndef CONFIG_USER_ONLY target_ulong priv; target_ulong resetvec; @@ -140,6 +144,7 @@ struct CPURISCVState { * mip is 32-bits to allow atomic_read on 32-bit hosts. */ uint32_t mip; + uint32_t miclaim; target_ulong mie; target_ulong mideleg; @@ -172,6 +177,9 @@ struct CPURISCVState { /* physical memory protection */ pmp_table_t pmp_state; + + /* True if in debugger mode. */ + bool debugger; #endif float_status fp_status; @@ -256,13 +264,14 @@ void riscv_cpu_do_unaligned_access(CPUState *cs, vaddr addr, int riscv_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); char *riscv_isa_string(RISCVCPU *cpu); -void riscv_cpu_list(FILE *f, fprintf_function cpu_fprintf); +void riscv_cpu_list(void); #define cpu_signal_handler riscv_cpu_signal_handler #define cpu_list riscv_cpu_list #define cpu_mmu_index riscv_cpu_mmu_index #ifndef CONFIG_USER_ONLY +int riscv_cpu_claim_interrupts(RISCVCPU *cpu, uint32_t interrupts); uint32_t riscv_cpu_update_mip(RISCVCPU *cpu, uint32_t mask, uint32_t value); #define BOOL_TO_MASK(x) (-!!(x)) /* helper for riscv_cpu_update_mip value */ #endif @@ -293,6 +302,8 @@ static inline void cpu_get_tb_cpu_state(CPURISCVState *env, target_ulong *pc, int riscv_csrrw(CPURISCVState *env, int csrno, target_ulong *ret_value, target_ulong new_value, target_ulong write_mask); +int riscv_csrrw_debug(CPURISCVState *env, int csrno, target_ulong *ret_value, + target_ulong new_value, target_ulong write_mask); static inline void riscv_csr_write(CPURISCVState *env, int csrno, target_ulong val) @@ -325,6 +336,8 @@ typedef struct { void riscv_get_csr_ops(int csrno, riscv_csr_operations *ops); void riscv_set_csr_ops(int csrno, riscv_csr_operations *ops); +void riscv_cpu_register_gdb_regs_for_features(CPUState *cs); + #include "exec/cpu-all.h" #endif /* RISCV_CPU_H */ diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h index 7afcb2468d..7180fccf54 100644 --- a/target/riscv/cpu_bits.h +++ b/target/riscv/cpu_bits.h @@ -135,16 +135,22 @@ /* Legacy Counter Setup (priv v1.9.1) */ #define CSR_MUCOUNTEREN 0x320 #define CSR_MSCOUNTEREN 0x321 +#define CSR_MHCOUNTEREN 0x322 /* Machine Trap Handling */ #define CSR_MSCRATCH 0x340 #define CSR_MEPC 0x341 #define CSR_MCAUSE 0x342 -#define CSR_MBADADDR 0x343 +#define CSR_MTVAL 0x343 #define CSR_MIP 0x344 +/* Legacy Machine Trap Handling (priv v1.9.1) */ +#define CSR_MBADADDR 0x343 + /* Supervisor Trap Setup */ #define CSR_SSTATUS 0x100 +#define CSR_SEDELEG 0x102 +#define CSR_SIDELEG 0x103 #define CSR_SIE 0x104 #define CSR_STVEC 0x105 #define CSR_SCOUNTEREN 0x106 @@ -153,9 +159,12 @@ #define CSR_SSCRATCH 0x140 #define CSR_SEPC 0x141 #define CSR_SCAUSE 0x142 -#define CSR_SBADADDR 0x143 +#define CSR_STVAL 0x143 #define CSR_SIP 0x144 +/* Legacy Supervisor Trap Handling (priv v1.9.1) */ +#define CSR_SBADADDR 0x143 + /* Supervisor Protection and Translation */ #define CSR_SPTBR 0x180 #define CSR_SATP 0x180 @@ -282,6 +291,28 @@ #define CSR_MHPMCOUNTER30H 0xb9e #define CSR_MHPMCOUNTER31H 0xb9f +/* Legacy Hypervisor Trap Setup (priv v1.9.1) */ +#define CSR_HSTATUS 0x200 +#define CSR_HEDELEG 0x202 +#define CSR_HIDELEG 0x203 +#define CSR_HIE 0x204 +#define CSR_HTVEC 0x205 + +/* Legacy Hypervisor Trap Handling (priv v1.9.1) */ +#define CSR_HSCRATCH 0x240 +#define CSR_HEPC 0x241 +#define CSR_HCAUSE 0x242 +#define CSR_HBADADDR 0x243 +#define CSR_HIP 0x244 + +/* Legacy Machine Protection and Translation (priv v1.9.1) */ +#define CSR_MBASE 0x380 +#define CSR_MBOUND 0x381 +#define CSR_MIBASE 0x382 +#define CSR_MIBOUND 0x383 +#define CSR_MDBASE 0x384 +#define CSR_MDBOUND 0x385 + /* mstatus CSR bits */ #define MSTATUS_UIE 0x00000001 #define MSTATUS_SIE 0x00000002 diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index f49e98ed59..b17f169681 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -22,8 +22,7 @@ #include "cpu.h" #include "exec/exec-all.h" #include "tcg-op.h" - -#define RISCV_DEBUG_INTERRUPT 0 +#include "trace.h" int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch) { @@ -72,6 +71,17 @@ bool riscv_cpu_exec_interrupt(CPUState *cs, int interrupt_request) #if !defined(CONFIG_USER_ONLY) +int riscv_cpu_claim_interrupts(RISCVCPU *cpu, uint32_t interrupts) +{ + CPURISCVState *env = &cpu->env; + if (env->miclaim & interrupts) { + return -1; + } else { + env->miclaim |= interrupts; + return 0; + } +} + /* iothread_mutex must be held */ uint32_t riscv_cpu_update_mip(RISCVCPU *cpu, uint32_t mask, uint32_t value) { @@ -84,9 +94,9 @@ uint32_t riscv_cpu_update_mip(RISCVCPU *cpu, uint32_t mask, uint32_t value) cmp = atomic_cmpxchg(&env->mip, old, new); } while (old != cmp); - if (new && !old) { + if (new) { cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HARD); - } else if (!new && old) { + } else { cpu_reset_interrupt(CPU(cpu), CPU_INTERRUPT_HARD); } @@ -443,121 +453,85 @@ void riscv_cpu_do_interrupt(CPUState *cs) RISCVCPU *cpu = RISCV_CPU(cs); CPURISCVState *env = &cpu->env; - if (RISCV_DEBUG_INTERRUPT) { - int log_cause = cs->exception_index & RISCV_EXCP_INT_MASK; - if (cs->exception_index & RISCV_EXCP_INT_FLAG) { - qemu_log_mask(LOG_TRACE, "core " - TARGET_FMT_ld ": trap %s, epc 0x" TARGET_FMT_lx "\n", - env->mhartid, riscv_intr_names[log_cause], env->pc); - } else { - qemu_log_mask(LOG_TRACE, "core " - TARGET_FMT_ld ": intr %s, epc 0x" TARGET_FMT_lx "\n", - env->mhartid, riscv_excp_names[log_cause], env->pc); + /* cs->exception is 32-bits wide unlike mcause which is XLEN-bits wide + * so we mask off the MSB and separate into trap type and cause. + */ + bool async = !!(cs->exception_index & RISCV_EXCP_INT_FLAG); + target_ulong cause = cs->exception_index & RISCV_EXCP_INT_MASK; + target_ulong deleg = async ? env->mideleg : env->medeleg; + target_ulong tval = 0; + + static const int ecall_cause_map[] = { + [PRV_U] = RISCV_EXCP_U_ECALL, + [PRV_S] = RISCV_EXCP_S_ECALL, + [PRV_H] = RISCV_EXCP_H_ECALL, + [PRV_M] = RISCV_EXCP_M_ECALL + }; + + if (!async) { + /* set tval to badaddr for traps with address information */ + switch (cause) { + case RISCV_EXCP_INST_ADDR_MIS: + case RISCV_EXCP_INST_ACCESS_FAULT: + case RISCV_EXCP_LOAD_ADDR_MIS: + case RISCV_EXCP_STORE_AMO_ADDR_MIS: + case RISCV_EXCP_LOAD_ACCESS_FAULT: + case RISCV_EXCP_STORE_AMO_ACCESS_FAULT: + case RISCV_EXCP_INST_PAGE_FAULT: + case RISCV_EXCP_LOAD_PAGE_FAULT: + case RISCV_EXCP_STORE_PAGE_FAULT: + tval = env->badaddr; + break; + default: + break; } - } - - target_ulong fixed_cause = 0; - if (cs->exception_index & (RISCV_EXCP_INT_FLAG)) { - /* hacky for now. the MSB (bit 63) indicates interrupt but cs->exception - index is only 32 bits wide */ - fixed_cause = cs->exception_index & RISCV_EXCP_INT_MASK; - fixed_cause |= ((target_ulong)1) << (TARGET_LONG_BITS - 1); - } else { - /* fixup User ECALL -> correct priv ECALL */ - if (cs->exception_index == RISCV_EXCP_U_ECALL) { - switch (env->priv) { - case PRV_U: - fixed_cause = RISCV_EXCP_U_ECALL; - break; - case PRV_S: - fixed_cause = RISCV_EXCP_S_ECALL; - break; - case PRV_H: - fixed_cause = RISCV_EXCP_H_ECALL; - break; - case PRV_M: - fixed_cause = RISCV_EXCP_M_ECALL; - break; - } - } else { - fixed_cause = cs->exception_index; + /* ecall is dispatched as one cause so translate based on mode */ + if (cause == RISCV_EXCP_U_ECALL) { + assert(env->priv <= 3); + cause = ecall_cause_map[env->priv]; } } - target_ulong backup_epc = env->pc; - - target_ulong bit = fixed_cause; - target_ulong deleg = env->medeleg; - - int hasbadaddr = - (fixed_cause == RISCV_EXCP_INST_ADDR_MIS) || - (fixed_cause == RISCV_EXCP_INST_ACCESS_FAULT) || - (fixed_cause == RISCV_EXCP_LOAD_ADDR_MIS) || - (fixed_cause == RISCV_EXCP_STORE_AMO_ADDR_MIS) || - (fixed_cause == RISCV_EXCP_LOAD_ACCESS_FAULT) || - (fixed_cause == RISCV_EXCP_STORE_AMO_ACCESS_FAULT) || - (fixed_cause == RISCV_EXCP_INST_PAGE_FAULT) || - (fixed_cause == RISCV_EXCP_LOAD_PAGE_FAULT) || - (fixed_cause == RISCV_EXCP_STORE_PAGE_FAULT); - - if (bit & ((target_ulong)1 << (TARGET_LONG_BITS - 1))) { - deleg = env->mideleg; - bit &= ~((target_ulong)1 << (TARGET_LONG_BITS - 1)); - } + trace_riscv_trap(env->mhartid, async, cause, env->pc, tval, cause < 16 ? + (async ? riscv_intr_names : riscv_excp_names)[cause] : "(unknown)"); - if (env->priv <= PRV_S && bit < 64 && ((deleg >> bit) & 1)) { + if (env->priv <= PRV_S && + cause < TARGET_LONG_BITS && ((deleg >> cause) & 1)) { /* handle the trap in S-mode */ - /* No need to check STVEC for misaligned - lower 2 bits cannot be set */ - env->pc = env->stvec; - env->scause = fixed_cause; - env->sepc = backup_epc; - - if (hasbadaddr) { - if (RISCV_DEBUG_INTERRUPT) { - qemu_log_mask(LOG_TRACE, "core " TARGET_FMT_ld ": badaddr 0x" - TARGET_FMT_lx "\n", env->mhartid, env->badaddr); - } - env->sbadaddr = env->badaddr; - } else { - /* otherwise we must clear sbadaddr/stval - * todo: support populating stval on illegal instructions */ - env->sbadaddr = 0; - } - target_ulong s = env->mstatus; s = set_field(s, MSTATUS_SPIE, env->priv_ver >= PRIV_VERSION_1_10_0 ? get_field(s, MSTATUS_SIE) : get_field(s, MSTATUS_UIE << env->priv)); s = set_field(s, MSTATUS_SPP, env->priv); s = set_field(s, MSTATUS_SIE, 0); env->mstatus = s; + env->scause = cause | ~(((target_ulong)-1) >> async); + env->sepc = env->pc; + env->sbadaddr = tval; + env->pc = (env->stvec >> 2 << 2) + + ((async && (env->stvec & 3) == 1) ? cause * 4 : 0); riscv_cpu_set_mode(env, PRV_S); } else { - /* No need to check MTVEC for misaligned - lower 2 bits cannot be set */ - env->pc = env->mtvec; - env->mepc = backup_epc; - env->mcause = fixed_cause; - - if (hasbadaddr) { - if (RISCV_DEBUG_INTERRUPT) { - qemu_log_mask(LOG_TRACE, "core " TARGET_FMT_ld ": badaddr 0x" - TARGET_FMT_lx "\n", env->mhartid, env->badaddr); - } - env->mbadaddr = env->badaddr; - } else { - /* otherwise we must clear mbadaddr/mtval - * todo: support populating mtval on illegal instructions */ - env->mbadaddr = 0; - } - + /* handle the trap in M-mode */ target_ulong s = env->mstatus; s = set_field(s, MSTATUS_MPIE, env->priv_ver >= PRIV_VERSION_1_10_0 ? get_field(s, MSTATUS_MIE) : get_field(s, MSTATUS_UIE << env->priv)); s = set_field(s, MSTATUS_MPP, env->priv); s = set_field(s, MSTATUS_MIE, 0); env->mstatus = s; + env->mcause = cause | ~(((target_ulong)-1) >> async); + env->mepc = env->pc; + env->mbadaddr = tval; + env->pc = (env->mtvec >> 2 << 2) + + ((async && (env->mtvec & 3) == 1) ? cause * 4 : 0); riscv_cpu_set_mode(env, PRV_M); } - /* TODO yield load reservation */ + + /* NOTE: it is not necessary to yield load reservations here. It is only + * necessary for an SC from "another hart" to cause a load reservation + * to be yielded. Refer to the memory consistency model section of the + * RISC-V ISA Specification. + */ + #endif cs->exception_index = EXCP_NONE; /* mark handled to qemu */ } diff --git a/target/riscv/cpu_user.h b/target/riscv/cpu_user.h index c2199610ab..52d380aa98 100644 --- a/target/riscv/cpu_user.h +++ b/target/riscv/cpu_user.h @@ -10,4 +10,5 @@ #define xA4 14 #define xA5 15 #define xA6 16 -#define xA7 17 /* syscall number goes here */ +#define xA7 17 /* syscall number for RVI ABI */ +#define xT0 5 /* syscall number for RVE ABI */ diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 960d2b0aa9..e1d91b6c60 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -46,7 +46,7 @@ void riscv_set_csr_ops(int csrno, riscv_csr_operations *ops) static int fs(CPURISCVState *env, int csrno) { #if !defined(CONFIG_USER_ONLY) - if (!(env->mstatus & MSTATUS_FS)) { + if (!env->debugger && !(env->mstatus & MSTATUS_FS)) { return -1; } #endif @@ -92,7 +92,7 @@ static int pmp(CPURISCVState *env, int csrno) static int read_fflags(CPURISCVState *env, int csrno, target_ulong *val) { #if !defined(CONFIG_USER_ONLY) - if (!(env->mstatus & MSTATUS_FS)) { + if (!env->debugger && !(env->mstatus & MSTATUS_FS)) { return -1; } #endif @@ -103,7 +103,7 @@ static int read_fflags(CPURISCVState *env, int csrno, target_ulong *val) static int write_fflags(CPURISCVState *env, int csrno, target_ulong val) { #if !defined(CONFIG_USER_ONLY) - if (!(env->mstatus & MSTATUS_FS)) { + if (!env->debugger && !(env->mstatus & MSTATUS_FS)) { return -1; } env->mstatus |= MSTATUS_FS; @@ -115,7 +115,7 @@ static int write_fflags(CPURISCVState *env, int csrno, target_ulong val) static int read_frm(CPURISCVState *env, int csrno, target_ulong *val) { #if !defined(CONFIG_USER_ONLY) - if (!(env->mstatus & MSTATUS_FS)) { + if (!env->debugger && !(env->mstatus & MSTATUS_FS)) { return -1; } #endif @@ -126,7 +126,7 @@ static int read_frm(CPURISCVState *env, int csrno, target_ulong *val) static int write_frm(CPURISCVState *env, int csrno, target_ulong val) { #if !defined(CONFIG_USER_ONLY) - if (!(env->mstatus & MSTATUS_FS)) { + if (!env->debugger && !(env->mstatus & MSTATUS_FS)) { return -1; } env->mstatus |= MSTATUS_FS; @@ -138,7 +138,7 @@ static int write_frm(CPURISCVState *env, int csrno, target_ulong val) static int read_fcsr(CPURISCVState *env, int csrno, target_ulong *val) { #if !defined(CONFIG_USER_ONLY) - if (!(env->mstatus & MSTATUS_FS)) { + if (!env->debugger && !(env->mstatus & MSTATUS_FS)) { return -1; } #endif @@ -150,7 +150,7 @@ static int read_fcsr(CPURISCVState *env, int csrno, target_ulong *val) static int write_fcsr(CPURISCVState *env, int csrno, target_ulong val) { #if !defined(CONFIG_USER_ONLY) - if (!(env->mstatus & MSTATUS_FS)) { + if (!env->debugger && !(env->mstatus & MSTATUS_FS)) { return -1; } env->mstatus |= MSTATUS_FS; @@ -435,10 +435,10 @@ static int read_mtvec(CPURISCVState *env, int csrno, target_ulong *val) static int write_mtvec(CPURISCVState *env, int csrno, target_ulong val) { /* bits [1:0] encode mode; 0 = direct, 1 = vectored, 2 >= reserved */ - if ((val & 3) == 0) { - env->mtvec = val >> 2 << 2; + if ((val & 3) < 2) { + env->mtvec = val; } else { - qemu_log_mask(LOG_UNIMP, "CSR_MTVEC: vectored traps not supported"); + qemu_log_mask(LOG_UNIMP, "CSR_MTVEC: reserved mode not supported\n"); } return 0; } @@ -550,16 +550,10 @@ static int rmw_mip(CPURISCVState *env, int csrno, target_ulong *ret_value, target_ulong new_value, target_ulong write_mask) { RISCVCPU *cpu = riscv_env_get_cpu(env); - target_ulong mask = write_mask & delegable_ints; + /* Allow software control of delegable interrupts not claimed by hardware */ + target_ulong mask = write_mask & delegable_ints & ~env->miclaim; uint32_t old_mip; - /* We can't allow the supervisor to control SEIP as this would allow the - * supervisor to clear a pending external interrupt which will result in - * lost a interrupt in the case a PLIC is attached. The SEIP bit must be - * hardware controlled when a PLIC is attached. This should be an option - * for CPUs with software-delegated Supervisor External Interrupts. */ - mask &= ~MIP_SEIP; - if (mask) { qemu_mutex_lock_iothread(); old_mip = riscv_cpu_update_mip(cpu, mask, (new_value & mask)); @@ -613,10 +607,10 @@ static int read_stvec(CPURISCVState *env, int csrno, target_ulong *val) static int write_stvec(CPURISCVState *env, int csrno, target_ulong val) { /* bits [1:0] encode mode; 0 = direct, 1 = vectored, 2 >= reserved */ - if ((val & 3) == 0) { - env->stvec = val >> 2 << 2; + if ((val & 3) < 2) { + env->stvec = val; } else { - qemu_log_mask(LOG_UNIMP, "CSR_STVEC: vectored traps not supported"); + qemu_log_mask(LOG_UNIMP, "CSR_STVEC: reserved mode not supported\n"); } return 0; } @@ -827,6 +821,24 @@ int riscv_csrrw(CPURISCVState *env, int csrno, target_ulong *ret_value, return 0; } +/* + * Debugger support. If not in user mode, set env->debugger before the + * riscv_csrrw call and clear it after the call. + */ +int riscv_csrrw_debug(CPURISCVState *env, int csrno, target_ulong *ret_value, + target_ulong new_value, target_ulong write_mask) +{ + int ret; +#if !defined(CONFIG_USER_ONLY) + env->debugger = true; +#endif + ret = riscv_csrrw(env, csrno, ret_value, new_value, write_mask); +#if !defined(CONFIG_USER_ONLY) + env->debugger = false; +#endif + return ret; +} + /* Control and Status Register function table */ static riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = { /* User Floating-Point CSRs */ diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index 3cabb21cd0..dfcdd834cf 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -21,6 +21,255 @@ #include "exec/gdbstub.h" #include "cpu.h" +/* + * The GDB CSR xml files list them in documentation order, not numerical order, + * and are missing entries for unnamed CSRs. So we need to map the gdb numbers + * to the hardware numbers. + */ + +static int csr_register_map[] = { + CSR_USTATUS, + CSR_UIE, + CSR_UTVEC, + CSR_USCRATCH, + CSR_UEPC, + CSR_UCAUSE, + CSR_UTVAL, + CSR_UIP, + CSR_FFLAGS, + CSR_FRM, + CSR_FCSR, + CSR_CYCLE, + CSR_TIME, + CSR_INSTRET, + CSR_HPMCOUNTER3, + CSR_HPMCOUNTER4, + CSR_HPMCOUNTER5, + CSR_HPMCOUNTER6, + CSR_HPMCOUNTER7, + CSR_HPMCOUNTER8, + CSR_HPMCOUNTER9, + CSR_HPMCOUNTER10, + CSR_HPMCOUNTER11, + CSR_HPMCOUNTER12, + CSR_HPMCOUNTER13, + CSR_HPMCOUNTER14, + CSR_HPMCOUNTER15, + CSR_HPMCOUNTER16, + CSR_HPMCOUNTER17, + CSR_HPMCOUNTER18, + CSR_HPMCOUNTER19, + CSR_HPMCOUNTER20, + CSR_HPMCOUNTER21, + CSR_HPMCOUNTER22, + CSR_HPMCOUNTER23, + CSR_HPMCOUNTER24, + CSR_HPMCOUNTER25, + CSR_HPMCOUNTER26, + CSR_HPMCOUNTER27, + CSR_HPMCOUNTER28, + CSR_HPMCOUNTER29, + CSR_HPMCOUNTER30, + CSR_HPMCOUNTER31, + CSR_CYCLEH, + CSR_TIMEH, + CSR_INSTRETH, + CSR_HPMCOUNTER3H, + CSR_HPMCOUNTER4H, + CSR_HPMCOUNTER5H, + CSR_HPMCOUNTER6H, + CSR_HPMCOUNTER7H, + CSR_HPMCOUNTER8H, + CSR_HPMCOUNTER9H, + CSR_HPMCOUNTER10H, + CSR_HPMCOUNTER11H, + CSR_HPMCOUNTER12H, + CSR_HPMCOUNTER13H, + CSR_HPMCOUNTER14H, + CSR_HPMCOUNTER15H, + CSR_HPMCOUNTER16H, + CSR_HPMCOUNTER17H, + CSR_HPMCOUNTER18H, + CSR_HPMCOUNTER19H, + CSR_HPMCOUNTER20H, + CSR_HPMCOUNTER21H, + CSR_HPMCOUNTER22H, + CSR_HPMCOUNTER23H, + CSR_HPMCOUNTER24H, + CSR_HPMCOUNTER25H, + CSR_HPMCOUNTER26H, + CSR_HPMCOUNTER27H, + CSR_HPMCOUNTER28H, + CSR_HPMCOUNTER29H, + CSR_HPMCOUNTER30H, + CSR_HPMCOUNTER31H, + CSR_SSTATUS, + CSR_SEDELEG, + CSR_SIDELEG, + CSR_SIE, + CSR_STVEC, + CSR_SCOUNTEREN, + CSR_SSCRATCH, + CSR_SEPC, + CSR_SCAUSE, + CSR_STVAL, + CSR_SIP, + CSR_SATP, + CSR_MVENDORID, + CSR_MARCHID, + CSR_MIMPID, + CSR_MHARTID, + CSR_MSTATUS, + CSR_MISA, + CSR_MEDELEG, + CSR_MIDELEG, + CSR_MIE, + CSR_MTVEC, + CSR_MCOUNTEREN, + CSR_MSCRATCH, + CSR_MEPC, + CSR_MCAUSE, + CSR_MTVAL, + CSR_MIP, + CSR_PMPCFG0, + CSR_PMPCFG1, + CSR_PMPCFG2, + CSR_PMPCFG3, + CSR_PMPADDR0, + CSR_PMPADDR1, + CSR_PMPADDR2, + CSR_PMPADDR3, + CSR_PMPADDR4, + CSR_PMPADDR5, + CSR_PMPADDR6, + CSR_PMPADDR7, + CSR_PMPADDR8, + CSR_PMPADDR9, + CSR_PMPADDR10, + CSR_PMPADDR11, + CSR_PMPADDR12, + CSR_PMPADDR13, + CSR_PMPADDR14, + CSR_PMPADDR15, + CSR_MCYCLE, + CSR_MINSTRET, + CSR_MHPMCOUNTER3, + CSR_MHPMCOUNTER4, + CSR_MHPMCOUNTER5, + CSR_MHPMCOUNTER6, + CSR_MHPMCOUNTER7, + CSR_MHPMCOUNTER8, + CSR_MHPMCOUNTER9, + CSR_MHPMCOUNTER10, + CSR_MHPMCOUNTER11, + CSR_MHPMCOUNTER12, + CSR_MHPMCOUNTER13, + CSR_MHPMCOUNTER14, + CSR_MHPMCOUNTER15, + CSR_MHPMCOUNTER16, + CSR_MHPMCOUNTER17, + CSR_MHPMCOUNTER18, + CSR_MHPMCOUNTER19, + CSR_MHPMCOUNTER20, + CSR_MHPMCOUNTER21, + CSR_MHPMCOUNTER22, + CSR_MHPMCOUNTER23, + CSR_MHPMCOUNTER24, + CSR_MHPMCOUNTER25, + CSR_MHPMCOUNTER26, + CSR_MHPMCOUNTER27, + CSR_MHPMCOUNTER28, + CSR_MHPMCOUNTER29, + CSR_MHPMCOUNTER30, + CSR_MHPMCOUNTER31, + CSR_MCYCLEH, + CSR_MINSTRETH, + CSR_MHPMCOUNTER3H, + CSR_MHPMCOUNTER4H, + CSR_MHPMCOUNTER5H, + CSR_MHPMCOUNTER6H, + CSR_MHPMCOUNTER7H, + CSR_MHPMCOUNTER8H, + CSR_MHPMCOUNTER9H, + CSR_MHPMCOUNTER10H, + CSR_MHPMCOUNTER11H, + CSR_MHPMCOUNTER12H, + CSR_MHPMCOUNTER13H, + CSR_MHPMCOUNTER14H, + CSR_MHPMCOUNTER15H, + CSR_MHPMCOUNTER16H, + CSR_MHPMCOUNTER17H, + CSR_MHPMCOUNTER18H, + CSR_MHPMCOUNTER19H, + CSR_MHPMCOUNTER20H, + CSR_MHPMCOUNTER21H, + CSR_MHPMCOUNTER22H, + CSR_MHPMCOUNTER23H, + CSR_MHPMCOUNTER24H, + CSR_MHPMCOUNTER25H, + CSR_MHPMCOUNTER26H, + CSR_MHPMCOUNTER27H, + CSR_MHPMCOUNTER28H, + CSR_MHPMCOUNTER29H, + CSR_MHPMCOUNTER30H, + CSR_MHPMCOUNTER31H, + CSR_MHPMEVENT3, + CSR_MHPMEVENT4, + CSR_MHPMEVENT5, + CSR_MHPMEVENT6, + CSR_MHPMEVENT7, + CSR_MHPMEVENT8, + CSR_MHPMEVENT9, + CSR_MHPMEVENT10, + CSR_MHPMEVENT11, + CSR_MHPMEVENT12, + CSR_MHPMEVENT13, + CSR_MHPMEVENT14, + CSR_MHPMEVENT15, + CSR_MHPMEVENT16, + CSR_MHPMEVENT17, + CSR_MHPMEVENT18, + CSR_MHPMEVENT19, + CSR_MHPMEVENT20, + CSR_MHPMEVENT21, + CSR_MHPMEVENT22, + CSR_MHPMEVENT23, + CSR_MHPMEVENT24, + CSR_MHPMEVENT25, + CSR_MHPMEVENT26, + CSR_MHPMEVENT27, + CSR_MHPMEVENT28, + CSR_MHPMEVENT29, + CSR_MHPMEVENT30, + CSR_MHPMEVENT31, + CSR_TSELECT, + CSR_TDATA1, + CSR_TDATA2, + CSR_TDATA3, + CSR_DCSR, + CSR_DPC, + CSR_DSCRATCH, + CSR_HSTATUS, + CSR_HEDELEG, + CSR_HIDELEG, + CSR_HIE, + CSR_HTVEC, + CSR_HSCRATCH, + CSR_HEPC, + CSR_HCAUSE, + CSR_HBADADDR, + CSR_HIP, + CSR_MBASE, + CSR_MBOUND, + CSR_MIBASE, + CSR_MIBOUND, + CSR_MDBASE, + CSR_MDBOUND, + CSR_MUCOUNTEREN, + CSR_MSCOUNTEREN, + CSR_MHCOUNTEREN, +}; + int riscv_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) { RISCVCPU *cpu = RISCV_CPU(cs); @@ -30,13 +279,6 @@ int riscv_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) return gdb_get_regl(mem_buf, env->gpr[n]); } else if (n == 32) { return gdb_get_regl(mem_buf, env->pc); - } else if (n < 65) { - return gdb_get_reg64(mem_buf, env->fpr[n - 33]); - } else if (n < 4096 + 65) { - target_ulong val = 0; - if (riscv_csrrw(env, n - 65, &val, 0, 0) == 0) { - return gdb_get_regl(mem_buf, val); - } } return 0; } @@ -55,14 +297,100 @@ int riscv_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) } else if (n == 32) { env->pc = ldtul_p(mem_buf); return sizeof(target_ulong); - } else if (n < 65) { - env->fpr[n - 33] = ldq_p(mem_buf); /* always 64-bit */ + } + return 0; +} + +static int riscv_gdb_get_fpu(CPURISCVState *env, uint8_t *mem_buf, int n) +{ + if (n < 32) { + return gdb_get_reg64(mem_buf, env->fpr[n]); + /* there is hole between ft11 and fflags in fpu.xml */ + } else if (n < 36 && n > 32) { + target_ulong val = 0; + int result; + /* + * CSR_FFLAGS is at index 8 in csr_register, and gdb says it is FP + * register 33, so we recalculate the map index. + * This also works for CSR_FRM and CSR_FCSR. + */ + result = riscv_csrrw_debug(env, n - 33 + 8, &val, 0, 0); + if (result == 0) { + return gdb_get_regl(mem_buf, val); + } + } + return 0; +} + +static int riscv_gdb_set_fpu(CPURISCVState *env, uint8_t *mem_buf, int n) +{ + if (n < 32) { + env->fpr[n] = ldq_p(mem_buf); /* always 64-bit */ return sizeof(uint64_t); - } else if (n < 4096 + 65) { + /* there is hole between ft11 and fflags in fpu.xml */ + } else if (n < 36 && n > 32) { target_ulong val = ldtul_p(mem_buf); - if (riscv_csrrw(env, n - 65, NULL, val, -1) == 0) { + int result; + /* + * CSR_FFLAGS is at index 8 in csr_register, and gdb says it is FP + * register 33, so we recalculate the map index. + * This also works for CSR_FRM and CSR_FCSR. + */ + result = riscv_csrrw_debug(env, n - 33 + 8, NULL, val, -1); + if (result == 0) { return sizeof(target_ulong); } } return 0; } + +static int riscv_gdb_get_csr(CPURISCVState *env, uint8_t *mem_buf, int n) +{ + if (n < ARRAY_SIZE(csr_register_map)) { + target_ulong val = 0; + int result; + + result = riscv_csrrw_debug(env, csr_register_map[n], &val, 0, 0); + if (result == 0) { + return gdb_get_regl(mem_buf, val); + } + } + return 0; +} + +static int riscv_gdb_set_csr(CPURISCVState *env, uint8_t *mem_buf, int n) +{ + if (n < ARRAY_SIZE(csr_register_map)) { + target_ulong val = ldtul_p(mem_buf); + int result; + + result = riscv_csrrw_debug(env, csr_register_map[n], NULL, val, -1); + if (result == 0) { + return sizeof(target_ulong); + } + } + return 0; +} + +void riscv_cpu_register_gdb_regs_for_features(CPUState *cs) +{ + RISCVCPU *cpu = RISCV_CPU(cs); + CPURISCVState *env = &cpu->env; +#if defined(TARGET_RISCV32) + if (env->misa & RVF) { + gdb_register_coprocessor(cs, riscv_gdb_get_fpu, riscv_gdb_set_fpu, + 36, "riscv-32bit-fpu.xml", 0); + } + + gdb_register_coprocessor(cs, riscv_gdb_get_csr, riscv_gdb_set_csr, + 4096, "riscv-32bit-csr.xml", 0); +#elif defined(TARGET_RISCV64) + if (env->misa & RVF) { + gdb_register_coprocessor(cs, riscv_gdb_get_fpu, riscv_gdb_set_fpu, + 36, "riscv-64bit-fpu.xml", 0); + } + + gdb_register_coprocessor(cs, riscv_gdb_get_csr, riscv_gdb_set_csr, + 4096, "riscv-64bit-csr.xml", 0); +#endif +} diff --git a/target/riscv/insn16.decode b/target/riscv/insn16.decode new file mode 100644 index 0000000000..17cc52cf2a --- /dev/null +++ b/target/riscv/insn16.decode @@ -0,0 +1,129 @@ +# +# RISC-V translation routines for the RVXI Base Integer Instruction Set. +# +# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de +# Bastian Koppelmann, kbastian@mail.uni-paderborn.de +# +# This program is free software; you can redistribute it and/or modify it +# under the terms and conditions of the GNU General Public License, +# version 2 or later, as published by the Free Software Foundation. +# +# This program is distributed in the hope it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program. If not, see <http://www.gnu.org/licenses/>. + +# Fields: +%rd 7:5 +%rs1_3 7:3 !function=ex_rvc_register +%rs2_3 2:3 !function=ex_rvc_register +%rs2_5 2:5 + +# Immediates: +%imm_ci 12:s1 2:5 +%nzuimm_ciw 7:4 11:2 5:1 6:1 !function=ex_shift_2 +%uimm_cl_d 5:2 10:3 !function=ex_shift_3 +%uimm_cl_w 5:1 10:3 6:1 !function=ex_shift_2 +%imm_cb 12:s1 5:2 2:1 10:2 3:2 !function=ex_shift_1 +%imm_cj 12:s1 8:1 9:2 6:1 7:1 2:1 11:1 3:3 !function=ex_shift_1 + +%nzuimm_6bit 12:1 2:5 +%uimm_6bit_ld 2:3 12:1 5:2 !function=ex_shift_3 +%uimm_6bit_lw 2:2 12:1 4:3 !function=ex_shift_2 +%uimm_6bit_sd 7:3 10:3 !function=ex_shift_3 +%uimm_6bit_sw 7:2 9:4 !function=ex_shift_2 + +%imm_addi16sp 12:s1 3:2 5:1 2:1 6:1 !function=ex_shift_4 +%imm_lui 12:s1 2:5 !function=ex_shift_12 + + + +# Argument sets: +&cl rs1 rd +&cl_dw uimm rs1 rd +&ci imm rd +&ciw nzuimm rd +&cs rs1 rs2 +&cs_dw uimm rs1 rs2 +&cb imm rs1 +&cr rd rs2 +&cj imm +&c_shift shamt rd + +&c_ld uimm rd +&c_sd uimm rs2 + +&caddi16sp_lui imm_lui imm_addi16sp rd +&cflwsp_ldsp uimm_flwsp uimm_ldsp rd +&cfswsp_sdsp uimm_fswsp uimm_sdsp rs2 + +# Formats 16: +@cr .... ..... ..... .. &cr rs2=%rs2_5 %rd +@ci ... . ..... ..... .. &ci imm=%imm_ci %rd +@ciw ... ........ ... .. &ciw nzuimm=%nzuimm_ciw rd=%rs2_3 +@cl_d ... ... ... .. ... .. &cl_dw uimm=%uimm_cl_d rs1=%rs1_3 rd=%rs2_3 +@cl_w ... ... ... .. ... .. &cl_dw uimm=%uimm_cl_w rs1=%rs1_3 rd=%rs2_3 +@cl ... ... ... .. ... .. &cl rs1=%rs1_3 rd=%rs2_3 +@cs ... ... ... .. ... .. &cs rs1=%rs1_3 rs2=%rs2_3 +@cs_2 ... ... ... .. ... .. &cr rd=%rs1_3 rs2=%rs2_3 +@cs_d ... ... ... .. ... .. &cs_dw uimm=%uimm_cl_d rs1=%rs1_3 rs2=%rs2_3 +@cs_w ... ... ... .. ... .. &cs_dw uimm=%uimm_cl_w rs1=%rs1_3 rs2=%rs2_3 +@cb ... ... ... .. ... .. &cb imm=%imm_cb rs1=%rs1_3 +@cj ... ........... .. &cj imm=%imm_cj + +@c_ld ... . ..... ..... .. &c_ld uimm=%uimm_6bit_ld %rd +@c_lw ... . ..... ..... .. &c_ld uimm=%uimm_6bit_lw %rd +@c_sd ... . ..... ..... .. &c_sd uimm=%uimm_6bit_sd rs2=%rs2_5 +@c_sw ... . ..... ..... .. &c_sd uimm=%uimm_6bit_sw rs2=%rs2_5 + +@c_addi16sp_lui ... . ..... ..... .. &caddi16sp_lui %imm_lui %imm_addi16sp %rd +@c_flwsp_ldsp ... . ..... ..... .. &cflwsp_ldsp uimm_flwsp=%uimm_6bit_lw \ + uimm_ldsp=%uimm_6bit_ld %rd +@c_fswsp_sdsp ... . ..... ..... .. &cfswsp_sdsp uimm_fswsp=%uimm_6bit_sw \ + uimm_sdsp=%uimm_6bit_sd rs2=%rs2_5 + +@c_shift ... . .. ... ..... .. &c_shift rd=%rs1_3 shamt=%nzuimm_6bit +@c_shift2 ... . .. ... ..... .. &c_shift rd=%rd shamt=%nzuimm_6bit + +@c_andi ... . .. ... ..... .. &ci imm=%imm_ci rd=%rs1_3 + +# *** RV64C Standard Extension (Quadrant 0) *** +c_addi4spn 000 ........ ... 00 @ciw +c_fld 001 ... ... .. ... 00 @cl_d +c_lw 010 ... ... .. ... 00 @cl_w +c_flw_ld 011 --- ... -- ... 00 @cl #Note: Must parse uimm manually +c_fsd 101 ... ... .. ... 00 @cs_d +c_sw 110 ... ... .. ... 00 @cs_w +c_fsw_sd 111 --- ... -- ... 00 @cs #Note: Must parse uimm manually + +# *** RV64C Standard Extension (Quadrant 1) *** +c_addi 000 . ..... ..... 01 @ci +c_jal_addiw 001 . ..... ..... 01 @ci #Note: parse rd and/or imm manually +c_li 010 . ..... ..... 01 @ci +c_addi16sp_lui 011 . ..... ..... 01 @c_addi16sp_lui # shares opc with C.LUI +c_srli 100 . 00 ... ..... 01 @c_shift +c_srai 100 . 01 ... ..... 01 @c_shift +c_andi 100 . 10 ... ..... 01 @c_andi +c_sub 100 0 11 ... 00 ... 01 @cs_2 +c_xor 100 0 11 ... 01 ... 01 @cs_2 +c_or 100 0 11 ... 10 ... 01 @cs_2 +c_and 100 0 11 ... 11 ... 01 @cs_2 +c_subw 100 1 11 ... 00 ... 01 @cs_2 +c_addw 100 1 11 ... 01 ... 01 @cs_2 +c_j 101 ........... 01 @cj +c_beqz 110 ... ... ..... 01 @cb +c_bnez 111 ... ... ..... 01 @cb + +# *** RV64C Standard Extension (Quadrant 2) *** +c_slli 000 . ..... ..... 10 @c_shift2 +c_fldsp 001 . ..... ..... 10 @c_ld +c_lwsp 010 . ..... ..... 10 @c_lw +c_flwsp_ldsp 011 . ..... ..... 10 @c_flwsp_ldsp #C.LDSP:RV64;C.FLWSP:RV32 +c_jr_mv 100 0 ..... ..... 10 @cr +c_ebreak_jalr_add 100 1 ..... ..... 10 @cr +c_fsdsp 101 ...... ..... 10 @c_sd +c_swsp 110 . ..... ..... 10 @c_sw +c_fswsp_sdsp 111 . ..... ..... 10 @c_fswsp_sdsp #C.SDSP:RV64;C.FSWSP:RV32 diff --git a/target/riscv/insn32-64.decode b/target/riscv/insn32-64.decode new file mode 100644 index 0000000000..380bf791bc --- /dev/null +++ b/target/riscv/insn32-64.decode @@ -0,0 +1,72 @@ +# +# RISC-V translation routines for the RV Instruction Set. +# +# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de +# Bastian Koppelmann, kbastian@mail.uni-paderborn.de +# +# This program is free software; you can redistribute it and/or modify it +# under the terms and conditions of the GNU General Public License, +# version 2 or later, as published by the Free Software Foundation. +# +# This program is distributed in the hope it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program. If not, see <http://www.gnu.org/licenses/>. + +# This is concatenated with insn32.decode for risc64 targets. +# Most of the fields and formats are there. + +%sh5 20:5 + +@sh5 ....... ..... ..... ... ..... ....... &shift shamt=%sh5 %rs1 %rd + +# *** RV64I Base Instruction Set (in addition to RV32I) *** +lwu ............ ..... 110 ..... 0000011 @i +ld ............ ..... 011 ..... 0000011 @i +sd ....... ..... ..... 011 ..... 0100011 @s +addiw ............ ..... 000 ..... 0011011 @i +slliw 0000000 ..... ..... 001 ..... 0011011 @sh5 +srliw 0000000 ..... ..... 101 ..... 0011011 @sh5 +sraiw 0100000 ..... ..... 101 ..... 0011011 @sh5 +addw 0000000 ..... ..... 000 ..... 0111011 @r +subw 0100000 ..... ..... 000 ..... 0111011 @r +sllw 0000000 ..... ..... 001 ..... 0111011 @r +srlw 0000000 ..... ..... 101 ..... 0111011 @r +sraw 0100000 ..... ..... 101 ..... 0111011 @r + +# *** RV64M Standard Extension (in addition to RV32M) *** +mulw 0000001 ..... ..... 000 ..... 0111011 @r +divw 0000001 ..... ..... 100 ..... 0111011 @r +divuw 0000001 ..... ..... 101 ..... 0111011 @r +remw 0000001 ..... ..... 110 ..... 0111011 @r +remuw 0000001 ..... ..... 111 ..... 0111011 @r + +# *** RV64A Standard Extension (in addition to RV32A) *** +lr_d 00010 . . 00000 ..... 011 ..... 0101111 @atom_ld +sc_d 00011 . . ..... ..... 011 ..... 0101111 @atom_st +amoswap_d 00001 . . ..... ..... 011 ..... 0101111 @atom_st +amoadd_d 00000 . . ..... ..... 011 ..... 0101111 @atom_st +amoxor_d 00100 . . ..... ..... 011 ..... 0101111 @atom_st +amoand_d 01100 . . ..... ..... 011 ..... 0101111 @atom_st +amoor_d 01000 . . ..... ..... 011 ..... 0101111 @atom_st +amomin_d 10000 . . ..... ..... 011 ..... 0101111 @atom_st +amomax_d 10100 . . ..... ..... 011 ..... 0101111 @atom_st +amominu_d 11000 . . ..... ..... 011 ..... 0101111 @atom_st +amomaxu_d 11100 . . ..... ..... 011 ..... 0101111 @atom_st + +# *** RV64F Standard Extension (in addition to RV32F) *** +fcvt_l_s 1100000 00010 ..... ... ..... 1010011 @r2_rm +fcvt_lu_s 1100000 00011 ..... ... ..... 1010011 @r2_rm +fcvt_s_l 1101000 00010 ..... ... ..... 1010011 @r2_rm +fcvt_s_lu 1101000 00011 ..... ... ..... 1010011 @r2_rm + +# *** RV64D Standard Extension (in addition to RV32D) *** +fcvt_l_d 1100001 00010 ..... ... ..... 1010011 @r2_rm +fcvt_lu_d 1100001 00011 ..... ... ..... 1010011 @r2_rm +fmv_x_d 1110001 00000 ..... 000 ..... 1010011 @r2 +fcvt_d_l 1101001 00010 ..... ... ..... 1010011 @r2_rm +fcvt_d_lu 1101001 00011 ..... ... ..... 1010011 @r2_rm +fmv_d_x 1111001 00000 ..... 000 ..... 1010011 @r2 diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode new file mode 100644 index 0000000000..6f3ab7aa52 --- /dev/null +++ b/target/riscv/insn32.decode @@ -0,0 +1,201 @@ +# +# RISC-V translation routines for the RVXI Base Integer Instruction Set. +# +# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de +# Bastian Koppelmann, kbastian@mail.uni-paderborn.de +# +# This program is free software; you can redistribute it and/or modify it +# under the terms and conditions of the GNU General Public License, +# version 2 or later, as published by the Free Software Foundation. +# +# This program is distributed in the hope it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program. If not, see <http://www.gnu.org/licenses/>. + +# Fields: +%rs3 27:5 +%rs2 20:5 +%rs1 15:5 +%rd 7:5 + +%sh10 20:10 +%csr 20:12 +%rm 12:3 + +# immediates: +%imm_i 20:s12 +%imm_s 25:s7 7:5 +%imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1 +%imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1 +%imm_u 12:s20 !function=ex_shift_12 + +# Argument sets: +&b imm rs2 rs1 +&i imm rs1 rd +&r rd rs1 rs2 +&shift shamt rs1 rd +&atomic aq rl rs2 rs1 rd + +# Formats 32: +@r ....... ..... ..... ... ..... ....... &r %rs2 %rs1 %rd +@i ............ ..... ... ..... ....... &i imm=%imm_i %rs1 %rd +@b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1 +@s ....... ..... ..... ... ..... ....... imm=%imm_s %rs2 %rs1 +@u .................... ..... ....... imm=%imm_u %rd +@j .................... ..... ....... imm=%imm_j %rd + +@sh ...... ...... ..... ... ..... ....... &shift shamt=%sh10 %rs1 %rd +@csr ............ ..... ... ..... ....... %csr %rs1 %rd + +@atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd +@atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd + +@r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd +@r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd +@r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd +@r2 ....... ..... ..... ... ..... ....... %rs1 %rd + +@sfence_vma ....... ..... ..... ... ..... ....... %rs2 %rs1 +@sfence_vm ....... ..... ..... ... ..... ....... %rs1 + + +# *** Privileged Instructions *** +ecall 000000000000 00000 000 00000 1110011 +ebreak 000000000001 00000 000 00000 1110011 +uret 0000000 00010 00000 000 00000 1110011 +sret 0001000 00010 00000 000 00000 1110011 +hret 0010000 00010 00000 000 00000 1110011 +mret 0011000 00010 00000 000 00000 1110011 +wfi 0001000 00101 00000 000 00000 1110011 +sfence_vma 0001001 ..... ..... 000 00000 1110011 @sfence_vma +sfence_vm 0001000 00100 ..... 000 00000 1110011 @sfence_vm + +# *** RV32I Base Instruction Set *** +lui .................... ..... 0110111 @u +auipc .................... ..... 0010111 @u +jal .................... ..... 1101111 @j +jalr ............ ..... 000 ..... 1100111 @i +beq ....... ..... ..... 000 ..... 1100011 @b +bne ....... ..... ..... 001 ..... 1100011 @b +blt ....... ..... ..... 100 ..... 1100011 @b +bge ....... ..... ..... 101 ..... 1100011 @b +bltu ....... ..... ..... 110 ..... 1100011 @b +bgeu ....... ..... ..... 111 ..... 1100011 @b +lb ............ ..... 000 ..... 0000011 @i +lh ............ ..... 001 ..... 0000011 @i +lw ............ ..... 010 ..... 0000011 @i +lbu ............ ..... 100 ..... 0000011 @i +lhu ............ ..... 101 ..... 0000011 @i +sb ....... ..... ..... 000 ..... 0100011 @s +sh ....... ..... ..... 001 ..... 0100011 @s +sw ....... ..... ..... 010 ..... 0100011 @s +addi ............ ..... 000 ..... 0010011 @i +slti ............ ..... 010 ..... 0010011 @i +sltiu ............ ..... 011 ..... 0010011 @i +xori ............ ..... 100 ..... 0010011 @i +ori ............ ..... 110 ..... 0010011 @i +andi ............ ..... 111 ..... 0010011 @i +slli 00.... ...... ..... 001 ..... 0010011 @sh +srli 00.... ...... ..... 101 ..... 0010011 @sh +srai 01.... ...... ..... 101 ..... 0010011 @sh +add 0000000 ..... ..... 000 ..... 0110011 @r +sub 0100000 ..... ..... 000 ..... 0110011 @r +sll 0000000 ..... ..... 001 ..... 0110011 @r +slt 0000000 ..... ..... 010 ..... 0110011 @r +sltu 0000000 ..... ..... 011 ..... 0110011 @r +xor 0000000 ..... ..... 100 ..... 0110011 @r +srl 0000000 ..... ..... 101 ..... 0110011 @r +sra 0100000 ..... ..... 101 ..... 0110011 @r +or 0000000 ..... ..... 110 ..... 0110011 @r +and 0000000 ..... ..... 111 ..... 0110011 @r +fence ---- pred:4 succ:4 ----- 000 ----- 0001111 +fence_i ---- ---- ---- ----- 001 ----- 0001111 +csrrw ............ ..... 001 ..... 1110011 @csr +csrrs ............ ..... 010 ..... 1110011 @csr +csrrc ............ ..... 011 ..... 1110011 @csr +csrrwi ............ ..... 101 ..... 1110011 @csr +csrrsi ............ ..... 110 ..... 1110011 @csr +csrrci ............ ..... 111 ..... 1110011 @csr + +# *** RV32M Standard Extension *** +mul 0000001 ..... ..... 000 ..... 0110011 @r +mulh 0000001 ..... ..... 001 ..... 0110011 @r +mulhsu 0000001 ..... ..... 010 ..... 0110011 @r +mulhu 0000001 ..... ..... 011 ..... 0110011 @r +div 0000001 ..... ..... 100 ..... 0110011 @r +divu 0000001 ..... ..... 101 ..... 0110011 @r +rem 0000001 ..... ..... 110 ..... 0110011 @r +remu 0000001 ..... ..... 111 ..... 0110011 @r + +# *** RV32A Standard Extension *** +lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld +sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st +amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st +amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st +amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st +amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st +amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st +amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st +amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st +amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st +amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st + +# *** RV32F Standard Extension *** +flw ............ ..... 010 ..... 0000111 @i +fsw ....... ..... ..... 010 ..... 0100111 @s +fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm +fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm +fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm +fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm +fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm +fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm +fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm +fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm +fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm +fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r +fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r +fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r +fmin_s 0010100 ..... ..... 000 ..... 1010011 @r +fmax_s 0010100 ..... ..... 001 ..... 1010011 @r +fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm +fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm +fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2 +feq_s 1010000 ..... ..... 010 ..... 1010011 @r +flt_s 1010000 ..... ..... 001 ..... 1010011 @r +fle_s 1010000 ..... ..... 000 ..... 1010011 @r +fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2 +fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm +fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm +fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2 + +# *** RV32D Standard Extension *** +fld ............ ..... 011 ..... 0000111 @i +fsd ....... ..... ..... 011 ..... 0100111 @s +fmadd_d ..... 01 ..... ..... ... ..... 1000011 @r4_rm +fmsub_d ..... 01 ..... ..... ... ..... 1000111 @r4_rm +fnmsub_d ..... 01 ..... ..... ... ..... 1001011 @r4_rm +fnmadd_d ..... 01 ..... ..... ... ..... 1001111 @r4_rm +fadd_d 0000001 ..... ..... ... ..... 1010011 @r_rm +fsub_d 0000101 ..... ..... ... ..... 1010011 @r_rm +fmul_d 0001001 ..... ..... ... ..... 1010011 @r_rm +fdiv_d 0001101 ..... ..... ... ..... 1010011 @r_rm +fsqrt_d 0101101 00000 ..... ... ..... 1010011 @r2_rm +fsgnj_d 0010001 ..... ..... 000 ..... 1010011 @r +fsgnjn_d 0010001 ..... ..... 001 ..... 1010011 @r +fsgnjx_d 0010001 ..... ..... 010 ..... 1010011 @r +fmin_d 0010101 ..... ..... 000 ..... 1010011 @r +fmax_d 0010101 ..... ..... 001 ..... 1010011 @r +fcvt_s_d 0100000 00001 ..... ... ..... 1010011 @r2_rm +fcvt_d_s 0100001 00000 ..... ... ..... 1010011 @r2_rm +feq_d 1010001 ..... ..... 010 ..... 1010011 @r +flt_d 1010001 ..... ..... 001 ..... 1010011 @r +fle_d 1010001 ..... ..... 000 ..... 1010011 @r +fclass_d 1110001 00000 ..... 001 ..... 1010011 @r2 +fcvt_w_d 1100001 00000 ..... ... ..... 1010011 @r2_rm +fcvt_wu_d 1100001 00001 ..... ... ..... 1010011 @r2_rm +fcvt_d_w 1101001 00000 ..... ... ..... 1010011 @r2_rm +fcvt_d_wu 1101001 00001 ..... ... ..... 1010011 @r2_rm diff --git a/target/riscv/insn_trans/trans_privileged.inc.c b/target/riscv/insn_trans/trans_privileged.inc.c new file mode 100644 index 0000000000..acb605923e --- /dev/null +++ b/target/riscv/insn_trans/trans_privileged.inc.c @@ -0,0 +1,110 @@ +/* + * RISC-V translation routines for the RISC-V privileged instructions. + * + * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu + * Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de + * Bastian Koppelmann, kbastian@mail.uni-paderborn.de + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +static bool trans_ecall(DisasContext *ctx, arg_ecall *a) +{ + /* always generates U-level ECALL, fixed in do_interrupt handler */ + generate_exception(ctx, RISCV_EXCP_U_ECALL); + tcg_gen_exit_tb(NULL, 0); /* no chaining */ + ctx->base.is_jmp = DISAS_NORETURN; + return true; +} + +static bool trans_ebreak(DisasContext *ctx, arg_ebreak *a) +{ + generate_exception(ctx, RISCV_EXCP_BREAKPOINT); + tcg_gen_exit_tb(NULL, 0); /* no chaining */ + ctx->base.is_jmp = DISAS_NORETURN; + return true; +} + +static bool trans_uret(DisasContext *ctx, arg_uret *a) +{ + return false; +} + +static bool trans_sret(DisasContext *ctx, arg_sret *a) +{ +#ifndef CONFIG_USER_ONLY + tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); + + if (has_ext(ctx, RVS)) { + gen_helper_sret(cpu_pc, cpu_env, cpu_pc); + tcg_gen_exit_tb(NULL, 0); /* no chaining */ + ctx->base.is_jmp = DISAS_NORETURN; + } else { + return false; + } + return true; +#else + return false; +#endif +} + +static bool trans_hret(DisasContext *ctx, arg_hret *a) +{ + return false; +} + +static bool trans_mret(DisasContext *ctx, arg_mret *a) +{ +#ifndef CONFIG_USER_ONLY + tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); + gen_helper_mret(cpu_pc, cpu_env, cpu_pc); + tcg_gen_exit_tb(NULL, 0); /* no chaining */ + ctx->base.is_jmp = DISAS_NORETURN; + return true; +#else + return false; +#endif +} + +static bool trans_wfi(DisasContext *ctx, arg_wfi *a) +{ +#ifndef CONFIG_USER_ONLY + tcg_gen_movi_tl(cpu_pc, ctx->pc_succ_insn); + gen_helper_wfi(cpu_env); + return true; +#else + return false; +#endif +} + +static bool trans_sfence_vma(DisasContext *ctx, arg_sfence_vma *a) +{ +#ifndef CONFIG_USER_ONLY + if (ctx->priv_ver == PRIV_VERSION_1_10_0) { + gen_helper_tlb_flush(cpu_env); + return true; + } +#endif + return false; +} + +static bool trans_sfence_vm(DisasContext *ctx, arg_sfence_vm *a) +{ +#ifndef CONFIG_USER_ONLY + if (ctx->priv_ver <= PRIV_VERSION_1_09_1) { + gen_helper_tlb_flush(cpu_env); + return true; + } +#endif + return false; +} diff --git a/target/riscv/insn_trans/trans_rva.inc.c b/target/riscv/insn_trans/trans_rva.inc.c new file mode 100644 index 0000000000..f6dbbc065e --- /dev/null +++ b/target/riscv/insn_trans/trans_rva.inc.c @@ -0,0 +1,218 @@ +/* + * RISC-V translation routines for the RV64A Standard Extension. + * + * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu + * Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de + * Bastian Koppelmann, kbastian@mail.uni-paderborn.de + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +static inline bool gen_lr(DisasContext *ctx, arg_atomic *a, TCGMemOp mop) +{ + TCGv src1 = tcg_temp_new(); + /* Put addr in load_res, data in load_val. */ + gen_get_gpr(src1, a->rs1); + if (a->rl) { + tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL); + } + tcg_gen_qemu_ld_tl(load_val, src1, ctx->mem_idx, mop); + if (a->aq) { + tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ); + } + tcg_gen_mov_tl(load_res, src1); + gen_set_gpr(a->rd, load_val); + + tcg_temp_free(src1); + return true; +} + +static inline bool gen_sc(DisasContext *ctx, arg_atomic *a, TCGMemOp mop) +{ + TCGv src1 = tcg_temp_new(); + TCGv src2 = tcg_temp_new(); + TCGv dat = tcg_temp_new(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); + + gen_get_gpr(src1, a->rs1); + tcg_gen_brcond_tl(TCG_COND_NE, load_res, src1, l1); + + gen_get_gpr(src2, a->rs2); + /* + * Note that the TCG atomic primitives are SC, + * so we can ignore AQ/RL along this path. + */ + tcg_gen_atomic_cmpxchg_tl(src1, load_res, load_val, src2, + ctx->mem_idx, mop); + tcg_gen_setcond_tl(TCG_COND_NE, dat, src1, load_val); + gen_set_gpr(a->rd, dat); + tcg_gen_br(l2); + + gen_set_label(l1); + /* + * Address comparion failure. However, we still need to + * provide the memory barrier implied by AQ/RL. + */ + tcg_gen_mb(TCG_MO_ALL + a->aq * TCG_BAR_LDAQ + a->rl * TCG_BAR_STRL); + tcg_gen_movi_tl(dat, 1); + gen_set_gpr(a->rd, dat); + + gen_set_label(l2); + tcg_temp_free(dat); + tcg_temp_free(src1); + tcg_temp_free(src2); + return true; +} + +static bool gen_amo(DisasContext *ctx, arg_atomic *a, + void(*func)(TCGv, TCGv, TCGv, TCGArg, TCGMemOp), + TCGMemOp mop) +{ + TCGv src1 = tcg_temp_new(); + TCGv src2 = tcg_temp_new(); + + gen_get_gpr(src1, a->rs1); + gen_get_gpr(src2, a->rs2); + + (*func)(src2, src1, src2, ctx->mem_idx, mop); + + gen_set_gpr(a->rd, src2); + tcg_temp_free(src1); + tcg_temp_free(src2); + return true; +} + +static bool trans_lr_w(DisasContext *ctx, arg_lr_w *a) +{ + REQUIRE_EXT(ctx, RVA); + return gen_lr(ctx, a, (MO_ALIGN | MO_TESL)); +} + +static bool trans_sc_w(DisasContext *ctx, arg_sc_w *a) +{ + REQUIRE_EXT(ctx, RVA); + return gen_sc(ctx, a, (MO_ALIGN | MO_TESL)); +} + +static bool trans_amoswap_w(DisasContext *ctx, arg_amoswap_w *a) +{ + REQUIRE_EXT(ctx, RVA); + return gen_amo(ctx, a, &tcg_gen_atomic_xchg_tl, (MO_ALIGN | MO_TESL)); +} + +static bool trans_amoadd_w(DisasContext *ctx, arg_amoadd_w *a) +{ + REQUIRE_EXT(ctx, RVA); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_add_tl, (MO_ALIGN | MO_TESL)); +} + +static bool trans_amoxor_w(DisasContext *ctx, arg_amoxor_w *a) +{ + REQUIRE_EXT(ctx, RVA); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_xor_tl, (MO_ALIGN | MO_TESL)); +} + +static bool trans_amoand_w(DisasContext *ctx, arg_amoand_w *a) +{ + REQUIRE_EXT(ctx, RVA); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_and_tl, (MO_ALIGN | MO_TESL)); +} + +static bool trans_amoor_w(DisasContext *ctx, arg_amoor_w *a) +{ + REQUIRE_EXT(ctx, RVA); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_or_tl, (MO_ALIGN | MO_TESL)); +} + +static bool trans_amomin_w(DisasContext *ctx, arg_amomin_w *a) +{ + REQUIRE_EXT(ctx, RVA); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smin_tl, (MO_ALIGN | MO_TESL)); +} + +static bool trans_amomax_w(DisasContext *ctx, arg_amomax_w *a) +{ + REQUIRE_EXT(ctx, RVA); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smax_tl, (MO_ALIGN | MO_TESL)); +} + +static bool trans_amominu_w(DisasContext *ctx, arg_amominu_w *a) +{ + REQUIRE_EXT(ctx, RVA); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umin_tl, (MO_ALIGN | MO_TESL)); +} + +static bool trans_amomaxu_w(DisasContext *ctx, arg_amomaxu_w *a) +{ + REQUIRE_EXT(ctx, RVA); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umax_tl, (MO_ALIGN | MO_TESL)); +} + +#ifdef TARGET_RISCV64 + +static bool trans_lr_d(DisasContext *ctx, arg_lr_d *a) +{ + return gen_lr(ctx, a, MO_ALIGN | MO_TEQ); +} + +static bool trans_sc_d(DisasContext *ctx, arg_sc_d *a) +{ + return gen_sc(ctx, a, (MO_ALIGN | MO_TEQ)); +} + +static bool trans_amoswap_d(DisasContext *ctx, arg_amoswap_d *a) +{ + return gen_amo(ctx, a, &tcg_gen_atomic_xchg_tl, (MO_ALIGN | MO_TEQ)); +} + +static bool trans_amoadd_d(DisasContext *ctx, arg_amoadd_d *a) +{ + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_add_tl, (MO_ALIGN | MO_TEQ)); +} + +static bool trans_amoxor_d(DisasContext *ctx, arg_amoxor_d *a) +{ + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_xor_tl, (MO_ALIGN | MO_TEQ)); +} + +static bool trans_amoand_d(DisasContext *ctx, arg_amoand_d *a) +{ + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_and_tl, (MO_ALIGN | MO_TEQ)); +} + +static bool trans_amoor_d(DisasContext *ctx, arg_amoor_d *a) +{ + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_or_tl, (MO_ALIGN | MO_TEQ)); +} + +static bool trans_amomin_d(DisasContext *ctx, arg_amomin_d *a) +{ + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smin_tl, (MO_ALIGN | MO_TEQ)); +} + +static bool trans_amomax_d(DisasContext *ctx, arg_amomax_d *a) +{ + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smax_tl, (MO_ALIGN | MO_TEQ)); +} + +static bool trans_amominu_d(DisasContext *ctx, arg_amominu_d *a) +{ + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umin_tl, (MO_ALIGN | MO_TEQ)); +} + +static bool trans_amomaxu_d(DisasContext *ctx, arg_amomaxu_d *a) +{ + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umax_tl, (MO_ALIGN | MO_TEQ)); +} +#endif diff --git a/target/riscv/insn_trans/trans_rvc.inc.c b/target/riscv/insn_trans/trans_rvc.inc.c new file mode 100644 index 0000000000..ebcd977b2f --- /dev/null +++ b/target/riscv/insn_trans/trans_rvc.inc.c @@ -0,0 +1,347 @@ +/* + * RISC-V translation routines for the RVC Compressed Instruction Set. + * + * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu + * Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de + * Bastian Koppelmann, kbastian@mail.uni-paderborn.de + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +static bool trans_c_addi4spn(DisasContext *ctx, arg_c_addi4spn *a) +{ + if (a->nzuimm == 0) { + /* Reserved in ISA */ + return false; + } + arg_addi arg = { .rd = a->rd, .rs1 = 2, .imm = a->nzuimm }; + return trans_addi(ctx, &arg); +} + +static bool trans_c_fld(DisasContext *ctx, arg_c_fld *a) +{ + arg_fld arg = { .rd = a->rd, .rs1 = a->rs1, .imm = a->uimm }; + return trans_fld(ctx, &arg); +} + +static bool trans_c_lw(DisasContext *ctx, arg_c_lw *a) +{ + arg_lw arg = { .rd = a->rd, .rs1 = a->rs1, .imm = a->uimm }; + return trans_lw(ctx, &arg); +} + +static bool trans_c_flw_ld(DisasContext *ctx, arg_c_flw_ld *a) +{ +#ifdef TARGET_RISCV32 + /* C.FLW ( RV32FC-only ) */ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + arg_c_lw tmp; + decode_insn16_extract_cl_w(&tmp, ctx->opcode); + arg_flw arg = { .rd = tmp.rd, .rs1 = tmp.rs1, .imm = tmp.uimm }; + return trans_flw(ctx, &arg); +#else + /* C.LD ( RV64C/RV128C-only ) */ + arg_c_fld tmp; + decode_insn16_extract_cl_d(&tmp, ctx->opcode); + arg_ld arg = { .rd = tmp.rd, .rs1 = tmp.rs1, .imm = tmp.uimm }; + return trans_ld(ctx, &arg); +#endif +} + +static bool trans_c_fsd(DisasContext *ctx, arg_c_fsd *a) +{ + arg_fsd arg = { .rs1 = a->rs1, .rs2 = a->rs2, .imm = a->uimm }; + return trans_fsd(ctx, &arg); +} + +static bool trans_c_sw(DisasContext *ctx, arg_c_sw *a) +{ + arg_sw arg = { .rs1 = a->rs1, .rs2 = a->rs2, .imm = a->uimm }; + return trans_sw(ctx, &arg); +} + +static bool trans_c_fsw_sd(DisasContext *ctx, arg_c_fsw_sd *a) +{ +#ifdef TARGET_RISCV32 + /* C.FSW ( RV32FC-only ) */ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + arg_c_sw tmp; + decode_insn16_extract_cs_w(&tmp, ctx->opcode); + arg_fsw arg = { .rs1 = tmp.rs1, .rs2 = tmp.rs2, .imm = tmp.uimm }; + return trans_fsw(ctx, &arg); +#else + /* C.SD ( RV64C/RV128C-only ) */ + arg_c_fsd tmp; + decode_insn16_extract_cs_d(&tmp, ctx->opcode); + arg_sd arg = { .rs1 = tmp.rs1, .rs2 = tmp.rs2, .imm = tmp.uimm }; + return trans_sd(ctx, &arg); +#endif +} + +static bool trans_c_addi(DisasContext *ctx, arg_c_addi *a) +{ + if (a->imm == 0) { + /* Hint: insn is valid but does not affect state */ + return true; + } + arg_addi arg = { .rd = a->rd, .rs1 = a->rd, .imm = a->imm }; + return trans_addi(ctx, &arg); +} + +static bool trans_c_jal_addiw(DisasContext *ctx, arg_c_jal_addiw *a) +{ +#ifdef TARGET_RISCV32 + /* C.JAL */ + arg_c_j tmp; + decode_insn16_extract_cj(&tmp, ctx->opcode); + arg_jal arg = { .rd = 1, .imm = tmp.imm }; + return trans_jal(ctx, &arg); +#else + /* C.ADDIW */ + arg_addiw arg = { .rd = a->rd, .rs1 = a->rd, .imm = a->imm }; + return trans_addiw(ctx, &arg); +#endif +} + +static bool trans_c_li(DisasContext *ctx, arg_c_li *a) +{ + if (a->rd == 0) { + /* Hint: insn is valid but does not affect state */ + return true; + } + arg_addi arg = { .rd = a->rd, .rs1 = 0, .imm = a->imm }; + return trans_addi(ctx, &arg); +} + +static bool trans_c_addi16sp_lui(DisasContext *ctx, arg_c_addi16sp_lui *a) +{ + if (a->rd == 2) { + /* C.ADDI16SP */ + arg_addi arg = { .rd = 2, .rs1 = 2, .imm = a->imm_addi16sp }; + return trans_addi(ctx, &arg); + } else if (a->imm_lui != 0) { + /* C.LUI */ + if (a->rd == 0) { + /* Hint: insn is valid but does not affect state */ + return true; + } + arg_lui arg = { .rd = a->rd, .imm = a->imm_lui }; + return trans_lui(ctx, &arg); + } + return false; +} + +static bool trans_c_srli(DisasContext *ctx, arg_c_srli *a) +{ + int shamt = a->shamt; + if (shamt == 0) { + /* For RV128 a shamt of 0 means a shift by 64 */ + shamt = 64; + } + /* Ensure, that shamt[5] is zero for RV32 */ + if (shamt >= TARGET_LONG_BITS) { + return false; + } + + arg_srli arg = { .rd = a->rd, .rs1 = a->rd, .shamt = a->shamt }; + return trans_srli(ctx, &arg); +} + +static bool trans_c_srai(DisasContext *ctx, arg_c_srai *a) +{ + int shamt = a->shamt; + if (shamt == 0) { + /* For RV128 a shamt of 0 means a shift by 64 */ + shamt = 64; + } + /* Ensure, that shamt[5] is zero for RV32 */ + if (shamt >= TARGET_LONG_BITS) { + return false; + } + + arg_srai arg = { .rd = a->rd, .rs1 = a->rd, .shamt = a->shamt }; + return trans_srai(ctx, &arg); +} + +static bool trans_c_andi(DisasContext *ctx, arg_c_andi *a) +{ + arg_andi arg = { .rd = a->rd, .rs1 = a->rd, .imm = a->imm }; + return trans_andi(ctx, &arg); +} + +static bool trans_c_sub(DisasContext *ctx, arg_c_sub *a) +{ + arg_sub arg = { .rd = a->rd, .rs1 = a->rd, .rs2 = a->rs2 }; + return trans_sub(ctx, &arg); +} + +static bool trans_c_xor(DisasContext *ctx, arg_c_xor *a) +{ + arg_xor arg = { .rd = a->rd, .rs1 = a->rd, .rs2 = a->rs2 }; + return trans_xor(ctx, &arg); +} + +static bool trans_c_or(DisasContext *ctx, arg_c_or *a) +{ + arg_or arg = { .rd = a->rd, .rs1 = a->rd, .rs2 = a->rs2 }; + return trans_or(ctx, &arg); +} + +static bool trans_c_and(DisasContext *ctx, arg_c_and *a) +{ + arg_and arg = { .rd = a->rd, .rs1 = a->rd, .rs2 = a->rs2 }; + return trans_and(ctx, &arg); +} + +static bool trans_c_subw(DisasContext *ctx, arg_c_subw *a) +{ +#ifdef TARGET_RISCV64 + arg_subw arg = { .rd = a->rd, .rs1 = a->rd, .rs2 = a->rs2 }; + return trans_subw(ctx, &arg); +#else + return false; +#endif +} + +static bool trans_c_addw(DisasContext *ctx, arg_c_addw *a) +{ +#ifdef TARGET_RISCV64 + arg_addw arg = { .rd = a->rd, .rs1 = a->rd, .rs2 = a->rs2 }; + return trans_addw(ctx, &arg); +#else + return false; +#endif +} + +static bool trans_c_j(DisasContext *ctx, arg_c_j *a) +{ + arg_jal arg = { .rd = 0, .imm = a->imm }; + return trans_jal(ctx, &arg); +} + +static bool trans_c_beqz(DisasContext *ctx, arg_c_beqz *a) +{ + arg_beq arg = { .rs1 = a->rs1, .rs2 = 0, .imm = a->imm }; + return trans_beq(ctx, &arg); +} + +static bool trans_c_bnez(DisasContext *ctx, arg_c_bnez *a) +{ + arg_bne arg = { .rs1 = a->rs1, .rs2 = 0, .imm = a->imm }; + return trans_bne(ctx, &arg); +} + +static bool trans_c_slli(DisasContext *ctx, arg_c_slli *a) +{ + int shamt = a->shamt; + if (shamt == 0) { + /* For RV128 a shamt of 0 means a shift by 64 */ + shamt = 64; + } + /* Ensure, that shamt[5] is zero for RV32 */ + if (shamt >= TARGET_LONG_BITS) { + return false; + } + + arg_slli arg = { .rd = a->rd, .rs1 = a->rd, .shamt = a->shamt }; + return trans_slli(ctx, &arg); +} + +static bool trans_c_fldsp(DisasContext *ctx, arg_c_fldsp *a) +{ + arg_fld arg = { .rd = a->rd, .rs1 = 2, .imm = a->uimm }; + return trans_fld(ctx, &arg); +} + +static bool trans_c_lwsp(DisasContext *ctx, arg_c_lwsp *a) +{ + arg_lw arg = { .rd = a->rd, .rs1 = 2, .imm = a->uimm }; + return trans_lw(ctx, &arg); +} + +static bool trans_c_flwsp_ldsp(DisasContext *ctx, arg_c_flwsp_ldsp *a) +{ +#ifdef TARGET_RISCV32 + /* C.FLWSP */ + arg_flw arg_flw = { .rd = a->rd, .rs1 = 2, .imm = a->uimm_flwsp }; + return trans_flw(ctx, &arg_flw); +#else + /* C.LDSP */ + arg_ld arg_ld = { .rd = a->rd, .rs1 = 2, .imm = a->uimm_ldsp }; + return trans_ld(ctx, &arg_ld); +#endif + return false; +} + +static bool trans_c_jr_mv(DisasContext *ctx, arg_c_jr_mv *a) +{ + if (a->rd != 0 && a->rs2 == 0) { + /* C.JR */ + arg_jalr arg = { .rd = 0, .rs1 = a->rd, .imm = 0 }; + return trans_jalr(ctx, &arg); + } else if (a->rd != 0 && a->rs2 != 0) { + /* C.MV */ + arg_add arg = { .rd = a->rd, .rs1 = 0, .rs2 = a->rs2 }; + return trans_add(ctx, &arg); + } + return false; +} + +static bool trans_c_ebreak_jalr_add(DisasContext *ctx, arg_c_ebreak_jalr_add *a) +{ + if (a->rd == 0 && a->rs2 == 0) { + /* C.EBREAK */ + arg_ebreak arg = { }; + return trans_ebreak(ctx, &arg); + } else if (a->rd != 0) { + if (a->rs2 == 0) { + /* C.JALR */ + arg_jalr arg = { .rd = 1, .rs1 = a->rd, .imm = 0 }; + return trans_jalr(ctx, &arg); + } else { + /* C.ADD */ + arg_add arg = { .rd = a->rd, .rs1 = a->rd, .rs2 = a->rs2 }; + return trans_add(ctx, &arg); + } + } + return false; +} + +static bool trans_c_fsdsp(DisasContext *ctx, arg_c_fsdsp *a) +{ + arg_fsd arg = { .rs1 = 2, .rs2 = a->rs2, .imm = a->uimm }; + return trans_fsd(ctx, &arg); +} + +static bool trans_c_swsp(DisasContext *ctx, arg_c_swsp *a) +{ + arg_sw arg = { .rs1 = 2, .rs2 = a->rs2, .imm = a->uimm }; + return trans_sw(ctx, &arg); +} + +static bool trans_c_fswsp_sdsp(DisasContext *ctx, arg_c_fswsp_sdsp *a) +{ +#ifdef TARGET_RISCV32 + /* C.FSWSP */ + arg_fsw a_fsw = { .rs1 = 2, .rs2 = a->rs2, .imm = a->uimm_fswsp }; + return trans_fsw(ctx, &a_fsw); +#else + /* C.SDSP */ + arg_sd a_sd = { .rs1 = 2, .rs2 = a->rs2, .imm = a->uimm_sdsp }; + return trans_sd(ctx, &a_sd); +#endif +} diff --git a/target/riscv/insn_trans/trans_rvd.inc.c b/target/riscv/insn_trans/trans_rvd.inc.c new file mode 100644 index 0000000000..393fa0248c --- /dev/null +++ b/target/riscv/insn_trans/trans_rvd.inc.c @@ -0,0 +1,442 @@ +/* + * RISC-V translation routines for the RV64D Standard Extension. + * + * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu + * Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de + * Bastian Koppelmann, kbastian@mail.uni-paderborn.de + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +static bool trans_fld(DisasContext *ctx, arg_fld *a) +{ + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + tcg_gen_addi_tl(t0, t0, a->imm); + + tcg_gen_qemu_ld_i64(cpu_fpr[a->rd], t0, ctx->mem_idx, MO_TEQ); + + mark_fs_dirty(ctx); + tcg_temp_free(t0); + return true; +} + +static bool trans_fsd(DisasContext *ctx, arg_fsd *a) +{ + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + tcg_gen_addi_tl(t0, t0, a->imm); + + tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], t0, ctx->mem_idx, MO_TEQ); + + mark_fs_dirty(ctx); + tcg_temp_free(t0); + return true; +} + +static bool trans_fmadd_d(DisasContext *ctx, arg_fmadd_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + gen_set_rm(ctx, a->rm); + gen_helper_fmadd_d(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1], + cpu_fpr[a->rs2], cpu_fpr[a->rs3]); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fmsub_d(DisasContext *ctx, arg_fmsub_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + gen_set_rm(ctx, a->rm); + gen_helper_fmsub_d(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1], + cpu_fpr[a->rs2], cpu_fpr[a->rs3]); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fnmsub_d(DisasContext *ctx, arg_fnmsub_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + gen_set_rm(ctx, a->rm); + gen_helper_fnmsub_d(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1], + cpu_fpr[a->rs2], cpu_fpr[a->rs3]); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fnmadd_d(DisasContext *ctx, arg_fnmadd_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + gen_set_rm(ctx, a->rm); + gen_helper_fnmadd_d(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1], + cpu_fpr[a->rs2], cpu_fpr[a->rs3]); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fadd_d(DisasContext *ctx, arg_fadd_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + gen_set_rm(ctx, a->rm); + gen_helper_fadd_d(cpu_fpr[a->rd], cpu_env, + cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fsub_d(DisasContext *ctx, arg_fsub_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + gen_set_rm(ctx, a->rm); + gen_helper_fsub_d(cpu_fpr[a->rd], cpu_env, + cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fmul_d(DisasContext *ctx, arg_fmul_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + gen_set_rm(ctx, a->rm); + gen_helper_fmul_d(cpu_fpr[a->rd], cpu_env, + cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fdiv_d(DisasContext *ctx, arg_fdiv_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + gen_set_rm(ctx, a->rm); + gen_helper_fdiv_d(cpu_fpr[a->rd], cpu_env, + cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fsqrt_d(DisasContext *ctx, arg_fsqrt_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + gen_set_rm(ctx, a->rm); + gen_helper_fsqrt_d(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1]); + + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fsgnj_d(DisasContext *ctx, arg_fsgnj_d *a) +{ + if (a->rs1 == a->rs2) { /* FMOV */ + tcg_gen_mov_i64(cpu_fpr[a->rd], cpu_fpr[a->rs1]); + } else { + tcg_gen_deposit_i64(cpu_fpr[a->rd], cpu_fpr[a->rs2], + cpu_fpr[a->rs1], 0, 63); + } + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fsgnjn_d(DisasContext *ctx, arg_fsgnjn_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + if (a->rs1 == a->rs2) { /* FNEG */ + tcg_gen_xori_i64(cpu_fpr[a->rd], cpu_fpr[a->rs1], INT64_MIN); + } else { + TCGv_i64 t0 = tcg_temp_new_i64(); + tcg_gen_not_i64(t0, cpu_fpr[a->rs2]); + tcg_gen_deposit_i64(cpu_fpr[a->rd], t0, cpu_fpr[a->rs1], 0, 63); + tcg_temp_free_i64(t0); + } + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fsgnjx_d(DisasContext *ctx, arg_fsgnjx_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + if (a->rs1 == a->rs2) { /* FABS */ + tcg_gen_andi_i64(cpu_fpr[a->rd], cpu_fpr[a->rs1], ~INT64_MIN); + } else { + TCGv_i64 t0 = tcg_temp_new_i64(); + tcg_gen_andi_i64(t0, cpu_fpr[a->rs2], INT64_MIN); + tcg_gen_xor_i64(cpu_fpr[a->rd], cpu_fpr[a->rs1], t0); + tcg_temp_free_i64(t0); + } + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fmin_d(DisasContext *ctx, arg_fmin_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + gen_helper_fmin_d(cpu_fpr[a->rd], cpu_env, + cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fmax_d(DisasContext *ctx, arg_fmax_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + gen_helper_fmax_d(cpu_fpr[a->rd], cpu_env, + cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fcvt_s_d(DisasContext *ctx, arg_fcvt_s_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_s_d(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1]); + + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fcvt_d_s(DisasContext *ctx, arg_fcvt_d_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_d_s(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1]); + + mark_fs_dirty(ctx); + return true; +} + +static bool trans_feq_d(DisasContext *ctx, arg_feq_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + TCGv t0 = tcg_temp_new(); + gen_helper_feq_d(t0, cpu_env, cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + + return true; +} + +static bool trans_flt_d(DisasContext *ctx, arg_flt_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + TCGv t0 = tcg_temp_new(); + gen_helper_flt_d(t0, cpu_env, cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + + return true; +} + +static bool trans_fle_d(DisasContext *ctx, arg_fle_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + TCGv t0 = tcg_temp_new(); + gen_helper_fle_d(t0, cpu_env, cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + + return true; +} + +static bool trans_fclass_d(DisasContext *ctx, arg_fclass_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + TCGv t0 = tcg_temp_new(); + gen_helper_fclass_d(t0, cpu_fpr[a->rs1]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + return true; +} + +static bool trans_fcvt_w_d(DisasContext *ctx, arg_fcvt_w_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + TCGv t0 = tcg_temp_new(); + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_w_d(t0, cpu_env, cpu_fpr[a->rs1]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + + return true; +} + +static bool trans_fcvt_wu_d(DisasContext *ctx, arg_fcvt_wu_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + TCGv t0 = tcg_temp_new(); + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_wu_d(t0, cpu_env, cpu_fpr[a->rs1]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + + return true; +} + +static bool trans_fcvt_d_w(DisasContext *ctx, arg_fcvt_d_w *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_d_w(cpu_fpr[a->rd], cpu_env, t0); + tcg_temp_free(t0); + + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fcvt_d_wu(DisasContext *ctx, arg_fcvt_d_wu *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_d_wu(cpu_fpr[a->rd], cpu_env, t0); + tcg_temp_free(t0); + + mark_fs_dirty(ctx); + return true; +} + +#ifdef TARGET_RISCV64 + +static bool trans_fcvt_l_d(DisasContext *ctx, arg_fcvt_l_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + TCGv t0 = tcg_temp_new(); + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_l_d(t0, cpu_env, cpu_fpr[a->rs1]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + return true; +} + +static bool trans_fcvt_lu_d(DisasContext *ctx, arg_fcvt_lu_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + TCGv t0 = tcg_temp_new(); + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_lu_d(t0, cpu_env, cpu_fpr[a->rs1]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + return true; +} + +static bool trans_fmv_x_d(DisasContext *ctx, arg_fmv_x_d *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + gen_set_gpr(a->rd, cpu_fpr[a->rs1]); + return true; +} + +static bool trans_fcvt_d_l(DisasContext *ctx, arg_fcvt_d_l *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_d_l(cpu_fpr[a->rd], cpu_env, t0); + tcg_temp_free(t0); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fcvt_d_lu(DisasContext *ctx, arg_fcvt_d_lu *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_d_lu(cpu_fpr[a->rd], cpu_env, t0); + tcg_temp_free(t0); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fmv_d_x(DisasContext *ctx, arg_fmv_d_x *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVD); + + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + + tcg_gen_mov_tl(cpu_fpr[a->rd], t0); + tcg_temp_free(t0); + mark_fs_dirty(ctx); + return true; +} +#endif diff --git a/target/riscv/insn_trans/trans_rvf.inc.c b/target/riscv/insn_trans/trans_rvf.inc.c new file mode 100644 index 0000000000..172dbfa919 --- /dev/null +++ b/target/riscv/insn_trans/trans_rvf.inc.c @@ -0,0 +1,439 @@ +/* + * RISC-V translation routines for the RV64F Standard Extension. + * + * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu + * Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de + * Bastian Koppelmann, kbastian@mail.uni-paderborn.de + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#define REQUIRE_FPU do {\ + if (ctx->mstatus_fs == 0) \ + return false; \ +} while (0) + +static bool trans_flw(DisasContext *ctx, arg_flw *a) +{ + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + tcg_gen_addi_tl(t0, t0, a->imm); + + tcg_gen_qemu_ld_i64(cpu_fpr[a->rd], t0, ctx->mem_idx, MO_TEUL); + /* RISC-V requires NaN-boxing of narrower width floating point values */ + tcg_gen_ori_i64(cpu_fpr[a->rd], cpu_fpr[a->rd], 0xffffffff00000000ULL); + + tcg_temp_free(t0); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fsw(DisasContext *ctx, arg_fsw *a) +{ + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + tcg_gen_addi_tl(t0, t0, a->imm); + + tcg_gen_qemu_st_i64(cpu_fpr[a->rs2], t0, ctx->mem_idx, MO_TEUL); + + tcg_temp_free(t0); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fmadd_s(DisasContext *ctx, arg_fmadd_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + gen_set_rm(ctx, a->rm); + gen_helper_fmadd_s(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1], + cpu_fpr[a->rs2], cpu_fpr[a->rs3]); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fmsub_s(DisasContext *ctx, arg_fmsub_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + gen_set_rm(ctx, a->rm); + gen_helper_fmsub_s(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1], + cpu_fpr[a->rs2], cpu_fpr[a->rs3]); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fnmsub_s(DisasContext *ctx, arg_fnmsub_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + gen_set_rm(ctx, a->rm); + gen_helper_fnmsub_s(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1], + cpu_fpr[a->rs2], cpu_fpr[a->rs3]); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fnmadd_s(DisasContext *ctx, arg_fnmadd_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + gen_set_rm(ctx, a->rm); + gen_helper_fnmadd_s(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1], + cpu_fpr[a->rs2], cpu_fpr[a->rs3]); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fadd_s(DisasContext *ctx, arg_fadd_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + gen_set_rm(ctx, a->rm); + gen_helper_fadd_s(cpu_fpr[a->rd], cpu_env, + cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fsub_s(DisasContext *ctx, arg_fsub_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + gen_set_rm(ctx, a->rm); + gen_helper_fsub_s(cpu_fpr[a->rd], cpu_env, + cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fmul_s(DisasContext *ctx, arg_fmul_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + gen_set_rm(ctx, a->rm); + gen_helper_fmul_s(cpu_fpr[a->rd], cpu_env, + cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fdiv_s(DisasContext *ctx, arg_fdiv_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + gen_set_rm(ctx, a->rm); + gen_helper_fdiv_s(cpu_fpr[a->rd], cpu_env, + cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fsqrt_s(DisasContext *ctx, arg_fsqrt_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + gen_set_rm(ctx, a->rm); + gen_helper_fsqrt_s(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1]); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fsgnj_s(DisasContext *ctx, arg_fsgnj_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + if (a->rs1 == a->rs2) { /* FMOV */ + tcg_gen_mov_i64(cpu_fpr[a->rd], cpu_fpr[a->rs1]); + } else { /* FSGNJ */ + tcg_gen_deposit_i64(cpu_fpr[a->rd], cpu_fpr[a->rs2], cpu_fpr[a->rs1], + 0, 31); + } + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fsgnjn_s(DisasContext *ctx, arg_fsgnjn_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + if (a->rs1 == a->rs2) { /* FNEG */ + tcg_gen_xori_i64(cpu_fpr[a->rd], cpu_fpr[a->rs1], INT32_MIN); + } else { + TCGv_i64 t0 = tcg_temp_new_i64(); + tcg_gen_not_i64(t0, cpu_fpr[a->rs2]); + tcg_gen_deposit_i64(cpu_fpr[a->rd], t0, cpu_fpr[a->rs1], 0, 31); + tcg_temp_free_i64(t0); + } + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fsgnjx_s(DisasContext *ctx, arg_fsgnjx_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + if (a->rs1 == a->rs2) { /* FABS */ + tcg_gen_andi_i64(cpu_fpr[a->rd], cpu_fpr[a->rs1], ~INT32_MIN); + } else { + TCGv_i64 t0 = tcg_temp_new_i64(); + tcg_gen_andi_i64(t0, cpu_fpr[a->rs2], INT32_MIN); + tcg_gen_xor_i64(cpu_fpr[a->rd], cpu_fpr[a->rs1], t0); + tcg_temp_free_i64(t0); + } + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fmin_s(DisasContext *ctx, arg_fmin_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + gen_helper_fmin_s(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1], + cpu_fpr[a->rs2]); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fmax_s(DisasContext *ctx, arg_fmax_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + gen_helper_fmax_s(cpu_fpr[a->rd], cpu_env, cpu_fpr[a->rs1], + cpu_fpr[a->rs2]); + mark_fs_dirty(ctx); + return true; +} + +static bool trans_fcvt_w_s(DisasContext *ctx, arg_fcvt_w_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + TCGv t0 = tcg_temp_new(); + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_w_s(t0, cpu_env, cpu_fpr[a->rs1]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + + return true; +} + +static bool trans_fcvt_wu_s(DisasContext *ctx, arg_fcvt_wu_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + TCGv t0 = tcg_temp_new(); + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_wu_s(t0, cpu_env, cpu_fpr[a->rs1]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + + return true; +} + +static bool trans_fmv_x_w(DisasContext *ctx, arg_fmv_x_w *a) +{ + /* NOTE: This was FMV.X.S in an earlier version of the ISA spec! */ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + TCGv t0 = tcg_temp_new(); + +#if defined(TARGET_RISCV64) + tcg_gen_ext32s_tl(t0, cpu_fpr[a->rs1]); +#else + tcg_gen_extrl_i64_i32(t0, cpu_fpr[a->rs1]); +#endif + + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + + return true; +} + +static bool trans_feq_s(DisasContext *ctx, arg_feq_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + TCGv t0 = tcg_temp_new(); + gen_helper_feq_s(t0, cpu_env, cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + return true; +} + +static bool trans_flt_s(DisasContext *ctx, arg_flt_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + TCGv t0 = tcg_temp_new(); + gen_helper_flt_s(t0, cpu_env, cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + return true; +} + +static bool trans_fle_s(DisasContext *ctx, arg_fle_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + TCGv t0 = tcg_temp_new(); + gen_helper_fle_s(t0, cpu_env, cpu_fpr[a->rs1], cpu_fpr[a->rs2]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + return true; +} + +static bool trans_fclass_s(DisasContext *ctx, arg_fclass_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + TCGv t0 = tcg_temp_new(); + + gen_helper_fclass_s(t0, cpu_fpr[a->rs1]); + + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + + return true; +} + +static bool trans_fcvt_s_w(DisasContext *ctx, arg_fcvt_s_w *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_s_w(cpu_fpr[a->rd], cpu_env, t0); + + mark_fs_dirty(ctx); + tcg_temp_free(t0); + + return true; +} + +static bool trans_fcvt_s_wu(DisasContext *ctx, arg_fcvt_s_wu *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_s_wu(cpu_fpr[a->rd], cpu_env, t0); + + mark_fs_dirty(ctx); + tcg_temp_free(t0); + + return true; +} + +static bool trans_fmv_w_x(DisasContext *ctx, arg_fmv_w_x *a) +{ + /* NOTE: This was FMV.S.X in an earlier version of the ISA spec! */ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + +#if defined(TARGET_RISCV64) + tcg_gen_mov_i64(cpu_fpr[a->rd], t0); +#else + tcg_gen_extu_i32_i64(cpu_fpr[a->rd], t0); +#endif + + mark_fs_dirty(ctx); + tcg_temp_free(t0); + + return true; +} + +#ifdef TARGET_RISCV64 +static bool trans_fcvt_l_s(DisasContext *ctx, arg_fcvt_l_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + TCGv t0 = tcg_temp_new(); + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_l_s(t0, cpu_env, cpu_fpr[a->rs1]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + return true; +} + +static bool trans_fcvt_lu_s(DisasContext *ctx, arg_fcvt_lu_s *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + TCGv t0 = tcg_temp_new(); + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_lu_s(t0, cpu_env, cpu_fpr[a->rs1]); + gen_set_gpr(a->rd, t0); + tcg_temp_free(t0); + return true; +} + +static bool trans_fcvt_s_l(DisasContext *ctx, arg_fcvt_s_l *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_s_l(cpu_fpr[a->rd], cpu_env, t0); + + mark_fs_dirty(ctx); + tcg_temp_free(t0); + return true; +} + +static bool trans_fcvt_s_lu(DisasContext *ctx, arg_fcvt_s_lu *a) +{ + REQUIRE_FPU; + REQUIRE_EXT(ctx, RVF); + + TCGv t0 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + + gen_set_rm(ctx, a->rm); + gen_helper_fcvt_s_lu(cpu_fpr[a->rd], cpu_env, t0); + + mark_fs_dirty(ctx); + tcg_temp_free(t0); + return true; +} +#endif diff --git a/target/riscv/insn_trans/trans_rvi.inc.c b/target/riscv/insn_trans/trans_rvi.inc.c new file mode 100644 index 0000000000..d420a4d8b2 --- /dev/null +++ b/target/riscv/insn_trans/trans_rvi.inc.c @@ -0,0 +1,568 @@ +/* + * RISC-V translation routines for the RVXI Base Integer Instruction Set. + * + * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu + * Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de + * Bastian Koppelmann, kbastian@mail.uni-paderborn.de + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +static bool trans_lui(DisasContext *ctx, arg_lui *a) +{ + if (a->rd != 0) { + tcg_gen_movi_tl(cpu_gpr[a->rd], a->imm); + } + return true; +} + +static bool trans_auipc(DisasContext *ctx, arg_auipc *a) +{ + if (a->rd != 0) { + tcg_gen_movi_tl(cpu_gpr[a->rd], a->imm + ctx->base.pc_next); + } + return true; +} + +static bool trans_jal(DisasContext *ctx, arg_jal *a) +{ + gen_jal(ctx, a->rd, a->imm); + return true; +} + +static bool trans_jalr(DisasContext *ctx, arg_jalr *a) +{ + /* no chaining with JALR */ + TCGLabel *misaligned = NULL; + TCGv t0 = tcg_temp_new(); + + + gen_get_gpr(cpu_pc, a->rs1); + tcg_gen_addi_tl(cpu_pc, cpu_pc, a->imm); + tcg_gen_andi_tl(cpu_pc, cpu_pc, (target_ulong)-2); + + if (!has_ext(ctx, RVC)) { + misaligned = gen_new_label(); + tcg_gen_andi_tl(t0, cpu_pc, 0x2); + tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0x0, misaligned); + } + + if (a->rd != 0) { + tcg_gen_movi_tl(cpu_gpr[a->rd], ctx->pc_succ_insn); + } + tcg_gen_lookup_and_goto_ptr(); + + if (misaligned) { + gen_set_label(misaligned); + gen_exception_inst_addr_mis(ctx); + } + ctx->base.is_jmp = DISAS_NORETURN; + + tcg_temp_free(t0); + return true; +} + +static bool gen_branch(DisasContext *ctx, arg_b *a, TCGCond cond) +{ + TCGLabel *l = gen_new_label(); + TCGv source1, source2; + source1 = tcg_temp_new(); + source2 = tcg_temp_new(); + gen_get_gpr(source1, a->rs1); + gen_get_gpr(source2, a->rs2); + + tcg_gen_brcond_tl(cond, source1, source2, l); + gen_goto_tb(ctx, 1, ctx->pc_succ_insn); + gen_set_label(l); /* branch taken */ + + if (!has_ext(ctx, RVC) && ((ctx->base.pc_next + a->imm) & 0x3)) { + /* misaligned */ + gen_exception_inst_addr_mis(ctx); + } else { + gen_goto_tb(ctx, 0, ctx->base.pc_next + a->imm); + } + ctx->base.is_jmp = DISAS_NORETURN; + + tcg_temp_free(source1); + tcg_temp_free(source2); + + return true; +} + +static bool trans_beq(DisasContext *ctx, arg_beq *a) +{ + return gen_branch(ctx, a, TCG_COND_EQ); +} + +static bool trans_bne(DisasContext *ctx, arg_bne *a) +{ + return gen_branch(ctx, a, TCG_COND_NE); +} + +static bool trans_blt(DisasContext *ctx, arg_blt *a) +{ + return gen_branch(ctx, a, TCG_COND_LT); +} + +static bool trans_bge(DisasContext *ctx, arg_bge *a) +{ + return gen_branch(ctx, a, TCG_COND_GE); +} + +static bool trans_bltu(DisasContext *ctx, arg_bltu *a) +{ + return gen_branch(ctx, a, TCG_COND_LTU); +} + +static bool trans_bgeu(DisasContext *ctx, arg_bgeu *a) +{ + return gen_branch(ctx, a, TCG_COND_GEU); +} + +static bool gen_load(DisasContext *ctx, arg_lb *a, TCGMemOp memop) +{ + TCGv t0 = tcg_temp_new(); + TCGv t1 = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + tcg_gen_addi_tl(t0, t0, a->imm); + + tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, memop); + gen_set_gpr(a->rd, t1); + tcg_temp_free(t0); + tcg_temp_free(t1); + return true; +} + +static bool trans_lb(DisasContext *ctx, arg_lb *a) +{ + return gen_load(ctx, a, MO_SB); +} + +static bool trans_lh(DisasContext *ctx, arg_lh *a) +{ + return gen_load(ctx, a, MO_TESW); +} + +static bool trans_lw(DisasContext *ctx, arg_lw *a) +{ + return gen_load(ctx, a, MO_TESL); +} + +static bool trans_lbu(DisasContext *ctx, arg_lbu *a) +{ + return gen_load(ctx, a, MO_UB); +} + +static bool trans_lhu(DisasContext *ctx, arg_lhu *a) +{ + return gen_load(ctx, a, MO_TEUW); +} + +static bool gen_store(DisasContext *ctx, arg_sb *a, TCGMemOp memop) +{ + TCGv t0 = tcg_temp_new(); + TCGv dat = tcg_temp_new(); + gen_get_gpr(t0, a->rs1); + tcg_gen_addi_tl(t0, t0, a->imm); + gen_get_gpr(dat, a->rs2); + + tcg_gen_qemu_st_tl(dat, t0, ctx->mem_idx, memop); + tcg_temp_free(t0); + tcg_temp_free(dat); + return true; +} + + +static bool trans_sb(DisasContext *ctx, arg_sb *a) +{ + return gen_store(ctx, a, MO_SB); +} + +static bool trans_sh(DisasContext *ctx, arg_sh *a) +{ + return gen_store(ctx, a, MO_TESW); +} + +static bool trans_sw(DisasContext *ctx, arg_sw *a) +{ + return gen_store(ctx, a, MO_TESL); +} + +#ifdef TARGET_RISCV64 +static bool trans_lwu(DisasContext *ctx, arg_lwu *a) +{ + return gen_load(ctx, a, MO_TEUL); +} + +static bool trans_ld(DisasContext *ctx, arg_ld *a) +{ + return gen_load(ctx, a, MO_TEQ); +} + +static bool trans_sd(DisasContext *ctx, arg_sd *a) +{ + return gen_store(ctx, a, MO_TEQ); +} +#endif + +static bool trans_addi(DisasContext *ctx, arg_addi *a) +{ + return gen_arith_imm(ctx, a, &tcg_gen_add_tl); +} + +static void gen_slt(TCGv ret, TCGv s1, TCGv s2) +{ + tcg_gen_setcond_tl(TCG_COND_LT, ret, s1, s2); +} + +static void gen_sltu(TCGv ret, TCGv s1, TCGv s2) +{ + tcg_gen_setcond_tl(TCG_COND_LTU, ret, s1, s2); +} + + +static bool trans_slti(DisasContext *ctx, arg_slti *a) +{ + return gen_arith_imm(ctx, a, &gen_slt); +} + +static bool trans_sltiu(DisasContext *ctx, arg_sltiu *a) +{ + return gen_arith_imm(ctx, a, &gen_sltu); +} + +static bool trans_xori(DisasContext *ctx, arg_xori *a) +{ + return gen_arith_imm(ctx, a, &tcg_gen_xor_tl); +} +static bool trans_ori(DisasContext *ctx, arg_ori *a) +{ + return gen_arith_imm(ctx, a, &tcg_gen_or_tl); +} +static bool trans_andi(DisasContext *ctx, arg_andi *a) +{ + return gen_arith_imm(ctx, a, &tcg_gen_and_tl); +} +static bool trans_slli(DisasContext *ctx, arg_slli *a) +{ + if (a->shamt >= TARGET_LONG_BITS) { + return false; + } + + if (a->rd != 0) { + TCGv t = tcg_temp_new(); + gen_get_gpr(t, a->rs1); + + tcg_gen_shli_tl(t, t, a->shamt); + + gen_set_gpr(a->rd, t); + tcg_temp_free(t); + } /* NOP otherwise */ + return true; +} + +static bool trans_srli(DisasContext *ctx, arg_srli *a) +{ + if (a->shamt >= TARGET_LONG_BITS) { + return false; + } + + if (a->rd != 0) { + TCGv t = tcg_temp_new(); + gen_get_gpr(t, a->rs1); + + tcg_gen_shri_tl(t, t, a->shamt); + gen_set_gpr(a->rd, t); + tcg_temp_free(t); + } /* NOP otherwise */ + return true; +} + +static bool trans_srai(DisasContext *ctx, arg_srai *a) +{ + if (a->shamt >= TARGET_LONG_BITS) { + return false; + } + + if (a->rd != 0) { + TCGv t = tcg_temp_new(); + gen_get_gpr(t, a->rs1); + + tcg_gen_sari_tl(t, t, a->shamt); + gen_set_gpr(a->rd, t); + tcg_temp_free(t); + } /* NOP otherwise */ + return true; +} + +static bool trans_add(DisasContext *ctx, arg_add *a) +{ + return gen_arith(ctx, a, &tcg_gen_add_tl); +} + +static bool trans_sub(DisasContext *ctx, arg_sub *a) +{ + return gen_arith(ctx, a, &tcg_gen_sub_tl); +} + +static bool trans_sll(DisasContext *ctx, arg_sll *a) +{ + return gen_shift(ctx, a, &tcg_gen_shl_tl); +} + +static bool trans_slt(DisasContext *ctx, arg_slt *a) +{ + return gen_arith(ctx, a, &gen_slt); +} + +static bool trans_sltu(DisasContext *ctx, arg_sltu *a) +{ + return gen_arith(ctx, a, &gen_sltu); +} + +static bool trans_xor(DisasContext *ctx, arg_xor *a) +{ + return gen_arith(ctx, a, &tcg_gen_xor_tl); +} + +static bool trans_srl(DisasContext *ctx, arg_srl *a) +{ + return gen_shift(ctx, a, &tcg_gen_shr_tl); +} + +static bool trans_sra(DisasContext *ctx, arg_sra *a) +{ + return gen_shift(ctx, a, &tcg_gen_sar_tl); +} + +static bool trans_or(DisasContext *ctx, arg_or *a) +{ + return gen_arith(ctx, a, &tcg_gen_or_tl); +} + +static bool trans_and(DisasContext *ctx, arg_and *a) +{ + return gen_arith(ctx, a, &tcg_gen_and_tl); +} + +#ifdef TARGET_RISCV64 +static bool trans_addiw(DisasContext *ctx, arg_addiw *a) +{ + return gen_arith_imm(ctx, a, &gen_addw); +} + +static bool trans_slliw(DisasContext *ctx, arg_slliw *a) +{ + TCGv source1; + source1 = tcg_temp_new(); + gen_get_gpr(source1, a->rs1); + + tcg_gen_shli_tl(source1, source1, a->shamt); + tcg_gen_ext32s_tl(source1, source1); + gen_set_gpr(a->rd, source1); + + tcg_temp_free(source1); + return true; +} + +static bool trans_srliw(DisasContext *ctx, arg_srliw *a) +{ + TCGv t = tcg_temp_new(); + gen_get_gpr(t, a->rs1); + tcg_gen_extract_tl(t, t, a->shamt, 32 - a->shamt); + /* sign-extend for W instructions */ + tcg_gen_ext32s_tl(t, t); + gen_set_gpr(a->rd, t); + tcg_temp_free(t); + return true; +} + +static bool trans_sraiw(DisasContext *ctx, arg_sraiw *a) +{ + TCGv t = tcg_temp_new(); + gen_get_gpr(t, a->rs1); + tcg_gen_sextract_tl(t, t, a->shamt, 32 - a->shamt); + gen_set_gpr(a->rd, t); + tcg_temp_free(t); + return true; +} + +static bool trans_addw(DisasContext *ctx, arg_addw *a) +{ + return gen_arith(ctx, a, &gen_addw); +} + +static bool trans_subw(DisasContext *ctx, arg_subw *a) +{ + return gen_arith(ctx, a, &gen_subw); +} + +static bool trans_sllw(DisasContext *ctx, arg_sllw *a) +{ + TCGv source1 = tcg_temp_new(); + TCGv source2 = tcg_temp_new(); + + gen_get_gpr(source1, a->rs1); + gen_get_gpr(source2, a->rs2); + + tcg_gen_andi_tl(source2, source2, 0x1F); + tcg_gen_shl_tl(source1, source1, source2); + + tcg_gen_ext32s_tl(source1, source1); + gen_set_gpr(a->rd, source1); + tcg_temp_free(source1); + tcg_temp_free(source2); + return true; +} + +static bool trans_srlw(DisasContext *ctx, arg_srlw *a) +{ + TCGv source1 = tcg_temp_new(); + TCGv source2 = tcg_temp_new(); + + gen_get_gpr(source1, a->rs1); + gen_get_gpr(source2, a->rs2); + + /* clear upper 32 */ + tcg_gen_ext32u_tl(source1, source1); + tcg_gen_andi_tl(source2, source2, 0x1F); + tcg_gen_shr_tl(source1, source1, source2); + + tcg_gen_ext32s_tl(source1, source1); + gen_set_gpr(a->rd, source1); + tcg_temp_free(source1); + tcg_temp_free(source2); + return true; +} + +static bool trans_sraw(DisasContext *ctx, arg_sraw *a) +{ + TCGv source1 = tcg_temp_new(); + TCGv source2 = tcg_temp_new(); + + gen_get_gpr(source1, a->rs1); + gen_get_gpr(source2, a->rs2); + + /* + * first, trick to get it to act like working on 32 bits (get rid of + * upper 32, sign extend to fill space) + */ + tcg_gen_ext32s_tl(source1, source1); + tcg_gen_andi_tl(source2, source2, 0x1F); + tcg_gen_sar_tl(source1, source1, source2); + + gen_set_gpr(a->rd, source1); + tcg_temp_free(source1); + tcg_temp_free(source2); + + return true; +} +#endif + +static bool trans_fence(DisasContext *ctx, arg_fence *a) +{ + /* FENCE is a full memory barrier. */ + tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); + return true; +} + +static bool trans_fence_i(DisasContext *ctx, arg_fence_i *a) +{ + /* + * FENCE_I is a no-op in QEMU, + * however we need to end the translation block + */ + tcg_gen_movi_tl(cpu_pc, ctx->pc_succ_insn); + tcg_gen_exit_tb(NULL, 0); + ctx->base.is_jmp = DISAS_NORETURN; + return true; +} + +#define RISCV_OP_CSR_PRE do {\ + source1 = tcg_temp_new(); \ + csr_store = tcg_temp_new(); \ + dest = tcg_temp_new(); \ + rs1_pass = tcg_temp_new(); \ + gen_get_gpr(source1, a->rs1); \ + tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); \ + tcg_gen_movi_tl(rs1_pass, a->rs1); \ + tcg_gen_movi_tl(csr_store, a->csr); \ + gen_io_start();\ +} while (0) + +#define RISCV_OP_CSR_POST do {\ + gen_io_end(); \ + gen_set_gpr(a->rd, dest); \ + tcg_gen_movi_tl(cpu_pc, ctx->pc_succ_insn); \ + tcg_gen_exit_tb(NULL, 0); \ + ctx->base.is_jmp = DISAS_NORETURN; \ + tcg_temp_free(source1); \ + tcg_temp_free(csr_store); \ + tcg_temp_free(dest); \ + tcg_temp_free(rs1_pass); \ +} while (0) + + +static bool trans_csrrw(DisasContext *ctx, arg_csrrw *a) +{ + TCGv source1, csr_store, dest, rs1_pass; + RISCV_OP_CSR_PRE; + gen_helper_csrrw(dest, cpu_env, source1, csr_store); + RISCV_OP_CSR_POST; + return true; +} + +static bool trans_csrrs(DisasContext *ctx, arg_csrrs *a) +{ + TCGv source1, csr_store, dest, rs1_pass; + RISCV_OP_CSR_PRE; + gen_helper_csrrs(dest, cpu_env, source1, csr_store, rs1_pass); + RISCV_OP_CSR_POST; + return true; +} + +static bool trans_csrrc(DisasContext *ctx, arg_csrrc *a) +{ + TCGv source1, csr_store, dest, rs1_pass; + RISCV_OP_CSR_PRE; + gen_helper_csrrc(dest, cpu_env, source1, csr_store, rs1_pass); + RISCV_OP_CSR_POST; + return true; +} + +static bool trans_csrrwi(DisasContext *ctx, arg_csrrwi *a) +{ + TCGv source1, csr_store, dest, rs1_pass; + RISCV_OP_CSR_PRE; + gen_helper_csrrw(dest, cpu_env, rs1_pass, csr_store); + RISCV_OP_CSR_POST; + return true; +} + +static bool trans_csrrsi(DisasContext *ctx, arg_csrrsi *a) +{ + TCGv source1, csr_store, dest, rs1_pass; + RISCV_OP_CSR_PRE; + gen_helper_csrrs(dest, cpu_env, rs1_pass, csr_store, rs1_pass); + RISCV_OP_CSR_POST; + return true; +} + +static bool trans_csrrci(DisasContext *ctx, arg_csrrci *a) +{ + TCGv source1, csr_store, dest, rs1_pass; + RISCV_OP_CSR_PRE; + gen_helper_csrrc(dest, cpu_env, rs1_pass, csr_store, rs1_pass); + RISCV_OP_CSR_POST; + return true; +} diff --git a/target/riscv/insn_trans/trans_rvm.inc.c b/target/riscv/insn_trans/trans_rvm.inc.c new file mode 100644 index 0000000000..47cd6edc72 --- /dev/null +++ b/target/riscv/insn_trans/trans_rvm.inc.c @@ -0,0 +1,120 @@ +/* + * RISC-V translation routines for the RV64M Standard Extension. + * + * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu + * Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de + * Bastian Koppelmann, kbastian@mail.uni-paderborn.de + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + + +static bool trans_mul(DisasContext *ctx, arg_mul *a) +{ + REQUIRE_EXT(ctx, RVM); + return gen_arith(ctx, a, &tcg_gen_mul_tl); +} + +static bool trans_mulh(DisasContext *ctx, arg_mulh *a) +{ + REQUIRE_EXT(ctx, RVM); + TCGv source1 = tcg_temp_new(); + TCGv source2 = tcg_temp_new(); + gen_get_gpr(source1, a->rs1); + gen_get_gpr(source2, a->rs2); + + tcg_gen_muls2_tl(source2, source1, source1, source2); + + gen_set_gpr(a->rd, source1); + tcg_temp_free(source1); + tcg_temp_free(source2); + return true; +} + +static bool trans_mulhsu(DisasContext *ctx, arg_mulhsu *a) +{ + REQUIRE_EXT(ctx, RVM); + return gen_arith(ctx, a, &gen_mulhsu); +} + +static bool trans_mulhu(DisasContext *ctx, arg_mulhu *a) +{ + REQUIRE_EXT(ctx, RVM); + TCGv source1 = tcg_temp_new(); + TCGv source2 = tcg_temp_new(); + gen_get_gpr(source1, a->rs1); + gen_get_gpr(source2, a->rs2); + + tcg_gen_mulu2_tl(source2, source1, source1, source2); + + gen_set_gpr(a->rd, source1); + tcg_temp_free(source1); + tcg_temp_free(source2); + return true; +} + +static bool trans_div(DisasContext *ctx, arg_div *a) +{ + REQUIRE_EXT(ctx, RVM); + return gen_arith(ctx, a, &gen_div); +} + +static bool trans_divu(DisasContext *ctx, arg_divu *a) +{ + REQUIRE_EXT(ctx, RVM); + return gen_arith(ctx, a, &gen_divu); +} + +static bool trans_rem(DisasContext *ctx, arg_rem *a) +{ + REQUIRE_EXT(ctx, RVM); + return gen_arith(ctx, a, &gen_rem); +} + +static bool trans_remu(DisasContext *ctx, arg_remu *a) +{ + REQUIRE_EXT(ctx, RVM); + return gen_arith(ctx, a, &gen_remu); +} + +#ifdef TARGET_RISCV64 +static bool trans_mulw(DisasContext *ctx, arg_mulw *a) +{ + REQUIRE_EXT(ctx, RVM); + return gen_arith(ctx, a, &gen_mulw); +} + +static bool trans_divw(DisasContext *ctx, arg_divw *a) +{ + REQUIRE_EXT(ctx, RVM); + return gen_arith_div_w(ctx, a, &gen_div); +} + +static bool trans_divuw(DisasContext *ctx, arg_divuw *a) +{ + REQUIRE_EXT(ctx, RVM); + return gen_arith_div_uw(ctx, a, &gen_divu); +} + +static bool trans_remw(DisasContext *ctx, arg_remw *a) +{ + REQUIRE_EXT(ctx, RVM); + return gen_arith_div_w(ctx, a, &gen_rem); +} + +static bool trans_remuw(DisasContext *ctx, arg_remuw *a) +{ + REQUIRE_EXT(ctx, RVM); + return gen_arith_div_uw(ctx, a, &gen_remu); +} +#endif diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c index 15a5366616..b11c4ae22f 100644 --- a/target/riscv/pmp.c +++ b/target/riscv/pmp.c @@ -113,10 +113,11 @@ static void pmp_write_cfg(CPURISCVState *env, uint32_t pmp_index, uint8_t val) env->pmp_state.pmp[pmp_index].cfg_reg = val; pmp_update_rule(env, pmp_index); } else { - PMP_DEBUG("ignoring write - locked"); + qemu_log_mask(LOG_GUEST_ERROR, "ignoring pmpcfg write - locked\n"); } } else { - PMP_DEBUG("ignoring write - out of bounds"); + qemu_log_mask(LOG_GUEST_ERROR, + "ignoring pmpcfg write - out of bounds\n"); } } @@ -249,7 +250,8 @@ bool pmp_hart_has_privs(CPURISCVState *env, target_ulong addr, /* partially inside */ if ((s + e) == 1) { - PMP_DEBUG("pmp violation - access is partially inside"); + qemu_log_mask(LOG_GUEST_ERROR, + "pmp violation - access is partially inside\n"); ret = 0; break; } @@ -306,7 +308,8 @@ void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index, env->mhartid, reg_index, val); if ((reg_index & 1) && (sizeof(target_ulong) == 8)) { - PMP_DEBUG("ignoring write - incorrect address"); + qemu_log_mask(LOG_GUEST_ERROR, + "ignoring pmpcfg write - incorrect address\n"); return; } @@ -353,10 +356,12 @@ void pmpaddr_csr_write(CPURISCVState *env, uint32_t addr_index, env->pmp_state.pmp[addr_index].addr_reg = val; pmp_update_rule(env, addr_index); } else { - PMP_DEBUG("ignoring write - locked"); + qemu_log_mask(LOG_GUEST_ERROR, + "ignoring pmpaddr write - locked\n"); } } else { - PMP_DEBUG("ignoring write - out of bounds"); + qemu_log_mask(LOG_GUEST_ERROR, + "ignoring pmpaddr write - out of bounds\n"); } } @@ -372,7 +377,8 @@ target_ulong pmpaddr_csr_read(CPURISCVState *env, uint32_t addr_index) if (addr_index < MAX_RISCV_PMPS) { return env->pmp_state.pmp[addr_index].addr_reg; } else { - PMP_DEBUG("ignoring read - out of bounds"); + qemu_log_mask(LOG_GUEST_ERROR, + "ignoring pmpaddr read - out of bounds\n"); return 0; } } diff --git a/target/riscv/trace-events b/target/riscv/trace-events new file mode 100644 index 0000000000..48af0373df --- /dev/null +++ b/target/riscv/trace-events @@ -0,0 +1,2 @@ +# target/riscv/cpu_helper.c +riscv_trap(uint64_t hartid, bool async, uint64_t cause, uint64_t epc, uint64_t tval, const char *desc) "hart:%"PRId64", async:%d, cause:%"PRId64", epc:0x%"PRIx64", tval:0x%"PRIx64", desc=%s" diff --git a/target/riscv/translate.c b/target/riscv/translate.c index b7176cbf98..967eac7bc3 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -56,6 +56,7 @@ typedef struct DisasContext { int frm; } DisasContext; +#ifdef TARGET_RISCV64 /* convert riscv funct3 to qemu memop for load/store */ static const int tcg_memop_lookup[8] = { [0 ... 7] = -1, @@ -69,6 +70,7 @@ static const int tcg_memop_lookup[8] = { [6] = MO_TEUL, #endif }; +#endif #ifdef TARGET_RISCV64 #define CASE_OP_32_64(X) case X: case glue(X, W) @@ -186,367 +188,112 @@ static void gen_mulhsu(TCGv ret, TCGv arg1, TCGv arg2) tcg_temp_free(rh); } -static void gen_fsgnj(DisasContext *ctx, uint32_t rd, uint32_t rs1, - uint32_t rs2, int rm, uint64_t min) -{ - switch (rm) { - case 0: /* fsgnj */ - if (rs1 == rs2) { /* FMOV */ - tcg_gen_mov_i64(cpu_fpr[rd], cpu_fpr[rs1]); - } else { - tcg_gen_deposit_i64(cpu_fpr[rd], cpu_fpr[rs2], cpu_fpr[rs1], - 0, min == INT32_MIN ? 31 : 63); - } - break; - case 1: /* fsgnjn */ - if (rs1 == rs2) { /* FNEG */ - tcg_gen_xori_i64(cpu_fpr[rd], cpu_fpr[rs1], min); - } else { - TCGv_i64 t0 = tcg_temp_new_i64(); - tcg_gen_not_i64(t0, cpu_fpr[rs2]); - tcg_gen_deposit_i64(cpu_fpr[rd], t0, cpu_fpr[rs1], - 0, min == INT32_MIN ? 31 : 63); - tcg_temp_free_i64(t0); - } - break; - case 2: /* fsgnjx */ - if (rs1 == rs2) { /* FABS */ - tcg_gen_andi_i64(cpu_fpr[rd], cpu_fpr[rs1], ~min); - } else { - TCGv_i64 t0 = tcg_temp_new_i64(); - tcg_gen_andi_i64(t0, cpu_fpr[rs2], min); - tcg_gen_xor_i64(cpu_fpr[rd], cpu_fpr[rs1], t0); - tcg_temp_free_i64(t0); - } - break; - default: - gen_exception_illegal(ctx); - } -} - -static void gen_arith(DisasContext *ctx, uint32_t opc, int rd, int rs1, - int rs2) -{ - TCGv source1, source2, cond1, cond2, zeroreg, resultopt1; - source1 = tcg_temp_new(); - source2 = tcg_temp_new(); - gen_get_gpr(source1, rs1); - gen_get_gpr(source2, rs2); - - switch (opc) { - CASE_OP_32_64(OPC_RISC_ADD): - tcg_gen_add_tl(source1, source1, source2); - break; - CASE_OP_32_64(OPC_RISC_SUB): - tcg_gen_sub_tl(source1, source1, source2); - break; -#if defined(TARGET_RISCV64) - case OPC_RISC_SLLW: - tcg_gen_andi_tl(source2, source2, 0x1F); - tcg_gen_shl_tl(source1, source1, source2); - break; -#endif - case OPC_RISC_SLL: - tcg_gen_andi_tl(source2, source2, TARGET_LONG_BITS - 1); - tcg_gen_shl_tl(source1, source1, source2); - break; - case OPC_RISC_SLT: - tcg_gen_setcond_tl(TCG_COND_LT, source1, source1, source2); - break; - case OPC_RISC_SLTU: - tcg_gen_setcond_tl(TCG_COND_LTU, source1, source1, source2); - break; - case OPC_RISC_XOR: - tcg_gen_xor_tl(source1, source1, source2); - break; -#if defined(TARGET_RISCV64) - case OPC_RISC_SRLW: - /* clear upper 32 */ - tcg_gen_ext32u_tl(source1, source1); - tcg_gen_andi_tl(source2, source2, 0x1F); - tcg_gen_shr_tl(source1, source1, source2); - break; -#endif - case OPC_RISC_SRL: - tcg_gen_andi_tl(source2, source2, TARGET_LONG_BITS - 1); - tcg_gen_shr_tl(source1, source1, source2); - break; -#if defined(TARGET_RISCV64) - case OPC_RISC_SRAW: - /* first, trick to get it to act like working on 32 bits (get rid of - upper 32, sign extend to fill space) */ - tcg_gen_ext32s_tl(source1, source1); - tcg_gen_andi_tl(source2, source2, 0x1F); - tcg_gen_sar_tl(source1, source1, source2); - break; -#endif - case OPC_RISC_SRA: - tcg_gen_andi_tl(source2, source2, TARGET_LONG_BITS - 1); - tcg_gen_sar_tl(source1, source1, source2); - break; - case OPC_RISC_OR: - tcg_gen_or_tl(source1, source1, source2); - break; - case OPC_RISC_AND: - tcg_gen_and_tl(source1, source1, source2); - break; - CASE_OP_32_64(OPC_RISC_MUL): - if (!has_ext(ctx, RVM)) { - goto do_illegal; - } - tcg_gen_mul_tl(source1, source1, source2); - break; - case OPC_RISC_MULH: - if (!has_ext(ctx, RVM)) { - goto do_illegal; - } - tcg_gen_muls2_tl(source2, source1, source1, source2); - break; - case OPC_RISC_MULHSU: - if (!has_ext(ctx, RVM)) { - goto do_illegal; - } - gen_mulhsu(source1, source1, source2); - break; - case OPC_RISC_MULHU: - if (!has_ext(ctx, RVM)) { - goto do_illegal; - } - tcg_gen_mulu2_tl(source2, source1, source1, source2); - break; -#if defined(TARGET_RISCV64) - case OPC_RISC_DIVW: - if (!has_ext(ctx, RVM)) { - goto do_illegal; - } - tcg_gen_ext32s_tl(source1, source1); - tcg_gen_ext32s_tl(source2, source2); - /* fall through to DIV */ -#endif - case OPC_RISC_DIV: - if (!has_ext(ctx, RVM)) { - goto do_illegal; - } - /* Handle by altering args to tcg_gen_div to produce req'd results: - * For overflow: want source1 in source1 and 1 in source2 - * For div by zero: want -1 in source1 and 1 in source2 -> -1 result */ - cond1 = tcg_temp_new(); - cond2 = tcg_temp_new(); - zeroreg = tcg_const_tl(0); - resultopt1 = tcg_temp_new(); - - tcg_gen_movi_tl(resultopt1, (target_ulong)-1); - tcg_gen_setcondi_tl(TCG_COND_EQ, cond2, source2, (target_ulong)(~0L)); - tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source1, - ((target_ulong)1) << (TARGET_LONG_BITS - 1)); - tcg_gen_and_tl(cond1, cond1, cond2); /* cond1 = overflow */ - tcg_gen_setcondi_tl(TCG_COND_EQ, cond2, source2, 0); /* cond2 = div 0 */ - /* if div by zero, set source1 to -1, otherwise don't change */ - tcg_gen_movcond_tl(TCG_COND_EQ, source1, cond2, zeroreg, source1, - resultopt1); - /* if overflow or div by zero, set source2 to 1, else don't change */ - tcg_gen_or_tl(cond1, cond1, cond2); - tcg_gen_movi_tl(resultopt1, (target_ulong)1); - tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond1, zeroreg, source2, - resultopt1); - tcg_gen_div_tl(source1, source1, source2); - - tcg_temp_free(cond1); - tcg_temp_free(cond2); - tcg_temp_free(zeroreg); - tcg_temp_free(resultopt1); - break; -#if defined(TARGET_RISCV64) - case OPC_RISC_DIVUW: - if (!has_ext(ctx, RVM)) { - goto do_illegal; - } - tcg_gen_ext32u_tl(source1, source1); - tcg_gen_ext32u_tl(source2, source2); - /* fall through to DIVU */ -#endif - case OPC_RISC_DIVU: - if (!has_ext(ctx, RVM)) { - goto do_illegal; - } - cond1 = tcg_temp_new(); - zeroreg = tcg_const_tl(0); - resultopt1 = tcg_temp_new(); - - tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source2, 0); - tcg_gen_movi_tl(resultopt1, (target_ulong)-1); - tcg_gen_movcond_tl(TCG_COND_EQ, source1, cond1, zeroreg, source1, - resultopt1); - tcg_gen_movi_tl(resultopt1, (target_ulong)1); - tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond1, zeroreg, source2, - resultopt1); - tcg_gen_divu_tl(source1, source1, source2); - - tcg_temp_free(cond1); - tcg_temp_free(zeroreg); - tcg_temp_free(resultopt1); - break; -#if defined(TARGET_RISCV64) - case OPC_RISC_REMW: - if (!has_ext(ctx, RVM)) { - goto do_illegal; - } - tcg_gen_ext32s_tl(source1, source1); - tcg_gen_ext32s_tl(source2, source2); - /* fall through to REM */ -#endif - case OPC_RISC_REM: - if (!has_ext(ctx, RVM)) { - goto do_illegal; - } - cond1 = tcg_temp_new(); - cond2 = tcg_temp_new(); - zeroreg = tcg_const_tl(0); - resultopt1 = tcg_temp_new(); - - tcg_gen_movi_tl(resultopt1, 1L); - tcg_gen_setcondi_tl(TCG_COND_EQ, cond2, source2, (target_ulong)-1); - tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source1, - (target_ulong)1 << (TARGET_LONG_BITS - 1)); - tcg_gen_and_tl(cond2, cond1, cond2); /* cond1 = overflow */ - tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source2, 0); /* cond2 = div 0 */ - /* if overflow or div by zero, set source2 to 1, else don't change */ - tcg_gen_or_tl(cond2, cond1, cond2); - tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond2, zeroreg, source2, - resultopt1); - tcg_gen_rem_tl(resultopt1, source1, source2); - /* if div by zero, just return the original dividend */ - tcg_gen_movcond_tl(TCG_COND_EQ, source1, cond1, zeroreg, resultopt1, - source1); - - tcg_temp_free(cond1); - tcg_temp_free(cond2); - tcg_temp_free(zeroreg); - tcg_temp_free(resultopt1); - break; -#if defined(TARGET_RISCV64) - case OPC_RISC_REMUW: - if (!has_ext(ctx, RVM)) { - goto do_illegal; - } - tcg_gen_ext32u_tl(source1, source1); - tcg_gen_ext32u_tl(source2, source2); - /* fall through to REMU */ -#endif - case OPC_RISC_REMU: - if (!has_ext(ctx, RVM)) { - goto do_illegal; - } - cond1 = tcg_temp_new(); - zeroreg = tcg_const_tl(0); - resultopt1 = tcg_temp_new(); - - tcg_gen_movi_tl(resultopt1, (target_ulong)1); - tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source2, 0); - tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond1, zeroreg, source2, - resultopt1); - tcg_gen_remu_tl(resultopt1, source1, source2); - /* if div by zero, just return the original dividend */ - tcg_gen_movcond_tl(TCG_COND_EQ, source1, cond1, zeroreg, resultopt1, - source1); - - tcg_temp_free(cond1); - tcg_temp_free(zeroreg); - tcg_temp_free(resultopt1); - break; - do_illegal: - default: - gen_exception_illegal(ctx); - return; - } - - if (opc & 0x8) { /* sign extend for W instructions */ - tcg_gen_ext32s_tl(source1, source1); - } - - gen_set_gpr(rd, source1); - tcg_temp_free(source1); - tcg_temp_free(source2); -} - -static void gen_arith_imm(DisasContext *ctx, uint32_t opc, int rd, - int rs1, target_long imm) -{ - TCGv source1 = tcg_temp_new(); - int shift_len = TARGET_LONG_BITS; - int shift_a; - - gen_get_gpr(source1, rs1); - - switch (opc) { - case OPC_RISC_ADDI: -#if defined(TARGET_RISCV64) - case OPC_RISC_ADDIW: -#endif - tcg_gen_addi_tl(source1, source1, imm); - break; - case OPC_RISC_SLTI: - tcg_gen_setcondi_tl(TCG_COND_LT, source1, source1, imm); - break; - case OPC_RISC_SLTIU: - tcg_gen_setcondi_tl(TCG_COND_LTU, source1, source1, imm); - break; - case OPC_RISC_XORI: - tcg_gen_xori_tl(source1, source1, imm); - break; - case OPC_RISC_ORI: - tcg_gen_ori_tl(source1, source1, imm); - break; - case OPC_RISC_ANDI: - tcg_gen_andi_tl(source1, source1, imm); - break; -#if defined(TARGET_RISCV64) - case OPC_RISC_SLLIW: - shift_len = 32; - /* FALLTHRU */ -#endif - case OPC_RISC_SLLI: - if (imm >= shift_len) { - goto do_illegal; - } - tcg_gen_shli_tl(source1, source1, imm); - break; -#if defined(TARGET_RISCV64) - case OPC_RISC_SHIFT_RIGHT_IW: - shift_len = 32; - /* FALLTHRU */ -#endif - case OPC_RISC_SHIFT_RIGHT_I: - /* differentiate on IMM */ - shift_a = imm & 0x400; - imm &= 0x3ff; - if (imm >= shift_len) { - goto do_illegal; - } - if (imm != 0) { - if (shift_a) { - /* SRAI[W] */ - tcg_gen_sextract_tl(source1, source1, imm, shift_len - imm); - } else { - /* SRLI[W] */ - tcg_gen_extract_tl(source1, source1, imm, shift_len - imm); - } - /* No further sign-extension needed for W instructions. */ - opc &= ~0x8; - } - break; - default: - do_illegal: - gen_exception_illegal(ctx); - return; - } - - if (opc & 0x8) { /* sign-extend for W instructions */ - tcg_gen_ext32s_tl(source1, source1); - } - - gen_set_gpr(rd, source1); - tcg_temp_free(source1); +static void gen_div(TCGv ret, TCGv source1, TCGv source2) +{ + TCGv cond1, cond2, zeroreg, resultopt1; + /* + * Handle by altering args to tcg_gen_div to produce req'd results: + * For overflow: want source1 in source1 and 1 in source2 + * For div by zero: want -1 in source1 and 1 in source2 -> -1 result + */ + cond1 = tcg_temp_new(); + cond2 = tcg_temp_new(); + zeroreg = tcg_const_tl(0); + resultopt1 = tcg_temp_new(); + + tcg_gen_movi_tl(resultopt1, (target_ulong)-1); + tcg_gen_setcondi_tl(TCG_COND_EQ, cond2, source2, (target_ulong)(~0L)); + tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source1, + ((target_ulong)1) << (TARGET_LONG_BITS - 1)); + tcg_gen_and_tl(cond1, cond1, cond2); /* cond1 = overflow */ + tcg_gen_setcondi_tl(TCG_COND_EQ, cond2, source2, 0); /* cond2 = div 0 */ + /* if div by zero, set source1 to -1, otherwise don't change */ + tcg_gen_movcond_tl(TCG_COND_EQ, source1, cond2, zeroreg, source1, + resultopt1); + /* if overflow or div by zero, set source2 to 1, else don't change */ + tcg_gen_or_tl(cond1, cond1, cond2); + tcg_gen_movi_tl(resultopt1, (target_ulong)1); + tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond1, zeroreg, source2, + resultopt1); + tcg_gen_div_tl(ret, source1, source2); + + tcg_temp_free(cond1); + tcg_temp_free(cond2); + tcg_temp_free(zeroreg); + tcg_temp_free(resultopt1); +} + +static void gen_divu(TCGv ret, TCGv source1, TCGv source2) +{ + TCGv cond1, zeroreg, resultopt1; + cond1 = tcg_temp_new(); + + zeroreg = tcg_const_tl(0); + resultopt1 = tcg_temp_new(); + + tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source2, 0); + tcg_gen_movi_tl(resultopt1, (target_ulong)-1); + tcg_gen_movcond_tl(TCG_COND_EQ, source1, cond1, zeroreg, source1, + resultopt1); + tcg_gen_movi_tl(resultopt1, (target_ulong)1); + tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond1, zeroreg, source2, + resultopt1); + tcg_gen_divu_tl(ret, source1, source2); + + tcg_temp_free(cond1); + tcg_temp_free(zeroreg); + tcg_temp_free(resultopt1); +} + +static void gen_rem(TCGv ret, TCGv source1, TCGv source2) +{ + TCGv cond1, cond2, zeroreg, resultopt1; + + cond1 = tcg_temp_new(); + cond2 = tcg_temp_new(); + zeroreg = tcg_const_tl(0); + resultopt1 = tcg_temp_new(); + + tcg_gen_movi_tl(resultopt1, 1L); + tcg_gen_setcondi_tl(TCG_COND_EQ, cond2, source2, (target_ulong)-1); + tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source1, + (target_ulong)1 << (TARGET_LONG_BITS - 1)); + tcg_gen_and_tl(cond2, cond1, cond2); /* cond1 = overflow */ + tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source2, 0); /* cond2 = div 0 */ + /* if overflow or div by zero, set source2 to 1, else don't change */ + tcg_gen_or_tl(cond2, cond1, cond2); + tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond2, zeroreg, source2, + resultopt1); + tcg_gen_rem_tl(resultopt1, source1, source2); + /* if div by zero, just return the original dividend */ + tcg_gen_movcond_tl(TCG_COND_EQ, ret, cond1, zeroreg, resultopt1, + source1); + + tcg_temp_free(cond1); + tcg_temp_free(cond2); + tcg_temp_free(zeroreg); + tcg_temp_free(resultopt1); +} + +static void gen_remu(TCGv ret, TCGv source1, TCGv source2) +{ + TCGv cond1, zeroreg, resultopt1; + cond1 = tcg_temp_new(); + zeroreg = tcg_const_tl(0); + resultopt1 = tcg_temp_new(); + + tcg_gen_movi_tl(resultopt1, (target_ulong)1); + tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source2, 0); + tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond1, zeroreg, source2, + resultopt1); + tcg_gen_remu_tl(resultopt1, source1, source2); + /* if div by zero, just return the original dividend */ + tcg_gen_movcond_tl(TCG_COND_EQ, ret, cond1, zeroreg, resultopt1, + source1); + + tcg_temp_free(cond1); + tcg_temp_free(zeroreg); + tcg_temp_free(resultopt1); } static void gen_jal(DisasContext *ctx, int rd, target_ulong imm) @@ -569,92 +316,8 @@ static void gen_jal(DisasContext *ctx, int rd, target_ulong imm) ctx->base.is_jmp = DISAS_NORETURN; } -static void gen_jalr(DisasContext *ctx, uint32_t opc, int rd, int rs1, - target_long imm) -{ - /* no chaining with JALR */ - TCGLabel *misaligned = NULL; - TCGv t0 = tcg_temp_new(); - - switch (opc) { - case OPC_RISC_JALR: - gen_get_gpr(cpu_pc, rs1); - tcg_gen_addi_tl(cpu_pc, cpu_pc, imm); - tcg_gen_andi_tl(cpu_pc, cpu_pc, (target_ulong)-2); - - if (!has_ext(ctx, RVC)) { - misaligned = gen_new_label(); - tcg_gen_andi_tl(t0, cpu_pc, 0x2); - tcg_gen_brcondi_tl(TCG_COND_NE, t0, 0x0, misaligned); - } - - if (rd != 0) { - tcg_gen_movi_tl(cpu_gpr[rd], ctx->pc_succ_insn); - } - tcg_gen_lookup_and_goto_ptr(); - - if (misaligned) { - gen_set_label(misaligned); - gen_exception_inst_addr_mis(ctx); - } - ctx->base.is_jmp = DISAS_NORETURN; - break; - - default: - gen_exception_illegal(ctx); - break; - } - tcg_temp_free(t0); -} - -static void gen_branch(DisasContext *ctx, uint32_t opc, int rs1, int rs2, - target_long bimm) -{ - TCGLabel *l = gen_new_label(); - TCGv source1, source2; - source1 = tcg_temp_new(); - source2 = tcg_temp_new(); - gen_get_gpr(source1, rs1); - gen_get_gpr(source2, rs2); - - switch (opc) { - case OPC_RISC_BEQ: - tcg_gen_brcond_tl(TCG_COND_EQ, source1, source2, l); - break; - case OPC_RISC_BNE: - tcg_gen_brcond_tl(TCG_COND_NE, source1, source2, l); - break; - case OPC_RISC_BLT: - tcg_gen_brcond_tl(TCG_COND_LT, source1, source2, l); - break; - case OPC_RISC_BGE: - tcg_gen_brcond_tl(TCG_COND_GE, source1, source2, l); - break; - case OPC_RISC_BLTU: - tcg_gen_brcond_tl(TCG_COND_LTU, source1, source2, l); - break; - case OPC_RISC_BGEU: - tcg_gen_brcond_tl(TCG_COND_GEU, source1, source2, l); - break; - default: - gen_exception_illegal(ctx); - return; - } - tcg_temp_free(source1); - tcg_temp_free(source2); - - gen_goto_tb(ctx, 1, ctx->pc_succ_insn); - gen_set_label(l); /* branch taken */ - if (!has_ext(ctx, RVC) && ((ctx->base.pc_next + bimm) & 0x3)) { - /* misaligned */ - gen_exception_inst_addr_mis(ctx); - } else { - gen_goto_tb(ctx, 0, ctx->base.pc_next + bimm); - } - ctx->base.is_jmp = DISAS_NORETURN; -} - -static void gen_load(DisasContext *ctx, uint32_t opc, int rd, int rs1, +#ifdef TARGET_RISCV64 +static void gen_load_c(DisasContext *ctx, uint32_t opc, int rd, int rs1, target_long imm) { TCGv t0 = tcg_temp_new(); @@ -674,7 +337,7 @@ static void gen_load(DisasContext *ctx, uint32_t opc, int rd, int rs1, tcg_temp_free(t1); } -static void gen_store(DisasContext *ctx, uint32_t opc, int rs1, int rs2, +static void gen_store_c(DisasContext *ctx, uint32_t opc, int rs1, int rs2, target_long imm) { TCGv t0 = tcg_temp_new(); @@ -693,6 +356,7 @@ static void gen_store(DisasContext *ctx, uint32_t opc, int rs1, int rs2, tcg_temp_free(t0); tcg_temp_free(dat); } +#endif #ifndef CONFIG_USER_ONLY /* The states of mstatus_fs are: @@ -719,6 +383,7 @@ static void mark_fs_dirty(DisasContext *ctx) static inline void mark_fs_dirty(DisasContext *ctx) { } #endif +#if !defined(TARGET_RISCV64) static void gen_fp_load(DisasContext *ctx, uint32_t opc, int rd, int rs1, target_long imm) { @@ -793,143 +458,7 @@ static void gen_fp_store(DisasContext *ctx, uint32_t opc, int rs1, tcg_temp_free(t0); } - -static void gen_atomic(DisasContext *ctx, uint32_t opc, - int rd, int rs1, int rs2) -{ - TCGv src1, src2, dat; - TCGLabel *l1, *l2; - TCGMemOp mop; - bool aq, rl; - - /* Extract the size of the atomic operation. */ - switch (extract32(opc, 12, 3)) { - case 2: /* 32-bit */ - mop = MO_ALIGN | MO_TESL; - break; -#if defined(TARGET_RISCV64) - case 3: /* 64-bit */ - mop = MO_ALIGN | MO_TEQ; - break; #endif - default: - gen_exception_illegal(ctx); - return; - } - rl = extract32(opc, 25, 1); - aq = extract32(opc, 26, 1); - - src1 = tcg_temp_new(); - src2 = tcg_temp_new(); - - switch (MASK_OP_ATOMIC_NO_AQ_RL_SZ(opc)) { - case OPC_RISC_LR: - /* Put addr in load_res, data in load_val. */ - gen_get_gpr(src1, rs1); - if (rl) { - tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL); - } - tcg_gen_qemu_ld_tl(load_val, src1, ctx->mem_idx, mop); - if (aq) { - tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ); - } - tcg_gen_mov_tl(load_res, src1); - gen_set_gpr(rd, load_val); - break; - - case OPC_RISC_SC: - l1 = gen_new_label(); - l2 = gen_new_label(); - dat = tcg_temp_new(); - - gen_get_gpr(src1, rs1); - tcg_gen_brcond_tl(TCG_COND_NE, load_res, src1, l1); - - gen_get_gpr(src2, rs2); - /* Note that the TCG atomic primitives are SC, - so we can ignore AQ/RL along this path. */ - tcg_gen_atomic_cmpxchg_tl(src1, load_res, load_val, src2, - ctx->mem_idx, mop); - tcg_gen_setcond_tl(TCG_COND_NE, dat, src1, load_val); - gen_set_gpr(rd, dat); - tcg_gen_br(l2); - - gen_set_label(l1); - /* Address comparion failure. However, we still need to - provide the memory barrier implied by AQ/RL. */ - tcg_gen_mb(TCG_MO_ALL + aq * TCG_BAR_LDAQ + rl * TCG_BAR_STRL); - tcg_gen_movi_tl(dat, 1); - gen_set_gpr(rd, dat); - - gen_set_label(l2); - tcg_temp_free(dat); - break; - - case OPC_RISC_AMOSWAP: - /* Note that the TCG atomic primitives are SC, - so we can ignore AQ/RL along this path. */ - gen_get_gpr(src1, rs1); - gen_get_gpr(src2, rs2); - tcg_gen_atomic_xchg_tl(src2, src1, src2, ctx->mem_idx, mop); - gen_set_gpr(rd, src2); - break; - case OPC_RISC_AMOADD: - gen_get_gpr(src1, rs1); - gen_get_gpr(src2, rs2); - tcg_gen_atomic_fetch_add_tl(src2, src1, src2, ctx->mem_idx, mop); - gen_set_gpr(rd, src2); - break; - case OPC_RISC_AMOXOR: - gen_get_gpr(src1, rs1); - gen_get_gpr(src2, rs2); - tcg_gen_atomic_fetch_xor_tl(src2, src1, src2, ctx->mem_idx, mop); - gen_set_gpr(rd, src2); - break; - case OPC_RISC_AMOAND: - gen_get_gpr(src1, rs1); - gen_get_gpr(src2, rs2); - tcg_gen_atomic_fetch_and_tl(src2, src1, src2, ctx->mem_idx, mop); - gen_set_gpr(rd, src2); - break; - case OPC_RISC_AMOOR: - gen_get_gpr(src1, rs1); - gen_get_gpr(src2, rs2); - tcg_gen_atomic_fetch_or_tl(src2, src1, src2, ctx->mem_idx, mop); - gen_set_gpr(rd, src2); - break; - case OPC_RISC_AMOMIN: - gen_get_gpr(src1, rs1); - gen_get_gpr(src2, rs2); - tcg_gen_atomic_fetch_smin_tl(src2, src1, src2, ctx->mem_idx, mop); - gen_set_gpr(rd, src2); - break; - case OPC_RISC_AMOMAX: - gen_get_gpr(src1, rs1); - gen_get_gpr(src2, rs2); - tcg_gen_atomic_fetch_smax_tl(src2, src1, src2, ctx->mem_idx, mop); - gen_set_gpr(rd, src2); - break; - case OPC_RISC_AMOMINU: - gen_get_gpr(src1, rs1); - gen_get_gpr(src2, rs2); - tcg_gen_atomic_fetch_umin_tl(src2, src1, src2, ctx->mem_idx, mop); - gen_set_gpr(rd, src2); - break; - case OPC_RISC_AMOMAXU: - gen_get_gpr(src1, rs1); - gen_get_gpr(src2, rs2); - tcg_gen_atomic_fetch_umax_tl(src2, src1, src2, ctx->mem_idx, mop); - gen_set_gpr(rd, src2); - break; - - default: - gen_exception_illegal(ctx); - break; - } - - tcg_temp_free(src1); - tcg_temp_free(src2); -} static void gen_set_rm(DisasContext *ctx, int rm) { @@ -944,659 +473,6 @@ static void gen_set_rm(DisasContext *ctx, int rm) tcg_temp_free_i32(t0); } -static void gen_fp_fmadd(DisasContext *ctx, uint32_t opc, int rd, - int rs1, int rs2, int rs3, int rm) -{ - switch (opc) { - case OPC_RISC_FMADD_S: - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fmadd_s(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], - cpu_fpr[rs2], cpu_fpr[rs3]); - break; - case OPC_RISC_FMADD_D: - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fmadd_d(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], - cpu_fpr[rs2], cpu_fpr[rs3]); - break; - do_illegal: - default: - gen_exception_illegal(ctx); - break; - } -} - -static void gen_fp_fmsub(DisasContext *ctx, uint32_t opc, int rd, - int rs1, int rs2, int rs3, int rm) -{ - switch (opc) { - case OPC_RISC_FMSUB_S: - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fmsub_s(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], - cpu_fpr[rs2], cpu_fpr[rs3]); - break; - case OPC_RISC_FMSUB_D: - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fmsub_d(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], - cpu_fpr[rs2], cpu_fpr[rs3]); - break; - do_illegal: - default: - gen_exception_illegal(ctx); - break; - } -} - -static void gen_fp_fnmsub(DisasContext *ctx, uint32_t opc, int rd, - int rs1, int rs2, int rs3, int rm) -{ - switch (opc) { - case OPC_RISC_FNMSUB_S: - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fnmsub_s(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], - cpu_fpr[rs2], cpu_fpr[rs3]); - break; - case OPC_RISC_FNMSUB_D: - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fnmsub_d(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], - cpu_fpr[rs2], cpu_fpr[rs3]); - break; - do_illegal: - default: - gen_exception_illegal(ctx); - break; - } -} - -static void gen_fp_fnmadd(DisasContext *ctx, uint32_t opc, int rd, - int rs1, int rs2, int rs3, int rm) -{ - switch (opc) { - case OPC_RISC_FNMADD_S: - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fnmadd_s(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], - cpu_fpr[rs2], cpu_fpr[rs3]); - break; - case OPC_RISC_FNMADD_D: - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fnmadd_d(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], - cpu_fpr[rs2], cpu_fpr[rs3]); - break; - do_illegal: - default: - gen_exception_illegal(ctx); - break; - } -} - -static void gen_fp_arith(DisasContext *ctx, uint32_t opc, int rd, - int rs1, int rs2, int rm) -{ - TCGv t0 = NULL; - bool fp_output = true; - - if (ctx->mstatus_fs == 0) { - goto do_illegal; - } - - switch (opc) { - case OPC_RISC_FADD_S: - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fadd_s(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - case OPC_RISC_FSUB_S: - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fsub_s(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - case OPC_RISC_FMUL_S: - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fmul_s(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - case OPC_RISC_FDIV_S: - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fdiv_s(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - case OPC_RISC_FSQRT_S: - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fsqrt_s(cpu_fpr[rd], cpu_env, cpu_fpr[rs1]); - break; - case OPC_RISC_FSGNJ_S: - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - gen_fsgnj(ctx, rd, rs1, rs2, rm, INT32_MIN); - break; - - case OPC_RISC_FMIN_S: - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - /* also handles: OPC_RISC_FMAX_S */ - switch (rm) { - case 0x0: - gen_helper_fmin_s(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - case 0x1: - gen_helper_fmax_s(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - default: - goto do_illegal; - } - break; - - case OPC_RISC_FEQ_S: - /* also handles: OPC_RISC_FLT_S, OPC_RISC_FLE_S */ - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - t0 = tcg_temp_new(); - switch (rm) { - case 0x0: - gen_helper_fle_s(t0, cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - case 0x1: - gen_helper_flt_s(t0, cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - case 0x2: - gen_helper_feq_s(t0, cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - default: - goto do_illegal; - } - gen_set_gpr(rd, t0); - tcg_temp_free(t0); - fp_output = false; - break; - - case OPC_RISC_FCVT_W_S: - /* also OPC_RISC_FCVT_WU_S, OPC_RISC_FCVT_L_S, OPC_RISC_FCVT_LU_S */ - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - t0 = tcg_temp_new(); - switch (rs2) { - case 0: /* FCVT_W_S */ - gen_set_rm(ctx, rm); - gen_helper_fcvt_w_s(t0, cpu_env, cpu_fpr[rs1]); - break; - case 1: /* FCVT_WU_S */ - gen_set_rm(ctx, rm); - gen_helper_fcvt_wu_s(t0, cpu_env, cpu_fpr[rs1]); - break; -#if defined(TARGET_RISCV64) - case 2: /* FCVT_L_S */ - gen_set_rm(ctx, rm); - gen_helper_fcvt_l_s(t0, cpu_env, cpu_fpr[rs1]); - break; - case 3: /* FCVT_LU_S */ - gen_set_rm(ctx, rm); - gen_helper_fcvt_lu_s(t0, cpu_env, cpu_fpr[rs1]); - break; -#endif - default: - goto do_illegal; - } - gen_set_gpr(rd, t0); - tcg_temp_free(t0); - fp_output = false; - break; - - case OPC_RISC_FCVT_S_W: - /* also OPC_RISC_FCVT_S_WU, OPC_RISC_FCVT_S_L, OPC_RISC_FCVT_S_LU */ - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - t0 = tcg_temp_new(); - gen_get_gpr(t0, rs1); - switch (rs2) { - case 0: /* FCVT_S_W */ - gen_set_rm(ctx, rm); - gen_helper_fcvt_s_w(cpu_fpr[rd], cpu_env, t0); - break; - case 1: /* FCVT_S_WU */ - gen_set_rm(ctx, rm); - gen_helper_fcvt_s_wu(cpu_fpr[rd], cpu_env, t0); - break; -#if defined(TARGET_RISCV64) - case 2: /* FCVT_S_L */ - gen_set_rm(ctx, rm); - gen_helper_fcvt_s_l(cpu_fpr[rd], cpu_env, t0); - break; - case 3: /* FCVT_S_LU */ - gen_set_rm(ctx, rm); - gen_helper_fcvt_s_lu(cpu_fpr[rd], cpu_env, t0); - break; -#endif - default: - goto do_illegal; - } - tcg_temp_free(t0); - break; - - case OPC_RISC_FMV_X_S: - /* also OPC_RISC_FCLASS_S */ - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - t0 = tcg_temp_new(); - switch (rm) { - case 0: /* FMV */ -#if defined(TARGET_RISCV64) - tcg_gen_ext32s_tl(t0, cpu_fpr[rs1]); -#else - tcg_gen_extrl_i64_i32(t0, cpu_fpr[rs1]); -#endif - break; - case 1: - gen_helper_fclass_s(t0, cpu_fpr[rs1]); - break; - default: - goto do_illegal; - } - gen_set_gpr(rd, t0); - tcg_temp_free(t0); - fp_output = false; - break; - - case OPC_RISC_FMV_S_X: - if (!has_ext(ctx, RVF)) { - goto do_illegal; - } - t0 = tcg_temp_new(); - gen_get_gpr(t0, rs1); -#if defined(TARGET_RISCV64) - tcg_gen_mov_i64(cpu_fpr[rd], t0); -#else - tcg_gen_extu_i32_i64(cpu_fpr[rd], t0); -#endif - tcg_temp_free(t0); - break; - - /* double */ - case OPC_RISC_FADD_D: - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fadd_d(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - case OPC_RISC_FSUB_D: - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fsub_d(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - case OPC_RISC_FMUL_D: - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fmul_d(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - case OPC_RISC_FDIV_D: - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fdiv_d(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - case OPC_RISC_FSQRT_D: - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - gen_set_rm(ctx, rm); - gen_helper_fsqrt_d(cpu_fpr[rd], cpu_env, cpu_fpr[rs1]); - break; - case OPC_RISC_FSGNJ_D: - gen_fsgnj(ctx, rd, rs1, rs2, rm, INT64_MIN); - break; - - case OPC_RISC_FMIN_D: - /* also OPC_RISC_FMAX_D */ - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - switch (rm) { - case 0: - gen_helper_fmin_d(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - case 1: - gen_helper_fmax_d(cpu_fpr[rd], cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - default: - goto do_illegal; - } - break; - - case OPC_RISC_FCVT_S_D: - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - switch (rs2) { - case 1: - gen_set_rm(ctx, rm); - gen_helper_fcvt_s_d(cpu_fpr[rd], cpu_env, cpu_fpr[rs1]); - break; - default: - goto do_illegal; - } - break; - - case OPC_RISC_FCVT_D_S: - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - switch (rs2) { - case 0: - gen_set_rm(ctx, rm); - gen_helper_fcvt_d_s(cpu_fpr[rd], cpu_env, cpu_fpr[rs1]); - break; - default: - goto do_illegal; - } - break; - - case OPC_RISC_FEQ_D: - /* also OPC_RISC_FLT_D, OPC_RISC_FLE_D */ - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - t0 = tcg_temp_new(); - switch (rm) { - case 0: - gen_helper_fle_d(t0, cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - case 1: - gen_helper_flt_d(t0, cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - case 2: - gen_helper_feq_d(t0, cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); - break; - default: - goto do_illegal; - } - gen_set_gpr(rd, t0); - tcg_temp_free(t0); - fp_output = false; - break; - - case OPC_RISC_FCVT_W_D: - /* also OPC_RISC_FCVT_WU_D, OPC_RISC_FCVT_L_D, OPC_RISC_FCVT_LU_D */ - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - t0 = tcg_temp_new(); - switch (rs2) { - case 0: - gen_set_rm(ctx, rm); - gen_helper_fcvt_w_d(t0, cpu_env, cpu_fpr[rs1]); - break; - case 1: - gen_set_rm(ctx, rm); - gen_helper_fcvt_wu_d(t0, cpu_env, cpu_fpr[rs1]); - break; -#if defined(TARGET_RISCV64) - case 2: - gen_set_rm(ctx, rm); - gen_helper_fcvt_l_d(t0, cpu_env, cpu_fpr[rs1]); - break; - case 3: - gen_set_rm(ctx, rm); - gen_helper_fcvt_lu_d(t0, cpu_env, cpu_fpr[rs1]); - break; -#endif - default: - goto do_illegal; - } - gen_set_gpr(rd, t0); - tcg_temp_free(t0); - fp_output = false; - break; - - case OPC_RISC_FCVT_D_W: - /* also OPC_RISC_FCVT_D_WU, OPC_RISC_FCVT_D_L, OPC_RISC_FCVT_D_LU */ - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - t0 = tcg_temp_new(); - gen_get_gpr(t0, rs1); - switch (rs2) { - case 0: - gen_set_rm(ctx, rm); - gen_helper_fcvt_d_w(cpu_fpr[rd], cpu_env, t0); - break; - case 1: - gen_set_rm(ctx, rm); - gen_helper_fcvt_d_wu(cpu_fpr[rd], cpu_env, t0); - break; -#if defined(TARGET_RISCV64) - case 2: - gen_set_rm(ctx, rm); - gen_helper_fcvt_d_l(cpu_fpr[rd], cpu_env, t0); - break; - case 3: - gen_set_rm(ctx, rm); - gen_helper_fcvt_d_lu(cpu_fpr[rd], cpu_env, t0); - break; -#endif - default: - goto do_illegal; - } - tcg_temp_free(t0); - break; - - case OPC_RISC_FMV_X_D: - /* also OPC_RISC_FCLASS_D */ - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - switch (rm) { -#if defined(TARGET_RISCV64) - case 0: /* FMV */ - gen_set_gpr(rd, cpu_fpr[rs1]); - break; -#endif - case 1: - t0 = tcg_temp_new(); - gen_helper_fclass_d(t0, cpu_fpr[rs1]); - gen_set_gpr(rd, t0); - tcg_temp_free(t0); - break; - default: - goto do_illegal; - } - fp_output = false; - break; - -#if defined(TARGET_RISCV64) - case OPC_RISC_FMV_D_X: - if (!has_ext(ctx, RVD)) { - goto do_illegal; - } - t0 = tcg_temp_new(); - gen_get_gpr(t0, rs1); - tcg_gen_mov_tl(cpu_fpr[rd], t0); - tcg_temp_free(t0); - break; -#endif - - default: - do_illegal: - if (t0) { - tcg_temp_free(t0); - } - gen_exception_illegal(ctx); - return; - } - - if (fp_output) { - mark_fs_dirty(ctx); - } -} - -static void gen_system(DisasContext *ctx, uint32_t opc, int rd, int rs1, - int csr) -{ - TCGv source1, csr_store, dest, rs1_pass, imm_rs1; - source1 = tcg_temp_new(); - csr_store = tcg_temp_new(); - dest = tcg_temp_new(); - rs1_pass = tcg_temp_new(); - imm_rs1 = tcg_temp_new(); - gen_get_gpr(source1, rs1); - tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); - tcg_gen_movi_tl(rs1_pass, rs1); - tcg_gen_movi_tl(csr_store, csr); /* copy into temp reg to feed to helper */ - -#ifndef CONFIG_USER_ONLY - /* Extract funct7 value and check whether it matches SFENCE.VMA */ - if ((opc == OPC_RISC_ECALL) && ((csr >> 5) == 9)) { - if (ctx->priv_ver == PRIV_VERSION_1_10_0) { - /* sfence.vma */ - /* TODO: handle ASID specific fences */ - gen_helper_tlb_flush(cpu_env); - return; - } else { - gen_exception_illegal(ctx); - } - } -#endif - - switch (opc) { - case OPC_RISC_ECALL: - switch (csr) { - case 0x0: /* ECALL */ - /* always generates U-level ECALL, fixed in do_interrupt handler */ - generate_exception(ctx, RISCV_EXCP_U_ECALL); - tcg_gen_exit_tb(NULL, 0); /* no chaining */ - ctx->base.is_jmp = DISAS_NORETURN; - break; - case 0x1: /* EBREAK */ - generate_exception(ctx, RISCV_EXCP_BREAKPOINT); - tcg_gen_exit_tb(NULL, 0); /* no chaining */ - ctx->base.is_jmp = DISAS_NORETURN; - break; -#ifndef CONFIG_USER_ONLY - case 0x002: /* URET */ - gen_exception_illegal(ctx); - break; - case 0x102: /* SRET */ - if (has_ext(ctx, RVS)) { - gen_helper_sret(cpu_pc, cpu_env, cpu_pc); - tcg_gen_exit_tb(NULL, 0); /* no chaining */ - ctx->base.is_jmp = DISAS_NORETURN; - } else { - gen_exception_illegal(ctx); - } - break; - case 0x202: /* HRET */ - gen_exception_illegal(ctx); - break; - case 0x302: /* MRET */ - gen_helper_mret(cpu_pc, cpu_env, cpu_pc); - tcg_gen_exit_tb(NULL, 0); /* no chaining */ - ctx->base.is_jmp = DISAS_NORETURN; - break; - case 0x7b2: /* DRET */ - gen_exception_illegal(ctx); - break; - case 0x105: /* WFI */ - tcg_gen_movi_tl(cpu_pc, ctx->pc_succ_insn); - gen_helper_wfi(cpu_env); - break; - case 0x104: /* SFENCE.VM */ - if (ctx->priv_ver <= PRIV_VERSION_1_09_1) { - gen_helper_tlb_flush(cpu_env); - } else { - gen_exception_illegal(ctx); - } - break; -#endif - default: - gen_exception_illegal(ctx); - break; - } - break; - default: - tcg_gen_movi_tl(imm_rs1, rs1); - gen_io_start(); - switch (opc) { - case OPC_RISC_CSRRW: - gen_helper_csrrw(dest, cpu_env, source1, csr_store); - break; - case OPC_RISC_CSRRS: - gen_helper_csrrs(dest, cpu_env, source1, csr_store, rs1_pass); - break; - case OPC_RISC_CSRRC: - gen_helper_csrrc(dest, cpu_env, source1, csr_store, rs1_pass); - break; - case OPC_RISC_CSRRWI: - gen_helper_csrrw(dest, cpu_env, imm_rs1, csr_store); - break; - case OPC_RISC_CSRRSI: - gen_helper_csrrs(dest, cpu_env, imm_rs1, csr_store, rs1_pass); - break; - case OPC_RISC_CSRRCI: - gen_helper_csrrc(dest, cpu_env, imm_rs1, csr_store, rs1_pass); - break; - default: - gen_exception_illegal(ctx); - return; - } - gen_io_end(); - gen_set_gpr(rd, dest); - /* end tb since we may be changing priv modes, to get mmu_index right */ - tcg_gen_movi_tl(cpu_pc, ctx->pc_succ_insn); - tcg_gen_exit_tb(NULL, 0); /* no chaining */ - ctx->base.is_jmp = DISAS_NORETURN; - break; - } - tcg_temp_free(source1); - tcg_temp_free(csr_store); - tcg_temp_free(dest); - tcg_temp_free(rs1_pass); - tcg_temp_free(imm_rs1); -} - static void decode_RV32_64C0(DisasContext *ctx) { uint8_t funct3 = extract32(ctx->opcode, 13, 3); @@ -1604,31 +480,10 @@ static void decode_RV32_64C0(DisasContext *ctx) uint8_t rs1s = GET_C_RS1S(ctx->opcode); switch (funct3) { - case 0: - /* illegal */ - if (ctx->opcode == 0) { - gen_exception_illegal(ctx); - } else { - /* C.ADDI4SPN -> addi rd', x2, zimm[9:2]*/ - gen_arith_imm(ctx, OPC_RISC_ADDI, rd_rs2, 2, - GET_C_ADDI4SPN_IMM(ctx->opcode)); - } - break; - case 1: - /* C.FLD -> fld rd', offset[7:3](rs1')*/ - gen_fp_load(ctx, OPC_RISC_FLD, rd_rs2, rs1s, - GET_C_LD_IMM(ctx->opcode)); - /* C.LQ(RV128) */ - break; - case 2: - /* C.LW -> lw rd', offset[6:2](rs1') */ - gen_load(ctx, OPC_RISC_LW, rd_rs2, rs1s, - GET_C_LW_IMM(ctx->opcode)); - break; case 3: #if defined(TARGET_RISCV64) /* C.LD(RV64/128) -> ld rd', offset[7:3](rs1')*/ - gen_load(ctx, OPC_RISC_LD, rd_rs2, rs1s, + gen_load_c(ctx, OPC_RISC_LD, rd_rs2, rs1s, GET_C_LD_IMM(ctx->opcode)); #else /* C.FLW (RV32) -> flw rd', offset[6:2](rs1')*/ @@ -1636,25 +491,10 @@ static void decode_RV32_64C0(DisasContext *ctx) GET_C_LW_IMM(ctx->opcode)); #endif break; - case 4: - /* reserved */ - gen_exception_illegal(ctx); - break; - case 5: - /* C.FSD(RV32/64) -> fsd rs2', offset[7:3](rs1') */ - gen_fp_store(ctx, OPC_RISC_FSD, rs1s, rd_rs2, - GET_C_LD_IMM(ctx->opcode)); - /* C.SQ (RV128) */ - break; - case 6: - /* C.SW -> sw rs2', offset[6:2](rs1')*/ - gen_store(ctx, OPC_RISC_SW, rs1s, rd_rs2, - GET_C_LW_IMM(ctx->opcode)); - break; case 7: #if defined(TARGET_RISCV64) /* C.SD (RV64/128) -> sd rs2', offset[7:3](rs1')*/ - gen_store(ctx, OPC_RISC_SD, rs1s, rd_rs2, + gen_store_c(ctx, OPC_RISC_SD, rs1s, rd_rs2, GET_C_LD_IMM(ctx->opcode)); #else /* C.FSW (RV32) -> fsw rs2', offset[6:2](rs1')*/ @@ -1665,340 +505,173 @@ static void decode_RV32_64C0(DisasContext *ctx) } } -static void decode_RV32_64C1(DisasContext *ctx) +static void decode_RV32_64C(DisasContext *ctx) { - uint8_t funct3 = extract32(ctx->opcode, 13, 3); - uint8_t rd_rs1 = GET_C_RS1(ctx->opcode); - uint8_t rs1s, rs2s; - uint8_t funct2; + uint8_t op = extract32(ctx->opcode, 0, 2); - switch (funct3) { + switch (op) { case 0: - /* C.ADDI -> addi rd, rd, nzimm[5:0] */ - gen_arith_imm(ctx, OPC_RISC_ADDI, rd_rs1, rd_rs1, - GET_C_IMM(ctx->opcode)); - break; - case 1: -#if defined(TARGET_RISCV64) - /* C.ADDIW (RV64/128) -> addiw rd, rd, imm[5:0]*/ - gen_arith_imm(ctx, OPC_RISC_ADDIW, rd_rs1, rd_rs1, - GET_C_IMM(ctx->opcode)); -#else - /* C.JAL(RV32) -> jal x1, offset[11:1] */ - gen_jal(ctx, 1, GET_C_J_IMM(ctx->opcode)); -#endif - break; - case 2: - /* C.LI -> addi rd, x0, imm[5:0]*/ - gen_arith_imm(ctx, OPC_RISC_ADDI, rd_rs1, 0, GET_C_IMM(ctx->opcode)); - break; - case 3: - if (rd_rs1 == 2) { - /* C.ADDI16SP -> addi x2, x2, nzimm[9:4]*/ - gen_arith_imm(ctx, OPC_RISC_ADDI, 2, 2, - GET_C_ADDI16SP_IMM(ctx->opcode)); - } else if (rd_rs1 != 0) { - /* C.LUI (rs1/rd =/= {0,2}) -> lui rd, nzimm[17:12]*/ - tcg_gen_movi_tl(cpu_gpr[rd_rs1], - GET_C_IMM(ctx->opcode) << 12); - } - break; - case 4: - funct2 = extract32(ctx->opcode, 10, 2); - rs1s = GET_C_RS1S(ctx->opcode); - switch (funct2) { - case 0: /* C.SRLI(RV32) -> srli rd', rd', shamt[5:0] */ - gen_arith_imm(ctx, OPC_RISC_SHIFT_RIGHT_I, rs1s, rs1s, - GET_C_ZIMM(ctx->opcode)); - /* C.SRLI64(RV128) */ - break; - case 1: - /* C.SRAI -> srai rd', rd', shamt[5:0]*/ - gen_arith_imm(ctx, OPC_RISC_SHIFT_RIGHT_I, rs1s, rs1s, - GET_C_ZIMM(ctx->opcode) | 0x400); - /* C.SRAI64(RV128) */ - break; - case 2: - /* C.ANDI -> andi rd', rd', imm[5:0]*/ - gen_arith_imm(ctx, OPC_RISC_ANDI, rs1s, rs1s, - GET_C_IMM(ctx->opcode)); - break; - case 3: - funct2 = extract32(ctx->opcode, 5, 2); - rs2s = GET_C_RS2S(ctx->opcode); - switch (funct2) { - case 0: - /* C.SUB -> sub rd', rd', rs2' */ - if (extract32(ctx->opcode, 12, 1) == 0) { - gen_arith(ctx, OPC_RISC_SUB, rs1s, rs1s, rs2s); - } -#if defined(TARGET_RISCV64) - else { - gen_arith(ctx, OPC_RISC_SUBW, rs1s, rs1s, rs2s); - } -#endif - break; - case 1: - /* C.XOR -> xor rs1', rs1', rs2' */ - if (extract32(ctx->opcode, 12, 1) == 0) { - gen_arith(ctx, OPC_RISC_XOR, rs1s, rs1s, rs2s); - } -#if defined(TARGET_RISCV64) - else { - /* C.ADDW (RV64/128) */ - gen_arith(ctx, OPC_RISC_ADDW, rs1s, rs1s, rs2s); - } -#endif - break; - case 2: - /* C.OR -> or rs1', rs1', rs2' */ - gen_arith(ctx, OPC_RISC_OR, rs1s, rs1s, rs2s); - break; - case 3: - /* C.AND -> and rs1', rs1', rs2' */ - gen_arith(ctx, OPC_RISC_AND, rs1s, rs1s, rs2s); - break; - } - break; - } - break; - case 5: - /* C.J -> jal x0, offset[11:1]*/ - gen_jal(ctx, 0, GET_C_J_IMM(ctx->opcode)); - break; - case 6: - /* C.BEQZ -> beq rs1', x0, offset[8:1]*/ - rs1s = GET_C_RS1S(ctx->opcode); - gen_branch(ctx, OPC_RISC_BEQ, rs1s, 0, GET_C_B_IMM(ctx->opcode)); - break; - case 7: - /* C.BNEZ -> bne rs1', x0, offset[8:1]*/ - rs1s = GET_C_RS1S(ctx->opcode); - gen_branch(ctx, OPC_RISC_BNE, rs1s, 0, GET_C_B_IMM(ctx->opcode)); + decode_RV32_64C0(ctx); break; } } -static void decode_RV32_64C2(DisasContext *ctx) +#define EX_SH(amount) \ + static int ex_shift_##amount(int imm) \ + { \ + return imm << amount; \ + } +EX_SH(1) +EX_SH(2) +EX_SH(3) +EX_SH(4) +EX_SH(12) + +#define REQUIRE_EXT(ctx, ext) do { \ + if (!has_ext(ctx, ext)) { \ + return false; \ + } \ +} while (0) + +static int ex_rvc_register(int reg) { - uint8_t rd, rs2; - uint8_t funct3 = extract32(ctx->opcode, 13, 3); + return 8 + reg; +} +bool decode_insn32(DisasContext *ctx, uint32_t insn); +/* Include the auto-generated decoder for 32 bit insn */ +#include "decode_insn32.inc.c" - rd = GET_RD(ctx->opcode); +static bool gen_arith_imm(DisasContext *ctx, arg_i *a, + void(*func)(TCGv, TCGv, TCGv)) +{ + TCGv source1, source2; + source1 = tcg_temp_new(); + source2 = tcg_temp_new(); - switch (funct3) { - case 0: /* C.SLLI -> slli rd, rd, shamt[5:0] - C.SLLI64 -> */ - gen_arith_imm(ctx, OPC_RISC_SLLI, rd, rd, GET_C_ZIMM(ctx->opcode)); - break; - case 1: /* C.FLDSP(RV32/64DC) -> fld rd, offset[8:3](x2) */ - gen_fp_load(ctx, OPC_RISC_FLD, rd, 2, GET_C_LDSP_IMM(ctx->opcode)); - break; - case 2: /* C.LWSP -> lw rd, offset[7:2](x2) */ - gen_load(ctx, OPC_RISC_LW, rd, 2, GET_C_LWSP_IMM(ctx->opcode)); - break; - case 3: -#if defined(TARGET_RISCV64) - /* C.LDSP(RVC64) -> ld rd, offset[8:3](x2) */ - gen_load(ctx, OPC_RISC_LD, rd, 2, GET_C_LDSP_IMM(ctx->opcode)); -#else - /* C.FLWSP(RV32FC) -> flw rd, offset[7:2](x2) */ - gen_fp_load(ctx, OPC_RISC_FLW, rd, 2, GET_C_LWSP_IMM(ctx->opcode)); -#endif - break; - case 4: - rs2 = GET_C_RS2(ctx->opcode); - - if (extract32(ctx->opcode, 12, 1) == 0) { - if (rs2 == 0) { - /* C.JR -> jalr x0, rs1, 0*/ - gen_jalr(ctx, OPC_RISC_JALR, 0, rd, 0); - } else { - /* C.MV -> add rd, x0, rs2 */ - gen_arith(ctx, OPC_RISC_ADD, rd, 0, rs2); - } - } else { - if (rd == 0) { - /* C.EBREAK -> ebreak*/ - gen_system(ctx, OPC_RISC_ECALL, 0, 0, 0x1); - } else { - if (rs2 == 0) { - /* C.JALR -> jalr x1, rs1, 0*/ - gen_jalr(ctx, OPC_RISC_JALR, 1, rd, 0); - } else { - /* C.ADD -> add rd, rd, rs2 */ - gen_arith(ctx, OPC_RISC_ADD, rd, rd, rs2); - } - } - } - break; - case 5: - /* C.FSDSP -> fsd rs2, offset[8:3](x2)*/ - gen_fp_store(ctx, OPC_RISC_FSD, 2, GET_C_RS2(ctx->opcode), - GET_C_SDSP_IMM(ctx->opcode)); - /* C.SQSP */ - break; - case 6: /* C.SWSP -> sw rs2, offset[7:2](x2)*/ - gen_store(ctx, OPC_RISC_SW, 2, GET_C_RS2(ctx->opcode), - GET_C_SWSP_IMM(ctx->opcode)); - break; - case 7: -#if defined(TARGET_RISCV64) - /* C.SDSP(Rv64/128) -> sd rs2, offset[8:3](x2)*/ - gen_store(ctx, OPC_RISC_SD, 2, GET_C_RS2(ctx->opcode), - GET_C_SDSP_IMM(ctx->opcode)); -#else - /* C.FSWSP(RV32) -> fsw rs2, offset[7:2](x2) */ - gen_fp_store(ctx, OPC_RISC_FSW, 2, GET_C_RS2(ctx->opcode), - GET_C_SWSP_IMM(ctx->opcode)); -#endif - break; - } + gen_get_gpr(source1, a->rs1); + tcg_gen_movi_tl(source2, a->imm); + + (*func)(source1, source1, source2); + + gen_set_gpr(a->rd, source1); + tcg_temp_free(source1); + tcg_temp_free(source2); + return true; } -static void decode_RV32_64C(DisasContext *ctx) +#ifdef TARGET_RISCV64 +static void gen_addw(TCGv ret, TCGv arg1, TCGv arg2) { - uint8_t op = extract32(ctx->opcode, 0, 2); + tcg_gen_add_tl(ret, arg1, arg2); + tcg_gen_ext32s_tl(ret, ret); +} - switch (op) { - case 0: - decode_RV32_64C0(ctx); - break; - case 1: - decode_RV32_64C1(ctx); - break; - case 2: - decode_RV32_64C2(ctx); - break; - } +static void gen_subw(TCGv ret, TCGv arg1, TCGv arg2) +{ + tcg_gen_sub_tl(ret, arg1, arg2); + tcg_gen_ext32s_tl(ret, ret); } -static void decode_RV32_64G(DisasContext *ctx) +static void gen_mulw(TCGv ret, TCGv arg1, TCGv arg2) { - int rs1; - int rs2; - int rd; - uint32_t op; - target_long imm; - - /* We do not do misaligned address check here: the address should never be - * misaligned at this point. Instructions that set PC must do the check, - * since epc must be the address of the instruction that caused us to - * perform the misaligned instruction fetch */ - - op = MASK_OP_MAJOR(ctx->opcode); - rs1 = GET_RS1(ctx->opcode); - rs2 = GET_RS2(ctx->opcode); - rd = GET_RD(ctx->opcode); - imm = GET_IMM(ctx->opcode); + tcg_gen_mul_tl(ret, arg1, arg2); + tcg_gen_ext32s_tl(ret, ret); +} + +static bool gen_arith_div_w(DisasContext *ctx, arg_r *a, + void(*func)(TCGv, TCGv, TCGv)) +{ + TCGv source1, source2; + source1 = tcg_temp_new(); + source2 = tcg_temp_new(); + + gen_get_gpr(source1, a->rs1); + gen_get_gpr(source2, a->rs2); + tcg_gen_ext32s_tl(source1, source1); + tcg_gen_ext32s_tl(source2, source2); + + (*func)(source1, source1, source2); + + tcg_gen_ext32s_tl(source1, source1); + gen_set_gpr(a->rd, source1); + tcg_temp_free(source1); + tcg_temp_free(source2); + return true; +} + +static bool gen_arith_div_uw(DisasContext *ctx, arg_r *a, + void(*func)(TCGv, TCGv, TCGv)) +{ + TCGv source1, source2; + source1 = tcg_temp_new(); + source2 = tcg_temp_new(); + + gen_get_gpr(source1, a->rs1); + gen_get_gpr(source2, a->rs2); + tcg_gen_ext32u_tl(source1, source1); + tcg_gen_ext32u_tl(source2, source2); + + (*func)(source1, source1, source2); + + tcg_gen_ext32s_tl(source1, source1); + gen_set_gpr(a->rd, source1); + tcg_temp_free(source1); + tcg_temp_free(source2); + return true; +} - switch (op) { - case OPC_RISC_LUI: - if (rd == 0) { - break; /* NOP */ - } - tcg_gen_movi_tl(cpu_gpr[rd], sextract64(ctx->opcode, 12, 20) << 12); - break; - case OPC_RISC_AUIPC: - if (rd == 0) { - break; /* NOP */ - } - tcg_gen_movi_tl(cpu_gpr[rd], (sextract64(ctx->opcode, 12, 20) << 12) + - ctx->base.pc_next); - break; - case OPC_RISC_JAL: - imm = GET_JAL_IMM(ctx->opcode); - gen_jal(ctx, rd, imm); - break; - case OPC_RISC_JALR: - gen_jalr(ctx, MASK_OP_JALR(ctx->opcode), rd, rs1, imm); - break; - case OPC_RISC_BRANCH: - gen_branch(ctx, MASK_OP_BRANCH(ctx->opcode), rs1, rs2, - GET_B_IMM(ctx->opcode)); - break; - case OPC_RISC_LOAD: - gen_load(ctx, MASK_OP_LOAD(ctx->opcode), rd, rs1, imm); - break; - case OPC_RISC_STORE: - gen_store(ctx, MASK_OP_STORE(ctx->opcode), rs1, rs2, - GET_STORE_IMM(ctx->opcode)); - break; - case OPC_RISC_ARITH_IMM: -#if defined(TARGET_RISCV64) - case OPC_RISC_ARITH_IMM_W: -#endif - if (rd == 0) { - break; /* NOP */ - } - gen_arith_imm(ctx, MASK_OP_ARITH_IMM(ctx->opcode), rd, rs1, imm); - break; - case OPC_RISC_ARITH: -#if defined(TARGET_RISCV64) - case OPC_RISC_ARITH_W: #endif - if (rd == 0) { - break; /* NOP */ - } - gen_arith(ctx, MASK_OP_ARITH(ctx->opcode), rd, rs1, rs2); - break; - case OPC_RISC_FP_LOAD: - gen_fp_load(ctx, MASK_OP_FP_LOAD(ctx->opcode), rd, rs1, imm); - break; - case OPC_RISC_FP_STORE: - gen_fp_store(ctx, MASK_OP_FP_STORE(ctx->opcode), rs1, rs2, - GET_STORE_IMM(ctx->opcode)); - break; - case OPC_RISC_ATOMIC: - if (!has_ext(ctx, RVA)) { - goto do_illegal; - } - gen_atomic(ctx, MASK_OP_ATOMIC(ctx->opcode), rd, rs1, rs2); - break; - case OPC_RISC_FMADD: - gen_fp_fmadd(ctx, MASK_OP_FP_FMADD(ctx->opcode), rd, rs1, rs2, - GET_RS3(ctx->opcode), GET_RM(ctx->opcode)); - break; - case OPC_RISC_FMSUB: - gen_fp_fmsub(ctx, MASK_OP_FP_FMSUB(ctx->opcode), rd, rs1, rs2, - GET_RS3(ctx->opcode), GET_RM(ctx->opcode)); - break; - case OPC_RISC_FNMSUB: - gen_fp_fnmsub(ctx, MASK_OP_FP_FNMSUB(ctx->opcode), rd, rs1, rs2, - GET_RS3(ctx->opcode), GET_RM(ctx->opcode)); - break; - case OPC_RISC_FNMADD: - gen_fp_fnmadd(ctx, MASK_OP_FP_FNMADD(ctx->opcode), rd, rs1, rs2, - GET_RS3(ctx->opcode), GET_RM(ctx->opcode)); - break; - case OPC_RISC_FP_ARITH: - gen_fp_arith(ctx, MASK_OP_FP_ARITH(ctx->opcode), rd, rs1, rs2, - GET_RM(ctx->opcode)); - break; - case OPC_RISC_FENCE: - if (ctx->opcode & 0x1000) { - /* FENCE_I is a no-op in QEMU, - * however we need to end the translation block */ - tcg_gen_movi_tl(cpu_pc, ctx->pc_succ_insn); - tcg_gen_exit_tb(NULL, 0); - ctx->base.is_jmp = DISAS_NORETURN; - } else { - /* FENCE is a full memory barrier. */ - tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); - } - break; - case OPC_RISC_SYSTEM: - gen_system(ctx, MASK_OP_SYSTEM(ctx->opcode), rd, rs1, - (ctx->opcode & 0xFFF00000) >> 20); - break; - do_illegal: - default: - gen_exception_illegal(ctx); - break; - } + +static bool gen_arith(DisasContext *ctx, arg_r *a, + void(*func)(TCGv, TCGv, TCGv)) +{ + TCGv source1, source2; + source1 = tcg_temp_new(); + source2 = tcg_temp_new(); + + gen_get_gpr(source1, a->rs1); + gen_get_gpr(source2, a->rs2); + + (*func)(source1, source1, source2); + + gen_set_gpr(a->rd, source1); + tcg_temp_free(source1); + tcg_temp_free(source2); + return true; +} + +static bool gen_shift(DisasContext *ctx, arg_r *a, + void(*func)(TCGv, TCGv, TCGv)) +{ + TCGv source1 = tcg_temp_new(); + TCGv source2 = tcg_temp_new(); + + gen_get_gpr(source1, a->rs1); + gen_get_gpr(source2, a->rs2); + + tcg_gen_andi_tl(source2, source2, TARGET_LONG_BITS - 1); + (*func)(source1, source1, source2); + + gen_set_gpr(a->rd, source1); + tcg_temp_free(source1); + tcg_temp_free(source2); + return true; } +/* Include insn module translation function */ +#include "insn_trans/trans_rvi.inc.c" +#include "insn_trans/trans_rvm.inc.c" +#include "insn_trans/trans_rva.inc.c" +#include "insn_trans/trans_rvf.inc.c" +#include "insn_trans/trans_rvd.inc.c" +#include "insn_trans/trans_privileged.inc.c" + +bool decode_insn16(DisasContext *ctx, uint16_t insn); +/* auto-generated decoder*/ +#include "decode_insn16.inc.c" +#include "insn_trans/trans_rvc.inc.c" + static void decode_opc(DisasContext *ctx) { /* check for compressed insn */ @@ -2007,11 +680,16 @@ static void decode_opc(DisasContext *ctx) gen_exception_illegal(ctx); } else { ctx->pc_succ_insn = ctx->base.pc_next + 2; - decode_RV32_64C(ctx); + if (!decode_insn16(ctx, ctx->opcode)) { + /* fall back to old decoder */ + decode_RV32_64C(ctx); + } } } else { ctx->pc_succ_insn = ctx->base.pc_next + 4; - decode_RV32_64G(ctx); + if (!decode_insn32(ctx, ctx->opcode)) { + gen_exception_illegal(ctx); + } } } @@ -2105,11 +783,11 @@ static const TranslatorOps riscv_tr_ops = { .disas_log = riscv_tr_disas_log, }; -void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { DisasContext ctx; - translator_loop(&riscv_tr_ops, &ctx.base, cs, tb); + translator_loop(&riscv_tr_ops, &ctx.base, cs, tb, max_insns); } void riscv_translate_init(void) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 698dd9cb82..b58ef0a8ef 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -399,6 +399,13 @@ int s390_set_memory_limit(uint64_t new_limit, uint64_t *hw_limit) return 0; } +void s390_set_max_pagesize(uint64_t pagesize, Error **errp) +{ + if (kvm_enabled()) { + kvm_s390_set_max_pagesize(pagesize, errp); + } +} + void s390_cmma_reset(void) { if (kvm_enabled()) { diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index cb6d77053a..7305cacc7b 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -734,6 +734,7 @@ static inline void s390_do_cpu_load_normal(CPUState *cs, run_on_cpu_data arg) /* cpu.c */ void s390_crypto_reset(void); int s390_set_memory_limit(uint64_t new_limit, uint64_t *hw_limit); +void s390_set_max_pagesize(uint64_t pagesize, Error **errp); void s390_cmma_reset(void); void s390_enable_css_support(S390CPU *cpu); int s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch_id, @@ -753,7 +754,7 @@ static inline uint8_t s390_cpu_get_state(S390CPU *cpu) /* cpu_models.c */ -void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf); +void s390_cpu_list(void); #define cpu_list s390_cpu_list void s390_set_qemu_cpu_model(uint16_t type, uint8_t gen, uint8_t ec_ga, const S390FeatInit feat_init); diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c index eb125d4d0d..e5afa15512 100644 --- a/target/s390x/cpu_models.c +++ b/target/s390x/cpu_models.c @@ -18,6 +18,7 @@ #include "qapi/error.h" #include "qapi/visitor.h" #include "qemu/error-report.h" +#include "qemu/qemu-print.h" #include "qapi/qmp/qerror.h" #include "qapi/qobject-input-visitor.h" #include "qapi/qmp/qdict.h" @@ -308,7 +309,6 @@ const S390CPUDef *s390_find_cpu_def(uint16_t type, uint8_t gen, uint8_t ec_ga, static void s390_print_cpu_model_list_entry(gpointer data, gpointer user_data) { - CPUListState *s = user_data; const S390CPUClass *scc = S390_CPU_CLASS((ObjectClass *)data); char *name = g_strdup(object_class_get_name((ObjectClass *)data)); const char *details = ""; @@ -321,8 +321,7 @@ static void s390_print_cpu_model_list_entry(gpointer data, gpointer user_data) /* strip off the -s390x-cpu */ g_strrstr(name, "-" TYPE_S390_CPU)[0] = 0; - (*s->cpu_fprintf)(s->file, "s390 %-15s %-35s %s\n", name, scc->desc, - details); + qemu_printf("s390 %-15s %-35s %s\n", name, scc->desc, details); g_free(name); } @@ -360,33 +359,29 @@ static gint s390_cpu_list_compare(gconstpointer a, gconstpointer b) return cc_a->is_static ? -1 : 1; } -void s390_cpu_list(FILE *f, fprintf_function print) +void s390_cpu_list(void) { - CPUListState s = { - .file = f, - .cpu_fprintf = print, - }; S390FeatGroup group; S390Feat feat; GSList *list; list = object_class_get_list(TYPE_S390_CPU, false); list = g_slist_sort(list, s390_cpu_list_compare); - g_slist_foreach(list, s390_print_cpu_model_list_entry, &s); + g_slist_foreach(list, s390_print_cpu_model_list_entry, NULL); g_slist_free(list); - (*print)(f, "\nRecognized feature flags:\n"); + qemu_printf("\nRecognized feature flags:\n"); for (feat = 0; feat < S390_FEAT_MAX; feat++) { const S390FeatDef *def = s390_feat_def(feat); - (*print)(f, "%-20s %-50s\n", def->name, def->desc); + qemu_printf("%-20s %-50s\n", def->name, def->desc); } - (*print)(f, "\nRecognized feature groups:\n"); + qemu_printf("\nRecognized feature groups:\n"); for (group = 0; group < S390_FEAT_GROUP_MAX; group++) { const S390FeatGroupDef *def = s390_feat_group_def(group); - (*print)(f, "%-20s %-50s\n", def->name, def->desc); + qemu_printf("%-20s %-50s\n", def->name, def->desc); } } diff --git a/target/s390x/helper.c b/target/s390x/helper.c index 8e9573221c..f957a2c830 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -23,6 +23,7 @@ #include "internal.h" #include "exec/gdbstub.h" #include "qemu/timer.h" +#include "qemu/qemu-print.h" #include "hw/s390x/ioinst.h" #include "sysemu/hw_accel.h" #ifndef CONFIG_USER_ONLY @@ -313,65 +314,64 @@ int s390_store_adtl_status(S390CPU *cpu, hwaddr addr, hwaddr len) } #endif /* CONFIG_USER_ONLY */ -void s390_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags) +void s390_cpu_dump_state(CPUState *cs, FILE *f, int flags) { S390CPU *cpu = S390_CPU(cs); CPUS390XState *env = &cpu->env; int i; if (env->cc_op > 3) { - cpu_fprintf(f, "PSW=mask %016" PRIx64 " addr %016" PRIx64 " cc %15s\n", - env->psw.mask, env->psw.addr, cc_name(env->cc_op)); + qemu_fprintf(f, "PSW=mask %016" PRIx64 " addr %016" PRIx64 " cc %15s\n", + env->psw.mask, env->psw.addr, cc_name(env->cc_op)); } else { - cpu_fprintf(f, "PSW=mask %016" PRIx64 " addr %016" PRIx64 " cc %02x\n", - env->psw.mask, env->psw.addr, env->cc_op); + qemu_fprintf(f, "PSW=mask %016" PRIx64 " addr %016" PRIx64 " cc %02x\n", + env->psw.mask, env->psw.addr, env->cc_op); } for (i = 0; i < 16; i++) { - cpu_fprintf(f, "R%02d=%016" PRIx64, i, env->regs[i]); + qemu_fprintf(f, "R%02d=%016" PRIx64, i, env->regs[i]); if ((i % 4) == 3) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } else { - cpu_fprintf(f, " "); + qemu_fprintf(f, " "); } } if (flags & CPU_DUMP_FPU) { if (s390_has_feat(S390_FEAT_VECTOR)) { for (i = 0; i < 32; i++) { - cpu_fprintf(f, "V%02d=%016" PRIx64 "%016" PRIx64 "%c", - i, env->vregs[i][0].ll, env->vregs[i][1].ll, - i % 2 ? '\n' : ' '); + qemu_fprintf(f, "V%02d=%016" PRIx64 "%016" PRIx64 "%c", + i, env->vregs[i][0].ll, env->vregs[i][1].ll, + i % 2 ? '\n' : ' '); } } else { for (i = 0; i < 16; i++) { - cpu_fprintf(f, "F%02d=%016" PRIx64 "%c", - i, get_freg(env, i)->ll, - (i % 4) == 3 ? '\n' : ' '); + qemu_fprintf(f, "F%02d=%016" PRIx64 "%c", + i, get_freg(env, i)->ll, + (i % 4) == 3 ? '\n' : ' '); } } } #ifndef CONFIG_USER_ONLY for (i = 0; i < 16; i++) { - cpu_fprintf(f, "C%02d=%016" PRIx64, i, env->cregs[i]); + qemu_fprintf(f, "C%02d=%016" PRIx64, i, env->cregs[i]); if ((i % 4) == 3) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } else { - cpu_fprintf(f, " "); + qemu_fprintf(f, " "); } } #endif #ifdef DEBUG_INLINE_BRANCHES for (i = 0; i < CC_OP_MAX; i++) { - cpu_fprintf(f, " %15s = %10ld\t%10ld\n", cc_name(i), - inline_branch_miss[i], inline_branch_hit[i]); + qemu_fprintf(f, " %15s = %10ld\t%10ld\n", cc_name(i), + inline_branch_miss[i], inline_branch_hit[i]); } #endif - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } const char *cc_name(enum cc_op cc_op) diff --git a/target/s390x/internal.h b/target/s390x/internal.h index 3b4855c175..26575f2130 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -292,8 +292,7 @@ void s390_cpu_gdb_init(CPUState *cs); /* helper.c */ -void s390_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, - int flags); +void s390_cpu_dump_state(CPUState *cpu, FILE *f, int flags); hwaddr s390_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); hwaddr s390_cpu_get_phys_addr_debug(CPUState *cpu, vaddr addr); uint64_t get_psw_mask(CPUS390XState *env); diff --git a/target/s390x/kvm-stub.c b/target/s390x/kvm-stub.c index bf7795e47a..22b4514ca6 100644 --- a/target/s390x/kvm-stub.c +++ b/target/s390x/kvm-stub.c @@ -93,6 +93,10 @@ int kvm_s390_set_mem_limit(uint64_t new_limit, uint64_t *hw_limit) return 0; } +void kvm_s390_set_max_pagesize(uint64_t pagesize, Error **errp) +{ +} + void kvm_s390_crypto_reset(void) { } diff --git a/target/s390x/kvm.c b/target/s390x/kvm.c index 19530fb94e..7df7be4a1b 100644 --- a/target/s390x/kvm.c +++ b/target/s390x/kvm.c @@ -283,44 +283,37 @@ void kvm_s390_crypto_reset(void) } } -static int kvm_s390_configure_mempath_backing(KVMState *s) +void kvm_s390_set_max_pagesize(uint64_t pagesize, Error **errp) { - size_t path_psize = qemu_getrampagesize(); - - if (path_psize == 4 * KiB) { - return 0; + if (pagesize == 4 * KiB) { + return; } if (!hpage_1m_allowed()) { - error_report("This QEMU machine does not support huge page " - "mappings"); - return -EINVAL; + error_setg(errp, "This QEMU machine does not support huge page " + "mappings"); + return; } - if (path_psize != 1 * MiB) { - error_report("Memory backing with 2G pages was specified, " - "but KVM does not support this memory backing"); - return -EINVAL; + if (pagesize != 1 * MiB) { + error_setg(errp, "Memory backing with 2G pages was specified, " + "but KVM does not support this memory backing"); + return; } - if (kvm_vm_enable_cap(s, KVM_CAP_S390_HPAGE_1M, 0)) { - error_report("Memory backing with 1M pages was specified, " - "but KVM does not support this memory backing"); - return -EINVAL; + if (kvm_vm_enable_cap(kvm_state, KVM_CAP_S390_HPAGE_1M, 0)) { + error_setg(errp, "Memory backing with 1M pages was specified, " + "but KVM does not support this memory backing"); + return; } cap_hpage_1m = 1; - return 0; } int kvm_arch_init(MachineState *ms, KVMState *s) { MachineClass *mc = MACHINE_GET_CLASS(ms); - if (kvm_s390_configure_mempath_backing(s)) { - return -EINVAL; - } - mc->default_cpu_type = S390_CPU_TYPE_NAME("host"); cap_sync_regs = kvm_check_extension(s, KVM_CAP_SYNC_REGS); cap_async_pf = kvm_check_extension(s, KVM_CAP_ASYNC_PF); @@ -782,7 +775,7 @@ int kvm_s390_mem_op(S390CPU *cpu, vaddr addr, uint8_t ar, void *hostbuf, ret = kvm_vcpu_ioctl(CPU(cpu), KVM_S390_MEM_OP, &mem_op); if (ret < 0) { - error_printf("KVM_S390_MEM_OP failed: %s\n", strerror(-ret)); + warn_report("KVM_S390_MEM_OP failed: %s", strerror(-ret)); } return ret; } diff --git a/target/s390x/kvm_s390x.h b/target/s390x/kvm_s390x.h index 6e52287da3..caf985955b 100644 --- a/target/s390x/kvm_s390x.h +++ b/target/s390x/kvm_s390x.h @@ -36,6 +36,7 @@ int kvm_s390_cmma_active(void); void kvm_s390_cmma_reset(void); void kvm_s390_reset_vcpu(S390CPU *cpu); int kvm_s390_set_mem_limit(uint64_t new_limit, uint64_t *hw_limit); +void kvm_s390_set_max_pagesize(uint64_t pagesize, Error **errp); void kvm_s390_crypto_reset(void); void kvm_s390_restart_interrupt(S390CPU *cpu); void kvm_s390_stop_interrupt(S390CPU *cpu); diff --git a/target/s390x/trace-events b/target/s390x/trace-events index e509b08799..fda1ee8220 100644 --- a/target/s390x/trace-events +++ b/target/s390x/trace-events @@ -1,25 +1,25 @@ # See docs/devel/tracing.txt for syntax documentation. -# target/s390x/mmu_helper.c +# mmu_helper.c get_skeys_nonzero(int rc) "SKEY: Call to get_skeys unexpectedly returned %d" set_skeys_nonzero(int rc) "SKEY: Call to set_skeys unexpectedly returned %d" -# target/s390x/ioinst.c +# ioinst.c ioinst(const char *insn) "IOINST: %s" ioinst_sch_id(const char *insn, int cssid, int ssid, int schid) "IOINST: %s (%x.%x.%04x)" ioinst_chp_id(const char *insn, int cssid, int chpid) "IOINST: %s (%x.%02x)" ioinst_chsc_cmd(uint16_t cmd, uint16_t len) "IOINST: chsc command 0x%04x, len 0x%04x" -# target/s390x/kvm.c +# kvm.c kvm_enable_cmma(int rc) "CMMA: enabling with result code %d" kvm_clear_cmma(int rc) "CMMA: clearing with result code %d" kvm_failed_cpu_state_set(int cpu_index, uint8_t state, const char *msg) "Warning: Unable to set cpu %d state %" PRIu8 " to KVM: %s" kvm_assign_subch_ioeventfd(int fd, uint32_t addr, bool assign, int datamatch) "fd: %d sch: @0x%x assign: %d vq: %d" -# target/s390x/cpu.c +# cpu.c cpu_set_state(int cpu_index, uint8_t state) "setting cpu %d state to %" PRIu8 cpu_halt(int cpu_index) "halting cpu %d" cpu_unhalt(int cpu_index) "unhalting cpu %d" -# target/s390x/sigp.c +# sigp.c sigp_finished(uint8_t order, int cpu_index, int dst_index, int cc) "SIGP: Finished order %u on cpu %d -> cpu %d with cc=%d" diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 0afa8f7ca5..d4951836ad 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -6552,11 +6552,11 @@ static const TranslatorOps s390x_tr_ops = { .disas_log = s390x_tr_disas_log, }; -void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { DisasContext dc; - translator_loop(&s390x_tr_ops, &dc.base, cs, tb); + translator_loop(&s390x_tr_ops, &dc.base, cs, tb, max_insns); } void restore_state_to_opc(CPUS390XState *env, TranslationBlock *tb, diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index b9f393b7c7..da2799082e 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" +#include "qemu/qemu-print.h" #include "cpu.h" #include "qemu-common.h" #include "migration/vmstate.h" @@ -79,30 +80,20 @@ static void superh_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) info->print_insn = print_insn_sh; } -typedef struct SuperHCPUListState { - fprintf_function cpu_fprintf; - FILE *file; -} SuperHCPUListState; - static void superh_cpu_list_entry(gpointer data, gpointer user_data) { - SuperHCPUListState *s = user_data; const char *typename = object_class_get_name(OBJECT_CLASS(data)); int len = strlen(typename) - strlen(SUPERH_CPU_TYPE_SUFFIX); - (*s->cpu_fprintf)(s->file, "%.*s\n", len, typename); + qemu_printf("%.*s\n", len, typename); } -void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf) +void sh4_cpu_list(void) { - SuperHCPUListState s = { - .cpu_fprintf = cpu_fprintf, - .file = f, - }; GSList *list; list = object_class_get_list_sorted(TYPE_SUPERH_CPU, false); - g_slist_foreach(list, superh_cpu_list_entry, &s); + g_slist_foreach(list, superh_cpu_list_entry, NULL); g_slist_free(list); } diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 775b5743bf..84b08ff640 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -232,8 +232,7 @@ static inline SuperHCPU *sh_env_get_cpu(CPUSH4State *env) void superh_cpu_do_interrupt(CPUState *cpu); bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req); -void superh_cpu_dump_state(CPUState *cpu, FILE *f, - fprintf_function cpu_fprintf, int flags); +void superh_cpu_dump_state(CPUState *cpu, FILE *f, int flags); hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int superh_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int superh_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); @@ -247,7 +246,7 @@ int cpu_sh4_signal_handler(int host_signum, void *pinfo, int superh_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); -void sh4_cpu_list(FILE *f, fprintf_function cpu_fprintf); +void sh4_cpu_list(void); #if !defined(CONFIG_USER_ONLY) void cpu_sh4_invalidate_tlb(CPUSH4State *s); uint32_t cpu_sh4_read_mmaped_itlb_addr(CPUSH4State *s, diff --git a/target/sh4/translate.c b/target/sh4/translate.c index ab254b0e8d..cdf0888490 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -30,6 +30,7 @@ #include "exec/translator.h" #include "trace-tcg.h" #include "exec/log.h" +#include "qemu/qemu-print.h" typedef struct DisasContext { @@ -156,32 +157,32 @@ void sh4_translate_init(void) fregnames[i]); } -void superh_cpu_dump_state(CPUState *cs, FILE *f, - fprintf_function cpu_fprintf, int flags) +void superh_cpu_dump_state(CPUState *cs, FILE *f, int flags) { SuperHCPU *cpu = SUPERH_CPU(cs); CPUSH4State *env = &cpu->env; int i; - cpu_fprintf(f, "pc=0x%08x sr=0x%08x pr=0x%08x fpscr=0x%08x\n", - env->pc, cpu_read_sr(env), env->pr, env->fpscr); - cpu_fprintf(f, "spc=0x%08x ssr=0x%08x gbr=0x%08x vbr=0x%08x\n", - env->spc, env->ssr, env->gbr, env->vbr); - cpu_fprintf(f, "sgr=0x%08x dbr=0x%08x delayed_pc=0x%08x fpul=0x%08x\n", - env->sgr, env->dbr, env->delayed_pc, env->fpul); + + qemu_fprintf(f, "pc=0x%08x sr=0x%08x pr=0x%08x fpscr=0x%08x\n", + env->pc, cpu_read_sr(env), env->pr, env->fpscr); + qemu_fprintf(f, "spc=0x%08x ssr=0x%08x gbr=0x%08x vbr=0x%08x\n", + env->spc, env->ssr, env->gbr, env->vbr); + qemu_fprintf(f, "sgr=0x%08x dbr=0x%08x delayed_pc=0x%08x fpul=0x%08x\n", + env->sgr, env->dbr, env->delayed_pc, env->fpul); for (i = 0; i < 24; i += 4) { - cpu_fprintf(f, "r%d=0x%08x r%d=0x%08x r%d=0x%08x r%d=0x%08x\n", + qemu_printf("r%d=0x%08x r%d=0x%08x r%d=0x%08x r%d=0x%08x\n", i, env->gregs[i], i + 1, env->gregs[i + 1], i + 2, env->gregs[i + 2], i + 3, env->gregs[i + 3]); } if (env->flags & DELAY_SLOT) { - cpu_fprintf(f, "in delay slot (delayed_pc=0x%08x)\n", + qemu_printf("in delay slot (delayed_pc=0x%08x)\n", env->delayed_pc); } else if (env->flags & DELAY_SLOT_CONDITIONAL) { - cpu_fprintf(f, "in conditional delay slot (delayed_pc=0x%08x)\n", + qemu_printf("in conditional delay slot (delayed_pc=0x%08x)\n", env->delayed_pc); } else if (env->flags & DELAY_SLOT_RTE) { - cpu_fprintf(f, "in rte delay slot (delayed_pc=0x%08x)\n", - env->delayed_pc); + qemu_fprintf(f, "in rte delay slot (delayed_pc=0x%08x)\n", + env->delayed_pc); } } @@ -2382,11 +2383,11 @@ static const TranslatorOps sh4_tr_ops = { .disas_log = sh4_tr_disas_log, }; -void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { DisasContext ctx; - translator_loop(&sh4_tr_ops, &ctx.base, cs, tb); + translator_loop(&sh4_tr_ops, &ctx.base, cs, tb, max_insns); } void restore_state_to_opc(CPUSH4State *env, TranslationBlock *tb, diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 4a4445bdf5..4654c2a6a0 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -20,7 +20,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "cpu.h" -#include "qemu/error-report.h" +#include "qemu/qemu-print.h" #include "exec/exec-all.h" #include "hw/qdev-properties.h" #include "qapi/visitor.h" @@ -556,55 +556,51 @@ static const char * const feature_name[] = { "gl", }; -static void print_features(FILE *f, fprintf_function cpu_fprintf, - uint32_t features, const char *prefix) +static void print_features(uint32_t features, const char *prefix) { unsigned int i; for (i = 0; i < ARRAY_SIZE(feature_name); i++) { if (feature_name[i] && (features & (1 << i))) { if (prefix) { - (*cpu_fprintf)(f, "%s", prefix); + qemu_printf("%s", prefix); } - (*cpu_fprintf)(f, "%s ", feature_name[i]); + qemu_printf("%s ", feature_name[i]); } } } -void sparc_cpu_list(FILE *f, fprintf_function cpu_fprintf) +void sparc_cpu_list(void) { unsigned int i; for (i = 0; i < ARRAY_SIZE(sparc_defs); i++) { - (*cpu_fprintf)(f, "Sparc %16s IU " TARGET_FMT_lx - " FPU %08x MMU %08x NWINS %d ", - sparc_defs[i].name, - sparc_defs[i].iu_version, - sparc_defs[i].fpu_version, - sparc_defs[i].mmu_version, - sparc_defs[i].nwindows); - print_features(f, cpu_fprintf, CPU_DEFAULT_FEATURES & - ~sparc_defs[i].features, "-"); - print_features(f, cpu_fprintf, ~CPU_DEFAULT_FEATURES & - sparc_defs[i].features, "+"); - (*cpu_fprintf)(f, "\n"); + qemu_printf("Sparc %16s IU " TARGET_FMT_lx + " FPU %08x MMU %08x NWINS %d ", + sparc_defs[i].name, + sparc_defs[i].iu_version, + sparc_defs[i].fpu_version, + sparc_defs[i].mmu_version, + sparc_defs[i].nwindows); + print_features(CPU_DEFAULT_FEATURES & ~sparc_defs[i].features, "-"); + print_features(~CPU_DEFAULT_FEATURES & sparc_defs[i].features, "+"); + qemu_printf("\n"); } - (*cpu_fprintf)(f, "Default CPU feature flags (use '-' to remove): "); - print_features(f, cpu_fprintf, CPU_DEFAULT_FEATURES, NULL); - (*cpu_fprintf)(f, "\n"); - (*cpu_fprintf)(f, "Available CPU feature flags (use '+' to add): "); - print_features(f, cpu_fprintf, ~CPU_DEFAULT_FEATURES, NULL); - (*cpu_fprintf)(f, "\n"); - (*cpu_fprintf)(f, "Numerical features (use '=' to set): iu_version " - "fpu_version mmu_version nwindows\n"); + qemu_printf("Default CPU feature flags (use '-' to remove): "); + print_features(CPU_DEFAULT_FEATURES, NULL); + qemu_printf("\n"); + qemu_printf("Available CPU feature flags (use '+' to add): "); + print_features(~CPU_DEFAULT_FEATURES, NULL); + qemu_printf("\n"); + qemu_printf("Numerical features (use '=' to set): iu_version " + "fpu_version mmu_version nwindows\n"); } -static void cpu_print_cc(FILE *f, fprintf_function cpu_fprintf, - uint32_t cc) +static void cpu_print_cc(FILE *f, uint32_t cc) { - cpu_fprintf(f, "%c%c%c%c", cc & PSR_NEG ? 'N' : '-', - cc & PSR_ZERO ? 'Z' : '-', cc & PSR_OVF ? 'V' : '-', - cc & PSR_CARRY ? 'C' : '-'); + qemu_fprintf(f, "%c%c%c%c", cc & PSR_NEG ? 'N' : '-', + cc & PSR_ZERO ? 'Z' : '-', cc & PSR_OVF ? 'V' : '-', + cc & PSR_CARRY ? 'C' : '-'); } #ifdef TARGET_SPARC64 @@ -613,35 +609,34 @@ static void cpu_print_cc(FILE *f, fprintf_function cpu_fprintf, #define REGS_PER_LINE 8 #endif -void sparc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, - int flags) +void sparc_cpu_dump_state(CPUState *cs, FILE *f, int flags) { SPARCCPU *cpu = SPARC_CPU(cs); CPUSPARCState *env = &cpu->env; int i, x; - cpu_fprintf(f, "pc: " TARGET_FMT_lx " npc: " TARGET_FMT_lx "\n", env->pc, - env->npc); + qemu_fprintf(f, "pc: " TARGET_FMT_lx " npc: " TARGET_FMT_lx "\n", env->pc, + env->npc); for (i = 0; i < 8; i++) { if (i % REGS_PER_LINE == 0) { - cpu_fprintf(f, "%%g%d-%d:", i, i + REGS_PER_LINE - 1); + qemu_fprintf(f, "%%g%d-%d:", i, i + REGS_PER_LINE - 1); } - cpu_fprintf(f, " " TARGET_FMT_lx, env->gregs[i]); + qemu_fprintf(f, " " TARGET_FMT_lx, env->gregs[i]); if (i % REGS_PER_LINE == REGS_PER_LINE - 1) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } } for (x = 0; x < 3; x++) { for (i = 0; i < 8; i++) { if (i % REGS_PER_LINE == 0) { - cpu_fprintf(f, "%%%c%d-%d: ", - x == 0 ? 'o' : (x == 1 ? 'l' : 'i'), - i, i + REGS_PER_LINE - 1); + qemu_fprintf(f, "%%%c%d-%d: ", + x == 0 ? 'o' : (x == 1 ? 'l' : 'i'), + i, i + REGS_PER_LINE - 1); } - cpu_fprintf(f, TARGET_FMT_lx " ", env->regwptr[i + x * 8]); + qemu_fprintf(f, TARGET_FMT_lx " ", env->regwptr[i + x * 8]); if (i % REGS_PER_LINE == REGS_PER_LINE - 1) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } } } @@ -649,42 +644,42 @@ void sparc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, if (flags & CPU_DUMP_FPU) { for (i = 0; i < TARGET_DPREGS; i++) { if ((i & 3) == 0) { - cpu_fprintf(f, "%%f%02d: ", i * 2); + qemu_fprintf(f, "%%f%02d: ", i * 2); } - cpu_fprintf(f, " %016" PRIx64, env->fpr[i].ll); + qemu_fprintf(f, " %016" PRIx64, env->fpr[i].ll); if ((i & 3) == 3) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } } } #ifdef TARGET_SPARC64 - cpu_fprintf(f, "pstate: %08x ccr: %02x (icc: ", env->pstate, - (unsigned)cpu_get_ccr(env)); - cpu_print_cc(f, cpu_fprintf, cpu_get_ccr(env) << PSR_CARRY_SHIFT); - cpu_fprintf(f, " xcc: "); - cpu_print_cc(f, cpu_fprintf, cpu_get_ccr(env) << (PSR_CARRY_SHIFT - 4)); - cpu_fprintf(f, ") asi: %02x tl: %d pil: %x gl: %d\n", env->asi, env->tl, - env->psrpil, env->gl); - cpu_fprintf(f, "tbr: " TARGET_FMT_lx " hpstate: " TARGET_FMT_lx " htba: " - TARGET_FMT_lx "\n", env->tbr, env->hpstate, env->htba); - cpu_fprintf(f, "cansave: %d canrestore: %d otherwin: %d wstate: %d " - "cleanwin: %d cwp: %d\n", - env->cansave, env->canrestore, env->otherwin, env->wstate, - env->cleanwin, env->nwindows - 1 - env->cwp); - cpu_fprintf(f, "fsr: " TARGET_FMT_lx " y: " TARGET_FMT_lx " fprs: " - TARGET_FMT_lx "\n", env->fsr, env->y, env->fprs); + qemu_fprintf(f, "pstate: %08x ccr: %02x (icc: ", env->pstate, + (unsigned)cpu_get_ccr(env)); + cpu_print_cc(f, cpu_get_ccr(env) << PSR_CARRY_SHIFT); + qemu_fprintf(f, " xcc: "); + cpu_print_cc(f, cpu_get_ccr(env) << (PSR_CARRY_SHIFT - 4)); + qemu_fprintf(f, ") asi: %02x tl: %d pil: %x gl: %d\n", env->asi, env->tl, + env->psrpil, env->gl); + qemu_fprintf(f, "tbr: " TARGET_FMT_lx " hpstate: " TARGET_FMT_lx " htba: " + TARGET_FMT_lx "\n", env->tbr, env->hpstate, env->htba); + qemu_fprintf(f, "cansave: %d canrestore: %d otherwin: %d wstate: %d " + "cleanwin: %d cwp: %d\n", + env->cansave, env->canrestore, env->otherwin, env->wstate, + env->cleanwin, env->nwindows - 1 - env->cwp); + qemu_fprintf(f, "fsr: " TARGET_FMT_lx " y: " TARGET_FMT_lx " fprs: " + TARGET_FMT_lx "\n", env->fsr, env->y, env->fprs); #else - cpu_fprintf(f, "psr: %08x (icc: ", cpu_get_psr(env)); - cpu_print_cc(f, cpu_fprintf, cpu_get_psr(env)); - cpu_fprintf(f, " SPE: %c%c%c) wim: %08x\n", env->psrs ? 'S' : '-', - env->psrps ? 'P' : '-', env->psret ? 'E' : '-', - env->wim); - cpu_fprintf(f, "fsr: " TARGET_FMT_lx " y: " TARGET_FMT_lx "\n", - env->fsr, env->y); + qemu_fprintf(f, "psr: %08x (icc: ", cpu_get_psr(env)); + cpu_print_cc(f, cpu_get_psr(env)); + qemu_fprintf(f, " SPE: %c%c%c) wim: %08x\n", env->psrs ? 'S' : '-', + env->psrps ? 'P' : '-', env->psret ? 'E' : '-', + env->wim); + qemu_fprintf(f, "fsr: " TARGET_FMT_lx " y: " TARGET_FMT_lx "\n", + env->fsr, env->y); #endif - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } static void sparc_cpu_set_pc(CPUState *cs, vaddr value) diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 4972ebcfd4..85b9665ccc 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -564,8 +564,7 @@ extern const struct VMStateDescription vmstate_sparc_cpu; #endif void sparc_cpu_do_interrupt(CPUState *cpu); -void sparc_cpu_dump_state(CPUState *cpu, FILE *f, - fprintf_function cpu_fprintf, int flags); +void sparc_cpu_dump_state(CPUState *cpu, FILE *f, int flags); hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int sparc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); @@ -578,12 +577,12 @@ void cpu_raise_exception_ra(CPUSPARCState *, int, uintptr_t) QEMU_NORETURN; #ifndef NO_CPU_IO_DEFS /* cpu_init.c */ void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu); -void sparc_cpu_list(FILE *f, fprintf_function cpu_fprintf); +void sparc_cpu_list(void); /* mmu_helper.c */ int sparc_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size, int rw, int mmu_idx); target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev); -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env); +void dump_mmu(CPUSPARCState *env); #if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) int sparc_cpu_memory_rw_debug(CPUState *cpu, vaddr addr, diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c index 5bc090213c..a7fcb84ac0 100644 --- a/target/sparc/ldst_helper.c +++ b/target/sparc/ldst_helper.c @@ -198,7 +198,7 @@ static void demap_tlb(SparcTLBEntry *tlb, target_ulong demap_addr, replace_tlb_entry(&tlb[i], 0, 0, env1); #ifdef DEBUG_MMU DPRINTF_MMU("%s demap invalidated entry [%02u]\n", strmmu, i); - dump_mmu(stdout, fprintf, env1); + dump_mmu(env1); #endif } } @@ -260,7 +260,7 @@ static void replace_tlb_1bit_lru(SparcTLBEntry *tlb, replace_tlb_entry(&tlb[i], tlb_tag, tlb_tte, env1); #ifdef DEBUG_MMU DPRINTF_MMU("%s lru replaced invalid entry [%i]\n", strmmu, i); - dump_mmu(stdout, fprintf, env1); + dump_mmu(env1); #endif return; } @@ -279,7 +279,7 @@ static void replace_tlb_1bit_lru(SparcTLBEntry *tlb, #ifdef DEBUG_MMU DPRINTF_MMU("%s lru replaced unlocked %s entry [%i]\n", strmmu, (replace_used ? "used" : "unused"), i); - dump_mmu(stdout, fprintf, env1); + dump_mmu(env1); #endif return; } @@ -886,7 +886,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, break; } #ifdef DEBUG_MMU - dump_mmu(stdout, fprintf, env); + dump_mmu(env); #endif } break; @@ -941,7 +941,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, reg, oldreg, env->mmuregs[reg]); } #ifdef DEBUG_MMU - dump_mmu(stdout, fprintf, env); + dump_mmu(env); #endif } break; @@ -1634,7 +1634,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, PRIx64 "\n", reg, oldreg, env->immuregs[reg]); } #ifdef DEBUG_MMU - dump_mmu(stdout, fprintf, env); + dump_mmu(env); #endif return; } @@ -1658,7 +1658,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, } #ifdef DEBUG_MMU DPRINTF_MMU("immu data access replaced entry [%i]\n", i); - dump_mmu(stdout, fprintf, env); + dump_mmu(env); #endif return; } @@ -1718,7 +1718,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, PRIx64 "\n", reg, oldreg, env->dmmuregs[reg]); } #ifdef DEBUG_MMU - dump_mmu(stdout, fprintf, env); + dump_mmu(env); #endif return; } @@ -1740,7 +1740,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val, } #ifdef DEBUG_MMU DPRINTF_MMU("dmmu data access replaced entry [%i]\n", i); - dump_mmu(stdout, fprintf, env); + dump_mmu(env); #endif return; } diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index 135a9c9d9b..afcc5b617d 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "qemu/qemu-print.h" #include "trace.h" /* Sparc MMU emulation */ @@ -320,7 +321,7 @@ target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev) return 0; } -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env) +void dump_mmu(CPUSPARCState *env) { CPUState *cs = CPU(sparc_env_get_cpu(env)); target_ulong va, va1, va2; @@ -330,29 +331,29 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env) pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 2); pde = ldl_phys(cs->as, pde_ptr); - (*cpu_fprintf)(f, "Root ptr: " TARGET_FMT_plx ", ctx: %d\n", - (hwaddr)env->mmuregs[1] << 4, env->mmuregs[2]); + qemu_printf("Root ptr: " TARGET_FMT_plx ", ctx: %d\n", + (hwaddr)env->mmuregs[1] << 4, env->mmuregs[2]); for (n = 0, va = 0; n < 256; n++, va += 16 * 1024 * 1024) { pde = mmu_probe(env, va, 2); if (pde) { pa = cpu_get_phys_page_debug(cs, va); - (*cpu_fprintf)(f, "VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_plx - " PDE: " TARGET_FMT_lx "\n", va, pa, pde); + qemu_printf("VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_plx + " PDE: " TARGET_FMT_lx "\n", va, pa, pde); for (m = 0, va1 = va; m < 64; m++, va1 += 256 * 1024) { pde = mmu_probe(env, va1, 1); if (pde) { pa = cpu_get_phys_page_debug(cs, va1); - (*cpu_fprintf)(f, " VA: " TARGET_FMT_lx ", PA: " - TARGET_FMT_plx " PDE: " TARGET_FMT_lx "\n", - va1, pa, pde); + qemu_printf(" VA: " TARGET_FMT_lx ", PA: " + TARGET_FMT_plx " PDE: " TARGET_FMT_lx "\n", + va1, pa, pde); for (o = 0, va2 = va1; o < 64; o++, va2 += 4 * 1024) { pde = mmu_probe(env, va2, 0); if (pde) { pa = cpu_get_phys_page_debug(cs, va2); - (*cpu_fprintf)(f, " VA: " TARGET_FMT_lx ", PA: " - TARGET_FMT_plx " PTE: " - TARGET_FMT_lx "\n", - va2, pa, pde); + qemu_printf(" VA: " TARGET_FMT_lx ", PA: " + TARGET_FMT_plx " PTE: " + TARGET_FMT_lx "\n", + va2, pa, pde); } } } @@ -739,21 +740,21 @@ int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw, return 1; } -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env) +void dump_mmu(CPUSPARCState *env) { unsigned int i; const char *mask; - (*cpu_fprintf)(f, "MMU contexts: Primary: %" PRId64 ", Secondary: %" - PRId64 "\n", - env->dmmu.mmu_primary_context, - env->dmmu.mmu_secondary_context); - (*cpu_fprintf)(f, "DMMU Tag Access: %" PRIx64 ", TSB Tag Target: %" PRIx64 - "\n", env->dmmu.tag_access, env->dmmu.tsb_tag_target); + qemu_printf("MMU contexts: Primary: %" PRId64 ", Secondary: %" + PRId64 "\n", + env->dmmu.mmu_primary_context, + env->dmmu.mmu_secondary_context); + qemu_printf("DMMU Tag Access: %" PRIx64 ", TSB Tag Target: %" PRIx64 + "\n", env->dmmu.tag_access, env->dmmu.tsb_tag_target); if ((env->lsu & DMMU_E) == 0) { - (*cpu_fprintf)(f, "DMMU disabled\n"); + qemu_printf("DMMU disabled\n"); } else { - (*cpu_fprintf)(f, "DMMU dump\n"); + qemu_printf("DMMU dump\n"); for (i = 0; i < 64; i++) { switch (TTE_PGSIZE(env->dtlb[i].tte)) { default: @@ -771,26 +772,26 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env) break; } if (TTE_IS_VALID(env->dtlb[i].tte)) { - (*cpu_fprintf)(f, "[%02u] VA: %" PRIx64 ", PA: %llx" - ", %s, %s, %s, %s, ctx %" PRId64 " %s\n", - i, - env->dtlb[i].tag & (uint64_t)~0x1fffULL, - TTE_PA(env->dtlb[i].tte), - mask, - TTE_IS_PRIV(env->dtlb[i].tte) ? "priv" : "user", - TTE_IS_W_OK(env->dtlb[i].tte) ? "RW" : "RO", - TTE_IS_LOCKED(env->dtlb[i].tte) ? - "locked" : "unlocked", - env->dtlb[i].tag & (uint64_t)0x1fffULL, - TTE_IS_GLOBAL(env->dtlb[i].tte) ? - "global" : "local"); + qemu_printf("[%02u] VA: %" PRIx64 ", PA: %llx" + ", %s, %s, %s, %s, ctx %" PRId64 " %s\n", + i, + env->dtlb[i].tag & (uint64_t)~0x1fffULL, + TTE_PA(env->dtlb[i].tte), + mask, + TTE_IS_PRIV(env->dtlb[i].tte) ? "priv" : "user", + TTE_IS_W_OK(env->dtlb[i].tte) ? "RW" : "RO", + TTE_IS_LOCKED(env->dtlb[i].tte) ? + "locked" : "unlocked", + env->dtlb[i].tag & (uint64_t)0x1fffULL, + TTE_IS_GLOBAL(env->dtlb[i].tte) ? + "global" : "local"); } } } if ((env->lsu & IMMU_E) == 0) { - (*cpu_fprintf)(f, "IMMU disabled\n"); + qemu_printf("IMMU disabled\n"); } else { - (*cpu_fprintf)(f, "IMMU dump\n"); + qemu_printf("IMMU dump\n"); for (i = 0; i < 64; i++) { switch (TTE_PGSIZE(env->itlb[i].tte)) { default: @@ -808,18 +809,18 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env) break; } if (TTE_IS_VALID(env->itlb[i].tte)) { - (*cpu_fprintf)(f, "[%02u] VA: %" PRIx64 ", PA: %llx" - ", %s, %s, %s, ctx %" PRId64 " %s\n", - i, - env->itlb[i].tag & (uint64_t)~0x1fffULL, - TTE_PA(env->itlb[i].tte), - mask, - TTE_IS_PRIV(env->itlb[i].tte) ? "priv" : "user", - TTE_IS_LOCKED(env->itlb[i].tte) ? - "locked" : "unlocked", - env->itlb[i].tag & (uint64_t)0x1fffULL, - TTE_IS_GLOBAL(env->itlb[i].tte) ? - "global" : "local"); + qemu_printf("[%02u] VA: %" PRIx64 ", PA: %llx" + ", %s, %s, %s, ctx %" PRId64 " %s\n", + i, + env->itlb[i].tag & (uint64_t)~0x1fffULL, + TTE_PA(env->itlb[i].tte), + mask, + TTE_IS_PRIV(env->itlb[i].tte) ? "priv" : "user", + TTE_IS_LOCKED(env->itlb[i].tte) ? + "locked" : "unlocked", + env->itlb[i].tag & (uint64_t)0x1fffULL, + TTE_IS_GLOBAL(env->itlb[i].tte) ? + "global" : "local"); } } } diff --git a/target/sparc/monitor.c b/target/sparc/monitor.c index f3ca524ae9..3ec3b51a3d 100644 --- a/target/sparc/monitor.c +++ b/target/sparc/monitor.c @@ -36,7 +36,7 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict) monitor_printf(mon, "No CPU available\n"); return; } - dump_mmu((FILE*)mon, (fprintf_function)monitor_printf, env1); + dump_mmu(env1); } #ifndef TARGET_SPARC64 diff --git a/target/sparc/trace-events b/target/sparc/trace-events index 764b1e5a02..6a064e2327 100644 --- a/target/sparc/trace-events +++ b/target/sparc/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# target/sparc/mmu_helper.c +# mmu_helper.c mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at 0x%"PRIx64" context 0x%"PRIx64" mmu_idx=%d tl=%d" mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at 0x%"PRIx64" context 0x%"PRIx64" mmu_idx=%d tl=%d" mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at 0x%"PRIx64" context 0x%"PRIx64 @@ -10,16 +10,16 @@ mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, u mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=0x%"PRIx64" secondary context=0x%"PRIx64" address=0x%"PRIx64 mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at 0x%"PRIx64" -> 0x%"PRIx64", mmu_idx=%d tl=%d primary context=0x%"PRIx64" secondary context=0x%"PRIx64 -# target/sparc/int64_helper.c +# int64_helper.c int_helper_set_softint(uint32_t softint) "new 0x%08x" int_helper_clear_softint(uint32_t softint) "new 0x%08x" int_helper_write_softint(uint32_t softint) "new 0x%08x" -# target/sparc/int32_helper.c +# int32_helper.c int_helper_icache_freeze(void) "Instruction cache: freeze" int_helper_dcache_freeze(void) "Data cache: freeze" -# target/sparc/win_helper.c +# win_helper.c win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=0x%x" win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=0x%x new=0x%x" win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=0x%x (unchanged)" diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 74315cdf09..091bab53af 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -5962,11 +5962,11 @@ static const TranslatorOps sparc_tr_ops = { .disas_log = sparc_tr_disas_log, }; -void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { DisasContext dc = {}; - translator_loop(&sparc_tr_ops, &dc.base, cs, tb); + translator_loop(&sparc_tr_ops, &dc.base, cs, tb, max_insns); } void sparc_tcg_init(void) diff --git a/target/tilegx/cpu.c b/target/tilegx/cpu.c index bfe9be59b5..b9d37105fa 100644 --- a/target/tilegx/cpu.c +++ b/target/tilegx/cpu.c @@ -24,9 +24,9 @@ #include "qemu-common.h" #include "hw/qdev-properties.h" #include "linux-user/syscall_defs.h" +#include "qemu/qemu-print.h" -static void tilegx_cpu_dump_state(CPUState *cs, FILE *f, - fprintf_function cpu_fprintf, int flags) +static void tilegx_cpu_dump_state(CPUState *cs, FILE *f, int flags) { static const char * const reg_names[TILEGX_R_COUNT] = { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", @@ -43,12 +43,12 @@ static void tilegx_cpu_dump_state(CPUState *cs, FILE *f, int i; for (i = 0; i < TILEGX_R_COUNT; i++) { - cpu_fprintf(f, "%-4s" TARGET_FMT_lx "%s", - reg_names[i], env->regs[i], - (i % 4) == 3 ? "\n" : " "); + qemu_fprintf(f, "%-4s" TARGET_FMT_lx "%s", + reg_names[i], env->regs[i], + (i % 4) == 3 ? "\n" : " "); } - cpu_fprintf(f, "PC " TARGET_FMT_lx " CEX " TARGET_FMT_lx "\n\n", - env->pc, env->spregs[TILEGX_SPR_CMPEXCH]); + qemu_fprintf(f, "PC " TARGET_FMT_lx " CEX " TARGET_FMT_lx "\n\n", + env->pc, env->spregs[TILEGX_SPR_CMPEXCH]); } static ObjectClass *tilegx_cpu_class_by_name(const char *cpu_model) diff --git a/target/tilegx/translate.c b/target/tilegx/translate.c index df1e4d0fef..c46a4ab151 100644 --- a/target/tilegx/translate.c +++ b/target/tilegx/translate.c @@ -2369,7 +2369,7 @@ static void translate_one_bundle(DisasContext *dc, uint64_t bundle) } } -void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { CPUTLGState *env = cs->env_ptr; DisasContext ctx; @@ -2377,7 +2377,6 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) uint64_t pc_start = tb->pc; uint64_t page_start = pc_start & TARGET_PAGE_MASK; int num_insns = 0; - int max_insns = tb_cflags(tb) & CF_COUNT_MASK; dc->pc = pc_start; dc->mmuidx = 0; @@ -2392,15 +2391,6 @@ void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) qemu_log_lock(); qemu_log("IN: %s\n", lookup_symbol(pc_start)); } - if (!max_insns) { - max_insns = CF_COUNT_MASK; - } - if (cs->singlestep_enabled || singlestep) { - max_insns = 1; - } - if (max_insns > TCG_MAX_INSNS) { - max_insns = TCG_MAX_INSNS; - } gen_tb_start(tb); while (1) { diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h index 00e69dc154..64d1a9c75e 100644 --- a/target/tricore/cpu.h +++ b/target/tricore/cpu.h @@ -224,8 +224,7 @@ static inline TriCoreCPU *tricore_env_get_cpu(CPUTriCoreState *env) #define ENV_OFFSET offsetof(TriCoreCPU, env) hwaddr tricore_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); -void tricore_cpu_dump_state(CPUState *cpu, FILE *f, - fprintf_function cpu_fprintf, int flags); +void tricore_cpu_dump_state(CPUState *cpu, FILE *f, int flags); #define MASK_PCXI_PCPN 0xff000000 @@ -375,7 +374,7 @@ void fpu_set_state(CPUTriCoreState *env); #define MMU_USER_IDX 2 -void tricore_cpu_list(FILE *f, fprintf_function cpu_fprintf); +void tricore_cpu_list(void); #define cpu_signal_handler cpu_tricore_signal_handler #define cpu_list tricore_cpu_list diff --git a/target/tricore/helper.c b/target/tricore/helper.c index 0769046993..78ee87c9ea 100644 --- a/target/tricore/helper.c +++ b/target/tricore/helper.c @@ -20,6 +20,7 @@ #include "cpu.h" #include "exec/exec-all.h" #include "fpu/softfloat.h" +#include "qemu/qemu-print.h" enum { TLBRET_DIRTY = -4, @@ -82,28 +83,22 @@ int cpu_tricore_handle_mmu_fault(CPUState *cs, target_ulong address, static void tricore_cpu_list_entry(gpointer data, gpointer user_data) { ObjectClass *oc = data; - CPUListState *s = user_data; const char *typename; char *name; typename = object_class_get_name(oc); name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_TRICORE_CPU)); - (*s->cpu_fprintf)(s->file, " %s\n", - name); + qemu_printf(" %s\n", name); g_free(name); } -void tricore_cpu_list(FILE *f, fprintf_function cpu_fprintf) +void tricore_cpu_list(void) { - CPUListState s = { - .file = f, - .cpu_fprintf = cpu_fprintf, - }; GSList *list; list = object_class_get_list_sorted(TYPE_TRICORE_CPU, false); - (*cpu_fprintf)(f, "Available CPUs:\n"); - g_slist_foreach(list, tricore_cpu_list_entry, &s); + qemu_printf("Available CPUs:\n"); + g_slist_foreach(list, tricore_cpu_list_entry, NULL); g_slist_free(list); } diff --git a/target/tricore/translate.c b/target/tricore/translate.c index b12c391be5..8f6416144e 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -24,6 +24,7 @@ #include "exec/exec-all.h" #include "tcg-op.h" #include "exec/cpu_ldst.h" +#include "qemu/qemu-print.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" @@ -88,8 +89,7 @@ enum { MODE_UU = 3, }; -void tricore_cpu_dump_state(CPUState *cs, FILE *f, - fprintf_function cpu_fprintf, int flags) +void tricore_cpu_dump_state(CPUState *cs, FILE *f, int flags) { TriCoreCPU *cpu = TRICORE_CPU(cs); CPUTriCoreState *env = &cpu->env; @@ -98,26 +98,26 @@ void tricore_cpu_dump_state(CPUState *cs, FILE *f, psw = psw_read(env); - cpu_fprintf(f, "PC: " TARGET_FMT_lx, env->PC); - cpu_fprintf(f, " PSW: " TARGET_FMT_lx, psw); - cpu_fprintf(f, " ICR: " TARGET_FMT_lx, env->ICR); - cpu_fprintf(f, "\nPCXI: " TARGET_FMT_lx, env->PCXI); - cpu_fprintf(f, " FCX: " TARGET_FMT_lx, env->FCX); - cpu_fprintf(f, " LCX: " TARGET_FMT_lx, env->LCX); + qemu_fprintf(f, "PC: " TARGET_FMT_lx, env->PC); + qemu_fprintf(f, " PSW: " TARGET_FMT_lx, psw); + qemu_fprintf(f, " ICR: " TARGET_FMT_lx, env->ICR); + qemu_fprintf(f, "\nPCXI: " TARGET_FMT_lx, env->PCXI); + qemu_fprintf(f, " FCX: " TARGET_FMT_lx, env->FCX); + qemu_fprintf(f, " LCX: " TARGET_FMT_lx, env->LCX); for (i = 0; i < 16; ++i) { if ((i & 3) == 0) { - cpu_fprintf(f, "\nGPR A%02d:", i); + qemu_fprintf(f, "\nGPR A%02d:", i); } - cpu_fprintf(f, " " TARGET_FMT_lx, env->gpr_a[i]); + qemu_fprintf(f, " " TARGET_FMT_lx, env->gpr_a[i]); } for (i = 0; i < 16; ++i) { if ((i & 3) == 0) { - cpu_fprintf(f, "\nGPR D%02d:", i); + qemu_fprintf(f, "\nGPR D%02d:", i); } - cpu_fprintf(f, " " TARGET_FMT_lx, env->gpr_d[i]); + qemu_fprintf(f, " " TARGET_FMT_lx, env->gpr_d[i]); } - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } /* @@ -8807,24 +8807,12 @@ static void decode_opc(CPUTriCoreState *env, DisasContext *ctx, int *is_branch) } } -void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { CPUTriCoreState *env = cs->env_ptr; DisasContext ctx; target_ulong pc_start; - int num_insns, max_insns; - - num_insns = 0; - max_insns = tb_cflags(tb) & CF_COUNT_MASK; - if (max_insns == 0) { - max_insns = CF_COUNT_MASK; - } - if (singlestep) { - max_insns = 1; - } - if (max_insns > TCG_MAX_INSNS) { - max_insns = TCG_MAX_INSNS; - } + int num_insns = 0; pc_start = tb->pc; ctx.pc = pc_start; diff --git a/target/unicore32/cpu.h b/target/unicore32/cpu.h index 735d3ae9dc..24abe5e5c0 100644 --- a/target/unicore32/cpu.h +++ b/target/unicore32/cpu.h @@ -97,8 +97,7 @@ static inline UniCore32CPU *uc32_env_get_cpu(CPUUniCore32State *env) void uc32_cpu_do_interrupt(CPUState *cpu); bool uc32_cpu_exec_interrupt(CPUState *cpu, int int_req); -void uc32_cpu_dump_state(CPUState *cpu, FILE *f, - fprintf_function cpu_fprintf, int flags); +void uc32_cpu_dump_state(CPUState *cpu, FILE *f, int flags); hwaddr uc32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); #define ASR_M (0x1f) diff --git a/target/unicore32/translate.c b/target/unicore32/translate.c index 002569ff3b..89b02d1c3c 100644 --- a/target/unicore32/translate.c +++ b/target/unicore32/translate.c @@ -17,6 +17,7 @@ #include "qemu/log.h" #include "exec/cpu_ldst.h" #include "exec/translator.h" +#include "qemu/qemu-print.h" #include "exec/helper-proto.h" #include "exec/helper-gen.h" @@ -1870,14 +1871,13 @@ static void disas_uc32_insn(CPUUniCore32State *env, DisasContext *s) } /* generate intermediate code for basic block 'tb'. */ -void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) { CPUUniCore32State *env = cs->env_ptr; DisasContext dc1, *dc = &dc1; target_ulong pc_start; uint32_t page_start; int num_insns; - int max_insns; /* generate intermediate code */ num_temps = 0; @@ -1896,13 +1896,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) cpu_F1d = tcg_temp_new_i64(); page_start = pc_start & TARGET_PAGE_MASK; num_insns = 0; - max_insns = tb_cflags(tb) & CF_COUNT_MASK; - if (max_insns == 0) { - max_insns = CF_COUNT_MASK; - } - if (max_insns > TCG_MAX_INSNS) { - max_insns = TCG_MAX_INSNS; - } #ifndef CONFIG_USER_ONLY if ((env->uncached_asr & ASR_M) == ASR_MODE_USER) { @@ -2043,8 +2036,7 @@ static const char *cpu_mode_names[16] = { #undef UCF64_DUMP_STATE #ifdef UCF64_DUMP_STATE -static void cpu_dump_state_ucf64(CPUUniCore32State *env, FILE *f, - fprintf_function cpu_fprintf, int flags) +static void cpu_dump_state_ucf64(CPUUniCore32State *env, int flags) { int i; union { @@ -2064,20 +2056,19 @@ static void cpu_dump_state_ucf64(CPUUniCore32State *env, FILE *f, s0.i = d.l.lower; s1.i = d.l.upper; d0.f64 = d.d; - cpu_fprintf(f, "s%02d=%08x(%8g) s%02d=%08x(%8g)", - i * 2, (int)s0.i, s0.s, - i * 2 + 1, (int)s1.i, s1.s); - cpu_fprintf(f, " d%02d=%" PRIx64 "(%8g)\n", - i, (uint64_t)d0.f64, d0.d); + qemu_fprintf(f, "s%02d=%08x(%8g) s%02d=%08x(%8g)", + i * 2, (int)s0.i, s0.s, + i * 2 + 1, (int)s1.i, s1.s); + qemu_fprintf(f, " d%02d=%" PRIx64 "(%8g)\n", + i, (uint64_t)d0.f64, d0.d); } - cpu_fprintf(f, "FPSCR: %08x\n", (int)env->ucf64.xregs[UC32_UCF64_FPSCR]); + qemu_fprintf(f, "FPSCR: %08x\n", (int)env->ucf64.xregs[UC32_UCF64_FPSCR]); } #else #define cpu_dump_state_ucf64(env, file, pr, flags) do { } while (0) #endif -void uc32_cpu_dump_state(CPUState *cs, FILE *f, - fprintf_function cpu_fprintf, int flags) +void uc32_cpu_dump_state(CPUState *cs, FILE *f, int flags) { UniCore32CPU *cpu = UNICORE32_CPU(cs); CPUUniCore32State *env = &cpu->env; @@ -2085,21 +2076,21 @@ void uc32_cpu_dump_state(CPUState *cs, FILE *f, uint32_t psr; for (i = 0; i < 32; i++) { - cpu_fprintf(f, "R%02d=%08x", i, env->regs[i]); + qemu_fprintf(f, "R%02d=%08x", i, env->regs[i]); if ((i % 4) == 3) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); } else { - cpu_fprintf(f, " "); + qemu_fprintf(f, " "); } } psr = cpu_asr_read(env); - cpu_fprintf(f, "PSR=%08x %c%c%c%c %s\n", - psr, - psr & (1 << 31) ? 'N' : '-', - psr & (1 << 30) ? 'Z' : '-', - psr & (1 << 29) ? 'C' : '-', - psr & (1 << 28) ? 'V' : '-', - cpu_mode_names[psr & 0xf]); + qemu_fprintf(f, "PSR=%08x %c%c%c%c %s\n", + psr, + psr & (1 << 31) ? 'N' : '-', + psr & (1 << 30) ? 'Z' : '-', + psr & (1 << 29) ? 'C' : '-', + psr & (1 << 28) ? 'V' : '-', + cpu_mode_names[psr & 0xf]); if (flags & CPU_DUMP_FPU) { cpu_dump_state_ucf64(env, f, cpu_fprintf, flags); diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index 4d8152682f..5d23e1345b 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -560,8 +560,7 @@ void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, unsigned size, MMUAccessType access_type, int mmu_idx, MemTxAttrs attrs, MemTxResult response, uintptr_t retaddr); -void xtensa_cpu_dump_state(CPUState *cpu, FILE *f, - fprintf_function cpu_fprintf, int flags); +void xtensa_cpu_dump_state(CPUState *cpu, FILE *f, int flags); hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); void xtensa_count_regs(const XtensaConfig *config, unsigned *n_regs, unsigned *n_core_regs); @@ -600,7 +599,7 @@ void xtensa_irq_init(CPUXtensaState *env); qemu_irq *xtensa_get_extints(CPUXtensaState *env); qemu_irq xtensa_get_runstall(CPUXtensaState *env); int cpu_xtensa_signal_handler(int host_signum, void *pinfo, void *puc); -void xtensa_cpu_list(FILE *f, fprintf_function cpu_fprintf); +void xtensa_cpu_list(void); void xtensa_sync_window_from_phys(CPUXtensaState *env); void xtensa_sync_phys_from_window(CPUXtensaState *env); void xtensa_rotate_window(CPUXtensaState *env, uint32_t delta); @@ -673,7 +672,7 @@ int xtensa_get_physical_addr(CPUXtensaState *env, bool update_tlb, uint32_t vaddr, int is_write, int mmu_idx, uint32_t *paddr, uint32_t *page_size, unsigned *access); void reset_mmu(CPUXtensaState *env); -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUXtensaState *env); +void dump_mmu(CPUXtensaState *env); static inline MemoryRegion *xtensa_get_er_region(CPUXtensaState *env) { diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c index f4867a9b56..5f37f378a3 100644 --- a/target/xtensa/helper.c +++ b/target/xtensa/helper.c @@ -31,6 +31,7 @@ #include "exec/gdbstub.h" #include "exec/helper-proto.h" #include "qemu/error-report.h" +#include "qemu/qemu-print.h" #include "qemu/host-utils.h" static struct XtensaConfigList *xtensa_cores; @@ -228,12 +229,12 @@ void xtensa_breakpoint_handler(CPUState *cs) } } -void xtensa_cpu_list(FILE *f, fprintf_function cpu_fprintf) +void xtensa_cpu_list(void) { XtensaConfigList *core = xtensa_cores; - cpu_fprintf(f, "Available CPUs:\n"); + qemu_printf("Available CPUs:\n"); for (; core; core = core->next) { - cpu_fprintf(f, " %s\n", core->config->name); + qemu_printf(" %s\n", core->config->name); } } diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c index 2096fbbd9f..79a10da231 100644 --- a/target/xtensa/mmu_helper.c +++ b/target/xtensa/mmu_helper.c @@ -27,6 +27,7 @@ #include "qemu/osdep.h" #include "qemu/main-loop.h" +#include "qemu/qemu-print.h" #include "qemu/units.h" #include "cpu.h" #include "exec/helper-proto.h" @@ -740,8 +741,7 @@ int xtensa_get_physical_addr(CPUXtensaState *env, bool update_tlb, } } -static void dump_tlb(FILE *f, fprintf_function cpu_fprintf, - CPUXtensaState *env, bool dtlb) +static void dump_tlb(CPUXtensaState *env, bool dtlb) { unsigned wi, ei; const xtensa_tlb *conf = @@ -780,13 +780,11 @@ static void dump_tlb(FILE *f, fprintf_function cpu_fprintf, if (print_header) { print_header = false; - cpu_fprintf(f, "Way %u (%d %s)\n", wi, sz, sz_text); - cpu_fprintf(f, - "\tVaddr Paddr ASID Attr RWX Cache\n" + qemu_printf("Way %u (%d %s)\n", wi, sz, sz_text); + qemu_printf("\tVaddr Paddr ASID Attr RWX Cache\n" "\t---------- ---------- ---- ---- --- -------\n"); } - cpu_fprintf(f, - "\t0x%08x 0x%08x 0x%02x 0x%02x %c%c%c %-7s\n", + qemu_printf("\t0x%08x 0x%08x 0x%02x 0x%02x %c%c%c %-7s\n", entry->vaddr, entry->paddr, entry->asid, @@ -801,18 +799,18 @@ static void dump_tlb(FILE *f, fprintf_function cpu_fprintf, } } -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUXtensaState *env) +void dump_mmu(CPUXtensaState *env) { if (xtensa_option_bits_enabled(env->config, XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_PROTECTION) | XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_TRANSLATION) | XTENSA_OPTION_BIT(XTENSA_OPTION_MMU))) { - cpu_fprintf(f, "ITLB:\n"); - dump_tlb(f, cpu_fprintf, env, false); - cpu_fprintf(f, "\nDTLB:\n"); - dump_tlb(f, cpu_fprintf, env, true); + qemu_printf("ITLB:\n"); + dump_tlb(env, false); + qemu_printf("\nDTLB:\n"); + dump_tlb(env, true); } else { - cpu_fprintf(f, "No TLB for this CPU core\n"); + qemu_printf("No TLB for this CPU core\n"); } } diff --git a/target/xtensa/monitor.c b/target/xtensa/monitor.c index 2ee2b5b23e..cf7957bb63 100644 --- a/target/xtensa/monitor.c +++ b/target/xtensa/monitor.c @@ -35,5 +35,5 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict) monitor_printf(mon, "No CPU available\n"); return; } - dump_mmu((FILE*)mon, (fprintf_function)monitor_printf, env1); + dump_mmu(env1); } diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 77bc04d6b0..301c8e3161 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -35,6 +35,7 @@ #include "disas/disas.h" #include "tcg-op.h" #include "qemu/log.h" +#include "qemu/qemu-print.h" #include "sysemu/sysemu.h" #include "exec/cpu_ldst.h" #include "exec/semihost.h" @@ -1041,7 +1042,6 @@ static bool break_dependency(struct slot_prop *a, copy[n].resource = b->in[j].resource; copy[n].arg = b->arg + index; ++n; - ++i; ++j; rv = true; } @@ -1635,66 +1635,67 @@ static const TranslatorOps xtensa_translator_ops = { .disas_log = xtensa_tr_disas_log, }; -void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb) +void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb, int max_insns) { DisasContext dc = {}; - translator_loop(&xtensa_translator_ops, &dc.base, cpu, tb); + translator_loop(&xtensa_translator_ops, &dc.base, cpu, tb, max_insns); } -void xtensa_cpu_dump_state(CPUState *cs, FILE *f, - fprintf_function cpu_fprintf, int flags) +void xtensa_cpu_dump_state(CPUState *cs, FILE *f, int flags) { XtensaCPU *cpu = XTENSA_CPU(cs); CPUXtensaState *env = &cpu->env; int i, j; - cpu_fprintf(f, "PC=%08x\n\n", env->pc); + qemu_fprintf(f, "PC=%08x\n\n", env->pc); for (i = j = 0; i < 256; ++i) { if (xtensa_option_bits_enabled(env->config, sregnames[i].opt_bits)) { - cpu_fprintf(f, "%12s=%08x%c", sregnames[i].name, env->sregs[i], - (j++ % 4) == 3 ? '\n' : ' '); + qemu_fprintf(f, "%12s=%08x%c", + sregnames[i].name, env->sregs[i], + (j++ % 4) == 3 ? '\n' : ' '); } } - cpu_fprintf(f, (j % 4) == 0 ? "\n" : "\n\n"); + qemu_fprintf(f, (j % 4) == 0 ? "\n" : "\n\n"); for (i = j = 0; i < 256; ++i) { if (xtensa_option_bits_enabled(env->config, uregnames[i].opt_bits)) { - cpu_fprintf(f, "%s=%08x%c", uregnames[i].name, env->uregs[i], - (j++ % 4) == 3 ? '\n' : ' '); + qemu_fprintf(f, "%s=%08x%c", + uregnames[i].name, env->uregs[i], + (j++ % 4) == 3 ? '\n' : ' '); } } - cpu_fprintf(f, (j % 4) == 0 ? "\n" : "\n\n"); + qemu_fprintf(f, (j % 4) == 0 ? "\n" : "\n\n"); for (i = 0; i < 16; ++i) { - cpu_fprintf(f, " A%02d=%08x%c", i, env->regs[i], - (i % 4) == 3 ? '\n' : ' '); + qemu_fprintf(f, " A%02d=%08x%c", + i, env->regs[i], (i % 4) == 3 ? '\n' : ' '); } xtensa_sync_phys_from_window(env); - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); for (i = 0; i < env->config->nareg; ++i) { - cpu_fprintf(f, "AR%02d=%08x ", i, env->phys_regs[i]); + qemu_fprintf(f, "AR%02d=%08x ", i, env->phys_regs[i]); if (i % 4 == 3) { bool ws = (env->sregs[WINDOW_START] & (1 << (i / 4))) != 0; bool cw = env->sregs[WINDOW_BASE] == i / 4; - cpu_fprintf(f, "%c%c\n", ws ? '<' : ' ', cw ? '=' : ' '); + qemu_fprintf(f, "%c%c\n", ws ? '<' : ' ', cw ? '=' : ' '); } } if ((flags & CPU_DUMP_FPU) && xtensa_option_enabled(env->config, XTENSA_OPTION_FP_COPROCESSOR)) { - cpu_fprintf(f, "\n"); + qemu_fprintf(f, "\n"); for (i = 0; i < 16; ++i) { - cpu_fprintf(f, "F%02d=%08x (%+10.8e)%c", i, - float32_val(env->fregs[i].f32[FP_F32_LOW]), - *(float *)(env->fregs[i].f32 + FP_F32_LOW), - (i % 2) == 1 ? '\n' : ' '); + qemu_fprintf(f, "F%02d=%08x (%+10.8e)%c", i, + float32_val(env->fregs[i].f32[FP_F32_LOW]), + *(float *)(env->fregs[i].f32 + FP_F32_LOW), + (i % 2) == 1 ? '\n' : ' '); } } } diff --git a/target/xtensa/xtensa-semi.c b/target/xtensa/xtensa-semi.c index 2f76216276..5f5ce4f344 100644 --- a/target/xtensa/xtensa-semi.c +++ b/target/xtensa/xtensa-semi.c @@ -202,7 +202,6 @@ void HELPER(simcall)(CPUXtensaState *env) switch (regs[2]) { case TARGET_SYS_exit: - qemu_log("exit(%d) simcall\n", regs[3]); exit(regs[3]); break; diff --git a/tcg/README b/tcg/README index 603f4df659..c30e5418a6 100644 --- a/tcg/README +++ b/tcg/README @@ -343,6 +343,13 @@ at bit 8. This operation would be equivalent to (using an arithmetic right shift). +* extract2_i32/i64 dest, t1, t2, pos + +For N = {32,64}, extract an N-bit quantity from the concatenation +of t2:t1, beginning at pos. The tcg_gen_extract2_{i32,i64} expander +accepts 0 <= pos <= N as inputs. The backend code generator will +not see either 0 or N as inputs for these opcodes. + * extrl_i64_i32 t0, t1 For 64-bit hosts only, extract the low 32-bits of input T1 and place it diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index 2d93cf404e..ce2bb1f90b 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -77,6 +77,7 @@ typedef enum { #define TCG_TARGET_HAS_deposit_i32 1 #define TCG_TARGET_HAS_extract_i32 1 #define TCG_TARGET_HAS_sextract_i32 1 +#define TCG_TARGET_HAS_extract2_i32 1 #define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_add2_i32 1 #define TCG_TARGET_HAS_sub2_i32 1 @@ -113,6 +114,7 @@ typedef enum { #define TCG_TARGET_HAS_deposit_i64 1 #define TCG_TARGET_HAS_extract_i64 1 #define TCG_TARGET_HAS_sextract_i64 1 +#define TCG_TARGET_HAS_extract2_i64 1 #define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_add2_i64 1 #define TCG_TARGET_HAS_sub2_i64 1 diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c index d57f9e500f..eefa929948 100644 --- a/tcg/aarch64/tcg-target.inc.c +++ b/tcg/aarch64/tcg-target.inc.c @@ -1395,14 +1395,15 @@ static inline void tcg_out_adr(TCGContext *s, TCGReg rd, void *target) tcg_out_insn(s, 3406, ADR, rd, offset); } -static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) +static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) { TCGMemOpIdx oi = lb->oi; TCGMemOp opc = get_memop(oi); TCGMemOp size = opc & MO_SIZE; - bool ok = reloc_pc19(lb->label_ptr[0], s->code_ptr); - tcg_debug_assert(ok); + if (!reloc_pc19(lb->label_ptr[0], s->code_ptr)) { + return false; + } tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_X0, TCG_AREG0); tcg_out_mov(s, TARGET_LONG_BITS == 64, TCG_REG_X1, lb->addrlo_reg); @@ -1416,16 +1417,18 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) } tcg_out_goto(s, lb->raddr); + return true; } -static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) +static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) { TCGMemOpIdx oi = lb->oi; TCGMemOp opc = get_memop(oi); TCGMemOp size = opc & MO_SIZE; - bool ok = reloc_pc19(lb->label_ptr[0], s->code_ptr); - tcg_debug_assert(ok); + if (!reloc_pc19(lb->label_ptr[0], s->code_ptr)) { + return false; + } tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_X0, TCG_AREG0); tcg_out_mov(s, TARGET_LONG_BITS == 64, TCG_REG_X1, lb->addrlo_reg); @@ -1434,6 +1437,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) tcg_out_adr(s, TCG_REG_X4, lb->raddr); tcg_out_call(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]); tcg_out_goto(s, lb->raddr); + return true; } static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGMemOpIdx oi, @@ -2058,6 +2062,11 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out_sbfm(s, ext, a0, a1, a2, a2 + args[3] - 1); break; + case INDEX_op_extract2_i64: + case INDEX_op_extract2_i32: + tcg_out_extr(s, ext, a0, a1, a2, args[3]); + break; + case INDEX_op_add2_i32: tcg_out_addsub2(s, TCG_TYPE_I32, a0, a1, REG0(2), REG0(3), (int32_t)args[4], args[5], const_args[4], @@ -2300,6 +2309,8 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) = { .args_ct_str = { "r", "r", "rAL" } }; static const TCGTargetOpDef dep = { .args_ct_str = { "r", "0", "rZ" } }; + static const TCGTargetOpDef ext2 + = { .args_ct_str = { "r", "rZ", "rZ" } }; static const TCGTargetOpDef movc = { .args_ct_str = { "r", "r", "rA", "rZ", "rZ" } }; static const TCGTargetOpDef add2 @@ -2430,6 +2441,10 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) case INDEX_op_deposit_i64: return &dep; + case INDEX_op_extract2_i32: + case INDEX_op_extract2_i64: + return &ext2; + case INDEX_op_add2_i32: case INDEX_op_add2_i64: case INDEX_op_sub2_i32: diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 16172f73a3..17e771374d 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -116,6 +116,7 @@ extern bool use_idiv_instructions; #define TCG_TARGET_HAS_deposit_i32 use_armv7_instructions #define TCG_TARGET_HAS_extract_i32 use_armv7_instructions #define TCG_TARGET_HAS_sextract_i32 use_armv7_instructions +#define TCG_TARGET_HAS_extract2_i32 1 #define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_mulu2_i32 1 #define TCG_TARGET_HAS_muls2_i32 1 diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c index 2245a8aeb9..abf0c444b4 100644 --- a/tcg/arm/tcg-target.inc.c +++ b/tcg/arm/tcg-target.inc.c @@ -197,6 +197,24 @@ static inline bool reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target) return false; } +static inline bool reloc_pc13(tcg_insn_unit *code_ptr, tcg_insn_unit *target) +{ + ptrdiff_t offset = tcg_ptr_byte_diff(target, code_ptr) - 8; + + if (offset >= -0xfff && offset <= 0xfff) { + tcg_insn_unit insn = *code_ptr; + bool u = (offset >= 0); + if (!u) { + offset = -offset; + } + insn = deposit32(insn, 23, 1, u); + insn = deposit32(insn, 0, 12, offset); + *code_ptr = insn; + return true; + } + return false; +} + static bool patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { @@ -205,39 +223,10 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type, if (type == R_ARM_PC24) { return reloc_pc24(code_ptr, (tcg_insn_unit *)value); } else if (type == R_ARM_PC13) { - intptr_t diff = value - (uintptr_t)(code_ptr + 2); - tcg_insn_unit insn = *code_ptr; - bool u; - - if (diff >= -0xfff && diff <= 0xfff) { - u = (diff >= 0); - if (!u) { - diff = -diff; - } - } else { - int rd = extract32(insn, 12, 4); - int rt = rd == TCG_REG_PC ? TCG_REG_TMP : rd; - - if (diff < 0x1000 || diff >= 0x100000) { - return false; - } - - /* add rt, pc, #high */ - *code_ptr++ = ((insn & 0xf0000000) | (1 << 25) | ARITH_ADD - | (TCG_REG_PC << 16) | (rt << 12) - | (20 << 7) | (diff >> 12)); - /* ldr rd, [rt, #low] */ - insn = deposit32(insn, 12, 4, rt); - diff &= 0xfff; - u = 1; - } - insn = deposit32(insn, 23, 1, u); - insn = deposit32(insn, 0, 12, diff); - *code_ptr = insn; + return reloc_pc13(code_ptr, (tcg_insn_unit *)value); } else { g_assert_not_reached(); } - return true; } #define TCG_CT_CONST_ARM 0x100 @@ -605,12 +594,8 @@ static inline void tcg_out_ld8s_r(TCGContext *s, int cond, TCGReg rt, static void tcg_out_movi_pool(TCGContext *s, int cond, int rd, uint32_t arg) { - /* The 12-bit range on the ldr insn is sometimes a bit too small. - In order to get around that we require two insns, one of which - will usually be a nop, but may be replaced in patch_reloc. */ new_pool_label(s, arg, R_ARM_PC13, s->code_ptr, 0); tcg_out_ld32_12(s, cond, rd, TCG_REG_PC, 0); - tcg_out_nop(s); } static void tcg_out_movi32(TCGContext *s, int cond, int rd, uint32_t arg) @@ -1069,8 +1054,8 @@ static void tcg_out_call(TCGContext *s, tcg_insn_unit *addr) tcg_out_movi32(s, COND_AL, TCG_REG_TMP, addri); tcg_out_blx(s, COND_AL, TCG_REG_TMP); } else { - /* ??? Know that movi_pool emits exactly 2 insns. */ - tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R14, TCG_REG_PC, 4); + /* ??? Know that movi_pool emits exactly 1 insn. */ + tcg_out_dat_imm(s, COND_AL, ARITH_ADD, TCG_REG_R14, TCG_REG_PC, 0); tcg_out_movi_pool(s, COND_AL, TCG_REG_PC, addri); } } @@ -1372,15 +1357,16 @@ static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGMemOpIdx oi, label->label_ptr[0] = label_ptr; } -static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) +static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) { TCGReg argreg, datalo, datahi; TCGMemOpIdx oi = lb->oi; TCGMemOp opc = get_memop(oi); void *func; - bool ok = reloc_pc24(lb->label_ptr[0], s->code_ptr); - tcg_debug_assert(ok); + if (!reloc_pc24(lb->label_ptr[0], s->code_ptr)) { + return false; + } argreg = tcg_out_arg_reg32(s, TCG_REG_R0, TCG_AREG0); if (TARGET_LONG_BITS == 64) { @@ -1432,16 +1418,18 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) } tcg_out_goto(s, COND_AL, lb->raddr); + return true; } -static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) +static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) { TCGReg argreg, datalo, datahi; TCGMemOpIdx oi = lb->oi; TCGMemOp opc = get_memop(oi); - bool ok = reloc_pc24(lb->label_ptr[0], s->code_ptr); - tcg_debug_assert(ok); + if (!reloc_pc24(lb->label_ptr[0], s->code_ptr)) { + return false; + } argreg = TCG_REG_R0; argreg = tcg_out_arg_reg32(s, argreg, TCG_AREG0); @@ -1474,6 +1462,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) /* Tail-call to the helper, which will return to the fast path. */ tcg_out_goto(s, COND_AL, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]); + return true; } #endif /* SOFTMMU */ @@ -2064,6 +2053,27 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_sextract_i32: tcg_out_sextract(s, COND_AL, args[0], args[1], args[2], args[3]); break; + case INDEX_op_extract2_i32: + /* ??? These optimization vs zero should be generic. */ + /* ??? But we can't substitute 2 for 1 in the opcode stream yet. */ + if (const_args[1]) { + if (const_args[2]) { + tcg_out_movi(s, TCG_TYPE_REG, args[0], 0); + } else { + tcg_out_dat_reg(s, COND_AL, ARITH_MOV, args[0], 0, + args[2], SHIFT_IMM_LSL(32 - args[3])); + } + } else if (const_args[2]) { + tcg_out_dat_reg(s, COND_AL, ARITH_MOV, args[0], 0, + args[1], SHIFT_IMM_LSR(args[3])); + } else { + /* We can do extract2 in 2 insns, vs the 3 required otherwise. */ + tcg_out_dat_reg(s, COND_AL, ARITH_MOV, TCG_REG_TMP, 0, + args[2], SHIFT_IMM_LSL(32 - args[3])); + tcg_out_dat_reg(s, COND_AL, ARITH_ORR, args[0], TCG_REG_TMP, + args[1], SHIFT_IMM_LSR(args[3])); + } + break; case INDEX_op_div_i32: tcg_out_sdiv(s, COND_AL, args[0], args[1], args[2]); @@ -2108,6 +2118,8 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) = { .args_ct_str = { "s", "s", "s", "s" } }; static const TCGTargetOpDef br = { .args_ct_str = { "r", "rIN" } }; + static const TCGTargetOpDef ext2 + = { .args_ct_str = { "r", "rZ", "rZ" } }; static const TCGTargetOpDef dep = { .args_ct_str = { "r", "0", "rZ" } }; static const TCGTargetOpDef movc @@ -2174,6 +2186,8 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) return &br; case INDEX_op_deposit_i32: return &dep; + case INDEX_op_extract2_i32: + return &ext2; case INDEX_op_movcond_i32: return &movc; case INDEX_op_add2_i32: diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 7995fe3eab..241bf19413 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -124,6 +124,7 @@ extern bool have_avx2; #define TCG_TARGET_HAS_deposit_i32 1 #define TCG_TARGET_HAS_extract_i32 1 #define TCG_TARGET_HAS_sextract_i32 1 +#define TCG_TARGET_HAS_extract2_i32 1 #define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_add2_i32 1 #define TCG_TARGET_HAS_sub2_i32 1 @@ -162,6 +163,7 @@ extern bool have_avx2; #define TCG_TARGET_HAS_deposit_i64 1 #define TCG_TARGET_HAS_extract_i64 1 #define TCG_TARGET_HAS_sextract_i64 0 +#define TCG_TARGET_HAS_extract2_i64 1 #define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_add2_i64 1 #define TCG_TARGET_HAS_sub2_i64 1 diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c index e0670e5098..d5ed9f1ffd 100644 --- a/tcg/i386/tcg-target.inc.c +++ b/tcg/i386/tcg-target.inc.c @@ -452,6 +452,7 @@ static inline int tcg_target_const_match(tcg_target_long val, TCGType type, #define OPC_SHUFPS (0xc6 | P_EXT) #define OPC_SHLX (0xf7 | P_EXT38 | P_DATA16) #define OPC_SHRX (0xf7 | P_EXT38 | P_SIMDF2) +#define OPC_SHRD_Ib (0xac | P_EXT) #define OPC_TESTL (0x85) #define OPC_TZCNT (0xbc | P_EXT | P_SIMDF3) #define OPC_UD2 (0x0b | P_EXT) @@ -1729,7 +1730,7 @@ static void add_qemu_ldst_label(TCGContext *s, bool is_ld, bool is_64, /* * Generate code for the slow path for a load at the end of block */ -static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) +static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) { TCGMemOpIdx oi = l->oi; TCGMemOp opc = get_memop(oi); @@ -1808,12 +1809,13 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) /* Jump to the code corresponding to next IR of qemu_st */ tcg_out_jmp(s, l->raddr); + return true; } /* * Generate code for the slow path for a store at the end of block */ -static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) +static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) { TCGMemOpIdx oi = l->oi; TCGMemOp opc = get_memop(oi); @@ -1876,6 +1878,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) /* "Tail call" to the helper, with the return address back inline. */ tcg_out_push(s, retaddr); tcg_out_jmp(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]); + return true; } #elif TCG_TARGET_REG_BITS == 32 # define x86_guest_base_seg 0 @@ -2587,6 +2590,12 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, } break; + OP_32_64(extract2): + /* Note that SHRD outputs to the r/m operand. */ + tcg_out_modrm(s, OPC_SHRD_Ib + rexw, a2, a0); + tcg_out8(s, args[3]); + break; + case INDEX_op_mb: tcg_out_mb(s, a0); break; @@ -2845,6 +2854,7 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) static const TCGTargetOpDef r_0 = { .args_ct_str = { "r", "0" } }; static const TCGTargetOpDef r_r_ri = { .args_ct_str = { "r", "r", "ri" } }; static const TCGTargetOpDef r_r_re = { .args_ct_str = { "r", "r", "re" } }; + static const TCGTargetOpDef r_0_r = { .args_ct_str = { "r", "0", "r" } }; static const TCGTargetOpDef r_0_re = { .args_ct_str = { "r", "0", "re" } }; static const TCGTargetOpDef r_0_ci = { .args_ct_str = { "r", "0", "ci" } }; static const TCGTargetOpDef r_L = { .args_ct_str = { "r", "L" } }; @@ -2970,6 +2980,9 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) case INDEX_op_ctpop_i32: case INDEX_op_ctpop_i64: return &r_r; + case INDEX_op_extract2_i32: + case INDEX_op_extract2_i64: + return &r_0_r; case INDEX_op_deposit_i32: case INDEX_op_deposit_i64: diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index 5cb8672470..c6b091d849 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -162,6 +162,7 @@ extern bool use_mips32r2_instructions; #define TCG_TARGET_HAS_deposit_i32 use_mips32r2_instructions #define TCG_TARGET_HAS_extract_i32 use_mips32r2_instructions #define TCG_TARGET_HAS_sextract_i32 0 +#define TCG_TARGET_HAS_extract2_i32 0 #define TCG_TARGET_HAS_ext8s_i32 use_mips32r2_instructions #define TCG_TARGET_HAS_ext16s_i32 use_mips32r2_instructions #define TCG_TARGET_HAS_rot_i32 use_mips32r2_instructions @@ -177,6 +178,7 @@ extern bool use_mips32r2_instructions; #define TCG_TARGET_HAS_deposit_i64 use_mips32r2_instructions #define TCG_TARGET_HAS_extract_i64 use_mips32r2_instructions #define TCG_TARGET_HAS_sextract_i64 0 +#define TCG_TARGET_HAS_extract2_i64 0 #define TCG_TARGET_HAS_ext8s_i64 use_mips32r2_instructions #define TCG_TARGET_HAS_ext16s_i64 use_mips32r2_instructions #define TCG_TARGET_HAS_rot_i64 use_mips32r2_instructions diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index 8a92e916dd..412cacdcb9 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -1338,7 +1338,7 @@ static void add_qemu_ldst_label(TCGContext *s, int is_ld, TCGMemOpIdx oi, } } -static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) +static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) { TCGMemOpIdx oi = l->oi; TCGMemOp opc = get_memop(oi); @@ -1385,9 +1385,10 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) } else { tcg_out_opc_reg(s, OPC_OR, v0, TCG_REG_V0, TCG_REG_ZERO); } + return true; } -static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) +static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) { TCGMemOpIdx oi = l->oi; TCGMemOp opc = get_memop(oi); @@ -1435,6 +1436,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) tcg_out_call_int(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)], true); /* delay slot */ tcg_out_mov(s, TCG_TYPE_PTR, tcg_target_call_iarg_regs[0], TCG_AREG0); + return true; } #endif diff --git a/tcg/optimize.c b/tcg/optimize.c index 01e80c3e46..5150c38a25 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -1202,6 +1202,22 @@ void tcg_optimize(TCGContext *s) } goto do_default; + CASE_OP_32_64(extract2): + if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) { + TCGArg v1 = arg_info(op->args[1])->val; + TCGArg v2 = arg_info(op->args[2])->val; + + if (opc == INDEX_op_extract2_i64) { + tmp = (v1 >> op->args[3]) | (v2 << (64 - op->args[3])); + } else { + tmp = (v1 >> op->args[3]) | (v2 << (32 - op->args[3])); + tmp = (int32_t)tmp; + } + tcg_opt_gen_movi(s, op, op->args[0], tmp); + break; + } + goto do_default; + CASE_OP_32_64(setcond): tmp = do_constant_folding_cond(opc, op->args[1], op->args[2], op->args[3]); diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index 52c1bb04b1..7627fb62d3 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -77,6 +77,7 @@ extern bool have_isa_3_00; #define TCG_TARGET_HAS_deposit_i32 1 #define TCG_TARGET_HAS_extract_i32 1 #define TCG_TARGET_HAS_sextract_i32 0 +#define TCG_TARGET_HAS_extract2_i32 0 #define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_mulu2_i32 0 #define TCG_TARGET_HAS_muls2_i32 0 @@ -115,6 +116,7 @@ extern bool have_isa_3_00; #define TCG_TARGET_HAS_deposit_i64 1 #define TCG_TARGET_HAS_extract_i64 1 #define TCG_TARGET_HAS_sextract_i64 0 +#define TCG_TARGET_HAS_extract2_i64 0 #define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_add2_i64 1 #define TCG_TARGET_HAS_sub2_i64 1 diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index 773690f1d9..36b4791707 100644 --- a/tcg/ppc/tcg-target.inc.c +++ b/tcg/ppc/tcg-target.inc.c @@ -529,7 +529,6 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { tcg_insn_unit *target; - tcg_insn_unit old; value += addend; target = (tcg_insn_unit *)value; @@ -540,22 +539,16 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type, case R_PPC_REL24: return reloc_pc24(code_ptr, target); case R_PPC_ADDR16: - /* We are abusing this relocation type. This points to a pair - of insns, addis + load. If the displacement is small, we - can nop out the addis. */ - if (value == (int16_t)value) { - code_ptr[0] = NOP; - old = deposit32(code_ptr[1], 0, 16, value); - code_ptr[1] = deposit32(old, 16, 5, TCG_REG_TB); - } else { - int16_t lo = value; - int hi = value - lo; - if (hi + lo != value) { - return false; - } - code_ptr[0] = deposit32(code_ptr[0], 0, 16, hi >> 16); - code_ptr[1] = deposit32(code_ptr[1], 0, 16, lo); + /* + * We are (slightly) abusing this relocation type. In particular, + * assert that the low 2 bits are zero, and do not modify them. + * That way we can use this with LD et al that have opcode bits + * in the low 2 bits of the insn. + */ + if ((value & 3) || value != (int16_t)value) { + return false; } + *code_ptr = (*code_ptr & ~0xfffc) | (value & 0xfffc); break; default: g_assert_not_reached(); @@ -701,8 +694,7 @@ static void tcg_out_movi_int(TCGContext *s, TCGType type, TCGReg ret, if (!in_prologue && USE_REG_TB) { new_pool_label(s, arg, R_PPC_ADDR16, s->code_ptr, -(intptr_t)s->code_gen_ptr); - tcg_out32(s, ADDIS | TAI(ret, TCG_REG_TB, 0)); - tcg_out32(s, LD | TAI(ret, ret, 0)); + tcg_out32(s, LD | TAI(ret, TCG_REG_TB, 0)); return; } @@ -1653,13 +1645,15 @@ static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGMemOpIdx oi, label->label_ptr[0] = lptr; } -static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) +static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) { TCGMemOpIdx oi = lb->oi; TCGMemOp opc = get_memop(oi); TCGReg hi, lo, arg = TCG_REG_R3; - **lb->label_ptr |= reloc_pc14_val(*lb->label_ptr, s->code_ptr); + if (!reloc_pc14(lb->label_ptr[0], s->code_ptr)) { + return false; + } tcg_out_mov(s, TCG_TYPE_PTR, arg++, TCG_AREG0); @@ -1695,16 +1689,19 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) } tcg_out_b(s, 0, lb->raddr); + return true; } -static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) +static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) { TCGMemOpIdx oi = lb->oi; TCGMemOp opc = get_memop(oi); TCGMemOp s_bits = opc & MO_SIZE; TCGReg hi, lo, arg = TCG_REG_R3; - **lb->label_ptr |= reloc_pc14_val(*lb->label_ptr, s->code_ptr); + if (!reloc_pc14(lb->label_ptr[0], s->code_ptr)) { + return false; + } tcg_out_mov(s, TCG_TYPE_PTR, arg++, TCG_AREG0); @@ -1753,6 +1750,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) tcg_out_call(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]); tcg_out_b(s, 0, lb->raddr); + return true; } #endif /* SOFTMMU */ diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h index 60918cacb4..032439d806 100644 --- a/tcg/riscv/tcg-target.h +++ b/tcg/riscv/tcg-target.h @@ -93,6 +93,7 @@ typedef enum { #define TCG_TARGET_HAS_deposit_i32 0 #define TCG_TARGET_HAS_extract_i32 0 #define TCG_TARGET_HAS_sextract_i32 0 +#define TCG_TARGET_HAS_extract2_i32 0 #define TCG_TARGET_HAS_add2_i32 1 #define TCG_TARGET_HAS_sub2_i32 1 #define TCG_TARGET_HAS_mulu2_i32 0 @@ -128,6 +129,7 @@ typedef enum { #define TCG_TARGET_HAS_deposit_i64 0 #define TCG_TARGET_HAS_extract_i64 0 #define TCG_TARGET_HAS_sextract_i64 0 +#define TCG_TARGET_HAS_extract2_i64 0 #define TCG_TARGET_HAS_extrl_i64_i32 1 #define TCG_TARGET_HAS_extrh_i64_i32 1 #define TCG_TARGET_HAS_ext8s_i64 1 diff --git a/tcg/riscv/tcg-target.inc.c b/tcg/riscv/tcg-target.inc.c index b785f4acb7..2932505094 100644 --- a/tcg/riscv/tcg-target.inc.c +++ b/tcg/riscv/tcg-target.inc.c @@ -1065,7 +1065,7 @@ static void add_qemu_ldst_label(TCGContext *s, int is_ld, TCGMemOpIdx oi, label->label_ptr[0] = label_ptr[0]; } -static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) +static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) { TCGMemOpIdx oi = l->oi; TCGMemOp opc = get_memop(oi); @@ -1080,7 +1080,10 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) } /* resolve label address */ - patch_reloc(l->label_ptr[0], R_RISCV_BRANCH, (intptr_t) s->code_ptr, 0); + if (!patch_reloc(l->label_ptr[0], R_RISCV_BRANCH, + (intptr_t) s->code_ptr, 0)) { + return false; + } /* call load helper */ tcg_out_mov(s, TCG_TYPE_PTR, a0, TCG_AREG0); @@ -1092,9 +1095,10 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) tcg_out_mov(s, (opc & MO_SIZE) == MO_64, l->datalo_reg, a0); tcg_out_goto(s, l->raddr); + return true; } -static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) +static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) { TCGMemOpIdx oi = l->oi; TCGMemOp opc = get_memop(oi); @@ -1111,7 +1115,10 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) } /* resolve label address */ - patch_reloc(l->label_ptr[0], R_RISCV_BRANCH, (intptr_t) s->code_ptr, 0); + if (!patch_reloc(l->label_ptr[0], R_RISCV_BRANCH, + (intptr_t) s->code_ptr, 0)) { + return false; + } /* call store helper */ tcg_out_mov(s, TCG_TYPE_PTR, a0, TCG_AREG0); @@ -1133,6 +1140,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) tcg_out_call(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SSIZE)]); tcg_out_goto(s, l->raddr); + return true; } #endif /* CONFIG_SOFTMMU */ diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index 853ed6e7aa..07accabbd1 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -85,6 +85,7 @@ extern uint64_t s390_facilities; #define TCG_TARGET_HAS_deposit_i32 (s390_facilities & FACILITY_GEN_INST_EXT) #define TCG_TARGET_HAS_extract_i32 (s390_facilities & FACILITY_GEN_INST_EXT) #define TCG_TARGET_HAS_sextract_i32 0 +#define TCG_TARGET_HAS_extract2_i32 0 #define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_add2_i32 1 #define TCG_TARGET_HAS_sub2_i32 1 @@ -121,6 +122,7 @@ extern uint64_t s390_facilities; #define TCG_TARGET_HAS_deposit_i64 (s390_facilities & FACILITY_GEN_INST_EXT) #define TCG_TARGET_HAS_extract_i64 (s390_facilities & FACILITY_GEN_INST_EXT) #define TCG_TARGET_HAS_sextract_i64 0 +#define TCG_TARGET_HAS_extract2_i64 0 #define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_add2_i64 1 #define TCG_TARGET_HAS_sub2_i64 1 diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c index 7db90b3bae..3d6150b10e 100644 --- a/tcg/s390/tcg-target.inc.c +++ b/tcg/s390/tcg-target.inc.c @@ -1609,16 +1609,17 @@ static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGMemOpIdx oi, label->label_ptr[0] = label_ptr; } -static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) +static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) { TCGReg addr_reg = lb->addrlo_reg; TCGReg data_reg = lb->datalo_reg; TCGMemOpIdx oi = lb->oi; TCGMemOp opc = get_memop(oi); - bool ok = patch_reloc(lb->label_ptr[0], R_390_PC16DBL, - (intptr_t)s->code_ptr, 2); - tcg_debug_assert(ok); + if (!patch_reloc(lb->label_ptr[0], R_390_PC16DBL, + (intptr_t)s->code_ptr, 2)) { + return false; + } tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_R2, TCG_AREG0); if (TARGET_LONG_BITS == 64) { @@ -1630,18 +1631,20 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) tcg_out_mov(s, TCG_TYPE_I64, data_reg, TCG_REG_R2); tgen_gotoi(s, S390_CC_ALWAYS, lb->raddr); + return true; } -static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) +static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) { TCGReg addr_reg = lb->addrlo_reg; TCGReg data_reg = lb->datalo_reg; TCGMemOpIdx oi = lb->oi; TCGMemOp opc = get_memop(oi); - bool ok = patch_reloc(lb->label_ptr[0], R_390_PC16DBL, - (intptr_t)s->code_ptr, 2); - tcg_debug_assert(ok); + if (!patch_reloc(lb->label_ptr[0], R_390_PC16DBL, + (intptr_t)s->code_ptr, 2)) { + return false; + } tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_R2, TCG_AREG0); if (TARGET_LONG_BITS == 64) { @@ -1668,6 +1671,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) tcg_out_call(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]); tgen_gotoi(s, S390_CC_ALWAYS, lb->raddr); + return true; } #else static void tcg_prepare_user_ldst(TCGContext *s, TCGReg *addr_reg, diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index a0ed2a3342..633841ebf2 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -116,6 +116,7 @@ extern bool use_vis3_instructions; #define TCG_TARGET_HAS_deposit_i32 0 #define TCG_TARGET_HAS_extract_i32 0 #define TCG_TARGET_HAS_sextract_i32 0 +#define TCG_TARGET_HAS_extract2_i32 0 #define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_add2_i32 1 #define TCG_TARGET_HAS_sub2_i32 1 @@ -153,6 +154,7 @@ extern bool use_vis3_instructions; #define TCG_TARGET_HAS_deposit_i64 0 #define TCG_TARGET_HAS_extract_i64 0 #define TCG_TARGET_HAS_sextract_i64 0 +#define TCG_TARGET_HAS_extract2_i64 0 #define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_add2_i64 1 #define TCG_TARGET_HAS_sub2_i64 1 diff --git a/tcg/tcg-ldst.inc.c b/tcg/tcg-ldst.inc.c index 47f41b921b..05f9b3ccd6 100644 --- a/tcg/tcg-ldst.inc.c +++ b/tcg/tcg-ldst.inc.c @@ -38,19 +38,19 @@ typedef struct TCGLabelQemuLdst { * Generate TB finalization at the end of block */ -static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l); -static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l); +static bool tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l); +static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l); -static bool tcg_out_ldst_finalize(TCGContext *s) +static int tcg_out_ldst_finalize(TCGContext *s) { TCGLabelQemuLdst *lb; /* qemu_ld/st slow paths */ QSIMPLEQ_FOREACH(lb, &s->ldst_labels, next) { - if (lb->is_ld) { - tcg_out_qemu_ld_slow_path(s, lb); - } else { - tcg_out_qemu_st_slow_path(s, lb); + if (lb->is_ld + ? !tcg_out_qemu_ld_slow_path(s, lb) + : !tcg_out_qemu_st_slow_path(s, lb)) { + return -2; } /* Test for (pending) buffer overflow. The assumption is that any @@ -58,10 +58,10 @@ static bool tcg_out_ldst_finalize(TCGContext *s) the buffer completely. Thus we can test for overflow after generating code without having to check during generation. */ if (unlikely((void *)s->code_ptr > s->code_gen_highwater)) { - return false; + return -1; } } - return true; + return 0; } /* diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 1bd7ef24af..a00d1df37e 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -611,9 +611,22 @@ void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2, return; } - mask = (1u << len) - 1; t1 = tcg_temp_new_i32(); + if (TCG_TARGET_HAS_extract2_i32) { + if (ofs + len == 32) { + tcg_gen_shli_i32(t1, arg1, len); + tcg_gen_extract2_i32(ret, t1, arg2, len); + goto done; + } + if (ofs == 0) { + tcg_gen_extract2_i32(ret, arg1, arg2, len); + tcg_gen_rotli_i32(ret, ret, len); + goto done; + } + } + + mask = (1u << len) - 1; if (ofs + len < 32) { tcg_gen_andi_i32(t1, arg2, mask); tcg_gen_shli_i32(t1, t1, ofs); @@ -622,7 +635,7 @@ void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2, } tcg_gen_andi_i32(ret, arg1, ~(mask << ofs)); tcg_gen_or_i32(ret, ret, t1); - + done: tcg_temp_free_i32(t1); } @@ -809,6 +822,30 @@ void tcg_gen_sextract_i32(TCGv_i32 ret, TCGv_i32 arg, tcg_gen_sari_i32(ret, ret, 32 - len); } +/* + * Extract 32-bits from a 64-bit input, ah:al, starting from ofs. + * Unlike tcg_gen_extract_i32 above, len is fixed at 32. + */ +void tcg_gen_extract2_i32(TCGv_i32 ret, TCGv_i32 al, TCGv_i32 ah, + unsigned int ofs) +{ + tcg_debug_assert(ofs <= 32); + if (ofs == 0) { + tcg_gen_mov_i32(ret, al); + } else if (ofs == 32) { + tcg_gen_mov_i32(ret, ah); + } else if (al == ah) { + tcg_gen_rotri_i32(ret, al, ofs); + } else if (TCG_TARGET_HAS_extract2_i32) { + tcg_gen_op4i_i32(INDEX_op_extract2_i32, ret, al, ah, ofs); + } else { + TCGv_i32 t0 = tcg_temp_new_i32(); + tcg_gen_shri_i32(t0, al, ofs); + tcg_gen_deposit_i32(ret, t0, ah, 32 - ofs, ofs); + tcg_temp_free_i32(t0); + } +} + void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1, TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2) { @@ -1331,31 +1368,32 @@ static inline void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1, tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c); tcg_gen_movi_i32(TCGV_LOW(ret), 0); } - } else { - TCGv_i32 t0, t1; - - t0 = tcg_temp_new_i32(); - t1 = tcg_temp_new_i32(); - if (right) { - tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c); - if (arith) { - tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c); - } else { - tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c); - } + } else if (right) { + if (TCG_TARGET_HAS_extract2_i32) { + tcg_gen_extract2_i32(TCGV_LOW(ret), + TCGV_LOW(arg1), TCGV_HIGH(arg1), c); + } else { tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c); - tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0); - tcg_gen_mov_i32(TCGV_HIGH(ret), t1); + tcg_gen_deposit_i32(TCGV_LOW(ret), TCGV_LOW(ret), + TCGV_HIGH(arg1), 32 - c, c); + } + if (arith) { + tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c); } else { + tcg_gen_shri_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c); + } + } else { + if (TCG_TARGET_HAS_extract2_i32) { + tcg_gen_extract2_i32(TCGV_HIGH(ret), + TCGV_LOW(arg1), TCGV_HIGH(arg1), 32 - c); + } else { + TCGv_i32 t0 = tcg_temp_new_i32(); tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c); - /* Note: ret can be the same as arg1, so we use t1 */ - tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c); - tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c); - tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0); - tcg_gen_mov_i32(TCGV_LOW(ret), t1); + tcg_gen_deposit_i32(TCGV_HIGH(ret), t0, + TCGV_HIGH(arg1), c, 32 - c); + tcg_temp_free_i32(t0); } - tcg_temp_free_i32(t0); - tcg_temp_free_i32(t1); + tcg_gen_shli_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c); } } @@ -1999,9 +2037,22 @@ void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2, } } - mask = (1ull << len) - 1; t1 = tcg_temp_new_i64(); + if (TCG_TARGET_HAS_extract2_i64) { + if (ofs + len == 64) { + tcg_gen_shli_i64(t1, arg1, len); + tcg_gen_extract2_i64(ret, t1, arg2, len); + goto done; + } + if (ofs == 0) { + tcg_gen_extract2_i64(ret, arg1, arg2, len); + tcg_gen_rotli_i64(ret, ret, len); + goto done; + } + } + + mask = (1ull << len) - 1; if (ofs + len < 64) { tcg_gen_andi_i64(t1, arg2, mask); tcg_gen_shli_i64(t1, t1, ofs); @@ -2010,7 +2061,7 @@ void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2, } tcg_gen_andi_i64(ret, arg1, ~(mask << ofs)); tcg_gen_or_i64(ret, ret, t1); - + done: tcg_temp_free_i64(t1); } @@ -2297,6 +2348,30 @@ void tcg_gen_sextract_i64(TCGv_i64 ret, TCGv_i64 arg, tcg_gen_sari_i64(ret, ret, 64 - len); } +/* + * Extract 64 bits from a 128-bit input, ah:al, starting from ofs. + * Unlike tcg_gen_extract_i64 above, len is fixed at 64. + */ +void tcg_gen_extract2_i64(TCGv_i64 ret, TCGv_i64 al, TCGv_i64 ah, + unsigned int ofs) +{ + tcg_debug_assert(ofs <= 64); + if (ofs == 0) { + tcg_gen_mov_i64(ret, al); + } else if (ofs == 64) { + tcg_gen_mov_i64(ret, ah); + } else if (al == ah) { + tcg_gen_rotri_i64(ret, al, ofs); + } else if (TCG_TARGET_HAS_extract2_i64) { + tcg_gen_op4i_i64(INDEX_op_extract2_i64, ret, al, ah, ofs); + } else { + TCGv_i64 t0 = tcg_temp_new_i64(); + tcg_gen_shri_i64(t0, al, ofs); + tcg_gen_deposit_i64(ret, t0, ah, 64 - ofs, ofs); + tcg_temp_free_i64(t0); + } +} + void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1, TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2) { diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index d3e51b15af..1f1824c30a 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -308,6 +308,8 @@ void tcg_gen_extract_i32(TCGv_i32 ret, TCGv_i32 arg, unsigned int ofs, unsigned int len); void tcg_gen_sextract_i32(TCGv_i32 ret, TCGv_i32 arg, unsigned int ofs, unsigned int len); +void tcg_gen_extract2_i32(TCGv_i32 ret, TCGv_i32 al, TCGv_i32 ah, + unsigned int ofs); void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *); void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *); void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret, @@ -501,6 +503,8 @@ void tcg_gen_extract_i64(TCGv_i64 ret, TCGv_i64 arg, unsigned int ofs, unsigned int len); void tcg_gen_sextract_i64(TCGv_i64 ret, TCGv_i64 arg, unsigned int ofs, unsigned int len); +void tcg_gen_extract2_i64(TCGv_i64 ret, TCGv_i64 al, TCGv_i64 ah, + unsigned int ofs); void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *); void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *); void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret, @@ -1068,6 +1072,7 @@ void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t); #define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i64 #define tcg_gen_extract_tl tcg_gen_extract_i64 #define tcg_gen_sextract_tl tcg_gen_sextract_i64 +#define tcg_gen_extract2_tl tcg_gen_extract2_i64 #define tcg_const_tl tcg_const_i64 #define tcg_const_local_tl tcg_const_local_i64 #define tcg_gen_movcond_tl tcg_gen_movcond_i64 @@ -1178,6 +1183,7 @@ void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t); #define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i32 #define tcg_gen_extract_tl tcg_gen_extract_i32 #define tcg_gen_sextract_tl tcg_gen_sextract_i32 +#define tcg_gen_extract2_tl tcg_gen_extract2_i32 #define tcg_const_tl tcg_const_i32 #define tcg_const_local_tl tcg_const_local_i32 #define tcg_gen_movcond_tl tcg_gen_movcond_i32 diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index 4e0238ad1a..1bad6e4208 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -79,6 +79,7 @@ DEF(rotr_i32, 1, 2, 0, IMPL(TCG_TARGET_HAS_rot_i32)) DEF(deposit_i32, 1, 2, 2, IMPL(TCG_TARGET_HAS_deposit_i32)) DEF(extract_i32, 1, 1, 2, IMPL(TCG_TARGET_HAS_extract_i32)) DEF(sextract_i32, 1, 1, 2, IMPL(TCG_TARGET_HAS_sextract_i32)) +DEF(extract2_i32, 1, 2, 1, IMPL(TCG_TARGET_HAS_extract2_i32)) DEF(brcond_i32, 0, 2, 2, TCG_OPF_BB_END) @@ -146,6 +147,7 @@ DEF(rotr_i64, 1, 2, 0, IMPL64 | IMPL(TCG_TARGET_HAS_rot_i64)) DEF(deposit_i64, 1, 2, 2, IMPL64 | IMPL(TCG_TARGET_HAS_deposit_i64)) DEF(extract_i64, 1, 1, 2, IMPL64 | IMPL(TCG_TARGET_HAS_extract_i64)) DEF(sextract_i64, 1, 1, 2, IMPL64 | IMPL(TCG_TARGET_HAS_sextract_i64)) +DEF(extract2_i64, 1, 2, 1, IMPL64 | IMPL(TCG_TARGET_HAS_extract2_i64)) /* size changing ops */ DEF(ext_i32_i64, 1, 1, 0, IMPL64) diff --git a/tcg/tcg-pool.inc.c b/tcg/tcg-pool.inc.c index 7af5513ff3..4eaa84b631 100644 --- a/tcg/tcg-pool.inc.c +++ b/tcg/tcg-pool.inc.c @@ -121,14 +121,14 @@ static inline void new_pool_l8(TCGContext *s, int rtype, tcg_insn_unit *label, /* To be provided by cpu/tcg-target.inc.c. */ static void tcg_out_nop_fill(tcg_insn_unit *p, int count); -static bool tcg_out_pool_finalize(TCGContext *s) +static int tcg_out_pool_finalize(TCGContext *s) { TCGLabelPoolData *p = s->pool_labels; TCGLabelPoolData *l = NULL; void *a; if (p == NULL) { - return true; + return 0; } /* ??? Round up to qemu_icache_linesize, but then do not round @@ -142,15 +142,17 @@ static bool tcg_out_pool_finalize(TCGContext *s) size_t size = sizeof(tcg_target_ulong) * p->nlong; if (!l || l->nlong != p->nlong || memcmp(l->data, p->data, size)) { if (unlikely(a > s->code_gen_highwater)) { - return false; + return -1; } memcpy(a, p->data, size); a += size; l = p; } - patch_reloc(p->label, p->rtype, (intptr_t)a - size, p->addend); + if (!patch_reloc(p->label, p->rtype, (intptr_t)a - size, p->addend)) { + return -2; + } } s->code_ptr = a; - return true; + return 0; } diff --git a/tcg/tcg.c b/tcg/tcg.c index 9b2bf7f439..f7bef51de8 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -33,6 +33,7 @@ #include "qemu/error-report.h" #include "qemu/cutils.h" #include "qemu/host-utils.h" +#include "qemu/qemu-print.h" #include "qemu/timer.h" /* Note: the long term plan is to reduce the dependencies on the QEMU @@ -127,7 +128,7 @@ static void tcg_out_call(TCGContext *s, tcg_insn_unit *target); static int tcg_target_const_match(tcg_target_long val, TCGType type, const TCGArgConstraint *arg_ct); #ifdef TCG_TARGET_NEED_LDST_LABELS -static bool tcg_out_ldst_finalize(TCGContext *s); +static int tcg_out_ldst_finalize(TCGContext *s); #endif #define TCG_HIGHWATER 1024 @@ -262,37 +263,17 @@ static __attribute__((unused)) inline void tcg_patch64(tcg_insn_unit *p, static void tcg_out_reloc(TCGContext *s, tcg_insn_unit *code_ptr, int type, TCGLabel *l, intptr_t addend) { - TCGRelocation *r; - - if (l->has_value) { - /* FIXME: This may break relocations on RISC targets that - modify instruction fields in place. The caller may not have - written the initial value. */ - bool ok = patch_reloc(code_ptr, type, l->u.value, addend); - tcg_debug_assert(ok); - } else { - /* add a new relocation entry */ - r = tcg_malloc(sizeof(TCGRelocation)); - r->type = type; - r->ptr = code_ptr; - r->addend = addend; - r->next = l->u.first_reloc; - l->u.first_reloc = r; - } + TCGRelocation *r = tcg_malloc(sizeof(TCGRelocation)); + + r->type = type; + r->ptr = code_ptr; + r->addend = addend; + QSIMPLEQ_INSERT_TAIL(&l->relocs, r, next); } static void tcg_out_label(TCGContext *s, TCGLabel *l, tcg_insn_unit *ptr) { - intptr_t value = (intptr_t)ptr; - TCGRelocation *r; - tcg_debug_assert(!l->has_value); - - for (r = l->u.first_reloc; r != NULL; r = r->next) { - bool ok = patch_reloc(r->ptr, r->type, value, r->addend); - tcg_debug_assert(ok); - } - l->has_value = 1; l->u.value_ptr = ptr; } @@ -302,16 +283,32 @@ TCGLabel *gen_new_label(void) TCGContext *s = tcg_ctx; TCGLabel *l = tcg_malloc(sizeof(TCGLabel)); - *l = (TCGLabel){ - .id = s->nb_labels++ - }; -#ifdef CONFIG_DEBUG_TCG + memset(l, 0, sizeof(TCGLabel)); + l->id = s->nb_labels++; + QSIMPLEQ_INIT(&l->relocs); + QSIMPLEQ_INSERT_TAIL(&s->labels, l, next); -#endif return l; } +static bool tcg_resolve_relocs(TCGContext *s) +{ + TCGLabel *l; + + QSIMPLEQ_FOREACH(l, &s->labels, next) { + TCGRelocation *r; + uintptr_t value = l->u.value; + + QSIMPLEQ_FOREACH(r, &l->relocs, next) { + if (!patch_reloc(r->ptr, r->type, value, r->addend)) { + return false; + } + } + } + return true; +} + static void set_jmp_reset_offset(TCGContext *s, int which) { size_t off = tcg_current_code_size(s); @@ -1022,8 +1019,8 @@ void tcg_prologue_init(TCGContext *s) #ifdef TCG_TARGET_NEED_POOL_LABELS /* Allow the prologue to put e.g. guest_base into a pool entry. */ { - bool ok = tcg_out_pool_finalize(s); - tcg_debug_assert(ok); + int result = tcg_out_pool_finalize(s); + tcg_debug_assert(result == 0); } #endif @@ -1095,9 +1092,7 @@ void tcg_func_start(TCGContext *s) QTAILQ_INIT(&s->ops); QTAILQ_INIT(&s->free_ops); -#ifdef CONFIG_DEBUG_TCG QSIMPLEQ_INIT(&s->labels); -#endif } static inline TCGTemp *tcg_temp_alloc(TCGContext *s) @@ -1425,6 +1420,8 @@ bool tcg_op_supported(TCGOpcode op) return TCG_TARGET_HAS_extract_i32; case INDEX_op_sextract_i32: return TCG_TARGET_HAS_sextract_i32; + case INDEX_op_extract2_i32: + return TCG_TARGET_HAS_extract2_i32; case INDEX_op_add2_i32: return TCG_TARGET_HAS_add2_i32; case INDEX_op_sub2_i32: @@ -1522,6 +1519,8 @@ bool tcg_op_supported(TCGOpcode op) return TCG_TARGET_HAS_extract_i64; case INDEX_op_sextract_i64: return TCG_TARGET_HAS_sextract_i64; + case INDEX_op_extract2_i64: + return TCG_TARGET_HAS_extract2_i64; case INDEX_op_extrl_i64_i32: return TCG_TARGET_HAS_extrl_i64_i32; case INDEX_op_extrh_i64_i32: @@ -3768,14 +3767,14 @@ static void tcg_profile_snapshot_table(TCGProfile *prof) tcg_profile_snapshot(prof, false, true); } -void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf) +void tcg_dump_op_count(void) { TCGProfile prof = {}; int i; tcg_profile_snapshot_table(&prof); for (i = 0; i < NB_OPS; i++) { - cpu_fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, + qemu_printf("%s %" PRId64 "\n", tcg_op_defs[i].name, prof.table_op_count[i]); } } @@ -3795,9 +3794,9 @@ int64_t tcg_cpu_exec_time(void) return ret; } #else -void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf) +void tcg_dump_op_count(void) { - cpu_fprintf(f, "[TCG profiler not compiled]\n"); + qemu_printf("[TCG profiler not compiled]\n"); } int64_t tcg_cpu_exec_time(void) @@ -3991,21 +3990,30 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb) if (unlikely((void *)s->code_ptr > s->code_gen_highwater)) { return -1; } + /* Test for TB overflow, as seen by gen_insn_end_off. */ + if (unlikely(tcg_current_code_size(s) > UINT16_MAX)) { + return -2; + } } tcg_debug_assert(num_insns >= 0); s->gen_insn_end_off[num_insns] = tcg_current_code_size(s); /* Generate TB finalization at the end of block */ #ifdef TCG_TARGET_NEED_LDST_LABELS - if (!tcg_out_ldst_finalize(s)) { - return -1; + i = tcg_out_ldst_finalize(s); + if (i < 0) { + return i; } #endif #ifdef TCG_TARGET_NEED_POOL_LABELS - if (!tcg_out_pool_finalize(s)) { - return -1; + i = tcg_out_pool_finalize(s); + if (i < 0) { + return i; } #endif + if (!tcg_resolve_relocs(s)) { + return -2; + } /* flush instruction cache */ flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr); @@ -4014,7 +4022,7 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb) } #ifdef CONFIG_PROFILER -void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) +void tcg_dump_info(void) { TCGProfile prof = {}; const TCGProfile *s; @@ -4028,52 +4036,53 @@ void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) tb_div_count = tb_count ? tb_count : 1; tot = s->interm_time + s->code_time; - cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n", + qemu_printf("JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n", tot, tot / 2.4e9); - cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n", + qemu_printf("translated TBs %" PRId64 " (aborted=%" PRId64 + " %0.1f%%)\n", tb_count, s->tb_count1 - tb_count, (double)(s->tb_count1 - s->tb_count) / (s->tb_count1 ? s->tb_count1 : 1) * 100.0); - cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n", + qemu_printf("avg ops/TB %0.1f max=%d\n", (double)s->op_count / tb_div_count, s->op_count_max); - cpu_fprintf(f, "deleted ops/TB %0.2f\n", + qemu_printf("deleted ops/TB %0.2f\n", (double)s->del_op_count / tb_div_count); - cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n", + qemu_printf("avg temps/TB %0.2f max=%d\n", (double)s->temp_count / tb_div_count, s->temp_count_max); - cpu_fprintf(f, "avg host code/TB %0.1f\n", + qemu_printf("avg host code/TB %0.1f\n", (double)s->code_out_len / tb_div_count); - cpu_fprintf(f, "avg search data/TB %0.1f\n", + qemu_printf("avg search data/TB %0.1f\n", (double)s->search_out_len / tb_div_count); - cpu_fprintf(f, "cycles/op %0.1f\n", + qemu_printf("cycles/op %0.1f\n", s->op_count ? (double)tot / s->op_count : 0); - cpu_fprintf(f, "cycles/in byte %0.1f\n", + qemu_printf("cycles/in byte %0.1f\n", s->code_in_len ? (double)tot / s->code_in_len : 0); - cpu_fprintf(f, "cycles/out byte %0.1f\n", + qemu_printf("cycles/out byte %0.1f\n", s->code_out_len ? (double)tot / s->code_out_len : 0); - cpu_fprintf(f, "cycles/search byte %0.1f\n", + qemu_printf("cycles/search byte %0.1f\n", s->search_out_len ? (double)tot / s->search_out_len : 0); if (tot == 0) { tot = 1; } - cpu_fprintf(f, " gen_interm time %0.1f%%\n", + qemu_printf(" gen_interm time %0.1f%%\n", (double)s->interm_time / tot * 100.0); - cpu_fprintf(f, " gen_code time %0.1f%%\n", + qemu_printf(" gen_code time %0.1f%%\n", (double)s->code_time / tot * 100.0); - cpu_fprintf(f, "optim./code time %0.1f%%\n", + qemu_printf("optim./code time %0.1f%%\n", (double)s->opt_time / (s->code_time ? s->code_time : 1) * 100.0); - cpu_fprintf(f, "liveness/code time %0.1f%%\n", + qemu_printf("liveness/code time %0.1f%%\n", (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0); - cpu_fprintf(f, "cpu_restore count %" PRId64 "\n", + qemu_printf("cpu_restore count %" PRId64 "\n", s->restore_count); - cpu_fprintf(f, " avg cycles %0.1f\n", + qemu_printf(" avg cycles %0.1f\n", s->restore_count ? (double)s->restore_time / s->restore_count : 0); } #else -void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) +void tcg_dump_info(void) { - cpu_fprintf(f, "[TCG profiler not compiled]\n"); + qemu_printf("[TCG profiler not compiled]\n"); } #endif diff --git a/tcg/tcg.h b/tcg/tcg.h index 32b7cf3489..cfc57110a1 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -125,6 +125,7 @@ typedef uint64_t TCGRegSet; #define TCG_TARGET_HAS_deposit_i64 0 #define TCG_TARGET_HAS_extract_i64 0 #define TCG_TARGET_HAS_sextract_i64 0 +#define TCG_TARGET_HAS_extract2_i64 0 #define TCG_TARGET_HAS_movcond_i64 0 #define TCG_TARGET_HAS_add2_i64 0 #define TCG_TARGET_HAS_sub2_i64 0 @@ -237,12 +238,13 @@ typedef uint64_t tcg_insn_unit; do { if (!(X)) { __builtin_unreachable(); } } while (0) #endif -typedef struct TCGRelocation { - struct TCGRelocation *next; - int type; +typedef struct TCGRelocation TCGRelocation; +struct TCGRelocation { + QSIMPLEQ_ENTRY(TCGRelocation) next; tcg_insn_unit *ptr; intptr_t addend; -} TCGRelocation; + int type; +}; typedef struct TCGLabel TCGLabel; struct TCGLabel { @@ -253,11 +255,9 @@ struct TCGLabel { union { uintptr_t value; tcg_insn_unit *value_ptr; - TCGRelocation *first_reloc; } u; -#ifdef CONFIG_DEBUG_TCG + QSIMPLEQ_HEAD(, TCGRelocation) relocs; QSIMPLEQ_ENTRY(TCGLabel) next; -#endif }; typedef struct TCGPool { @@ -690,7 +690,6 @@ struct TCGContext { #endif #ifdef CONFIG_DEBUG_TCG - QSIMPLEQ_HEAD(, TCGLabel) labels; int temps_in_use; int goto_tb_issue_mask; #endif @@ -728,6 +727,7 @@ struct TCGContext { TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */ QTAILQ_HEAD(, TCGOp) ops, free_ops; + QSIMPLEQ_HEAD(, TCGLabel) labels; /* Tells which temporary holds a given register. It does not take into account fixed registers */ @@ -1017,8 +1017,8 @@ int tcg_check_temp_count(void); #endif int64_t tcg_cpu_exec_time(void); -void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf); -void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf); +void tcg_dump_info(void); +void tcg_dump_op_count(void); #define TCG_CT_ALIAS 0x80 #define TCG_CT_IALIAS 0x40 diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 086f34e69a..8b90ab71cb 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -71,6 +71,7 @@ #define TCG_TARGET_HAS_deposit_i32 1 #define TCG_TARGET_HAS_extract_i32 0 #define TCG_TARGET_HAS_sextract_i32 0 +#define TCG_TARGET_HAS_extract2_i32 0 #define TCG_TARGET_HAS_eqv_i32 0 #define TCG_TARGET_HAS_nand_i32 0 #define TCG_TARGET_HAS_nor_i32 0 @@ -97,6 +98,7 @@ #define TCG_TARGET_HAS_deposit_i64 1 #define TCG_TARGET_HAS_extract_i64 0 #define TCG_TARGET_HAS_sextract_i64 0 +#define TCG_TARGET_HAS_extract2_i64 0 #define TCG_TARGET_HAS_div_i64 0 #define TCG_TARGET_HAS_rem_i64 0 #define TCG_TARGET_HAS_ext8s_i64 1 diff --git a/tests/.gitignore b/tests/.gitignore index c88f8f2537..f9c0170881 100644 --- a/tests/.gitignore +++ b/tests/.gitignore @@ -14,6 +14,7 @@ test-* test-qapi-commands.[ch] include/test-qapi-commands-sub-module.[ch] test-qapi-commands-sub-sub-module.[ch] +test-qapi-emit-events.[ch] test-qapi-events.[ch] include/test-qapi-events-sub-module.[ch] test-qapi-events-sub-sub-module.[ch] diff --git a/tests/Makefile.include b/tests/Makefile.include index a5719551dd..e2432d5e77 100644 --- a/tests/Makefile.include +++ b/tests/Makefile.include @@ -195,7 +195,6 @@ check-qtest-i386-$(CONFIG_SLIRP) += tests/test-netfilter$(EXESUF) check-qtest-i386-$(CONFIG_POSIX) += tests/test-filter-mirror$(EXESUF) check-qtest-i386-$(CONFIG_RTL8139_PCI) += tests/test-filter-redirector$(EXESUF) check-qtest-i386-y += tests/migration-test$(EXESUF) -check-qtest-i386-y += tests/test-announce-self$(EXESUF) check-qtest-i386-y += tests/test-x86-cpuid-compat$(EXESUF) check-qtest-i386-y += tests/numa-test$(EXESUF) check-qtest-x86_64-y += $(check-qtest-i386-y) @@ -232,7 +231,6 @@ check-qtest-ppc64-y += $(check-qtest-ppc-y) check-qtest-ppc64-$(CONFIG_PSERIES) += tests/device-plug-test$(EXESUF) check-qtest-ppc64-$(CONFIG_POWERNV) += tests/pnv-xscom-test$(EXESUF) check-qtest-ppc64-y += tests/migration-test$(EXESUF) -check-qtest-ppc64-y += tests/test-announce-self$(EXESUF) check-qtest-ppc64-$(CONFIG_PSERIES) += tests/rtas-test$(EXESUF) check-qtest-ppc64-$(CONFIG_SLIRP) += tests/pxe-test$(EXESUF) check-qtest-ppc64-$(CONFIG_USB_UHCI) += tests/usb-hcd-uhci-test$(EXESUF) @@ -817,7 +815,6 @@ tests/usb-hcd-ehci-test$(EXESUF): tests/usb-hcd-ehci-test.o $(libqos-usb-obj-y) tests/usb-hcd-xhci-test$(EXESUF): tests/usb-hcd-xhci-test.o $(libqos-usb-obj-y) tests/cpu-plug-test$(EXESUF): tests/cpu-plug-test.o tests/migration-test$(EXESUF): tests/migration-test.o -tests/test-announce-self$(EXESUF): tests/test-announce-self.o tests/qemu-iotests/socket_scm_helper$(EXESUF): tests/qemu-iotests/socket_scm_helper.o tests/test-qemu-opts$(EXESUF): tests/test-qemu-opts.o $(test-util-obj-y) tests/test-keyval$(EXESUF): tests/test-keyval.o $(test-util-obj-y) $(test-qapi-obj-y) @@ -915,7 +912,7 @@ check-speed: $(check-speed-y) # gtester tests with TAP output -$(patsubst %, check-report-qtest-%.tap, $(QTEST_TARGETS)): check-report-qtest-%.tap: $(check-qtest-y) +$(patsubst %, check-report-qtest-%.tap, $(QTEST_TARGETS)): check-report-qtest-%.tap: subdir-%-softmmu $(check-qtest-y) $(call do_test_tap, $(check-qtest-$*-y) $(check-qtest-generic-y), \ QTEST_QEMU_BINARY=$*-softmmu/qemu-system-$* \ QTEST_QEMU_IMG=qemu-img$(EXESUF)) @@ -1061,10 +1058,9 @@ endif # Per guest TCG tests -LINUX_USER_TARGETS=$(filter %-linux-user,$(TARGET_DIRS)) -BUILD_TCG_TARGET_RULES=$(patsubst %,build-tcg-tests-%, $(LINUX_USER_TARGETS)) -CLEAN_TCG_TARGET_RULES=$(patsubst %,clean-tcg-tests-%, $(LINUX_USER_TARGETS)) -RUN_TCG_TARGET_RULES=$(patsubst %,run-tcg-tests-%, $(LINUX_USER_TARGETS)) +BUILD_TCG_TARGET_RULES=$(patsubst %,build-tcg-tests-%, $(TARGET_DIRS)) +CLEAN_TCG_TARGET_RULES=$(patsubst %,clean-tcg-tests-%, $(TARGET_DIRS)) +RUN_TCG_TARGET_RULES=$(patsubst %,run-tcg-tests-%, $(TARGET_DIRS)) ifeq ($(HAVE_USER_DOCKER),y) # Probe for the Docker Builds needed for each build @@ -1091,7 +1087,7 @@ clean-tcg-tests-%: build-tcg: $(BUILD_TCG_TARGET_RULES) .PHONY: check-tcg -check-tcg: check-softfloat $(RUN_TCG_TARGET_RULES) +check-tcg: $(RUN_TCG_TARGET_RULES) .PHONY: clean-tcg clean-tcg: $(CLEAN_TCG_TARGET_RULES) @@ -1168,7 +1164,7 @@ check-acceptance: check-venv $(TESTS_RESULTS_DIR) # Consolidated targets -.PHONY: check-qapi-schema check-qtest check-unit check check-clean +.PHONY: check-block check-qapi-schema check-qtest check-unit check check-clean check-qapi-schema: $(patsubst %,check-%, $(check-qapi-schema-y)) check-tests/qapi-schema/doc-good.texi check-qtest: $(patsubst %,check-qtest-%, $(QTEST_TARGETS)) check-block: $(patsubst %,check-%, $(check-block-y)) diff --git a/tests/acceptance/cpu_queries.py b/tests/acceptance/cpu_queries.py new file mode 100644 index 0000000000..e71edec39f --- /dev/null +++ b/tests/acceptance/cpu_queries.py @@ -0,0 +1,33 @@ +# Sanity check of query-cpu-* results +# +# Copyright (c) 2019 Red Hat, Inc. +# +# Author: +# Eduardo Habkost <ehabkost@redhat.com> +# +# This work is licensed under the terms of the GNU GPL, version 2 or +# later. See the COPYING file in the top-level directory. + +import logging + +from avocado_qemu import Test + +class QueryCPUModelExpansion(Test): + """ + Run query-cpu-model-expansion for each CPU model, and validate results + """ + + def test(self): + self.vm.set_machine('none') + self.vm.add_args('-S') + self.vm.launch() + + cpus = self.vm.command('query-cpu-definitions') + for c in cpus: + print(repr(c)) + self.assertNotIn('', c['unavailable-features'], c['name']) + + for c in cpus: + model = {'name': c['name']} + e = self.vm.command('query-cpu-model-expansion', model=model, type='full') + self.assertEquals(e['model']['name'], c['name']) diff --git a/tests/acceptance/empty_cpu_model.py b/tests/acceptance/empty_cpu_model.py new file mode 100644 index 0000000000..3f4f663582 --- /dev/null +++ b/tests/acceptance/empty_cpu_model.py @@ -0,0 +1,19 @@ +# Check for crash when using empty -cpu option +# +# Copyright (c) 2019 Red Hat, Inc. +# +# Author: +# Eduardo Habkost <ehabkost@redhat.com> +# +# This work is licensed under the terms of the GNU GPL, version 2 or +# later. See the COPYING file in the top-level directory. +import subprocess +from avocado_qemu import Test + +class EmptyCPUModel(Test): + def test(self): + cmd = [self.qemu_bin, '-S', '-display', 'none', '-machine', 'none', '-cpu', ''] + r = subprocess.run(cmd, stderr=subprocess.PIPE, stdout=subprocess.PIPE) + self.assertEquals(r.returncode, 1, "QEMU exit code should be 1") + self.assertEquals(r.stdout, b'', "QEMU stdout should be empty") + self.assertNotEquals(r.stderr, b'', "QEMU stderr shouldn't be empty") diff --git a/tests/ahci-test.c b/tests/ahci-test.c index 9f07e6f2ce..086811e602 100644 --- a/tests/ahci-test.c +++ b/tests/ahci-test.c @@ -38,7 +38,7 @@ #include "hw/pci/pci_regs.h" /* TODO actually test the results and get rid of this */ -#define qmp_discard_response(...) qobject_unref(qmp(__VA_ARGS__)) +#define qmp_discard_response(s, ...) qobject_unref(qtest_qmp(s, __VA_ARGS__)) /* Test images sizes in MB */ #define TEST_IMAGE_SIZE_MB_LARGE (200 * 1024) @@ -161,7 +161,6 @@ static AHCIQState *ahci_vboot(const char *cli, va_list ap) s = g_new0(AHCIQState, 1); s->parent = qtest_pc_vboot(cli, ap); - global_qtest = s->parent->qts; alloc_set_flags(&s->parent->alloc, ALLOC_LEAK_ASSERT); /* Verify that we have an AHCI device present. */ @@ -201,7 +200,7 @@ static void ahci_shutdown(AHCIQState *ahci) { QOSState *qs = ahci->parent; - set_context(qs); + assert(!global_qtest); ahci_clean_mem(ahci); free_ahci_device(ahci->dev); g_free(ahci); @@ -874,15 +873,15 @@ static void ahci_test_io_rw_simple(AHCIQState *ahci, unsigned bufsize, /* Write some indicative pattern to our buffer. */ generate_pattern(tx, bufsize, AHCI_SECTOR_SIZE); - bufwrite(ptr, tx, bufsize); + qtest_bufwrite(ahci->parent->qts, ptr, tx, bufsize); /* Write this buffer to disk, then read it back to the DMA buffer. */ ahci_guest_io(ahci, port, write_cmd, ptr, bufsize, sector); - qmemset(ptr, 0x00, bufsize); + qtest_memset(ahci->parent->qts, ptr, 0x00, bufsize); ahci_guest_io(ahci, port, read_cmd, ptr, bufsize, sector); /*** Read back the Data ***/ - bufread(ptr, rx, bufsize); + qtest_bufread(ahci->parent->qts, ptr, rx, bufsize); g_assert_cmphex(memcmp(tx, rx, bufsize), ==, 0); ahci_free(ahci, ptr); @@ -923,7 +922,7 @@ static void ahci_test_max(AHCIQState *ahci) } port = ahci_test_nondata(ahci, cmd); - memread(ahci->port[port].fb + 0x40, d2h, 0x20); + qtest_memread(ahci->parent->qts, ahci->port[port].fb + 0x40, d2h, 0x20); nsect = (uint64_t)d2h->lba_hi[2] << 40 | (uint64_t)d2h->lba_hi[1] << 32 | (uint64_t)d2h->lba_hi[0] << 24 | @@ -1041,7 +1040,7 @@ static void test_dma_fragmented(void) /* Create a DMA buffer in guest memory, and write our pattern to it. */ ptr = guest_alloc(&ahci->parent->alloc, bufsize); g_assert(ptr); - bufwrite(ptr, tx, bufsize); + qtest_bufwrite(ahci->parent->qts, ptr, tx, bufsize); cmd = ahci_command_create(CMD_WRITE_DMA); ahci_command_adjust(cmd, 0, ptr, bufsize, 32); @@ -1058,7 +1057,7 @@ static void test_dma_fragmented(void) ahci_command_free(cmd); /* Read back the guest's receive buffer into local memory */ - bufread(ptr, rx, bufsize); + qtest_bufread(ahci->parent->qts, ptr, rx, bufsize); guest_free(&ahci->parent->alloc, ptr); g_assert_cmphex(memcmp(tx, rx, bufsize), ==, 0); @@ -1169,8 +1168,6 @@ static void ahci_migrate_simple(uint8_t cmd_read, uint8_t cmd_write) "-drive if=ide,format=%s,file=%s " "-incoming %s", imgfmt, tmp_path, uri); - set_context(src->parent); - /* initialize */ px = ahci_port_select(src); ahci_port_clear(src, px); @@ -1238,7 +1235,7 @@ static void ahci_halted_io_test(uint8_t cmd_read, uint8_t cmd_write) generate_pattern(tx, bufsize, AHCI_SECTOR_SIZE); ptr = ahci_alloc(ahci, bufsize); g_assert(ptr); - memwrite(ptr, tx, bufsize); + qtest_memwrite(ahci->parent->qts, ptr, tx, bufsize); /* Attempt to write (and fail) */ cmd = ahci_guest_io_halt(ahci, port, cmd_write, @@ -1304,8 +1301,6 @@ static void ahci_migrate_halted_io(uint8_t cmd_read, uint8_t cmd_write) "-incoming %s", tmp_path, imgfmt, uri); - set_context(src->parent); - /* Initialize and prepare */ port = ahci_port_select(src); ahci_port_clear(src, port); @@ -1314,7 +1309,7 @@ static void ahci_migrate_halted_io(uint8_t cmd_read, uint8_t cmd_write) /* create DMA source buffer and write pattern */ ptr = ahci_alloc(src, bufsize); g_assert(ptr); - memwrite(ptr, tx, bufsize); + qtest_memwrite(src->parent->qts, ptr, tx, bufsize); /* Write, trigger the VM to stop, migrate, then resume. */ cmd = ahci_guest_io_halt(src, port, cmd_write, @@ -1372,8 +1367,6 @@ static void test_flush_migrate(void) "-device ide-hd,drive=drive0 " "-incoming %s", tmp_path, imgfmt, uri); - set_context(src->parent); - px = ahci_port_select(src); ahci_port_clear(src, px); @@ -1384,14 +1377,14 @@ static void test_flush_migrate(void) cmd = ahci_command_create(CMD_FLUSH_CACHE); ahci_command_commit(src, cmd, px); ahci_command_issue_async(src, cmd); - qmp_eventwait("STOP"); + qtest_qmp_eventwait(src->parent->qts, "STOP"); /* Migrate over */ ahci_migrate(src, dst, uri); /* Complete the command */ - qmp_send("{'execute':'cont' }"); - qmp_eventwait("RESUME"); + qtest_qmp_send(dst->parent->qts, "{'execute':'cont' }"); + qtest_qmp_eventwait(dst->parent->qts, "RESUME"); ahci_command_wait(dst, cmd); ahci_command_verify(dst, cmd); @@ -1483,7 +1476,7 @@ static int ahci_cb_cmp_buff(AHCIQState *ahci, AHCICommand *cmd, } rx = g_malloc0(opts->size); - bufread(opts->buffer, rx, opts->size); + qtest_bufread(ahci->parent->qts, opts->buffer, rx, opts->size); g_assert_cmphex(memcmp(tx, rx, opts->size), ==, 0); g_free(rx); @@ -1558,9 +1551,10 @@ static void test_atapi_bcl(void) } -static void atapi_wait_tray(bool open) +static void atapi_wait_tray(AHCIQState *ahci, bool open) { - QDict *rsp = qmp_eventwait_ref("DEVICE_TRAY_MOVED"); + QDict *rsp = qtest_qmp_eventwait_ref(ahci->parent->qts, + "DEVICE_TRAY_MOVED"); QDict *data = qdict_get_qdict(rsp, "data"); if (open) { g_assert(qdict_get_bool(data, "tray-open")); @@ -1587,43 +1581,46 @@ static void test_atapi_tray(void) port = ahci_port_select(ahci); ahci_atapi_eject(ahci, port); - atapi_wait_tray(true); + atapi_wait_tray(ahci, true); ahci_atapi_load(ahci, port); - atapi_wait_tray(false); + atapi_wait_tray(ahci, false); /* Remove media */ - qmp_send("{'execute': 'blockdev-open-tray'," - " 'arguments': {'id': 'cd0'}}"); - atapi_wait_tray(true); - rsp = qmp_receive(); + qtest_qmp_send(ahci->parent->qts, "{'execute': 'blockdev-open-tray', " + "'arguments': {'id': 'cd0'}}"); + atapi_wait_tray(ahci, true); + rsp = qtest_qmp_receive(ahci->parent->qts); qobject_unref(rsp); - qmp_discard_response("{'execute': 'blockdev-remove-medium', " + qmp_discard_response(ahci->parent->qts, + "{'execute': 'blockdev-remove-medium', " "'arguments': {'id': 'cd0'}}"); /* Test the tray without a medium */ ahci_atapi_load(ahci, port); - atapi_wait_tray(false); + atapi_wait_tray(ahci, false); ahci_atapi_eject(ahci, port); - atapi_wait_tray(true); + atapi_wait_tray(ahci, true); /* Re-insert media */ - qmp_discard_response("{'execute': 'blockdev-add', " - "'arguments': {'node-name': 'node0', " + qmp_discard_response(ahci->parent->qts, + "{'execute': 'blockdev-add', " + "'arguments': {'node-name': 'node0', " "'driver': 'raw', " "'file': { 'driver': 'file', " "'filename': %s }}}", iso); - qmp_discard_response("{'execute': 'blockdev-insert-medium'," - "'arguments': { 'id': 'cd0', " + qmp_discard_response(ahci->parent->qts, + "{'execute': 'blockdev-insert-medium'," + "'arguments': { 'id': 'cd0', " "'node-name': 'node0' }}"); /* Again, the event shows up first */ - qmp_send("{'execute': 'blockdev-close-tray'," - " 'arguments': {'id': 'cd0'}}"); - atapi_wait_tray(false); - rsp = qmp_receive(); + qtest_qmp_send(ahci->parent->qts, "{'execute': 'blockdev-close-tray', " + "'arguments': {'id': 'cd0'}}"); + atapi_wait_tray(ahci, false); + rsp = qtest_qmp_receive(ahci->parent->qts); qobject_unref(rsp); /* Now, to convince ATAPI we understand the media has changed... */ @@ -1643,10 +1640,10 @@ static void test_atapi_tray(void) /* Final tray test. */ ahci_atapi_eject(ahci, port); - atapi_wait_tray(true); + atapi_wait_tray(ahci, true); ahci_atapi_load(ahci, port); - atapi_wait_tray(false); + atapi_wait_tray(ahci, false); /* Cleanup */ g_free(tx); diff --git a/tests/boot-serial-test.c b/tests/boot-serial-test.c index c591748aaf..24852d4c7d 100644 --- a/tests/boot-serial-test.c +++ b/tests/boot-serial-test.c @@ -114,7 +114,7 @@ static testdef_t tests[] = { { "sparc", "SS-4", "", "MB86904" }, { "sparc", "SS-600MP", "", "TMS390Z55" }, { "sparc64", "sun4u", "", "UltraSPARC" }, - { "s390x", "s390-ccw-virtio", "", "virtio device" }, + { "s390x", "s390-ccw-virtio", "", "device" }, { "m68k", "mcf5208evb", "", "TT", sizeof(kernel_mcf5208), kernel_mcf5208 }, { "microblaze", "petalogix-s3adsp1800", "", "TT", sizeof(kernel_pls3adsp1800), kernel_pls3adsp1800 }, diff --git a/tests/decode/check.sh b/tests/decode/check.sh index 79a06c37cd..95445a0115 100755 --- a/tests/decode/check.sh +++ b/tests/decode/check.sh @@ -15,4 +15,10 @@ for i in err_*.decode; do fi done +for i in succ_*.decode; do + if ! $PYTHON $DECODETREE $i > /dev/null 2> /dev/null; then + echo FAIL:$i 1>&2 + fi +done + exit $E diff --git a/tests/decode/err_pattern_group_empty.decode b/tests/decode/err_pattern_group_empty.decode new file mode 100644 index 0000000000..abbff6b528 --- /dev/null +++ b/tests/decode/err_pattern_group_empty.decode @@ -0,0 +1,6 @@ +# This work is licensed under the terms of the GNU LGPL, version 2 or later. +# See the COPYING.LIB file in the top-level directory. + +# empty groups are not allowed +{ +} diff --git a/tests/decode/err_pattern_group_ident1.decode b/tests/decode/err_pattern_group_ident1.decode new file mode 100644 index 0000000000..3e65fab2f9 --- /dev/null +++ b/tests/decode/err_pattern_group_ident1.decode @@ -0,0 +1,10 @@ +# This work is licensed under the terms of the GNU LGPL, version 2 or later. +# See the COPYING.LIB file in the top-level directory. + +%sub1 0:8 + +# Make sure that indentation is enforced +{ + top 00000000 00000000 00000000 00000000 + sub1 00000000 00000000 00000000 ........ %sub1 +} diff --git a/tests/decode/err_pattern_group_ident2.decode b/tests/decode/err_pattern_group_ident2.decode new file mode 100644 index 0000000000..bc859233b1 --- /dev/null +++ b/tests/decode/err_pattern_group_ident2.decode @@ -0,0 +1,11 @@ +# This work is licensed under the terms of the GNU LGPL, version 2 or later. +# See the COPYING.LIB file in the top-level directory. + +%sub1 0:8 + +# Make sure that indentation is enforced +{ + top 00000000 00000000 00000000 00000000 + sub1 00000000 00000000 00000000 ........ %sub1 +# comments are suposed to be indented +} diff --git a/tests/decode/err_pattern_group_nest1.decode b/tests/decode/err_pattern_group_nest1.decode new file mode 100644 index 0000000000..92e971c3c5 --- /dev/null +++ b/tests/decode/err_pattern_group_nest1.decode @@ -0,0 +1,13 @@ +# This work is licensed under the terms of the GNU LGPL, version 2 or later. +# See the COPYING.LIB file in the top-level directory. + +%sub1 0:8 +%sub2 8:8 +%sub3 16:8 +%sub4 24:8 + +# Groups with no overlap are supposed to fail +{ + top 00000000 00000000 00000000 00000000 + sub4 ........ ........ ........ ........ %sub1 %sub2 %sub3 %sub4 +} diff --git a/tests/decode/err_pattern_group_overlap1.decode b/tests/decode/err_pattern_group_overlap1.decode new file mode 100644 index 0000000000..ebe3030d26 --- /dev/null +++ b/tests/decode/err_pattern_group_overlap1.decode @@ -0,0 +1,6 @@ +one 00000000000000000000000000000000 +{ + two 0000000000000000000000000000000 s:1 + three 000000000000000000000000000000 s:1 0 +} + diff --git a/tests/decode/err_width1.decode b/tests/decode/err_width1.decode new file mode 100644 index 0000000000..0c14f6d73b --- /dev/null +++ b/tests/decode/err_width1.decode @@ -0,0 +1,5 @@ +# This work is licensed under the terms of the GNU LGPL, version 2 or later. +# See the COPYING.LIB file in the top-level directory. + +# Diagnose too many bits (33 of 32) +one 000000000000000000000000000000000 diff --git a/tests/decode/err_width2.decode b/tests/decode/err_width2.decode new file mode 100644 index 0000000000..47f0acf322 --- /dev/null +++ b/tests/decode/err_width2.decode @@ -0,0 +1,5 @@ +# This work is licensed under the terms of the GNU LGPL, version 2 or later. +# See the COPYING.LIB file in the top-level directory. + +# Diagnose too few bits (31 of 32) +one 0000000000000000000000000000000 diff --git a/tests/decode/err_width3.decode b/tests/decode/err_width3.decode new file mode 100644 index 0000000000..c5fb6b3699 --- /dev/null +++ b/tests/decode/err_width3.decode @@ -0,0 +1,5 @@ +# This work is licensed under the terms of the GNU LGPL, version 2 or later. +# See the COPYING.LIB file in the top-level directory. + +# Diagnose too many bits (33 of 32) +one 0 s:32 diff --git a/tests/decode/err_width4.decode b/tests/decode/err_width4.decode new file mode 100644 index 0000000000..1588a63698 --- /dev/null +++ b/tests/decode/err_width4.decode @@ -0,0 +1,5 @@ +# This work is licensed under the terms of the GNU LGPL, version 2 or later. +# See the COPYING.LIB file in the top-level directory. + +# Diagnose too few bits (31 of 32) +one 0 s:30 diff --git a/tests/decode/succ_pattern_group_nest1.decode b/tests/decode/succ_pattern_group_nest1.decode new file mode 100644 index 0000000000..77b0f48b49 --- /dev/null +++ b/tests/decode/succ_pattern_group_nest1.decode @@ -0,0 +1,22 @@ +# This work is licensed under the terms of the GNU LGPL, version 2 or later. +# See the COPYING.LIB file in the top-level directory. + +%sub1 0:8 +%sub2 8:8 +%sub3 16:8 +%sub4 24:7 + +# Make sure deep netsting works, as few targets will actually exercise it +{ + top 00000000 00000000 00000000 00000000 + { + sub1 00000000 00000000 00000000 ........ %sub1 + { + sub2 00000000 00000000 ........ ........ %sub1 %sub2 + { + sub3 00000000 ........ ........ ........ %sub1 %sub2 %sub3 + sub4 0....... ........ ........ ........ %sub1 %sub2 %sub3 %sub4 + } + } + } +} diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include index 83d43c50e4..c0e1bf57a3 100644 --- a/tests/docker/Makefile.include +++ b/tests/docker/Makefile.include @@ -116,6 +116,7 @@ docker-image-tricore-cross: docker-image-debian9 DOCKER_PARTIAL_IMAGES += debian-alpha-cross debian-hppa-cross debian-m68k-cross debian-sh4-cross DOCKER_PARTIAL_IMAGES += debian-sparc64-cross debian-mips64-cross debian-riscv64-cross DOCKER_PARTIAL_IMAGES += debian-tricore-cross debian-powerpc-cross fedora-i386-cross +DOCKER_PARTIAL_IMAGES += fedora-cris-cross # Rules for building linux-user powered images # @@ -150,15 +151,15 @@ docker: @echo @echo ' docker: Print this help.' @echo ' docker-all-tests: Run all image/test combinations.' - @echo ' docker-TEST: Run TEST on all image combinations.' + @echo ' docker-TEST: Run "TEST" on all image combinations.' @echo ' docker-clean: Kill and remove residual docker testing containers.' @echo ' docker-TEST@IMAGE: Run "TEST" in container "IMAGE".' @echo ' Note: "TEST" is one of the listed test name,' @echo ' or a script name under $$QEMU_SRC/tests/docker/;' - @echo ' "IMAGE" is one of the listed container name."' + @echo ' "IMAGE" is one of the listed container name.' @echo ' docker-image: Build all images.' @echo ' docker-image-IMAGE: Build image "IMAGE".' - @echo ' docker-run: For manually running a "TEST" with "IMAGE"' + @echo ' docker-run: For manually running a "TEST" with "IMAGE".' @echo @echo 'Available container images:' @echo ' $(DOCKER_IMAGES)' diff --git a/tests/docker/dockerfiles/debian-xtensa-cross.docker b/tests/docker/dockerfiles/debian-xtensa-cross.docker new file mode 100644 index 0000000000..afd2ab9163 --- /dev/null +++ b/tests/docker/dockerfiles/debian-xtensa-cross.docker @@ -0,0 +1,31 @@ +# +# Docker cross-compiler target +# +# This docker target builds on the debian stretch base image, +# using a prebuilt toolchains for Xtensa cores from: +# https://github.com/foss-xtensa/toolchain/releases +# +FROM debian:stretch-slim + +RUN apt-get update && \ + DEBIAN_FRONTEND=noninteractive apt install -yy eatmydata +RUN DEBIAN_FRONTEND=noninteractive eatmydata \ + apt-get install -y --no-install-recommends \ + bison \ + build-essential \ + ca-certificates \ + curl \ + flex \ + gettext \ + git \ + python-minimal + +ENV CPU_LIST csp dc232b dc233c +ENV TOOLCHAIN_RELEASE 2018.02 + +RUN for cpu in $CPU_LIST; do \ + curl -#SL http://github.com/foss-xtensa/toolchain/releases/download/$TOOLCHAIN_RELEASE/x86_64-$TOOLCHAIN_RELEASE-xtensa-$cpu-elf.tar.gz \ + | tar -xzC /opt; \ + done + +ENV PATH $PATH:/opt/$TOOLCHAIN_RELEASE/xtensa-dc232b-elf/bin:/opt/$TOOLCHAIN_RELEASE/xtensa-dc233c-elf/bin:/opt/$TOOLCHAIN_RELEASE/xtensa-csp-elf/bin diff --git a/tests/docker/dockerfiles/fedora-cris-cross.docker b/tests/docker/dockerfiles/fedora-cris-cross.docker new file mode 100644 index 0000000000..b168ada615 --- /dev/null +++ b/tests/docker/dockerfiles/fedora-cris-cross.docker @@ -0,0 +1,8 @@ +# +# Cross compiler for cris system tests +# + +FROM fedora:latest +ENV PACKAGES gcc-cris-linux-gnu +RUN dnf install -y $PACKAGES +RUN rpm -q $PACKAGES | sort > /packages.txt diff --git a/tests/docker/travis b/tests/docker/travis index d345393ced..47c03677d6 100755 --- a/tests/docker/travis +++ b/tests/docker/travis @@ -18,4 +18,5 @@ cmdfile=/tmp/travis_cmd_list.sh $QEMU_SRC/tests/docker/travis.py $QEMU_SRC/.travis.yml > $cmdfile chmod +x $cmdfile cd "$QEMU_SRC" +unset BUILD_DIR SRC_DIR $cmdfile diff --git a/tests/docker/travis.py b/tests/docker/travis.py index ea1ef169e6..e1433012bd 100755 --- a/tests/docker/travis.py +++ b/tests/docker/travis.py @@ -17,18 +17,17 @@ import yaml import itertools def load_yaml(fname): - return yaml.load(open(fname, "r").read()) + return yaml.safe_load(open(fname, "r").read()) def conf_iter(conf): + # If "compiler" is omitted from the included env then Travis picks the + # first entry of the global compiler list. + default_compiler = conf["compiler"][0] def env_to_list(env): return env if isinstance(env, list) else [env] for entry in conf["matrix"]["include"]: yield {"env": env_to_list(entry["env"]), - "compiler": entry["compiler"]} - for entry in itertools.product(conf["compiler"], - conf["env"]["matrix"]): - yield {"env": env_to_list(entry[1]), - "compiler": entry[0]} + "compiler": entry.get("compiler", default_compiler)} def main(): if len(sys.argv) < 2: diff --git a/tests/libqos/libqos.c b/tests/libqos/libqos.c index 636a111a6f..d71557c5cb 100644 --- a/tests/libqos/libqos.c +++ b/tests/libqos/libqos.c @@ -73,11 +73,6 @@ void qtest_shutdown(QOSState *qs) } } -void set_context(QOSState *s) -{ - global_qtest = s->qts; -} - static QDict *qmp_execute(QTestState *qts, const char *command) { return qtest_qmp(qts, "{ 'execute': %s }", command); @@ -89,8 +84,6 @@ void migrate(QOSState *from, QOSState *to, const char *uri) QDict *rsp, *sub; bool running; - set_context(from); - /* Is the machine currently running? */ rsp = qmp_execute(from->qts, "query-status"); g_assert(qdict_haskey(rsp, "return")); @@ -114,7 +107,6 @@ void migrate(QOSState *from, QOSState *to, const char *uri) /* If we were running, we can wait for an event. */ if (running) { migrate_allocator(&from->alloc, &to->alloc); - set_context(to); qtest_qmp_eventwait(to->qts, "RESUME"); return; } @@ -144,7 +136,6 @@ void migrate(QOSState *from, QOSState *to, const char *uri) } migrate_allocator(&from->alloc, &to->alloc); - set_context(to); } bool have_qemu_img(void) diff --git a/tests/libqos/libqos.h b/tests/libqos/libqos.h index 149b0be8bc..8e971c25a3 100644 --- a/tests/libqos/libqos.h +++ b/tests/libqos/libqos.h @@ -28,7 +28,6 @@ void qtest_shutdown(QOSState *qs); bool have_qemu_img(void); void mkimg(const char *file, const char *fmt, unsigned size_mb); void mkqcow2(const char *file, unsigned size_mb); -void set_context(QOSState *s); void migrate(QOSState *from, QOSState *to, const char *uri); void prepare_blkdebug_script(const char *debug_fn, const char *event); void generate_pattern(void *buffer, size_t len, size_t cycle_len); diff --git a/tests/libqos/pci-pc.c b/tests/libqos/pci-pc.c index 4ab16facf2..407d8aff78 100644 --- a/tests/libqos/pci-pc.c +++ b/tests/libqos/pci-pc.c @@ -125,7 +125,7 @@ void qpci_init_pc(QPCIBusPC *qpci, QTestState *qts, QGuestAllocator *alloc) assert(qts); /* tests can use pci-bus */ - qpci->bus.has_buggy_msi = FALSE; + qpci->bus.has_buggy_msi = false; qpci->bus.pio_readb = qpci_pc_pio_readb; qpci->bus.pio_readw = qpci_pc_pio_readw; diff --git a/tests/libqos/pci-spapr.c b/tests/libqos/pci-spapr.c index 6925925997..58ba27ae6d 100644 --- a/tests/libqos/pci-spapr.c +++ b/tests/libqos/pci-spapr.c @@ -156,7 +156,7 @@ void qpci_init_spapr(QPCIBusSPAPR *qpci, QTestState *qts, assert(qts); /* tests cannot use spapr, needs to be fixed first */ - qpci->bus.has_buggy_msi = TRUE; + qpci->bus.has_buggy_msi = true; qpci->alloc = alloc; diff --git a/tests/libqos/qgraph.c b/tests/libqos/qgraph.c index 122efc1b7b..b149caaaa9 100644 --- a/tests/libqos/qgraph.c +++ b/tests/libqos/qgraph.c @@ -77,6 +77,7 @@ static void add_edge(const char *source, const char *dest, { char *key; QOSGraphEdgeList *list = g_hash_table_lookup(edge_table, source); + QOSGraphEdgeOptions def_opts = { }; if (!list) { list = g_new0(QOSGraphEdgeList, 1); @@ -85,7 +86,7 @@ static void add_edge(const char *source, const char *dest, } if (!opts) { - opts = &(QOSGraphEdgeOptions) { }; + opts = &def_opts; } QOSGraphEdge *edge = g_new0(QOSGraphEdge, 1); @@ -590,9 +591,10 @@ void qos_add_test(const char *name, const char *interface, { QOSGraphNode *node; char *test_name = g_strdup_printf("%s-tests/%s", interface, name);; + QOSGraphTestOptions def_opts = { }; if (!opts) { - opts = &(QOSGraphTestOptions) { }; + opts = &def_opts; } node = create_node(test_name, QNODE_TEST); node->u.test.function = test_func; diff --git a/tests/migration-test.c b/tests/migration-test.c index 48dc20a2ae..bd3f5c3125 100644 --- a/tests/migration-test.c +++ b/tests/migration-test.c @@ -382,9 +382,10 @@ static char *migrate_get_socket_address(QTestState *who, const char *parameter) iv = qobject_input_visitor_new(object); visit_type_SocketAddressList(iv, NULL, &addrs, &local_err); + visit_free(iv); /* we are only using a single address */ - result = g_strdup_printf("%s", SocketAddress_to_str(addrs->value)); + result = SocketAddress_to_str(addrs->value); qapi_free_SocketAddressList(addrs); qobject_unref(rsp); diff --git a/tests/qemu-iotests/026.out b/tests/qemu-iotests/026.out index dd10a82b51..fb89b8480c 100644 --- a/tests/qemu-iotests/026.out +++ b/tests/qemu-iotests/026.out @@ -14,8 +14,8 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l1_update; errno: 5; imm: off; once: off; write -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error 1 leaked clusters were found on the image. @@ -23,8 +23,8 @@ This means waste of disk space, but no harm to data. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l1_update; errno: 5; imm: off; once: off; write -b -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error 1 leaked clusters were found on the image. @@ -42,8 +42,8 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l1_update; errno: 28; imm: off; once: off; write -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device 1 leaked clusters were found on the image. @@ -51,8 +51,8 @@ This means waste of disk space, but no harm to data. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l1_update; errno: 28; imm: off; once: off; write -b -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device 1 leaked clusters were found on the image. @@ -134,8 +134,8 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l2_update; errno: 5; imm: off; once: off; write -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error 127 leaked clusters were found on the image. @@ -143,8 +143,8 @@ This means waste of disk space, but no harm to data. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l2_update; errno: 5; imm: off; once: off; write -b -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error 127 leaked clusters were found on the image. @@ -162,8 +162,8 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l2_update; errno: 28; imm: off; once: off; write -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device 127 leaked clusters were found on the image. @@ -171,8 +171,8 @@ This means waste of disk space, but no harm to data. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l2_update; errno: 28; imm: off; once: off; write -b -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device 127 leaked clusters were found on the image. @@ -190,15 +190,15 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l2_alloc_write; errno: 5; imm: off; once: off; write -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l2_alloc_write; errno: 5; imm: off; once: off; write -b -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error 1 leaked clusters were found on the image. @@ -216,15 +216,15 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l2_alloc_write; errno: 28; imm: off; once: off; write -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l2_alloc_write; errno: 28; imm: off; once: off; write -b -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device 1 leaked clusters were found on the image. @@ -242,15 +242,15 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: write_aio; errno: 5; imm: off; once: off; write -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: write_aio; errno: 5; imm: off; once: off; write -b -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 @@ -266,15 +266,15 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: write_aio; errno: 28; imm: off; once: off; write -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: write_aio; errno: 28; imm: off; once: off; write -b -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 @@ -290,15 +290,15 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_load; errno: 5; imm: off; once: off; write -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_load; errno: 5; imm: off; once: off; write -b -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 @@ -314,15 +314,15 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_load; errno: 28; imm: off; once: off; write -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_load; errno: 28; imm: off; once: off; write -b -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 @@ -338,15 +338,15 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_update_part; errno: 5; imm: off; once: off; write -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_update_part; errno: 5; imm: off; once: off; write -b -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 @@ -362,15 +362,15 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_update_part; errno: 28; imm: off; once: off; write -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_update_part; errno: 28; imm: off; once: off; write -b -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 @@ -386,15 +386,15 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_alloc; errno: 5; imm: off; once: off; write -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_alloc; errno: 5; imm: off; once: off; write -b -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 @@ -410,15 +410,15 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_alloc; errno: 28; imm: off; once: off; write -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_alloc; errno: 28; imm: off; once: off; write -b -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 @@ -477,8 +477,8 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_alloc_hookup; errno: 28; imm: off; once: off; write -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device 55 leaked clusters were found on the image. @@ -486,8 +486,8 @@ This means waste of disk space, but no harm to data. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_alloc_hookup; errno: 28; imm: off; once: off; write -b -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device 251 leaked clusters were found on the image. @@ -505,15 +505,15 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_alloc_write; errno: 28; imm: off; once: off; write -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_alloc_write; errno: 28; imm: off; once: off; write -b -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 @@ -529,8 +529,8 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_alloc_write_blocks; errno: 28; imm: off; once: off; write -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device 10 leaked clusters were found on the image. @@ -538,8 +538,8 @@ This means waste of disk space, but no harm to data. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_alloc_write_blocks; errno: 28; imm: off; once: off; write -b -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device 23 leaked clusters were found on the image. @@ -557,8 +557,8 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_alloc_write_table; errno: 28; imm: off; once: off; write -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device 10 leaked clusters were found on the image. @@ -566,8 +566,8 @@ This means waste of disk space, but no harm to data. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_alloc_write_table; errno: 28; imm: off; once: off; write -b -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device 23 leaked clusters were found on the image. @@ -585,8 +585,8 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_alloc_switch_table; errno: 28; imm: off; once: off; write -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device 10 leaked clusters were found on the image. @@ -594,8 +594,8 @@ This means waste of disk space, but no harm to data. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: refblock_alloc_switch_table; errno: 28; imm: off; once: off; write -b -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device 23 leaked clusters were found on the image. @@ -631,8 +631,8 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l1_grow_write_table; errno: 5; imm: off; once: off -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 @@ -643,8 +643,8 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l1_grow_write_table; errno: 28; imm: off; once: off -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 @@ -655,8 +655,8 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l1_grow_activate_table; errno: 5; imm: off; once: off -Failed to flush the L2 table cache: Input/output error -Failed to flush the refcount block cache: Input/output error +qemu-io: Failed to flush the L2 table cache: Input/output error +qemu-io: Failed to flush the refcount block cache: Input/output error write failed: Input/output error 96 leaked clusters were found on the image. @@ -669,8 +669,8 @@ No errors were found on the image. Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824 Event: l1_grow_activate_table; errno: 28; imm: off; once: off -Failed to flush the L2 table cache: No space left on device -Failed to flush the refcount block cache: No space left on device +qemu-io: Failed to flush the L2 table cache: No space left on device +qemu-io: Failed to flush the refcount block cache: No space left on device write failed: No space left on device 96 leaked clusters were found on the image. diff --git a/tests/qemu-iotests/030 b/tests/qemu-iotests/030 index 276e06b5ba..c6311d1825 100755 --- a/tests/qemu-iotests/030 +++ b/tests/qemu-iotests/030 @@ -314,6 +314,23 @@ class TestParallelOps(iotests.QMPTestCase): self.wait_until_completed(drive='commit-drive0') + # In this case the base node of the stream job is the same as the + # top node of commit job. Since block-commit removes the top node + # when it finishes, this is not allowed. + def test_overlapping_4(self): + self.assert_no_active_block_jobs() + + # Commit from node2 into node0 + result = self.vm.qmp('block-commit', device='drive0', top=self.imgs[2], base=self.imgs[0]) + self.assert_qmp(result, 'return', {}) + + # Stream from node2 into node4 + result = self.vm.qmp('block-stream', device='node4', base_node='node2', job_id='node4') + self.assert_qmp(result, 'error/class', 'GenericError') + + self.wait_until_completed() + self.assert_no_active_block_jobs() + # Test a block-stream and a block-commit job in parallel # Here the stream job is supposed to finish quickly in order to reproduce # the scenario that triggers the bug fixed in 3d5d319e1221 and 1a63a907507 diff --git a/tests/qemu-iotests/030.out b/tests/qemu-iotests/030.out index 42314e9c00..4fd1c2dcd2 100644 --- a/tests/qemu-iotests/030.out +++ b/tests/qemu-iotests/030.out @@ -1,5 +1,5 @@ -........................ +......................... ---------------------------------------------------------------------- -Ran 24 tests +Ran 25 tests OK diff --git a/tests/qemu-iotests/043.out b/tests/qemu-iotests/043.out index b37d2a3807..0280f999ce 100644 --- a/tests/qemu-iotests/043.out +++ b/tests/qemu-iotests/043.out @@ -22,19 +22,19 @@ Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=134217728 backing_file=TEST_DIR/ == finite chain of length 3 (human) == image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) cluster_size: 65536 backing file: TEST_DIR/t.IMGFMT.2.base image: TEST_DIR/t.IMGFMT.2.base file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) cluster_size: 65536 backing file: TEST_DIR/t.IMGFMT.1.base image: TEST_DIR/t.IMGFMT.1.base file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) cluster_size: 65536 == finite chain of length 3 (json) == diff --git a/tests/qemu-iotests/051 b/tests/qemu-iotests/051 index 3b50c7f188..02ac960da4 100755 --- a/tests/qemu-iotests/051 +++ b/tests/qemu-iotests/051 @@ -356,6 +356,13 @@ $QEMU_IO -c "read -P 0x33 0 4k" "$TEST_IMG" | _filter_qemu_io # Using snapshot=on with a non-existent TMPDIR TMPDIR=/nonexistent run_qemu -drive driver=null-co,snapshot=on +# Using snapshot=on together with read-only=on +echo "info block" | + run_qemu -drive file="$TEST_IMG",snapshot=on,read-only=on,if=none,id=$device_id | + _filter_qemu_io | + sed -e 's#"[^"]*/vl\.[A-Za-z0-9]\{6\}"#SNAPSHOT_PATH#g' + + # success, all done echo "*** done" rm -f $seq.full diff --git a/tests/qemu-iotests/051.out b/tests/qemu-iotests/051.out index b900935fbc..9f1cf22608 100644 --- a/tests/qemu-iotests/051.out +++ b/tests/qemu-iotests/051.out @@ -458,4 +458,13 @@ read 4096/4096 bytes at offset 0 Testing: -drive driver=null-co,snapshot=on QEMU_PROG: -drive driver=null-co,snapshot=on: Could not get temporary filename: No such file or directory +Testing: -drive file=TEST_DIR/t.qcow2,snapshot=on,read-only=on,if=none,id=drive0 +QEMU X.Y.Z monitor - type 'help' for more information +(qemu) info block +drive0 (NODE_NAME): json:{"backing": {"driver": "qcow2", "file": {"driver": "file", "filename": "TEST_DIR/t.qcow2"}}, "driver": "qcow2", "file": {"driver": "file", "filename": SNAPSHOT_PATH}} (qcow2, read-only) + Removable device: not locked, tray closed + Cache mode: writeback, ignore flushes + Backing file: TEST_DIR/t.qcow2 (chain depth: 1) +(qemu) quit + *** done diff --git a/tests/qemu-iotests/051.pc.out b/tests/qemu-iotests/051.pc.out index 8c5c735dfd..c4743cc31c 100644 --- a/tests/qemu-iotests/051.pc.out +++ b/tests/qemu-iotests/051.pc.out @@ -530,4 +530,13 @@ read 4096/4096 bytes at offset 0 Testing: -drive driver=null-co,snapshot=on QEMU_PROG: -drive driver=null-co,snapshot=on: Could not get temporary filename: No such file or directory +Testing: -drive file=TEST_DIR/t.qcow2,snapshot=on,read-only=on,if=none,id=drive0 +QEMU X.Y.Z monitor - type 'help' for more information +(qemu) info block +drive0 (NODE_NAME): json:{"backing": {"driver": "qcow2", "file": {"driver": "file", "filename": "TEST_DIR/t.qcow2"}}, "driver": "qcow2", "file": {"driver": "file", "filename": SNAPSHOT_PATH}} (qcow2, read-only) + Removable device: not locked, tray closed + Cache mode: writeback, ignore flushes + Backing file: TEST_DIR/t.qcow2 (chain depth: 1) +(qemu) quit + *** done diff --git a/tests/qemu-iotests/053.out b/tests/qemu-iotests/053.out index 8e793b6462..8a65881232 100644 --- a/tests/qemu-iotests/053.out +++ b/tests/qemu-iotests/053.out @@ -9,7 +9,7 @@ wrote 512/512 bytes at offset 0 No errors were found on the image. == Checking compressed image virtual disk size == -virtual size: 512 (512 bytes) +virtual size: 512 B (512 bytes) == Verifying the compressed image == read 512/512 bytes at offset 0 diff --git a/tests/qemu-iotests/059.out b/tests/qemu-iotests/059.out index f6dce7947c..700ad1f290 100644 --- a/tests/qemu-iotests/059.out +++ b/tests/qemu-iotests/059.out @@ -16,7 +16,7 @@ can't open device TEST_DIR/t.vmdk: L1 size too big Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=2147483648 subformat=monolithicFlat image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 2.0G (2147483648 bytes) +virtual size: 2 GiB (2147483648 bytes) === Testing monolithicFlat with zeroed_grain === qemu-img: TEST_DIR/t.IMGFMT: Flat image can't enable zeroed grain @@ -26,8 +26,8 @@ Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=2147483648 subformat=monolithicF Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1073741824000 subformat=twoGbMaxExtentFlat image: TEST_DIR/t.vmdk file format: vmdk -virtual size: 1.0T (1073741824000 bytes) -disk size: 16K +virtual size: 0.977 TiB (1073741824000 bytes) +disk size: 16 KiB Format specific information: cid: XXXXXXXX parent cid: XXXXXXXX @@ -2055,7 +2055,7 @@ can't open: Cannot use relative extent paths with VMDK descriptor file 'json:{"i === Testing version 3 === image: TEST_DIR/iotest-version3.IMGFMT file format: IMGFMT -virtual size: 16G (17179869184 bytes) +virtual size: 16 GiB (17179869184 bytes) cluster_size: 65536 read 512/512 bytes at offset 0 512 bytes, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) @@ -2262,7 +2262,7 @@ read 512/512 bytes at offset 64931328 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=4398046511104 subformat=monolithicFlat image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 4.0T (4398046511104 bytes) +virtual size: 4 TiB (4398046511104 bytes) wrote 512/512 bytes at offset 966367641600 512 bytes, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) e100000000: 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a 0a ................ diff --git a/tests/qemu-iotests/060.out b/tests/qemu-iotests/060.out index af623cfd86..e42bf8c5a9 100644 --- a/tests/qemu-iotests/060.out +++ b/tests/qemu-iotests/060.out @@ -13,14 +13,14 @@ write failed: Input/output error incompatible_features 0x2 image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 Format specific information: compat: 1.1 lazy refcounts: false refcount bits: 16 corrupt: true -can't open device TEST_DIR/t.IMGFMT: IMGFMT: Image is corrupt; cannot be opened read/write +qemu-io: can't open device TEST_DIR/t.IMGFMT: IMGFMT: Image is corrupt; cannot be opened read/write no file open, try 'help open' read 512/512 bytes at offset 0 512 bytes, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) @@ -267,7 +267,7 @@ No errors were found on the image. === Testing zero refcount table size === Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 -can't open device TEST_DIR/t.IMGFMT: Image does not contain a reference count table +qemu-io: can't open device TEST_DIR/t.IMGFMT: Image does not contain a reference count table ERROR cluster 0 refcount=0 reference=1 ERROR cluster 3 refcount=0 reference=1 Rebuilding refcount structure @@ -296,7 +296,7 @@ Can't get refcount for cluster 2: Input/output error Can't get refcount for cluster 3: Input/output error Rebuilding refcount structure Repairing cluster 1 refcount=1 reference=0 -can't open device TEST_DIR/t.IMGFMT: Could not repair dirty image: Input/output error +qemu-io: can't open device TEST_DIR/t.IMGFMT: Could not repair dirty image: Input/output error --- Repairing --- Leaked cluster 1 refcount=1 reference=0 Repairing cluster 1 refcount=1 reference=0 @@ -364,10 +364,10 @@ Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 qcow2: Marking image as corrupt: Refblock at 0xffffff00000000 is not covered by the refcount structures; further corruption events will be suppressed qemu-img: Failed to discard unused refblocks: Input/output error --- Checking and retrying --- -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) No errors were found on the image. Image resized. -virtual size: 32M (33554432 bytes) +virtual size: 32 MiB (33554432 bytes) === Discarding a non-covered in-bounds refblock === @@ -375,10 +375,10 @@ Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 qcow2: Marking image as corrupt: Refblock at 0x1000000000 is not covered by the refcount structures; further corruption events will be suppressed qemu-img: Failed to discard unused refblocks: Input/output error --- Checking and retrying --- -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) No errors were found on the image. Image resized. -virtual size: 32M (33554432 bytes) +virtual size: 32 MiB (33554432 bytes) === Discarding a refblock covered by an unaligned refblock === diff --git a/tests/qemu-iotests/061.out b/tests/qemu-iotests/061.out index 9fe1ec702f..1aa7d37ff9 100644 --- a/tests/qemu-iotests/061.out +++ b/tests/qemu-iotests/061.out @@ -495,7 +495,7 @@ Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 data_file=TEST_DIR/t.IM qemu-img: Cannot downgrade an image with a data file image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 Format specific information: compat: 1.1 @@ -515,7 +515,7 @@ Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 data_file=TEST_DIR/t.IM qemu-img: Could not open 'TEST_DIR/t.IMGFMT': Could not open 'foo': No such file or directory image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 Format specific information: compat: 1.1 @@ -528,7 +528,7 @@ Format specific information: qemu-img: Could not open 'TEST_DIR/t.IMGFMT': 'data-file' is required for this image image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 Format specific information: compat: 1.1 @@ -542,7 +542,7 @@ Format specific information: Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 data_file=TEST_DIR/t.IMGFMT.data data_file_raw=on image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 Format specific information: compat: 1.1 @@ -554,7 +554,7 @@ Format specific information: No errors were found on the image. image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 Format specific information: compat: 1.1 @@ -567,7 +567,7 @@ No errors were found on the image. qemu-img: data-file-raw cannot be set on existing images image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 Format specific information: compat: 1.1 diff --git a/tests/qemu-iotests/069.out b/tests/qemu-iotests/069.out index f97585677b..c78e8c2b72 100644 --- a/tests/qemu-iotests/069.out +++ b/tests/qemu-iotests/069.out @@ -4,5 +4,5 @@ QA output created by 069 Formatting 'TEST_DIR/t.IMGFMT.base', fmt=IMGFMT size=131072 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=131072 backing_file=TEST_DIR/t.IMGFMT.base -can't open device TEST_DIR/t.IMGFMT: Could not open backing file: Could not open 'TEST_DIR/t.IMGFMT.base': No such file or directory +qemu-io: can't open device TEST_DIR/t.IMGFMT: Could not open backing file: Could not open 'TEST_DIR/t.IMGFMT.base': No such file or directory *** done diff --git a/tests/qemu-iotests/070.out b/tests/qemu-iotests/070.out index c269d99483..2fbfd7eaf3 100644 --- a/tests/qemu-iotests/070.out +++ b/tests/qemu-iotests/070.out @@ -1,7 +1,7 @@ QA output created by 070 === Verify open image read-only fails, due to dirty log === -can't open device TEST_DIR/iotest-dirtylog-10G-4M.vhdx: VHDX image file 'TEST_DIR/iotest-dirtylog-10G-4M.vhdx' opened read-only, but contains a log that needs to be replayed +qemu-io: can't open device TEST_DIR/iotest-dirtylog-10G-4M.vhdx: VHDX image file 'TEST_DIR/iotest-dirtylog-10G-4M.vhdx' opened read-only, but contains a log that needs to be replayed To replay the log, run: qemu-img check -r all 'TEST_DIR/iotest-dirtylog-10G-4M.vhdx' === Verify open image replays log === @@ -22,6 +22,6 @@ read 18874368/18874368 bytes at offset 0 === Verify image created by Disk2VHD can be opened === image: TEST_DIR/test-disk2vhd.IMGFMT file format: IMGFMT -virtual size: 256M (268435456 bytes) +virtual size: 256 MiB (268435456 bytes) cluster_size: 2097152 *** done diff --git a/tests/qemu-iotests/075.out b/tests/qemu-iotests/075.out index b234b758e0..4f3871d337 100644 --- a/tests/qemu-iotests/075.out +++ b/tests/qemu-iotests/075.out @@ -9,23 +9,23 @@ read 512/512 bytes at offset 1048064 512 bytes, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) == block_size must be a multiple of 512 == -can't open device TEST_DIR/simple-pattern.cloop: block_size 513 must be a multiple of 512 +qemu-io: can't open device TEST_DIR/simple-pattern.cloop: block_size 513 must be a multiple of 512 == block_size cannot be zero == -can't open device TEST_DIR/simple-pattern.cloop: block_size cannot be zero +qemu-io: can't open device TEST_DIR/simple-pattern.cloop: block_size cannot be zero == huge block_size === -can't open device TEST_DIR/simple-pattern.cloop: block_size 4294966784 must be 64 MB or less +qemu-io: can't open device TEST_DIR/simple-pattern.cloop: block_size 4294966784 must be 64 MB or less == offsets_size overflow === -can't open device TEST_DIR/simple-pattern.cloop: n_blocks 4294967295 must be 536870911 or less +qemu-io: can't open device TEST_DIR/simple-pattern.cloop: n_blocks 4294967295 must be 536870911 or less == refuse images that require too many offsets === -can't open device TEST_DIR/simple-pattern.cloop: image requires too many offsets, try increasing block size +qemu-io: can't open device TEST_DIR/simple-pattern.cloop: image requires too many offsets, try increasing block size == refuse images with non-monotonically increasing offsets == -can't open device TEST_DIR/simple-pattern.cloop: offsets not monotonically increasing at index 1, image file is corrupt +qemu-io: can't open device TEST_DIR/simple-pattern.cloop: offsets not monotonically increasing at index 1, image file is corrupt == refuse images with invalid compressed block size == -can't open device TEST_DIR/simple-pattern.cloop: invalid compressed block size at index 1, image file is corrupt +qemu-io: can't open device TEST_DIR/simple-pattern.cloop: invalid compressed block size at index 1, image file is corrupt *** done diff --git a/tests/qemu-iotests/076.out b/tests/qemu-iotests/076.out index 9c66c5fb46..2de8a710a5 100644 --- a/tests/qemu-iotests/076.out +++ b/tests/qemu-iotests/076.out @@ -5,13 +5,13 @@ read 65536/65536 bytes at offset 0 64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) == Negative catalog size == -can't open device TEST_DIR/parallels-v1: Catalog too large +qemu-io: can't open device TEST_DIR/parallels-v1: Catalog too large == Overflow in catalog allocation == -can't open device TEST_DIR/parallels-v1: Catalog too large +qemu-io: can't open device TEST_DIR/parallels-v1: Catalog too large == Zero sectors per track == -can't open device TEST_DIR/parallels-v1: Invalid image: Zero sectors per track +qemu-io: can't open device TEST_DIR/parallels-v1: Invalid image: Zero sectors per track == Read from a valid v2 image == read 65536/65536 bytes at offset 0 diff --git a/tests/qemu-iotests/078.out b/tests/qemu-iotests/078.out index c3d6aa4fe4..4a82e1779f 100644 --- a/tests/qemu-iotests/078.out +++ b/tests/qemu-iotests/078.out @@ -5,18 +5,18 @@ read 512/512 bytes at offset 0 512 bytes, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) == Negative catalog size == -can't open device TEST_DIR/empty.bochs: Catalog size is too large +qemu-io: can't open device TEST_DIR/empty.bochs: Catalog size is too large == Overflow for catalog size * sizeof(uint32_t) == -can't open device TEST_DIR/empty.bochs: Catalog size is too large +qemu-io: can't open device TEST_DIR/empty.bochs: Catalog size is too large == Too small catalog bitmap for image size == -can't open device TEST_DIR/empty.bochs: Catalog size is too small for this disk size -can't open device TEST_DIR/empty.bochs: Catalog size is too small for this disk size +qemu-io: can't open device TEST_DIR/empty.bochs: Catalog size is too small for this disk size +qemu-io: can't open device TEST_DIR/empty.bochs: Catalog size is too small for this disk size == Negative extent size == -can't open device TEST_DIR/empty.bochs: Extent size 2147483648 is too large +qemu-io: can't open device TEST_DIR/empty.bochs: Extent size 2147483648 is too large == Zero extent size == -can't open device TEST_DIR/empty.bochs: Extent size must be at least 512 +qemu-io: can't open device TEST_DIR/empty.bochs: Extent size must be at least 512 *** done diff --git a/tests/qemu-iotests/080.out b/tests/qemu-iotests/080.out index 281c7e0d1d..45ab01db8e 100644 --- a/tests/qemu-iotests/080.out +++ b/tests/qemu-iotests/080.out @@ -2,34 +2,34 @@ QA output created by 080 == Huge header size == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 -can't open device TEST_DIR/t.qcow2: qcow2 header exceeds cluster size -can't open device TEST_DIR/t.qcow2: qcow2 header exceeds cluster size +qemu-io: can't open device TEST_DIR/t.qcow2: qcow2 header exceeds cluster size +qemu-io: can't open device TEST_DIR/t.qcow2: qcow2 header exceeds cluster size == Huge unknown header extension == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 -can't open device TEST_DIR/t.qcow2: Invalid backing file offset -can't open device TEST_DIR/t.qcow2: Header extension too large -can't open device TEST_DIR/t.qcow2: Header extension too large +qemu-io: can't open device TEST_DIR/t.qcow2: Invalid backing file offset +qemu-io: can't open device TEST_DIR/t.qcow2: Header extension too large +qemu-io: can't open device TEST_DIR/t.qcow2: Header extension too large == Huge refcount table size == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 -can't open device TEST_DIR/t.qcow2: Reference count table too large -can't open device TEST_DIR/t.qcow2: Reference count table too large +qemu-io: can't open device TEST_DIR/t.qcow2: Reference count table too large +qemu-io: can't open device TEST_DIR/t.qcow2: Reference count table too large == Misaligned refcount table == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 -can't open device TEST_DIR/t.qcow2: Reference count table offset invalid +qemu-io: can't open device TEST_DIR/t.qcow2: Reference count table offset invalid == Huge refcount offset == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 -can't open device TEST_DIR/t.qcow2: Reference count table offset invalid +qemu-io: can't open device TEST_DIR/t.qcow2: Reference count table offset invalid == Invalid snapshot table == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 -can't open device TEST_DIR/t.qcow2: Snapshot table too large -can't open device TEST_DIR/t.qcow2: Snapshot table too large -can't open device TEST_DIR/t.qcow2: Snapshot table offset invalid -can't open device TEST_DIR/t.qcow2: Snapshot table offset invalid +qemu-io: can't open device TEST_DIR/t.qcow2: Snapshot table too large +qemu-io: can't open device TEST_DIR/t.qcow2: Snapshot table too large +qemu-io: can't open device TEST_DIR/t.qcow2: Snapshot table offset invalid +qemu-io: can't open device TEST_DIR/t.qcow2: Snapshot table offset invalid == Hitting snapshot table size limit == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 @@ -39,10 +39,10 @@ read 512/512 bytes at offset 0 == Invalid L1 table == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 -can't open device TEST_DIR/t.qcow2: Active L1 table too large -can't open device TEST_DIR/t.qcow2: Active L1 table too large -can't open device TEST_DIR/t.qcow2: Active L1 table offset invalid -can't open device TEST_DIR/t.qcow2: Active L1 table offset invalid +qemu-io: can't open device TEST_DIR/t.qcow2: Active L1 table too large +qemu-io: can't open device TEST_DIR/t.qcow2: Active L1 table too large +qemu-io: can't open device TEST_DIR/t.qcow2: Active L1 table offset invalid +qemu-io: can't open device TEST_DIR/t.qcow2: Active L1 table offset invalid == Invalid L1 table (with internal snapshot in the image) == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 @@ -50,7 +50,7 @@ qemu-img: Could not open 'TEST_DIR/t.IMGFMT': L1 table is too small == Invalid backing file size == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 -can't open device TEST_DIR/t.qcow2: Backing file name too long +qemu-io: can't open device TEST_DIR/t.qcow2: Backing file name too long == Invalid L2 entry (huge physical offset) == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 @@ -66,7 +66,7 @@ wrote 512/512 bytes at offset 0 qemu-img: Failed to load snapshot: Snapshot L1 table offset invalid qemu-img: Snapshot L1 table offset invalid qemu-img: Failed to turn zero into data clusters: Invalid argument -Failed to flush the refcount block cache: Invalid argument +qemu-io: Failed to flush the refcount block cache: Invalid argument write failed: Invalid argument qemu-img: Snapshot L1 table offset invalid qemu-img: Could not apply snapshot 'test': Failed to load snapshot: Invalid argument @@ -89,7 +89,7 @@ wrote 512/512 bytes at offset 0 qemu-img: Failed to load snapshot: Snapshot L1 table too large qemu-img: Snapshot L1 table too large qemu-img: Failed to turn zero into data clusters: File too large -Failed to flush the refcount block cache: File too large +qemu-io: Failed to flush the refcount block cache: File too large write failed: File too large qemu-img: Snapshot L1 table too large qemu-img: Could not apply snapshot 'test': Failed to load snapshot: File too large diff --git a/tests/qemu-iotests/081.out b/tests/qemu-iotests/081.out index 8ec1783ffe..04091b64e5 100644 --- a/tests/qemu-iotests/081.out +++ b/tests/qemu-iotests/081.out @@ -70,7 +70,7 @@ read 10485760/10485760 bytes at offset 0 10 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) == checking the blkverify mode with invalid settings == -can't open: blkverify=on can only be set if there are exactly two files and vote-threshold is 2 +qemu-io: can't open: blkverify=on can only be set if there are exactly two files and vote-threshold is 2 == dynamically adding a child to a quorum == Testing: diff --git a/tests/qemu-iotests/082 b/tests/qemu-iotests/082 index d0afa46e9a..278511dba4 100755 --- a/tests/qemu-iotests/082 +++ b/tests/qemu-iotests/082 @@ -212,7 +212,10 @@ run_qemu_img amend -f $IMGFMT -o backing_file="$TEST_IMG" -o ,, -o help "$TEST_I # Leave out everything that isn't needed run_qemu_img amend -f $IMGFMT -o help -run_qemu_img convert -o help + +# amend requires specifying either a format explicitly, or a file +# which it can probe +run_qemu_img amend -o help # Try help option for a format that does not support amendment run_qemu_img amend -f bochs -o help diff --git a/tests/qemu-iotests/082.out b/tests/qemu-iotests/082.out index 915640613f..7e25706813 100644 --- a/tests/qemu-iotests/082.out +++ b/tests/qemu-iotests/082.out @@ -6,14 +6,14 @@ Testing: create -f foo -f qcow2 TEST_DIR/t.qcow2 128M Formatting 'TEST_DIR/t.qcow2', fmt=qcow2 size=134217728 cluster_size=65536 lazy_refcounts=off refcount_bits=16 image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) cluster_size: 65536 Testing: create -f qcow2 -o cluster_size=4k -o lazy_refcounts=on TEST_DIR/t.qcow2 128M Formatting 'TEST_DIR/t.qcow2', fmt=qcow2 size=134217728 cluster_size=4096 lazy_refcounts=on refcount_bits=16 image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) cluster_size: 4096 Format specific information: compat: 1.1 @@ -25,7 +25,7 @@ Testing: create -f qcow2 -o cluster_size=4k -o lazy_refcounts=on -o cluster_size Formatting 'TEST_DIR/t.qcow2', fmt=qcow2 size=134217728 cluster_size=8192 lazy_refcounts=on refcount_bits=16 image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) cluster_size: 8192 Format specific information: compat: 1.1 @@ -37,7 +37,7 @@ Testing: create -f qcow2 -o cluster_size=4k,cluster_size=8k TEST_DIR/t.qcow2 128 Formatting 'TEST_DIR/t.qcow2', fmt=qcow2 size=134217728 cluster_size=8192 lazy_refcounts=off refcount_bits=16 image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) cluster_size: 8192 === create: help for -o === @@ -242,7 +242,7 @@ Testing: create -f qcow2 -o backing_file=TEST_DIR/t.qcow2 -o ,, -o help TEST_DIR qemu-img: Invalid option list: ,, Testing: create -f qcow2 -o help -Supported options: +Supported qcow2 options: backing_file=<str> - File name of a base image backing_fmt=<str> - Image format of the base image cluster_size=<size> - qcow2 cluster size @@ -263,10 +263,16 @@ Supported options: refcount_bits=<num> - Width of a reference count entry in bits size=<size> - Virtual disk size +The protocol level may support further options. +Specify the target filename to include those options. + Testing: create -o help -Supported options: +Supported raw options: size=<size> - Virtual disk size +The protocol level may support further options. +Specify the target filename to include those options. + Testing: create -f bochs -o help qemu-img: Format driver 'bochs' does not support image creation @@ -278,18 +284,18 @@ Formatting 'TEST_DIR/t.qcow2', fmt=qcow2 size=134217728 cluster_size=65536 lazy_ Testing: convert -f foo -f qcow2 TEST_DIR/t.qcow2 TEST_DIR/t.qcow2.base image: TEST_DIR/t.IMGFMT.base file format: raw -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) Testing: convert -O foo -O qcow2 TEST_DIR/t.qcow2 TEST_DIR/t.qcow2.base image: TEST_DIR/t.IMGFMT.base file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) cluster_size: 65536 Testing: convert -O qcow2 -o cluster_size=4k -o lazy_refcounts=on TEST_DIR/t.qcow2 TEST_DIR/t.qcow2.base image: TEST_DIR/t.IMGFMT.base file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) cluster_size: 4096 Format specific information: compat: 1.1 @@ -300,7 +306,7 @@ Format specific information: Testing: convert -O qcow2 -o cluster_size=4k -o lazy_refcounts=on -o cluster_size=8k TEST_DIR/t.qcow2 TEST_DIR/t.qcow2.base image: TEST_DIR/t.IMGFMT.base file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) cluster_size: 8192 Format specific information: compat: 1.1 @@ -311,7 +317,7 @@ Format specific information: Testing: convert -O qcow2 -o cluster_size=4k,cluster_size=8k TEST_DIR/t.qcow2 TEST_DIR/t.qcow2.base image: TEST_DIR/t.IMGFMT.base file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) cluster_size: 8192 === convert: help for -o === @@ -516,7 +522,7 @@ Testing: convert -O qcow2 -o backing_file=TEST_DIR/t.qcow2 -o ,, -o help TEST_DI qemu-img: Invalid option list: ,, Testing: convert -O qcow2 -o help -Supported options: +Supported qcow2 options: backing_file=<str> - File name of a base image backing_fmt=<str> - Image format of the base image cluster_size=<size> - qcow2 cluster size @@ -537,10 +543,16 @@ Supported options: refcount_bits=<num> - Width of a reference count entry in bits size=<size> - Virtual disk size +The protocol level may support further options. +Specify the target filename to include those options. + Testing: convert -o help -Supported options: +Supported raw options: size=<size> - Virtual disk size +The protocol level may support further options. +Specify the target filename to include those options. + Testing: convert -O bochs -o help qemu-img: Format driver 'bochs' does not support image creation @@ -560,7 +572,7 @@ qemu-img: Cannot enable copy offloading when -c is used Testing: amend -f foo -f qcow2 -o lazy_refcounts=on TEST_DIR/t.qcow2 image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) cluster_size: 65536 Format specific information: compat: 1.1 @@ -571,7 +583,7 @@ Format specific information: Testing: amend -f qcow2 -o size=130M -o lazy_refcounts=off TEST_DIR/t.qcow2 image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 130M (136314880 bytes) +virtual size: 130 MiB (136314880 bytes) cluster_size: 65536 Format specific information: compat: 1.1 @@ -582,7 +594,7 @@ Format specific information: Testing: amend -f qcow2 -o size=8M -o lazy_refcounts=on -o size=132M TEST_DIR/t.qcow2 image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 132M (138412032 bytes) +virtual size: 132 MiB (138412032 bytes) cluster_size: 65536 Format specific information: compat: 1.1 @@ -593,7 +605,7 @@ Format specific information: Testing: amend -f qcow2 -o size=4M,size=148M TEST_DIR/t.qcow2 image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 148M (155189248 bytes) +virtual size: 148 MiB (155189248 bytes) cluster_size: 65536 === amend: help for -o === @@ -831,9 +843,8 @@ Creation options for 'qcow2': Note that not all of these options may be amendable. -Testing: convert -o help -Supported options: - size=<size> - Virtual disk size +Testing: amend -o help +qemu-img: Expecting one image file name Testing: amend -f bochs -o help qemu-img: Format driver 'bochs' does not support option amendment diff --git a/tests/qemu-iotests/084.out b/tests/qemu-iotests/084.out index 5c5ab928c9..c2648d963f 100644 --- a/tests/qemu-iotests/084.out +++ b/tests/qemu-iotests/084.out @@ -5,7 +5,7 @@ QA output created by 084 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 1048576 disk image file size in bytes: 67109888 @@ -14,13 +14,13 @@ disk image file size in bytes: 67109888 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 1048576 disk image file size in bytes: 1024 Test 1: Maximum size (512 TB - 128 MB): image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 512T (562949819203584 bytes) +virtual size: 512 TiB (562949819203584 bytes) cluster_size: 1048576 Test 2: Size too large (512 TB - 128 MB + 64 kB) @@ -35,7 +35,7 @@ qemu-img: Could not open 'TEST_DIR/t.IMGFMT': unsupported VDI image (too many bl Test 5: Valid Image: 64MB, Blocks In Image 64, Block Size 1MB image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 1048576 Test 6: Block Size != 1MB; too small test (1MB - 1) diff --git a/tests/qemu-iotests/088.out b/tests/qemu-iotests/088.out index 1f6bcf0abc..814be7181d 100644 --- a/tests/qemu-iotests/088.out +++ b/tests/qemu-iotests/088.out @@ -2,10 +2,10 @@ QA output created by 088 == Invalid block size == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 -can't open device TEST_DIR/t.vpc: Invalid block size 0 -can't open device TEST_DIR/t.vpc: Invalid block size 0 -can't open device TEST_DIR/t.vpc: Invalid block size 128 -can't open device TEST_DIR/t.vpc: Invalid block size 128 -can't open device TEST_DIR/t.vpc: Invalid block size 305419896 -can't open device TEST_DIR/t.vpc: Invalid block size 305419896 +qemu-io: can't open device TEST_DIR/t.vpc: Invalid block size 0 +qemu-io: can't open device TEST_DIR/t.vpc: Invalid block size 0 +qemu-io: can't open device TEST_DIR/t.vpc: Invalid block size 128 +qemu-io: can't open device TEST_DIR/t.vpc: Invalid block size 128 +qemu-io: can't open device TEST_DIR/t.vpc: Invalid block size 305419896 +qemu-io: can't open device TEST_DIR/t.vpc: Invalid block size 305419896 *** done diff --git a/tests/qemu-iotests/089.out b/tests/qemu-iotests/089.out index 89e3e4340a..20c8ce8f0e 100644 --- a/tests/qemu-iotests/089.out +++ b/tests/qemu-iotests/089.out @@ -38,7 +38,7 @@ read failed: Input/output error image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 === Testing option merging === diff --git a/tests/qemu-iotests/095.out b/tests/qemu-iotests/095.out index 8c093dfff3..d2e393fef8 100644 --- a/tests/qemu-iotests/095.out +++ b/tests/qemu-iotests/095.out @@ -6,7 +6,7 @@ Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=104857600 backing_file=TEST_DIR/ === Base image info before commit and resize === image: TEST_DIR/t.IMGFMT.base file format: IMGFMT -virtual size: 5.0M (5242880 bytes) +virtual size: 5 MiB (5242880 bytes) === Running QEMU Live Commit Test === @@ -23,5 +23,5 @@ virtual size: 5.0M (5242880 bytes) === Base image info after commit and resize === image: TEST_DIR/t.IMGFMT.base file format: IMGFMT -virtual size: 100M (104857600 bytes) +virtual size: 100 MiB (104857600 bytes) *** done diff --git a/tests/qemu-iotests/103.out b/tests/qemu-iotests/103.out index bd9eec3250..16704cf499 100644 --- a/tests/qemu-iotests/103.out +++ b/tests/qemu-iotests/103.out @@ -5,13 +5,13 @@ wrote 65536/65536 bytes at offset 0 === Testing invalid option combinations === -can't open device TEST_DIR/t.IMGFMT: cache-size, l2-cache-size and refcount-cache-size may not be set at the same time -can't open device TEST_DIR/t.IMGFMT: l2-cache-size may not exceed cache-size -can't open device TEST_DIR/t.IMGFMT: refcount-cache-size may not exceed cache-size -can't open device TEST_DIR/t.IMGFMT: cache-size, l2-cache-size and refcount-cache-size may not be set at the same time -can't open device TEST_DIR/t.IMGFMT: L2 cache entry size must be a power of two between 512 and the cluster size (65536) -can't open device TEST_DIR/t.IMGFMT: L2 cache entry size must be a power of two between 512 and the cluster size (65536) -can't open device TEST_DIR/t.IMGFMT: L2 cache entry size must be a power of two between 512 and the cluster size (65536) +qemu-io: can't open device TEST_DIR/t.IMGFMT: cache-size, l2-cache-size and refcount-cache-size may not be set at the same time +qemu-io: can't open device TEST_DIR/t.IMGFMT: l2-cache-size may not exceed cache-size +qemu-io: can't open device TEST_DIR/t.IMGFMT: refcount-cache-size may not exceed cache-size +qemu-io: can't open device TEST_DIR/t.IMGFMT: cache-size, l2-cache-size and refcount-cache-size may not be set at the same time +qemu-io: can't open device TEST_DIR/t.IMGFMT: L2 cache entry size must be a power of two between 512 and the cluster size (65536) +qemu-io: can't open device TEST_DIR/t.IMGFMT: L2 cache entry size must be a power of two between 512 and the cluster size (65536) +qemu-io: can't open device TEST_DIR/t.IMGFMT: L2 cache entry size must be a power of two between 512 and the cluster size (65536) === Testing valid option combinations === diff --git a/tests/qemu-iotests/104.out b/tests/qemu-iotests/104.out index ab8d892c2a..d854155f5b 100644 --- a/tests/qemu-iotests/104.out +++ b/tests/qemu-iotests/104.out @@ -4,9 +4,9 @@ QA output created by 104 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1024 image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 1.0K (1024 bytes) +virtual size: 1 KiB (1024 bytes) Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1234 image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 1.5K (1536 bytes) -***done +virtual size: 1.5 KiB (1536 bytes) +*** done diff --git a/tests/qemu-iotests/110.out b/tests/qemu-iotests/110.out index 46e6a60510..f60b26390e 100644 --- a/tests/qemu-iotests/110.out +++ b/tests/qemu-iotests/110.out @@ -6,14 +6,14 @@ Formatting 'TEST_DIR/t.IMGFMT.base', fmt=IMGFMT size=67108864 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 backing_file=t.IMGFMT.base image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) backing file: t.IMGFMT.base (actual path: TEST_DIR/t.IMGFMT.base) === Non-reconstructable filename === image: json:{"driver": "IMGFMT", "file": {"set-state.0.event": "read_aio", "image": {"driver": "file", "filename": "TEST_DIR/t.IMGFMT"}, "driver": "blkdebug", "set-state.0.new_state": 42}} file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) backing file: t.IMGFMT.base (actual path: TEST_DIR/t.IMGFMT.base) === Backing name is always relative to the backed image === @@ -24,6 +24,6 @@ Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 backing_file=t.IMGFMT.b image: json:{"driver": "IMGFMT", "file": {"children": [{"driver": "file", "filename": "TEST_DIR/t.IMGFMT"}, {"driver": "file", "filename": "TEST_DIR/t.IMGFMT.copy"}], "driver": "quorum", "vote-threshold": 1}} file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) backing file: t.IMGFMT.base (cannot determine actual path) *** done diff --git a/tests/qemu-iotests/114.out b/tests/qemu-iotests/114.out index 1a47a526b9..67adef37a4 100644 --- a/tests/qemu-iotests/114.out +++ b/tests/qemu-iotests/114.out @@ -3,11 +3,11 @@ Formatting 'TEST_DIR/t.IMGFMT.base', fmt=IMGFMT size=67108864 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 backing_file=TEST_DIR/t.IMGFMT.base image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 backing file: TEST_DIR/t.IMGFMT.base backing file format: foo -can't open device TEST_DIR/t.qcow2: Could not open backing file: Unknown driver 'foo' +qemu-io: can't open device TEST_DIR/t.qcow2: Could not open backing file: Unknown driver 'foo' no file open, try 'help open' read 4096/4096 bytes at offset 0 4 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) diff --git a/tests/qemu-iotests/116.out b/tests/qemu-iotests/116.out index 24bee57783..49f9a261a0 100644 --- a/tests/qemu-iotests/116.out +++ b/tests/qemu-iotests/116.out @@ -2,29 +2,29 @@ QA output created by 116 == truncated header cluster == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=134217728 -can't open device TEST_DIR/t.qed: Could not open 'TEST_DIR/t.qed': Invalid argument +qemu-io: can't open device TEST_DIR/t.qed: Could not open 'TEST_DIR/t.qed': Invalid argument == invalid header magic == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=134217728 -can't open device TEST_DIR/t.qed: Image not in QED format +qemu-io: can't open device TEST_DIR/t.qed: Image not in QED format == invalid cluster size == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=134217728 -can't open device TEST_DIR/t.qed: Could not open 'TEST_DIR/t.qed': Invalid argument +qemu-io: can't open device TEST_DIR/t.qed: Could not open 'TEST_DIR/t.qed': Invalid argument == invalid table size == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=134217728 -can't open device TEST_DIR/t.qed: Could not open 'TEST_DIR/t.qed': Invalid argument +qemu-io: can't open device TEST_DIR/t.qed: Could not open 'TEST_DIR/t.qed': Invalid argument == invalid header size == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=134217728 -can't open device TEST_DIR/t.qed: Could not open 'TEST_DIR/t.qed': Invalid argument +qemu-io: can't open device TEST_DIR/t.qed: Could not open 'TEST_DIR/t.qed': Invalid argument == invalid L1 table offset == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=134217728 -can't open device TEST_DIR/t.qed: Could not open 'TEST_DIR/t.qed': Invalid argument +qemu-io: can't open device TEST_DIR/t.qed: Could not open 'TEST_DIR/t.qed': Invalid argument == invalid image size == Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=134217728 -can't open device TEST_DIR/t.qed: Could not open 'TEST_DIR/t.qed': Invalid argument +qemu-io: can't open device TEST_DIR/t.qed: Could not open 'TEST_DIR/t.qed': Invalid argument *** done diff --git a/tests/qemu-iotests/124 b/tests/qemu-iotests/124 index 5aa1bf1bd6..80b356f7bb 100755 --- a/tests/qemu-iotests/124 +++ b/tests/qemu-iotests/124 @@ -634,6 +634,119 @@ class TestIncrementalBackupBlkdebug(TestIncrementalBackupBase): self.vm.shutdown() self.check_backups() + def test_incremental_pause(self): + """ + Test an incremental backup that errors into a pause and is resumed. + """ + + drive0 = self.drives[0] + # NB: The blkdebug script here looks for a "flush, read, read" pattern. + # The flush occurs in hmp_io_writes, the first read in device_add, and + # the last read during the block job. + result = self.vm.qmp('blockdev-add', + node_name=drive0['id'], + driver=drive0['fmt'], + file={ + 'driver': 'blkdebug', + 'image': { + 'driver': 'file', + 'filename': drive0['file'] + }, + 'set-state': [{ + 'event': 'flush_to_disk', + 'state': 1, + 'new_state': 2 + },{ + 'event': 'read_aio', + 'state': 2, + 'new_state': 3 + }], + 'inject-error': [{ + 'event': 'read_aio', + 'errno': 5, + 'state': 3, + 'immediately': False, + 'once': True + }], + }) + self.assert_qmp(result, 'return', {}) + self.create_anchor_backup(drive0) + bitmap = self.add_bitmap('bitmap0', drive0) + + # Emulate guest activity + self.hmp_io_writes(drive0['id'], (('0xab', 0, 512), + ('0xfe', '16M', '256k'), + ('0x64', '32736k', '64k'))) + + # For the purposes of query-block visibility of bitmaps, add a drive + # frontend after we've written data; otherwise we can't use hmp-io + result = self.vm.qmp("device_add", + id="device0", + drive=drive0['id'], + driver="virtio-blk") + self.assert_qmp(result, 'return', {}) + + # Bitmap Status Check + query = self.vm.qmp('query-block') + ret = [bmap for bmap in query['return'][0]['dirty-bitmaps'] + if bmap.get('name') == bitmap.name][0] + self.assert_qmp(ret, 'count', 458752) + self.assert_qmp(ret, 'granularity', 65536) + self.assert_qmp(ret, 'status', 'active') + self.assert_qmp(ret, 'busy', False) + self.assert_qmp(ret, 'recording', True) + + # Start backup + parent, _ = bitmap.last_target() + target = self.prepare_backup(bitmap, parent) + res = self.vm.qmp('drive-backup', + job_id=bitmap.drive['id'], + device=bitmap.drive['id'], + sync='incremental', + bitmap=bitmap.name, + format=bitmap.drive['fmt'], + target=target, + mode='existing', + on_source_error='stop') + self.assert_qmp(res, 'return', {}) + + # Wait for the error + event = self.vm.event_wait(name="BLOCK_JOB_ERROR", + match={"data":{"device":bitmap.drive['id']}}) + self.assert_qmp(event, 'data', {'device': bitmap.drive['id'], + 'action': 'stop', + 'operation': 'read'}) + + # Bitmap Status Check + query = self.vm.qmp('query-block') + ret = [bmap for bmap in query['return'][0]['dirty-bitmaps'] + if bmap.get('name') == bitmap.name][0] + self.assert_qmp(ret, 'count', 458752) + self.assert_qmp(ret, 'granularity', 65536) + self.assert_qmp(ret, 'status', 'frozen') + self.assert_qmp(ret, 'busy', True) + self.assert_qmp(ret, 'recording', True) + + # Resume and check incremental backup for consistency + res = self.vm.qmp('block-job-resume', device=bitmap.drive['id']) + self.assert_qmp(res, 'return', {}) + self.wait_qmp_backup(bitmap.drive['id']) + + # Bitmap Status Check + query = self.vm.qmp('query-block') + ret = [bmap for bmap in query['return'][0]['dirty-bitmaps'] + if bmap.get('name') == bitmap.name][0] + self.assert_qmp(ret, 'count', 0) + self.assert_qmp(ret, 'granularity', 65536) + self.assert_qmp(ret, 'status', 'active') + self.assert_qmp(ret, 'busy', False) + self.assert_qmp(ret, 'recording', True) + + # Finalize / Cleanup + self.make_reference_backup(bitmap) + self.vm.shutdown() + self.check_backups() + if __name__ == '__main__': iotests.main(supported_fmts=['qcow2']) diff --git a/tests/qemu-iotests/124.out b/tests/qemu-iotests/124.out index e56cae021b..281b69efea 100644 --- a/tests/qemu-iotests/124.out +++ b/tests/qemu-iotests/124.out @@ -1,5 +1,5 @@ -........... +............ ---------------------------------------------------------------------- -Ran 11 tests +Ran 12 tests OK diff --git a/tests/qemu-iotests/126.out b/tests/qemu-iotests/126.out index 17d03d5248..e3c4d61916 100644 --- a/tests/qemu-iotests/126.out +++ b/tests/qemu-iotests/126.out @@ -11,13 +11,13 @@ Formatting 'TEST_DIR/image:base.IMGFMT', fmt=IMGFMT size=67108864 Formatting 'TEST_DIR/image:top.IMGFMT', fmt=IMGFMT size=67108864 backing_file=./image:base.IMGFMT image: TEST_DIR/image:top.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) backing file: ./image:base.IMGFMT (actual path: TEST_DIR/./image:base.IMGFMT) Formatting 'base.IMGFMT', fmt=IMGFMT size=67108864 Formatting 'file:image:top.IMGFMT', fmt=IMGFMT size=67108864 backing_file=base.IMGFMT image: ./image:top.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) backing file: base.IMGFMT (actual path: ./base.IMGFMT) *** done diff --git a/tests/qemu-iotests/130.out b/tests/qemu-iotests/130.out index 93020c328e..e45285ccc3 100644 --- a/tests/qemu-iotests/130.out +++ b/tests/qemu-iotests/130.out @@ -4,7 +4,7 @@ Formatting 'TEST_DIR/t.IMGFMT.base', fmt=IMGFMT size=67108864 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) === HMP commit === @@ -13,14 +13,14 @@ QEMU X.Y.Z monitor - type 'help' for more information (qemu) image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 backing_file=TEST_DIR/t.IMGFMT.orig backing_fmt=raw QEMU X.Y.Z monitor - type 'help' for more information (qemu) commit testdisk (qemu) image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) backing file: TEST_DIR/t.IMGFMT.orig backing file format: raw @@ -31,13 +31,13 @@ wrote 4096/4096 bytes at offset 0 4 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 backing_file=TEST_DIR/t.IMGFMT.orig backing_fmt=raw wrote 4096/4096 bytes at offset 0 4 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) backing file: TEST_DIR/t.IMGFMT.orig backing file format: raw *** done diff --git a/tests/qemu-iotests/131.out b/tests/qemu-iotests/131.out index 27c2c5389b..70da03dee5 100644 --- a/tests/qemu-iotests/131.out +++ b/tests/qemu-iotests/131.out @@ -22,7 +22,7 @@ read 32768/32768 bytes at offset 163840 read 32768/32768 bytes at offset 0 32 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) == Corrupt image == -can't open device TEST_DIR/t.parallels: parallels: Image was not closed correctly; cannot be opened read/write +qemu-io: can't open device TEST_DIR/t.parallels: parallels: Image was not closed correctly; cannot be opened read/write ERROR image was not closed correctly 1 errors were found on the image. diff --git a/tests/qemu-iotests/133.out b/tests/qemu-iotests/133.out index 414c7fa27f..1491ef45a9 100644 --- a/tests/qemu-iotests/133.out +++ b/tests/qemu-iotests/133.out @@ -4,18 +4,18 @@ Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 backing_file=TEST_DIR/t === Check that node-name can't be changed === -Cannot change the option 'node-name' -Cannot change the option 'node-name' -Cannot change the option 'node-name' +qemu-io: Cannot change the option 'node-name' +qemu-io: Cannot change the option 'node-name' +qemu-io: Cannot change the option 'node-name' === Check that unchanged node-name is okay === === Check that driver can't be changed === -Cannot change the option 'driver' -Cannot change the option 'driver' -Cannot change the option 'driver' +qemu-io: Cannot change the option 'driver' +qemu-io: Cannot change the option 'driver' +qemu-io: Cannot change the option 'driver' === Check that unchanged driver is okay === @@ -27,16 +27,16 @@ format name: null-co === Check that mixing -c/-r/-w and their corresponding options is forbidden === -Cannot set both -r/-w and 'read-only' -Cannot set both -r/-w and 'read-only' -Cannot set both -c and the cache options -Cannot set both -c and the cache options -Cannot set both -c and the cache options +qemu-io: Cannot set both -r/-w and 'read-only' +qemu-io: Cannot set both -r/-w and 'read-only' +qemu-io: Cannot set both -c and the cache options +qemu-io: Cannot set both -c and the cache options +qemu-io: Cannot set both -c and the cache options === Check that invalid options are handled correctly === -Parameter 'read-only' expects 'on' or 'off' -Parameter 'cache.no-flush' expects 'on' or 'off' -Parameter 'cache.direct' expects 'on' or 'off' -Parameter 'auto-read-only' expects 'on' or 'off' +qemu-io: Parameter 'read-only' expects 'on' or 'off' +qemu-io: Parameter 'cache.no-flush' expects 'on' or 'off' +qemu-io: Parameter 'cache.direct' expects 'on' or 'off' +qemu-io: Parameter 'auto-read-only' expects 'on' or 'off' *** done diff --git a/tests/qemu-iotests/137.out b/tests/qemu-iotests/137.out index 2c080b72f3..22d59df40c 100644 --- a/tests/qemu-iotests/137.out +++ b/tests/qemu-iotests/137.out @@ -15,24 +15,24 @@ read 33554432/33554432 bytes at offset 0 === Try setting some invalid values === -Parameter 'lazy-refcounts' expects 'on' or 'off' -cache-size, l2-cache-size and refcount-cache-size may not be set at the same time -l2-cache-size may not exceed cache-size -refcount-cache-size may not exceed cache-size -L2 cache entry size must be a power of two between 512 and the cluster size (65536) -L2 cache entry size must be a power of two between 512 and the cluster size (65536) -Refcount cache size too big -Conflicting values for qcow2 options 'overlap-check' ('constant') and 'overlap-check.template' ('all') -Unsupported value 'blubb' for qcow2 option 'overlap-check'. Allowed are any of the following: none, constant, cached, all -Unsupported value 'blubb' for qcow2 option 'overlap-check'. Allowed are any of the following: none, constant, cached, all -Cache clean interval too big +qemu-io: Parameter 'lazy-refcounts' expects 'on' or 'off' +qemu-io: cache-size, l2-cache-size and refcount-cache-size may not be set at the same time +qemu-io: l2-cache-size may not exceed cache-size +qemu-io: refcount-cache-size may not exceed cache-size +qemu-io: L2 cache entry size must be a power of two between 512 and the cluster size (65536) +qemu-io: L2 cache entry size must be a power of two between 512 and the cluster size (65536) +qemu-io: Refcount cache size too big +qemu-io: Conflicting values for qcow2 options 'overlap-check' ('constant') and 'overlap-check.template' ('all') +qemu-io: Unsupported value 'blubb' for qcow2 option 'overlap-check'. Allowed are any of the following: none, constant, cached, all +qemu-io: Unsupported value 'blubb' for qcow2 option 'overlap-check'. Allowed are any of the following: none, constant, cached, all +qemu-io: Cache clean interval too big Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=36028797018963968 -L2 cache size too big +qemu-io: L2 cache size too big Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 === Test transaction semantics === -Unsupported value 'blubb' for qcow2 option 'overlap-check'. Allowed are any of the following: none, constant, cached, all +qemu-io: Unsupported value 'blubb' for qcow2 option 'overlap-check'. Allowed are any of the following: none, constant, cached, all wrote 512/512 bytes at offset 0 512 bytes, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) ./common.rc: Killed ( if [ "${VALGRIND_QEMU}" == "y" ]; then @@ -44,7 +44,7 @@ incompatible_features 0x0 Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 wrote 65536/65536 bytes at offset 0 64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) -Parameter 'lazy-refcounts' expects 'on' or 'off' +qemu-io: Parameter 'lazy-refcounts' expects 'on' or 'off' qcow2: Marking image as corrupt: Preventing invalid write on metadata (overlaps with qcow2_header); further corruption events will be suppressed write failed: Input/output error *** done diff --git a/tests/qemu-iotests/140.out b/tests/qemu-iotests/140.out index 704adcef40..67fe44a3e3 100644 --- a/tests/qemu-iotests/140.out +++ b/tests/qemu-iotests/140.out @@ -8,7 +8,7 @@ wrote 65536/65536 bytes at offset 0 read 65536/65536 bytes at offset 0 64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) {"return": {}} -can't open device nbd+unix:///drv?socket=TEST_DIR/nbd: Requested export not available +qemu-io: can't open device nbd+unix:///drv?socket=TEST_DIR/nbd: Requested export not available server reported: export 'drv' not present {"return": {}} {"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "SHUTDOWN", "data": {"guest": false, "reason": "host-qmp-quit"}} diff --git a/tests/qemu-iotests/143.out b/tests/qemu-iotests/143.out index 3e55fcd0ac..ee71b5aa42 100644 --- a/tests/qemu-iotests/143.out +++ b/tests/qemu-iotests/143.out @@ -1,7 +1,7 @@ QA output created by 143 {"return": {}} {"return": {}} -can't open device nbd+unix:///no_such_export?socket=TEST_DIR/nbd: Requested export not available +qemu-io: can't open device nbd+unix:///no_such_export?socket=TEST_DIR/nbd: Requested export not available server reported: export 'no_such_export' not present {"return": {}} {"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "SHUTDOWN", "data": {"guest": false, "reason": "host-qmp-quit"}} diff --git a/tests/qemu-iotests/153 b/tests/qemu-iotests/153 index c989c2495f..08ad8a6730 100755 --- a/tests/qemu-iotests/153 +++ b/tests/qemu-iotests/153 @@ -155,7 +155,7 @@ for opts1 in "" "read-only=on" "read-only=on,force-share=on"; do _img_info -U | grep 'file format' fi done - _send_qemu_cmd $h "{ 'execute': 'quit', }" "" + _send_qemu_cmd $h "{ 'execute': 'quit' }" '' echo echo "Round done" _cleanup_qemu @@ -219,7 +219,7 @@ echo "Adding drive" _send_qemu_cmd $QEMU_HANDLE \ "{ 'execute': 'human-monitor-command', 'arguments': { 'command-line': 'drive_add 0 if=none,id=d0,file=${TEST_IMG}' } }" \ - "" + 'return' _run_cmd $QEMU_IO "${TEST_IMG}" -c 'write 0 512' @@ -230,7 +230,7 @@ echo "== Closing an image should unlock it ==" _send_qemu_cmd $QEMU_HANDLE \ "{ 'execute': 'human-monitor-command', 'arguments': { 'command-line': 'drive_del d0' } }" \ - "" + 'return' _run_cmd $QEMU_IO "${TEST_IMG}" -c 'write 0 512' @@ -239,7 +239,7 @@ for d in d0 d1; do _send_qemu_cmd $QEMU_HANDLE \ "{ 'execute': 'human-monitor-command', 'arguments': { 'command-line': 'drive_add 0 if=none,id=$d,file=${TEST_IMG},readonly=on' } }" \ - "" + 'return' done _run_cmd $QEMU_IMG info "${TEST_IMG}" @@ -247,7 +247,7 @@ _run_cmd $QEMU_IMG info "${TEST_IMG}" _send_qemu_cmd $QEMU_HANDLE \ "{ 'execute': 'human-monitor-command', 'arguments': { 'command-line': 'drive_del d0' } }" \ - "" + 'return' _run_cmd $QEMU_IO "${TEST_IMG}" -c 'write 0 512' @@ -255,7 +255,7 @@ echo "Closing the other" _send_qemu_cmd $QEMU_HANDLE \ "{ 'execute': 'human-monitor-command', 'arguments': { 'command-line': 'drive_del d1' } }" \ - "" + 'return' _run_cmd $QEMU_IO "${TEST_IMG}" -c 'write 0 512' diff --git a/tests/qemu-iotests/153.out b/tests/qemu-iotests/153.out index 884254868c..e969420006 100644 --- a/tests/qemu-iotests/153.out +++ b/tests/qemu-iotests/153.out @@ -23,20 +23,20 @@ Is another process using the image [TEST_DIR/t.qcow2]? == Running utility commands == _qemu_io_wrapper -c read 0 512 TEST_DIR/t.qcow2 -can't open device TEST_DIR/t.qcow2: Failed to get "write" lock +qemu-io: can't open device TEST_DIR/t.qcow2: Failed to get "write" lock Is another process using the image [TEST_DIR/t.qcow2]? _qemu_io_wrapper -r -c read 0 512 TEST_DIR/t.qcow2 -can't open device TEST_DIR/t.qcow2: Failed to get shared "write" lock +qemu-io: can't open device TEST_DIR/t.qcow2: Failed to get shared "write" lock Is another process using the image [TEST_DIR/t.qcow2]? _qemu_io_wrapper -c open TEST_DIR/t.qcow2 -c read 0 512 -can't open device TEST_DIR/t.qcow2: Failed to get "write" lock +qemu-io: can't open device TEST_DIR/t.qcow2: Failed to get "write" lock Is another process using the image [TEST_DIR/t.qcow2]? no file open, try 'help open' _qemu_io_wrapper -c open -r TEST_DIR/t.qcow2 -c read 0 512 -can't open device TEST_DIR/t.qcow2: Failed to get shared "write" lock +qemu-io: can't open device TEST_DIR/t.qcow2: Failed to get shared "write" lock Is another process using the image [TEST_DIR/t.qcow2]? no file open, try 'help open' @@ -100,12 +100,12 @@ file format: IMGFMT == Running utility commands -U == _qemu_io_wrapper -U -c read 0 512 TEST_DIR/t.qcow2 -can't open device TEST_DIR/t.qcow2: force-share=on can only be used with read-only images +qemu-io: can't open device TEST_DIR/t.qcow2: force-share=on can only be used with read-only images _qemu_io_wrapper -U -r -c read 0 512 TEST_DIR/t.qcow2 _qemu_io_wrapper -c open -U TEST_DIR/t.qcow2 -c read 0 512 -can't open device TEST_DIR/t.qcow2: force-share=on can only be used with read-only images +qemu-io: can't open device TEST_DIR/t.qcow2: force-share=on can only be used with read-only images no file open, try 'help open' _qemu_io_wrapper -c open -r -U TEST_DIR/t.qcow2 -c read 0 512 @@ -166,13 +166,13 @@ Is another process using the image [TEST_DIR/t.qcow2]? == Running utility commands == _qemu_io_wrapper -c read 0 512 TEST_DIR/t.qcow2 -can't open device TEST_DIR/t.qcow2: Failed to get "write" lock +qemu-io: can't open device TEST_DIR/t.qcow2: Failed to get "write" lock Is another process using the image [TEST_DIR/t.qcow2]? _qemu_io_wrapper -r -c read 0 512 TEST_DIR/t.qcow2 _qemu_io_wrapper -c open TEST_DIR/t.qcow2 -c read 0 512 -can't open device TEST_DIR/t.qcow2: Failed to get "write" lock +qemu-io: can't open device TEST_DIR/t.qcow2: Failed to get "write" lock Is another process using the image [TEST_DIR/t.qcow2]? no file open, try 'help open' @@ -222,12 +222,12 @@ file format: IMGFMT == Running utility commands -U == _qemu_io_wrapper -U -c read 0 512 TEST_DIR/t.qcow2 -can't open device TEST_DIR/t.qcow2: force-share=on can only be used with read-only images +qemu-io: can't open device TEST_DIR/t.qcow2: force-share=on can only be used with read-only images _qemu_io_wrapper -U -r -c read 0 512 TEST_DIR/t.qcow2 _qemu_io_wrapper -c open -U TEST_DIR/t.qcow2 -c read 0 512 -can't open device TEST_DIR/t.qcow2: force-share=on can only be used with read-only images +qemu-io: can't open device TEST_DIR/t.qcow2: force-share=on can only be used with read-only images no file open, try 'help open' _qemu_io_wrapper -c open -r -U TEST_DIR/t.qcow2 -c read 0 512 @@ -325,12 +325,12 @@ file format: IMGFMT == Running utility commands -U == _qemu_io_wrapper -U -c read 0 512 TEST_DIR/t.qcow2 -can't open device TEST_DIR/t.qcow2: force-share=on can only be used with read-only images +qemu-io: can't open device TEST_DIR/t.qcow2: force-share=on can only be used with read-only images _qemu_io_wrapper -U -r -c read 0 512 TEST_DIR/t.qcow2 _qemu_io_wrapper -c open -U TEST_DIR/t.qcow2 -c read 0 512 -can't open device TEST_DIR/t.qcow2: force-share=on can only be used with read-only images +qemu-io: can't open device TEST_DIR/t.qcow2: force-share=on can only be used with read-only images no file open, try 'help open' _qemu_io_wrapper -c open -r -U TEST_DIR/t.qcow2 -c read 0 512 @@ -417,24 +417,30 @@ Is another process using the image [TEST_DIR/t.qcow2]? _qemu_img_wrapper commit -b TEST_DIR/t.qcow2.b TEST_DIR/t.qcow2.c {"return": {}} Adding drive +{"return": "OKrn"} _qemu_io_wrapper TEST_DIR/t.qcow2 -c write 0 512 -can't open device TEST_DIR/t.qcow2: Failed to get "write" lock +qemu-io: can't open device TEST_DIR/t.qcow2: Failed to get "write" lock Is another process using the image [TEST_DIR/t.qcow2]? Creating overlay with qemu-img when the guest is running should be allowed _qemu_img_wrapper create -f qcow2 -b TEST_DIR/t.qcow2 TEST_DIR/t.qcow2.overlay == Closing an image should unlock it == +{"return": ""} _qemu_io_wrapper TEST_DIR/t.qcow2 -c write 0 512 Adding two and closing one +{"return": "OKrn"} +{"return": "OKrn"} _qemu_img_wrapper info TEST_DIR/t.qcow2 +{"return": ""} _qemu_io_wrapper TEST_DIR/t.qcow2 -c write 0 512 -can't open device TEST_DIR/t.qcow2: Failed to get "write" lock +qemu-io: can't open device TEST_DIR/t.qcow2: Failed to get "write" lock Is another process using the image [TEST_DIR/t.qcow2]? Closing the other +{"return": ""} _qemu_io_wrapper TEST_DIR/t.qcow2 -c write 0 512 @@ -443,7 +449,7 @@ _qemu_io_wrapper TEST_DIR/t.qcow2 -c write 0 512 No conflict: image: null-co:// file format: null-co -virtual size: 1.0G (1073741824 bytes) +virtual size: 1 GiB (1073741824 bytes) disk size: unavailable Conflict: @@ -452,5 +458,5 @@ qemu-img: --force-share/-U conflicts with image options No conflict: Conflict: --U conflicts with image options +qemu-io: -U conflicts with image options *** done diff --git a/tests/qemu-iotests/187.out b/tests/qemu-iotests/187.out index 30b987f71f..86203d8abc 100644 --- a/tests/qemu-iotests/187.out +++ b/tests/qemu-iotests/187.out @@ -3,16 +3,16 @@ Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 Start from read-only -Block node is read-only +qemu-io: Block node is read-only wrote 65536/65536 bytes at offset 0 64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) -Block node is read-only +qemu-io: Block node is read-only Start from read-write wrote 65536/65536 bytes at offset 0 64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) -Block node is read-only +qemu-io: Block node is read-only wrote 65536/65536 bytes at offset 0 64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) *** done diff --git a/tests/qemu-iotests/188.out b/tests/qemu-iotests/188.out index 8af24e5d8b..97b1402671 100644 --- a/tests/qemu-iotests/188.out +++ b/tests/qemu-iotests/188.out @@ -14,5 +14,5 @@ read 16777216/16777216 bytes at offset 0 16 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) == verify open failure with wrong password == -can't open: Invalid password, cannot unlock any keyslot +qemu-io: can't open: Invalid password, cannot unlock any keyslot *** done diff --git a/tests/qemu-iotests/191.out b/tests/qemu-iotests/191.out index a513ccca0b..3fc92bb56e 100644 --- a/tests/qemu-iotests/191.out +++ b/tests/qemu-iotests/191.out @@ -395,13 +395,13 @@ wrote 65536/65536 bytes at offset 1048576 } image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 backing file: TEST_DIR/t.IMGFMT.base backing file format: IMGFMT image: TEST_DIR/t.IMGFMT.ovl2 file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 backing file: TEST_DIR/t.IMGFMT.base backing file format: IMGFMT @@ -813,13 +813,13 @@ wrote 65536/65536 bytes at offset 1048576 } image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 backing file: TEST_DIR/t.IMGFMT.base backing file format: IMGFMT image: TEST_DIR/t.IMGFMT.ovl2 file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 backing file: TEST_DIR/t.IMGFMT.base backing file format: IMGFMT diff --git a/tests/qemu-iotests/195.out b/tests/qemu-iotests/195.out index 1e9330b1be..e6df0d6781 100644 --- a/tests/qemu-iotests/195.out +++ b/tests/qemu-iotests/195.out @@ -35,7 +35,7 @@ Testing: -drive if=none,file=TEST_DIR/t.IMGFMT,backing.node-name=mid image: TEST_DIR/t.IMGFMT.mid file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 backing file: /dev/null backing file format: IMGFMT @@ -73,7 +73,7 @@ Testing: -drive if=none,file=TEST_DIR/t.IMGFMT,node-name=top image: TEST_DIR/t.IMGFMT file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 backing file: /dev/null backing file format: IMGFMT diff --git a/tests/qemu-iotests/197.out b/tests/qemu-iotests/197.out index 8febda5dea..7ca46be6e4 100644 --- a/tests/qemu-iotests/197.out +++ b/tests/qemu-iotests/197.out @@ -16,7 +16,7 @@ read 2147483136/2147483136 bytes at offset 1024 2 GiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) read 1024/1024 bytes at offset 3221226496 1 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) -can't open device TEST_DIR/t.wrap.qcow2: Can't use copy-on-read on read-only device +qemu-io: can't open device TEST_DIR/t.wrap.qcow2: Can't use copy-on-read on read-only device 2 GiB (0x80010000) bytes allocated at offset 0 bytes (0x0) 1023.938 MiB (0x3fff0000) bytes not allocated at offset 2 GiB (0x80010000) 64 KiB (0x10000) bytes allocated at offset 3 GiB (0xc0000000) diff --git a/tests/qemu-iotests/198.out b/tests/qemu-iotests/198.out index adb805cce9..e86b175e39 100644 --- a/tests/qemu-iotests/198.out +++ b/tests/qemu-iotests/198.out @@ -34,7 +34,7 @@ read 16777216/16777216 bytes at offset 0 == checking image base == image: json:{"encrypt.key-secret": "sec0", "driver": "IMGFMT", "file": {"driver": "file", "filename": "TEST_DIR/t.IMGFMT.base"}} file format: IMGFMT -virtual size: 16M (16777216 bytes) +virtual size: 16 MiB (16777216 bytes) Format specific information: encrypt: ivgen alg: plain64 @@ -76,7 +76,7 @@ Format specific information: == checking image layer == image: json:{"encrypt.key-secret": "sec1", "driver": "IMGFMT", "file": {"driver": "file", "filename": "TEST_DIR/t.IMGFMT"}} file format: IMGFMT -virtual size: 16M (16777216 bytes) +virtual size: 16 MiB (16777216 bytes) backing file: TEST_DIR/t.IMGFMT.base Format specific information: encrypt: diff --git a/tests/qemu-iotests/200 b/tests/qemu-iotests/200 index 12d25f4a1c..1c0f8cafc2 100755 --- a/tests/qemu-iotests/200 +++ b/tests/qemu-iotests/200 @@ -52,13 +52,21 @@ ${QEMU_IMG} create -f $IMGFMT -F $IMGFMT "${TEST_IMG}" -b "${BACKING_IMG}" 512M ${QEMU_IO} -c "write -P 0xa5 512 300M" "${BACKING_IMG}" | _filter_qemu_io +case "$QEMU_DEFAULT_MACHINE" in + s390-ccw-virtio) + virtio_scsi="-device virtio-scsi-ccw,id=scsi0,iothread=iothread0" + ;; + *) + virtio_scsi="-device pci-bridge,id=bridge1,chassis_nr=1,bus=pci.0 + -device virtio-scsi-pci,bus=bridge1,addr=0x1f,id=scsi0,iothread=iothread0" + ;; +esac + echo echo === Starting QEMU VM === echo qemu_comm_method="qmp" -_launch_qemu -device pci-bridge,id=bridge1,chassis_nr=1,bus=pci.0 \ - -object iothread,id=iothread0 \ - -device virtio-scsi-pci,bus=bridge1,addr=0x1f,id=scsi0,iothread=iothread0 \ +_launch_qemu -object iothread,id=iothread0 $virtio_scsi \ -drive file="${TEST_IMG}",media=disk,if=none,cache=$CACHEMODE,id=drive_sysdisk,format=$IMGFMT \ -device scsi-hd,drive=drive_sysdisk,bus=scsi0.0,id=sysdisk,bootindex=0 h1=$QEMU_HANDLE diff --git a/tests/qemu-iotests/205 b/tests/qemu-iotests/205 index 31b2f5707a..69f2c1d392 100755 --- a/tests/qemu-iotests/205 +++ b/tests/qemu-iotests/205 @@ -78,7 +78,7 @@ class TestNbdServerRemove(iotests.QMPTestCase): def assertConnectFailed(self, qemu_io_output): self.assertEqual(filter_qemu_io(qemu_io_output).strip(), - "can't open device " + nbd_uri + + "qemu-io: can't open device " + nbd_uri + ": Requested export not available\n" "server reported: export 'exp' not present") diff --git a/tests/qemu-iotests/206.out b/tests/qemu-iotests/206.out index 0f1c23babb..61e7241e0b 100644 --- a/tests/qemu-iotests/206.out +++ b/tests/qemu-iotests/206.out @@ -14,7 +14,7 @@ image: TEST_IMG file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) cluster_size: 65536 Format specific information: compat: 1.1 @@ -36,7 +36,7 @@ Format specific information: image: TEST_IMG file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 Format specific information: compat: 1.1 @@ -58,7 +58,7 @@ Format specific information: image: TEST_IMG file format: IMGFMT -virtual size: 32M (33554432 bytes) +virtual size: 32 MiB (33554432 bytes) cluster_size: 2097152 Format specific information: compat: 1.1 @@ -80,7 +80,7 @@ Format specific information: image: TEST_IMG file format: IMGFMT -virtual size: 32M (33554432 bytes) +virtual size: 32 MiB (33554432 bytes) cluster_size: 512 backing file: TEST_IMG.base backing file format: IMGFMT @@ -97,7 +97,7 @@ Format specific information: image: TEST_IMG file format: IMGFMT -virtual size: 32M (33554432 bytes) +virtual size: 32 MiB (33554432 bytes) encrypted: yes cluster_size: 65536 Format specific information: diff --git a/tests/qemu-iotests/207.out b/tests/qemu-iotests/207.out index 568e8619d0..979d5cf745 100644 --- a/tests/qemu-iotests/207.out +++ b/tests/qemu-iotests/207.out @@ -7,12 +7,12 @@ image: json:{"driver": "IMGFMT", "file": {"server.host": "127.0.0.1", "server.port": "22", "driver": "ssh", "path": "TEST_IMG"}} file format: IMGFMT -virtual size: 4.0M (4194304 bytes) +virtual size: 4 MiB (4194304 bytes) image: TEST_IMG file format: IMGFMT -virtual size: 4.0M (4194304 bytes) +virtual size: 4 MiB (4194304 bytes) === Test host-key-check options === @@ -23,7 +23,7 @@ virtual size: 4.0M (4194304 bytes) image: json:{"driver": "IMGFMT", "file": {"server.host": "127.0.0.1", "server.port": "22", "driver": "ssh", "path": "TEST_IMG"}} file format: IMGFMT -virtual size: 8.0M (8388608 bytes) +virtual size: 8 MiB (8388608 bytes) {"execute": "blockdev-create", "arguments": {"job-id": "job0", "options": {"driver": "ssh", "location": {"host-key-check": {"mode": "known_hosts"}, "path": "TEST_DIR/PID-t.img", "server": {"host": "127.0.0.1", "port": "22"}}, "size": 4194304}}} {"return": {}} @@ -32,7 +32,7 @@ virtual size: 8.0M (8388608 bytes) image: json:{"driver": "IMGFMT", "file": {"server.host": "127.0.0.1", "server.port": "22", "driver": "ssh", "path": "TEST_IMG"}} file format: IMGFMT -virtual size: 4.0M (4194304 bytes) +virtual size: 4 MiB (4194304 bytes) {"execute": "blockdev-create", "arguments": {"job-id": "job0", "options": {"driver": "ssh", "location": {"host-key-check": {"hash": "wrong", "mode": "hash", "type": "md5"}, "path": "TEST_DIR/PID-t.img", "server": {"host": "127.0.0.1", "port": "22"}}, "size": 2097152}}} {"return": {}} @@ -47,7 +47,7 @@ Job failed: remote host key does not match host_key_check 'wrong' image: json:{"driver": "IMGFMT", "file": {"server.host": "127.0.0.1", "server.port": "22", "driver": "ssh", "path": "TEST_IMG"}} file format: IMGFMT -virtual size: 8.0M (8388608 bytes) +virtual size: 8 MiB (8388608 bytes) {"execute": "blockdev-create", "arguments": {"job-id": "job0", "options": {"driver": "ssh", "location": {"host-key-check": {"hash": "wrong", "mode": "hash", "type": "sha1"}, "path": "TEST_DIR/PID-t.img", "server": {"host": "127.0.0.1", "port": "22"}}, "size": 2097152}}} {"return": {}} @@ -62,7 +62,7 @@ Job failed: remote host key does not match host_key_check 'wrong' image: json:{"driver": "IMGFMT", "file": {"server.host": "127.0.0.1", "server.port": "22", "driver": "ssh", "path": "TEST_IMG"}} file format: IMGFMT -virtual size: 4.0M (4194304 bytes) +virtual size: 4 MiB (4194304 bytes) === Invalid path and user === diff --git a/tests/qemu-iotests/209.out b/tests/qemu-iotests/209.out index 0d29724e84..214e27bfce 100644 --- a/tests/qemu-iotests/209.out +++ b/tests/qemu-iotests/209.out @@ -1,2 +1,2 @@ -[{ "start": 0, "length": 524288, "depth": 0, "zero": false, "data": true}, -{ "start": 524288, "length": 524288, "depth": 0, "zero": true, "data": false}] +[{ "start": 0, "length": 524288, "depth": 0, "zero": false, "data": true, "offset": 0}, +{ "start": 524288, "length": 524288, "depth": 0, "zero": true, "data": false, "offset": 524288}] diff --git a/tests/qemu-iotests/210.out b/tests/qemu-iotests/210.out index a3692ce00d..a5e88e2a82 100644 --- a/tests/qemu-iotests/210.out +++ b/tests/qemu-iotests/210.out @@ -14,7 +14,7 @@ image: json:{"driver": "IMGFMT", "file": {"driver": "file", "filename": "TEST_IMG"}, "key-secret": "keysec0"} file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) encrypted: yes Format specific information: ivgen alg: plain64 @@ -66,7 +66,7 @@ Format specific information: image: json:{"driver": "IMGFMT", "file": {"driver": "file", "filename": "TEST_IMG"}, "key-secret": "keysec0"} file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) encrypted: yes Format specific information: ivgen alg: plain64 @@ -121,7 +121,7 @@ Job failed: Cannot find device=this doesn't exist nor node_name=this doesn't exi image: json:{"driver": "IMGFMT", "file": {"driver": "file", "filename": "TEST_IMG"}, "key-secret": "keysec0"} file format: IMGFMT -virtual size: 0 (0 bytes) +virtual size: 0 B (0 bytes) encrypted: yes Format specific information: ivgen alg: plain64 @@ -191,7 +191,7 @@ Job failed: The requested file size is too large {"error": {"class": "GenericError", "desc": "Parameter 'size' expects a >0 size"}} image: json:{"driver": "IMGFMT", "file": {"driver": "file", "filename": "TEST_IMG"}, "key-secret": "keysec0"} file format: IMGFMT -virtual size: 0 (0 bytes) +virtual size: 0 B (0 bytes) encrypted: yes Format specific information: ivgen alg: plain64 diff --git a/tests/qemu-iotests/211.out b/tests/qemu-iotests/211.out index 682adc2a10..b83384deea 100644 --- a/tests/qemu-iotests/211.out +++ b/tests/qemu-iotests/211.out @@ -14,7 +14,7 @@ image: TEST_IMG file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) cluster_size: 1048576 [{ "start": 0, "length": 134217728, "depth": 0, "zero": true, "data": false}] @@ -33,7 +33,7 @@ cluster_size: 1048576 image: TEST_IMG file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 1048576 [{ "start": 0, "length": 67108864, "depth": 0, "zero": true, "data": false}] @@ -52,7 +52,7 @@ cluster_size: 1048576 image: TEST_IMG file format: IMGFMT -virtual size: 32M (33554432 bytes) +virtual size: 32 MiB (33554432 bytes) cluster_size: 1048576 [{ "start": 0, "length": 3072, "depth": 0, "zero": false, "data": true, "offset": 1024}, @@ -75,7 +75,7 @@ Job failed: Cannot find device=this doesn't exist nor node_name=this doesn't exi image: TEST_IMG file format: IMGFMT -virtual size: 0 (0 bytes) +virtual size: 0 B (0 bytes) cluster_size: 1048576 === Maximum size === @@ -87,7 +87,7 @@ cluster_size: 1048576 image: TEST_IMG file format: IMGFMT -virtual size: 512T (562949819203584 bytes) +virtual size: 512 TiB (562949819203584 bytes) cluster_size: 1048576 === Invalid sizes === diff --git a/tests/qemu-iotests/212.out b/tests/qemu-iotests/212.out index 22810720cf..1538d679be 100644 --- a/tests/qemu-iotests/212.out +++ b/tests/qemu-iotests/212.out @@ -14,7 +14,7 @@ image: TEST_IMG file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) === Successful image creation (explicit defaults) === @@ -30,7 +30,7 @@ virtual size: 128M (134217728 bytes) image: TEST_IMG file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) === Successful image creation (with non-default options) === @@ -46,7 +46,7 @@ virtual size: 64M (67108864 bytes) image: TEST_IMG file format: IMGFMT -virtual size: 32M (33554432 bytes) +virtual size: 32 MiB (33554432 bytes) === Invalid BlockdevRef === @@ -65,7 +65,7 @@ Job failed: Cannot find device=this doesn't exist nor node_name=this doesn't exi image: TEST_IMG file format: IMGFMT -virtual size: 0 (0 bytes) +virtual size: 0 B (0 bytes) === Maximum size === @@ -76,7 +76,7 @@ virtual size: 0 (0 bytes) image: TEST_IMG file format: IMGFMT -virtual size: 4096T (4503599627369984 bytes) +virtual size: 4 PiB (4503599627369984 bytes) === Invalid sizes === diff --git a/tests/qemu-iotests/213.out b/tests/qemu-iotests/213.out index 169083e08e..be4ae85180 100644 --- a/tests/qemu-iotests/213.out +++ b/tests/qemu-iotests/213.out @@ -14,7 +14,7 @@ image: TEST_IMG file format: IMGFMT -virtual size: 128M (134217728 bytes) +virtual size: 128 MiB (134217728 bytes) cluster_size: 8388608 === Successful image creation (explicit defaults) === @@ -31,7 +31,7 @@ cluster_size: 8388608 image: TEST_IMG file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 8388608 === Successful image creation (with non-default options) === @@ -48,7 +48,7 @@ cluster_size: 8388608 image: TEST_IMG file format: IMGFMT -virtual size: 32M (33554432 bytes) +virtual size: 32 MiB (33554432 bytes) cluster_size: 268435456 === Invalid BlockdevRef === @@ -68,7 +68,7 @@ Job failed: Cannot find device=this doesn't exist nor node_name=this doesn't exi image: TEST_IMG file format: IMGFMT -virtual size: 0 (0 bytes) +virtual size: 0 B (0 bytes) cluster_size: 8388608 === Maximum size === @@ -80,7 +80,7 @@ cluster_size: 8388608 image: TEST_IMG file format: IMGFMT -virtual size: 64T (70368744177664 bytes) +virtual size: 64 TiB (70368744177664 bytes) cluster_size: 67108864 === Invalid sizes === diff --git a/tests/qemu-iotests/215.out b/tests/qemu-iotests/215.out index 70b0f5fb19..5a2fe40d03 100644 --- a/tests/qemu-iotests/215.out +++ b/tests/qemu-iotests/215.out @@ -16,7 +16,7 @@ read 2147483136/2147483136 bytes at offset 1024 2 GiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) read 1024/1024 bytes at offset 3221226496 1 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) -can't open device TEST_DIR/t.wrap.qcow2: Block node is read-only +qemu-io: can't open device TEST_DIR/t.wrap.qcow2: Block node is read-only 2 GiB (0x80010000) bytes allocated at offset 0 bytes (0x0) 1023.938 MiB (0x3fff0000) bytes not allocated at offset 2 GiB (0x80010000) 64 KiB (0x10000) bytes allocated at offset 3 GiB (0xc0000000) diff --git a/tests/qemu-iotests/223.out b/tests/qemu-iotests/223.out index 95c40a17ad..d5201b2356 100644 --- a/tests/qemu-iotests/223.out +++ b/tests/qemu-iotests/223.out @@ -41,7 +41,7 @@ exports available: 2 export: 'n' size: 4194304 flags: 0x4ef ( readonly flush fua trim zeroes df cache ) - min block: 512 + min block: 1 opt block: 4096 max block: 33554432 available meta contexts: 2 @@ -50,7 +50,7 @@ exports available: 2 export: 'n2' size: 4194304 flags: 0x4ed ( flush fua trim zeroes df cache ) - min block: 512 + min block: 1 opt block: 4096 max block: 33554432 available meta contexts: 2 @@ -67,18 +67,18 @@ read 1048576/1048576 bytes at offset 1048576 1 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) read 2097152/2097152 bytes at offset 2097152 2 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) -[{ "start": 0, "length": 4096, "depth": 0, "zero": false, "data": true}, -{ "start": 4096, "length": 1044480, "depth": 0, "zero": true, "data": false}, -{ "start": 1048576, "length": 3145728, "depth": 0, "zero": false, "data": true}] +[{ "start": 0, "length": 4096, "depth": 0, "zero": false, "data": true, "offset": OFFSET}, +{ "start": 4096, "length": 1044480, "depth": 0, "zero": true, "data": false, "offset": OFFSET}, +{ "start": 1048576, "length": 3145728, "depth": 0, "zero": false, "data": true, "offset": OFFSET}] [{ "start": 0, "length": 65536, "depth": 0, "zero": false, "data": false}, -{ "start": 65536, "length": 2031616, "depth": 0, "zero": false, "data": true}, +{ "start": 65536, "length": 2031616, "depth": 0, "zero": false, "data": true, "offset": OFFSET}, { "start": 2097152, "length": 2097152, "depth": 0, "zero": false, "data": false}] === Contrast to small granularity dirty-bitmap === -[{ "start": 0, "length": 512, "depth": 0, "zero": false, "data": true}, +[{ "start": 0, "length": 512, "depth": 0, "zero": false, "data": true, "offset": OFFSET}, { "start": 512, "length": 512, "depth": 0, "zero": false, "data": false}, -{ "start": 1024, "length": 2096128, "depth": 0, "zero": false, "data": true}, +{ "start": 1024, "length": 2096128, "depth": 0, "zero": false, "data": true, "offset": OFFSET}, { "start": 2097152, "length": 2097152, "depth": 0, "zero": false, "data": false}] === End qemu NBD server === @@ -94,10 +94,10 @@ read 2097152/2097152 bytes at offset 2097152 === Use qemu-nbd as server === [{ "start": 0, "length": 65536, "depth": 0, "zero": false, "data": false}, -{ "start": 65536, "length": 2031616, "depth": 0, "zero": false, "data": true}, +{ "start": 65536, "length": 2031616, "depth": 0, "zero": false, "data": true, "offset": OFFSET}, { "start": 2097152, "length": 2097152, "depth": 0, "zero": false, "data": false}] -[{ "start": 0, "length": 512, "depth": 0, "zero": false, "data": true}, +[{ "start": 0, "length": 512, "depth": 0, "zero": false, "data": true, "offset": OFFSET}, { "start": 512, "length": 512, "depth": 0, "zero": false, "data": false}, -{ "start": 1024, "length": 2096128, "depth": 0, "zero": false, "data": true}, +{ "start": 1024, "length": 2096128, "depth": 0, "zero": false, "data": true, "offset": OFFSET}, { "start": 2097152, "length": 2097152, "depth": 0, "zero": false, "data": false}] *** done diff --git a/tests/qemu-iotests/226.out b/tests/qemu-iotests/226.out index 8c0d060ffc..42be973ff2 100644 --- a/tests/qemu-iotests/226.out +++ b/tests/qemu-iotests/226.out @@ -3,24 +3,24 @@ QA output created by 226 === Testing with driver:file === == Testing RO == -can't open: A regular file was expected by the 'file' driver, but something else was given -warning: Opening a character device as a file using the 'file' driver is deprecated +qemu-io: can't open: A regular file was expected by the 'file' driver, but something else was given +qemu-io: warning: Opening a character device as a file using the 'file' driver is deprecated == Testing RW == -can't open: Could not open 'TEST_DIR/t.IMGFMT': Is a directory -warning: Opening a character device as a file using the 'file' driver is deprecated +qemu-io: can't open: Could not open 'TEST_DIR/t.IMGFMT': Is a directory +qemu-io: warning: Opening a character device as a file using the 'file' driver is deprecated === Testing with driver:host_device === == Testing RO == -can't open: 'host_device' driver expects either a character or block device +qemu-io: can't open: 'host_device' driver expects either a character or block device == Testing RW == -can't open: Could not open 'TEST_DIR/t.IMGFMT': Is a directory +qemu-io: can't open: Could not open 'TEST_DIR/t.IMGFMT': Is a directory === Testing with driver:host_cdrom === == Testing RO == -can't open: 'host_cdrom' driver expects either a character or block device +qemu-io: can't open: 'host_cdrom' driver expects either a character or block device == Testing RW == -can't open: Could not open 'TEST_DIR/t.IMGFMT': Is a directory +qemu-io: can't open: Could not open 'TEST_DIR/t.IMGFMT': Is a directory *** done diff --git a/tests/qemu-iotests/232 b/tests/qemu-iotests/232 index 71fd48eff0..2063f78876 100755 --- a/tests/qemu-iotests/232 +++ b/tests/qemu-iotests/232 @@ -29,6 +29,7 @@ status=1 # failure is the default! _cleanup() { _cleanup_test_img + rm -f $TEST_IMG.[01234] } trap "_cleanup; exit \$status" 0 1 2 3 15 diff --git a/tests/qemu-iotests/232.out b/tests/qemu-iotests/232.out index dcb683afa3..3bd1a920af 100644 --- a/tests/qemu-iotests/232.out +++ b/tests/qemu-iotests/232.out @@ -22,12 +22,12 @@ NODE_NAME: TEST_DIR/t.IMGFMT (file, read-only) NODE_NAME: TEST_DIR/t.IMGFMT (file, read-only) QEMU_PROG: -drive driver=file,file=TEST_DIR/t.IMGFMT,if=none,read-only=off,auto-read-only=off: Could not open 'TEST_DIR/t.IMGFMT': Permission denied -NODE_NAME: TEST_DIR/t.IMGFMT (file, read-only) -NODE_NAME: TEST_DIR/t.IMGFMT (file, read-only) +NODE_NAME: TEST_DIR/t.IMGFMT (file) +NODE_NAME: TEST_DIR/t.IMGFMT (file) QEMU_PROG: -drive driver=file,file=TEST_DIR/t.IMGFMT,if=none,auto-read-only=off: Could not open 'TEST_DIR/t.IMGFMT': Permission denied -NODE_NAME: TEST_DIR/t.IMGFMT (file, read-only) -NODE_NAME: TEST_DIR/t.IMGFMT (file, read-only) +NODE_NAME: TEST_DIR/t.IMGFMT (file) +NODE_NAME: TEST_DIR/t.IMGFMT (file) === -blockdev with read-write image: read-only/auto-read-only combinations === @@ -50,10 +50,10 @@ node0: TEST_DIR/t.IMGFMT (file, read-only) node0: TEST_DIR/t.IMGFMT (file, read-only) QEMU_PROG: -blockdev driver=file,filename=TEST_DIR/t.IMGFMT,node-name=node0,read-only=off,auto-read-only=off: Could not open 'TEST_DIR/t.IMGFMT': Permission denied -node0: TEST_DIR/t.IMGFMT (file, read-only) +node0: TEST_DIR/t.IMGFMT (file) QEMU_PROG: -blockdev driver=file,filename=TEST_DIR/t.IMGFMT,node-name=node0,read-only=off: Could not open 'TEST_DIR/t.IMGFMT': Permission denied QEMU_PROG: -blockdev driver=file,filename=TEST_DIR/t.IMGFMT,node-name=node0,auto-read-only=off: Could not open 'TEST_DIR/t.IMGFMT': Permission denied -node0: TEST_DIR/t.IMGFMT (file, read-only) +node0: TEST_DIR/t.IMGFMT (file) QEMU_PROG: -blockdev driver=file,filename=TEST_DIR/t.IMGFMT,node-name=node0: Could not open 'TEST_DIR/t.IMGFMT': Permission denied *** done diff --git a/tests/qemu-iotests/233.out b/tests/qemu-iotests/233.out index 5acbc13b54..4edc2dd5cf 100644 --- a/tests/qemu-iotests/233.out +++ b/tests/qemu-iotests/233.out @@ -28,17 +28,17 @@ server reported: Option 0x8 not permitted before TLS == check TLS works == image: nbd://127.0.0.1:PORT file format: nbd -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) disk size: unavailable image: nbd://127.0.0.1:PORT file format: nbd -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) disk size: unavailable exports available: 1 export: '' size: 67108864 flags: 0x4ed ( flush fua trim zeroes df cache ) - min block: 512 + min block: 1 opt block: 4096 max block: 33554432 available meta contexts: 1 diff --git a/tests/qemu-iotests/235 b/tests/qemu-iotests/235 index 75c203b30c..2b6a8c13be 100755 --- a/tests/qemu-iotests/235 +++ b/tests/qemu-iotests/235 @@ -49,7 +49,7 @@ qemu_img_create('-f', iotests.imgfmt, '-o', 'preallocation=metadata', disk, str(size)) vm = QEMUMachine(iotests.qemu_prog) -vm.add_args('-machine', 'accel=kvm') +vm.add_args('-machine', 'accel=kvm:tcg') if iotests.qemu_default_machine == 's390-ccw-virtio': vm.add_args('-no-shutdown') vm.add_args('-drive', 'id=src,file=' + disk) diff --git a/tests/qemu-iotests/236.out b/tests/qemu-iotests/236.out index 5006f7bca1..815cd053f0 100644 --- a/tests/qemu-iotests/236.out +++ b/tests/qemu-iotests/236.out @@ -22,17 +22,21 @@ write -P0xcd 0x3ff0000 64k "bitmaps": { "drive0": [ { + "busy": false, "count": 262144, "granularity": 65536, "name": "bitmapB", "persistent": false, + "recording": true, "status": "active" }, { + "busy": false, "count": 262144, "granularity": 65536, "name": "bitmapA", "persistent": false, + "recording": true, "status": "active" } ] @@ -84,17 +88,21 @@ write -P0xcd 0x3ff0000 64k "bitmaps": { "drive0": [ { + "busy": false, "count": 262144, "granularity": 65536, "name": "bitmapB", "persistent": false, + "recording": true, "status": "active" }, { + "busy": false, "count": 262144, "granularity": 65536, "name": "bitmapA", "persistent": false, + "recording": true, "status": "active" } ] @@ -184,24 +192,30 @@ write -P0xea 0x3fe0000 64k "bitmaps": { "drive0": [ { + "busy": false, "count": 393216, "granularity": 65536, "name": "bitmapC", "persistent": false, + "recording": false, "status": "disabled" }, { + "busy": false, "count": 262144, "granularity": 65536, "name": "bitmapB", "persistent": false, + "recording": false, "status": "disabled" }, { + "busy": false, "count": 458752, "granularity": 65536, "name": "bitmapA", "persistent": false, + "recording": false, "status": "disabled" } ] @@ -251,24 +265,30 @@ write -P0xea 0x3fe0000 64k "bitmaps": { "drive0": [ { + "busy": false, "count": 393216, "granularity": 65536, "name": "bitmapC", "persistent": false, + "recording": false, "status": "disabled" }, { + "busy": false, "count": 262144, "granularity": 65536, "name": "bitmapB", "persistent": false, + "recording": false, "status": "disabled" }, { + "busy": false, "count": 458752, "granularity": 65536, "name": "bitmapA", "persistent": false, + "recording": false, "status": "disabled" } ] @@ -311,31 +331,39 @@ write -P0xea 0x3fe0000 64k "bitmaps": { "drive0": [ { + "busy": false, "count": 458752, "granularity": 65536, "name": "bitmapD", "persistent": false, + "recording": false, "status": "disabled" }, { + "busy": false, "count": 393216, "granularity": 65536, "name": "bitmapC", "persistent": false, + "recording": false, "status": "disabled" }, { + "busy": false, "count": 262144, "granularity": 65536, "name": "bitmapB", "persistent": false, + "recording": false, "status": "disabled" }, { + "busy": false, "count": 458752, "granularity": 65536, "name": "bitmapA", "persistent": false, + "recording": false, "status": "disabled" } ] diff --git a/tests/qemu-iotests/237.out b/tests/qemu-iotests/237.out index 2aaa68f672..a8c800bfad 100644 --- a/tests/qemu-iotests/237.out +++ b/tests/qemu-iotests/237.out @@ -14,7 +14,7 @@ image: TEST_IMG file format: IMGFMT -virtual size: 5.0G (5368709120 bytes) +virtual size: 5 GiB (5368709120 bytes) cluster_size: 65536 Format specific information: cid: XXXXXXXXXX @@ -41,7 +41,7 @@ Format specific information: image: TEST_IMG file format: IMGFMT -virtual size: 64M (67108864 bytes) +virtual size: 64 MiB (67108864 bytes) cluster_size: 65536 Format specific information: cid: XXXXXXXXXX @@ -68,7 +68,7 @@ Format specific information: image: TEST_IMG file format: IMGFMT -virtual size: 32M (33554432 bytes) +virtual size: 32 MiB (33554432 bytes) cluster_size: 65536 Format specific information: cid: XXXXXXXXXX @@ -169,7 +169,7 @@ Job failed: List of extents contains unused extents image: TEST_IMG file format: IMGFMT -virtual size: 512 (512 bytes) +virtual size: 512 B (512 bytes) Format specific information: cid: XXXXXXXXXX parent cid: XXXXXXXXXX @@ -189,7 +189,7 @@ Format specific information: image: TEST_IMG file format: IMGFMT -virtual size: 512 (512 bytes) +virtual size: 512 B (512 bytes) cluster_size: 65536 Format specific information: cid: XXXXXXXXXX @@ -211,7 +211,7 @@ Format specific information: image: TEST_IMG file format: IMGFMT -virtual size: 1.0G (1073741824 bytes) +virtual size: 1 GiB (1073741824 bytes) Format specific information: cid: XXXXXXXXXX parent cid: XXXXXXXXXX @@ -231,7 +231,7 @@ Format specific information: image: TEST_IMG file format: IMGFMT -virtual size: 1.0G (1073741824 bytes) +virtual size: 1 GiB (1073741824 bytes) cluster_size: 65536 Format specific information: cid: XXXXXXXXXX @@ -253,7 +253,7 @@ Format specific information: image: TEST_IMG file format: IMGFMT -virtual size: 2.0G (2147483648 bytes) +virtual size: 2 GiB (2147483648 bytes) Format specific information: cid: XXXXXXXXXX parent cid: XXXXXXXXXX @@ -273,7 +273,7 @@ Format specific information: image: TEST_IMG file format: IMGFMT -virtual size: 2.0G (2147483648 bytes) +virtual size: 2 GiB (2147483648 bytes) cluster_size: 65536 Format specific information: cid: XXXXXXXXXX @@ -295,7 +295,7 @@ Format specific information: image: TEST_IMG file format: IMGFMT -virtual size: 5.0G (5368709120 bytes) +virtual size: 5 GiB (5368709120 bytes) Format specific information: cid: XXXXXXXXXX parent cid: XXXXXXXXXX @@ -323,7 +323,7 @@ Format specific information: image: TEST_IMG file format: IMGFMT -virtual size: 5.0G (5368709120 bytes) +virtual size: 5 GiB (5368709120 bytes) cluster_size: 65536 Format specific information: cid: XXXXXXXXXX diff --git a/tests/qemu-iotests/241 b/tests/qemu-iotests/241 new file mode 100755 index 0000000000..017a736aab --- /dev/null +++ b/tests/qemu-iotests/241 @@ -0,0 +1,102 @@ +#!/bin/bash +# +# Test qemu-nbd vs. unaligned images +# +# Copyright (C) 2018-2019 Red Hat, Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +seq="$(basename $0)" +echo "QA output created by $seq" + +status=1 # failure is the default! + +nbd_unix_socket=$TEST_DIR/test_qemu_nbd_socket + +_cleanup() +{ + _cleanup_test_img + rm -f "$TEST_DIR/server.log" + nbd_server_stop +} +trap "_cleanup; exit \$status" 0 1 2 3 15 + +# get standard environment, filters and checks +. ./common.rc +. ./common.filter +. ./common.nbd + +_supported_fmt raw +_supported_proto nbd +_supported_os Linux +_require_command QEMU_NBD + +# can't use _make_test_img, because qemu-img rounds image size up, +# and because we want to use Unix socket rather than TCP port. Likewise, +# we have to redirect TEST_IMG to our server. +# This tests that we can deal with the hole at the end of an unaligned +# raw file (either because the server doesn't advertise alignment too +# large, or because the client ignores the server's noncompliance - even +# though we can't actually wire iotests into checking trace messages). +printf %01000d 0 > "$TEST_IMG_FILE" +TEST_IMG="nbd:unix:$nbd_unix_socket" + +echo +echo "=== Exporting unaligned raw image, natural alignment ===" +echo + +nbd_server_start_unix_socket -f $IMGFMT "$TEST_IMG_FILE" + +$QEMU_NBD_PROG --list -k $nbd_unix_socket | grep '\(size\|min\)' +$QEMU_IMG map -f raw --output=json "$TEST_IMG" | _filter_qemu_img_map +$QEMU_IO -f raw -c map "$TEST_IMG" +nbd_server_stop + +echo +echo "=== Exporting unaligned raw image, forced server sector alignment ===" +echo + +# Intentionally omit '-f' to force image probing, which in turn forces +# sector alignment, here at the server. +nbd_server_start_unix_socket "$TEST_IMG_FILE" 2> "$TEST_DIR/server.log" + +$QEMU_NBD_PROG --list -k $nbd_unix_socket | grep '\(size\|min\)' +$QEMU_IMG map -f raw --output=json "$TEST_IMG" | _filter_qemu_img_map +$QEMU_IO -f raw -c map "$TEST_IMG" +nbd_server_stop +cat "$TEST_DIR/server.log" | _filter_testdir + +echo +echo "=== Exporting unaligned raw image, forced client sector alignment ===" +echo + +# Now force sector alignment at the client. +nbd_server_start_unix_socket -f $IMGFMT "$TEST_IMG_FILE" + +$QEMU_NBD_PROG --list -k $nbd_unix_socket | grep '\(size\|min\)' +$QEMU_IMG map --output=json "$TEST_IMG" | _filter_qemu_img_map +$QEMU_IO -c map "$TEST_IMG" +nbd_server_stop + +# Not tested yet: we also want to ensure that qemu as NBD client does +# not access beyond the end of a server's advertised unaligned size: +# nbdkit -U - memory size=513 --run 'qemu-io -f raw -c "r 512 512" $nbd' +# However, since qemu as server always rounds up to a sector alignment, +# we would have to use nbdkit to provoke the current client failures. + +# success, all done +echo '*** done' +rm -f $seq.full +status=0 diff --git a/tests/qemu-iotests/241.out b/tests/qemu-iotests/241.out new file mode 100644 index 0000000000..75f9f465e5 --- /dev/null +++ b/tests/qemu-iotests/241.out @@ -0,0 +1,28 @@ +QA output created by 241 + +=== Exporting unaligned raw image, natural alignment === + + size: 1024 + min block: 1 +[{ "start": 0, "length": 1000, "depth": 0, "zero": false, "data": true, "offset": OFFSET}, +{ "start": 1000, "length": 24, "depth": 0, "zero": true, "data": true, "offset": OFFSET}] +1 KiB (0x400) bytes allocated at offset 0 bytes (0x0) + +=== Exporting unaligned raw image, forced server sector alignment === + + size: 1024 + min block: 512 +[{ "start": 0, "length": 1024, "depth": 0, "zero": false, "data": true, "offset": OFFSET}] +1 KiB (0x400) bytes allocated at offset 0 bytes (0x0) +WARNING: Image format was not specified for 'TEST_DIR/t.raw' and probing guessed raw. + Automatically detecting the format is dangerous for raw images, write operations on block 0 will be restricted. + Specify the 'raw' format explicitly to remove the restrictions. + +=== Exporting unaligned raw image, forced client sector alignment === + + size: 1024 + min block: 1 +[{ "start": 0, "length": 1000, "depth": 0, "zero": false, "data": true, "offset": OFFSET}, +{ "start": 1000, "length": 24, "depth": 0, "zero": true, "data": true, "offset": OFFSET}] +1 KiB (0x400) bytes allocated at offset 0 bytes (0x0) +*** done diff --git a/tests/qemu-iotests/242.out b/tests/qemu-iotests/242.out index fbe05d71c0..7ac8404d11 100644 --- a/tests/qemu-iotests/242.out +++ b/tests/qemu-iotests/242.out @@ -8,7 +8,7 @@ qemu-img info dump: image: TEST_IMG file format: IMGFMT -virtual size: 1.0M (1048576 bytes) +virtual size: 1 MiB (1048576 bytes) cluster_size: 65536 Format specific information: compat: 1.1 @@ -28,7 +28,7 @@ qemu-img info dump: image: TEST_IMG file format: IMGFMT -virtual size: 1.0M (1048576 bytes) +virtual size: 1 MiB (1048576 bytes) cluster_size: 65536 Format specific information: compat: 1.1 @@ -60,7 +60,7 @@ qemu-img info dump: image: TEST_IMG file format: IMGFMT -virtual size: 1.0M (1048576 bytes) +virtual size: 1 MiB (1048576 bytes) cluster_size: 65536 Format specific information: compat: 1.1 @@ -100,7 +100,7 @@ qemu-img info dump: image: TEST_IMG file format: IMGFMT -virtual size: 1.0M (1048576 bytes) +virtual size: 1 MiB (1048576 bytes) cluster_size: 65536 Format specific information: compat: 1.1 @@ -149,7 +149,7 @@ Unset the unknown bitmap flag '0x4' in the bitmap directory entry: image: TEST_IMG file format: IMGFMT -virtual size: 1.0M (1048576 bytes) +virtual size: 1 MiB (1048576 bytes) cluster_size: 65536 Format specific information: compat: 1.1 diff --git a/tests/qemu-iotests/244.out b/tests/qemu-iotests/244.out index 98e5946976..6a3d0067cc 100644 --- a/tests/qemu-iotests/244.out +++ b/tests/qemu-iotests/244.out @@ -9,22 +9,22 @@ read 65536/65536 bytes at offset 0 64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) read 65536/65536 bytes at offset 0 64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) -can't open device TEST_DIR/t.qcow2: Could not open 'inexistent': No such file or directory +qemu-io: can't open device TEST_DIR/t.qcow2: Could not open 'inexistent': No such file or directory no file open, try 'help open' Data file required, but without data file name in the image: -can't open device TEST_DIR/t.qcow2: 'data-file' is required for this image +qemu-io: can't open device TEST_DIR/t.qcow2: 'data-file' is required for this image no file open, try 'help open' read 65536/65536 bytes at offset 0 64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) -can't open device TEST_DIR/t.qcow2: Could not open 'inexistent': No such file or directory +qemu-io: can't open device TEST_DIR/t.qcow2: Could not open 'inexistent': No such file or directory no file open, try 'help open' Setting data-file for an image with internal data: Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 -can't open device TEST_DIR/t.qcow2: 'data-file' can only be set for images with an external data file +qemu-io: can't open device TEST_DIR/t.qcow2: 'data-file' can only be set for images with an external data file no file open, try 'help open' -can't open device TEST_DIR/t.qcow2: Could not open 'inexistent': No such file or directory +qemu-io: can't open device TEST_DIR/t.qcow2: Could not open 'inexistent': No such file or directory no file open, try 'help open' === Conflicting features === diff --git a/tests/qemu-iotests/245 b/tests/qemu-iotests/245 new file mode 100644 index 0000000000..a04c6235c1 --- /dev/null +++ b/tests/qemu-iotests/245 @@ -0,0 +1,997 @@ +#!/usr/bin/env python +# +# Test cases for the QMP 'x-blockdev-reopen' command +# +# Copyright (C) 2018-2019 Igalia, S.L. +# Author: Alberto Garcia <berto@igalia.com> +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +import os +import re +import iotests +import copy +import json +from iotests import qemu_img, qemu_io + +hd_path = [ + os.path.join(iotests.test_dir, 'hd0.img'), + os.path.join(iotests.test_dir, 'hd1.img'), + os.path.join(iotests.test_dir, 'hd2.img') +] + +def hd_opts(idx): + return {'driver': iotests.imgfmt, + 'node-name': 'hd%d' % idx, + 'file': {'driver': 'file', + 'node-name': 'hd%d-file' % idx, + 'filename': hd_path[idx] } } + +class TestBlockdevReopen(iotests.QMPTestCase): + total_io_cmds = 0 + + def setUp(self): + qemu_img('create', '-f', iotests.imgfmt, hd_path[0], '3M') + qemu_img('create', '-f', iotests.imgfmt, '-b', hd_path[0], hd_path[1]) + qemu_img('create', '-f', iotests.imgfmt, hd_path[2], '3M') + qemu_io('-f', iotests.imgfmt, '-c', 'write -P 0xa0 0 1M', hd_path[0]) + qemu_io('-f', iotests.imgfmt, '-c', 'write -P 0xa1 1M 1M', hd_path[1]) + qemu_io('-f', iotests.imgfmt, '-c', 'write -P 0xa2 2M 1M', hd_path[2]) + self.vm = iotests.VM() + self.vm.launch() + + def tearDown(self): + self.vm.shutdown() + self.check_qemu_io_errors() + os.remove(hd_path[0]) + os.remove(hd_path[1]) + os.remove(hd_path[2]) + + # The output of qemu-io is not returned by vm.hmp_qemu_io() but + # it's stored in the log and can only be read when the VM has been + # shut down. This function runs qemu-io and keeps track of the + # number of times it's been called. + def run_qemu_io(self, img, cmd): + result = self.vm.hmp_qemu_io(img, cmd) + self.assert_qmp(result, 'return', '') + self.total_io_cmds += 1 + + # Once the VM is shut down we can parse the log and see if qemu-io + # ran without errors. + def check_qemu_io_errors(self): + self.assertFalse(self.vm.is_running()) + found = 0 + log = self.vm.get_log() + for line in log.split("\n"): + if line.startswith("Pattern verification failed"): + raise Exception("%s (command #%d)" % (line, found)) + if re.match("read .*/.* bytes at offset", line): + found += 1 + self.assertEqual(found, self.total_io_cmds, + "Expected output of %d qemu-io commands, found %d" % + (found, self.total_io_cmds)) + + # Run x-blockdev-reopen with 'opts' but applying 'newopts' + # on top of it. The original 'opts' dict is unmodified + def reopen(self, opts, newopts = {}, errmsg = None): + opts = copy.deepcopy(opts) + + # Apply the changes from 'newopts' on top of 'opts' + for key in newopts: + value = newopts[key] + # If key has the form "foo.bar" then we need to do + # opts["foo"]["bar"] = value, not opts["foo.bar"] = value + subdict = opts + while key.find('.') != -1: + [prefix, key] = key.split('.', 1) + subdict = opts[prefix] + subdict[key] = value + + result = self.vm.qmp('x-blockdev-reopen', conv_keys = False, **opts) + if errmsg: + self.assert_qmp(result, 'error/class', 'GenericError') + self.assert_qmp(result, 'error/desc', errmsg) + else: + self.assert_qmp(result, 'return', {}) + + + # Run query-named-block-nodes and return the specified entry + def get_node(self, node_name): + result = self.vm.qmp('query-named-block-nodes') + for node in result['return']: + if node['node-name'] == node_name: + return node + return None + + # Run 'query-named-block-nodes' and compare its output with the + # value passed by the user in 'graph' + def check_node_graph(self, graph): + result = self.vm.qmp('query-named-block-nodes') + self.assertEqual(json.dumps(graph, sort_keys=True), + json.dumps(result, sort_keys=True)) + + # This test opens one single disk image (without backing files) + # and tries to reopen it with illegal / incorrect parameters. + def test_incorrect_parameters_single_file(self): + # Open 'hd0' only (no backing files) + opts = hd_opts(0) + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + original_graph = self.vm.qmp('query-named-block-nodes') + + # We can reopen the image passing the same options + self.reopen(opts) + + # We can also reopen passing a child reference in 'file' + self.reopen(opts, {'file': 'hd0-file'}) + + # We cannot change any of these + self.reopen(opts, {'node-name': 'not-found'}, "Cannot find node named 'not-found'") + self.reopen(opts, {'node-name': ''}, "Cannot find node named ''") + self.reopen(opts, {'node-name': None}, "Invalid parameter type for 'node-name', expected: string") + self.reopen(opts, {'driver': 'raw'}, "Cannot change the option 'driver'") + self.reopen(opts, {'driver': ''}, "Invalid parameter ''") + self.reopen(opts, {'driver': None}, "Invalid parameter type for 'driver', expected: string") + self.reopen(opts, {'file': 'not-found'}, "Cannot change the option 'file'") + self.reopen(opts, {'file': ''}, "Cannot change the option 'file'") + self.reopen(opts, {'file': None}, "Invalid parameter type for 'file', expected: BlockdevRef") + self.reopen(opts, {'file.node-name': 'newname'}, "Cannot change the option 'node-name'") + self.reopen(opts, {'file.driver': 'host_device'}, "Cannot change the option 'driver'") + self.reopen(opts, {'file.filename': hd_path[1]}, "Cannot change the option 'filename'") + self.reopen(opts, {'file.aio': 'native'}, "Cannot change the option 'aio'") + self.reopen(opts, {'file.locking': 'off'}, "Cannot change the option 'locking'") + self.reopen(opts, {'file.filename': None}, "Invalid parameter type for 'file.filename', expected: string") + + # node-name is optional in BlockdevOptions, but x-blockdev-reopen needs it + del opts['node-name'] + self.reopen(opts, {}, "Node name not specified") + + # Check that nothing has changed + self.check_node_graph(original_graph) + + # Remove the node + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'hd0') + self.assert_qmp(result, 'return', {}) + + # This test opens an image with a backing file and tries to reopen + # it with illegal / incorrect parameters. + def test_incorrect_parameters_backing_file(self): + # Open hd1 omitting the backing options (hd0 will be opened + # with the default options) + opts = hd_opts(1) + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + original_graph = self.vm.qmp('query-named-block-nodes') + + # We can't reopen the image passing the same options, 'backing' is mandatory + self.reopen(opts, {}, "backing is missing for 'hd1'") + + # Everything works if we pass 'backing' using the existing node name + for node in original_graph['return']: + if node['drv'] == iotests.imgfmt and node['file'] == hd_path[0]: + backing_node_name = node['node-name'] + self.reopen(opts, {'backing': backing_node_name}) + + # We can't use a non-existing or empty (non-NULL) node as the backing image + self.reopen(opts, {'backing': 'not-found'}, "Cannot find device= nor node_name=not-found") + self.reopen(opts, {'backing': ''}, "Cannot find device= nor node_name=") + + # We can reopen the image just fine if we specify the backing options + opts['backing'] = {'driver': iotests.imgfmt, + 'file': {'driver': 'file', + 'filename': hd_path[0]}} + self.reopen(opts) + + # We cannot change any of these options + self.reopen(opts, {'backing.node-name': 'newname'}, "Cannot change the option 'node-name'") + self.reopen(opts, {'backing.driver': 'raw'}, "Cannot change the option 'driver'") + self.reopen(opts, {'backing.file.node-name': 'newname'}, "Cannot change the option 'node-name'") + self.reopen(opts, {'backing.file.driver': 'host_device'}, "Cannot change the option 'driver'") + + # Check that nothing has changed since the beginning + self.check_node_graph(original_graph) + + # Remove the node + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'hd1') + self.assert_qmp(result, 'return', {}) + + # Reopen an image several times changing some of its options + def test_reopen(self): + # Check whether the filesystem supports O_DIRECT + if 'O_DIRECT' in qemu_io('-f', 'raw', '-t', 'none', '-c', 'quit', hd_path[0]): + supports_direct = False + else: + supports_direct = True + + # Open the hd1 image passing all backing options + opts = hd_opts(1) + opts['backing'] = hd_opts(0) + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + original_graph = self.vm.qmp('query-named-block-nodes') + + # We can reopen the image passing the same options + self.reopen(opts) + + # Reopen in read-only mode + self.assert_qmp(self.get_node('hd1'), 'ro', False) + + self.reopen(opts, {'read-only': True}) + self.assert_qmp(self.get_node('hd1'), 'ro', True) + self.reopen(opts) + self.assert_qmp(self.get_node('hd1'), 'ro', False) + + # Change the cache options + self.assert_qmp(self.get_node('hd1'), 'cache/writeback', True) + self.assert_qmp(self.get_node('hd1'), 'cache/direct', False) + self.assert_qmp(self.get_node('hd1'), 'cache/no-flush', False) + self.reopen(opts, {'cache': { 'direct': supports_direct, 'no-flush': True }}) + self.assert_qmp(self.get_node('hd1'), 'cache/writeback', True) + self.assert_qmp(self.get_node('hd1'), 'cache/direct', supports_direct) + self.assert_qmp(self.get_node('hd1'), 'cache/no-flush', True) + + # Reopen again with the original options + self.reopen(opts) + self.assert_qmp(self.get_node('hd1'), 'cache/writeback', True) + self.assert_qmp(self.get_node('hd1'), 'cache/direct', False) + self.assert_qmp(self.get_node('hd1'), 'cache/no-flush', False) + + # Change 'detect-zeroes' and 'discard' + self.assert_qmp(self.get_node('hd1'), 'detect_zeroes', 'off') + self.reopen(opts, {'detect-zeroes': 'on'}) + self.assert_qmp(self.get_node('hd1'), 'detect_zeroes', 'on') + self.reopen(opts, {'detect-zeroes': 'unmap'}, + "setting detect-zeroes to unmap is not allowed " + + "without setting discard operation to unmap") + self.assert_qmp(self.get_node('hd1'), 'detect_zeroes', 'on') + self.reopen(opts, {'detect-zeroes': 'unmap', 'discard': 'unmap'}) + self.assert_qmp(self.get_node('hd1'), 'detect_zeroes', 'unmap') + self.reopen(opts) + self.assert_qmp(self.get_node('hd1'), 'detect_zeroes', 'off') + + # Changing 'force-share' is currently not supported + self.reopen(opts, {'force-share': True}, "Cannot change the option 'force-share'") + + # Change some qcow2-specific options + # No way to test for success other than checking the return message + if iotests.imgfmt == 'qcow2': + self.reopen(opts, {'l2-cache-entry-size': 128 * 1024}, + "L2 cache entry size must be a power of two "+ + "between 512 and the cluster size (65536)") + self.reopen(opts, {'l2-cache-size': 1024 * 1024, + 'cache-size': 512 * 1024}, + "l2-cache-size may not exceed cache-size") + self.reopen(opts, {'l2-cache-size': 4 * 1024 * 1024, + 'refcount-cache-size': 4 * 1024 * 1024, + 'l2-cache-entry-size': 32 * 1024}) + self.reopen(opts, {'pass-discard-request': True}) + + # Check that nothing has changed since the beginning + # (from the parameters that we can check) + self.check_node_graph(original_graph) + + # Check that the node names (other than the top-level one) are optional + del opts['file']['node-name'] + del opts['backing']['node-name'] + del opts['backing']['file']['node-name'] + self.reopen(opts) + self.check_node_graph(original_graph) + + # Reopen setting backing = null, this removes the backing image from the chain + self.reopen(opts, {'backing': None}) + self.assert_qmp_absent(self.get_node('hd1'), 'image/backing-image') + + # Open the 'hd0' image + result = self.vm.qmp('blockdev-add', conv_keys = False, **hd_opts(0)) + self.assert_qmp(result, 'return', {}) + + # Reopen the hd1 image setting 'hd0' as its backing image + self.reopen(opts, {'backing': 'hd0'}) + self.assert_qmp(self.get_node('hd1'), 'image/backing-image/filename', hd_path[0]) + + # Check that nothing has changed since the beginning + self.reopen(hd_opts(0), {'read-only': True}) + self.check_node_graph(original_graph) + + # The backing file (hd0) is now a reference, we cannot change backing.* anymore + self.reopen(opts, {}, "Cannot change the option 'backing.driver'") + + # We can't remove 'hd0' while it's a backing image of 'hd1' + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'hd0') + self.assert_qmp(result, 'error/class', 'GenericError') + self.assert_qmp(result, 'error/desc', "Node 'hd0' is busy: node is used as backing hd of 'hd1'") + + # But we can remove both nodes if done in the proper order + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'hd1') + self.assert_qmp(result, 'return', {}) + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'hd0') + self.assert_qmp(result, 'return', {}) + + # Reopen a raw image and see the effect of changing the 'offset' option + def test_reopen_raw(self): + opts = {'driver': 'raw', 'node-name': 'hd0', + 'file': { 'driver': 'file', + 'filename': hd_path[0], + 'node-name': 'hd0-file' } } + + # First we create a 2MB raw file, and fill each half with a + # different value + qemu_img('create', '-f', 'raw', hd_path[0], '2M') + qemu_io('-f', 'raw', '-c', 'write -P 0xa0 0 1M', hd_path[0]) + qemu_io('-f', 'raw', '-c', 'write -P 0xa1 1M 1M', hd_path[0]) + + # Open the raw file with QEMU + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # Read 1MB from offset 0 + self.run_qemu_io("hd0", "read -P 0xa0 0 1M") + + # Reopen the image with a 1MB offset. + # Now the results are different + self.reopen(opts, {'offset': 1024*1024}) + self.run_qemu_io("hd0", "read -P 0xa1 0 1M") + + # Reopen again with the original options. + # We get the original results again + self.reopen(opts) + self.run_qemu_io("hd0", "read -P 0xa0 0 1M") + + # Remove the block device + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'hd0') + self.assert_qmp(result, 'return', {}) + + # Omitting an option should reset it to the default value, but if + # an option cannot be changed it shouldn't be possible to reset it + # to its default value either + def test_reset_default_values(self): + opts = {'driver': 'qcow2', 'node-name': 'hd0', + 'file': { 'driver': 'file', + 'filename': hd_path[0], + 'x-check-cache-dropped': True, # This one can be changed + 'locking': 'off', # This one can NOT be changed + 'node-name': 'hd0-file' } } + + # Open the file with QEMU + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # file.x-check-cache-dropped can be changed... + self.reopen(opts, { 'file.x-check-cache-dropped': False }) + # ...and dropped completely (resetting to the default value) + del opts['file']['x-check-cache-dropped'] + self.reopen(opts) + + # file.locking cannot be changed nor reset to the default value + self.reopen(opts, { 'file.locking': 'on' }, "Cannot change the option 'locking'") + del opts['file']['locking'] + self.reopen(opts, {}, "Option 'locking' cannot be reset to its default value") + # But we can reopen it if we maintain its previous value + self.reopen(opts, { 'file.locking': 'off' }) + + # Remove the block device + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'hd0') + self.assert_qmp(result, 'return', {}) + + # This test modifies the node graph a few times by changing the + # 'backing' option on reopen and verifies that the guest data that + # is read afterwards is consistent with the graph changes. + def test_io_with_graph_changes(self): + opts = [] + + # Open hd0, hd1 and hd2 without any backing image + for i in range(3): + opts.append(hd_opts(i)) + opts[i]['backing'] = None + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts[i]) + self.assert_qmp(result, 'return', {}) + + # hd0 + self.run_qemu_io("hd0", "read -P 0xa0 0 1M") + self.run_qemu_io("hd0", "read -P 0 1M 1M") + self.run_qemu_io("hd0", "read -P 0 2M 1M") + + # hd1 <- hd0 + self.reopen(opts[0], {'backing': 'hd1'}) + + self.run_qemu_io("hd0", "read -P 0xa0 0 1M") + self.run_qemu_io("hd0", "read -P 0xa1 1M 1M") + self.run_qemu_io("hd0", "read -P 0 2M 1M") + + # hd1 <- hd0 , hd1 <- hd2 + self.reopen(opts[2], {'backing': 'hd1'}) + + self.run_qemu_io("hd2", "read -P 0 0 1M") + self.run_qemu_io("hd2", "read -P 0xa1 1M 1M") + self.run_qemu_io("hd2", "read -P 0xa2 2M 1M") + + # hd1 <- hd2 <- hd0 + self.reopen(opts[0], {'backing': 'hd2'}) + + self.run_qemu_io("hd0", "read -P 0xa0 0 1M") + self.run_qemu_io("hd0", "read -P 0xa1 1M 1M") + self.run_qemu_io("hd0", "read -P 0xa2 2M 1M") + + # hd2 <- hd0 + self.reopen(opts[2], {'backing': None}) + + self.run_qemu_io("hd0", "read -P 0xa0 0 1M") + self.run_qemu_io("hd0", "read -P 0 1M 1M") + self.run_qemu_io("hd0", "read -P 0xa2 2M 1M") + + # hd2 <- hd1 <- hd0 + self.reopen(opts[1], {'backing': 'hd2'}) + self.reopen(opts[0], {'backing': 'hd1'}) + + self.run_qemu_io("hd0", "read -P 0xa0 0 1M") + self.run_qemu_io("hd0", "read -P 0xa1 1M 1M") + self.run_qemu_io("hd0", "read -P 0xa2 2M 1M") + + # Illegal operation: hd2 is a child of hd1 + self.reopen(opts[2], {'backing': 'hd1'}, + "Making 'hd1' a backing file of 'hd2' would create a cycle") + + # hd2 <- hd0, hd2 <- hd1 + self.reopen(opts[0], {'backing': 'hd2'}) + + self.run_qemu_io("hd1", "read -P 0 0 1M") + self.run_qemu_io("hd1", "read -P 0xa1 1M 1M") + self.run_qemu_io("hd1", "read -P 0xa2 2M 1M") + + # More illegal operations + self.reopen(opts[2], {'backing': 'hd1'}, + "Making 'hd1' a backing file of 'hd2' would create a cycle") + self.reopen(opts[2], {'file': 'hd0-file'}, "Cannot change the option 'file'") + + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'hd2') + self.assert_qmp(result, 'error/class', 'GenericError') + self.assert_qmp(result, 'error/desc', "Node 'hd2' is busy: node is used as backing hd of 'hd0'") + + # hd1 doesn't have a backing file now + self.reopen(opts[1], {'backing': None}) + + self.run_qemu_io("hd1", "read -P 0 0 1M") + self.run_qemu_io("hd1", "read -P 0xa1 1M 1M") + self.run_qemu_io("hd1", "read -P 0 2M 1M") + + # We can't remove the 'backing' option if the image has a + # default backing file + del opts[1]['backing'] + self.reopen(opts[1], {}, "backing is missing for 'hd1'") + + self.run_qemu_io("hd1", "read -P 0 0 1M") + self.run_qemu_io("hd1", "read -P 0xa1 1M 1M") + self.run_qemu_io("hd1", "read -P 0 2M 1M") + + # This test verifies that we can't change the children of a block + # device during a reopen operation in a way that would create + # cycles in the node graph + def test_graph_cycles(self): + opts = [] + + # Open all three images without backing file + for i in range(3): + opts.append(hd_opts(i)) + opts[i]['backing'] = None + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts[i]) + self.assert_qmp(result, 'return', {}) + + # hd1 <- hd0, hd1 <- hd2 + self.reopen(opts[0], {'backing': 'hd1'}) + self.reopen(opts[2], {'backing': 'hd1'}) + + # Illegal: hd2 is backed by hd1 + self.reopen(opts[1], {'backing': 'hd2'}, + "Making 'hd2' a backing file of 'hd1' would create a cycle") + + # hd1 <- hd0 <- hd2 + self.reopen(opts[2], {'backing': 'hd0'}) + + # Illegal: hd2 is backed by hd0, which is backed by hd1 + self.reopen(opts[1], {'backing': 'hd2'}, + "Making 'hd2' a backing file of 'hd1' would create a cycle") + + # Illegal: hd1 cannot point to itself + self.reopen(opts[1], {'backing': 'hd1'}, + "Making 'hd1' a backing file of 'hd1' would create a cycle") + + # Remove all backing files + self.reopen(opts[0]) + self.reopen(opts[2]) + + ########################################## + # Add a blkverify node using hd0 and hd1 # + ########################################## + bvopts = {'driver': 'blkverify', + 'node-name': 'bv', + 'test': 'hd0', + 'raw': 'hd1'} + result = self.vm.qmp('blockdev-add', conv_keys = False, **bvopts) + self.assert_qmp(result, 'return', {}) + + # blkverify doesn't currently allow reopening. TODO: implement this + self.reopen(bvopts, {}, "Block format 'blkverify' used by node 'bv'" + + " does not support reopening files") + + # Illegal: hd0 is a child of the blkverify node + self.reopen(opts[0], {'backing': 'bv'}, + "Making 'bv' a backing file of 'hd0' would create a cycle") + + # Delete the blkverify node + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'bv') + self.assert_qmp(result, 'return', {}) + + # Misc reopen tests with different block drivers + def test_misc_drivers(self): + #################### + ###### quorum ###### + #################### + for i in range(3): + opts = hd_opts(i) + # Open all three images without backing file + opts['backing'] = None + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + opts = {'driver': 'quorum', + 'node-name': 'quorum0', + 'children': ['hd0', 'hd1', 'hd2'], + 'vote-threshold': 2} + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # Quorum doesn't currently allow reopening. TODO: implement this + self.reopen(opts, {}, "Block format 'quorum' used by node 'quorum0'" + + " does not support reopening files") + + # You can't make quorum0 a backing file of hd0: + # hd0 is already a child of quorum0. + self.reopen(hd_opts(0), {'backing': 'quorum0'}, + "Making 'quorum0' a backing file of 'hd0' would create a cycle") + + # Delete quorum0 + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'quorum0') + self.assert_qmp(result, 'return', {}) + + # Delete hd0, hd1 and hd2 + for i in range(3): + result = self.vm.qmp('blockdev-del', conv_keys = True, + node_name = 'hd%d' % i) + self.assert_qmp(result, 'return', {}) + + ###################### + ###### blkdebug ###### + ###################### + opts = {'driver': 'blkdebug', + 'node-name': 'bd', + 'config': '/dev/null', + 'image': hd_opts(0)} + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # blkdebug allows reopening if we keep the same options + self.reopen(opts) + + # but it currently does not allow changes + self.reopen(opts, {'image': 'hd1'}, "Cannot change the option 'image'") + self.reopen(opts, {'align': 33554432}, "Cannot change the option 'align'") + self.reopen(opts, {'config': '/non/existent'}, "Cannot change the option 'config'") + del opts['config'] + self.reopen(opts, {}, "Option 'config' cannot be reset to its default value") + + # Delete the blkdebug node + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'bd') + self.assert_qmp(result, 'return', {}) + + ################## + ###### null ###### + ################## + opts = {'driver': 'null-aio', 'node-name': 'root', 'size': 1024} + + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # 1 << 30 is the default value, but we cannot change it explicitly + self.reopen(opts, {'size': (1 << 30)}, "Cannot change the option 'size'") + + # We cannot change 'size' back to its default value either + del opts['size'] + self.reopen(opts, {}, "Option 'size' cannot be reset to its default value") + + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'root') + self.assert_qmp(result, 'return', {}) + + ################## + ###### file ###### + ################## + opts = hd_opts(0) + opts['file']['locking'] = 'on' + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # 'locking' cannot be changed + del opts['file']['locking'] + self.reopen(opts, {'file.locking': 'on'}) + self.reopen(opts, {'file.locking': 'off'}, "Cannot change the option 'locking'") + self.reopen(opts, {}, "Option 'locking' cannot be reset to its default value") + + # Trying to reopen the 'file' node directly does not make a difference + opts = opts['file'] + self.reopen(opts, {'locking': 'on'}) + self.reopen(opts, {'locking': 'off'}, "Cannot change the option 'locking'") + self.reopen(opts, {}, "Option 'locking' cannot be reset to its default value") + + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'hd0') + self.assert_qmp(result, 'return', {}) + + ###################### + ###### throttle ###### + ###################### + opts = { 'qom-type': 'throttle-group', 'id': 'group0', + 'props': { 'limits': { 'iops-total': 1000 } } } + result = self.vm.qmp('object-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + opts = { 'qom-type': 'throttle-group', 'id': 'group1', + 'props': { 'limits': { 'iops-total': 2000 } } } + result = self.vm.qmp('object-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # Add a throttle filter with group = group0 + opts = { 'driver': 'throttle', 'node-name': 'throttle0', + 'throttle-group': 'group0', 'file': hd_opts(0) } + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # We can reopen it if we keep the same options + self.reopen(opts) + + # We can also reopen if 'file' is a reference to the child + self.reopen(opts, {'file': 'hd0'}) + + # This is illegal + self.reopen(opts, {'throttle-group': 'notfound'}, "Throttle group 'notfound' does not exist") + + # But it's possible to change the group to group1 + self.reopen(opts, {'throttle-group': 'group1'}) + + # Now group1 is in use, it cannot be deleted + result = self.vm.qmp('object-del', id = 'group1') + self.assert_qmp(result, 'error/class', 'GenericError') + self.assert_qmp(result, 'error/desc', "object 'group1' is in use, can not be deleted") + + # Default options, this switches the group back to group0 + self.reopen(opts) + + # So now we cannot delete group0 + result = self.vm.qmp('object-del', id = 'group0') + self.assert_qmp(result, 'error/class', 'GenericError') + self.assert_qmp(result, 'error/desc', "object 'group0' is in use, can not be deleted") + + # But group1 is free this time, and it can be deleted + result = self.vm.qmp('object-del', id = 'group1') + self.assert_qmp(result, 'return', {}) + + # Let's delete the filter node + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'throttle0') + self.assert_qmp(result, 'return', {}) + + # And we can finally get rid of group0 + result = self.vm.qmp('object-del', id = 'group0') + self.assert_qmp(result, 'return', {}) + + # If an image has a backing file then the 'backing' option must be + # passed on reopen. We don't allow leaving the option out in this + # case because it's unclear what the correct semantics would be. + def test_missing_backing_options_1(self): + # hd2 + opts = hd_opts(2) + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # hd0 + opts = hd_opts(0) + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # hd0 has no backing file: we can omit the 'backing' option + self.reopen(opts) + + # hd2 <- hd0 + self.reopen(opts, {'backing': 'hd2'}) + + # hd0 has a backing file: we must set the 'backing' option + self.reopen(opts, {}, "backing is missing for 'hd0'") + + # hd2 can't be removed because it's the backing file of hd0 + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'hd2') + self.assert_qmp(result, 'error/class', 'GenericError') + self.assert_qmp(result, 'error/desc', "Node 'hd2' is busy: node is used as backing hd of 'hd0'") + + # Detach hd2 from hd0. + self.reopen(opts, {'backing': None}) + self.reopen(opts, {}, "backing is missing for 'hd0'") + + # Remove both hd0 and hd2 + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'hd0') + self.assert_qmp(result, 'return', {}) + + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'hd2') + self.assert_qmp(result, 'return', {}) + + # If an image has default backing file (as part of its metadata) + # then the 'backing' option must be passed on reopen. We don't + # allow leaving the option out in this case because it's unclear + # what the correct semantics would be. + def test_missing_backing_options_2(self): + # hd0 <- hd1 + # (hd0 is hd1's default backing file) + opts = hd_opts(1) + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # hd1 has a backing file: we can't omit the 'backing' option + self.reopen(opts, {}, "backing is missing for 'hd1'") + + # Let's detach the backing file + self.reopen(opts, {'backing': None}) + + # No backing file attached to hd1 now, but we still can't omit the 'backing' option + self.reopen(opts, {}, "backing is missing for 'hd1'") + + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'hd1') + self.assert_qmp(result, 'return', {}) + + # Test that making 'backing' a reference to an existing child + # keeps its current options + def test_backing_reference(self): + # hd2 <- hd1 <- hd0 + opts = hd_opts(0) + opts['backing'] = hd_opts(1) + opts['backing']['backing'] = hd_opts(2) + # Enable 'detect-zeroes' on all three nodes + opts['detect-zeroes'] = 'on' + opts['backing']['detect-zeroes'] = 'on' + opts['backing']['backing']['detect-zeroes'] = 'on' + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # Reopen the chain passing the minimum amount of required options. + # By making 'backing' a reference to hd1 (instead of a sub-dict) + # we tell QEMU to keep its current set of options. + opts = {'driver': iotests.imgfmt, + 'node-name': 'hd0', + 'file': 'hd0-file', + 'backing': 'hd1' } + self.reopen(opts) + + # This has reset 'detect-zeroes' on hd0, but not on hd1 and hd2. + self.assert_qmp(self.get_node('hd0'), 'detect_zeroes', 'off') + self.assert_qmp(self.get_node('hd1'), 'detect_zeroes', 'on') + self.assert_qmp(self.get_node('hd2'), 'detect_zeroes', 'on') + + # Test what happens if the graph changes due to other operations + # such as block-stream + def test_block_stream_1(self): + # hd1 <- hd0 + opts = hd_opts(0) + opts['backing'] = hd_opts(1) + opts['backing']['backing'] = None + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # Stream hd1 into hd0 and wait until it's done + result = self.vm.qmp('block-stream', conv_keys = True, job_id = 'stream0', device = 'hd0') + self.assert_qmp(result, 'return', {}) + self.wait_until_completed(drive = 'stream0') + + # Now we have only hd0 + self.assertEqual(self.get_node('hd1'), None) + + # We have backing.* options but there's no backing file anymore + self.reopen(opts, {}, "Cannot change the option 'backing.driver'") + + # If we remove the 'backing' option then we can reopen hd0 just fine + del opts['backing'] + self.reopen(opts) + + # We can also reopen hd0 if we set 'backing' to null + self.reopen(opts, {'backing': None}) + + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'hd0') + self.assert_qmp(result, 'return', {}) + + # Another block_stream test + def test_block_stream_2(self): + # hd2 <- hd1 <- hd0 + opts = hd_opts(0) + opts['backing'] = hd_opts(1) + opts['backing']['backing'] = hd_opts(2) + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # Stream hd1 into hd0 and wait until it's done + result = self.vm.qmp('block-stream', conv_keys = True, job_id = 'stream0', + device = 'hd0', base_node = 'hd2') + self.assert_qmp(result, 'return', {}) + self.wait_until_completed(drive = 'stream0') + + # The chain is hd2 <- hd0 now. hd1 is missing + self.assertEqual(self.get_node('hd1'), None) + + # The backing options in the dict were meant for hd1, but we cannot + # use them with hd2 because hd1 had a backing file while hd2 does not. + self.reopen(opts, {}, "Cannot change the option 'backing.driver'") + + # If we remove hd1's options from the dict then things work fine + opts['backing'] = opts['backing']['backing'] + self.reopen(opts) + + # We can also reopen hd0 if we use a reference to the backing file + self.reopen(opts, {'backing': 'hd2'}) + + # But we cannot leave the option out + del opts['backing'] + self.reopen(opts, {}, "backing is missing for 'hd0'") + + # Now we can delete hd0 (and hd2) + result = self.vm.qmp('blockdev-del', conv_keys = True, node_name = 'hd0') + self.assert_qmp(result, 'return', {}) + self.assertEqual(self.get_node('hd2'), None) + + # Reopen the chain during a block-stream job (from hd1 to hd0) + def test_block_stream_3(self): + # hd2 <- hd1 <- hd0 + opts = hd_opts(0) + opts['backing'] = hd_opts(1) + opts['backing']['backing'] = hd_opts(2) + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # hd2 <- hd0 + result = self.vm.qmp('block-stream', conv_keys = True, job_id = 'stream0', + device = 'hd0', base_node = 'hd2', speed = 512 * 1024) + self.assert_qmp(result, 'return', {}) + + # We can't remove hd2 while the stream job is ongoing + opts['backing']['backing'] = None + self.reopen(opts, {}, "Cannot change 'backing' link from 'hd1' to 'hd2'") + + # We can't remove hd1 while the stream job is ongoing + opts['backing'] = None + self.reopen(opts, {}, "Cannot change 'backing' link from 'hd0' to 'hd1'") + + self.wait_until_completed(drive = 'stream0') + + # Reopen the chain during a block-stream job (from hd2 to hd1) + def test_block_stream_4(self): + # hd2 <- hd1 <- hd0 + opts = hd_opts(0) + opts['backing'] = hd_opts(1) + opts['backing']['backing'] = hd_opts(2) + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + # hd1 <- hd0 + result = self.vm.qmp('block-stream', conv_keys = True, job_id = 'stream0', + device = 'hd1', speed = 512 * 1024) + self.assert_qmp(result, 'return', {}) + + # We can't reopen with the original options because that would + # make hd1 read-only and block-stream requires it to be read-write + self.reopen(opts, {}, "Can't set node 'hd1' to r/o with copy-on-read enabled") + + # We can't remove hd2 while the stream job is ongoing + opts['backing']['backing'] = None + self.reopen(opts, {'backing.read-only': False}, "Cannot change 'backing' link from 'hd1' to 'hd2'") + + # We can detach hd1 from hd0 because it doesn't affect the stream job + opts['backing'] = None + self.reopen(opts) + + self.wait_until_completed(drive = 'stream0') + + # Reopen the chain during a block-commit job (from hd0 to hd2) + def test_block_commit_1(self): + # hd2 <- hd1 <- hd0 + opts = hd_opts(0) + opts['backing'] = hd_opts(1) + opts['backing']['backing'] = hd_opts(2) + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + result = self.vm.qmp('block-commit', conv_keys = True, job_id = 'commit0', + device = 'hd0', speed = 1024 * 1024) + self.assert_qmp(result, 'return', {}) + + # We can't remove hd2 while the commit job is ongoing + opts['backing']['backing'] = None + self.reopen(opts, {}, "Cannot change 'backing' link from 'hd1' to 'hd2'") + + # We can't remove hd1 while the commit job is ongoing + opts['backing'] = None + self.reopen(opts, {}, "Cannot change 'backing' link from 'hd0' to 'hd1'") + + event = self.vm.event_wait(name='BLOCK_JOB_READY') + self.assert_qmp(event, 'data/device', 'commit0') + self.assert_qmp(event, 'data/type', 'commit') + self.assert_qmp_absent(event, 'data/error') + + result = self.vm.qmp('block-job-complete', device='commit0') + self.assert_qmp(result, 'return', {}) + + self.wait_until_completed(drive = 'commit0') + + # Reopen the chain during a block-commit job (from hd1 to hd2) + def test_block_commit_2(self): + # hd2 <- hd1 <- hd0 + opts = hd_opts(0) + opts['backing'] = hd_opts(1) + opts['backing']['backing'] = hd_opts(2) + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + result = self.vm.qmp('block-commit', conv_keys = True, job_id = 'commit0', + device = 'hd0', top_node = 'hd1', speed = 1024 * 1024) + self.assert_qmp(result, 'return', {}) + + # We can't remove hd2 while the commit job is ongoing + opts['backing']['backing'] = None + self.reopen(opts, {}, "Cannot change the option 'backing.driver'") + + # We can't remove hd1 while the commit job is ongoing + opts['backing'] = None + self.reopen(opts, {}, "Cannot change backing link if 'hd0' has an implicit backing file") + + # hd2 <- hd0 + self.wait_until_completed(drive = 'commit0') + + self.assert_qmp(self.get_node('hd0'), 'ro', False) + self.assertEqual(self.get_node('hd1'), None) + self.assert_qmp(self.get_node('hd2'), 'ro', True) + + # We don't allow setting a backing file that uses a different AioContext + def test_iothreads(self): + opts = hd_opts(0) + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts) + self.assert_qmp(result, 'return', {}) + + opts2 = hd_opts(2) + result = self.vm.qmp('blockdev-add', conv_keys = False, **opts2) + self.assert_qmp(result, 'return', {}) + + result = self.vm.qmp('object-add', qom_type='iothread', id='iothread0') + self.assert_qmp(result, 'return', {}) + + result = self.vm.qmp('object-add', qom_type='iothread', id='iothread1') + self.assert_qmp(result, 'return', {}) + + result = self.vm.qmp('x-blockdev-set-iothread', node_name='hd0', iothread='iothread0') + self.assert_qmp(result, 'return', {}) + + self.reopen(opts, {'backing': 'hd2'}, "Cannot use a new backing file with a different AioContext") + + result = self.vm.qmp('x-blockdev-set-iothread', node_name='hd2', iothread='iothread1') + self.assert_qmp(result, 'return', {}) + + self.reopen(opts, {'backing': 'hd2'}, "Cannot use a new backing file with a different AioContext") + + result = self.vm.qmp('x-blockdev-set-iothread', node_name='hd2', iothread='iothread0') + self.assert_qmp(result, 'return', {}) + + self.reopen(opts, {'backing': 'hd2'}) + +if __name__ == '__main__': + iotests.main(supported_fmts=["qcow2"]) diff --git a/tests/qemu-iotests/245.out b/tests/qemu-iotests/245.out new file mode 100644 index 0000000000..71009c239f --- /dev/null +++ b/tests/qemu-iotests/245.out @@ -0,0 +1,5 @@ +.................. +---------------------------------------------------------------------- +Ran 18 tests + +OK diff --git a/tests/qemu-iotests/246 b/tests/qemu-iotests/246 new file mode 100755 index 0000000000..b0997a392f --- /dev/null +++ b/tests/qemu-iotests/246 @@ -0,0 +1,114 @@ +#!/usr/bin/env python +# +# Test persistent bitmap resizing. +# +# Copyright (c) 2019 John Snow for Red Hat, Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# +# owner=jsnow@redhat.com + +import iotests +from iotests import log + +iotests.verify_image_format(supported_fmts=['qcow2']) +size = 64 * 1024 * 1024 * 1024 +gran_small = 32 * 1024 +gran_large = 128 * 1024 + +def query_bitmaps(vm): + res = vm.qmp("query-block") + return { "bitmaps": { device['device']: device.get('dirty-bitmaps', []) for + device in res['return'] } } + +with iotests.FilePath('img') as img_path, \ + iotests.VM() as vm: + + log('--- Preparing image & VM ---\n') + iotests.qemu_img_create('-f', iotests.imgfmt, img_path, str(size)) + vm.add_drive(img_path) + + + log('--- 1st Boot (Establish Baseline Image) ---\n') + vm.launch() + + log('\n--- Adding bitmaps Small, Medium, Large, and Transient ---\n') + vm.qmp_log("block-dirty-bitmap-add", node="drive0", + name="Small", granularity=gran_small, persistent=True) + vm.qmp_log("block-dirty-bitmap-add", node="drive0", + name="Medium", persistent=True) + vm.qmp_log("block-dirty-bitmap-add", node="drive0", + name="Large", granularity=gran_large, persistent=True) + vm.qmp_log("block-dirty-bitmap-add", node="drive0", + name="Transient", persistent=False) + + log('--- Forcing flush of bitmaps to disk ---\n') + log(query_bitmaps(vm), indent=2) + vm.shutdown() + + + log('--- 2nd Boot (Grow Image) ---\n') + vm.launch() + log(query_bitmaps(vm), indent=2) + + log('--- Adding new bitmap, growing image, and adding 2nd new bitmap ---') + vm.qmp_log("block-dirty-bitmap-add", node="drive0", + name="New", persistent=True) + vm.qmp_log("human-monitor-command", + command_line="block_resize drive0 70G") + vm.qmp_log("block-dirty-bitmap-add", node="drive0", + name="Newtwo", persistent=True) + log(query_bitmaps(vm), indent=2) + + log('--- Forcing flush of bitmaps to disk ---\n') + vm.shutdown() + + + log('--- 3rd Boot (Shrink Image) ---\n') + vm.launch() + log(query_bitmaps(vm), indent=2) + + log('--- Adding "NewB" bitmap, removing "New" bitmap ---') + vm.qmp_log("block-dirty-bitmap-add", node="drive0", + name="NewB", persistent=True) + vm.qmp_log("block-dirty-bitmap-remove", node="drive0", + name="New") + + log('--- Truncating image ---\n') + vm.qmp_log("human-monitor-command", + command_line="block_resize drive0 50G") + + log('--- Adding "NewC" bitmap, removing "NewTwo" bitmap ---') + vm.qmp_log("block-dirty-bitmap-add", node="drive0", + name="NewC", persistent=True) + vm.qmp_log("block-dirty-bitmap-remove", node="drive0", name="Newtwo") + + log('--- Forcing flush of bitmaps to disk ---\n') + vm.shutdown() + + + log('--- 4th Boot (Verification and Cleanup) ---\n') + vm.launch() + log(query_bitmaps(vm), indent=2) + + log('--- Removing all Bitmaps ---\n') + vm.qmp_log("block-dirty-bitmap-remove", node="drive0", name="Small") + vm.qmp_log("block-dirty-bitmap-remove", node="drive0", name="Medium") + vm.qmp_log("block-dirty-bitmap-remove", node="drive0", name="Large") + vm.qmp_log("block-dirty-bitmap-remove", node="drive0", name="NewB") + vm.qmp_log("block-dirty-bitmap-remove", node="drive0", name="NewC") + log(query_bitmaps(vm), indent=2) + + log('\n--- Done ---') + vm.shutdown() diff --git a/tests/qemu-iotests/246.out b/tests/qemu-iotests/246.out new file mode 100644 index 0000000000..6671a11fdd --- /dev/null +++ b/tests/qemu-iotests/246.out @@ -0,0 +1,295 @@ +--- Preparing image & VM --- + +--- 1st Boot (Establish Baseline Image) --- + + +--- Adding bitmaps Small, Medium, Large, and Transient --- + +{"execute": "block-dirty-bitmap-add", "arguments": {"granularity": 32768, "name": "Small", "node": "drive0", "persistent": true}} +{"return": {}} +{"execute": "block-dirty-bitmap-add", "arguments": {"name": "Medium", "node": "drive0", "persistent": true}} +{"return": {}} +{"execute": "block-dirty-bitmap-add", "arguments": {"granularity": 131072, "name": "Large", "node": "drive0", "persistent": true}} +{"return": {}} +{"execute": "block-dirty-bitmap-add", "arguments": {"name": "Transient", "node": "drive0", "persistent": false}} +{"return": {}} +--- Forcing flush of bitmaps to disk --- + +{ + "bitmaps": { + "drive0": [ + { + "busy": false, + "count": 0, + "granularity": 65536, + "name": "Transient", + "persistent": false, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 131072, + "name": "Large", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 65536, + "name": "Medium", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 32768, + "name": "Small", + "persistent": true, + "recording": true, + "status": "active" + } + ] + } +} +--- 2nd Boot (Grow Image) --- + +{ + "bitmaps": { + "drive0": [ + { + "busy": false, + "count": 0, + "granularity": 32768, + "name": "Small", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 65536, + "name": "Medium", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 131072, + "name": "Large", + "persistent": true, + "recording": true, + "status": "active" + } + ] + } +} +--- Adding new bitmap, growing image, and adding 2nd new bitmap --- +{"execute": "block-dirty-bitmap-add", "arguments": {"name": "New", "node": "drive0", "persistent": true}} +{"return": {}} +{"execute": "human-monitor-command", "arguments": {"command-line": "block_resize drive0 70G"}} +{"return": ""} +{"execute": "block-dirty-bitmap-add", "arguments": {"name": "Newtwo", "node": "drive0", "persistent": true}} +{"return": {}} +{ + "bitmaps": { + "drive0": [ + { + "busy": false, + "count": 0, + "granularity": 65536, + "name": "Newtwo", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 65536, + "name": "New", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 32768, + "name": "Small", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 65536, + "name": "Medium", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 131072, + "name": "Large", + "persistent": true, + "recording": true, + "status": "active" + } + ] + } +} +--- Forcing flush of bitmaps to disk --- + +--- 3rd Boot (Shrink Image) --- + +{ + "bitmaps": { + "drive0": [ + { + "busy": false, + "count": 0, + "granularity": 65536, + "name": "New", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 65536, + "name": "Newtwo", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 32768, + "name": "Small", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 65536, + "name": "Medium", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 131072, + "name": "Large", + "persistent": true, + "recording": true, + "status": "active" + } + ] + } +} +--- Adding "NewB" bitmap, removing "New" bitmap --- +{"execute": "block-dirty-bitmap-add", "arguments": {"name": "NewB", "node": "drive0", "persistent": true}} +{"return": {}} +{"execute": "block-dirty-bitmap-remove", "arguments": {"name": "New", "node": "drive0"}} +{"return": {}} +--- Truncating image --- + +{"execute": "human-monitor-command", "arguments": {"command-line": "block_resize drive0 50G"}} +{"return": ""} +--- Adding "NewC" bitmap, removing "NewTwo" bitmap --- +{"execute": "block-dirty-bitmap-add", "arguments": {"name": "NewC", "node": "drive0", "persistent": true}} +{"return": {}} +{"execute": "block-dirty-bitmap-remove", "arguments": {"name": "Newtwo", "node": "drive0"}} +{"return": {}} +--- Forcing flush of bitmaps to disk --- + +--- 4th Boot (Verification and Cleanup) --- + +{ + "bitmaps": { + "drive0": [ + { + "busy": false, + "count": 0, + "granularity": 65536, + "name": "NewB", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 65536, + "name": "NewC", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 32768, + "name": "Small", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 65536, + "name": "Medium", + "persistent": true, + "recording": true, + "status": "active" + }, + { + "busy": false, + "count": 0, + "granularity": 131072, + "name": "Large", + "persistent": true, + "recording": true, + "status": "active" + } + ] + } +} +--- Removing all Bitmaps --- + +{"execute": "block-dirty-bitmap-remove", "arguments": {"name": "Small", "node": "drive0"}} +{"return": {}} +{"execute": "block-dirty-bitmap-remove", "arguments": {"name": "Medium", "node": "drive0"}} +{"return": {}} +{"execute": "block-dirty-bitmap-remove", "arguments": {"name": "Large", "node": "drive0"}} +{"return": {}} +{"execute": "block-dirty-bitmap-remove", "arguments": {"name": "NewB", "node": "drive0"}} +{"return": {}} +{"execute": "block-dirty-bitmap-remove", "arguments": {"name": "NewC", "node": "drive0"}} +{"return": {}} +{ + "bitmaps": { + "drive0": [] + } +} + +--- Done --- diff --git a/tests/qemu-iotests/247 b/tests/qemu-iotests/247 new file mode 100755 index 0000000000..fc50eb5dc1 --- /dev/null +++ b/tests/qemu-iotests/247 @@ -0,0 +1,79 @@ +#!/usr/bin/env bash +# +# Test for auto-read-only with commit block job +# +# Copyright (C) 2019 Red Hat, Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +# creator +owner=kwolf@redhat.com + +seq=`basename $0` +echo "QA output created by $seq" + +status=1 # failure is the default! + +_cleanup() +{ + _cleanup_test_img + rm -f $TEST_IMG.[01234] +} +trap "_cleanup; exit \$status" 0 1 2 3 15 + +# get standard environment, filters and checks +. ./common.rc +. ./common.filter + +# Requires backing files and .bdrv_change_backing_file support +_supported_fmt qcow2 qed +_supported_proto file +_supported_os Linux + +size=128M + +echo +echo "=== Try commit to backing file with auto-read-only ===" +echo +TEST_IMG="$TEST_IMG.0" _make_test_img $size +TEST_IMG="$TEST_IMG.1" _make_test_img $size +TEST_IMG="$TEST_IMG.2" _make_test_img $size +TEST_IMG="$TEST_IMG.3" _make_test_img $size +TEST_IMG="$TEST_IMG.4" _make_test_img $size + +(cat <<EOF +{"execute":"qmp_capabilities"} +{"execute":"block-commit", + "arguments":{"device":"format-4", "top-node": "format-2", "base-node":"format-0", "job-id":"job0"}} +EOF +sleep 1 +echo '{"execute":"quit"}' +) | $QEMU -qmp stdio -nographic -nodefaults \ + -blockdev file,node-name=file-0,filename=$TEST_IMG.0,auto-read-only=on \ + -blockdev $IMGFMT,node-name=format-0,file=file-0,read-only=on \ + -blockdev file,node-name=file-1,filename=$TEST_IMG.1,auto-read-only=on \ + -blockdev $IMGFMT,node-name=format-1,file=file-1,read-only=on,backing=format-0 \ + -blockdev file,node-name=file-2,filename=$TEST_IMG.2,auto-read-only=on \ + -blockdev $IMGFMT,node-name=format-2,file=file-2,read-only=on,backing=format-1 \ + -blockdev file,node-name=file-3,filename=$TEST_IMG.3,auto-read-only=on \ + -blockdev $IMGFMT,node-name=format-3,file=file-3,read-only=on,backing=format-2 \ + -blockdev file,node-name=file-4,filename=$TEST_IMG.4,auto-read-only=on \ + -blockdev $IMGFMT,node-name=format-4,file=file-4,read-only=on,backing=format-3 | + _filter_qmp + +# success, all done +echo "*** done" +rm -f $seq.full +status=0 diff --git a/tests/qemu-iotests/247.out b/tests/qemu-iotests/247.out new file mode 100644 index 0000000000..e909e83994 --- /dev/null +++ b/tests/qemu-iotests/247.out @@ -0,0 +1,22 @@ +QA output created by 247 + +=== Try commit to backing file with auto-read-only === + +Formatting 'TEST_DIR/t.IMGFMT.0', fmt=IMGFMT size=134217728 +Formatting 'TEST_DIR/t.IMGFMT.1', fmt=IMGFMT size=134217728 +Formatting 'TEST_DIR/t.IMGFMT.2', fmt=IMGFMT size=134217728 +Formatting 'TEST_DIR/t.IMGFMT.3', fmt=IMGFMT size=134217728 +Formatting 'TEST_DIR/t.IMGFMT.4', fmt=IMGFMT size=134217728 +QMP_VERSION +{"return": {}} +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "created", "id": "job0"}} +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "running", "id": "job0"}} +{"return": {}} +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "waiting", "id": "job0"}} +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "pending", "id": "job0"}} +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "BLOCK_JOB_COMPLETED", "data": {"device": "job0", "len": 134217728, "offset": 134217728, "speed": 0, "type": "commit"}} +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "concluded", "id": "job0"}} +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "null", "id": "job0"}} +{"return": {}} +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "SHUTDOWN", "data": {"guest": false, "reason": "host-qmp-quit"}} +*** done diff --git a/tests/qemu-iotests/248 b/tests/qemu-iotests/248 new file mode 100755 index 0000000000..f26b4bb2aa --- /dev/null +++ b/tests/qemu-iotests/248 @@ -0,0 +1,71 @@ +#!/usr/bin/env python +# +# Test resume mirror after auto pause on ENOSPC +# +# Copyright (c) 2019 Virtuozzo International GmbH. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +import iotests +from iotests import qemu_img_create, qemu_io, file_path, filter_qmp_testfiles + +iotests.verify_image_format(supported_fmts=['qcow2']) + +source, target = file_path('source', 'target') +size = 5 * 1024 * 1024 +limit = 2 * 1024 * 1024 + +qemu_img_create('-f', iotests.imgfmt, source, str(size)) +qemu_img_create('-f', iotests.imgfmt, target, str(size)) +qemu_io('-c', 'write 0 {}'.format(size), source) + +# raw format don't like empty files +qemu_io('-c', 'write 0 {}'.format(size), target) + +vm = iotests.VM().add_drive(source) +vm.launch() + +blockdev_opts = { + 'driver': iotests.imgfmt, + 'node-name': 'target', + 'file': { + 'driver': 'raw', + 'size': limit, + 'file': { + 'driver': 'file', + 'filename': target + } + } +} +vm.qmp_log('blockdev-add', filters=[filter_qmp_testfiles], **blockdev_opts) + +vm.qmp_log('blockdev-mirror', device='drive0', sync='full', target='target', + on_target_error='enospc') + +vm.event_wait('JOB_STATUS_CHANGE', timeout=3.0, + match={'data': {'status': 'paused'}}) + +# drop other cached events, to not interfere with further wait for 'running' +vm.get_qmp_events() + +del blockdev_opts['file']['size'] +vm.qmp_log('x-blockdev-reopen', filters=[filter_qmp_testfiles], + **blockdev_opts) + +vm.qmp_log('block-job-resume', device='drive0') +vm.event_wait('JOB_STATUS_CHANGE', timeout=1.0, + match={'data': {'status': 'running'}}) + +vm.shutdown() diff --git a/tests/qemu-iotests/248.out b/tests/qemu-iotests/248.out new file mode 100644 index 0000000000..369b25bf26 --- /dev/null +++ b/tests/qemu-iotests/248.out @@ -0,0 +1,8 @@ +{"execute": "blockdev-add", "arguments": {"driver": "qcow2", "file": {"driver": "raw", "file": {"driver": "file", "filename": "TEST_DIR/PID-target"}, "size": 2097152}, "node-name": "target"}} +{"return": {}} +{"execute": "blockdev-mirror", "arguments": {"device": "drive0", "on-target-error": "enospc", "sync": "full", "target": "target"}} +{"return": {}} +{"execute": "x-blockdev-reopen", "arguments": {"driver": "qcow2", "file": {"driver": "raw", "file": {"driver": "file", "filename": "TEST_DIR/PID-target"}}, "node-name": "target"}} +{"return": {}} +{"execute": "block-job-resume", "arguments": {"device": "drive0"}} +{"return": {}} diff --git a/tests/qemu-iotests/249 b/tests/qemu-iotests/249 new file mode 100755 index 0000000000..e4650ecf6b --- /dev/null +++ b/tests/qemu-iotests/249 @@ -0,0 +1,115 @@ +#!/usr/bin/env bash +# +# Test that a backing image is put back in read-only mode after +# block-commit (both when it fails and when it succeeds). +# +# Copyright (C) 2019 Igalia, S.L. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +# creator +owner=berto@igalia.com + +seq="$(basename $0)" +echo "QA output created by $seq" + +status=1 # failure is the default! + +_cleanup() +{ + _cleanup_test_img + rm -f "$TEST_IMG.base" + rm -f "$TEST_IMG.int" +} +trap "_cleanup; exit \$status" 0 1 2 3 15 + +# get standard environment, filters and checks +. ./common.rc +. ./common.filter +. ./common.qemu + +# Any format implementing BlockDriver.bdrv_change_backing_file +_supported_fmt qcow2 qed +_supported_proto file +_supported_os Linux + +IMG_SIZE=1M + +# Create the images: base <- int <- active +TEST_IMG="$TEST_IMG.base" _make_test_img $IMG_SIZE | _filter_imgfmt +TEST_IMG="$TEST_IMG.int" _make_test_img -b "$TEST_IMG.base" | _filter_imgfmt +_make_test_img -b "$TEST_IMG.int" | _filter_imgfmt + +# Launch QEMU with these two drives: +# none0: base (read-only) +# none1: base <- int <- active +_launch_qemu -drive if=none,file="${TEST_IMG}.base",node-name=base,read-only=on \ + -drive if=none,file="${TEST_IMG}",backing.node-name=int,backing.backing=base + +_send_qemu_cmd $QEMU_HANDLE \ + "{ 'execute': 'qmp_capabilities' }" \ + 'return' + +echo +echo '=== Send a write command to a drive opened in read-only mode (1)' +echo +_send_qemu_cmd $QEMU_HANDLE \ + "{ 'execute': 'human-monitor-command', + 'arguments': {'command-line': 'qemu-io none0 \"aio_write 0 2k\"'}}" \ + 'return' + +echo +echo '=== Run block-commit on base using an invalid filter node name' +echo +_send_qemu_cmd $QEMU_HANDLE \ + "{ 'execute': 'block-commit', + 'arguments': {'job-id': 'job0', 'device': 'none1', 'top-node': 'int', + 'filter-node-name': '1234'}}" \ + 'error' + +echo +echo '=== Send a write command to a drive opened in read-only mode (2)' +echo +_send_qemu_cmd $QEMU_HANDLE \ + "{ 'execute': 'human-monitor-command', + 'arguments': {'command-line': 'qemu-io none0 \"aio_write 0 2k\"'}}" \ + 'return' + +echo +echo '=== Run block-commit on base using the default filter node name' +echo +_send_qemu_cmd $QEMU_HANDLE \ + "{ 'execute': 'block-commit', + 'arguments': {'job-id': 'job0', 'device': 'none1', 'top-node': 'int'}}" \ + 'return' + +# Wait for block-commit to finish +_send_qemu_cmd $QEMU_HANDLE '' \ + '"status": "null"' + +echo +echo '=== Send a write command to a drive opened in read-only mode (3)' +echo +_send_qemu_cmd $QEMU_HANDLE \ + "{ 'execute': 'human-monitor-command', + 'arguments': {'command-line': 'qemu-io none0 \"aio_write 0 2k\"'}}" \ + 'return' + +_cleanup_qemu + +# success, all done +echo "*** done" +rm -f $seq.full +status=0 diff --git a/tests/qemu-iotests/249.out b/tests/qemu-iotests/249.out new file mode 100644 index 0000000000..1c93164e84 --- /dev/null +++ b/tests/qemu-iotests/249.out @@ -0,0 +1,35 @@ +QA output created by 249 +Formatting 'TEST_DIR/t.IMGFMT.base', fmt=IMGFMT size=1048576 +Formatting 'TEST_DIR/t.IMGFMT.int', fmt=IMGFMT size=1048576 backing_file=TEST_DIR/t.IMGFMT.base +Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=1048576 backing_file=TEST_DIR/t.IMGFMT.int +{"return": {}} + +=== Send a write command to a drive opened in read-only mode (1) + +{"return": "Block node is read-onlyrn"} + +=== Run block-commit on base using an invalid filter node name + +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "created", "id": "job0"}} +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "null", "id": "job0"}} +{"error": {"class": "GenericError", "desc": "Invalid node name"}} + +=== Send a write command to a drive opened in read-only mode (2) + +{"return": "Block node is read-onlyrn"} + +=== Run block-commit on base using the default filter node name + +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "created", "id": "job0"}} +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "running", "id": "job0"}} +{"return": {}} +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "waiting", "id": "job0"}} +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "pending", "id": "job0"}} +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "BLOCK_JOB_COMPLETED", "data": {"device": "job0", "len": 1048576, "offset": 1048576, "speed": 0, "type": "commit"}} +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "concluded", "id": "job0"}} +{"timestamp": {"seconds": TIMESTAMP, "microseconds": TIMESTAMP}, "event": "JOB_STATUS_CHANGE", "data": {"status": "null", "id": "job0"}} + +=== Send a write command to a drive opened in read-only mode (3) + +{"return": "Block node is read-onlyrn"} +*** done diff --git a/tests/qemu-iotests/COPYING b/tests/qemu-iotests/COPYING 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See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License along - with this program; if not, write to the Free Software Foundation, Inc., - 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - -Also add information on how to contact you by electronic and paper mail. - -If the program is interactive, make it output a short notice like this -when it starts in an interactive mode: - - Gnomovision version 69, Copyright (C) year name of author - Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. - This is free software, and you are welcome to redistribute it - under certain conditions; type `show c' for details. - -The hypothetical commands `show w' and `show c' should show the appropriate -parts of the General Public License. Of course, the commands you use may -be called something other than `show w' and `show c'; they could even be -mouse-clicks or menu items--whatever suits your program. - -You should also get your employer (if you work as a programmer) or your -school, if any, to sign a "copyright disclaimer" for the program, if -necessary. Here is a sample; alter the names: - - Yoyodyne, Inc., hereby disclaims all copyright interest in the program - `Gnomovision' (which makes passes at compilers) written by James Hacker. - - <signature of Ty Coon>, 1 April 1989 - Ty Coon, President of Vice - -This General Public License does not permit incorporating your program into -proprietary programs. If your program is a subroutine library, you may -consider it more useful to permit linking proprietary applications with the -library. If this is what you want to do, use the GNU Lesser General -Public License instead of this License. diff --git a/tests/qemu-iotests/group b/tests/qemu-iotests/group index 36100b803c..7ac9a5ea4a 100644 --- a/tests/qemu-iotests/group +++ b/tests/qemu-iotests/group @@ -240,6 +240,12 @@ 238 auto quick 239 rw auto quick 240 auto quick +241 rw auto quick 242 rw auto quick 243 rw auto quick 244 rw auto quick +245 rw auto +246 rw auto quick +247 rw auto quick +248 rw auto quick +249 rw auto quick diff --git a/tests/tcg/Makefile b/tests/tcg/Makefile index bf06415390..1cdd628e96 100644 --- a/tests/tcg/Makefile +++ b/tests/tcg/Makefile @@ -26,16 +26,23 @@ # # We also accept SPEED=slow to enable slower running tests # -# We also expect to be in the tests build dir for the FOO-linux-user. +# We also expect to be in the tests build dir for the FOO-(linux-user|softmmu). # -include ../../config-host.mak -include ../config-target.mak +# for including , in command strings +COMMA := , + quiet-command = $(if $(V),$1,$(if $(2),@printf " %-7s %s\n" $2 $3 && $1, @$1)) # $1 = test name, $2 = cmd, $3 = desc +ifdef CONFIG_USER_ONLY run-test = $(call quiet-command, timeout $(TIMEOUT) $2 > $1.out,"TEST",$3) +else +run-test = $(call quiet-command, timeout $(TIMEOUT) $2,"TEST",$3) +endif # $1 = test name, $2 = reference diff-out = $(call quiet-command, diff -u $1.out $2 | head -n 10,"DIFF","$1.out with $2") @@ -52,7 +59,13 @@ QEMU_CFLAGS= LDFLAGS= # The QEMU for this TARGET +ifdef CONFIG_USER_ONLY QEMU=../qemu-$(TARGET_NAME) +else +QEMU=../qemu-system-$(TARGET_NAME) +endif +QEMU_OPTS= + # If TCG debugging is enabled things are a lot slower ifeq ($(CONFIG_DEBUG_TCG),y) @@ -61,6 +74,7 @@ else TIMEOUT=15 endif +ifdef CONFIG_USER_ONLY # The order we include is important. We include multiarch, base arch # and finally arch if it's not the same as base arch. -include $(SRC_PATH)/tests/tcg/multiarch/Makefile.target @@ -77,6 +91,17 @@ endif %: %.c $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) +else +# For softmmu targets we include a different Makefile fragement as the +# build options for bare programs are usually pretty different. They +# are expected to provide their own build recipes. +-include $(SRC_PATH)/tests/tcg/minilib/Makefile.target +-include $(SRC_PATH)/tests/tcg/$(TARGET_BASE_ARCH)/Makefile.softmmu-target +ifneq ($(TARGET_BASE_ARCH),$(TARGET_NAME)) +-include $(SRC_PATH)/tests/tcg/$(TARGET_NAME)/Makefile.softmmu-target +endif + +endif all: $(TESTS) @@ -92,8 +117,20 @@ all: $(TESTS) RUN_TESTS=$(patsubst %,run-%, $(TESTS)) RUN_TESTS+=$(EXTRA_RUNS) +ifdef CONFIG_USER_ONLY run-%: % - $(call run-test, $<, $(QEMU) $<, "$< on $(TARGET_NAME)") + $(call run-test, $<, $(QEMU) $(QEMU_OPTS) $<, "$< on $(TARGET_NAME)") +else +run-%: % + $(call run-test, $<, \ + $(QEMU) -monitor none -display none \ + -chardev file$(COMMA)path=$<.out$(COMMA)id=output \ + $(QEMU_OPTS) $<, \ + "$< on $(TARGET_NAME)") +endif + +gdb-%: % + gdb --args $(QEMU) $(QEMU_OPTS) $< .PHONY: run run: $(RUN_TESTS) diff --git a/tests/tcg/Makefile.include b/tests/tcg/Makefile.include index c581bd6ffc..73b5626fc5 100644 --- a/tests/tcg/Makefile.include +++ b/tests/tcg/Makefile.include @@ -67,7 +67,7 @@ endif ifneq ($(GUEST_BUILD),) guest-tests: $(GUEST_BUILD) -run-guest-tests: guest-tests qemu-$(TARGET_NAME) +run-guest-tests: guest-tests qemu-$(subst y,system-,$(CONFIG_SOFTMMU))$(TARGET_NAME) $(call quiet-command, \ (cd tests && $(MAKE) -f $(TCG_MAKE) SPEED=$(SPEED) run), \ "RUN", "tests for $(TARGET_NAME)") diff --git a/tests/tcg/aarch64/pauth-1.c b/tests/tcg/aarch64/pauth-1.c index ae6dc05c2b..a3c1443cd0 100644 --- a/tests/tcg/aarch64/pauth-1.c +++ b/tests/tcg/aarch64/pauth-1.c @@ -1,5 +1,6 @@ #include <assert.h> #include <sys/prctl.h> +#include <stdio.h> asm(".arch armv8.4-a"); @@ -8,16 +9,29 @@ asm(".arch armv8.4-a"); #define PR_PAC_APDAKEY (1 << 2) #endif +#define TESTS 1000 + int main() { - int x; + int x, i, count = 0; void *p0 = &x, *p1, *p2; + float perc; + + for (i = 0; i < TESTS; i++) { + asm volatile("pacdza %0" : "=r"(p1) : "0"(p0)); + prctl(PR_PAC_RESET_KEYS, PR_PAC_APDAKEY, 0, 0, 0); + asm volatile("pacdza %0" : "=r"(p2) : "0"(p0)); - asm volatile("pacdza %0" : "=r"(p1) : "0"(p0)); - prctl(PR_PAC_RESET_KEYS, PR_PAC_APDAKEY, 0, 0, 0); - asm volatile("pacdza %0" : "=r"(p2) : "0"(p0)); + if (p1 != p0) { + count++; + } + if (p1 != p2) { + count++; + } + } - assert(p1 != p0); - assert(p1 != p2); + perc = (float) count / (float) (TESTS * 2); + printf("Ptr Check: %0.2f%%", perc * 100.0); + assert(perc > 0.95); return 0; } diff --git a/tests/tcg/arm/Makefile.softmmu-target b/tests/tcg/arm/Makefile.softmmu-target new file mode 100644 index 0000000000..49d48d8a1c --- /dev/null +++ b/tests/tcg/arm/Makefile.softmmu-target @@ -0,0 +1,29 @@ +# -*- Mode: makefile -*- +# +# ARM SoftMMU tests - included from tests/tcg/Makefile +# + +ifeq ($(TARGET_ABI_DIR),arm) + +ARM_SRC=$(SRC_PATH)/tests/tcg/arm + +# Set search path for all sources +VPATH += $(ARM_SRC) + +ARM_TESTS=test-armv6m-undef + +TESTS += $(ARM_TESTS) + +CFLAGS+=-Wl,--build-id=none -x assembler-with-cpp +LDFLAGS+=-nostdlib -N -static + +%: %.S %.ld + $(CC) $(CFLAGS) $(ASFLAGS) $< -o $@ $(LDFLAGS) -T $(ARM_SRC)/$@.ld + +# Specific Test Rules + +test-armv6m-undef: EXTRA_CFLAGS+=-mcpu=cortex-m0 + +run-test-armv6m-undef: QEMU_OPTS+=-semihosting -M microbit -kernel + +endif diff --git a/tests/tcg/arm/test-armv6m-undef.S b/tests/tcg/arm/test-armv6m-undef.S new file mode 100644 index 0000000000..d18ca56b4a --- /dev/null +++ b/tests/tcg/arm/test-armv6m-undef.S @@ -0,0 +1,154 @@ +/* + * Test ARMv6-M UNDEFINED 32-bit instructions + * + * Copyright 2018 Red Hat Inc. + * + * This work is licensed under the terms of the GNU GPL, version 2 + * or later. See the COPYING file in the top-level directory. + */ + +/* + * Test that UNDEFINED 32-bit instructions fault as expected. This is an + * interesting test because ARMv6-M shares code with its more fully-featured + * siblings and it's necessary to verify that its limited instruction set is + * emulated correctly. + * + * The emulator must be invoked with -semihosting so that the test case can + * terminate with exit code 0 on success or 1 on failure. + * + * Failures can be debugged with -d in_asm,int,exec,cpu and the + * gdbstub (-S -s). + */ + +.syntax unified +.cpu cortex-m0 +.thumb + +/* + * Memory map + */ +#define SRAM_BASE 0x20000000 +#define SRAM_SIZE (16 * 1024) + +/* + * Semihosting interface on ARM T32 + * See "Semihosting for AArch32 and AArch64 Version 2.0 Documentation" by ARM + */ +#define semihosting_call bkpt 0xab +#define SYS_EXIT 0x18 + +vector_table: + .word SRAM_BASE + SRAM_SIZE /* 0. SP_main */ + .word exc_reset_thumb /* 1. Reset */ + .word 0 /* 2. NMI */ + .word exc_hard_fault_thumb /* 3. HardFault */ + .rept 7 + .word 0 /* 4-10. Reserved */ + .endr + .word 0 /* 11. SVCall */ + .word 0 /* 12. Reserved */ + .word 0 /* 13. Reserved */ + .word 0 /* 14. PendSV */ + .word 0 /* 15. SysTick */ + .rept 32 + .word 0 /* 16-47. External Interrupts */ + .endr + +exc_reset: +.equ exc_reset_thumb, exc_reset + 1 +.global exc_reset_thumb + /* The following 32-bit UNDEFINED instructions are tested by executing + * them. The HardFault exception handler should execute and return to + * the next test case. If no exception is raised the test fails. + */ + + /* Table A5-9 32-bit Thumb encoding */ + .short 0b1110100000000000 + .short 0b0000000000000000 + b not_reached + .short 0b1110100000000000 + .short 0b1000000000000000 + b not_reached + .short 0b1111100000000000 + .short 0b0000000000000000 + b not_reached + .short 0b1111100000000000 + .short 0b1000000000000000 + b not_reached + .short 0b1111000000000000 + .short 0b0000000000000000 + b not_reached + + /* Table A5-10 Branch and miscellaneous control instructions */ + .short 0b1111011111110000 + .short 0b1010000000000000 + b not_reached + + /* The following are valid 32-bit instructions that must not raise a + * HardFault. + */ + + /* B4.2.3 Move to Special Register (moves to IPSR are ignored) */ + msr ipsr, r0 + b 1f + b not_reached +1: + /* B4.2.2 Move from Special Register */ + mrs r0, ipsr + b 1f + b not_reached +1: + /* A6.7.13 Branch with Link (immediate) */ + bl 1f +1: + b 1f + b not_reached +1: + /* A6.7.21 Data Memory Barrier */ + dmb + b 1f + b not_reached +1: + /* A6.7.22 Data Synchronization Barrier */ + dsb + b 1f + b not_reached +1: + /* A6.7.24 Instruction Memory Barrier */ + isb + b 1f + b not_reached +1: + + /* Success! */ + movs r0, 1 + b exit + +not_reached: /* Failure :( */ + movs r0, 0 + b exit + +/* When a HardFault occurs, return to pc+6 (test cases are 3 halfwords long) */ +exc_hard_fault: +.equ exc_hard_fault_thumb, exc_hard_fault + 1 +.global exc_hard_fault_thumb + ldr r0, [sp, 0x18] + adds r0, 6 + str r0, [sp, 0x18] + bx lr + +/* + * exit: Terminate emulator + * @r0: 0 - failure, 1 - success + */ +exit: + movs r1, 0 + cmp r0, 1 + bne 1f + ldr r1, ADP_Stopped_ApplicationExit +1: + movs r0, SYS_EXIT + semihosting_call +.align 2 +ADP_Stopped_ApplicationExit: + .word 0x20026 diff --git a/tests/tcg/arm/test-armv6m-undef.ld b/tests/tcg/arm/test-armv6m-undef.ld new file mode 100644 index 0000000000..43dbbf17d5 --- /dev/null +++ b/tests/tcg/arm/test-armv6m-undef.ld @@ -0,0 +1,21 @@ +ENTRY(exc_reset_thumb) + +SECTIONS +{ + . = 0x0; + .text : { + *(.text) + } + .data : { + *(.data) + } + .rodata : { + *(.rodata) + } + .bss : { + *(.bss) + } + /DISCARD/ : { + *(.ARM.attributes) + } +} diff --git a/tests/tcg/cris/Makefile b/tests/tcg/cris/Makefile deleted file mode 100644 index 664b30ce81..0000000000 --- a/tests/tcg/cris/Makefile +++ /dev/null @@ -1,168 +0,0 @@ --include ../../../config-host.mak - -CROSS=crisv32-axis-linux-gnu- -SIM=../../../cris-linux-user/qemu-cris -L ./ -SIMG=cris-axis-linux-gnu-run --sysroot=./ - -CC = $(CROSS)gcc -#AS = $(CROSS)as -AS = $(CC) -x assembler-with-cpp -SIZE = $(CROSS)size -LD = $(CC) -OBJCOPY = $(CROSS)objcopy - -# we rely on GCC inline:ing the stuff we tell it to in many places here. -CFLAGS = -Winline -Wall -g -O2 -static -NOSTDFLAGS = -nostartfiles -nostdlib -ASFLAGS += -g -Wa,-I,$(SRC_PATH)/tests/tcg/cris/ -LDLIBS = -NOSTDLIBS = -lgcc - -CRT = crt.o -SYS = sys.o -TESTCASES += check_abs.tst -TESTCASES += check_addc.tst -TESTCASES += check_addcm.tst -TESTCASES += check_addcv17.tst -TESTCASES += check_addo.tst -TESTCASES += check_addoq.tst -TESTCASES += check_addi.tst -TESTCASES += check_addiv32.tst -TESTCASES += check_addm.tst -TESTCASES += check_addr.tst -TESTCASES += check_addq.tst -TESTCASES += check_addxc.tst -TESTCASES += check_addxm.tst -TESTCASES += check_addxr.tst -TESTCASES += check_andc.tst -TESTCASES += check_andm.tst -TESTCASES += check_andr.tst -TESTCASES += check_andq.tst -TESTCASES += check_asr.tst -TESTCASES += check_ba.tst -TESTCASES += check_bas.tst -TESTCASES += check_bcc.tst -TESTCASES += check_bound.tst -TESTCASES += check_boundc.tst -TESTCASES += check_boundr.tst -TESTCASES += check_btst.tst -TESTCASES += check_clearfv32.tst -TESTCASES += check_cmpc.tst -TESTCASES += check_cmpr.tst -TESTCASES += check_cmpq.tst -TESTCASES += check_cmpm.tst -TESTCASES += check_cmpxc.tst -TESTCASES += check_cmpxm.tst -TESTCASES += check_cmp-2.tst -TESTCASES += check_clrjmp1.tst -TESTCASES += check_dstep.tst -TESTCASES += check_ftag.tst -TESTCASES += check_int64.tst -# check_jsr is broken. -#TESTCASES += check_jsr.tst -TESTCASES += check_mcp.tst -TESTCASES += check_movei.tst -TESTCASES += check_mover.tst -TESTCASES += check_moverm.tst -TESTCASES += check_moveq.tst -TESTCASES += check_movemr.tst -TESTCASES += check_movemrv32.tst -TESTCASES += check_movecr.tst -TESTCASES += check_movmp.tst -TESTCASES += check_movpr.tst -TESTCASES += check_movprv32.tst -TESTCASES += check_movdelsr1.tst -TESTCASES += check_movpmv32.tst -TESTCASES += check_movsr.tst -TESTCASES += check_movsm.tst -TESTCASES += check_movscr.tst -TESTCASES += check_movur.tst -TESTCASES += check_movum.tst -TESTCASES += check_movucr.tst -TESTCASES += check_mulx.tst -TESTCASES += check_mulv32.tst -TESTCASES += check_neg.tst -TESTCASES += check_not.tst -TESTCASES += check_lz.tst -TESTCASES += check_lapc.tst -TESTCASES += check_lsl.tst -TESTCASES += check_lsr.tst -TESTCASES += check_orc.tst -TESTCASES += check_orm.tst -TESTCASES += check_orr.tst -TESTCASES += check_orq.tst -TESTCASES += check_ret.tst -TESTCASES += check_swap.tst -TESTCASES += check_scc.tst -TESTCASES += check_subc.tst -TESTCASES += check_subq.tst -TESTCASES += check_subr.tst -TESTCASES += check_subm.tst -TESTCASES += check_glibc_kernelversion.tst -TESTCASES += check_xarith.tst - -TESTCASES += check_hello.ctst -TESTCASES += check_stat1.ctst -TESTCASES += check_stat2.ctst -TESTCASES += check_stat3.ctst -TESTCASES += check_stat4.ctst -TESTCASES += check_openpf1.ctst -TESTCASES += check_openpf2.ctst -TESTCASES += check_openpf3.ctst -TESTCASES += check_openpf5.ctst -TESTCASES += check_mapbrk.ctst -TESTCASES += check_mmap1.ctst -TESTCASES += check_mmap2.ctst -TESTCASES += check_mmap3.ctst -TESTCASES += check_sigalrm.ctst -TESTCASES += check_time2.ctst -TESTCASES += check_settls1.ctst - -TESTCASES += check_gcctorture_pr28634-1.ctst -#TESTCASES += check_gcctorture_pr28634.ctst - -all: build - -%.o: $(SRC_PATH)/tests/tcg/cris/%.c - $(CC) $(CFLAGS) -c $< -o $@ - -%.o: $(SRC_PATH)/tests/tcg/cris/%.s - $(AS) $(ASFLAGS) -c $< -o $@ - -%.tst: %.o - $(CC) $(CFLAGS) $(NOSTDFLAGS) $(LDLIBS) $(NOSTDLIBS) $(CRT) $< $(SYS) -o $@ - -%.ctst: %.o - $(CC) $(CFLAGS) $(LDLIBS) $< -o $@ - - -sysv10.o: sys.c - $(CC) $(CFLAGS) -mcpu=v10 -c $< -o $@ - -crtv10.o: crt.s - $(AS) $(ASFLAGS) -mcpu=v10 -c $< -o $@ - -check_addcv17.tst: ASFLAGS += -mcpu=v10 -check_addcv17.tst: CRT := crtv10.o -check_addcv17.tst: SYS := sysv10.o -check_addcv17.tst: crtv10.o sysv10.o - -build: $(CRT) $(SYS) $(TESTCASES) - -check: $(CRT) $(SYS) $(TESTCASES) - @printf "\nQEMU simulator.\n" - for case in $(TESTCASES); do \ - printf %s "$$case "; \ - SIMARGS=; \ - case $$case in *v17*) SIMARGS="-cpu crisv17";; esac; \ - $(SIM) $$SIMARGS ./$$case; \ - done -check-g: $(CRT) $(SYS) $(TESTCASES) - @printf "\nGDB simulator.\n" - @for case in $(TESTCASES); do \ - printf %s "$$case "; \ - $(SIMG) $$case; \ - done - -clean: - $(RM) -fr $(TESTCASES) *.o diff --git a/tests/tcg/cris/Makefile.include b/tests/tcg/cris/Makefile.include new file mode 100644 index 0000000000..1c037824bf --- /dev/null +++ b/tests/tcg/cris/Makefile.include @@ -0,0 +1,6 @@ +# +# Makefile.include for all CRIS targets +# + +DOCKER_IMAGE=fedora-cris-cross +DOCKER_CROSS_COMPILER=cris-linux-gnu-gcc diff --git a/tests/tcg/cris/Makefile.target b/tests/tcg/cris/Makefile.target new file mode 100644 index 0000000000..c1173ead42 --- /dev/null +++ b/tests/tcg/cris/Makefile.target @@ -0,0 +1,58 @@ +# -*- Mode: makefile -*- +# +# Cris tests +# +# Currently we can only build the "bare" tests with the docker +# supplied cross-compiler. +# + +CRIS_SRC = $(SRC_PATH)/tests/tcg/cris/bare +CRIS_ALL = $(wildcard $(CRIS_SRC)/*.s) +CRIS_TESTS = $(patsubst $(CRIS_SRC)/%.s, %, $(CRIS_ALL)) +# Filter out common blobs and broken tests +CRIS_BROKEN_TESTS = crt check_jsr +# upstream GCC doesn't support v32 +CRIS_BROKEN_TESTS += check_mcp check_mulv32 check_addiv32 check_movpmv32 +CRIS_BROKEN_TESTS += check_movprv32 check_clearfv32 check_movemrv32 check_bas +CRIS_BROKEN_TESTS += check_lapc check_movei +# no sure why +CRIS_BROKEN_TESTS += check_scc check_xarith + +CRIS_USABLE_TESTS = $(filter-out $(CRIS_BROKEN_TESTS), $(CRIS_TESTS)) +CRIS_RUNS = $(patsubst %, run-%, $(CRIS_USABLE_TESTS)) + +# override the list of tests, as we can't build the multiarch tests +TESTS = $(CRIS_USABLE_TESTS) +VPATH = $(CRIS_SRC) + +AS = $(CC) -x assembler-with-cpp +LD = $(CC) + +# we rely on GCC inline:ing the stuff we tell it to in many places here. +CFLAGS = -Winline -Wall -g -O2 -static +NOSTDFLAGS = -nostartfiles -nostdlib +ASFLAGS += -mcpu=v10 -g -Wa,-I,$(SRC_PATH)/tests/tcg/cris/bare +CRT_FILES = crt.o sys.o + +# stop make deleting crt files if build fails +.PRECIOUS: $(CRT_FILES) + +%.o: %.c + $(CC) -c $< -o $@ + +%.o: %.s + $(AS) $(ASFLAGS) -c $< -o $@ + +%: %.s $(CRT_FILES) + $(CC) $(ASFLAGS) $< -o $@ $(LDFLAGS) $(NOSTDFLAGS) $(CRT_FILES) + +# The default CPU breaks (possibly as it's max?) so force crisv17 +$(CRIS_RUNS): QEMU_OPTS=-cpu crisv17 + +# Additional runners to run under GNU SIM +CRIS_RUNS_ON_SIM=$(patsubst %, %-on-sim, $(CRIS_RUNS)) +SIMG:=cris-axis-linux-gnu-run + +# e.g.: make -f ../../tests/tcg/Makefile run-check_orm-on-sim +run-%-on-sim: + $(call run-test, $<, $(SIMG) $<, "$< on $(TARGET_NAME) with SIM") diff --git a/tests/tcg/cris/check_addcv17.s b/tests/tcg/cris/bare/check_addcv17.s index 52ef7a9716..52ef7a9716 100644 --- a/tests/tcg/cris/check_addcv17.s +++ b/tests/tcg/cris/bare/check_addcv17.s diff --git a/tests/tcg/cris/check_addi.s b/tests/tcg/cris/bare/check_addi.s index a00dec02af..a00dec02af 100644 --- a/tests/tcg/cris/check_addi.s +++ b/tests/tcg/cris/bare/check_addi.s diff --git a/tests/tcg/cris/check_addiv32.s b/tests/tcg/cris/bare/check_addiv32.s index 20ba25d219..20ba25d219 100644 --- a/tests/tcg/cris/check_addiv32.s +++ b/tests/tcg/cris/bare/check_addiv32.s diff --git a/tests/tcg/cris/check_addm.s b/tests/tcg/cris/bare/check_addm.s index efece9f538..efece9f538 100644 --- a/tests/tcg/cris/check_addm.s +++ b/tests/tcg/cris/bare/check_addm.s diff --git a/tests/tcg/cris/check_addq.s b/tests/tcg/cris/bare/check_addq.s index e6f874f9b2..e6f874f9b2 100644 --- a/tests/tcg/cris/check_addq.s +++ b/tests/tcg/cris/bare/check_addq.s diff --git a/tests/tcg/cris/check_addr.s b/tests/tcg/cris/bare/check_addr.s index 7f55cdc1b5..7f55cdc1b5 100644 --- a/tests/tcg/cris/check_addr.s +++ b/tests/tcg/cris/bare/check_addr.s diff --git a/tests/tcg/cris/check_addxc.s b/tests/tcg/cris/bare/check_addxc.s index 09c8355bf8..09c8355bf8 100644 --- a/tests/tcg/cris/check_addxc.s +++ b/tests/tcg/cris/bare/check_addxc.s diff --git a/tests/tcg/cris/check_addxm.s b/tests/tcg/cris/bare/check_addxm.s index 7563494b99..7563494b99 100644 --- a/tests/tcg/cris/check_addxm.s +++ b/tests/tcg/cris/bare/check_addxm.s diff --git a/tests/tcg/cris/check_addxr.s b/tests/tcg/cris/bare/check_addxr.s index 7f55cdc1b5..7f55cdc1b5 100644 --- a/tests/tcg/cris/check_addxr.s +++ b/tests/tcg/cris/bare/check_addxr.s diff --git a/tests/tcg/cris/check_andc.s b/tests/tcg/cris/bare/check_andc.s index a947b773c9..a947b773c9 100644 --- a/tests/tcg/cris/check_andc.s +++ b/tests/tcg/cris/bare/check_andc.s diff --git a/tests/tcg/cris/check_andm.s b/tests/tcg/cris/bare/check_andm.s index 93858863fe..93858863fe 100644 --- a/tests/tcg/cris/check_andm.s +++ b/tests/tcg/cris/bare/check_andm.s diff --git a/tests/tcg/cris/check_andq.s b/tests/tcg/cris/bare/check_andq.s index 55aa7b0607..55aa7b0607 100644 --- a/tests/tcg/cris/check_andq.s +++ b/tests/tcg/cris/bare/check_andq.s diff --git a/tests/tcg/cris/check_andr.s b/tests/tcg/cris/bare/check_andr.s index 61aa1dc32f..61aa1dc32f 100644 --- a/tests/tcg/cris/check_andr.s +++ b/tests/tcg/cris/bare/check_andr.s diff --git a/tests/tcg/cris/check_asr.s b/tests/tcg/cris/bare/check_asr.s index 0a02ae6f7e..0a02ae6f7e 100644 --- a/tests/tcg/cris/check_asr.s +++ b/tests/tcg/cris/bare/check_asr.s diff --git a/tests/tcg/cris/check_ba.s b/tests/tcg/cris/bare/check_ba.s index 873a4086c5..873a4086c5 100644 --- a/tests/tcg/cris/check_ba.s +++ b/tests/tcg/cris/bare/check_ba.s diff --git a/tests/tcg/cris/check_bas.s b/tests/tcg/cris/bare/check_bas.s index 11929d4202..11929d4202 100644 --- a/tests/tcg/cris/check_bas.s +++ b/tests/tcg/cris/bare/check_bas.s diff --git a/tests/tcg/cris/check_bcc.s b/tests/tcg/cris/bare/check_bcc.s index c57ffa6fa3..c57ffa6fa3 100644 --- a/tests/tcg/cris/check_bcc.s +++ b/tests/tcg/cris/bare/check_bcc.s diff --git a/tests/tcg/cris/check_boundc.s b/tests/tcg/cris/bare/check_boundc.s index fb9e5bc905..fb9e5bc905 100644 --- a/tests/tcg/cris/check_boundc.s +++ b/tests/tcg/cris/bare/check_boundc.s diff --git a/tests/tcg/cris/check_boundr.s b/tests/tcg/cris/bare/check_boundr.s index 5c50cc5f6a..5c50cc5f6a 100644 --- a/tests/tcg/cris/check_boundr.s +++ b/tests/tcg/cris/bare/check_boundr.s diff --git a/tests/tcg/cris/check_btst.s b/tests/tcg/cris/bare/check_btst.s index e39fc8f4d6..485deb2006 100644 --- a/tests/tcg/cris/check_btst.s +++ b/tests/tcg/cris/bare/check_btst.s @@ -85,12 +85,12 @@ checkr3 1111 ; check that X gets cleared and that only the NZ flags are touched. - move.d 0xff, $r0 - move $r0, $ccs - btst r3,r3 - move $ccs, $r0 - and.d 0xff, $r0 - cmp.d 0xe3, $r0 - test_cc 0 1 0 0 + ;; move.d 0xff, $r0 + ;; move $r0, $ccs + ;; btst r3,r3 + ;; move $ccs, $r0 + ;; and.d 0xff, $r0 + ;; cmp.d 0xe3, $r0 + ;; test_cc 0 1 0 0 quit diff --git a/tests/tcg/cris/check_clearfv32.s b/tests/tcg/cris/bare/check_clearfv32.s index 4e91360273..4e91360273 100644 --- a/tests/tcg/cris/check_clearfv32.s +++ b/tests/tcg/cris/bare/check_clearfv32.s diff --git a/tests/tcg/cris/check_clrjmp1.s b/tests/tcg/cris/bare/check_clrjmp1.s index 45a7005e24..45a7005e24 100644 --- a/tests/tcg/cris/check_clrjmp1.s +++ b/tests/tcg/cris/bare/check_clrjmp1.s diff --git a/tests/tcg/cris/check_cmp-2.s b/tests/tcg/cris/bare/check_cmp-2.s index 414d370517..414d370517 100644 --- a/tests/tcg/cris/check_cmp-2.s +++ b/tests/tcg/cris/bare/check_cmp-2.s diff --git a/tests/tcg/cris/check_cmpc.s b/tests/tcg/cris/bare/check_cmpc.s index 267c9ba8c0..267c9ba8c0 100644 --- a/tests/tcg/cris/check_cmpc.s +++ b/tests/tcg/cris/bare/check_cmpc.s diff --git a/tests/tcg/cris/check_cmpm.s b/tests/tcg/cris/bare/check_cmpm.s index e4dde15b32..e4dde15b32 100644 --- a/tests/tcg/cris/check_cmpm.s +++ b/tests/tcg/cris/bare/check_cmpm.s diff --git a/tests/tcg/cris/check_cmpq.s b/tests/tcg/cris/bare/check_cmpq.s index 5469141c91..5469141c91 100644 --- a/tests/tcg/cris/check_cmpq.s +++ b/tests/tcg/cris/bare/check_cmpq.s diff --git a/tests/tcg/cris/check_cmpr.s b/tests/tcg/cris/bare/check_cmpr.s index b30af7a538..b30af7a538 100644 --- a/tests/tcg/cris/check_cmpr.s +++ b/tests/tcg/cris/bare/check_cmpr.s diff --git a/tests/tcg/cris/check_cmpxc.s b/tests/tcg/cris/bare/check_cmpxc.s index b237a93175..b237a93175 100644 --- a/tests/tcg/cris/check_cmpxc.s +++ b/tests/tcg/cris/bare/check_cmpxc.s diff --git a/tests/tcg/cris/check_cmpxm.s b/tests/tcg/cris/bare/check_cmpxm.s index 87ea5bf8e3..87ea5bf8e3 100644 --- a/tests/tcg/cris/check_cmpxm.s +++ b/tests/tcg/cris/bare/check_cmpxm.s diff --git a/tests/tcg/cris/check_dstep.s b/tests/tcg/cris/bare/check_dstep.s index bd43b838ea..bd43b838ea 100644 --- a/tests/tcg/cris/check_dstep.s +++ b/tests/tcg/cris/bare/check_dstep.s diff --git a/tests/tcg/cris/check_jsr.s b/tests/tcg/cris/bare/check_jsr.s index 1060237873..1060237873 100644 --- a/tests/tcg/cris/check_jsr.s +++ b/tests/tcg/cris/bare/check_jsr.s diff --git a/tests/tcg/cris/check_lapc.s b/tests/tcg/cris/bare/check_lapc.s index 9a6150b749..9a6150b749 100644 --- a/tests/tcg/cris/check_lapc.s +++ b/tests/tcg/cris/bare/check_lapc.s diff --git a/tests/tcg/cris/check_lsl.s b/tests/tcg/cris/bare/check_lsl.s index 9e2ddd7cd0..9e2ddd7cd0 100644 --- a/tests/tcg/cris/check_lsl.s +++ b/tests/tcg/cris/bare/check_lsl.s diff --git a/tests/tcg/cris/check_lsr.s b/tests/tcg/cris/bare/check_lsr.s index 18fdbef9b2..18fdbef9b2 100644 --- a/tests/tcg/cris/check_lsr.s +++ b/tests/tcg/cris/bare/check_lsr.s diff --git a/tests/tcg/cris/check_mcp.s b/tests/tcg/cris/bare/check_mcp.s index e65ccddfd4..e65ccddfd4 100644 --- a/tests/tcg/cris/check_mcp.s +++ b/tests/tcg/cris/bare/check_mcp.s diff --git a/tests/tcg/cris/check_movdelsr1.s b/tests/tcg/cris/bare/check_movdelsr1.s index 300cc87742..300cc87742 100644 --- a/tests/tcg/cris/check_movdelsr1.s +++ b/tests/tcg/cris/bare/check_movdelsr1.s diff --git a/tests/tcg/cris/check_movecr.s b/tests/tcg/cris/bare/check_movecr.s index da8ec26284..da8ec26284 100644 --- a/tests/tcg/cris/check_movecr.s +++ b/tests/tcg/cris/bare/check_movecr.s diff --git a/tests/tcg/cris/check_movei.s b/tests/tcg/cris/bare/check_movei.s index bbfa633373..bbfa633373 100644 --- a/tests/tcg/cris/check_movei.s +++ b/tests/tcg/cris/bare/check_movei.s diff --git a/tests/tcg/cris/check_movemr.s b/tests/tcg/cris/bare/check_movemr.s index 88489dee31..88489dee31 100644 --- a/tests/tcg/cris/check_movemr.s +++ b/tests/tcg/cris/bare/check_movemr.s diff --git a/tests/tcg/cris/check_movemrv32.s b/tests/tcg/cris/bare/check_movemrv32.s index 53950abd5b..53950abd5b 100644 --- a/tests/tcg/cris/check_movemrv32.s +++ b/tests/tcg/cris/bare/check_movemrv32.s diff --git a/tests/tcg/cris/check_mover.s b/tests/tcg/cris/bare/check_mover.s index b4db595d64..b4db595d64 100644 --- a/tests/tcg/cris/check_mover.s +++ b/tests/tcg/cris/bare/check_mover.s diff --git a/tests/tcg/cris/check_moverm.s b/tests/tcg/cris/bare/check_moverm.s index eabc9588d4..eabc9588d4 100644 --- a/tests/tcg/cris/check_moverm.s +++ b/tests/tcg/cris/bare/check_moverm.s diff --git a/tests/tcg/cris/check_movmp.s b/tests/tcg/cris/bare/check_movmp.s index 7fc11f064d..7fc11f064d 100644 --- a/tests/tcg/cris/check_movmp.s +++ b/tests/tcg/cris/bare/check_movmp.s diff --git a/tests/tcg/cris/check_movpmv32.s b/tests/tcg/cris/bare/check_movpmv32.s index daf0970e4a..daf0970e4a 100644 --- a/tests/tcg/cris/check_movpmv32.s +++ b/tests/tcg/cris/bare/check_movpmv32.s diff --git a/tests/tcg/cris/check_movpr.s b/tests/tcg/cris/bare/check_movpr.s index eef9bdb4fb..eef9bdb4fb 100644 --- a/tests/tcg/cris/check_movpr.s +++ b/tests/tcg/cris/bare/check_movpr.s diff --git a/tests/tcg/cris/check_movprv32.s b/tests/tcg/cris/bare/check_movprv32.s index d0d90e1246..d0d90e1246 100644 --- a/tests/tcg/cris/check_movprv32.s +++ b/tests/tcg/cris/bare/check_movprv32.s diff --git a/tests/tcg/cris/check_movscr.s b/tests/tcg/cris/bare/check_movscr.s index 53c8ce6b50..53c8ce6b50 100644 --- a/tests/tcg/cris/check_movscr.s +++ b/tests/tcg/cris/bare/check_movscr.s diff --git a/tests/tcg/cris/check_movsm.s b/tests/tcg/cris/bare/check_movsm.s index 7074336e78..7074336e78 100644 --- a/tests/tcg/cris/check_movsm.s +++ b/tests/tcg/cris/bare/check_movsm.s diff --git a/tests/tcg/cris/check_movsr.s b/tests/tcg/cris/bare/check_movsr.s index d1889a7a1b..d1889a7a1b 100644 --- a/tests/tcg/cris/check_movsr.s +++ b/tests/tcg/cris/bare/check_movsr.s diff --git a/tests/tcg/cris/check_movucr.s b/tests/tcg/cris/bare/check_movucr.s index 7c8487d1a2..7c8487d1a2 100644 --- a/tests/tcg/cris/check_movucr.s +++ b/tests/tcg/cris/bare/check_movucr.s diff --git a/tests/tcg/cris/check_movum.s b/tests/tcg/cris/bare/check_movum.s index 038e539463..038e539463 100644 --- a/tests/tcg/cris/check_movum.s +++ b/tests/tcg/cris/bare/check_movum.s diff --git a/tests/tcg/cris/check_movur.s b/tests/tcg/cris/bare/check_movur.s index 3ecf475f75..3ecf475f75 100644 --- a/tests/tcg/cris/check_movur.s +++ b/tests/tcg/cris/bare/check_movur.s diff --git a/tests/tcg/cris/check_mulv32.s b/tests/tcg/cris/bare/check_mulv32.s index f379358765..f379358765 100644 --- a/tests/tcg/cris/check_mulv32.s +++ b/tests/tcg/cris/bare/check_mulv32.s diff --git a/tests/tcg/cris/check_mulx.s b/tests/tcg/cris/bare/check_mulx.s index d43241a6f5..a7a1f82a82 100644 --- a/tests/tcg/cris/check_mulx.s +++ b/tests/tcg/cris/bare/check_mulx.s @@ -3,6 +3,8 @@ .include "testutils.inc" start + + .align 4 moveq -1,r3 moveq 2,r4 muls.d r4,r3 @@ -11,6 +13,7 @@ move mof,r3 checkr3 ffffffff + .align 4 moveq -1,r3 moveq 2,r4 mulu.d r4,r3 @@ -19,6 +22,7 @@ move mof,r3 checkr3 1 + .align 4 moveq 2,r3 moveq -1,r4 muls.d r4,r3 @@ -27,6 +31,7 @@ move mof,r3 checkr3 ffffffff + .align 4 moveq 2,r3 moveq -1,r4 mulu.d r4,r3 @@ -98,6 +103,7 @@ checkr3 1fffe move mof,r3 checkr3 0 + nop moveq 2,r3 move.d 0xffff,r4 @@ -138,6 +144,7 @@ checkr3 fdbdade2 move mof,r3 checkr3 ffffffff + nop move.d 0x5432f789,r4 move.d 0x78134452,r3 @@ -146,6 +153,7 @@ checkr3 420fade2 move mof,r3 checkr3 0 + nop move.d 0xff,r3 moveq 2,r4 @@ -186,6 +194,7 @@ checkr3 1 move mof,r3 checkr3 0 + nop moveq -1,r4 move.d r4,r3 @@ -194,6 +203,7 @@ checkr3 fe01 move mof,r3 checkr3 0 + nop move.d 0xfeda49ff,r4 move.d r4,r3 @@ -202,6 +212,7 @@ checkr3 1 move mof,r3 checkr3 0 + nop move.d 0xfeda49ff,r4 move.d r4,r3 diff --git a/tests/tcg/cris/check_neg.s b/tests/tcg/cris/bare/check_neg.s index 963c4b6f5e..963c4b6f5e 100644 --- a/tests/tcg/cris/check_neg.s +++ b/tests/tcg/cris/bare/check_neg.s diff --git a/tests/tcg/cris/check_not.s b/tests/tcg/cris/bare/check_not.s index 33bcf155e5..33bcf155e5 100644 --- a/tests/tcg/cris/check_not.s +++ b/tests/tcg/cris/bare/check_not.s diff --git a/tests/tcg/cris/check_orc.s b/tests/tcg/cris/bare/check_orc.s index c733f036a2..c733f036a2 100644 --- a/tests/tcg/cris/check_orc.s +++ b/tests/tcg/cris/bare/check_orc.s diff --git a/tests/tcg/cris/check_orm.s b/tests/tcg/cris/bare/check_orm.s index ee723a6aa0..ee723a6aa0 100644 --- a/tests/tcg/cris/check_orm.s +++ b/tests/tcg/cris/bare/check_orm.s diff --git a/tests/tcg/cris/check_orq.s b/tests/tcg/cris/bare/check_orq.s index 5060edc72d..5060edc72d 100644 --- a/tests/tcg/cris/check_orq.s +++ b/tests/tcg/cris/bare/check_orq.s diff --git a/tests/tcg/cris/check_orr.s b/tests/tcg/cris/bare/check_orr.s index a514c11bc9..a514c11bc9 100644 --- a/tests/tcg/cris/check_orr.s +++ b/tests/tcg/cris/bare/check_orr.s diff --git a/tests/tcg/cris/check_ret.s b/tests/tcg/cris/bare/check_ret.s index b44fb25933..b44fb25933 100644 --- a/tests/tcg/cris/check_ret.s +++ b/tests/tcg/cris/bare/check_ret.s diff --git a/tests/tcg/cris/check_scc.s b/tests/tcg/cris/bare/check_scc.s index 4a8674cc1a..4a8674cc1a 100644 --- a/tests/tcg/cris/check_scc.s +++ b/tests/tcg/cris/bare/check_scc.s diff --git a/tests/tcg/cris/check_subc.s b/tests/tcg/cris/bare/check_subc.s index e34b5448e2..e34b5448e2 100644 --- a/tests/tcg/cris/check_subc.s +++ b/tests/tcg/cris/bare/check_subc.s diff --git a/tests/tcg/cris/check_subm.s b/tests/tcg/cris/bare/check_subm.s index e07ea02dd4..e07ea02dd4 100644 --- a/tests/tcg/cris/check_subm.s +++ b/tests/tcg/cris/bare/check_subm.s diff --git a/tests/tcg/cris/check_subq.s b/tests/tcg/cris/bare/check_subq.s index 9e34fa31ab..9e34fa31ab 100644 --- a/tests/tcg/cris/check_subq.s +++ b/tests/tcg/cris/bare/check_subq.s diff --git a/tests/tcg/cris/check_subr.s b/tests/tcg/cris/bare/check_subr.s index 742fbc8915..742fbc8915 100644 --- a/tests/tcg/cris/check_subr.s +++ b/tests/tcg/cris/bare/check_subr.s diff --git a/tests/tcg/cris/check_xarith.s b/tests/tcg/cris/bare/check_xarith.s index 80038b2ab9..80038b2ab9 100644 --- a/tests/tcg/cris/check_xarith.s +++ b/tests/tcg/cris/bare/check_xarith.s diff --git a/tests/tcg/cris/crt.s b/tests/tcg/cris/bare/crt.s index af027d7475..af027d7475 100644 --- a/tests/tcg/cris/crt.s +++ b/tests/tcg/cris/bare/crt.s diff --git a/tests/tcg/cris/bare/sys.c b/tests/tcg/cris/bare/sys.c new file mode 100644 index 0000000000..1644eecc33 --- /dev/null +++ b/tests/tcg/cris/bare/sys.c @@ -0,0 +1,63 @@ +/* + * Helper functions for CRIS system tests + * + * There is no libc and only a limited set of headers. + */ + +#include <stddef.h> + +void exit(int status) +{ + register unsigned int callno asm ("r9") = 1; /* NR_exit */ + + asm volatile ("break 13\n" + : /* no outputs */ + : "r" (callno) + : "memory"); + while (1) { + /* do nothing */ + }; +} + +size_t write(int fd, const void *buf, size_t count) +{ + register unsigned int callno asm ("r9") = 4; /* NR_write */ + register unsigned int r10 asm ("r10") = fd; + register const void *r11 asm ("r11") = buf; + register size_t r12 asm ("r12") = count; + register unsigned int r asm ("r10"); + + asm volatile ("break 13\n" + : "=r" (r) + : "r" (callno), "0" (r10), "r" (r11), "r" (r12) + : "memory"); + + return r; +} + +static inline int mystrlen(char *s) +{ + int i = 0; + while (s[i]) { + i++; + } + return i; +} + + +void pass(void) +{ + char s[] = "passed.\n"; + write(1, s, sizeof(s) - 1); + exit(0); +} + +void _fail(char *reason) +{ + char s[] = "\nfailed: "; + int len = mystrlen(reason); + write(1, s, sizeof(s) - 1); + write(1, reason, len); + write(1, "\n", 1); + exit(1); +} diff --git a/tests/tcg/cris/testutils.inc b/tests/tcg/cris/bare/testutils.inc index aa1641b2e6..aa1641b2e6 100644 --- a/tests/tcg/cris/testutils.inc +++ b/tests/tcg/cris/bare/testutils.inc diff --git a/tests/tcg/cris/check_abs.c b/tests/tcg/cris/libc/check_abs.c index 08b67b6ef0..08b67b6ef0 100644 --- a/tests/tcg/cris/check_abs.c +++ b/tests/tcg/cris/libc/check_abs.c diff --git a/tests/tcg/cris/check_addc.c b/tests/tcg/cris/libc/check_addc.c index fc3fb1faa8..fc3fb1faa8 100644 --- a/tests/tcg/cris/check_addc.c +++ b/tests/tcg/cris/libc/check_addc.c diff --git a/tests/tcg/cris/check_addcm.c b/tests/tcg/cris/libc/check_addcm.c index b355ba164f..b355ba164f 100644 --- a/tests/tcg/cris/check_addcm.c +++ b/tests/tcg/cris/libc/check_addcm.c diff --git a/tests/tcg/cris/check_addo.c b/tests/tcg/cris/libc/check_addo.c index 4235e5fc65..4235e5fc65 100644 --- a/tests/tcg/cris/check_addo.c +++ b/tests/tcg/cris/libc/check_addo.c diff --git a/tests/tcg/cris/check_addoq.c b/tests/tcg/cris/libc/check_addoq.c index ed509e27e0..ed509e27e0 100644 --- a/tests/tcg/cris/check_addoq.c +++ b/tests/tcg/cris/libc/check_addoq.c diff --git a/tests/tcg/cris/check_bound.c b/tests/tcg/cris/libc/check_bound.c index d956ab9ade..d956ab9ade 100644 --- a/tests/tcg/cris/check_bound.c +++ b/tests/tcg/cris/libc/check_bound.c diff --git a/tests/tcg/cris/check_ftag.c b/tests/tcg/cris/libc/check_ftag.c index aaa5c97115..aaa5c97115 100644 --- a/tests/tcg/cris/check_ftag.c +++ b/tests/tcg/cris/libc/check_ftag.c diff --git a/tests/tcg/cris/check_gcctorture_pr28634-1.c b/tests/tcg/cris/libc/check_gcctorture_pr28634-1.c index 45ecd159b3..45ecd159b3 100644 --- a/tests/tcg/cris/check_gcctorture_pr28634-1.c +++ b/tests/tcg/cris/libc/check_gcctorture_pr28634-1.c diff --git a/tests/tcg/cris/check_gcctorture_pr28634.c b/tests/tcg/cris/libc/check_gcctorture_pr28634.c index a0c525497d..a0c525497d 100644 --- a/tests/tcg/cris/check_gcctorture_pr28634.c +++ b/tests/tcg/cris/libc/check_gcctorture_pr28634.c diff --git a/tests/tcg/cris/check_glibc_kernelversion.c b/tests/tcg/cris/libc/check_glibc_kernelversion.c index 7aada89911..7aada89911 100644 --- a/tests/tcg/cris/check_glibc_kernelversion.c +++ b/tests/tcg/cris/libc/check_glibc_kernelversion.c diff --git a/tests/tcg/cris/check_hello.c b/tests/tcg/cris/libc/check_hello.c index fb403ba996..fb403ba996 100644 --- a/tests/tcg/cris/check_hello.c +++ b/tests/tcg/cris/libc/check_hello.c diff --git a/tests/tcg/cris/check_int64.c b/tests/tcg/cris/libc/check_int64.c index 69caec1bb2..69caec1bb2 100644 --- a/tests/tcg/cris/check_int64.c +++ b/tests/tcg/cris/libc/check_int64.c diff --git a/tests/tcg/cris/check_lz.c b/tests/tcg/cris/libc/check_lz.c index bf051a6b55..bf051a6b55 100644 --- a/tests/tcg/cris/check_lz.c +++ b/tests/tcg/cris/libc/check_lz.c diff --git a/tests/tcg/cris/check_mapbrk.c b/tests/tcg/cris/libc/check_mapbrk.c index 1aff7622bc..1aff7622bc 100644 --- a/tests/tcg/cris/check_mapbrk.c +++ b/tests/tcg/cris/libc/check_mapbrk.c diff --git a/tests/tcg/cris/check_mmap1.c b/tests/tcg/cris/libc/check_mmap1.c index b803f0c431..b803f0c431 100644 --- a/tests/tcg/cris/check_mmap1.c +++ b/tests/tcg/cris/libc/check_mmap1.c diff --git a/tests/tcg/cris/check_mmap2.c b/tests/tcg/cris/libc/check_mmap2.c index 35139a0ed9..35139a0ed9 100644 --- a/tests/tcg/cris/check_mmap2.c +++ b/tests/tcg/cris/libc/check_mmap2.c diff --git a/tests/tcg/cris/check_mmap3.c b/tests/tcg/cris/libc/check_mmap3.c index cb890ef120..cb890ef120 100644 --- a/tests/tcg/cris/check_mmap3.c +++ b/tests/tcg/cris/libc/check_mmap3.c diff --git a/tests/tcg/cris/check_moveq.c b/tests/tcg/cris/libc/check_moveq.c index 80f2dff6ab..80f2dff6ab 100644 --- a/tests/tcg/cris/check_moveq.c +++ b/tests/tcg/cris/libc/check_moveq.c diff --git a/tests/tcg/cris/check_openpf1.c b/tests/tcg/cris/libc/check_openpf1.c index 251d26eec2..251d26eec2 100644 --- a/tests/tcg/cris/check_openpf1.c +++ b/tests/tcg/cris/libc/check_openpf1.c diff --git a/tests/tcg/cris/check_openpf2.c b/tests/tcg/cris/libc/check_openpf2.c index 5d56189f8e..5d56189f8e 100644 --- a/tests/tcg/cris/check_openpf2.c +++ b/tests/tcg/cris/libc/check_openpf2.c diff --git a/tests/tcg/cris/check_openpf3.c b/tests/tcg/cris/libc/check_openpf3.c index 557adee92d..557adee92d 100644 --- a/tests/tcg/cris/check_openpf3.c +++ b/tests/tcg/cris/libc/check_openpf3.c diff --git a/tests/tcg/cris/check_openpf5.c b/tests/tcg/cris/libc/check_openpf5.c index 1f86ea283d..1f86ea283d 100644 --- a/tests/tcg/cris/check_openpf5.c +++ b/tests/tcg/cris/libc/check_openpf5.c diff --git a/tests/tcg/cris/check_settls1.c b/tests/tcg/cris/libc/check_settls1.c index 3abc3a9ea8..3abc3a9ea8 100644 --- a/tests/tcg/cris/check_settls1.c +++ b/tests/tcg/cris/libc/check_settls1.c diff --git a/tests/tcg/cris/check_sigalrm.c b/tests/tcg/cris/libc/check_sigalrm.c index 39fa8d9bac..39fa8d9bac 100644 --- a/tests/tcg/cris/check_sigalrm.c +++ b/tests/tcg/cris/libc/check_sigalrm.c diff --git a/tests/tcg/cris/check_stat1.c b/tests/tcg/cris/libc/check_stat1.c index 2e2cae51df..2e2cae51df 100644 --- a/tests/tcg/cris/check_stat1.c +++ b/tests/tcg/cris/libc/check_stat1.c diff --git a/tests/tcg/cris/check_stat2.c b/tests/tcg/cris/libc/check_stat2.c index e36172ed25..e36172ed25 100644 --- a/tests/tcg/cris/check_stat2.c +++ b/tests/tcg/cris/libc/check_stat2.c diff --git a/tests/tcg/cris/check_stat3.c b/tests/tcg/cris/libc/check_stat3.c index 36a9d5d274..36a9d5d274 100644 --- a/tests/tcg/cris/check_stat3.c +++ b/tests/tcg/cris/libc/check_stat3.c diff --git a/tests/tcg/cris/check_stat4.c b/tests/tcg/cris/libc/check_stat4.c index 04f21fe7c4..04f21fe7c4 100644 --- a/tests/tcg/cris/check_stat4.c +++ b/tests/tcg/cris/libc/check_stat4.c diff --git a/tests/tcg/cris/check_swap.c b/tests/tcg/cris/libc/check_swap.c index 9a68c1e5d7..9a68c1e5d7 100644 --- a/tests/tcg/cris/check_swap.c +++ b/tests/tcg/cris/libc/check_swap.c diff --git a/tests/tcg/cris/check_time2.c b/tests/tcg/cris/libc/check_time2.c index 20b69b4f60..20b69b4f60 100644 --- a/tests/tcg/cris/check_time2.c +++ b/tests/tcg/cris/libc/check_time2.c diff --git a/tests/tcg/cris/crisutils.h b/tests/tcg/cris/libc/crisutils.h index bbbe6c5540..bbbe6c5540 100644 --- a/tests/tcg/cris/crisutils.h +++ b/tests/tcg/cris/libc/crisutils.h diff --git a/tests/tcg/cris/sys.h b/tests/tcg/cris/libc/sys.h index 3dd47bb673..3dd47bb673 100644 --- a/tests/tcg/cris/sys.h +++ b/tests/tcg/cris/libc/sys.h diff --git a/tests/tcg/cris/sys.c b/tests/tcg/cris/sys.c deleted file mode 100644 index 21f08c0747..0000000000 --- a/tests/tcg/cris/sys.c +++ /dev/null @@ -1,59 +0,0 @@ -#include <stdio.h> -#include <stdlib.h> -#include <unistd.h> - -static inline int mystrlen(char *s) { - int i = 0; - while (s[i]) - i++; - return i; -} - -void pass(void) { - char s[] = "passed.\n"; - write (1, s, sizeof (s) - 1); - exit (0); -} - -void _fail(char *reason) { - char s[] = "\nfailed: "; - int len = mystrlen(reason); - write (1, s, sizeof (s) - 1); - write (1, reason, len); - write (1, "\n", 1); -// exit (1); -} - -void *memset (void *s, int c, size_t n) { - char *p = s; - int i; - for (i = 0; i < n; i++) - p[i] = c; - return p; -} - -void exit (int status) { - register unsigned int callno asm ("r9") = 1; /* NR_exit */ - - asm volatile ("break 13\n" - : - : "r" (callno) - : "memory" ); - while(1) - ; -} - -ssize_t write (int fd, const void *buf, size_t count) { - register unsigned int callno asm ("r9") = 4; /* NR_write */ - register unsigned int r10 asm ("r10") = fd; - register const void *r11 asm ("r11") = buf; - register size_t r12 asm ("r12") = count; - register unsigned int r asm ("r10"); - - asm volatile ("break 13\n" - : "=r" (r) - : "r" (callno), "0" (r10), "r" (r11), "r" (r12) - : "memory"); - - return r; -} diff --git a/tests/tcg/i386/Makefile.softmmu-target b/tests/tcg/i386/Makefile.softmmu-target new file mode 100644 index 0000000000..53c9c5ece0 --- /dev/null +++ b/tests/tcg/i386/Makefile.softmmu-target @@ -0,0 +1,46 @@ +# +# x86 system tests +# +# This currently builds only for i386. The common C code is built +# with standard compiler flags however so we can support both by +# adding additional boot files for x86_64. +# + +I386_SYSTEM_SRC=$(SRC_PATH)/tests/tcg/i386/system +X64_SYSTEM_SRC=$(SRC_PATH)/tests/tcg/x86_64/system +# Set search path for all sources +VPATH+=$(I386_SYSTEM_SRC) + +# These objects provide the basic boot code and helper functions for all tests +CRT_OBJS=boot.o + +X86_TEST_SRCS=$(wildcard $(I386_SYSTEM_SRC)/*.c) +X86_TESTS = $(patsubst $(I386_SYSTEM_SRC)/%.c, %, $(X86_TEST_SRCS)) + +ifeq ($(TARGET_X86_64), y) +CRT_PATH=$(X64_SYSTEM_SRC) +LINK_SCRIPT=$(X64_SYSTEM_SRC)/kernel.ld +LDFLAGS=-Wl,-T$(LINK_SCRIPT) -Wl,-melf_x86_64 +else +CRT_PATH=$(I386_SYSTEM_SRC) +CFLAGS+=-m32 +LINK_SCRIPT=$(I386_SYSTEM_SRC)/kernel.ld +LDFLAGS=-Wl,-T$(LINK_SCRIPT) -Wl,-melf_i386 +# FIXME: move to common once x86_64 is bootstrapped +TESTS+=$(X86_TESTS) +endif +CFLAGS+=-nostdlib -ggdb -O0 $(MINILIB_INC) +LDFLAGS+=-static -nostdlib $(CRT_OBJS) $(MINILIB_OBJS) -lgcc + +# building head blobs +.PRECIOUS: $(CRT_OBJS) + +%.o: $(CRT_PATH)/%.S + $(CC) $(CFLAGS) -c $< -o $@ + +# Build and link the tests +%: %.c $(LINK_SCRIPT) $(CRT_OBJS) $(MINILIB_OBJS) + $(CC) $(CFLAGS) $< -o $@ $(LDFLAGS) + +# Running +QEMU_OPTS+=-device isa-debugcon,chardev=output -device isa-debug-exit,iobase=0xf4,iosize=0x4 -kernel diff --git a/tests/tcg/i386/system/boot.S b/tests/tcg/i386/system/boot.S new file mode 100644 index 0000000000..90aa174908 --- /dev/null +++ b/tests/tcg/i386/system/boot.S @@ -0,0 +1,172 @@ +/* + * i386 boot code, based on qemu-bmibug. + * + * Copyright 2019 Doug Gale + * Copyright 2019 Linaro + * + * This work is licensed under the terms of the GNU GPL, version 3 or later. + * See the COPYING file in the top-level directory. + * + * SPDX-License-Identifier: GPL-3.0-or-later + */ + + .section .head + + /* Multi-boot header */ +multiboot_st: + .int 0x1BADB002 + .int 0x10000 + .int -(0x10000+0x1BADB002) + // Load address + .int __load_st + .int __load_st + .int __load_en + .int __bss_en + .int _start + // mode + .int 0 + // width + .int 0 + // height + .int 0 + // depth + .int 0 + + .code32 + .section .text + + /* Kernel Entry Point */ +.global _start +_start: + // Setup stack ASAP + mov $stack_end,%esp + + // Load GDT ASAP + lgdt gdtr + ljmp $0x8,$.Lloadcs +.Lloadcs: + mov $0x10,%eax + mov %eax,%ds + mov %eax,%es + mov %eax,%fs + mov %eax,%gs + mov %eax,%ss + + // Fixup the IDT to the ridiculous i386 layout + xor %ebx,%ebx +.Lnextidt: + mov idt_00(,%ebx,8),%eax + shr $16,%eax + movw $0x8,idt_00+2(,%ebx,8) + movw $0x8E00,idt_00+4(,%ebx,8) + movw %ax,idt_00+6(,%ebx,8) + add $1,%ebx + cmp $32,%ebx + jl .Lnextidt + + // Load IDTR + push $idt_00 + push $((32 * 8 - 1) << 16) + lidt 2(%esp) + add $8,%esp + + /* + * Don't worry about stack frame, assume everthing + * is garbage when we return, we won't need it. + */ + call main + + /* output any non-zero result in eax to isa-debug-exit device */ + test %al, %al + jz 1f + out %ax, $0xf4 + +1: /* QEMU ACPI poweroff */ + mov $0x604,%edx + mov $0x2000,%eax + out %ax,%dx + hlt + jmp 1b + + /* + * Helper Functions + */ + + /* Output a single character to serial port */ + .global __sys_outc +__sys_outc: + pushl %ebp + movl %esp, %ebp + out %al,$0xE9 + movl %ebp, %esp + popl %ebp + ret + + + /* Interrupt Descriptor Table */ + + .section .data + .align 16 + +idt_00: .int 0, 0 +idt_01: .int 0, 0 +idt_02: .int 0, 0 +idt_03: .int 0, 0 +idt_04: .int 0, 0 +idt_05: .int 0, 0 +idt_06: .int 0, 0 /* intr_6_opcode, Invalid Opcode */ +idt_07: .int 0, 0 +idt_08: .int 0, 0 +idt_09: .int 0, 0 +idt_0A: .int 0, 0 +idt_0B: .int 0, 0 +idt_0C: .int 0, 0 +idt_0D: .int 0, 0 +idt_0E: .int 0, 0 +idt_0F: .int 0, 0 +idt_10: .int 0, 0 +idt_11: .int 0, 0 +idt_12: .int 0, 0 +idt_13: .int 0, 0 +idt_14: .int 0, 0 +idt_15: .int 0, 0 +idt_16: .int 0, 0 +idt_17: .int 0, 0 +idt_18: .int 0, 0 +idt_19: .int 0, 0 +idt_1A: .int 0, 0 +idt_1B: .int 0, 0 +idt_1C: .int 0, 0 +idt_1D: .int 0, 0 +idt_1E: .int 0, 0 +idt_1F: .int 0, 0 + +gdt: + .short 0 +gdtr: + .short gdt_en - gdt - 1 + .int gdt + + // Code + .short 0xFFFF + .short 0 + .byte 0 + .byte 0x9b + .byte 0xCF + .byte 0 + + // Data + .short 0xFFFF + .short 0 + .byte 0 + .byte 0x93 + .byte 0xCF + .byte 0 + +gdt_en: + + .section .bss + .align 16 + +stack: .space 65536 +stack_end: diff --git a/tests/tcg/i386/system/hello.c b/tests/tcg/i386/system/hello.c new file mode 100644 index 0000000000..821dc0ef09 --- /dev/null +++ b/tests/tcg/i386/system/hello.c @@ -0,0 +1,14 @@ +/* + * Hello World, system test version + * + * We don't have the benefit of libc, just builtin C primitives and + * whatever is in minilib. + */ + +#include <minilib.h> + +int main(void) +{ + ml_printf("Hello World\n"); + return 0; +} diff --git a/tests/tcg/i386/system/kernel.ld b/tests/tcg/i386/system/kernel.ld new file mode 100644 index 0000000000..92de525e93 --- /dev/null +++ b/tests/tcg/i386/system/kernel.ld @@ -0,0 +1,23 @@ +SECTIONS { + . = 0x100000; + + .text : { + __load_st = .; + *(.head) + *(.text) + } + + .rodata : { + *(.rodata) + } + + .data : { + *(.data) + __load_en = .; + } + + .bss : { + *(.bss) + __bss_en = .; + } +} diff --git a/tests/tcg/i386/system/memory.c b/tests/tcg/i386/system/memory.c new file mode 100644 index 0000000000..a7a0a8e978 --- /dev/null +++ b/tests/tcg/i386/system/memory.c @@ -0,0 +1,243 @@ +/* + * Memory Test + * + * This is intended to test the softmmu code and ensure we properly + * behave across normal and unaligned accesses across several pages. + * We are not replicating memory tests for stuck bits and other + * hardware level failures but looking for issues with different size + * accesses when: + + * + */ + +#include <inttypes.h> +#include <minilib.h> + +#define TEST_SIZE (4096 * 4) /* 4 pages */ + +static uint8_t test_data[TEST_SIZE]; + +static void pdot(int count) +{ + if (count % 128 == 0) { + ml_printf("."); + } +} + + +/* + * Fill the data with ascending value bytes. As x86 is a LE machine we + * write in ascending order and then read and high byte should either + * be zero or higher than the lower bytes. + */ + +static void init_test_data_u8(void) +{ + uint8_t count = 0, *ptr = &test_data[0]; + int i; + + ml_printf("Filling test area with u8:"); + for (i = 0; i < TEST_SIZE; i++) { + *ptr++ = count++; + pdot(i); + } + ml_printf("done\n"); +} + +static void init_test_data_u16(int offset) +{ + uint8_t count = 0; + uint16_t word, *ptr = (uint16_t *) &test_data[0]; + const int max = (TEST_SIZE - offset) / sizeof(word); + int i; + + ml_printf("Filling test area with u16 (offset %d):", offset); + + /* Leading zeros */ + for (i = 0; i < offset; i++) { + *ptr = 0; + } + + ptr = (uint16_t *) &test_data[offset]; + for (i = 0; i < max; i++) { + uint8_t high, low; + low = count++; + high = count++; + word = (high << 8) | low; + *ptr++ = word; + pdot(i); + } + ml_printf("done\n"); +} + +static void init_test_data_u32(int offset) +{ + uint8_t count = 0; + uint32_t word, *ptr = (uint32_t *) &test_data[0]; + const int max = (TEST_SIZE - offset) / sizeof(word); + int i; + + ml_printf("Filling test area with u32 (offset %d):", offset); + + /* Leading zeros */ + for (i = 0; i < offset; i++) { + *ptr = 0; + } + + ptr = (uint32_t *) &test_data[offset]; + for (i = 0; i < max; i++) { + uint8_t b1, b2, b3, b4; + b4 = count++; + b3 = count++; + b2 = count++; + b1 = count++; + word = (b1 << 24) | (b2 << 16) | (b3 << 8) | b4; + *ptr++ = word; + pdot(i); + } + ml_printf("done\n"); +} + + +static int read_test_data_u16(int offset) +{ + uint16_t word, *ptr = (uint16_t *)&test_data[offset]; + int i; + const int max = (TEST_SIZE - offset) / sizeof(word); + + ml_printf("Reading u16 from %#lx (offset %d):", ptr, offset); + + for (i = 0; i < max; i++) { + uint8_t high, low; + word = *ptr++; + high = (word >> 8) & 0xff; + low = word & 0xff; + if (high < low && high != 0) { + ml_printf("Error %d < %d\n", high, low); + return 1; + } else { + pdot(i); + } + + } + ml_printf("done\n"); + return 0; +} + +static int read_test_data_u32(int offset) +{ + uint32_t word, *ptr = (uint32_t *)&test_data[offset]; + int i; + const int max = (TEST_SIZE - offset) / sizeof(word); + + ml_printf("Reading u32 from %#lx (offset %d):", ptr, offset); + + for (i = 0; i < max; i++) { + uint8_t b1, b2, b3, b4; + word = *ptr++; + + b1 = word >> 24 & 0xff; + b2 = word >> 16 & 0xff; + b3 = word >> 8 & 0xff; + b4 = word & 0xff; + + if ((b1 < b2 && b1 != 0) || + (b2 < b3 && b2 != 0) || + (b3 < b4 && b3 != 0)) { + ml_printf("Error %d, %d, %d, %d", b1, b2, b3, b4); + return 2; + } else { + pdot(i); + } + } + ml_printf("done\n"); + return 0; +} + +static int read_test_data_u64(int offset) +{ + uint64_t word, *ptr = (uint64_t *)&test_data[offset]; + int i; + const int max = (TEST_SIZE - offset) / sizeof(word); + + ml_printf("Reading u64 from %#lx (offset %d):", ptr, offset); + + for (i = 0; i < max; i++) { + uint8_t b1, b2, b3, b4, b5, b6, b7, b8; + word = *ptr++; + + b1 = ((uint64_t) (word >> 56)) & 0xff; + b2 = ((uint64_t) (word >> 48)) & 0xff; + b3 = ((uint64_t) (word >> 40)) & 0xff; + b4 = (word >> 32) & 0xff; + b5 = (word >> 24) & 0xff; + b6 = (word >> 16) & 0xff; + b7 = (word >> 8) & 0xff; + b8 = (word >> 0) & 0xff; + + if ((b1 < b2 && b1 != 0) || + (b2 < b3 && b2 != 0) || + (b3 < b4 && b3 != 0) || + (b4 < b5 && b4 != 0) || + (b5 < b6 && b5 != 0) || + (b6 < b7 && b6 != 0) || + (b7 < b8 && b7 != 0)) { + ml_printf("Error %d, %d, %d, %d, %d, %d, %d, %d", + b1, b2, b3, b4, b5, b6, b7, b8); + return 2; + } else { + pdot(i); + } + } + ml_printf("done\n"); + return 0; +} + +/* Read the test data and verify at various offsets */ +int do_reads(void) +{ + int r = 0; + int off = 0; + + while (r == 0 && off < 8) { + r = read_test_data_u16(off); + r |= read_test_data_u32(off); + r |= read_test_data_u64(off); + off++; + } + + return r; +} + +int main(void) +{ + int i, r = 0; + + + init_test_data_u8(); + r = do_reads(); + if (r) { + return r; + } + + for (i = 0; i < 8; i++) { + init_test_data_u16(i); + + r = do_reads(); + if (r) { + return r; + } + } + + for (i = 0; i < 8; i++) { + init_test_data_u32(i); + + r = do_reads(); + if (r) { + return r; + } + } + + ml_printf("Test complete: %s\n", r == 0 ? "PASSED" : "FAILED"); + return r; +} diff --git a/tests/tcg/minilib/Makefile.target b/tests/tcg/minilib/Makefile.target new file mode 100644 index 0000000000..3ed8077d0f --- /dev/null +++ b/tests/tcg/minilib/Makefile.target @@ -0,0 +1,21 @@ +# +# System test minilib objects +# +# The system tests are very constrained in terms of the library they +# support but we are not savages. We provide a few helpful routines +# that can be shared with the tests for basic I/O. +# +# They assume each arch has provided a putc function. +# + +SYSTEM_MINILIB_SRC=$(SRC_PATH)/tests/tcg/minilib +MINILIB_SRCS=$(wildcard $(SYSTEM_MINILIB_SRC)/*.c) +MINILIB_OBJS=$(patsubst $(SYSTEM_MINILIB_SRC)/%.c, %.o, $(MINILIB_SRCS)) + +MINILIB_CFLAGS+=-nostdlib -ggdb -O0 +MINILIB_INC=-isystem $(SYSTEM_MINILIB_SRC) + +.PRECIOUS: $(MINILIB_OBJS) + +%.o: $(SYSTEM_MINILIB_SRC)/%.c + $(CC) $(CFLAGS) -c $< -o $@ diff --git a/tests/tcg/minilib/minilib.h b/tests/tcg/minilib/minilib.h new file mode 100644 index 0000000000..e23361380a --- /dev/null +++ b/tests/tcg/minilib/minilib.h @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2015 Virtual Open Systems SAS + * Author: Alexander Spyridakis <a.spyridakis@virtualopensystems.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * SPDX-License-Identifier: GPL-2.0-only + */ + +#ifndef _MINILIB_H_ +#define _MINILIB_H_ + +/* + * Provided by the individual arch + */ +extern void __sys_outc(char c); + +/* + * Provided by the common minilib + */ +void ml_printf(const char *fmt, ...); + +#endif /* _MINILIB_H_ */ diff --git a/tests/tcg/minilib/printf.c b/tests/tcg/minilib/printf.c new file mode 100644 index 0000000000..121620cb16 --- /dev/null +++ b/tests/tcg/minilib/printf.c @@ -0,0 +1,133 @@ +/* + * Copyright (C) 2015 Virtual Open Systems SAS + * Author: Alexander Spyridakis <a.spyridakis@virtualopensystems.com> + * + * printf based on implementation by Kevin Wolf <kwolf@redhat.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * SPDX-License-Identifier: GPL-2.0-only + */ + +#include "minilib.h" + +typedef __builtin_va_list va_list; +#define va_start(ap, X) __builtin_va_start(ap, X) +#define va_arg(ap, type) __builtin_va_arg(ap, type) +#define va_end(ap) __builtin_va_end(ap) + +static void print_str(char *s) +{ + while (*s) { + __sys_outc(*s++); + } +} + +static void print_num(unsigned long long value, int base) +{ + char digits[] = "0123456789abcdef"; + char buf[32]; + int i = sizeof(buf) - 2, j; + + /* Set the buffer to 0. See problem of before. */ + for (j = 0; j < 32; j++) { + buf[j] = 0; + } + + do { + buf[i--] = digits[value % base]; + value /= base; + } while (value); + + print_str(&buf[i + 1]); +} + +void ml_printf(const char *fmt, ...) +{ + va_list ap; + char *str; + int base; + int has_long; + int alt_form; + unsigned long long val; + + va_start(ap, fmt); + + for (; *fmt; fmt++) { + if (*fmt != '%') { + __sys_outc(*fmt); + continue; + } + fmt++; + + if (*fmt == '#') { + fmt++; + alt_form = 1; + } else { + alt_form = 0; + } + + if (*fmt == 'l') { + fmt++; + if (*fmt == 'l') { + fmt++; + has_long = 2; + } else { + has_long = 1; + } + } else { + has_long = 0; + } + + switch (*fmt) { + case 'x': + case 'p': + base = 16; + goto convert_number; + case 'd': + case 'i': + case 'u': + base = 10; + goto convert_number; + case 'o': + base = 8; + goto convert_number; + + convert_number: + switch (has_long) { + case 0: + val = va_arg(ap, unsigned int); + break; + case 1: + val = va_arg(ap, unsigned long); + break; + case 2: + val = va_arg(ap, unsigned long long); + break; + } + + if (alt_form && base == 16) { + print_str("0x"); + } + + print_num(val, base); + break; + + case 's': + str = va_arg(ap, char*); + print_str(str); + break; + case '%': + __sys_outc(*fmt); + break; + default: + __sys_outc('%'); + __sys_outc(*fmt); + break; + } + } + + va_end(ap); +} diff --git a/tests/tcg/mips/Makefile.target b/tests/tcg/mips/Makefile.target index 086625f533..1a994d5525 100644 --- a/tests/tcg/mips/Makefile.target +++ b/tests/tcg/mips/Makefile.target @@ -8,15 +8,12 @@ MIPS_SRC=$(SRC_PATH)/tests/tcg/mips # Set search path for all sources VPATH += $(MIPS_SRC) +# hello-mips is 32 bit only +ifeq ($(findstring 64,$(TARGET_NAME)),) MIPS_TESTS=hello-mips TESTS += $(MIPS_TESTS) -hello-mips: CFLAGS+=-ffreestanding +hello-mips: CFLAGS+=-mno-abicalls -fno-PIC -mabi=32 hello-mips: LDFLAGS+=-nostdlib - -# For MIPS32 and 64 we have a bunch of extra tests in sub-directories -# however they are intended for system tests. - -run-hello-mips: hello-mips - $(call skip-test, $<, "BROKEN") +endif diff --git a/tests/tcg/mips/hello-mips.c b/tests/tcg/mips/hello-mips.c index c7052fdf2e..4e1cf501af 100644 --- a/tests/tcg/mips/hello-mips.c +++ b/tests/tcg/mips/hello-mips.c @@ -60,5 +60,5 @@ static inline int write(int fd, const char *buf, int len) void __start(void) { write (1, "Hello, World!\n", 14); - exit1 (42); + exit1(0); } diff --git a/tests/tcg/xtensa/Makefile b/tests/tcg/xtensa/Makefile deleted file mode 100644 index 2bd4491769..0000000000 --- a/tests/tcg/xtensa/Makefile +++ /dev/null @@ -1,102 +0,0 @@ --include ../../../config-host.mak - -CORE=dc232b -CROSS=xtensa-$(CORE)-elf- - -ifndef XT -SIM = ../../../xtensa-softmmu/qemu-system-xtensa -SIMFLAGS = -M sim -cpu $(CORE) -nographic -semihosting -icount 6 $(EXTFLAGS) -kernel -SIMDEBUG = -s -S -else -SIM = xt-run -SIMFLAGS = --xtensa-core=DC_B_232L --exit_with_target_code $(EXTFLAGS) -SIMDEBUG = --gdbserve=0 -endif - -HOST_CC = gcc -CC = $(CROSS)gcc -AS = $(CROSS)gcc -x assembler-with-cpp -LD = $(CROSS)ld - -ASFLAGS = -Wa,--no-absolute-literals -vectors_ASFLAGS = -mtext-section-literals - -XTENSA_SRC_PATH = $(SRC_PATH)/tests/tcg/xtensa -INCLUDE_DIRS = $(XTENSA_SRC_PATH) $(SRC_PATH)/target/xtensa/core-$(CORE) -XTENSA_INC = $(addprefix -I,$(INCLUDE_DIRS)) - -LDFLAGS = -Tlinker.ld - -CRT = crt.o vectors.o - -TESTCASES += test_b.tst -TESTCASES += test_bi.tst -TESTCASES += test_boolean.tst -TESTCASES += test_break.tst -TESTCASES += test_bz.tst -TESTCASES += test_cache.tst -TESTCASES += test_clamps.tst -TESTCASES += test_extui.tst -TESTCASES += test_fail.tst -TESTCASES += test_flix.tst -TESTCASES += test_fp0_arith.tst -TESTCASES += test_fp0_conv.tst -TESTCASES += test_fp1.tst -TESTCASES += test_fp_cpenable.tst -TESTCASES += test_interrupt.tst -TESTCASES += test_loop.tst -TESTCASES += test_lsc.tst -TESTCASES += test_mac16.tst -TESTCASES += test_max.tst -TESTCASES += test_min.tst -TESTCASES += test_mmu.tst -TESTCASES += test_mul16.tst -TESTCASES += test_mul32.tst -TESTCASES += test_nsa.tst -TESTCASES += test_phys_mem.tst -ifdef XT -TESTCASES += test_pipeline.tst -endif -TESTCASES += test_quo.tst -TESTCASES += test_rem.tst -TESTCASES += test_rst0.tst -TESTCASES += test_s32c1i.tst -TESTCASES += test_sar.tst -TESTCASES += test_sext.tst -TESTCASES += test_shift.tst -TESTCASES += test_sr.tst -TESTCASES += test_timer.tst -TESTCASES += test_windowed.tst - -all: build - -linker.ld: $(XTENSA_SRC_PATH)/linker.ld.S - $(HOST_CC) $(XTENSA_INC) -E -P $< -o $@ - -%.o: $(XTENSA_SRC_PATH)/%.c - $(CC) $(XTENSA_INC) $(CFLAGS) -c $< -o $@ - -%.o: $(XTENSA_SRC_PATH)/%.S - $(CC) $(XTENSA_INC) $($*_ASFLAGS) $(ASFLAGS) -c $< -o $@ - -%.tst: %.o linker.ld $(XTENSA_SRC_PATH)/macros.inc $(CRT) Makefile - $(LD) $(LDFLAGS) $(NOSTDFLAGS) $(CRT) $< -o $@ - -build: $(TESTCASES) - -check: $(addprefix run-, $(TESTCASES)) - -run-%.tst: %.tst - $(SIM) $(SIMFLAGS) ./$< - -run-test_fail.tst: test_fail.tst - ! $(SIM) $(SIMFLAGS) ./$< - -debug-%.tst: %.tst - $(SIM) $(SIMDEBUG) $(SIMFLAGS) ./$< - -host-debug-%.tst: %.tst - gdb --args $(SIM) $(SIMFLAGS) ./$< - -clean: - $(RM) -fr $(TESTCASES) $(CRT) linker.ld diff --git a/tests/tcg/xtensa/Makefile.include b/tests/tcg/xtensa/Makefile.include new file mode 100644 index 0000000000..423c00a5d3 --- /dev/null +++ b/tests/tcg/xtensa/Makefile.include @@ -0,0 +1,11 @@ +# Makefile.include for xtensa targets +# +# The compilers can only be used for building system tests + +ifeq ($(CONFIG_SOFTMMU),y) +DOCKER_IMAGE=debian-xtensa-cross + +# default to the dc232b cpu +DOCKER_CROSS_COMPILER=/opt/2018.02/xtensa-dc232b-elf/bin/xtensa-dc232b-elf-gcc +DOCKER_CROSS_LINKER=/opt/2018.02/xtensa-dc232b-elf/bin/xtensa-dc232b-elf-ld +endif diff --git a/tests/tcg/xtensa/Makefile.softmmu-target b/tests/tcg/xtensa/Makefile.softmmu-target new file mode 100644 index 0000000000..8212d96b81 --- /dev/null +++ b/tests/tcg/xtensa/Makefile.softmmu-target @@ -0,0 +1,42 @@ +# +# Xtensa softmmu tests +# + +ifneq ($(TARGET_WORDS_BIGENDIAN),y) + +XTENSA_SRC = $(SRC_PATH)/tests/tcg/xtensa +XTENSA_ALL = $(filter-out $(XTENSA_SRC)/linker.ld.S,$(wildcard $(XTENSA_SRC)/*.S)) +XTENSA_TESTS = $(patsubst $(XTENSA_SRC)/%.S, %, $(XTENSA_ALL)) +# Filter out common blobs and broken tests +XTENSA_BROKEN_TESTS = crt vectors +XTENSA_USABLE_TESTS = $(filter-out $(XTENSA_BROKEN_TESTS), $(XTENSA_TESTS)) + +# add to the list of tests +TESTS += $(XTENSA_USABLE_TESTS) +VPATH += $(XTENSA_SRC) + +CORE=dc232b +QEMU_OPTS+=-M sim -cpu $(CORE) -nographic -semihosting -icount 6 $(EXTFLAGS) -kernel + +INCLUDE_DIRS = $(SRC_PATH)/target/xtensa/core-$(CORE) +XTENSA_INC = $(addprefix -I,$(INCLUDE_DIRS)) + +vectors_ASFLAGS = -mtext-section-literals +ASFLAGS = -Wa,--no-absolute-literals +LDFLAGS = -Tlinker.ld -nostartfiles -nostdlib + +CRT = crt.o vectors.o + +linker.ld: linker.ld.S + $(CC) $(XTENSA_INC) -E -P $< -o $@ + +$(XTENSA_USABLE_TESTS): linker.ld macros.inc $(CRT) Makefile.softmmu-target + +# special rule for common blobs +%.o: %.S + $(CC) $(XTENSA_INC) $($*_ASFLAGS) $(ASFLAGS) -c $< -o $@ + +%: %.S + $(CC) $(XTENSA_INC) $(ASFLAGS) $< -o $@ $(LDFLAGS) $(NOSTDFLAGS) $(CRT) + +endif diff --git a/tests/tcg/xtensa/test_fail.S b/tests/tcg/xtensa/test_fail.S deleted file mode 100644 index 1c26d50790..0000000000 --- a/tests/tcg/xtensa/test_fail.S +++ /dev/null @@ -1,9 +0,0 @@ -#include "macros.inc" - -test_suite fail - -test fail - test_fail -test_end - -test_suite_end diff --git a/tests/tcg/xtensa/test_flix.S b/tests/tcg/xtensa/test_flix.S index 7c259e7018..7af06b2b88 100644 --- a/tests/tcg/xtensa/test_flix.S +++ b/tests/tcg/xtensa/test_flix.S @@ -55,6 +55,23 @@ test sum .previous test_end +test rep_dependency + + { + movi a2, 1 + movi a3, 2 + nop + } + { + or a2, a3, a3 + or a3, a2, a2 + nop + } + assert eqi, a2, 2 + assert eqi, a3, 1 + +test_end + #endif test_suite_end diff --git a/tests/tcg/xtensa/test_pipeline.S b/tests/tcg/xtensa/test_pipeline.S deleted file mode 100644 index f418c11974..0000000000 --- a/tests/tcg/xtensa/test_pipeline.S +++ /dev/null @@ -1,157 +0,0 @@ -#include "macros.inc" - -.purgem test -.macro test name - movi a2, 1f - movi a3, 99f -0: - ipf a2, 0 - ipf a2, 4 - ipf a2, 8 - ipf a2, 12 - addi a2, a2, 16 - blt a2, a3, 0b - j 1f - .align 4 -1: -.endm - -test_suite pipeline - -test register_no_stall - rsr a3, ccount - add a5, a6, a6 - add a6, a5, a5 - rsr a4, ccount - sub a3, a4, a3 - assert eqi, a3, 3 -test_end - -test register_stall - l32i a5, a1, 0 /* data cache preload */ - nop - rsr a3, ccount - l32i a5, a1, 0 - add a6, a5, a5 /* M-to-E interlock */ - rsr a4, ccount - sub a3, a4, a3 - assert eqi, a3, 4 -test_end - -test j0_stall - rsr a3, ccount - j 1f /* E + 2-cycle penalty */ -1: - rsr a4, ccount /* E */ - sub a3, a4, a3 - assert eqi, a3, 4 -test_end - -test j1_stall - rsr a3, ccount - j 1f - nop -1: - rsr a4, ccount - sub a3, a4, a3 - assert eqi, a3, 4 -test_end - -test j5_stall - rsr a3, ccount - j 1f - nop - nop - nop - nop - nop -1: - rsr a4, ccount - sub a3, a4, a3 - assert eqi, a3, 4 -test_end - -test b_no_stall - movi a5, 1 - rsr a3, ccount - beqi a5, 2, 1f - rsr a4, ccount - sub a3, a4, a3 - assert eqi, a3, 2 -1: -test_end - -test b1_stall - movi a5, 1 - rsr a3, ccount - beqi a5, 1, 1f - nop -1: - rsr a4, ccount - sub a3, a4, a3 - assert eqi, a3, 4 -test_end - -test b5_stall - movi a5, 1 - rsr a3, ccount - beqi a5, 1, 1f - nop - nop - nop - nop - nop -1: - rsr a4, ccount - sub a3, a4, a3 - assert eqi, a3, 4 -test_end - -/* PS *SYNC */ - -test ps_dsync - rsr a5, ps - isync - rsr a3, ccount - wsr a5, ps - dsync - rsr a4, ccount - sub a3, a4, a3 - assert eqi, a3, 5 -test_end - -test ps_esync - rsr a5, ps - isync - rsr a3, ccount - wsr a5, ps - esync - rsr a4, ccount - sub a3, a4, a3 - assert eqi, a3, 5 -test_end - -test ps_rsync - rsr a5, ps - isync - rsr a3, ccount - wsr a5, ps - rsync - rsr a4, ccount - sub a3, a4, a3 - assert eqi, a3, 5 -test_end - -test ps_isync - rsr a5, ps - isync - rsr a3, ccount - wsr a5, ps - isync - rsr a4, ccount - sub a3, a4, a3 - movi a4, 9 - assert eq, a3, a4 -test_end - -test_suite_end diff --git a/tests/test-announce-self.c b/tests/test-announce-self.c deleted file mode 100644 index 1644d34a3f..0000000000 --- a/tests/test-announce-self.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * QTest testcase for qemu_announce_self - * - * Copyright (c) 2017 Red hat, Inc. - * Copyright (c) 2014 SUSE LINUX Products GmbH - * - * This work is licensed under the terms of the GNU GPL, version 2 or later. - * See the COPYING file in the top-level directory. - */ - -#include "qemu/osdep.h" -#include "libqtest.h" -#include "qapi/qmp/qdict.h" -#include "qemu-common.h" -#include "qemu/sockets.h" -#include "qemu/iov.h" -#include "libqos/libqos-pc.h" -#include "libqos/libqos-spapr.h" - -#ifndef ETH_P_RARP -#define ETH_P_RARP 0x8035 -#endif - -static QTestState *test_init(int socket) -{ - char *args; - - args = g_strdup_printf("-netdev socket,fd=%d,id=hs0 -device " - "virtio-net-pci,netdev=hs0", socket); - - return qtest_start(args); -} - - -static void test_announce(int socket) -{ - char buffer[60]; - int len; - QDict *rsp; - int ret; - uint16_t *proto = (uint16_t *)&buffer[12]; - - rsp = qmp("{ 'execute' : 'announce-self', " - " 'arguments': {" - " 'initial': 50, 'max': 550," - " 'rounds': 10, 'step': 50 } }"); - assert(!qdict_haskey(rsp, "error")); - qobject_unref(rsp); - - /* Catch the packet and make sure it's a RARP */ - ret = qemu_recv(socket, &len, sizeof(len), 0); - g_assert_cmpint(ret, ==, sizeof(len)); - len = ntohl(len); - - ret = qemu_recv(socket, buffer, len, 0); - g_assert_cmpint(*proto, ==, htons(ETH_P_RARP)); -} - -static void setup(gconstpointer data) -{ - QTestState *qs; - void (*func) (int socket) = data; - int sv[2], ret; - - ret = socketpair(PF_UNIX, SOCK_STREAM, 0, sv); - g_assert_cmpint(ret, !=, -1); - - qs = test_init(sv[1]); - func(sv[0]); - - /* End test */ - close(sv[0]); - qtest_quit(qs); -} - -int main(int argc, char **argv) -{ - g_test_init(&argc, &argv, NULL); - qtest_add_data_func("/virtio/net/test_announce_self", test_announce, setup); - - return g_test_run(); -} diff --git a/tests/test-bdrv-graph-mod.c b/tests/test-bdrv-graph-mod.c index 458dfa6661..283dc84869 100644 --- a/tests/test-bdrv-graph-mod.c +++ b/tests/test-bdrv-graph-mod.c @@ -114,6 +114,7 @@ static void test_update_perm_tree(void) bdrv_append(filter, bs, &local_err); g_assert_nonnull(local_err); + error_free(local_err); bdrv_unref(bs); blk_unref(root); diff --git a/tests/test-char.c b/tests/test-char.c index de328380c1..95ccfd3cdb 100644 --- a/tests/test-char.c +++ b/tests/test-char.c @@ -745,7 +745,7 @@ static void char_socket_server_test(gconstpointer opaque) Visitor *v; QemuThread thread; int ret; - bool reconnected; + bool reconnected = false; char *optstr; QemuOpts *opts; diff --git a/tests/test-hmp.c b/tests/test-hmp.c index 8c49d2fdf1..e344947f7c 100644 --- a/tests/test-hmp.c +++ b/tests/test-hmp.c @@ -31,6 +31,7 @@ static const char *hmp_cmds[] = { "cpu 0", "device_add ?", "device_add usb-mouse,id=mouse1", + "drive_add ignored format=help", "mouse_button 7", "mouse_move 10 10", "mouse_button 0", @@ -38,6 +39,7 @@ static const char *hmp_cmds[] = { "dump-guest-memory /dev/null 0 4096", "dump-guest-memory /dev/null", "gdbserver", + "gva2gpa 0", "hostfwd_add tcp::43210-:43210", "hostfwd_remove tcp::43210-:43210", "i /w 0", diff --git a/tests/test-qga.c b/tests/test-qga.c index 3d6377436a..891aa3d322 100644 --- a/tests/test-qga.c +++ b/tests/test-qga.c @@ -225,18 +225,15 @@ static void test_qga_ping(gconstpointer fix) qobject_unref(ret); } -static void test_qga_invalid_id(gconstpointer fix) +static void test_qga_id(gconstpointer fix) { const TestFixture *fixture = fix; - QDict *ret, *error; - const char *class; + QDict *ret; ret = qmp_fd(fixture->fd, "{'execute': 'guest-ping', 'id': 1}"); g_assert_nonnull(ret); - - error = qdict_get_qdict(ret, "error"); - class = qdict_get_try_str(error, "class"); - g_assert_cmpstr(class, ==, "GenericError"); + qmp_assert_no_error(ret); + g_assert_cmpint(qdict_get_int(ret, "id"), ==, 1); qobject_unref(ret); } @@ -992,7 +989,7 @@ int main(int argc, char **argv) g_test_add_data_func("/qga/file-ops", &fix, test_qga_file_ops); g_test_add_data_func("/qga/file-write-read", &fix, test_qga_file_write_read); g_test_add_data_func("/qga/get-time", &fix, test_qga_get_time); - g_test_add_data_func("/qga/invalid-id", &fix, test_qga_invalid_id); + g_test_add_data_func("/qga/id", &fix, test_qga_id); g_test_add_data_func("/qga/invalid-oob", &fix, test_qga_invalid_oob); g_test_add_data_func("/qga/invalid-cmd", &fix, test_qga_invalid_cmd); g_test_add_data_func("/qga/invalid-args", &fix, test_qga_invalid_args); diff --git a/tests/test-util-filemonitor.c b/tests/test-util-filemonitor.c index 5d95cea5ee..46e781c022 100644 --- a/tests/test-util-filemonitor.c +++ b/tests/test-util-filemonitor.c @@ -26,34 +26,29 @@ #include <utime.h> enum { + QFILE_MONITOR_TEST_OP_ADD_WATCH, + QFILE_MONITOR_TEST_OP_DEL_WATCH, + QFILE_MONITOR_TEST_OP_EVENT, QFILE_MONITOR_TEST_OP_CREATE, QFILE_MONITOR_TEST_OP_APPEND, QFILE_MONITOR_TEST_OP_TRUNC, QFILE_MONITOR_TEST_OP_RENAME, QFILE_MONITOR_TEST_OP_TOUCH, QFILE_MONITOR_TEST_OP_UNLINK, + QFILE_MONITOR_TEST_OP_MKDIR, + QFILE_MONITOR_TEST_OP_RMDIR, }; typedef struct { int type; const char *filesrc; const char *filedst; + int64_t *watchid; + int eventid; } QFileMonitorTestOp; typedef struct { - const char *file; -} QFileMonitorTestWatch; - -typedef struct { - gsize nwatches; - const QFileMonitorTestWatch *watches; - - gsize nops; - const QFileMonitorTestOp *ops; -} QFileMonitorTestPlan; - -typedef struct { - int id; + int64_t id; QFileMonitorEvent event; char *filename; } QFileMonitorTestRecord; @@ -67,6 +62,7 @@ typedef struct { static QemuMutex evlock; static bool evstopping; static bool evrunning; +static bool debug; /* * Main function for a background thread that is @@ -94,7 +90,7 @@ qemu_file_monitor_test_event_loop(void *opaque G_GNUC_UNUSED) * an ordered list of all events that it receives */ static void -qemu_file_monitor_test_handler(int id, +qemu_file_monitor_test_handler(int64_t id, QFileMonitorEvent event, const char *filename, void *opaque) @@ -160,7 +156,7 @@ qemu_file_monitor_test_next_record(QFileMonitorTestData *data) */ static bool qemu_file_monitor_test_expect(QFileMonitorTestData *data, - int id, + int64_t id, QFileMonitorEvent event, const char *filename) { @@ -170,13 +166,14 @@ qemu_file_monitor_test_expect(QFileMonitorTestData *data, rec = qemu_file_monitor_test_next_record(data); if (!rec) { - g_printerr("Missing event watch id %d event %d file %s\n", + g_printerr("Missing event watch id %" PRIx64 " event %d file %s\n", id, event, filename); return false; } if (id != rec->id) { - g_printerr("Expected watch id %d but got %d\n", id, rec->id); + g_printerr("Expected watch id %" PRIx64 " but got %" PRIx64 "\n", + id, rec->id); goto cleanup; } @@ -200,9 +197,179 @@ qemu_file_monitor_test_expect(QFileMonitorTestData *data, static void -test_file_monitor_events(const void *opaque) +test_file_monitor_events(void) { - const QFileMonitorTestPlan *plan = opaque; + int64_t watch0 = 0; + int64_t watch1 = 0; + int64_t watch2 = 0; + int64_t watch3 = 0; + int64_t watch4 = 0; + int64_t watch5 = 0; + QFileMonitorTestOp ops[] = { + { .type = QFILE_MONITOR_TEST_OP_ADD_WATCH, + .filesrc = NULL, .watchid = &watch0 }, + { .type = QFILE_MONITOR_TEST_OP_ADD_WATCH, + .filesrc = "one.txt", .watchid = &watch1 }, + { .type = QFILE_MONITOR_TEST_OP_ADD_WATCH, + .filesrc = "two.txt", .watchid = &watch2 }, + + + { .type = QFILE_MONITOR_TEST_OP_CREATE, + .filesrc = "one.txt", }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "one.txt", .watchid = &watch0, + .eventid = QFILE_MONITOR_EVENT_CREATED }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "one.txt", .watchid = &watch1, + .eventid = QFILE_MONITOR_EVENT_CREATED }, + + + { .type = QFILE_MONITOR_TEST_OP_CREATE, + .filesrc = "two.txt", }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "two.txt", .watchid = &watch0, + .eventid = QFILE_MONITOR_EVENT_CREATED }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "two.txt", .watchid = &watch2, + .eventid = QFILE_MONITOR_EVENT_CREATED }, + + + { .type = QFILE_MONITOR_TEST_OP_CREATE, + .filesrc = "three.txt", }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "three.txt", .watchid = &watch0, + .eventid = QFILE_MONITOR_EVENT_CREATED }, + + + { .type = QFILE_MONITOR_TEST_OP_UNLINK, + .filesrc = "three.txt", }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "three.txt", .watchid = &watch0, + .eventid = QFILE_MONITOR_EVENT_DELETED }, + + + { .type = QFILE_MONITOR_TEST_OP_RENAME, + .filesrc = "one.txt", .filedst = "two.txt" }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "one.txt", .watchid = &watch0, + .eventid = QFILE_MONITOR_EVENT_DELETED }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "one.txt", .watchid = &watch1, + .eventid = QFILE_MONITOR_EVENT_DELETED }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "two.txt", .watchid = &watch0, + .eventid = QFILE_MONITOR_EVENT_CREATED }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "two.txt", .watchid = &watch2, + .eventid = QFILE_MONITOR_EVENT_CREATED }, + + + { .type = QFILE_MONITOR_TEST_OP_APPEND, + .filesrc = "two.txt", }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "two.txt", .watchid = &watch0, + .eventid = QFILE_MONITOR_EVENT_MODIFIED }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "two.txt", .watchid = &watch2, + .eventid = QFILE_MONITOR_EVENT_MODIFIED }, + + + { .type = QFILE_MONITOR_TEST_OP_TOUCH, + .filesrc = "two.txt", }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "two.txt", .watchid = &watch0, + .eventid = QFILE_MONITOR_EVENT_ATTRIBUTES }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "two.txt", .watchid = &watch2, + .eventid = QFILE_MONITOR_EVENT_ATTRIBUTES }, + + + { .type = QFILE_MONITOR_TEST_OP_DEL_WATCH, + .filesrc = "one.txt", .watchid = &watch1 }, + { .type = QFILE_MONITOR_TEST_OP_ADD_WATCH, + .filesrc = "one.txt", .watchid = &watch3 }, + { .type = QFILE_MONITOR_TEST_OP_CREATE, + .filesrc = "one.txt", }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "one.txt", .watchid = &watch0, + .eventid = QFILE_MONITOR_EVENT_CREATED }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "one.txt", .watchid = &watch3, + .eventid = QFILE_MONITOR_EVENT_CREATED }, + + + { .type = QFILE_MONITOR_TEST_OP_DEL_WATCH, + .filesrc = "one.txt", .watchid = &watch3 }, + { .type = QFILE_MONITOR_TEST_OP_UNLINK, + .filesrc = "one.txt", }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "one.txt", .watchid = &watch0, + .eventid = QFILE_MONITOR_EVENT_DELETED }, + + + { .type = QFILE_MONITOR_TEST_OP_MKDIR, + .filesrc = "fish", }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "fish", .watchid = &watch0, + .eventid = QFILE_MONITOR_EVENT_CREATED }, + + + { .type = QFILE_MONITOR_TEST_OP_ADD_WATCH, + .filesrc = "fish/", .watchid = &watch4 }, + { .type = QFILE_MONITOR_TEST_OP_ADD_WATCH, + .filesrc = "fish/one.txt", .watchid = &watch5 }, + { .type = QFILE_MONITOR_TEST_OP_CREATE, + .filesrc = "fish/one.txt", }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "one.txt", .watchid = &watch4, + .eventid = QFILE_MONITOR_EVENT_CREATED }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "one.txt", .watchid = &watch5, + .eventid = QFILE_MONITOR_EVENT_CREATED }, + + + { .type = QFILE_MONITOR_TEST_OP_DEL_WATCH, + .filesrc = "fish/one.txt", .watchid = &watch5 }, + { .type = QFILE_MONITOR_TEST_OP_RENAME, + .filesrc = "fish/one.txt", .filedst = "two.txt", }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "one.txt", .watchid = &watch4, + .eventid = QFILE_MONITOR_EVENT_DELETED }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "two.txt", .watchid = &watch0, + .eventid = QFILE_MONITOR_EVENT_CREATED }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "two.txt", .watchid = &watch2, + .eventid = QFILE_MONITOR_EVENT_CREATED }, + + + { .type = QFILE_MONITOR_TEST_OP_RMDIR, + .filesrc = "fish", }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "", .watchid = &watch4, + .eventid = QFILE_MONITOR_EVENT_IGNORED }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "fish", .watchid = &watch0, + .eventid = QFILE_MONITOR_EVENT_DELETED }, + { .type = QFILE_MONITOR_TEST_OP_DEL_WATCH, + .filesrc = "fish", .watchid = &watch4 }, + + + { .type = QFILE_MONITOR_TEST_OP_UNLINK, + .filesrc = "two.txt", }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "two.txt", .watchid = &watch0, + .eventid = QFILE_MONITOR_EVENT_DELETED }, + { .type = QFILE_MONITOR_TEST_OP_EVENT, + .filesrc = "two.txt", .watchid = &watch2, + .eventid = QFILE_MONITOR_EVENT_DELETED }, + + + { .type = QFILE_MONITOR_TEST_OP_DEL_WATCH, + .filesrc = "two.txt", .watchid = &watch2 }, + { .type = QFILE_MONITOR_TEST_OP_DEL_WATCH, + .filesrc = NULL, .watchid = &watch0 }, + }; Error *local_err = NULL; GError *gerr = NULL; QFileMonitor *mon = qemu_file_monitor_new(&local_err); @@ -210,10 +377,11 @@ test_file_monitor_events(const void *opaque) GTimer *timer; gchar *dir = NULL; int err = -1; - gsize i, j; + gsize i; char *pathsrc = NULL; char *pathdst = NULL; QFileMonitorTestData data; + GHashTable *ids = g_hash_table_new(g_int64_hash, g_int64_equal); qemu_mutex_init(&data.lock); data.records = NULL; @@ -248,34 +416,15 @@ test_file_monitor_events(const void *opaque) } /* - * First register all the directory / file watches - * we're interested in seeing events against - */ - for (i = 0; i < plan->nwatches; i++) { - int watchid; - watchid = qemu_file_monitor_add_watch(mon, - dir, - plan->watches[i].file, - qemu_file_monitor_test_handler, - &data, - &local_err); - if (watchid < 0) { - g_printerr("Unable to add watch %s", - error_get_pretty(local_err)); - goto cleanup; - } - } - - - /* - * Now invoke all the file operations (create, - * delete, rename, chmod, etc). These operations - * will trigger the various file monitor events + * Run through the operation sequence validating events + * as we go */ - for (i = 0; i < plan->nops; i++) { - const QFileMonitorTestOp *op = &(plan->ops[i]); + for (i = 0; i < G_N_ELEMENTS(ops); i++) { + const QFileMonitorTestOp *op = &(ops[i]); int fd; struct utimbuf ubuf; + char *watchdir; + const char *watchfile; pathsrc = g_strdup_printf("%s/%s", dir, op->filesrc); if (op->filedst) { @@ -283,7 +432,75 @@ test_file_monitor_events(const void *opaque) } switch (op->type) { + case QFILE_MONITOR_TEST_OP_ADD_WATCH: + if (debug) { + g_printerr("Add watch %s %s\n", + dir, op->filesrc); + } + if (op->filesrc && strchr(op->filesrc, '/')) { + watchdir = g_strdup_printf("%s/%s", dir, op->filesrc); + watchfile = strrchr(watchdir, '/'); + *(char *)watchfile = '\0'; + watchfile++; + if (*watchfile == '\0') { + watchfile = NULL; + } + } else { + watchdir = g_strdup(dir); + watchfile = op->filesrc; + } + *op->watchid = + qemu_file_monitor_add_watch(mon, + watchdir, + watchfile, + qemu_file_monitor_test_handler, + &data, + &local_err); + g_free(watchdir); + if (*op->watchid < 0) { + g_printerr("Unable to add watch %s", + error_get_pretty(local_err)); + goto cleanup; + } + if (debug) { + g_printerr("Watch ID %" PRIx64 "\n", *op->watchid); + } + if (g_hash_table_contains(ids, op->watchid)) { + g_printerr("Watch ID %" PRIx64 "already exists", *op->watchid); + goto cleanup; + } + g_hash_table_add(ids, op->watchid); + break; + case QFILE_MONITOR_TEST_OP_DEL_WATCH: + if (debug) { + g_printerr("Del watch %s %" PRIx64 "\n", dir, *op->watchid); + } + if (op->filesrc && strchr(op->filesrc, '/')) { + watchdir = g_strdup_printf("%s/%s", dir, op->filesrc); + watchfile = strrchr(watchdir, '/'); + *(char *)watchfile = '\0'; + } else { + watchdir = g_strdup(dir); + } + g_hash_table_remove(ids, op->watchid); + qemu_file_monitor_remove_watch(mon, + watchdir, + *op->watchid); + g_free(watchdir); + break; + case QFILE_MONITOR_TEST_OP_EVENT: + if (debug) { + g_printerr("Event id=%" PRIx64 " event=%d file=%s\n", + *op->watchid, op->eventid, op->filesrc); + } + if (!qemu_file_monitor_test_expect( + &data, *op->watchid, op->eventid, op->filesrc)) + goto cleanup; + break; case QFILE_MONITOR_TEST_OP_CREATE: + if (debug) { + g_printerr("Create %s\n", pathsrc); + } fd = open(pathsrc, O_WRONLY | O_CREAT, 0700); if (fd < 0) { g_printerr("Unable to create %s: %s", @@ -294,6 +511,9 @@ test_file_monitor_events(const void *opaque) break; case QFILE_MONITOR_TEST_OP_APPEND: + if (debug) { + g_printerr("Append %s\n", pathsrc); + } fd = open(pathsrc, O_WRONLY | O_APPEND, 0700); if (fd < 0) { g_printerr("Unable to open %s: %s", @@ -311,6 +531,9 @@ test_file_monitor_events(const void *opaque) break; case QFILE_MONITOR_TEST_OP_TRUNC: + if (debug) { + g_printerr("Truncate %s\n", pathsrc); + } if (truncate(pathsrc, 4) < 0) { g_printerr("Unable to truncate %s: %s", pathsrc, strerror(errno)); @@ -319,6 +542,9 @@ test_file_monitor_events(const void *opaque) break; case QFILE_MONITOR_TEST_OP_RENAME: + if (debug) { + g_printerr("Rename %s -> %s\n", pathsrc, pathdst); + } if (rename(pathsrc, pathdst) < 0) { g_printerr("Unable to rename %s to %s: %s", pathsrc, pathdst, strerror(errno)); @@ -327,6 +553,9 @@ test_file_monitor_events(const void *opaque) break; case QFILE_MONITOR_TEST_OP_UNLINK: + if (debug) { + g_printerr("Unlink %s\n", pathsrc); + } if (unlink(pathsrc) < 0) { g_printerr("Unable to unlink %s: %s", pathsrc, strerror(errno)); @@ -335,6 +564,9 @@ test_file_monitor_events(const void *opaque) break; case QFILE_MONITOR_TEST_OP_TOUCH: + if (debug) { + g_printerr("Touch %s\n", pathsrc); + } ubuf.actime = 1024; ubuf.modtime = 1025; if (utime(pathsrc, &ubuf) < 0) { @@ -344,101 +576,39 @@ test_file_monitor_events(const void *opaque) } break; - default: - g_assert_not_reached(); - } - - g_free(pathsrc); - g_free(pathdst); - pathsrc = pathdst = NULL; - } - - - /* - * Finally validate that we have received all the events - * we expect to see for the combination of watches and - * file operations - */ - for (i = 0; i < plan->nops; i++) { - const QFileMonitorTestOp *op = &(plan->ops[i]); - - switch (op->type) { - case QFILE_MONITOR_TEST_OP_CREATE: - for (j = 0; j < plan->nwatches; j++) { - if (plan->watches[j].file && - !g_str_equal(plan->watches[j].file, op->filesrc)) - continue; - - if (!qemu_file_monitor_test_expect( - &data, j, QFILE_MONITOR_EVENT_CREATED, op->filesrc)) - goto cleanup; + case QFILE_MONITOR_TEST_OP_MKDIR: + if (debug) { + g_printerr("Mkdir %s\n", pathsrc); } - break; - - case QFILE_MONITOR_TEST_OP_APPEND: - case QFILE_MONITOR_TEST_OP_TRUNC: - for (j = 0; j < plan->nwatches; j++) { - if (plan->watches[j].file && - !g_str_equal(plan->watches[j].file, op->filesrc)) - continue; - - if (!qemu_file_monitor_test_expect( - &data, j, QFILE_MONITOR_EVENT_MODIFIED, op->filesrc)) - goto cleanup; - } - break; - - case QFILE_MONITOR_TEST_OP_RENAME: - for (j = 0; j < plan->nwatches; j++) { - if (plan->watches[j].file && - !g_str_equal(plan->watches[j].file, op->filesrc)) - continue; - - if (!qemu_file_monitor_test_expect( - &data, j, QFILE_MONITOR_EVENT_DELETED, op->filesrc)) - goto cleanup; - } - - for (j = 0; j < plan->nwatches; j++) { - if (plan->watches[j].file && - !g_str_equal(plan->watches[j].file, op->filedst)) - continue; - - if (!qemu_file_monitor_test_expect( - &data, j, QFILE_MONITOR_EVENT_CREATED, op->filedst)) - goto cleanup; + if (mkdir(pathsrc, 0700) < 0) { + g_printerr("Unable to mkdir %s: %s", + pathsrc, strerror(errno)); + goto cleanup; } break; - case QFILE_MONITOR_TEST_OP_TOUCH: - for (j = 0; j < plan->nwatches; j++) { - if (plan->watches[j].file && - !g_str_equal(plan->watches[j].file, op->filesrc)) - continue; - - if (!qemu_file_monitor_test_expect( - &data, j, QFILE_MONITOR_EVENT_ATTRIBUTES, op->filesrc)) - goto cleanup; + case QFILE_MONITOR_TEST_OP_RMDIR: + if (debug) { + g_printerr("Rmdir %s\n", pathsrc); } - break; - - case QFILE_MONITOR_TEST_OP_UNLINK: - for (j = 0; j < plan->nwatches; j++) { - if (plan->watches[j].file && - !g_str_equal(plan->watches[j].file, op->filesrc)) - continue; - - if (!qemu_file_monitor_test_expect( - &data, j, QFILE_MONITOR_EVENT_DELETED, op->filesrc)) - goto cleanup; + if (rmdir(pathsrc) < 0) { + g_printerr("Unable to rmdir %s: %s", + pathsrc, strerror(errno)); + goto cleanup; } break; default: g_assert_not_reached(); } + + g_free(pathsrc); + g_free(pathdst); + pathsrc = pathdst = NULL; } + g_assert_cmpint(g_hash_table_size(ids), ==, 0); + err = 0; cleanup: @@ -460,171 +630,42 @@ test_file_monitor_events(const void *opaque) } g_timer_destroy(timer); - for (i = 0; i < plan->nops; i++) { - const QFileMonitorTestOp *op = &(plan->ops[i]); - pathsrc = g_strdup_printf("%s/%s", dir, op->filesrc); - unlink(pathsrc); - g_free(pathsrc); - if (op->filedst) { - pathdst = g_strdup_printf("%s/%s", dir, op->filedst); - unlink(pathdst); - g_free(pathdst); - } - } - qemu_file_monitor_free(mon); g_list_foreach(data.records, (GFunc)qemu_file_monitor_test_record_free, NULL); g_list_free(data.records); qemu_mutex_destroy(&data.lock); if (dir) { - rmdir(dir); + for (i = 0; i < G_N_ELEMENTS(ops); i++) { + const QFileMonitorTestOp *op = &(ops[i]); + char *path = g_strdup_printf("%s/%s", + dir, op->filesrc); + if (op->type == QFILE_MONITOR_TEST_OP_MKDIR) { + rmdir(path); + g_free(path); + } else { + unlink(path); + g_free(path); + if (op->filedst) { + path = g_strdup_printf("%s/%s", + dir, op->filedst); + unlink(path); + g_free(path); + } + } + } + if (rmdir(dir) < 0) { + g_printerr("Failed to remove %s: %s\n", + dir, strerror(errno)); + abort(); + } } + g_hash_table_unref(ids); g_free(dir); g_assert(err == 0); } -/* - * Set of structs which define which file name patterns - * we're trying to watch against. NULL, means all files - * in the directory - */ -static const QFileMonitorTestWatch watches_any[] = { - { NULL }, -}; - -static const QFileMonitorTestWatch watches_one[] = { - { "one.txt" }, -}; - -static const QFileMonitorTestWatch watches_two[] = { - { "two.txt" }, -}; - -static const QFileMonitorTestWatch watches_many[] = { - { NULL }, - { "one.txt" }, - { "two.txt" }, -}; - - -/* - * Various sets of file operations we're going to - * trigger and validate events for - */ -static const QFileMonitorTestOp ops_create_one[] = { - { .type = QFILE_MONITOR_TEST_OP_CREATE, - .filesrc = "one.txt", } -}; - -static const QFileMonitorTestOp ops_delete_one[] = { - { .type = QFILE_MONITOR_TEST_OP_CREATE, - .filesrc = "one.txt", }, - { .type = QFILE_MONITOR_TEST_OP_UNLINK, - .filesrc = "one.txt", } -}; - -static const QFileMonitorTestOp ops_create_many[] = { - { .type = QFILE_MONITOR_TEST_OP_CREATE, - .filesrc = "one.txt", }, - { .type = QFILE_MONITOR_TEST_OP_CREATE, - .filesrc = "two.txt", }, - { .type = QFILE_MONITOR_TEST_OP_CREATE, - .filesrc = "three.txt", } -}; - -static const QFileMonitorTestOp ops_rename_one[] = { - { .type = QFILE_MONITOR_TEST_OP_CREATE, - .filesrc = "one.txt", }, - { .type = QFILE_MONITOR_TEST_OP_RENAME, - .filesrc = "one.txt", .filedst = "two.txt" } -}; - -static const QFileMonitorTestOp ops_rename_many[] = { - { .type = QFILE_MONITOR_TEST_OP_CREATE, - .filesrc = "one.txt", }, - { .type = QFILE_MONITOR_TEST_OP_CREATE, - .filesrc = "two.txt", }, - { .type = QFILE_MONITOR_TEST_OP_RENAME, - .filesrc = "one.txt", .filedst = "two.txt" } -}; - -static const QFileMonitorTestOp ops_append_one[] = { - { .type = QFILE_MONITOR_TEST_OP_CREATE, - .filesrc = "one.txt", }, - { .type = QFILE_MONITOR_TEST_OP_APPEND, - .filesrc = "one.txt", }, -}; - -static const QFileMonitorTestOp ops_trunc_one[] = { - { .type = QFILE_MONITOR_TEST_OP_CREATE, - .filesrc = "one.txt", }, - { .type = QFILE_MONITOR_TEST_OP_TRUNC, - .filesrc = "one.txt", }, -}; - -static const QFileMonitorTestOp ops_touch_one[] = { - { .type = QFILE_MONITOR_TEST_OP_CREATE, - .filesrc = "one.txt", }, - { .type = QFILE_MONITOR_TEST_OP_TOUCH, - .filesrc = "one.txt", }, -}; - - -/* - * No we define data sets for the combinatorial - * expansion of file watches and operation sets - */ -#define PLAN_DATA(o, w) \ - static const QFileMonitorTestPlan plan_ ## o ## _ ## w = { \ - .nops = G_N_ELEMENTS(ops_ ##o), \ - .ops = ops_ ##o, \ - .nwatches = G_N_ELEMENTS(watches_ ##w), \ - .watches = watches_ ## w, \ - } - -PLAN_DATA(create_one, any); -PLAN_DATA(create_one, one); -PLAN_DATA(create_one, two); -PLAN_DATA(create_one, many); - -PLAN_DATA(delete_one, any); -PLAN_DATA(delete_one, one); -PLAN_DATA(delete_one, two); -PLAN_DATA(delete_one, many); - -PLAN_DATA(create_many, any); -PLAN_DATA(create_many, one); -PLAN_DATA(create_many, two); -PLAN_DATA(create_many, many); - -PLAN_DATA(rename_one, any); -PLAN_DATA(rename_one, one); -PLAN_DATA(rename_one, two); -PLAN_DATA(rename_one, many); - -PLAN_DATA(rename_many, any); -PLAN_DATA(rename_many, one); -PLAN_DATA(rename_many, two); -PLAN_DATA(rename_many, many); - -PLAN_DATA(append_one, any); -PLAN_DATA(append_one, one); -PLAN_DATA(append_one, two); -PLAN_DATA(append_one, many); - -PLAN_DATA(trunc_one, any); -PLAN_DATA(trunc_one, one); -PLAN_DATA(trunc_one, two); -PLAN_DATA(trunc_one, many); - -PLAN_DATA(touch_one, any); -PLAN_DATA(touch_one, one); -PLAN_DATA(touch_one, two); -PLAN_DATA(touch_one, many); - - int main(int argc, char **argv) { g_test_init(&argc, &argv, NULL); @@ -633,53 +674,8 @@ int main(int argc, char **argv) qemu_mutex_init(&evlock); - /* - * Register test cases for the combinatorial - * expansion of file watches and operation sets - */ - #define PLAN_REGISTER(o, w) \ - g_test_add_data_func("/util/filemonitor/" # o "/" # w, \ - &plan_ ## o ## _ ## w, test_file_monitor_events) - - PLAN_REGISTER(create_one, any); - PLAN_REGISTER(create_one, one); - PLAN_REGISTER(create_one, two); - PLAN_REGISTER(create_one, many); - - PLAN_REGISTER(delete_one, any); - PLAN_REGISTER(delete_one, one); - PLAN_REGISTER(delete_one, two); - PLAN_REGISTER(delete_one, many); - - PLAN_REGISTER(create_many, any); - PLAN_REGISTER(create_many, one); - PLAN_REGISTER(create_many, two); - PLAN_REGISTER(create_many, many); - - PLAN_REGISTER(rename_one, any); - PLAN_REGISTER(rename_one, one); - PLAN_REGISTER(rename_one, two); - PLAN_REGISTER(rename_one, many); - - PLAN_REGISTER(rename_many, any); - PLAN_REGISTER(rename_many, one); - PLAN_REGISTER(rename_many, two); - PLAN_REGISTER(rename_many, many); - - PLAN_REGISTER(append_one, any); - PLAN_REGISTER(append_one, one); - PLAN_REGISTER(append_one, two); - PLAN_REGISTER(append_one, many); - - PLAN_REGISTER(trunc_one, any); - PLAN_REGISTER(trunc_one, one); - PLAN_REGISTER(trunc_one, two); - PLAN_REGISTER(trunc_one, many); - - PLAN_REGISTER(touch_one, any); - PLAN_REGISTER(touch_one, one); - PLAN_REGISTER(touch_one, two); - PLAN_REGISTER(touch_one, many); + debug = getenv("FILEMONITOR_DEBUG") != NULL; + g_test_add_func("/util/filemonitor", test_file_monitor_events); return g_test_run(); } diff --git a/tests/test-util-sockets.c b/tests/test-util-sockets.c index 6195a3ac36..fd1ced058c 100644 --- a/tests/test-util-sockets.c +++ b/tests/test-util-sockets.c @@ -70,6 +70,7 @@ int monitor_get_fd(Monitor *mon, const char *fdname, Error **errp) * otherwise we get duplicate syms at link time. */ __thread Monitor *cur_mon; +int monitor_vprintf(Monitor *mon, const char *fmt, va_list ap) { abort(); } void monitor_init(Chardev *chr, int flags) {} diff --git a/tests/uefi-test-tools/build.sh b/tests/uefi-test-tools/build.sh index 155cb75c4d..8aa7935c43 100755 --- a/tests/uefi-test-tools/build.sh +++ b/tests/uefi-test-tools/build.sh @@ -29,6 +29,9 @@ export PACKAGES_PATH=$(realpath -- "$edk2_dir") export WORKSPACE=$PWD mkdir -p Conf +# Work around <https://bugzilla.tianocore.org/show_bug.cgi?id=1607>. +export PYTHON_COMMAND=python2 + # Source "edksetup.sh" carefully. set +e +u +C source "$PACKAGES_PATH/edksetup.sh" @@ -38,97 +41,12 @@ if [ $ret -ne 0 ]; then exit $ret fi -# Map the QEMU system emulation target to the following types of architecture -# identifiers: -# - edk2, -# - gcc cross-compilation. -# Cover only those targets that are supported by the UEFI spec and edk2. -case "$emulation_target" in - (arm) - edk2_arch=ARM - gcc_arch=arm - ;; - (aarch64) - edk2_arch=AARCH64 - gcc_arch=aarch64 - ;; - (i386) - edk2_arch=IA32 - gcc_arch=i686 - ;; - (x86_64) - edk2_arch=X64 - gcc_arch=x86_64 - ;; - (*) - printf '%s: unknown/unsupported QEMU system emulation target "%s"\n' \ - "$program_name" "$emulation_target" >&2 - exit 1 - ;; -esac - -# Check if cross-compilation is needed. -host_arch=$(uname -m) -if [ "$gcc_arch" == "$host_arch" ] || - ( [ "$gcc_arch" == i686 ] && [ "$host_arch" == x86_64 ] ); then - cross_prefix= -else - cross_prefix=${gcc_arch}-linux-gnu- -fi - -# Expose cross_prefix (which is possibly empty) to the edk2 tools. While at it, -# determine the suitable edk2 toolchain as well. -# - For ARM and AARCH64, edk2 only offers the GCC5 toolchain tag, which covers -# the gcc-5+ releases. -# - For IA32 and X64, edk2 offers the GCC44 through GCC49 toolchain tags, in -# addition to GCC5. Unfortunately, the mapping between the toolchain tags and -# the actual gcc releases isn't entirely trivial. Run "git-blame" on -# "OvmfPkg/build.sh" in edk2 for more information. -# And, because the above is too simple, we have to assign cross_prefix to an -# edk2 build variable that is specific to both the toolchain tag and the target -# architecture. -case "$edk2_arch" in - (ARM) - edk2_toolchain=GCC5 - export GCC5_ARM_PREFIX=$cross_prefix - ;; - (AARCH64) - edk2_toolchain=GCC5 - export GCC5_AARCH64_PREFIX=$cross_prefix - ;; - (IA32|X64) - gcc_version=$("${cross_prefix}gcc" -v 2>&1 | tail -1 | awk '{print $3}') - case "$gcc_version" in - ([1-3].*|4.[0-3].*) - printf '%s: unsupported gcc version "%s"\n' \ - "$program_name" "$gcc_version" >&2 - exit 1 - ;; - (4.4.*) - edk2_toolchain=GCC44 - ;; - (4.5.*) - edk2_toolchain=GCC45 - ;; - (4.6.*) - edk2_toolchain=GCC46 - ;; - (4.7.*) - edk2_toolchain=GCC47 - ;; - (4.8.*) - edk2_toolchain=GCC48 - ;; - (4.9.*|6.[0-2].*) - edk2_toolchain=GCC49 - ;; - (*) - edk2_toolchain=GCC5 - ;; - esac - eval "export ${edk2_toolchain}_BIN=\$cross_prefix" - ;; -esac +# Fetch some option arguments, and set the cross-compilation environment (if +# any), for the edk2 "build" utility. +source "$edk2_dir/../edk2-funcs.sh" +edk2_arch=$(qemu_edk2_get_arch "$emulation_target") +edk2_toolchain=$(qemu_edk2_get_toolchain "$emulation_target") +qemu_edk2_set_cross_env "$emulation_target" # Build the UEFI binary mkdir -p log diff --git a/tests/vhost-user-test.c b/tests/vhost-user-test.c index 0c965b3b1e..3817966010 100644 --- a/tests/vhost-user-test.c +++ b/tests/vhost-user-test.c @@ -178,7 +178,8 @@ static void append_mem_opts(TestServer *server, GString *cmd_line, int size, enum test_memfd memfd) { if (memfd == TEST_MEMFD_AUTO) { - memfd = qemu_memfd_check(0) ? TEST_MEMFD_YES : TEST_MEMFD_NO; + memfd = qemu_memfd_check(MFD_ALLOW_SEALING) ? TEST_MEMFD_YES + : TEST_MEMFD_NO; } if (memfd == TEST_MEMFD_YES) { @@ -930,7 +931,7 @@ static void register_vhost_user_test(void) "virtio-net", test_read_guest_mem, &opts); - if (qemu_memfd_check(0)) { + if (qemu_memfd_check(MFD_ALLOW_SEALING)) { opts.before = vhost_user_test_setup_memfd; qos_add_test("vhost-user/read-guest-mem/memfd", "virtio-net", diff --git a/tests/virtio-blk-test.c b/tests/virtio-blk-test.c index b02be0274e..b65365934b 100644 --- a/tests/virtio-blk-test.c +++ b/tests/virtio-blk-test.c @@ -751,7 +751,7 @@ static void *virtio_blk_test_setup(GString *cmd_line, void *arg) char *tmp_path = drive_create(); g_string_append_printf(cmd_line, - " -drive if=none,id=drive0,file=%s,format=raw " + " -drive if=none,id=drive0,file=%s,format=raw,auto-read-only=off " "-drive if=none,id=drive1,file=null-co://,format=raw ", tmp_path); diff --git a/tests/virtio-net-test.c b/tests/virtio-net-test.c index c58e670e2f..0d956f36fe 100644 --- a/tests/virtio-net-test.c +++ b/tests/virtio-net-test.c @@ -15,6 +15,10 @@ #include "libqos/qgraph.h" #include "libqos/virtio-net.h" +#ifndef ETH_P_RARP +#define ETH_P_RARP 0x8035 +#endif + #define PCI_SLOT_HP 0x06 #define PCI_SLOT 0x04 @@ -168,6 +172,31 @@ static void hotplug(void *obj, void *data, QGuestAllocator *t_alloc) } } +static void announce_self(void *obj, void *data, QGuestAllocator *t_alloc) +{ + int *sv = data; + char buffer[60]; + int len; + QDict *rsp; + int ret; + uint16_t *proto = (uint16_t *)&buffer[12]; + + rsp = qmp("{ 'execute' : 'announce-self', " + " 'arguments': {" + " 'initial': 50, 'max': 550," + " 'rounds': 10, 'step': 50 } }"); + assert(!qdict_haskey(rsp, "error")); + qobject_unref(rsp); + + /* Catch the packet and make sure it's a RARP */ + ret = qemu_recv(sv[0], &len, sizeof(len), 0); + g_assert_cmpint(ret, ==, sizeof(len)); + len = ntohl(len); + + ret = qemu_recv(sv[0], buffer, len, 0); + g_assert_cmpint(*proto, ==, htons(ETH_P_RARP)); +} + static void virtio_net_test_cleanup(void *sockets) { int *sv = sockets; @@ -233,6 +262,7 @@ static void register_virtio_net_test(void) qos_add_test("basic", "virtio-net", send_recv_test, &opts); qos_add_test("rx_stop_cont", "virtio-net", stop_cont_test, &opts); #endif + qos_add_test("announce-self", "virtio-net", announce_self, &opts); /* These tests do not need a loopback backend. */ opts.before = virtio_net_test_setup_nosocket; diff --git a/trace-events b/trace-events index e66afc59e9..844ee58dd9 100644 --- a/trace-events +++ b/trace-events @@ -1,4 +1,4 @@ -# Trace events for debugging and performance instrumentation +# See docs/devel/tracing.txt for syntax documentation. # # This file is processed by the tracetool script during the build. # @@ -123,24 +123,32 @@ qmp_job_dismiss(void *job) "job %p" ## vCPU +# trace/control-target.c + # Hot-plug a new virtual (guest) CPU # # Mode: user, softmmu # Targets: all vcpu guest_cpu_enter(void) +# trace/control.c + # Hot-unplug a virtual (guest) CPU # # Mode: user, softmmu # Targets: all vcpu guest_cpu_exit(void) +# qom/cpu.c + # Reset the state of a virtual (guest) CPU # # Mode: user, softmmu # Targets: all vcpu guest_cpu_reset(void) +# tcg/tcg-op.c + # @vaddr: Access' virtual address. # @info : Access' information (see below). # @@ -161,6 +169,9 @@ vcpu guest_cpu_reset(void) # Targets: TCG(all) vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info) "info=%d", "vaddr=0x%016"PRIx64" info=%d" +# linux-user/syscall.c +# bsd-user/syscall.c + # @num: System call number. # @arg*: System call argument value. # diff --git a/trace/ftrace.c b/trace/ftrace.c index 61692a8682..9749543d9b 100644 --- a/trace/ftrace.c +++ b/trace/ftrace.c @@ -53,7 +53,11 @@ bool ftrace_init(void) } if (tracefs_found) { - snprintf(path, PATH_MAX, "%s%s/tracing_on", mount_point, subdir); + if (snprintf(path, PATH_MAX, "%s%s/tracing_on", mount_point, subdir) + >= sizeof(path)) { + fprintf(stderr, "Using tracefs mountpoint would exceed PATH_MAX\n"); + return false; + } trace_fd = open(path, O_WRONLY); if (trace_fd < 0) { if (errno == EACCES) { @@ -72,7 +76,11 @@ bool ftrace_init(void) } close(trace_fd); } - snprintf(path, PATH_MAX, "%s%s/trace_marker", mount_point, subdir); + if (snprintf(path, PATH_MAX, "%s%s/trace_marker", mount_point, subdir) + >= sizeof(path)) { + fprintf(stderr, "Using tracefs mountpoint would exceed PATH_MAX\n"); + return false; + } trace_marker_fd = open(path, O_WRONLY); if (trace_marker_fd < 0) { perror("Could not open ftrace 'trace_marker' file"); diff --git a/trace/simple.c b/trace/simple.c index ac904eca91..fc7106ec49 100644 --- a/trace/simple.c +++ b/trace/simple.c @@ -16,6 +16,7 @@ #include "trace/control.h" #include "trace/simple.h" #include "qemu/error-report.h" +#include "qemu/qemu-print.h" /** Trace file header event ID, picked to avoid conflict with real event IDs */ #define HEADER_EVENT_ID (~(uint64_t)0) @@ -363,10 +364,10 @@ void st_set_trace_file(const char *file) st_set_trace_file_enabled(true); } -void st_print_trace_file_status(FILE *stream, int (*stream_printf)(FILE *stream, const char *fmt, ...)) +void st_print_trace_file_status(void) { - stream_printf(stream, "Trace file \"%s\" %s.\n", - trace_file_name, trace_fp ? "on" : "off"); + qemu_printf("Trace file \"%s\" %s.\n", + trace_file_name, trace_fp ? "on" : "off"); } void st_flush_trace_buffer(void) diff --git a/trace/simple.h b/trace/simple.h index 9931808c05..5771a0634f 100644 --- a/trace/simple.h +++ b/trace/simple.h @@ -11,7 +11,7 @@ #ifndef TRACE_SIMPLE_H #define TRACE_SIMPLE_H -void st_print_trace_file_status(FILE *stream, fprintf_function stream_printf); +void st_print_trace_file_status(void); void st_set_trace_file_enabled(bool enable); void st_set_trace_file(const char *file); bool st_init(void); diff --git a/ui/Makefile.objs b/ui/Makefile.objs index fe1a7aed97..cc2bf5b180 100644 --- a/ui/Makefile.objs +++ b/ui/Makefile.objs @@ -46,8 +46,8 @@ endif common-obj-$(CONFIG_CURSES) += curses.mo curses.mo-objs := curses.o -curses.mo-cflags := $(CURSES_CFLAGS) -curses.mo-libs := $(CURSES_LIBS) +curses.mo-cflags := $(CURSES_CFLAGS) $(ICONV_CFLAGS) +curses.mo-libs := $(CURSES_LIBS) $(ICONV_LIBS) common-obj-$(call land,$(CONFIG_SPICE),$(CONFIG_GIO)) += spice-app.mo spice-app.mo-objs := spice-app.o diff --git a/ui/curses.c b/ui/curses.c index 37954ce1b0..fb63945188 100644 --- a/ui/curses.c +++ b/ui/curses.c @@ -27,6 +27,10 @@ #include <sys/ioctl.h> #include <termios.h> #endif +#include <locale.h> +#include <wchar.h> +#include <langinfo.h> +#include <iconv.h> #include "qapi/error.h" #include "qemu-common.h" @@ -54,25 +58,30 @@ static WINDOW *screenpad = NULL; static int width, height, gwidth, gheight, invalidate; static int px, py, sminx, sminy, smaxx, smaxy; -static chtype vga_to_curses[256]; +static const char *font_charset = "CP437"; +static cchar_t vga_to_curses[256]; static void curses_update(DisplayChangeListener *dcl, int x, int y, int w, int h) { console_ch_t *line; - chtype curses_line[width]; + cchar_t curses_line[width]; line = screen + y * width; for (h += y; y < h; y ++, line += width) { for (x = 0; x < width; x++) { chtype ch = line[x] & 0xff; chtype at = line[x] & ~0xff; - if (vga_to_curses[ch]) { - ch = vga_to_curses[ch]; + if (vga_to_curses[ch].chars[0]) { + curses_line[x] = vga_to_curses[ch]; + } else { + curses_line[x] = (cchar_t) { + .chars[0] = ch, + }; } - curses_line[x] = ch | at; + curses_line[x].attr |= at; } - mvwaddchnstr(screenpad, y, 0, curses_line, width); + mvwadd_wchnstr(screenpad, y, 0, curses_line, width); } pnoutrefresh(screenpad, py, px, sminy, sminx, smaxy - 1, smaxx - 1); @@ -391,6 +400,260 @@ static void curses_atexit(void) endwin(); } +/* Setup wchar glyph for one UCS-2 char */ +static void convert_ucs(int glyph, uint16_t ch, iconv_t conv) +{ + wchar_t wch; + char *pch, *pwch; + size_t sch, swch; + + pch = (char *) &ch; + pwch = (char *) &wch; + sch = sizeof(ch); + swch = sizeof(wch); + + if (iconv(conv, &pch, &sch, &pwch, &swch) == (size_t) -1) { + fprintf(stderr, "Could not convert 0x%04x from UCS-2 to WCHAR_T: %s\n", + ch, strerror(errno)); + } else { + vga_to_curses[glyph].chars[0] = wch; + } +} + +/* Setup wchar glyph for one font character */ +static void convert_font(unsigned char ch, iconv_t conv) +{ + wchar_t wch; + char *pch, *pwch; + size_t sch, swch; + + pch = (char *) &ch; + pwch = (char *) &wch; + sch = sizeof(ch); + swch = sizeof(wch); + + if (iconv(conv, &pch, &sch, &pwch, &swch) == (size_t) -1) { + fprintf(stderr, "Could not convert 0x%02x from %s to WCHAR_T: %s\n", + ch, font_charset, strerror(errno)); + } else { + vga_to_curses[ch].chars[0] = wch; + } +} + +/* Convert one wchar to UCS-2 */ +static uint16_t get_ucs(wchar_t wch, iconv_t conv) +{ + uint16_t ch; + char *pch, *pwch; + size_t sch, swch; + + pch = (char *) &ch; + pwch = (char *) &wch; + sch = sizeof(ch); + swch = sizeof(wch); + + if (iconv(conv, &pwch, &swch, &pch, &sch) == (size_t) -1) { + fprintf(stderr, "Could not convert 0x%02lx from WCHAR_T to UCS-2: %s\n", + (unsigned long)wch, strerror(errno)); + return 0xFFFD; + } + + return ch; +} + +/* + * Setup mapping for vga to curses line graphics. + */ +static void font_setup(void) +{ + /* + * Control characters are normally non-printable, but VGA does have + * well-known glyphs for them. + */ + static uint16_t control_characters[0x20] = { + 0x0020, + 0x263a, + 0x263b, + 0x2665, + 0x2666, + 0x2663, + 0x2660, + 0x2022, + 0x25d8, + 0x25cb, + 0x25d9, + 0x2642, + 0x2640, + 0x266a, + 0x266b, + 0x263c, + 0x25ba, + 0x25c4, + 0x2195, + 0x203c, + 0x00b6, + 0x00a7, + 0x25ac, + 0x21a8, + 0x2191, + 0x2193, + 0x2192, + 0x2190, + 0x221f, + 0x2194, + 0x25b2, + 0x25bc + }; + + iconv_t ucs_to_wchar_conv; + iconv_t wchar_to_ucs_conv; + iconv_t font_conv; + int i; + + ucs_to_wchar_conv = iconv_open("WCHAR_T", "UCS-2"); + if (ucs_to_wchar_conv == (iconv_t) -1) { + fprintf(stderr, "Could not convert font glyphs from UCS-2: '%s'\n", + strerror(errno)); + exit(1); + } + + wchar_to_ucs_conv = iconv_open("UCS-2", "WCHAR_T"); + if (wchar_to_ucs_conv == (iconv_t) -1) { + iconv_close(ucs_to_wchar_conv); + fprintf(stderr, "Could not convert font glyphs to UCS-2: '%s'\n", + strerror(errno)); + exit(1); + } + + font_conv = iconv_open("WCHAR_T", font_charset); + if (font_conv == (iconv_t) -1) { + iconv_close(ucs_to_wchar_conv); + iconv_close(wchar_to_ucs_conv); + fprintf(stderr, "Could not convert font glyphs from %s: '%s'\n", + font_charset, strerror(errno)); + exit(1); + } + + /* Control characters */ + for (i = 0; i <= 0x1F; i++) { + convert_ucs(i, control_characters[i], ucs_to_wchar_conv); + } + + for (i = 0x20; i <= 0xFF; i++) { + convert_font(i, font_conv); + } + + /* DEL */ + convert_ucs(0x7F, 0x2302, ucs_to_wchar_conv); + + if (strcmp(nl_langinfo(CODESET), "UTF-8")) { + /* Non-Unicode capable, use termcap equivalents for those available */ + for (i = 0; i <= 0xFF; i++) { + switch (get_ucs(vga_to_curses[i].chars[0], wchar_to_ucs_conv)) { + case 0x00a3: + vga_to_curses[i] = *WACS_STERLING; + break; + case 0x2591: + vga_to_curses[i] = *WACS_BOARD; + break; + case 0x2592: + vga_to_curses[i] = *WACS_CKBOARD; + break; + case 0x2502: + vga_to_curses[i] = *WACS_VLINE; + break; + case 0x2524: + vga_to_curses[i] = *WACS_RTEE; + break; + case 0x2510: + vga_to_curses[i] = *WACS_URCORNER; + break; + case 0x2514: + vga_to_curses[i] = *WACS_LLCORNER; + break; + case 0x2534: + vga_to_curses[i] = *WACS_BTEE; + break; + case 0x252c: + vga_to_curses[i] = *WACS_TTEE; + break; + case 0x251c: + vga_to_curses[i] = *WACS_LTEE; + break; + case 0x2500: + vga_to_curses[i] = *WACS_HLINE; + break; + case 0x253c: + vga_to_curses[i] = *WACS_PLUS; + break; + case 0x256c: + vga_to_curses[i] = *WACS_LANTERN; + break; + case 0x256a: + vga_to_curses[i] = *WACS_NEQUAL; + break; + case 0x2518: + vga_to_curses[i] = *WACS_LRCORNER; + break; + case 0x250c: + vga_to_curses[i] = *WACS_ULCORNER; + break; + case 0x2588: + vga_to_curses[i] = *WACS_BLOCK; + break; + case 0x03c0: + vga_to_curses[i] = *WACS_PI; + break; + case 0x00b1: + vga_to_curses[i] = *WACS_PLMINUS; + break; + case 0x2265: + vga_to_curses[i] = *WACS_GEQUAL; + break; + case 0x2264: + vga_to_curses[i] = *WACS_LEQUAL; + break; + case 0x00b0: + vga_to_curses[i] = *WACS_DEGREE; + break; + case 0x25a0: + vga_to_curses[i] = *WACS_BULLET; + break; + case 0x2666: + vga_to_curses[i] = *WACS_DIAMOND; + break; + case 0x2192: + vga_to_curses[i] = *WACS_RARROW; + break; + case 0x2190: + vga_to_curses[i] = *WACS_LARROW; + break; + case 0x2191: + vga_to_curses[i] = *WACS_UARROW; + break; + case 0x2193: + vga_to_curses[i] = *WACS_DARROW; + break; + case 0x23ba: + vga_to_curses[i] = *WACS_S1; + break; + case 0x23bb: + vga_to_curses[i] = *WACS_S3; + break; + case 0x23bc: + vga_to_curses[i] = *WACS_S7; + break; + case 0x23bd: + vga_to_curses[i] = *WACS_S9; + break; + } + } + } + iconv_close(ucs_to_wchar_conv); + iconv_close(wchar_to_ucs_conv); + iconv_close(font_conv); +} + static void curses_setup(void) { int i, colour_default[8] = { @@ -420,47 +683,7 @@ static void curses_setup(void) init_pair(i, COLOR_WHITE, COLOR_BLACK); } - /* - * Setup mapping for vga to curses line graphics. - * FIXME: for better font, have to use ncursesw and setlocale() - */ -#if 0 - /* FIXME: map from where? */ - ACS_S1; - ACS_S3; - ACS_S7; - ACS_S9; -#endif - /* ACS_* is not constant. So, we can't initialize statically. */ - vga_to_curses['\0'] = ' '; - vga_to_curses[0x04] = ACS_DIAMOND; - vga_to_curses[0x18] = ACS_UARROW; - vga_to_curses[0x19] = ACS_DARROW; - vga_to_curses[0x1a] = ACS_RARROW; - vga_to_curses[0x1b] = ACS_LARROW; - vga_to_curses[0x9c] = ACS_STERLING; - vga_to_curses[0xb0] = ACS_BOARD; - vga_to_curses[0xb1] = ACS_CKBOARD; - vga_to_curses[0xb3] = ACS_VLINE; - vga_to_curses[0xb4] = ACS_RTEE; - vga_to_curses[0xbf] = ACS_URCORNER; - vga_to_curses[0xc0] = ACS_LLCORNER; - vga_to_curses[0xc1] = ACS_BTEE; - vga_to_curses[0xc2] = ACS_TTEE; - vga_to_curses[0xc3] = ACS_LTEE; - vga_to_curses[0xc4] = ACS_HLINE; - vga_to_curses[0xc5] = ACS_PLUS; - vga_to_curses[0xce] = ACS_LANTERN; - vga_to_curses[0xd8] = ACS_NEQUAL; - vga_to_curses[0xd9] = ACS_LRCORNER; - vga_to_curses[0xda] = ACS_ULCORNER; - vga_to_curses[0xdb] = ACS_BLOCK; - vga_to_curses[0xe3] = ACS_PI; - vga_to_curses[0xf1] = ACS_PLMINUS; - vga_to_curses[0xf2] = ACS_GEQUAL; - vga_to_curses[0xf3] = ACS_LEQUAL; - vga_to_curses[0xf8] = ACS_DEGREE; - vga_to_curses[0xfe] = ACS_BULLET; + font_setup(); } static void curses_keyboard_setup(void) @@ -493,6 +716,10 @@ static void curses_display_init(DisplayState *ds, DisplayOptions *opts) } #endif + setlocale(LC_CTYPE, ""); + if (opts->u.curses.charset) { + font_charset = opts->u.curses.charset; + } curses_setup(); curses_keyboard_setup(); atexit(curses_atexit); diff --git a/ui/trace-events b/ui/trace-events index eb4bf7f00d..63de72a798 100644 --- a/ui/trace-events +++ b/ui/trace-events @@ -1,6 +1,6 @@ # See docs/devel/tracing.txt for syntax documentation. -# ui/console.c +# console.c console_gfx_new(void) "" console_gfx_reuse(int index) "%d" console_gfx_close(int index) "%d" @@ -17,7 +17,9 @@ displaychangelistener_register(void *dcl, const char *name) "%p [ %s ]" displaychangelistener_unregister(void *dcl, const char *name) "%p [ %s ]" ppm_save(const char *filename, void *display_surface) "%s surface=%p" -# ui/gtk.c +# gtk.c +# gtk-gl-area.c +# gtk-egl.c gd_switch(const char *tab, int width, int height) "tab=%s, width=%d, height=%d" gd_update(const char *tab, int x, int y, int w, int h) "tab=%s, x=%d, y=%d, w=%d, h=%d" gd_key_event(const char *tab, int gdk_keycode, int qkeycode, const char *action) "tab=%s, translated GDK keycode %d to QKeyCode %d (%s)" @@ -25,7 +27,10 @@ gd_grab(const char *tab, const char *device, const char *reason) "tab=%s, dev=%s gd_ungrab(const char *tab, const char *device) "tab=%s, dev=%s" gd_keymap_windowing(const char *name) "backend=%s" -# ui/vnc.c +# vnc-auth-sasl.c +# vnc-ws.c +# vnc-auth-vencrypt.c +# vnc.c vnc_key_guest_leds(bool caps, bool num, bool scroll) "caps %d, num %d, scroll %d" vnc_key_map_init(const char *layout) "%s" vnc_key_event_ext(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x, keycode 0x%x [%s]" @@ -61,7 +66,7 @@ vnc_auth_sasl_username(void *state, const char *name) "VNC client auth SASL user vnc_auth_sasl_acl(void *state, int allow) "VNC client auth SASL ACL state=%p allow=%d" -# ui/input.c +# input.c input_event_key_number(int conidx, int number, const char *qcode, bool down) "con %d, key number 0x%x [%s], down %d" input_event_key_qcode(int conidx, const char *qcode, bool down) "con %d, key qcode %s, down %d" input_event_btn(int conidx, const char *btn, bool down) "con %d, button %s, down %d" @@ -70,7 +75,7 @@ input_event_abs(int conidx, const char *axis, int value) "con %d, axis %s, value input_event_sync(void) "" input_mouse_mode(int absolute) "absolute %d" -# ui/spice-display.c +# spice-display.c qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d" qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u" qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d" @@ -90,12 +95,12 @@ qemu_spice_gl_forward_dmabuf(int qid, uint32_t width, uint32_t height) "%d %dx%d qemu_spice_gl_render_dmabuf(int qid, uint32_t width, uint32_t height) "%d %dx%d" qemu_spice_gl_update(int qid, uint32_t x, uint32_t y, uint32_t w, uint32_t h) "%d +%d+%d %dx%d" -# ui/keymaps.c +# keymaps.c keymap_parse(const char *file) "file %s" keymap_add(int sym, int code, const char *line) "sym=0x%04x code=0x%04x (line: %s)" keymap_unmapped(int sym) "sym=0x%04x" -# ui/x_keymap.c +# x_keymap.c xkeymap_extension(const char *name) "extension '%s'" xkeymap_vendor(const char *name) "vendor '%s'" xkeymap_keycodes(const char *name) "keycodes '%s'" diff --git a/ui/vnc-enc-tight.c b/ui/vnc-enc-tight.c index 0b4a5ac71f..d20cd1d86d 100644 --- a/ui/vnc-enc-tight.c +++ b/ui/vnc-enc-tight.c @@ -886,11 +886,11 @@ static int tight_compress_data(VncState *vs, int stream_id, size_t bytes, */ static void tight_pack24(VncState *vs, uint8_t *buf, size_t count, size_t *ret) { - uint32_t *buf32; + uint8_t *buf8; uint32_t pix; int rshift, gshift, bshift; - buf32 = (uint32_t *)buf; + buf8 = buf; if (1 /* FIXME */) { rshift = vs->client_pf.rshift; @@ -907,10 +907,11 @@ static void tight_pack24(VncState *vs, uint8_t *buf, size_t count, size_t *ret) } while (count--) { - pix = *buf32++; + pix = ldl_he_p(buf8); *buf++ = (char)(pix >> rshift); *buf++ = (char)(pix >> gshift); *buf++ = (char)(pix >> bshift); + buf8 += 4; } } diff --git a/ui/vnc.c b/ui/vnc.c index 2d9e8f43b0..1871422e1d 100644 --- a/ui/vnc.c +++ b/ui/vnc.c @@ -1019,16 +1019,16 @@ static void vnc_update_throttle_offset(VncState *vs) int bps; switch (vs->as.fmt) { default: - case AUD_FMT_U8: - case AUD_FMT_S8: + case AUDIO_FORMAT_U8: + case AUDIO_FORMAT_S8: bps = 1; break; - case AUD_FMT_U16: - case AUD_FMT_S16: + case AUDIO_FORMAT_U16: + case AUDIO_FORMAT_S16: bps = 2; break; - case AUD_FMT_U32: - case AUD_FMT_S32: + case AUDIO_FORMAT_U32: + case AUDIO_FORMAT_S32: bps = 4; break; } @@ -2375,12 +2375,12 @@ static int protocol_client_msg(VncState *vs, uint8_t *data, size_t len) if (len == 4) return 10; switch (read_u8(data, 4)) { - case 0: vs->as.fmt = AUD_FMT_U8; break; - case 1: vs->as.fmt = AUD_FMT_S8; break; - case 2: vs->as.fmt = AUD_FMT_U16; break; - case 3: vs->as.fmt = AUD_FMT_S16; break; - case 4: vs->as.fmt = AUD_FMT_U32; break; - case 5: vs->as.fmt = AUD_FMT_S32; break; + case 0: vs->as.fmt = AUDIO_FORMAT_U8; break; + case 1: vs->as.fmt = AUDIO_FORMAT_S8; break; + case 2: vs->as.fmt = AUDIO_FORMAT_U16; break; + case 3: vs->as.fmt = AUDIO_FORMAT_S16; break; + case 4: vs->as.fmt = AUDIO_FORMAT_U32; break; + case 5: vs->as.fmt = AUDIO_FORMAT_S32; break; default: VNC_DEBUG("Invalid audio format %d\n", read_u8(data, 4)); vnc_client_error(vs); @@ -3111,7 +3111,7 @@ static void vnc_connect(VncDisplay *vd, QIOChannelSocket *sioc, vs->as.freq = 44100; vs->as.nchannels = 2; - vs->as.fmt = AUD_FMT_S16; + vs->as.fmt = AUDIO_FORMAT_S16; vs->as.endianness = 0; qemu_mutex_init(&vs->output_mutex); diff --git a/util/Makefile.objs b/util/Makefile.objs index 835fcd69e2..9206878dec 100644 --- a/util/Makefile.objs +++ b/util/Makefile.objs @@ -23,6 +23,7 @@ util-obj-y += bitmap.o bitops.o hbitmap.o util-obj-y += fifo8.o util-obj-y += cacheinfo.o util-obj-y += error.o qemu-error.o +util-obj-y += qemu-print.o util-obj-y += id.o util-obj-y += iov.o qemu-config.o qemu-sockets.o uri.o notify.o util-obj-y += qemu-option.o qemu-progress.o diff --git a/util/cutils.c b/util/cutils.c index e098debdc0..d682c90901 100644 --- a/util/cutils.c +++ b/util/cutils.c @@ -825,7 +825,7 @@ const char *qemu_ether_ntoa(const MACAddr *mac) char *size_to_str(uint64_t val) { static const char *suffixes[] = { "", "Ki", "Mi", "Gi", "Ti", "Pi", "Ei" }; - unsigned long div; + uint64_t div; int i; /* diff --git a/util/error.c b/util/error.c index b5ccbd8eac..ea6d1a3d7e 100644 --- a/util/error.c +++ b/util/error.c @@ -34,7 +34,10 @@ static void error_handle_fatal(Error **errp, Error *err) if (errp == &error_abort) { fprintf(stderr, "Unexpected error in %s() at %s:%d:\n", err->func, err->src, err->line); - error_report_err(err); + error_report("%s", error_get_pretty(err)); + if (err->hint) { + error_printf("%s", err->hint->str); + } abort(); } if (errp == &error_fatal) { @@ -103,10 +106,6 @@ void error_setg_errno_internal(Error **errp, va_list ap; int saved_errno = errno; - if (errp == NULL) { - return; - } - va_start(ap, fmt); error_setv(errp, src, line, func, ERROR_CLASS_GENERIC_ERROR, fmt, ap, os_errno != 0 ? strerror(os_errno) : NULL); @@ -227,7 +226,7 @@ void error_report_err(Error *err) { error_report("%s", error_get_pretty(err)); if (err->hint) { - error_printf_unless_qmp("%s", err->hint->str); + error_printf("%s", err->hint->str); } error_free(err); } @@ -236,7 +235,7 @@ void warn_report_err(Error *err) { warn_report("%s", error_get_pretty(err)); if (err->hint) { - error_printf_unless_qmp("%s", err->hint->str); + error_printf("%s", err->hint->str); } error_free(err); } diff --git a/util/filemonitor-inotify.c b/util/filemonitor-inotify.c index 3a72be037f..b5f4b93f3f 100644 --- a/util/filemonitor-inotify.c +++ b/util/filemonitor-inotify.c @@ -29,7 +29,6 @@ struct QFileMonitor { int fd; - QemuMutex lock; /* protects dirs & idmap */ GHashTable *dirs; /* dirname => QFileMonitorDir */ GHashTable *idmap; /* inotify ID => dirname */ @@ -37,7 +36,7 @@ struct QFileMonitor { typedef struct { - int id; /* watch ID */ + int64_t id; /* watch ID */ char *filename; /* optional filter */ QFileMonitorHandler cb; void *opaque; @@ -46,8 +45,8 @@ typedef struct { typedef struct { char *path; - int id; /* inotify ID */ - int nextid; /* watch ID counter */ + int inotify_id; /* inotify ID */ + int next_file_id; /* file ID counter */ GArray *watches; /* QFileMonitorWatch elements */ } QFileMonitorDir; @@ -127,7 +126,8 @@ static void qemu_file_monitor_watch(void *arg) g_assert_not_reached(); } - trace_qemu_file_monitor_event(mon, dir->path, name, ev->mask, dir->id); + trace_qemu_file_monitor_event(mon, dir->path, name, ev->mask, + dir->inotify_id); for (i = 0; i < dir->watches->len; i++) { QFileMonitorWatch *watch = &g_array_index(dir->watches, QFileMonitorWatch, @@ -238,7 +238,7 @@ qemu_file_monitor_free(QFileMonitor *mon) g_idle_add((GSourceFunc)qemu_file_monitor_free_idle, mon); } -int +int64_t qemu_file_monitor_add_watch(QFileMonitor *mon, const char *dirpath, const char *filename, @@ -248,7 +248,7 @@ qemu_file_monitor_add_watch(QFileMonitor *mon, { QFileMonitorDir *dir; QFileMonitorWatch watch; - int ret = -1; + int64_t ret = -1; qemu_mutex_lock(&mon->lock); dir = g_hash_table_lookup(mon->dirs, dirpath); @@ -266,7 +266,7 @@ qemu_file_monitor_add_watch(QFileMonitor *mon, dir = g_new0(QFileMonitorDir, 1); dir->path = g_strdup(dirpath); - dir->id = rv; + dir->inotify_id = rv; dir->watches = g_array_new(FALSE, TRUE, sizeof(QFileMonitorWatch)); g_hash_table_insert(mon->dirs, dir->path, dir); @@ -277,7 +277,7 @@ qemu_file_monitor_add_watch(QFileMonitor *mon, } } - watch.id = dir->nextid++; + watch.id = (((int64_t)dir->inotify_id) << 32) | dir->next_file_id++; watch.filename = g_strdup(filename); watch.cb = cb; watch.opaque = opaque; @@ -298,7 +298,7 @@ qemu_file_monitor_add_watch(QFileMonitor *mon, void qemu_file_monitor_remove_watch(QFileMonitor *mon, const char *dirpath, - int id) + int64_t id) { QFileMonitorDir *dir; gsize i; @@ -323,10 +323,10 @@ void qemu_file_monitor_remove_watch(QFileMonitor *mon, } if (dir->watches->len == 0) { - inotify_rm_watch(mon->fd, dir->id); - trace_qemu_file_monitor_disable_watch(mon, dir->path, dir->id); + inotify_rm_watch(mon->fd, dir->inotify_id); + trace_qemu_file_monitor_disable_watch(mon, dir->path, dir->inotify_id); - g_hash_table_remove(mon->idmap, GINT_TO_POINTER(dir->id)); + g_hash_table_remove(mon->idmap, GINT_TO_POINTER(dir->inotify_id)); g_hash_table_remove(mon->dirs, dir->path); if (g_hash_table_size(mon->dirs) == 0) { diff --git a/util/filemonitor-stub.c b/util/filemonitor-stub.c index 48268b2bb6..2c0e97edd8 100644 --- a/util/filemonitor-stub.c +++ b/util/filemonitor-stub.c @@ -38,7 +38,7 @@ qemu_file_monitor_free(QFileMonitor *mon G_GNUC_UNUSED) } -int +int64_t qemu_file_monitor_add_watch(QFileMonitor *mon G_GNUC_UNUSED, const char *dirpath G_GNUC_UNUSED, const char *filename G_GNUC_UNUSED, @@ -54,6 +54,6 @@ qemu_file_monitor_add_watch(QFileMonitor *mon G_GNUC_UNUSED, void qemu_file_monitor_remove_watch(QFileMonitor *mon G_GNUC_UNUSED, const char *dirpath G_GNUC_UNUSED, - int id G_GNUC_UNUSED) + int64_t id G_GNUC_UNUSED) { } diff --git a/util/memfd.c b/util/memfd.c index 8debd0d037..00334e5b21 100644 --- a/util/memfd.c +++ b/util/memfd.c @@ -40,6 +40,7 @@ static int memfd_create(const char *name, unsigned int flags) #ifdef __NR_memfd_create return syscall(__NR_memfd_create, name, flags); #else + errno = ENOSYS; return -1; #endif } @@ -70,14 +71,18 @@ int qemu_memfd_create(const char *name, size_t size, bool hugetlb, } mfd = memfd_create(name, flags); if (mfd < 0) { + error_setg_errno(errp, errno, + "failed to create memfd with flags 0x%x", flags); goto err; } if (ftruncate(mfd, size) == -1) { + error_setg_errno(errp, errno, "failed to resize memfd to %zu", size); goto err; } if (seals && fcntl(mfd, F_ADD_SEALS, seals) == -1) { + error_setg_errno(errp, errno, "failed to add seals 0x%x", seals); goto err; } @@ -87,8 +92,9 @@ err: if (mfd >= 0) { close(mfd); } +#else + error_setg_errno(errp, ENOSYS, "failed to create memfd"); #endif - error_setg_errno(errp, errno, "failed to create memfd"); return -1; } @@ -188,7 +194,7 @@ bool qemu_memfd_alloc_check(void) bool qemu_memfd_check(unsigned int flags) { #ifdef CONFIG_LINUX - int mfd = memfd_create("test", flags); + int mfd = memfd_create("test", flags | MFD_CLOEXEC); if (mfd >= 0) { close(mfd); diff --git a/util/mmap-alloc.c b/util/mmap-alloc.c index 8565885420..f7f177d0ea 100644 --- a/util/mmap-alloc.c +++ b/util/mmap-alloc.c @@ -10,6 +10,13 @@ * later. See the COPYING file in the top-level directory. */ +#ifdef CONFIG_LINUX +#include <linux/mman.h> +#else /* !CONFIG_LINUX */ +#define MAP_SYNC 0x0 +#define MAP_SHARED_VALIDATE 0x0 +#endif /* CONFIG_LINUX */ + #include "qemu/osdep.h" #include "qemu/mmap-alloc.h" #include "qemu/host-utils.h" @@ -75,9 +82,14 @@ size_t qemu_mempath_getpagesize(const char *mem_path) return getpagesize(); } -void *qemu_ram_mmap(int fd, size_t size, size_t align, bool shared) +void *qemu_ram_mmap(int fd, + size_t size, + size_t align, + bool shared, + bool is_pmem) { int flags; + int map_sync_flags = 0; int guardfd; size_t offset; size_t pagesize; @@ -128,9 +140,40 @@ void *qemu_ram_mmap(int fd, size_t size, size_t align, bool shared) flags = MAP_FIXED; flags |= fd == -1 ? MAP_ANONYMOUS : 0; flags |= shared ? MAP_SHARED : MAP_PRIVATE; + if (shared && is_pmem) { + map_sync_flags = MAP_SYNC | MAP_SHARED_VALIDATE; + } + offset = QEMU_ALIGN_UP((uintptr_t)guardptr, align) - (uintptr_t)guardptr; - ptr = mmap(guardptr + offset, size, PROT_READ | PROT_WRITE, flags, fd, 0); + ptr = mmap(guardptr + offset, size, PROT_READ | PROT_WRITE, + flags | map_sync_flags, fd, 0); + + if (ptr == MAP_FAILED && map_sync_flags) { + if (errno == ENOTSUP) { + char *proc_link, *file_name; + int len; + proc_link = g_strdup_printf("/proc/self/fd/%d", fd); + file_name = g_malloc0(PATH_MAX); + len = readlink(proc_link, file_name, PATH_MAX - 1); + if (len < 0) { + len = 0; + } + file_name[len] = '\0'; + fprintf(stderr, "Warning: requesting persistence across crashes " + "for backend file %s failed. Proceeding without " + "persistence, data might become corrupted in case of host " + "crash.\n", file_name); + g_free(proc_link); + g_free(file_name); + } + /* + * if map failed with MAP_SHARED_VALIDATE | MAP_SYNC, + * we will remove these flags to handle compatibility. + */ + ptr = mmap(guardptr + offset, size, PROT_READ | PROT_WRITE, + flags, fd, 0); + } if (ptr == MAP_FAILED) { munmap(guardptr, total); diff --git a/util/oslib-posix.c b/util/oslib-posix.c index 326d92dcd2..d97b1717d5 100644 --- a/util/oslib-posix.c +++ b/util/oslib-posix.c @@ -203,7 +203,7 @@ void *qemu_memalign(size_t alignment, size_t size) void *qemu_anon_ram_alloc(size_t size, uint64_t *alignment, bool shared) { size_t align = QEMU_VMALLOC_ALIGN; - void *ptr = qemu_ram_mmap(-1, size, align, shared); + void *ptr = qemu_ram_mmap(-1, size, align, shared, false); if (ptr == MAP_FAILED) { return NULL; @@ -512,6 +512,59 @@ void os_mem_prealloc(int fd, char *area, size_t memory, int smp_cpus, } } +uint64_t qemu_get_pmem_size(const char *filename, Error **errp) +{ + struct stat st; + + if (stat(filename, &st) < 0) { + error_setg(errp, "unable to stat pmem file \"%s\"", filename); + return 0; + } + +#if defined(__linux__) + /* Special handling for devdax character devices */ + if (S_ISCHR(st.st_mode)) { + char *subsystem_path = NULL; + char *subsystem = NULL; + char *size_path = NULL; + char *size_str = NULL; + uint64_t ret = 0; + + subsystem_path = g_strdup_printf("/sys/dev/char/%d:%d/subsystem", + major(st.st_rdev), minor(st.st_rdev)); + subsystem = g_file_read_link(subsystem_path, NULL); + if (!subsystem) { + error_setg(errp, "unable to read subsystem for pmem file \"%s\"", + filename); + goto devdax_err; + } + + if (!g_str_has_suffix(subsystem, "/dax")) { + error_setg(errp, "pmem file \"%s\" is not a dax device", filename); + goto devdax_err; + } + + size_path = g_strdup_printf("/sys/dev/char/%d:%d/size", + major(st.st_rdev), minor(st.st_rdev)); + if (!g_file_get_contents(size_path, &size_str, NULL, NULL)) { + error_setg(errp, "unable to read size for pmem file \"%s\"", + size_path); + goto devdax_err; + } + + ret = g_ascii_strtoull(size_str, NULL, 0); + +devdax_err: + g_free(size_str); + g_free(size_path); + g_free(subsystem); + g_free(subsystem_path); + return ret; + } +#endif /* defined(__linux__) */ + + return st.st_size; +} char *qemu_get_pid_name(pid_t pid) { diff --git a/util/oslib-win32.c b/util/oslib-win32.c index b4c17f5dfa..bd633afab6 100644 --- a/util/oslib-win32.c +++ b/util/oslib-win32.c @@ -560,6 +560,11 @@ void os_mem_prealloc(int fd, char *area, size_t memory, int smp_cpus, } } +uint64_t qemu_get_pmem_size(const char *filename, Error **errp) +{ + error_setg(errp, "pmem support not available"); + return 0; +} char *qemu_get_pid_name(pid_t pid) { diff --git a/util/qemu-error.c b/util/qemu-error.c index fcbe8a1f74..f373f3b3b0 100644 --- a/util/qemu-error.c +++ b/util/qemu-error.c @@ -24,22 +24,26 @@ typedef enum { REPORT_TYPE_INFO, } report_type; -void error_printf(const char *fmt, ...) +int error_printf(const char *fmt, ...) { va_list ap; + int ret; va_start(ap, fmt); - error_vprintf(fmt, ap); + ret = error_vprintf(fmt, ap); va_end(ap); + return ret; } -void error_printf_unless_qmp(const char *fmt, ...) +int error_printf_unless_qmp(const char *fmt, ...) { va_list ap; + int ret; va_start(ap, fmt); - error_vprintf_unless_qmp(fmt, ap); + ret = error_vprintf_unless_qmp(fmt, ap); va_end(ap); + return ret; } static Location std_loc = { @@ -142,7 +146,7 @@ static const char *progname; /* * Set the program name for error_print_loc(). */ -void error_set_progname(const char *argv0) +static void error_set_progname(const char *argv0) { const char *p = strrchr(argv0, '/'); progname = p ? p + 1 : argv0; @@ -345,3 +349,56 @@ bool warn_report_once_cond(bool *printed, const char *fmt, ...) va_end(ap); return true; } + +static char *qemu_glog_domains; + +static void qemu_log_func(const gchar *log_domain, + GLogLevelFlags log_level, + const gchar *message, + gpointer user_data) +{ + switch (log_level & G_LOG_LEVEL_MASK) { + case G_LOG_LEVEL_DEBUG: + case G_LOG_LEVEL_INFO: + /* + * Use same G_MESSAGES_DEBUG logic as glib to enable/disable debug + * messages + */ + if (qemu_glog_domains == NULL) { + break; + } + if (strcmp(qemu_glog_domains, "all") != 0 && + (log_domain == NULL || !strstr(qemu_glog_domains, log_domain))) { + break; + } + /* Fall through */ + case G_LOG_LEVEL_MESSAGE: + info_report("%s%s%s", + log_domain ?: "", log_domain ? ": " : "", message); + + break; + case G_LOG_LEVEL_WARNING: + warn_report("%s%s%s", + log_domain ?: "", log_domain ? ": " : "", message); + break; + case G_LOG_LEVEL_CRITICAL: + case G_LOG_LEVEL_ERROR: + error_report("%s%s%s", + log_domain ?: "", log_domain ? ": " : "", message); + break; + } +} + +void error_init(const char *argv0) +{ + /* Set the program name for error_print_loc(). */ + error_set_progname(argv0); + + /* + * This sets up glib logging so libraries using it also print their logs + * through error_report(), warn_report(), info_report(). + */ + g_log_set_default_handler(qemu_log_func, NULL); + g_warn_if_fail(qemu_glog_domains == NULL); + qemu_glog_domains = g_strdup(g_getenv("G_MESSAGES_DEBUG")); +} diff --git a/util/qemu-print.c b/util/qemu-print.c new file mode 100644 index 0000000000..e79d6b8396 --- /dev/null +++ b/util/qemu-print.c @@ -0,0 +1,69 @@ +/* + * Print to stream or current monitor + * + * Copyright (C) 2019 Red Hat Inc. + * + * Authors: + * Markus Armbruster <armbru@redhat.com>, + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "monitor/monitor.h" +#include "qemu/qemu-print.h" + +/* + * Print like vprintf(). + * Print to current monitor if we have one, else to stdout. + */ +int qemu_vprintf(const char *fmt, va_list ap) +{ + if (cur_mon) { + return monitor_vprintf(cur_mon, fmt, ap); + } + return vprintf(fmt, ap); +} + +/* + * Print like printf(). + * Print to current monitor if we have one, else to stdout. + */ +int qemu_printf(const char *fmt, ...) +{ + va_list ap; + int ret; + + va_start(ap, fmt); + ret = qemu_vprintf(fmt, ap); + va_end(ap); + return ret; +} + +/* + * Print like vfprintf() + * Print to @stream if non-null, else to current monitor. + */ +int qemu_vfprintf(FILE *stream, const char *fmt, va_list ap) +{ + if (!stream) { + return monitor_vprintf(cur_mon, fmt, ap); + } + return vfprintf(stream, fmt, ap); +} + +/* + * Print like fprintf(). + * Print to @stream if non-null, else to current monitor. + */ +int qemu_fprintf(FILE *stream, const char *fmt, ...) +{ + va_list ap; + int ret; + + va_start(ap, fmt); + ret = qemu_vfprintf(stream, fmt, ap); + va_end(ap); + return ret; +} diff --git a/util/qsp.c b/util/qsp.c index 410f1ba004..5264c97342 100644 --- a/util/qsp.c +++ b/util/qsp.c @@ -56,7 +56,9 @@ * Critical-Section Execution to Improve the Performance of Multithreaded * Applications", USENIX ATC'12. */ + #include "qemu/osdep.h" +#include "qemu/qemu-print.h" #include "qemu/thread.h" #include "qemu/timer.h" #include "qemu/qht.h" @@ -678,8 +680,7 @@ static gboolean qsp_tree_report(gpointer key, gpointer value, gpointer udata) return FALSE; } -static void -pr_report(const QSPReport *rep, FILE *f, fprintf_function pr) +static void pr_report(const QSPReport *rep) { char *dashes; size_t max_len = 0; @@ -702,15 +703,15 @@ pr_report(const QSPReport *rep, FILE *f, fprintf_function pr) /* white space to leave to the right of "Call site" */ callsite_rspace = callsite_len - strlen("Call site"); - pr(f, "Type Object Call site%*s Wait Time (s) " - " Count Average (us)\n", callsite_rspace, ""); + qemu_printf("Type Object Call site%*s Wait Time (s) " + " Count Average (us)\n", callsite_rspace, ""); /* build a horizontal rule with dashes */ n_dashes = 79 + callsite_rspace; dashes = g_malloc(n_dashes + 1); memset(dashes, '-', n_dashes); dashes[n_dashes] = '\0'; - pr(f, "%s\n", dashes); + qemu_printf("%s\n", dashes); for (i = 0; i < rep->n_entries; i++) { const QSPReportEntry *e = &rep->entries[i]; @@ -726,11 +727,11 @@ pr_report(const QSPReport *rep, FILE *f, fprintf_function pr) e->callsite_at, callsite_len - (int)strlen(e->callsite_at), "", e->time_s, e->n_acqs, e->ns_avg * 1e-3); - pr(f, "%s", s->str); + qemu_printf("%s", s->str); g_string_free(s, TRUE); } - pr(f, "%s\n", dashes); + qemu_printf("%s\n", dashes); g_free(dashes); } @@ -746,8 +747,8 @@ static void report_destroy(QSPReport *rep) g_free(rep->entries); } -void qsp_report(FILE *f, fprintf_function cpu_fprintf, size_t max, - enum QSPSortBy sort_by, bool callsite_coalesce) +void qsp_report(size_t max, enum QSPSortBy sort_by, + bool callsite_coalesce) { GTree *tree = g_tree_new_full(qsp_tree_cmp, &sort_by, g_free, NULL); QSPReport rep; @@ -762,7 +763,7 @@ void qsp_report(FILE *f, fprintf_function cpu_fprintf, size_t max, g_tree_foreach(tree, qsp_tree_report, &rep); g_tree_destroy(tree); - pr_report(&rep, f, cpu_fprintf); + pr_report(&rep); report_destroy(&rep); } diff --git a/util/trace-events b/util/trace-events index ff19b253e2..9dbd237dad 100644 --- a/util/trace-events +++ b/util/trace-events @@ -1,61 +1,60 @@ # See docs/devel/tracing.txt for syntax documentation. -# util/aio-posix.c +# aio-posix.c run_poll_handlers_begin(void *ctx, int64_t max_ns, int64_t timeout) "ctx %p max_ns %"PRId64 " timeout %"PRId64 run_poll_handlers_end(void *ctx, bool progress, int64_t timeout) "ctx %p progress %d new timeout %"PRId64 poll_shrink(void *ctx, int64_t old, int64_t new) "ctx %p old %"PRId64" new %"PRId64 poll_grow(void *ctx, int64_t old, int64_t new) "ctx %p old %"PRId64" new %"PRId64 -# util/async.c +# async.c aio_co_schedule(void *ctx, void *co) "ctx %p co %p" aio_co_schedule_bh_cb(void *ctx, void *co) "ctx %p co %p" -# util/thread-pool.c +# thread-pool.c thread_pool_submit(void *pool, void *req, void *opaque) "pool %p req %p opaque %p" thread_pool_complete(void *pool, void *req, void *opaque, int ret) "pool %p req %p opaque %p ret %d" thread_pool_cancel(void *req, void *opaque) "req %p opaque %p" -# util/buffer.c +# buffer.c buffer_resize(const char *buf, size_t olen, size_t len) "%s: old %zd, new %zd" buffer_move_empty(const char *buf, size_t len, const char *from) "%s: %zd bytes from %s" buffer_move(const char *buf, size_t len, const char *from) "%s: %zd bytes from %s" buffer_free(const char *buf, size_t len) "%s: capacity %zd" -# util/filemonitor.c -qemu_file_monitor_add_watch(void *mon, const char *dirpath, const char *filename, void *cb, void *opaque, int id) "File monitor %p add watch dir='%s' file='%s' cb=%p opaque=%p id=%u" -qemu_file_monitor_remove_watch(void *mon, const char *dirpath, int id) "File monitor %p remove watch dir='%s' id=%u" +# filemonitor-inotify.c +qemu_file_monitor_add_watch(void *mon, const char *dirpath, const char *filename, void *cb, void *opaque, int64_t id) "File monitor %p add watch dir='%s' file='%s' cb=%p opaque=%p id=%" PRId64 +qemu_file_monitor_remove_watch(void *mon, const char *dirpath, int64_t id) "File monitor %p remove watch dir='%s' id=%" PRId64 qemu_file_monitor_new(void *mon, int fd) "File monitor %p created fd=%d" qemu_file_monitor_enable_watch(void *mon, const char *dirpath, int id) "File monitor %p enable watch dir='%s' id=%u" qemu_file_monitor_disable_watch(void *mon, const char *dirpath, int id) "Fle monitor %p disable watch dir='%s' id=%u" qemu_file_monitor_event(void *mon, const char *dirpath, const char *filename, int mask, unsigned int id) "File monitor %p event dir='%s' file='%s' mask=0x%x id=%u" -qemu_file_monitor_dispatch(void *mon, const char *dirpath, const char *filename, int ev, void *cb, void *opaque, unsigned int id) "File monitor %p dispatch dir='%s' file='%s' ev=%d cb=%p opaque=%p id=%u" +qemu_file_monitor_dispatch(void *mon, const char *dirpath, const char *filename, int ev, void *cb, void *opaque, int64_t id) "File monitor %p dispatch dir='%s' file='%s' ev=%d cb=%p opaque=%p id=%" PRId64 -# util/qemu-coroutine.c +# qemu-coroutine.c qemu_aio_coroutine_enter(void *ctx, void *from, void *to, void *opaque) "ctx %p from %p to %p opaque %p" qemu_coroutine_yield(void *from, void *to) "from %p to %p" qemu_coroutine_terminate(void *co) "self %p" -# util/qemu-coroutine-lock.c -qemu_co_queue_run_restart(void *co) "co %p" +# qemu-coroutine-lock.c qemu_co_mutex_lock_uncontended(void *mutex, void *self) "mutex %p self %p" qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p" qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p" qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p" qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p" -# util/oslib-win32.c -# util/oslib-posix.c +# oslib-win32.c +# oslib-posix.c qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p" qemu_anon_ram_alloc(size_t size, void *ptr) "size %zu ptr %p" qemu_vfree(void *ptr) "ptr %p" qemu_anon_ram_free(void *ptr, size_t size) "ptr %p size %zu" -# util/hbitmap.c +# hbitmap.c hbitmap_iter_skip_words(const void *hb, void *hbi, uint64_t pos, unsigned long cur) "hb %p hbi %p pos %"PRId64" cur 0x%lx" hbitmap_reset(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64 hbitmap_set(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) "hb %p items %"PRIu64",%"PRIu64" bits %"PRIu64"..%"PRIu64 -# util/lockcnt.c +# lockcnt.c lockcnt_fast_path_attempt(const void *lockcnt, int expected, int new) "lockcnt %p fast path %d->%d" lockcnt_fast_path_success(const void *lockcnt, int expected, int new) "lockcnt %p fast path %d->%d succeeded" lockcnt_unlock_attempt(const void *lockcnt, int expected, int new) "lockcnt %p unlock %d->%d" @@ -65,12 +64,12 @@ lockcnt_futex_wait(const void *lockcnt, int val) "lockcnt %p waiting on %d" lockcnt_futex_wait_resume(const void *lockcnt, int new) "lockcnt %p after wait: %d" lockcnt_futex_wake(const void *lockcnt) "lockcnt %p waking up one waiter" -# util/qemu-thread.c +# qemu-thread-common.h qemu_mutex_lock(void *mutex, const char *file, const int line) "waiting on mutex %p (%s:%d)" qemu_mutex_locked(void *mutex, const char *file, const int line) "taken mutex %p (%s:%d)" qemu_mutex_unlock(void *mutex, const char *file, const int line) "released mutex %p (%s:%d)" -# util/vfio-helpers.c +# vfio-helpers.c qemu_vfio_dma_reset_temporary(void *s) "s %p" qemu_vfio_ram_block_added(void *s, void *p, size_t size) "s %p host %p size 0x%zx" qemu_vfio_ram_block_removed(void *s, void *p, size_t size) "s %p host %p size 0x%zx" @@ -78,5 +77,4 @@ qemu_vfio_find_mapping(void *s, void *p) "s %p host %p" qemu_vfio_new_mapping(void *s, void *host, size_t size, int index, uint64_t iova) "s %p host %p size %zu index %d iova 0x%"PRIx64 qemu_vfio_do_mapping(void *s, void *host, size_t size, uint64_t iova) "s %p host %p size %zu iova 0x%"PRIx64 qemu_vfio_dma_map(void *s, void *host, size_t size, bool temporary, uint64_t *iova) "s %p host %p size %zu temporary %d iova %p" -qemu_vfio_dma_map_invalid(void *s, void *mapping_host, size_t mapping_size, void *host, size_t size) "s %p mapping %p %zu requested %p %zu" qemu_vfio_dma_unmap(void *s, void *host) "s %p host %p" diff --git a/vl.c b/vl.c index 5616208ea0..d9fea0a119 100644 --- a/vl.c +++ b/vl.c @@ -185,6 +185,7 @@ const char *prom_envs[MAX_PROM_ENVS]; int boot_menu; bool boot_strict; uint8_t *boot_splash_filedata; +int only_migratable; /* turn it off unless user states otherwise */ bool wakeup_suspend_enabled; int icount_align_option; @@ -724,7 +725,7 @@ void runstate_set(RunState new_state) assert(new_state < RUN_STATE__MAX); trace_runstate_set(current_run_state, RunState_str(current_run_state), - new_state, RunState_str(current_run_state)); + new_state, RunState_str(new_state)); if (current_run_state == new_state) { return; @@ -1464,45 +1465,34 @@ static int usb_parse(const char *cmdline) MachineState *current_machine; -static MachineClass *find_machine(const char *name) +static MachineClass *find_machine(const char *name, GSList *machines) { - GSList *el, *machines = object_class_get_list(TYPE_MACHINE, false); - MachineClass *mc = NULL; + GSList *el; for (el = machines; el; el = el->next) { - MachineClass *temp = el->data; + MachineClass *mc = el->data; - if (!strcmp(temp->name, name)) { - mc = temp; - break; - } - if (temp->alias && - !strcmp(temp->alias, name)) { - mc = temp; - break; + if (!strcmp(mc->name, name) || !g_strcmp0(mc->alias, name)) { + return mc; } } - g_slist_free(machines); - return mc; + return NULL; } -MachineClass *find_default_machine(void) +static MachineClass *find_default_machine(GSList *machines) { - GSList *el, *machines = object_class_get_list(TYPE_MACHINE, false); - MachineClass *mc = NULL; + GSList *el; for (el = machines; el; el = el->next) { - MachineClass *temp = el->data; + MachineClass *mc = el->data; - if (temp->is_default) { - mc = temp; - break; + if (mc->is_default) { + return mc; } } - g_slist_free(machines); - return mc; + return NULL; } MachineInfoList *qmp_query_machines(Error **errp) @@ -1555,12 +1545,12 @@ static int machine_help_func(QemuOpts *opts, MachineState *machine) continue; } - error_printf("%s.%s=%s", MACHINE_GET_CLASS(machine)->name, - prop->name, prop->type); + printf("%s.%s=%s", MACHINE_GET_CLASS(machine)->name, + prop->name, prop->type); if (prop->description) { - error_printf(" (%s)\n", prop->description); + printf(" (%s)\n", prop->description); } else { - error_printf("\n"); + printf("\n"); } } @@ -2584,22 +2574,12 @@ static gint machine_class_cmp(gconstpointer a, gconstpointer b) object_class_get_name(OBJECT_CLASS(mc1))); } - static MachineClass *machine_parse(const char *name) +static MachineClass *machine_parse(const char *name, GSList *machines) { - MachineClass *mc = NULL; - GSList *el, *machines = object_class_get_list(TYPE_MACHINE, false); + MachineClass *mc; + GSList *el; - if (name) { - mc = find_machine(name); - } - if (mc) { - g_slist_free(machines); - return mc; - } - if (name && !is_help_option(name)) { - error_report("unsupported machine type"); - error_printf("Use -machine help to list supported machines\n"); - } else { + if (is_help_option(name)) { printf("Supported machines are:\n"); machines = g_slist_sort(machines, machine_class_cmp); for (el = machines; el; el = el->next) { @@ -2611,10 +2591,16 @@ static gint machine_class_cmp(gconstpointer a, gconstpointer b) mc->is_default ? " (default)" : "", mc->deprecation_reason ? " (deprecated)" : ""); } + exit(0); } - g_slist_free(machines); - exit(!name || !is_help_option(name)); + mc = find_machine(name, machines); + if (!mc) { + error_report("unsupported machine type"); + error_printf("Use -machine help to list supported machines\n"); + exit(1); + } + return mc; } void qemu_add_exit_notifier(Notifier *notify) @@ -2705,7 +2691,8 @@ static const QEMUOption *lookup_opt(int argc, char **argv, static MachineClass *select_machine(void) { - MachineClass *machine_class = find_default_machine(); + GSList *machines = object_class_get_list(TYPE_MACHINE, false); + MachineClass *machine_class = find_default_machine(machines); const char *optarg; QemuOpts *opts; Location loc; @@ -2717,7 +2704,7 @@ static MachineClass *select_machine(void) optarg = qemu_opt_get(opts, "type"); if (optarg) { - machine_class = machine_parse(optarg); + machine_class = machine_parse(optarg, machines); } if (!machine_class) { @@ -2727,6 +2714,7 @@ static MachineClass *select_machine(void) } loc_pop(&loc); + g_slist_free(machines); return machine_class; } @@ -3001,7 +2989,7 @@ int main(int argc, char **argv, char **envp) const char *optarg; const char *loadvm = NULL; MachineClass *machine_class; - const char *cpu_model; + const char *cpu_option; const char *vga_model = NULL; const char *qtest_chrdev = NULL; const char *qtest_log = NULL; @@ -3021,6 +3009,7 @@ int main(int argc, char **argv, char **envp) char *dir, **dirs; BlockdevOptionsQueue bdo_queue = QSIMPLEQ_HEAD_INITIALIZER(bdo_queue); + error_init(argv[0]); module_call_init(MODULE_INIT_TRACE); qemu_init_cpu_list(); @@ -3029,7 +3018,6 @@ int main(int argc, char **argv, char **envp) qemu_mutex_lock_iothread(); atexit(qemu_run_exit_notifiers); - error_set_progname(argv[0]); qemu_init_exec_dir(argv[0]); module_call_init(MODULE_INIT_QOM); @@ -3080,7 +3068,7 @@ int main(int argc, char **argv, char **envp) QLIST_INIT (&vm_change_state_head); os_setup_early_signal_handling(); - cpu_model = NULL; + cpu_option = NULL; snapshot = 0; nb_nics = 0; @@ -3119,6 +3107,7 @@ int main(int argc, char **argv, char **envp) if (optind >= argc) break; if (argv[optind][0] != '-') { + loc_set_cmdline(argv, optind, 1); drive_add(IF_DEFAULT, 0, argv[optind++], HD_OPTS); } else { const QEMUOption *popt; @@ -3131,7 +3120,7 @@ int main(int argc, char **argv, char **envp) switch(popt->index) { case QEMU_OPTION_cpu: /* hw initialization will check this */ - cpu_model = optarg; + cpu_option = optarg; break; case QEMU_OPTION_hda: case QEMU_OPTION_hdb: @@ -3201,7 +3190,7 @@ int main(int argc, char **argv, char **envp) #ifdef CONFIG_CURSES dpy.type = DISPLAY_TYPE_CURSES; #else - error_report("curses support is disabled"); + error_report("curses or iconv support is disabled"); exit(1); #endif break; @@ -3285,9 +3274,12 @@ int main(int argc, char **argv, char **envp) add_device_config(DEV_BT, optarg); break; case QEMU_OPTION_audio_help: - AUD_help (); + audio_legacy_help(); exit (0); break; + case QEMU_OPTION_audiodev: + audio_parse_option(optarg); + break; case QEMU_OPTION_soundhw: select_soundhw (optarg); break; @@ -3638,7 +3630,7 @@ int main(int argc, char **argv, char **envp) optarg, true); optarg = qemu_opt_get(accel_opts, "accel"); if (!optarg || is_help_option(optarg)) { - error_printf("Possible accelerators: kvm, xen, hax, tcg\n"); + printf("Possible accelerators: kvm, xen, hax, tcg\n"); exit(0); } opts = qemu_opts_create(qemu_find_opts("machine"), NULL, @@ -3796,13 +3788,7 @@ int main(int argc, char **argv, char **envp) incoming = optarg; break; case QEMU_OPTION_only_migratable: - /* - * TODO: we can remove this option one day, and we - * should all use: - * - * "-global migration.only-migratable=true" - */ - qemu_global_option("migration.only-migratable=true"); + only_migratable = 1; break; case QEMU_OPTION_nodefaults: has_defaults = 0; @@ -4051,8 +4037,8 @@ int main(int argc, char **argv, char **envp) qemu_set_hw_version(machine_class->hw_version); } - if (cpu_model && is_help_option(cpu_model)) { - list_cpus(stdout, &fprintf, cpu_model); + if (cpu_option && is_help_option(cpu_option)) { + list_cpus(cpu_option); exit(0); } @@ -4287,16 +4273,36 @@ int main(int argc, char **argv, char **envp) current_machine->maxram_size = maxram_size; current_machine->ram_slots = ram_slots; + /* + * Note: uses machine properties such as kernel-irqchip, must run + * after machine_set_property(). + */ configure_accelerator(current_machine, argv[0]); + /* + * Beware, QOM objects created before this point miss global and + * compat properties. + * + * Global properties get set up by qdev_prop_register_global(), + * called from user_register_global_props(), and certain option + * desugaring. Also in CPU feature desugaring (buried in + * parse_cpu_option()), which happens below this point, but may + * only target the CPU type, which can only be created after + * parse_cpu_option() returned the type. + * + * Machine compat properties: object_set_machine_compat_props(). + * Accelerator compat props: object_set_accelerator_compat_props(), + * called from configure_accelerator(). + */ + if (!qtest_enabled() && machine_class->deprecation_reason) { error_report("Machine type '%s' is deprecated: %s", machine_class->name, machine_class->deprecation_reason); } /* - * Migration object can only be created after global properties - * are applied correctly. + * Note: creates a QOM object, must run only after global and + * compat properties have been set up. */ migration_object_init(); @@ -4446,14 +4452,16 @@ int main(int argc, char **argv, char **envp) /* parse features once if machine provides default cpu_type */ current_machine->cpu_type = machine_class->default_cpu_type; - if (cpu_model) { - current_machine->cpu_type = parse_cpu_model(cpu_model); + if (cpu_option) { + current_machine->cpu_type = parse_cpu_option(cpu_option); } parse_numa_opts(current_machine); /* do monitor/qmp handling at preconfig state if requested */ main_loop(); + audio_init_audiodevs(); + /* from here on runstate is RUN_STATE_PRELAUNCH */ machine_run_board_init(current_machine); |