diff options
92 files changed, 26264 insertions, 580 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 40672c4eba..d794bd7a66 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -202,6 +202,8 @@ F: include/hw/intc/mips_gic.h F: include/hw/timer/mips_gictimer.h F: tests/tcg/mips/ F: disas/mips.c +F: disas/nanomips.h +F: disas/nanomips.cpp Moxie M: Anthony Green <green@moxielogic.com> diff --git a/backends/hostmem-file.c b/backends/hostmem-file.c index e64074954f..639c8d4307 100644 --- a/backends/hostmem-file.c +++ b/backends/hostmem-file.c @@ -145,20 +145,26 @@ static void file_memory_backend_set_pmem(Object *o, bool value, Error **errp) HostMemoryBackendFile *fb = MEMORY_BACKEND_FILE(o); if (host_memory_backend_mr_inited(backend)) { + char *path = object_get_canonical_path_component(o); + error_setg(errp, "cannot change property 'pmem' of %s '%s'", object_get_typename(o), - object_get_canonical_path_component(o)); + path); + g_free(path); return; } #ifndef CONFIG_LIBPMEM if (value) { Error *local_err = NULL; + char *path = object_get_canonical_path_component(o); + error_setg(&local_err, "Lack of libpmem support while setting the 'pmem=on'" " of %s '%s'. We can't ensure data persistence.", object_get_typename(o), - object_get_canonical_path_component(o)); + path); + g_free(path); error_propagate(errp, local_err); return; } diff --git a/block.c b/block.c index 08d64cdc61..95d8635aa1 100644 --- a/block.c +++ b/block.c @@ -4403,6 +4403,7 @@ static void coroutine_fn bdrv_co_invalidate_cache(BlockDriverState *bs, uint64_t perm, shared_perm; Error *local_err = NULL; int ret; + BdrvDirtyBitmap *bm; if (!bs->drv) { return; @@ -4452,6 +4453,12 @@ static void coroutine_fn bdrv_co_invalidate_cache(BlockDriverState *bs, } } + for (bm = bdrv_dirty_bitmap_next(bs, NULL); bm; + bm = bdrv_dirty_bitmap_next(bs, bm)) + { + bdrv_dirty_bitmap_set_migration(bm, false); + } + ret = refresh_total_sectors(bs, bs->total_sectors); if (ret < 0) { bs->open_flags |= BDRV_O_INACTIVE; @@ -4566,10 +4573,6 @@ static int bdrv_inactivate_recurse(BlockDriverState *bs, } } - /* At this point persistent bitmaps should be already stored by the format - * driver */ - bdrv_release_persistent_dirty_bitmaps(bs); - return 0; } diff --git a/block/dirty-bitmap.c b/block/dirty-bitmap.c index c9b8a6fd52..89fd1d7f8b 100644 --- a/block/dirty-bitmap.c +++ b/block/dirty-bitmap.c @@ -55,6 +55,10 @@ struct BdrvDirtyBitmap { and this bitmap must remain unchanged while this flag is set. */ bool persistent; /* bitmap must be saved to owner disk image */ + bool migration; /* Bitmap is selected for migration, it should + not be stored on the next inactivation + (persistent flag doesn't matter until next + invalidation).*/ QLIST_ENTRY(BdrvDirtyBitmap) list; }; @@ -176,6 +180,12 @@ bool bdrv_dirty_bitmap_frozen(BdrvDirtyBitmap *bitmap) return bitmap->successor; } +/* Both conditions disallow user-modification via QMP. */ +bool bdrv_dirty_bitmap_user_locked(BdrvDirtyBitmap *bitmap) { + return bdrv_dirty_bitmap_frozen(bitmap) || + bdrv_dirty_bitmap_qmp_locked(bitmap); +} + void bdrv_dirty_bitmap_set_qmp_locked(BdrvDirtyBitmap *bitmap, bool qmp_locked) { qemu_mutex_lock(bitmap->mutex); @@ -314,7 +324,7 @@ BdrvDirtyBitmap *bdrv_reclaim_dirty_bitmap_locked(BlockDriverState *bs, return NULL; } - if (!hbitmap_merge(parent->bitmap, successor->bitmap)) { + if (!hbitmap_merge(parent->bitmap, successor->bitmap, parent->bitmap)) { error_setg(errp, "Merging of parent and successor bitmap failed"); return NULL; } @@ -384,26 +394,6 @@ void bdrv_release_named_dirty_bitmaps(BlockDriverState *bs) } /** - * Release all persistent dirty bitmaps attached to a BDS (for use in - * bdrv_inactivate_recurse()). - * There must not be any frozen bitmaps attached. - * This function does not remove persistent bitmaps from the storage. - * Called with BQL taken. - */ -void bdrv_release_persistent_dirty_bitmaps(BlockDriverState *bs) -{ - BdrvDirtyBitmap *bm, *next; - - bdrv_dirty_bitmaps_lock(bs); - QLIST_FOREACH_SAFE(bm, &bs->dirty_bitmaps, list, next) { - if (bdrv_dirty_bitmap_get_persistance(bm)) { - bdrv_release_dirty_bitmap_locked(bm); - } - } - bdrv_dirty_bitmaps_unlock(bs); -} - -/** * Remove persistent dirty bitmap from the storage if it exists. * Absence of bitmap is not an error, because we have the following scenario: * BdrvDirtyBitmap can have .persistent = true but not yet saved and have no @@ -619,7 +609,6 @@ void bdrv_reset_dirty_bitmap(BdrvDirtyBitmap *bitmap, void bdrv_clear_dirty_bitmap(BdrvDirtyBitmap *bitmap, HBitmap **out) { - assert(bdrv_dirty_bitmap_enabled(bitmap)); assert(!bdrv_dirty_bitmap_readonly(bitmap)); bdrv_dirty_bitmap_lock(bitmap); if (!out) { @@ -633,12 +622,12 @@ void bdrv_clear_dirty_bitmap(BdrvDirtyBitmap *bitmap, HBitmap **out) bdrv_dirty_bitmap_unlock(bitmap); } -void bdrv_undo_clear_dirty_bitmap(BdrvDirtyBitmap *bitmap, HBitmap *in) +void bdrv_restore_dirty_bitmap(BdrvDirtyBitmap *bitmap, HBitmap *backup) { HBitmap *tmp = bitmap->bitmap; assert(bdrv_dirty_bitmap_enabled(bitmap)); assert(!bdrv_dirty_bitmap_readonly(bitmap)); - bitmap->bitmap = in; + bitmap->bitmap = backup; hbitmap_free(tmp); } @@ -756,16 +745,24 @@ void bdrv_dirty_bitmap_set_persistance(BdrvDirtyBitmap *bitmap, bool persistent) qemu_mutex_unlock(bitmap->mutex); } +/* Called with BQL taken. */ +void bdrv_dirty_bitmap_set_migration(BdrvDirtyBitmap *bitmap, bool migration) +{ + qemu_mutex_lock(bitmap->mutex); + bitmap->migration = migration; + qemu_mutex_unlock(bitmap->mutex); +} + bool bdrv_dirty_bitmap_get_persistance(BdrvDirtyBitmap *bitmap) { - return bitmap->persistent; + return bitmap->persistent && !bitmap->migration; } bool bdrv_has_changed_persistent_bitmaps(BlockDriverState *bs) { BdrvDirtyBitmap *bm; QLIST_FOREACH(bm, &bs->dirty_bitmaps, list) { - if (bm->persistent && !bm->readonly) { + if (bm->persistent && !bm->readonly && !bm->migration) { return true; } } @@ -791,19 +788,41 @@ int64_t bdrv_dirty_bitmap_next_zero(BdrvDirtyBitmap *bitmap, uint64_t offset) } void bdrv_merge_dirty_bitmap(BdrvDirtyBitmap *dest, const BdrvDirtyBitmap *src, - Error **errp) + HBitmap **backup, Error **errp) { + bool ret; + /* only bitmaps from one bds are supported */ assert(dest->mutex == src->mutex); qemu_mutex_lock(dest->mutex); - assert(bdrv_dirty_bitmap_enabled(dest)); - assert(!bdrv_dirty_bitmap_readonly(dest)); + if (bdrv_dirty_bitmap_user_locked(dest)) { + error_setg(errp, "Bitmap '%s' is currently in use by another" + " operation and cannot be modified", dest->name); + goto out; + } + + if (bdrv_dirty_bitmap_readonly(dest)) { + error_setg(errp, "Bitmap '%s' is readonly and cannot be modified", + dest->name); + goto out; + } - if (!hbitmap_merge(dest->bitmap, src->bitmap)) { + if (!hbitmap_can_merge(dest->bitmap, src->bitmap)) { error_setg(errp, "Bitmaps are incompatible and can't be merged"); + goto out; + } + + if (backup) { + *backup = dest->bitmap; + dest->bitmap = hbitmap_alloc(dest->size, hbitmap_granularity(*backup)); + ret = hbitmap_merge(*backup, src->bitmap, dest->bitmap); + } else { + ret = hbitmap_merge(dest->bitmap, src->bitmap, dest->bitmap); } + assert(ret); +out: qemu_mutex_unlock(dest->mutex); } diff --git a/block/qcow2-bitmap.c b/block/qcow2-bitmap.c index ba978ad2aa..b5f1b3563d 100644 --- a/block/qcow2-bitmap.c +++ b/block/qcow2-bitmap.c @@ -1418,6 +1418,22 @@ void qcow2_store_persistent_dirty_bitmaps(BlockDriverState *bs, Error **errp) g_free(tb); } + QSIMPLEQ_FOREACH(bm, bm_list, entry) { + /* For safety, we remove bitmap after storing. + * We may be here in two cases: + * 1. bdrv_close. It's ok to drop bitmap. + * 2. inactivation. It means migration without 'dirty-bitmaps' + * capability, so bitmaps are not marked with + * BdrvDirtyBitmap.migration flags. It's not bad to drop them too, + * and reload on invalidation. + */ + if (bm->dirty_bitmap == NULL) { + continue; + } + + bdrv_release_dirty_bitmap(bs, bm->dirty_bitmap); + } + bitmap_list_free(bm_list); return; diff --git a/block/qcow2.c b/block/qcow2.c index 4f8d2fa7bd..30689b7688 100644 --- a/block/qcow2.c +++ b/block/qcow2.c @@ -1153,7 +1153,6 @@ static int coroutine_fn qcow2_do_open(BlockDriverState *bs, QDict *options, uint64_t ext_end; uint64_t l1_vm_state_index; bool update_header = false; - bool header_updated = false; ret = bdrv_pread(bs->file, 0, &header, sizeof(header)); if (ret < 0) { @@ -1492,23 +1491,70 @@ static int coroutine_fn qcow2_do_open(BlockDriverState *bs, QDict *options, s->autoclear_features &= QCOW2_AUTOCLEAR_MASK; } - if (s->dirty_bitmaps_loaded) { - /* It's some kind of reopen. There are no known cases where we need to - * reload bitmaps in such a situation, so it's safer to skip them. - * - * Moreover, if we have some readonly bitmaps and we are reopening for - * rw we should reopen bitmaps correspondingly. - */ - if (bdrv_has_readonly_bitmaps(bs) && - !bdrv_is_read_only(bs) && !(bdrv_get_flags(bs) & BDRV_O_INACTIVE)) - { - qcow2_reopen_bitmaps_rw_hint(bs, &header_updated, &local_err); - } - } else { - header_updated = qcow2_load_dirty_bitmaps(bs, &local_err); - s->dirty_bitmaps_loaded = true; + /* == Handle persistent dirty bitmaps == + * + * We want load dirty bitmaps in three cases: + * + * 1. Normal open of the disk in active mode, not related to invalidation + * after migration. + * + * 2. Invalidation of the target vm after pre-copy phase of migration, if + * bitmaps are _not_ migrating through migration channel, i.e. + * 'dirty-bitmaps' capability is disabled. + * + * 3. Invalidation of source vm after failed or canceled migration. + * This is a very interesting case. There are two possible types of + * bitmaps: + * + * A. Stored on inactivation and removed. They should be loaded from the + * image. + * + * B. Not stored: not-persistent bitmaps and bitmaps, migrated through + * the migration channel (with dirty-bitmaps capability). + * + * On the other hand, there are two possible sub-cases: + * + * 3.1 disk was changed by somebody else while were inactive. In this + * case all in-RAM dirty bitmaps (both persistent and not) are + * definitely invalid. And we don't have any method to determine + * this. + * + * Simple and safe thing is to just drop all the bitmaps of type B on + * inactivation. But in this case we lose bitmaps in valid 4.2 case. + * + * On the other hand, resuming source vm, if disk was already changed + * is a bad thing anyway: not only bitmaps, the whole vm state is + * out of sync with disk. + * + * This means, that user or management tool, who for some reason + * decided to resume source vm, after disk was already changed by + * target vm, should at least drop all dirty bitmaps by hand. + * + * So, we can ignore this case for now, but TODO: "generation" + * extension for qcow2, to determine, that image was changed after + * last inactivation. And if it is changed, we will drop (or at least + * mark as 'invalid' all the bitmaps of type B, both persistent + * and not). + * + * 3.2 disk was _not_ changed while were inactive. Bitmaps may be saved + * to disk ('dirty-bitmaps' capability disabled), or not saved + * ('dirty-bitmaps' capability enabled), but we don't need to care + * of: let's load bitmaps as always: stored bitmaps will be loaded, + * and not stored has flag IN_USE=1 in the image and will be skipped + * on loading. + * + * One remaining possible case when we don't want load bitmaps: + * + * 4. Open disk in inactive mode in target vm (bitmaps are migrating or + * will be loaded on invalidation, no needs try loading them before) + */ + + if (!(bdrv_get_flags(bs) & BDRV_O_INACTIVE)) { + /* It's case 1, 2 or 3.2. Or 3.1 which is BUG in management layer. */ + bool header_updated = qcow2_load_dirty_bitmaps(bs, &local_err); + + update_header = update_header && !header_updated; } - update_header = update_header && !header_updated; if (local_err != NULL) { error_propagate(errp, local_err); ret = -EINVAL; @@ -2123,9 +2169,9 @@ static int qcow2_inactivate(BlockDriverState *bs) qcow2_store_persistent_dirty_bitmaps(bs, &local_err); if (local_err != NULL) { result = -EINVAL; - error_report_err(local_err); - error_report("Persistent bitmaps are lost for node '%s'", - bdrv_get_device_or_node_name(bs)); + error_reportf_err(local_err, "Lost persistent bitmaps during " + "inactivation of node '%s': ", + bdrv_get_device_or_node_name(bs)); } ret = qcow2_cache_flush(bs, s->l2_table_cache); diff --git a/block/qcow2.h b/block/qcow2.h index ba430316b9..29c98d87a0 100644 --- a/block/qcow2.h +++ b/block/qcow2.h @@ -300,7 +300,6 @@ typedef struct BDRVQcow2State { uint32_t nb_bitmaps; uint64_t bitmap_directory_size; uint64_t bitmap_directory_offset; - bool dirty_bitmaps_loaded; int flags; int qcow_version; diff --git a/blockdev.c b/blockdev.c index 574adbcb7f..c30495d035 100644 --- a/blockdev.c +++ b/blockdev.c @@ -2010,14 +2010,8 @@ static void block_dirty_bitmap_clear_prepare(BlkActionState *common, return; } - if (bdrv_dirty_bitmap_frozen(state->bitmap)) { - error_setg(errp, "Cannot modify a frozen bitmap"); - return; - } else if (bdrv_dirty_bitmap_qmp_locked(state->bitmap)) { - error_setg(errp, "Cannot modify a locked bitmap"); - return; - } else if (!bdrv_dirty_bitmap_enabled(state->bitmap)) { - error_setg(errp, "Cannot clear a disabled bitmap"); + if (bdrv_dirty_bitmap_user_locked(state->bitmap)) { + error_setg(errp, "Cannot modify a bitmap in use by another operation"); return; } else if (bdrv_dirty_bitmap_readonly(state->bitmap)) { error_setg(errp, "Cannot clear a readonly bitmap"); @@ -2027,17 +2021,17 @@ static void block_dirty_bitmap_clear_prepare(BlkActionState *common, bdrv_clear_dirty_bitmap(state->bitmap, &state->backup); } -static void block_dirty_bitmap_clear_abort(BlkActionState *common) +static void block_dirty_bitmap_restore(BlkActionState *common) { BlockDirtyBitmapState *state = DO_UPCAST(BlockDirtyBitmapState, common, common); if (state->backup) { - bdrv_undo_clear_dirty_bitmap(state->bitmap, state->backup); + bdrv_restore_dirty_bitmap(state->bitmap, state->backup); } } -static void block_dirty_bitmap_clear_commit(BlkActionState *common) +static void block_dirty_bitmap_free_backup(BlkActionState *common) { BlockDirtyBitmapState *state = DO_UPCAST(BlockDirtyBitmapState, common, common); @@ -2065,6 +2059,13 @@ static void block_dirty_bitmap_enable_prepare(BlkActionState *common, return; } + if (bdrv_dirty_bitmap_user_locked(state->bitmap)) { + error_setg(errp, + "Bitmap '%s' is currently in use by another operation" + " and cannot be enabled", action->name); + return; + } + state->was_enabled = bdrv_dirty_bitmap_enabled(state->bitmap); bdrv_enable_dirty_bitmap(state->bitmap); } @@ -2099,6 +2100,13 @@ static void block_dirty_bitmap_disable_prepare(BlkActionState *common, return; } + if (bdrv_dirty_bitmap_user_locked(state->bitmap)) { + error_setg(errp, + "Bitmap '%s' is currently in use by another operation" + " and cannot be disabled", action->name); + return; + } + state->was_enabled = bdrv_dirty_bitmap_enabled(state->bitmap); bdrv_disable_dirty_bitmap(state->bitmap); } @@ -2113,6 +2121,35 @@ static void block_dirty_bitmap_disable_abort(BlkActionState *common) } } +static void block_dirty_bitmap_merge_prepare(BlkActionState *common, + Error **errp) +{ + BlockDirtyBitmapMerge *action; + BlockDirtyBitmapState *state = DO_UPCAST(BlockDirtyBitmapState, + common, common); + BdrvDirtyBitmap *merge_source; + + if (action_check_completion_mode(common, errp) < 0) { + return; + } + + action = common->action->u.x_block_dirty_bitmap_merge.data; + state->bitmap = block_dirty_bitmap_lookup(action->node, + action->dst_name, + &state->bs, + errp); + if (!state->bitmap) { + return; + } + + merge_source = bdrv_find_dirty_bitmap(state->bs, action->src_name); + if (!merge_source) { + return; + } + + bdrv_merge_dirty_bitmap(state->bitmap, merge_source, &state->backup, errp); +} + static void abort_prepare(BlkActionState *common, Error **errp) { error_setg(errp, "Transaction aborted using Abort action"); @@ -2171,8 +2208,8 @@ static const BlkActionOps actions[] = { [TRANSACTION_ACTION_KIND_BLOCK_DIRTY_BITMAP_CLEAR] = { .instance_size = sizeof(BlockDirtyBitmapState), .prepare = block_dirty_bitmap_clear_prepare, - .commit = block_dirty_bitmap_clear_commit, - .abort = block_dirty_bitmap_clear_abort, + .commit = block_dirty_bitmap_free_backup, + .abort = block_dirty_bitmap_restore, }, [TRANSACTION_ACTION_KIND_X_BLOCK_DIRTY_BITMAP_ENABLE] = { .instance_size = sizeof(BlockDirtyBitmapState), @@ -2184,6 +2221,12 @@ static const BlkActionOps actions[] = { .prepare = block_dirty_bitmap_disable_prepare, .abort = block_dirty_bitmap_disable_abort, }, + [TRANSACTION_ACTION_KIND_X_BLOCK_DIRTY_BITMAP_MERGE] = { + .instance_size = sizeof(BlockDirtyBitmapState), + .prepare = block_dirty_bitmap_merge_prepare, + .commit = block_dirty_bitmap_free_backup, + .abort = block_dirty_bitmap_restore, + }, /* Where are transactions for MIRROR, COMMIT and STREAM? * Although these blockjobs use transaction callbacks like the backup job, * these jobs do not necessarily adhere to transaction semantics. @@ -2848,15 +2891,10 @@ void qmp_block_dirty_bitmap_remove(const char *node, const char *name, return; } - if (bdrv_dirty_bitmap_frozen(bitmap)) { + if (bdrv_dirty_bitmap_user_locked(bitmap)) { error_setg(errp, - "Bitmap '%s' is currently frozen and cannot be removed", - name); - return; - } else if (bdrv_dirty_bitmap_qmp_locked(bitmap)) { - error_setg(errp, - "Bitmap '%s' is currently locked and cannot be removed", - name); + "Bitmap '%s' is currently in use by another operation and" + " cannot be removed", name); return; } @@ -2886,20 +2924,10 @@ void qmp_block_dirty_bitmap_clear(const char *node, const char *name, return; } - if (bdrv_dirty_bitmap_frozen(bitmap)) { - error_setg(errp, - "Bitmap '%s' is currently frozen and cannot be modified", - name); - return; - } else if (bdrv_dirty_bitmap_qmp_locked(bitmap)) { - error_setg(errp, - "Bitmap '%s' is currently locked and cannot be modified", - name); - return; - } else if (!bdrv_dirty_bitmap_enabled(bitmap)) { + if (bdrv_dirty_bitmap_user_locked(bitmap)) { error_setg(errp, - "Bitmap '%s' is currently disabled and cannot be cleared", - name); + "Bitmap '%s' is currently in use by another operation" + " and cannot be cleared", name); return; } else if (bdrv_dirty_bitmap_readonly(bitmap)) { error_setg(errp, "Bitmap '%s' is readonly and cannot be cleared", name); @@ -2920,10 +2948,10 @@ void qmp_x_block_dirty_bitmap_enable(const char *node, const char *name, return; } - if (bdrv_dirty_bitmap_frozen(bitmap)) { + if (bdrv_dirty_bitmap_user_locked(bitmap)) { error_setg(errp, - "Bitmap '%s' is currently frozen and cannot be enabled", - name); + "Bitmap '%s' is currently in use by another operation" + " and cannot be enabled", name); return; } @@ -2941,10 +2969,10 @@ void qmp_x_block_dirty_bitmap_disable(const char *node, const char *name, return; } - if (bdrv_dirty_bitmap_frozen(bitmap)) { + if (bdrv_dirty_bitmap_user_locked(bitmap)) { error_setg(errp, - "Bitmap '%s' is currently frozen and cannot be disabled", - name); + "Bitmap '%s' is currently in use by another operation" + " and cannot be disabled", name); return; } @@ -2962,23 +2990,13 @@ void qmp_x_block_dirty_bitmap_merge(const char *node, const char *dst_name, return; } - if (bdrv_dirty_bitmap_frozen(dst)) { - error_setg(errp, "Bitmap '%s' is frozen and cannot be modified", - dst_name); - return; - } else if (bdrv_dirty_bitmap_readonly(dst)) { - error_setg(errp, "Bitmap '%s' is readonly and cannot be modified", - dst_name); - return; - } - src = bdrv_find_dirty_bitmap(bs, src_name); if (!src) { error_setg(errp, "Dirty bitmap '%s' not found", src_name); return; } - bdrv_merge_dirty_bitmap(dst, src, errp); + bdrv_merge_dirty_bitmap(dst, src, NULL, errp); } BlockDirtyBitmapSha256 *qmp_x_debug_block_dirty_bitmap_sha256(const char *node, @@ -3495,10 +3513,10 @@ static BlockJob *do_drive_backup(DriveBackup *backup, JobTxn *txn, bdrv_unref(target_bs); goto out; } - if (bdrv_dirty_bitmap_qmp_locked(bmap)) { + if (bdrv_dirty_bitmap_user_locked(bmap)) { error_setg(errp, - "Bitmap '%s' is currently locked and cannot be used for " - "backup", backup->bitmap); + "Bitmap '%s' is currently in use by another operation" + " and cannot be used for backup", backup->bitmap); goto out; } } @@ -3545,6 +3563,7 @@ BlockJob *do_blockdev_backup(BlockdevBackup *backup, JobTxn *txn, BlockDriverState *bs; BlockDriverState *target_bs; Error *local_err = NULL; + BdrvDirtyBitmap *bmap = NULL; AioContext *aio_context; BlockJob *job = NULL; int job_flags = JOB_DEFAULT; @@ -3595,6 +3614,21 @@ BlockJob *do_blockdev_backup(BlockdevBackup *backup, JobTxn *txn, goto out; } } + + if (backup->has_bitmap) { + bmap = bdrv_find_dirty_bitmap(bs, backup->bitmap); + if (!bmap) { + error_setg(errp, "Bitmap '%s' could not be found", backup->bitmap); + goto out; + } + if (bdrv_dirty_bitmap_user_locked(bmap)) { + error_setg(errp, + "Bitmap '%s' is currently in use by another operation" + " and cannot be used for backup", backup->bitmap); + goto out; + } + } + if (!backup->auto_finalize) { job_flags |= JOB_MANUAL_FINALIZE; } @@ -3602,7 +3636,7 @@ BlockJob *do_blockdev_backup(BlockdevBackup *backup, JobTxn *txn, job_flags |= JOB_MANUAL_DISMISS; } job = backup_job_create(backup->job_id, bs, target_bs, backup->speed, - backup->sync, NULL, backup->compress, + backup->sync, bmap, backup->compress, backup->on_source_error, backup->on_target_error, job_flags, NULL, NULL, txn, &local_err); if (local_err != NULL) { diff --git a/configure b/configure index a02df30dde..a898e21c68 100755 --- a/configure +++ b/configure @@ -7270,6 +7270,9 @@ for i in $ARCH $TARGET_BASE_ARCH ; do ;; mips*) disas_config "MIPS" + if test -n "${cxx}"; then + disas_config "NANOMIPS" + fi ;; moxie*) disas_config "MOXIE" diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmmu.mak index 210cff2781..64c998c4c8 100644 --- a/default-configs/i386-softmmu.mak +++ b/default-configs/i386-softmmu.mak @@ -51,7 +51,8 @@ CONFIG_PCI_Q35=y CONFIG_APIC=y CONFIG_IOAPIC=y CONFIG_PVPANIC=y -CONFIG_MEM_HOTPLUG=y +CONFIG_MEM_DEVICE=y +CONFIG_DIMM=y CONFIG_NVDIMM=y CONFIG_ACPI_NVDIMM=y CONFIG_PCIE_PORT=y diff --git a/default-configs/ppc64-softmmu.mak b/default-configs/ppc64-softmmu.mak index b94af6c7c6..f550573782 100644 --- a/default-configs/ppc64-softmmu.mak +++ b/default-configs/ppc64-softmmu.mak @@ -16,4 +16,5 @@ CONFIG_VIRTIO_VGA=y CONFIG_XICS=$(CONFIG_PSERIES) CONFIG_XICS_SPAPR=$(CONFIG_PSERIES) CONFIG_XICS_KVM=$(call land,$(CONFIG_PSERIES),$(CONFIG_KVM)) -CONFIG_MEM_HOTPLUG=y +CONFIG_MEM_DEVICE=y +CONFIG_DIMM=y diff --git a/default-configs/sparc64-softmmu.mak b/default-configs/sparc64-softmmu.mak index 52edafe547..ce63d47046 100644 --- a/default-configs/sparc64-softmmu.mak +++ b/default-configs/sparc64-softmmu.mak @@ -16,5 +16,4 @@ CONFIG_SIMBA=y CONFIG_SUNHME=y CONFIG_MC146818RTC=y CONFIG_ISA_TESTDEV=y -CONFIG_EMPTY_SLOT=y CONFIG_SUN4V_RTC=y diff --git a/disas/Makefile.objs b/disas/Makefile.objs index 213be2fab2..3c1cdce026 100644 --- a/disas/Makefile.objs +++ b/disas/Makefile.objs @@ -14,6 +14,7 @@ common-obj-$(CONFIG_I386_DIS) += i386.o common-obj-$(CONFIG_M68K_DIS) += m68k.o common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o common-obj-$(CONFIG_MIPS_DIS) += mips.o +common-obj-$(CONFIG_NANOMIPS_DIS) += nanomips.o common-obj-$(CONFIG_NIOS2_DIS) += nios2.o common-obj-$(CONFIG_MOXIE_DIS) += moxie.o common-obj-$(CONFIG_PPC_DIS) += ppc.o diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp new file mode 100644 index 0000000000..1238c2ff33 --- /dev/null +++ b/disas/nanomips.cpp @@ -0,0 +1,22242 @@ +/* + * Source file for nanoMIPS disassembler component of QEMU + * + * Copyright (C) 2018 Wave Computing + * Copyright (C) 2018 Matthew Fortune <matthew.fortune@mips.com> + * Copyright (C) 2018 Aleksandar Markovic <aleksandar.markovic@wavecomp.com> + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <https://www.gnu.org/licenses/>. + */ + +extern "C" { +#include "qemu/osdep.h" +#include "disas/bfd.h" +} + +#include <cstring> +#include <stdexcept> +#include <sstream> +#include <stdio.h> +#include <stdarg.h> + +#include "nanomips.h" + +#define IMGASSERTONCE(test) + + +int nanomips_dis(char *buf, + unsigned address, + unsigned short one, + unsigned short two, + unsigned short three) +{ + std::string disasm; + uint16 bits[3] = {one, two, three}; + + NMD::TABLE_ENTRY_TYPE type; + NMD d(address, NMD::ALL_ATTRIBUTES); + int size = d.Disassemble(bits, disasm, type); + + strcpy(buf, disasm.c_str()); + return size; +} + +int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info) +{ + int status; + bfd_byte buffer[2]; + uint16_t insn1 = 0, insn2 = 0, insn3 = 0; + char buf[200]; + + info->bytes_per_chunk = 2; + info->display_endian = info->endian; + info->insn_info_valid = 1; + info->branch_delay_insns = 0; + info->data_size = 0; + info->insn_type = dis_nonbranch; + info->target = 0; + info->target2 = 0; + + status = (*info->read_memory_func)(memaddr, buffer, 2, info); + if (status != 0) { + (*info->memory_error_func)(status, memaddr, info); + return -1; + } + + if (info->endian == BFD_ENDIAN_BIG) { + insn1 = bfd_getb16(buffer); + } else { + insn1 = bfd_getl16(buffer); + } + (*info->fprintf_func)(info->stream, "%04x ", insn1); + + /* Handle 32-bit opcodes. */ + if ((insn1 & 0x1000) == 0) { + status = (*info->read_memory_func)(memaddr + 2, buffer, 2, info); + if (status != 0) { + (*info->memory_error_func)(status, memaddr + 2, info); + return -1; + } + + if (info->endian == BFD_ENDIAN_BIG) { + insn2 = bfd_getb16(buffer); + } else { + insn2 = bfd_getl16(buffer); + } + (*info->fprintf_func)(info->stream, "%04x ", insn2); + } else { + (*info->fprintf_func)(info->stream, " "); + } + /* Handle 48-bit opcodes. */ + if ((insn1 >> 10) == 0x18) { + status = (*info->read_memory_func)(memaddr + 4, buffer, 2, info); + if (status != 0) { + (*info->memory_error_func)(status, memaddr + 4, info); + return -1; + } + + if (info->endian == BFD_ENDIAN_BIG) { + insn3 = bfd_getb16(buffer); + } else { + insn3 = bfd_getl16(buffer); + } + (*info->fprintf_func)(info->stream, "%04x ", insn3); + } else { + (*info->fprintf_func)(info->stream, " "); + } + + int length = nanomips_dis(buf, memaddr, insn1, insn2, insn3); + + /* FIXME: Should probably use a hash table on the major opcode here. */ + + (*info->fprintf_func) (info->stream, "%s", buf); + if (length > 0) { + return length / 8; + } + + info->insn_type = dis_noninsn; + + return insn3 ? 6 : insn2 ? 4 : 2; +} + + +namespace img +{ + address addr32(address a) + { + return a; + } + + std::string format(const char *format, ...) + { + char buffer[256]; + va_list args; + va_start(args, format); + int err = vsprintf(buffer, format, args); + if (err < 0) { + perror(buffer); + } + va_end(args); + return buffer; + } + + std::string format(const char *format, + std::string s) + { + char buffer[256]; + + sprintf(buffer, format, s.c_str()); + + return buffer; + } + + std::string format(const char *format, + std::string s1, + std::string s2) + { + char buffer[256]; + + sprintf(buffer, format, s1.c_str(), s2.c_str()); + + return buffer; + } + + std::string format(const char *format, + std::string s1, + std::string s2, + std::string s3) + { + char buffer[256]; + + sprintf(buffer, format, s1.c_str(), s2.c_str(), s3.c_str()); + + return buffer; + } + + std::string format(const char *format, + std::string s1, + std::string s2, + std::string s3, + std::string s4) + { + char buffer[256]; + + sprintf(buffer, format, s1.c_str(), s2.c_str(), s3.c_str(), + s4.c_str()); + + return buffer; + } + + std::string format(const char *format, + std::string s1, + std::string s2, + std::string s3, + std::string s4, + std::string s5) + { + char buffer[256]; + + sprintf(buffer, format, s1.c_str(), s2.c_str(), s3.c_str(), + s4.c_str(), s5.c_str()); + + return buffer; + } + + std::string format(const char *format, + uint64 d, + std::string s2) + { + char buffer[256]; + + sprintf(buffer, format, d, s2.c_str()); + + return buffer; + } + + std::string format(const char *format, + std::string s1, + uint64 d, + std::string s2) + { + char buffer[256]; + + sprintf(buffer, format, s1.c_str(), d, s2.c_str()); + + return buffer; + } + + std::string format(const char *format, + std::string s1, + std::string s2, + uint64 d) + { + char buffer[256]; + + sprintf(buffer, format, s1.c_str(), s2.c_str(), d); + + return buffer; + } + + char as_char(int c) + { + return static_cast<char>(c); + } +}; + + +std::string to_string(img::address a) +{ + char buffer[256]; + sprintf(buffer, "0x%08llx", a); + return buffer; +} + + +uint64 extract_bits(uint64 data, uint32 bit_offset, uint32 bit_size) +{ + return (data << (64 - (bit_size + bit_offset))) >> (64 - bit_size); +} + + +int64 sign_extend(int64 data, int msb) +{ + uint64 shift = 63 - msb; + return (data << shift) >> shift; +} + + +uint64 NMD::renumber_registers(uint64 index, uint64 *register_list, + size_t register_list_size) +{ + if (index < register_list_size) { + return register_list[index]; + } + + throw std::runtime_error(img::format( + "Invalid register mapping index %d, size of list = %d", + index, register_list_size)); +} + + +/* + * these functions should be decode functions but the json does not have + * decode sections so they are based on the encode, the equivalent decode + * functions need writing eventually. + */ +uint64 NMD::encode_gpr3(uint64 d) +{ + static uint64 register_list[] = { 16, 17, 18, 19, 4, 5, 6, 7 }; + return renumber_registers(d, register_list, + sizeof(register_list) / sizeof(register_list[0])); +} + + +uint64 NMD::encode_gpr3_store(uint64 d) +{ + static uint64 register_list[] = { 0, 17, 18, 19, 4, 5, 6, 7 }; + return renumber_registers(d, register_list, + sizeof(register_list) / sizeof(register_list[0])); +} + + +uint64 NMD::encode_rd1_from_rd(uint64 d) +{ + static uint64 register_list[] = { 4, 5 }; + return renumber_registers(d, register_list, + sizeof(register_list) / sizeof(register_list[0])); +} + + +uint64 NMD::encode_gpr4_zero(uint64 d) +{ + static uint64 register_list[] = { 8, 9, 10, 0, 4, 5, 6, 7, + 16, 17, 18, 19, 20, 21, 22, 23 }; + return renumber_registers(d, register_list, + sizeof(register_list) / sizeof(register_list[0])); +} + + +uint64 NMD::encode_gpr4(uint64 d) +{ + static uint64 register_list[] = { 8, 9, 10, 11, 4, 5, 6, 7, + 16, 17, 18, 19, 20, 21, 22, 23 }; + return renumber_registers(d, register_list, + sizeof(register_list) / sizeof(register_list[0])); +} + + +uint64 NMD::encode_rd2_reg1(uint64 d) +{ + static uint64 register_list[] = { 4, 5, 6, 7 }; + return renumber_registers(d, register_list, + sizeof(register_list) / sizeof(register_list[0])); +} + + +uint64 NMD::encode_rd2_reg2(uint64 d) +{ + static uint64 register_list[] = { 5, 6, 7, 8 }; + return renumber_registers(d, register_list, + sizeof(register_list) / sizeof(register_list[0])); +} + + +uint64 NMD::copy(uint64 d) +{ + return d; +} + + +int64 NMD::copy(int64 d) +{ + return d; +} + + +int64 NMD::neg_copy(uint64 d) +{ + return 0ll - d; +} + + +int64 NMD::neg_copy(int64 d) +{ + return -d; +} + + +/* strange wrapper around gpr3 */ +uint64 NMD::encode_rs3_and_check_rs3_ge_rt3(uint64 d) +{ +return encode_gpr3(d); +} + + +/* strange wrapper around gpr3 */ +uint64 NMD::encode_rs3_and_check_rs3_lt_rt3(uint64 d) +{ + return encode_gpr3(d); +} + + +/* nop - done by extraction function */ +uint64 NMD::encode_s_from_address(uint64 d) +{ + return d; +} + + +/* nop - done by extraction function */ +uint64 NMD::encode_u_from_address(uint64 d) +{ + return d; +} + + +/* nop - done by extraction function */ +uint64 NMD::encode_s_from_s_hi(uint64 d) +{ + return d; +} + + +uint64 NMD::encode_count3_from_count(uint64 d) +{ + IMGASSERTONCE(d < 8); + return d == 0ull ? 8ull : d; +} + + +uint64 NMD::encode_shift3_from_shift(uint64 d) +{ + IMGASSERTONCE(d < 8); + return d == 0ull ? 8ull : d; +} + + +/* special value for load literal */ +int64 NMD::encode_eu_from_s_li16(uint64 d) +{ + IMGASSERTONCE(d < 128); + return d == 127 ? -1 : (int64)d; +} + + +uint64 NMD::encode_msbd_from_size(uint64 d) +{ + IMGASSERTONCE(d < 32); + return d + 1; +} + + +uint64 NMD::encode_eu_from_u_andi16(uint64 d) +{ + IMGASSERTONCE(d < 16); + if (d == 12) { + return 0x00ffull; + } + if (d == 13) { + return 0xffffull; + } + return d; +} + + +uint64 NMD::encode_msbd_from_pos_and_size(uint64 d) +{ + IMGASSERTONCE(0); + return d; +} + + +/* save16 / restore16 ???? */ +uint64 NMD::encode_rt1_from_rt(uint64 d) +{ + return d ? 31 : 30; +} + + +/* ? */ +uint64 NMD::encode_lsb_from_pos_and_size(uint64 d) +{ + return d; +} + + +std::string NMD::save_restore_list(uint64 rt, uint64 count, uint64 gp) +{ + std::string str; + + for (uint64 counter = 0; counter != count; counter++) { + bool use_gp = gp && (counter == count - 1); + uint64 this_rt = use_gp ? 28 : ((rt & 0x10) | (rt + counter)) & 0x1f; + str += img::format(",%s", GPR(this_rt)); + } + + return str; +} + + +std::string NMD::GPR(uint64 reg) +{ + static const char *gpr_reg[32] = { + "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", + "a4", "a5", "a6", "a7", "r12", "r13", "r14", "r15", + "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", + "r24", "r25", "k0", "k1", "gp", "sp", "fp", "ra" + }; + + if (reg < 32) { + return gpr_reg[reg]; + } + + throw std::runtime_error(img::format("Invalid GPR register index %d", reg)); +} + + +std::string NMD::FPR(uint64 reg) +{ + static const char *fpr_reg[32] = { + "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", + "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", + "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", + "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31" + }; + + if (reg < 32) { + return fpr_reg[reg]; + } + + throw std::runtime_error(img::format("Invalid FPR register index %d", reg)); +} + + +std::string NMD::AC(uint64 reg) +{ + static const char *ac_reg[4] = { + "ac0", "ac1", "ac2", "ac3" + }; + + if (reg < 4) { + return ac_reg[reg]; + } + + throw std::runtime_error(img::format("Invalid AC register index %d", reg)); +} + + +std::string NMD::IMMEDIATE(uint64 value) +{ + return img::format("0x%x", value); +} + + +std::string NMD::IMMEDIATE(int64 value) +{ + return img::format("%d", value); +} + + +std::string NMD::CPR(uint64 reg) +{ + /* needs more work */ + return img::format("CP%d", reg); +} + + +std::string NMD::ADDRESS(uint64 value, int instruction_size) +{ + /* token for string replace */ + /* const char TOKEN_REPLACE = (char)0xa2; */ + img::address address = m_pc + value + instruction_size; + /* symbol replacement */ + /* return img::as_char(TOKEN_REPLACE) + to_string(address); */ + return to_string(address); +} + + +uint64 NMD::extract_op_code_value(const uint16 * data, int size) +{ + switch (size) { + case 16: + return data[0]; + case 32: + return ((uint64)data[0] << 16) | data[1]; + case 48: + return ((uint64)data[0] << 32) | ((uint64)data[1] << 16) | data[2]; + default: + return data[0]; + } +} + + +int NMD::Disassemble(const uint16 * data, std::string & dis, + NMD::TABLE_ENTRY_TYPE & type) +{ + return Disassemble(data, dis, type, MAJOR, 2); +} + + +/* + * Recurse through tables until the instruction is found then return + * the string and size + * + * inputs: + * pointer to a word stream, + * disassember table and size + * returns: + * instruction size - negative is error + * disassembly string - on error will constain error string + */ +int NMD::Disassemble(const uint16 * data, std::string & dis, + NMD::TABLE_ENTRY_TYPE & type, const Pool *table, + int table_size) +{ + try + { + for (int i = 0; i < table_size; i++) { + uint64 op_code = extract_op_code_value(data, + table[i].instructions_size); + if ((op_code & table[i].mask) == table[i].value) { + /* possible match */ + conditional_function cond = table[i].condition; + if ((cond == 0) || (this->*cond)(op_code)) { + try + { + if (table[i].type == pool) { + return Disassemble(data, dis, type, + table[i].next_table, + table[i].next_table_size); + } else if ((table[i].type == instruction) || + (table[i].type == call_instruction) || + (table[i].type == branch_instruction) || + (table[i].type == return_instruction)) { + if ((table[i].attributes != 0) && + (m_requested_instruction_categories & + table[i].attributes) == 0) { + /* + * failed due to instruction having + * an ASE attribute and the requested version + * not having that attribute + */ + dis = "ASE attribute missmatch"; + return -5; + } + disassembly_function dis_fn = table[i].disassembly; + if (dis_fn == 0) { + dis = "disassembler failure - bad table entry"; + return -6; + } + type = table[i].type; + dis = (this->*dis_fn)(op_code); + return table[i].instructions_size; + } else { + dis = "reserved instruction"; + return -2; + } + } + catch (std::runtime_error & e) + { + dis = e.what(); + return -3; /* runtime error */ + } + } + } + } + } + catch (std::exception & e) + { + dis = e.what(); + return -4; /* runtime error */ + } + + dis = "failed to disassemble"; + return -1; /* failed to disassemble */ +} + + +uint64 NMD::extract_code_18_to_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 19); + return value; +} + + +uint64 NMD::extract_shift3_2_1_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 3); + return value; +} + + +uint64 NMD::extr_uil3il3bs9Fmsb11(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 3, 9) << 3; + return value; +} + + +uint64 NMD::extract_count_3_2_1_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 4); + return value; +} + + +uint64 NMD::extract_rtz3_9_8_7(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 7, 3); + return value; +} + + +uint64 NMD::extr_uil1il1bs17Fmsb17(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 1, 17) << 1; + return value; +} + + +int64 NMD::extr_sil11il0bs10Tmsb9(uint64 instruction) +{ + int64 value = 0; + value |= extract_bits(instruction, 11, 10); + value = sign_extend(value, 9); + return value; +} + + +int64 NMD::extr_sil0il11bs1_il1il1bs10Tmsb11(uint64 instruction) +{ + int64 value = 0; + value |= extract_bits(instruction, 0, 1) << 11; + value |= extract_bits(instruction, 1, 10) << 1; + value = sign_extend(value, 11); + return value; +} + + +uint64 NMD::extract_u_10(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 10, 1); + return value; +} + + +uint64 NMD::extract_rtz4_27_26_25_23_22_21(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 21, 3); + value |= extract_bits(instruction, 25, 1) << 3; + return value; +} + + +uint64 NMD::extract_sa_15_14_13_12_11(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 11, 5); + return value; +} + + +uint64 NMD::extract_shift_4_3_2_1_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 5); + return value; +} + + +uint64 NMD::extr_shiftxil7il1bs4Fmsb4(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 7, 4) << 1; + return value; +} + + +uint64 NMD::extract_hint_25_24_23_22_21(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 21, 5); + return value; +} + + +uint64 NMD::extract_count3_14_13_12(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 12, 3); + return value; +} + + +int64 NMD::extr_sil0il31bs1_il2il21bs10_il12il12bs9Tmsb31(uint64 instruction) +{ + int64 value = 0; + value |= extract_bits(instruction, 0, 1) << 31; + value |= extract_bits(instruction, 2, 10) << 21; + value |= extract_bits(instruction, 12, 9) << 12; + value = sign_extend(value, 31); + return value; +} + + +int64 NMD::extr_sil0il7bs1_il1il1bs6Tmsb7(uint64 instruction) +{ + int64 value = 0; + value |= extract_bits(instruction, 0, 1) << 7; + value |= extract_bits(instruction, 1, 6) << 1; + value = sign_extend(value, 7); + return value; +} + + +uint64 NMD::extract_u2_10_9(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 9, 2); + return value; +} + + +uint64 NMD::extract_code_25_24_23_22_21_20_19_18_17_16(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 16, 10); + return value; +} + + +uint64 NMD::extract_rs_20_19_18_17_16(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 16, 5); + return value; +} + + +uint64 NMD::extr_uil1il1bs2Fmsb2(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 1, 2) << 1; + return value; +} + + +uint64 NMD::extract_stripe_6(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 6, 1); + return value; +} + + +uint64 NMD::extr_xil17il0bs1Fmsb0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 17, 1); + return value; +} + + +uint64 NMD::extr_xil2il0bs1_il15il0bs1Fmsb0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 2, 1); + value |= extract_bits(instruction, 15, 1); + return value; +} + + +uint64 NMD::extract_ac_13_12(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 14, 2); + return value; +} + + +uint64 NMD::extract_shift_20_19_18_17_16(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 16, 5); + return value; +} + + +uint64 NMD::extract_rdl_25_24(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 24, 1); + return value; +} + + +int64 NMD::extr_sil0il10bs1_il1il1bs9Tmsb10(uint64 instruction) +{ + int64 value = 0; + value |= extract_bits(instruction, 0, 1) << 10; + value |= extract_bits(instruction, 1, 9) << 1; + value = sign_extend(value, 10); + return value; +} + + +uint64 NMD::extract_eu_6_5_4_3_2_1_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 7); + return value; +} + + +uint64 NMD::extract_shift_5_4_3_2_1_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 6); + return value; +} + + +uint64 NMD::extr_xil10il0bs6Fmsb5(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 10, 6); + return value; +} + + +uint64 NMD::extract_count_19_18_17_16(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 16, 4); + return value; +} + + +uint64 NMD::extract_code_2_1_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 3); + return value; +} + + +uint64 NMD::extr_xil10il0bs4_il22il0bs4Fmsb3(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 10, 4); + value |= extract_bits(instruction, 22, 4); + return value; +} + + +uint64 NMD::extract_u_11_10_9_8_7_6_5_4_3_2_1_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 12); + return value; +} + + +uint64 NMD::extract_rs_4_3_2_1_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 5); + return value; +} + + +uint64 NMD::extr_uil3il3bs18Fmsb20(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 3, 18) << 3; + return value; +} + + +uint64 NMD::extr_xil12il0bs1Fmsb0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 12, 1); + return value; +} + + +uint64 NMD::extr_uil0il2bs4Fmsb5(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 4) << 2; + return value; +} + + +uint64 NMD::extract_cofun_25_24_23(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 3, 23); + return value; +} + + +uint64 NMD::extr_uil0il2bs3Fmsb4(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 3) << 2; + return value; +} + + +uint64 NMD::extr_xil10il0bs1Fmsb0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 10, 1); + return value; +} + + +uint64 NMD::extract_rd3_3_2_1(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 1, 3); + return value; +} + + +uint64 NMD::extract_sa_15_14_13_12(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 12, 4); + return value; +} + + +uint64 NMD::extract_rt_25_24_23_22_21(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 21, 5); + return value; +} + + +uint64 NMD::extract_ru_7_6_5_4_3(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 3, 5); + return value; +} + + +uint64 NMD::extr_xil21il0bs5Fmsb4(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 21, 5); + return value; +} + + +uint64 NMD::extr_xil9il0bs3Fmsb2(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 9, 3); + return value; +} + + +uint64 NMD::extract_u_17_to_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 18); + return value; +} + + +uint64 NMD::extr_xil14il0bs1_il15il0bs1Fmsb0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 14, 1); + value |= extract_bits(instruction, 15, 1); + return value; +} + + +uint64 NMD::extract_rsz4_4_2_1_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 3); + value |= extract_bits(instruction, 4, 1) << 3; + return value; +} + + +uint64 NMD::extr_xil24il0bs1Fmsb0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 24, 1); + return value; +} + + +int64 NMD::extr_sil0il21bs1_il1il1bs20Tmsb21(uint64 instruction) +{ + int64 value = 0; + value |= extract_bits(instruction, 0, 1) << 21; + value |= extract_bits(instruction, 1, 20) << 1; + value = sign_extend(value, 21); + return value; +} + + +uint64 NMD::extract_op_25_to_3(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 3, 23); + return value; +} + + +uint64 NMD::extract_rs4_4_2_1_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 3); + value |= extract_bits(instruction, 4, 1) << 3; + return value; +} + + +uint64 NMD::extract_bit_23_22_21(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 21, 3); + return value; +} + + +uint64 NMD::extract_rt_41_40_39_38_37(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 37, 5); + return value; +} + + +int64 NMD::extract_shift_21_20_19_18_17_16(uint64 instruction) +{ + int64 value = 0; + value |= extract_bits(instruction, 16, 6); + value = sign_extend(value, 5); + return value; +} + + +uint64 NMD::extr_xil6il0bs3_il10il0bs1Fmsb2(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 6, 3); + value |= extract_bits(instruction, 10, 1); + return value; +} + + +uint64 NMD::extract_rd2_3_8(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 3, 1) << 1; + value |= extract_bits(instruction, 8, 1); + return value; +} + + +uint64 NMD::extr_xil16il0bs5Fmsb4(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 16, 5); + return value; +} + + +uint64 NMD::extract_code_17_to_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 18); + return value; +} + + +uint64 NMD::extr_xil0il0bs12Fmsb11(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 12); + return value; +} + + +uint64 NMD::extract_size_20_19_18_17_16(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 16, 5); + return value; +} + + +int64 NMD::extr_sil2il2bs6_il15il8bs1Tmsb8(uint64 instruction) +{ + int64 value = 0; + value |= extract_bits(instruction, 2, 6) << 2; + value |= extract_bits(instruction, 15, 1) << 8; + value = sign_extend(value, 8); + return value; +} + + +uint64 NMD::extract_u_15_to_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 16); + return value; +} + + +uint64 NMD::extract_fs_15_14_13_12_11(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 16, 5); + return value; +} + + +int64 NMD::extr_sil0il0bs8_il15il8bs1Tmsb8(uint64 instruction) +{ + int64 value = 0; + value |= extract_bits(instruction, 0, 8); + value |= extract_bits(instruction, 15, 1) << 8; + value = sign_extend(value, 8); + return value; +} + + +uint64 NMD::extract_stype_20_19_18_17_16(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 16, 5); + return value; +} + + +uint64 NMD::extract_rtl_11(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 9, 1); + return value; +} + + +uint64 NMD::extract_hs_20_19_18_17_16(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 16, 5); + return value; +} + + +uint64 NMD::extr_xil10il0bs1_il14il0bs2Fmsb1(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 10, 1); + value |= extract_bits(instruction, 14, 2); + return value; +} + + +uint64 NMD::extract_sel_13_12_11(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 11, 3); + return value; +} + + +uint64 NMD::extract_lsb_4_3_2_1_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 5); + return value; +} + + +uint64 NMD::extr_xil14il0bs2Fmsb1(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 14, 2); + return value; +} + + +uint64 NMD::extract_gp_2(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 2, 1); + return value; +} + + +uint64 NMD::extract_rt3_9_8_7(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 7, 3); + return value; +} + + +uint64 NMD::extract_ft_20_19_18_17_16(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 21, 5); + return value; +} + + +uint64 NMD::extract_u_17_16_15_14_13_12_11(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 11, 7); + return value; +} + + +uint64 NMD::extract_cs_20_19_18_17_16(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 16, 5); + return value; +} + + +uint64 NMD::extr_xil16il0bs10Fmsb9(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 16, 10); + return value; +} + + +uint64 NMD::extract_rt4_9_7_6_5(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 5, 3); + value |= extract_bits(instruction, 9, 1) << 3; + return value; +} + + +uint64 NMD::extract_msbt_10_9_8_7_6(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 6, 5); + return value; +} + + +uint64 NMD::extr_uil0il2bs6Fmsb7(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 6) << 2; + return value; +} + + +uint64 NMD::extr_xil17il0bs9Fmsb8(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 17, 9); + return value; +} + + +uint64 NMD::extract_sa_15_14_13(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 13, 3); + return value; +} + + +int64 NMD::extr_sil0il14bs1_il1il1bs13Tmsb14(uint64 instruction) +{ + int64 value = 0; + value |= extract_bits(instruction, 0, 1) << 14; + value |= extract_bits(instruction, 1, 13) << 1; + value = sign_extend(value, 14); + return value; +} + + +uint64 NMD::extract_rs3_6_5_4(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 4, 3); + return value; +} + + +uint64 NMD::extr_uil0il32bs32Fmsb63(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 32) << 32; + return value; +} + + +uint64 NMD::extract_shift_10_9_8_7_6(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 6, 5); + return value; +} + + +uint64 NMD::extract_cs_25_24_23_22_21(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 21, 5); + return value; +} + + +uint64 NMD::extract_shiftx_11_10_9_8_7_6(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 6, 6); + return value; +} + + +uint64 NMD::extract_rt_9_8_7_6_5(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 5, 5); + return value; +} + + +uint64 NMD::extract_op_25_24_23_22_21(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 21, 5); + return value; +} + + +uint64 NMD::extr_uil0il2bs7Fmsb8(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 7) << 2; + return value; +} + + +uint64 NMD::extract_bit_16_15_14_13_12_11(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 11, 6); + return value; +} + + +uint64 NMD::extr_xil10il0bs1_il11il0bs5Fmsb4(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 10, 1); + value |= extract_bits(instruction, 11, 5); + return value; +} + + +uint64 NMD::extract_mask_20_19_18_17_16_15_14(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 14, 7); + return value; +} + + +uint64 NMD::extract_eu_3_2_1_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 4); + return value; +} + + +uint64 NMD::extr_uil4il4bs4Fmsb7(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 4, 4) << 4; + return value; +} + + +int64 NMD::extr_sil3il3bs5_il15il8bs1Tmsb8(uint64 instruction) +{ + int64 value = 0; + value |= extract_bits(instruction, 3, 5) << 3; + value |= extract_bits(instruction, 15, 1) << 8; + value = sign_extend(value, 8); + return value; +} + + +uint64 NMD::extract_ft_15_14_13_12_11(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 11, 5); + return value; +} + + +int64 NMD::extr_sil0il16bs16_il16il0bs16Tmsb31(uint64 instruction) +{ + int64 value = 0; + value |= extract_bits(instruction, 0, 16) << 16; + value |= extract_bits(instruction, 16, 16); + value = sign_extend(value, 31); + return value; +} + + +uint64 NMD::extract_u_20_19_18_17_16_15_14_13(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 13, 8); + return value; +} + + +uint64 NMD::extr_xil15il0bs1Fmsb0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 15, 1); + return value; +} + + +uint64 NMD::extr_xil11il0bs5Fmsb4(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 11, 5); + return value; +} + + +uint64 NMD::extr_uil2il2bs16Fmsb17(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 2, 16) << 2; + return value; +} + + +uint64 NMD::extract_rd_20_19_18_17_16(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 11, 5); + return value; +} + + +uint64 NMD::extract_c0s_20_19_18_17_16(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 16, 5); + return value; +} + + +uint64 NMD::extract_code_1_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 2); + return value; +} + + +int64 NMD::extr_sil0il25bs1_il1il1bs24Tmsb25(uint64 instruction) +{ + int64 value = 0; + value |= extract_bits(instruction, 0, 1) << 25; + value |= extract_bits(instruction, 1, 24) << 1; + value = sign_extend(value, 25); + return value; +} + + +uint64 NMD::extr_xil0il0bs3_il4il0bs1Fmsb2(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 3); + value |= extract_bits(instruction, 4, 1); + return value; +} + + +uint64 NMD::extract_u_1_0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 2); + return value; +} + + +uint64 NMD::extr_uil3il3bs1_il8il2bs1Fmsb3(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 3, 1) << 3; + value |= extract_bits(instruction, 8, 1) << 2; + return value; +} + + +uint64 NMD::extr_xil9il0bs3_il16il0bs5Fmsb4(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 9, 3); + value |= extract_bits(instruction, 16, 5); + return value; +} + + +uint64 NMD::extract_fd_10_9_8_7_6(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 11, 5); + return value; +} + + +uint64 NMD::extr_xil6il0bs3Fmsb2(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 6, 3); + return value; +} + + +uint64 NMD::extr_uil0il2bs5Fmsb6(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 5) << 2; + return value; +} + + +uint64 NMD::extract_rtz4_9_7_6_5(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 5, 3); + value |= extract_bits(instruction, 9, 1) << 3; + return value; +} + + +uint64 NMD::extract_sel_15_14_13_12_11(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 11, 5); + return value; +} + + +uint64 NMD::extract_ct_25_24_23_22_21(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 21, 5); + return value; +} + + +uint64 NMD::extr_xil11il0bs1Fmsb0(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 11, 1); + return value; +} + + +uint64 NMD::extr_uil2il2bs19Fmsb20(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 2, 19) << 2; + return value; +} + + +int64 NMD::extract_s_4_2_1_0(uint64 instruction) +{ + int64 value = 0; + value |= extract_bits(instruction, 0, 3); + value |= extract_bits(instruction, 4, 1) << 3; + value = sign_extend(value, 3); + return value; +} + + +uint64 NMD::extr_uil0il1bs4Fmsb4(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 0, 4) << 1; + return value; +} + + +uint64 NMD::extr_xil9il0bs2Fmsb1(uint64 instruction) +{ + uint64 value = 0; + value |= extract_bits(instruction, 9, 2); + return value; +} + + + +bool NMD::ADDIU_32__cond(uint64 instruction) +{ + uint64 rt = extract_rt_25_24_23_22_21(instruction); + return rt != 0; +} + + +bool NMD::ADDIU_RS5__cond(uint64 instruction) +{ + uint64 rt = extract_rt_9_8_7_6_5(instruction); + return rt != 0; +} + + +bool NMD::BALRSC_cond(uint64 instruction) +{ + uint64 rt = extract_rt_25_24_23_22_21(instruction); + return rt != 0; +} + + +bool NMD::BEQC_16__cond(uint64 instruction) +{ + uint64 rs3 = extract_rs3_6_5_4(instruction); + uint64 rt3 = extract_rt3_9_8_7(instruction); + uint64 u = extr_uil0il1bs4Fmsb4(instruction); + return rs3 < rt3 && u != 0; +} + + +bool NMD::BNEC_16__cond(uint64 instruction) +{ + uint64 rs3 = extract_rs3_6_5_4(instruction); + uint64 rt3 = extract_rt3_9_8_7(instruction); + uint64 u = extr_uil0il1bs4Fmsb4(instruction); + return rs3 >= rt3 && u != 0; +} + + +bool NMD::MOVE_cond(uint64 instruction) +{ + uint64 rt = extract_rt_9_8_7_6_5(instruction); + return rt != 0; +} + + +bool NMD::P16_BR1_cond(uint64 instruction) +{ + uint64 u = extr_uil0il1bs4Fmsb4(instruction); + return u != 0; +} + + +bool NMD::PREF_S9__cond(uint64 instruction) +{ + uint64 hint = extract_hint_25_24_23_22_21(instruction); + return hint != 31; +} + + +bool NMD::PREFE_cond(uint64 instruction) +{ + uint64 hint = extract_hint_25_24_23_22_21(instruction); + return hint != 31; +} + + +bool NMD::SLTU_cond(uint64 instruction) +{ + uint64 rd = extract_rd_20_19_18_17_16(instruction); + return rd != 0; +} + + + +/* + * ABS.D fd, fs - Floating Point Absolute Value + * + * 3 2 1 + * 10987654321098765432109876543210 + * 010001 00000 000101 + * fmt ----- + * fs ----- + * fd ----- + */ +std::string NMD::ABS_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 fd_value = extract_ft_20_19_18_17_16(instruction); + + std::string fs = FPR(copy(fs_value)); + std::string fd = FPR(copy(fd_value)); + + return img::format("ABS.D %s, %s", fd, fs); +} + + +/* + * ABS.S fd, fs - Floating Point Absolute Value + * + * 3 2 1 + * 10987654321098765432109876543210 + * 010001 00000 000101 + * fmt ----- + * fd ----- + * fs ----- + */ +std::string NMD::ABS_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 fd_value = extract_ft_20_19_18_17_16(instruction); + + std::string fs = FPR(copy(fs_value)); + std::string fd = FPR(copy(fd_value)); + + return img::format("ABS.S %s, %s", fd, fs); +} + + +/* + * ABSQ_S.PH rt, rs - Find Absolute Value of Two Fractional Halfwords + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 0001000100111111 + * rt ----- + * rs ----- + */ +std::string NMD::ABSQ_S_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("ABSQ_S.PH %s, %s", rt, rs); +} + + +/* + * ABSQ_S.QB rt, rs - Find Absolute Value of Four Fractional Byte Values + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 0000000100111111 + * rt ----- + * rs ----- + */ +std::string NMD::ABSQ_S_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("ABSQ_S.QB %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 0010000100111111 + * rt ----- + * rs ----- + */ +std::string NMD::ABSQ_S_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("ABSQ_S.W %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 0010000100111111 + * rt ----- + * rs ----- + */ +std::string NMD::ACLR(uint64 instruction) +{ + uint64 bit_value = extract_bit_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string bit = IMMEDIATE(copy(bit_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("ACLR %s, %s(%s)", bit, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 0010000100111111 + * rt ----- + * rs ----- + */ +std::string NMD::ADD(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADD %s, %s, %s", rd, rs, rt); +} + + +/* + * ADD.D fd, fs, ft - Floating Point Add + * + * 3 2 1 + * 10987654321098765432109876543210 + * 010001 000101 + * fmt ----- + * ft ----- + * fs ----- + * fd ----- + */ +std::string NMD::ADD_D(uint64 instruction) +{ + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + std::string fd = FPR(copy(fd_value)); + + return img::format("ADD.D %s, %s, %s", fd, fs, ft); +} + + +/* + * ADD.S fd, fs, ft - Floating Point Add + * + * 3 2 1 + * 10987654321098765432109876543210 + * 010001 000101 + * fmt ----- + * ft ----- + * fs ----- + * fd ----- + */ +std::string NMD::ADD_S(uint64 instruction) +{ + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + std::string fd = FPR(copy(fd_value)); + + return img::format("ADD.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 0010000100111111 + * rt ----- + * rs ----- + */ +std::string NMD::ADDIU_32_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_15_to_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("ADDIU %s, %s, %s", rt, rs, u); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 0010000100111111 + * rt ----- + * rs ----- + */ +std::string NMD::ADDIU_48_(uint64 instruction) +{ + uint64 rt_value = extract_rt_41_40_39_38_37(instruction); + int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + + return img::format("ADDIU %s, %s", rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 0010000100111111 + * rt ----- + * rs ----- + */ +std::string NMD::ADDIU_GP48_(uint64 instruction) +{ + uint64 rt_value = extract_rt_41_40_39_38_37(instruction); + int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + + return img::format("ADDIU %s, $%d, %s", rt, 28, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 0010000100111111 + * rt ----- + * rs ----- + */ +std::string NMD::ADDIU_GP_B_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_17_to_0(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("ADDIU %s, $%d, %s", rt, 28, u); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 0010000100111111 + * rt ----- + * rs ----- + */ +std::string NMD::ADDIU_GP_W_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extr_uil2il2bs19Fmsb20(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("ADDIU %s, $%d, %s", rt, 28, u); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 0010000100111111 + * rt ----- + * rs ----- + */ +std::string NMD::ADDIU_NEG_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string u = IMMEDIATE(neg_copy(u_value)); + + return img::format("ADDIU %s, %s, %s", rt, rs, u); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 0010000100111111 + * rt ----- + * rs ----- + */ +std::string NMD::ADDIU_R1_SP_(uint64 instruction) +{ + uint64 u_value = extr_uil0il2bs6Fmsb7(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("ADDIU %s, $%d, %s", rt3, 29, u); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 0010000100111111 + * rt ----- + * rs ----- + */ +std::string NMD::ADDIU_R2_(uint64 instruction) +{ + uint64 u_value = extr_uil0il2bs3Fmsb4(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("ADDIU %s, %s, %s", rt3, rs3, u); +} + + +/* + * ADDIU[RS5] rt, s5 - Add Signed Word and Set Carry Bit + * + * 5432109876543210 + * 100100 1 + * rt ----- + * s - --- + */ +std::string NMD::ADDIU_RS5_(uint64 instruction) +{ + uint64 rt_value = extract_rt_9_8_7_6_5(instruction); + int64 s_value = extract_s_4_2_1_0(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + + return img::format("ADDIU %s, %s", rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDIUPC_32_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il21bs1_il1il1bs20Tmsb21(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("ADDIUPC %s, %s", rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDIUPC_48_(uint64 instruction) +{ + uint64 rt_value = extract_rt_41_40_39_38_37(instruction); + int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 6); + + return img::format("ADDIUPC %s, %s", rt, s); +} + + +/* + * ADDQ.PH rd, rt, rs - Add Fractional Halfword Vectors + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00000001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDQ_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDQ.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQ_S.PH rd, rt, rs - Add Fractional Halfword Vectors + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 10000001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDQ_S_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDQ_S.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQ_S.W rd, rt, rs - Add Fractional Words + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1100000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDQ_S_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDQ_S.W %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH.PH rd, rt, rs - Add Fractional Halfword Vectors And Shift Right + * to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDQH_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDQH.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.PH rd, rt, rs - Add Fractional Halfword Vectors And Shift Right + * to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 10001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDQH_R_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDQH_R.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDQH_R_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDQH_R.W %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 10010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDQH_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDQH.W %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDSC rd, rt, rs - Add Signed Word and Set Carry Bit + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDSC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDSC %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDU[16] rd3, rs3, rt3 - + * + * 5432109876543210 + * 101100 0 + * rt3 --- + * rs3 --- + * rd3 --- + */ +std::string NMD::ADDU_16_(uint64 instruction) +{ + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + uint64 rd3_value = extract_rd3_3_2_1(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + std::string rd3 = GPR(encode_gpr3(rd3_value)); + + return img::format("ADDU %s, %s, %s", rd3, rs3, rt3); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDU_32_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDU %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDU_4X4_(uint64 instruction) +{ + uint64 rs4_value = extract_rs4_4_2_1_0(instruction); + uint64 rt4_value = extract_rt4_9_7_6_5(instruction); + + std::string rs4 = GPR(encode_gpr4(rs4_value)); + std::string rt4 = GPR(encode_gpr4(rt4_value)); + + return img::format("ADDU %s, %s", rs4, rt4); +} + + +/* + * ADDU.PH rd, rt, rs - Unsigned Add Integer Halfwords + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00100001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDU_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDU.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDU.QB rd, rt, rs - Unsigned Add Quad Byte Vectors + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00011001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDU_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDU.QB %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDU_S.PH rd, rt, rs - Unsigned Add Integer Halfwords + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 10100001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDU_S_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDU_S.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDU_S.QB rd, rt, rs - Unsigned Add Quad Byte Vectors + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 10011001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDU_S_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDU_S.QB %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDUH.QB rd, rt, rs - Unsigned Add Vector Quad-Bytes And Right Shift + * to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00101001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDUH_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDUH.QB %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDUH_R.QB rd, rt, rs - Unsigned Add Vector Quad-Bytes And Right Shift + * to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 10101001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDUH_R_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDUH_R.QB %s, %s, %s", rd, rs, rt); +} + +/* + * ADDWC rd, rt, rs - Add Word with Carry Bit + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1111000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ADDWC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ADDWC %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ALUIPC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il31bs1_il2il21bs10_il12il12bs9Tmsb31(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("ALUIPC %s, %%pcrel_hi(%s)", rt, s); +} + + +/* + * AND[16] rt3, rs3 - + * + * 5432109876543210 + * 101100 + * rt3 --- + * rs3 --- + * eu ---- + */ +std::string NMD::AND_16_(uint64 instruction) +{ + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + + return img::format("AND %s, %s", rs3, rt3); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::AND_32_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("AND %s, %s, %s", rd, rs, rt); +} + + +/* + * ANDI rt, rs, u - + * + * 5432109876543210 + * 101100 + * rt3 --- + * rs3 --- + * eu ---- + */ +std::string NMD::ANDI_16_(uint64 instruction) +{ + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + uint64 eu_value = extract_eu_3_2_1_0(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + std::string eu = IMMEDIATE(encode_eu_from_u_andi16(eu_value)); + + return img::format("ANDI %s, %s, %s", rt3, rs3, eu); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ANDI_32_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("ANDI %s, %s, %s", rt, rs, u); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::APPEND(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 sa_value = extract_sa_15_14_13_12_11(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string sa = IMMEDIATE(copy(sa_value)); + + return img::format("APPEND %s, %s, %s", rt, rs, sa); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ASET(uint64 instruction) +{ + uint64 bit_value = extract_bit_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string bit = IMMEDIATE(copy(bit_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("ASET %s, %s(%s)", bit, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BALC_16_(uint64 instruction) +{ + int64 s_value = extr_sil0il10bs1_il1il1bs9Tmsb10(instruction); + + std::string s = ADDRESS(encode_s_from_address(s_value), 2); + + return img::format("BALC %s", s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BALC_32_(uint64 instruction) +{ + int64 s_value = extr_sil0il25bs1_il1il1bs24Tmsb25(instruction); + + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BALC %s", s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BALRSC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("BALRSC %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BBEQZC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction); + int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string bit = IMMEDIATE(copy(bit_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BBEQZC %s, %s, %s", rt, bit, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BBNEZC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction); + int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string bit = IMMEDIATE(copy(bit_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BBNEZC %s, %s, %s", rt, bit, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BC_16_(uint64 instruction) +{ + int64 s_value = extr_sil0il10bs1_il1il1bs9Tmsb10(instruction); + + std::string s = ADDRESS(encode_s_from_address(s_value), 2); + + return img::format("BC %s", s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BC_32_(uint64 instruction) +{ + int64 s_value = extr_sil0il25bs1_il1il1bs24Tmsb25(instruction); + + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BC %s", s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BC1EQZC(uint64 instruction) +{ + int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BC1EQZC %s, %s", ft, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BC1NEZC(uint64 instruction) +{ + int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BC1NEZC %s, %s", ft, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BC2EQZC(uint64 instruction) +{ + int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction); + uint64 ct_value = extract_ct_25_24_23_22_21(instruction); + + std::string ct = CPR(copy(ct_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BC2EQZC %s, %s", ct, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BC2NEZC(uint64 instruction) +{ + int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction); + uint64 ct_value = extract_ct_25_24_23_22_21(instruction); + + std::string ct = CPR(copy(ct_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BC2NEZC %s, %s", ct, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BEQC_16_(uint64 instruction) +{ + uint64 u_value = extr_uil0il1bs4Fmsb4(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rs3 = GPR(encode_rs3_and_check_rs3_lt_rt3(rs3_value)); + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string u = ADDRESS(encode_u_from_address(u_value), 2); + + return img::format("BEQC %s, %s, %s", rs3, rt3, u); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BEQC_32_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BEQC %s, %s, %s", rs, rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BEQIC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction); + uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BEQIC %s, %s, %s", rt, u, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BEQZC_16_(uint64 instruction) +{ + int64 s_value = extr_sil0il7bs1_il1il1bs6Tmsb7(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 2); + + return img::format("BEQZC %s, %s", rt3, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BGEC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BGEC %s, %s, %s", rs, rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BGEIC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction); + uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BGEIC %s, %s, %s", rt, u, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BGEIUC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction); + uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BGEIUC %s, %s, %s", rt, u, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BGEUC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BGEUC %s, %s, %s", rs, rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BLTC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BLTC %s, %s, %s", rs, rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BLTIC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction); + uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BLTIC %s, %s, %s", rt, u, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BLTIUC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction); + uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BLTIUC %s, %s, %s", rt, u, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BLTUC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BLTUC %s, %s, %s", rs, rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BNEC_16_(uint64 instruction) +{ + uint64 u_value = extr_uil0il1bs4Fmsb4(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rs3 = GPR(encode_rs3_and_check_rs3_ge_rt3(rs3_value)); + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string u = ADDRESS(encode_u_from_address(u_value), 2); + + return img::format("BNEC %s, %s, %s", rs3, rt3, u); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BNEC_32_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BNEC %s, %s, %s", rs, rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BNEIC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il11bs1_il1il1bs10Tmsb11(instruction); + uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BNEIC %s, %s, %s", rt, u, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BNEZC_16_(uint64 instruction) +{ + int64 s_value = extr_sil0il7bs1_il1il1bs6Tmsb7(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 2); + + return img::format("BNEZC %s, %s", rt3, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BPOSGE32C(uint64 instruction) +{ + int64 s_value = extr_sil0il14bs1_il1il1bs13Tmsb14(instruction); + + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("BPOSGE32C %s", s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BREAK_16_(uint64 instruction) +{ + uint64 code_value = extract_code_2_1_0(instruction); + + std::string code = IMMEDIATE(copy(code_value)); + + return img::format("BREAK %s", code); +} + + +/* + * BREAK code - Break. Cause a Breakpoint exception + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BREAK_32_(uint64 instruction) +{ + uint64 code_value = extract_code_18_to_0(instruction); + + std::string code = IMMEDIATE(copy(code_value)); + + return img::format("BREAK %s", code); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::BRSC(uint64 instruction) +{ + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + + return img::format("BRSC %s", rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CACHE(uint64 instruction) +{ + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 op_value = extract_op_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string op = IMMEDIATE(copy(op_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("CACHE %s, %s(%s)", op, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CACHEE(uint64 instruction) +{ + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 op_value = extract_op_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string op = IMMEDIATE(copy(op_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("CACHEE %s, %s(%s)", op, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CEIL_L_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CEIL.L.D %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CEIL_L_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CEIL.L.S %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CEIL_W_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CEIL.W.D %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CEIL_W_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CEIL.W.S %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CFC1(uint64 instruction) +{ + uint64 cs_value = extract_cs_20_19_18_17_16(instruction); + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string cs = CPR(copy(cs_value)); + + return img::format("CFC1 %s, %s", rt, cs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CFC2(uint64 instruction) +{ + uint64 cs_value = extract_cs_20_19_18_17_16(instruction); + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string cs = CPR(copy(cs_value)); + + return img::format("CFC2 %s, %s", rt, cs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CLASS_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CLASS.D %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CLASS_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CLASS.S %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CLO(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("CLO %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CLZ(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("CLZ %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_AF_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.AF.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_AF_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.AF.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_EQ_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.EQ.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_EQ_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("CMP.EQ.PH %s, %s", rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_EQ_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.EQ.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_LE_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.LE.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_LE_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("CMP.LE.PH %s, %s", rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_LE_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.LE.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_LT_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.LT.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_LT_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("CMP.LT.PH %s, %s", rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_LT_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.LT.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_NE_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.NE.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_NE_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.NE.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_OR_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.OR.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_OR_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.OR.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SAF_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SAF.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SAF_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SAF.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SEQ_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SEQ.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SEQ_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SEQ.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SLE_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SLE.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SLE_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SLE.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SLT_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SLT.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SLT_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SLT.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SNE_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SNE.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SNE_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SNE.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SOR_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SOR.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SOR_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SOR.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SUEQ_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SUEQ.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SUEQ_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SUEQ.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SULE_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SULE.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SULE_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SULE.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SULT_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SULT.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SULT_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SULT.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SUN_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SUN.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SUNE_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SUNE.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SUNE_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SUNE.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_SUN_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.SUN.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_UEQ_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.UEQ.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_UEQ_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.UEQ.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_ULE_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.ULE.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_ULE_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.ULE.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_ULT_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.ULT.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_ULT_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.ULT.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_UN_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.UN.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_UNE_D(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.UNE.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_UNE_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.UNE.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMP_UN_S(uint64 instruction) +{ + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("CMP.UN.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMPGDU_EQ_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("CMPGDU.EQ.QB %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMPGDU_LE_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("CMPGDU.LE.QB %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMPGDU_LT_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("CMPGDU.LT.QB %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMPGU_EQ_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("CMPGU.EQ.QB %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMPGU_LE_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("CMPGU.LE.QB %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMPGU_LT_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("CMPGU.LT.QB %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMPU_EQ_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("CMPU.EQ.QB %s, %s", rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMPU_LE_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("CMPU.LE.QB %s, %s", rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CMPU_LT_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("CMPU.LT.QB %s, %s", rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::COP2_1(uint64 instruction) +{ + uint64 cofun_value = extract_cofun_25_24_23(instruction); + + std::string cofun = IMMEDIATE(copy(cofun_value)); + + return img::format("COP2_1 %s", cofun); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CTC1(uint64 instruction) +{ + uint64 cs_value = extract_cs_20_19_18_17_16(instruction); + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string cs = CPR(copy(cs_value)); + + return img::format("CTC1 %s, %s", rt, cs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CTC2(uint64 instruction) +{ + uint64 cs_value = extract_cs_20_19_18_17_16(instruction); + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string cs = CPR(copy(cs_value)); + + return img::format("CTC2 %s, %s", rt, cs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CVT_D_L(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CVT.D.L %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CVT_D_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CVT.D.S %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CVT_D_W(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CVT.D.W %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CVT_L_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CVT.L.D %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CVT_L_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CVT.L.S %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CVT_S_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CVT.S.D %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CVT_S_L(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CVT.S.L %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CVT_S_PL(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CVT.S.PL %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CVT_S_PU(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CVT.S.PU %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CVT_S_W(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CVT.S.W %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CVT_W_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CVT.W.D %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::CVT_W_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("CVT.W.S %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DADDIU_48_(uint64 instruction) +{ + uint64 rt_value = extract_rt_41_40_39_38_37(instruction); + int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + + return img::format("DADDIU %s, %s", rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DADDIU_NEG_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string u = IMMEDIATE(neg_copy(u_value)); + + return img::format("DADDIU %s, %s, %s", rt, rs, u); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DADDIU_U12_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("DADDIU %s, %s, %s", rt, rs, u); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DADD(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DADD %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DADDU(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DADDU %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DCLO(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("DCLO %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DCLZ(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("DCLZ %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DDIV(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DDIV %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DDIVU(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DDIVU %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DERET(uint64 instruction) +{ + (void)instruction; + + return "DERET "; +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DEXTM(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); + uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string lsb = IMMEDIATE(copy(lsb_value)); + std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value)); + + return img::format("DEXTM %s, %s, %s, %s", rt, rs, lsb, msbd); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DEXT(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); + uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string lsb = IMMEDIATE(copy(lsb_value)); + std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value)); + + return img::format("DEXT %s, %s, %s, %s", rt, rs, lsb, msbd); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DEXTU(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); + uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string lsb = IMMEDIATE(copy(lsb_value)); + std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value)); + + return img::format("DEXTU %s, %s, %s, %s", rt, rs, lsb, msbd); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DINSM(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); + uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value)); + std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value)); + /* !!!!!!!!!! - no conversion function */ + + return img::format("DINSM %s, %s, %s, %s", rt, rs, pos, size); + /* hand edited */ +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DINS(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); + uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value)); + std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value)); + /* !!!!!!!!!! - no conversion function */ + + return img::format("DINS %s, %s, %s, %s", rt, rs, pos, size); + /* hand edited */ +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DINSU(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); + uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value)); + std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value)); + /* !!!!!!!!!! - no conversion function */ + + return img::format("DINSU %s, %s, %s, %s", rt, rs, pos, size); + /* hand edited */ +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DI(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + + return img::format("DI %s", rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DIV(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DIV %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DIV_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("DIV.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DIV_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("DIV.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DIVU(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DIVU %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DLSA(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 u2_value = extract_u2_10_9(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + std::string u2 = IMMEDIATE(copy(u2_value)); + + return img::format("DLSA %s, %s, %s, %s", rd, rs, rt, u2); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DLUI_48_(uint64 instruction) +{ + uint64 rt_value = extract_rt_41_40_39_38_37(instruction); + uint64 u_value = extr_uil0il32bs32Fmsb63(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("DLUI %s, %s", rt, u); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DMFC0(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = CPR(copy(c0s_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("DMFC0 %s, %s, %s", rt, c0s, sel); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DMFC1(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("DMFC1 %s, %s", rt, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DMFC2(uint64 instruction) +{ + uint64 cs_value = extract_cs_20_19_18_17_16(instruction); + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string cs = CPR(copy(cs_value)); + + return img::format("DMFC2 %s, %s", rt, cs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DMFGC0(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = CPR(copy(c0s_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("DMFGC0 %s, %s, %s", rt, c0s, sel); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DMOD(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DMOD %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DMODU(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DMODU %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DMTC0(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = CPR(copy(c0s_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("DMTC0 %s, %s, %s", rt, c0s, sel); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DMTC1(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("DMTC1 %s, %s", rt, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DMTC2(uint64 instruction) +{ + uint64 cs_value = extract_cs_20_19_18_17_16(instruction); + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string cs = CPR(copy(cs_value)); + + return img::format("DMTC2 %s, %s", rt, cs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DMTGC0(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = CPR(copy(c0s_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("DMTGC0 %s, %s, %s", rt, c0s, sel); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DMT(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + + return img::format("DMT %s", rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DMUH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DMUH %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DMUHU(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DMUHU %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DMUL(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DMUL %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DMULU(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DMULU %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPA_W_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPA.W.PH %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPAQ_SA_L_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPAQ_SA.L.W %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPAQ_S_W_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPAQ_S.W.PH %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPAQX_SA_W_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPAQX_SA.W.PH %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPAQX_S_W_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPAQX_S.W.PH %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPAU_H_QBL(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPAU.H.QBL %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPAU_H_QBR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPAU.H.QBR %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPAX_W_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPAX.W.PH %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPS_W_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPS.W.PH %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPSQ_SA_L_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPSQ_SA.L.W %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPSQ_S_W_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPSQ_S.W.PH %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPSQX_SA_W_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPSQX_SA.W.PH %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPSQX_S_W_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPSQX_S.W.PH %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPSU_H_QBL(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPSU.H.QBL %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPSU_H_QBR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPSU.H.QBR %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DPSX_W_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DPSX.W.PH %s, %s, %s", ac, rs, rt); +} + + +/* + * DROTR - + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DROTR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("DROTR %s, %s, %s", rt, rs, shift); +} + + +/* + * DROTR[32] - + * + * 3 2 1 + * 10987654321098765432109876543210 + * 10o000 1100xxx0110 + * rt ----- + * rs ----- + * shift ----- + */ +std::string NMD::DROTR32(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("DROTR32 %s, %s, %s", rt, rs, shift); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DROTRV(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DROTRV %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DROTX(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_5_4_3_2_1_0(instruction); + uint64 shiftx_value = extract_shiftx_11_10_9_8_7_6(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + std::string shiftx = IMMEDIATE(copy(shiftx_value)); + + return img::format("DROTX %s, %s, %s, %s", rt, rs, shift, shiftx); +} + + +/* + * DSLL - + * + * 3 2 1 + * 10987654321098765432109876543210 + * 10o000 1100xxx0000 + * rt ----- + * rs ----- + * shift ----- + */ +std::string NMD::DSLL(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("DSLL %s, %s, %s", rt, rs, shift); +} + + +/* + * DSLL[32] - + * + * 3 2 1 + * 10987654321098765432109876543210 + * 10o000 1100xxx0000 + * rt ----- + * rs ----- + * shift ----- + */ +std::string NMD::DSLL32(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("DSLL32 %s, %s, %s", rt, rs, shift); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DSLLV(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DSLLV %s, %s, %s", rd, rs, rt); +} + + +/* + * DSRA - + * + * 3 2 1 + * 10987654321098765432109876543210 + * 10o000 1100xxx0100 + * rt ----- + * rs ----- + * shift ----- + */ +std::string NMD::DSRA(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("DSRA %s, %s, %s", rt, rs, shift); +} + + +/* + * DSRA[32] - + * + * 3 2 1 + * 10987654321098765432109876543210 + * 10o000 1100xxx0100 + * rt ----- + * rs ----- + * shift ----- + */ +std::string NMD::DSRA32(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("DSRA32 %s, %s, %s", rt, rs, shift); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DSRAV(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DSRAV %s, %s, %s", rd, rs, rt); +} + + +/* + * DSRL - + * + * 3 2 1 + * 10987654321098765432109876543210 + * 10o000 1100xxx0100 + * rt ----- + * rs ----- + * shift ----- + */ +std::string NMD::DSRL(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("DSRL %s, %s, %s", rt, rs, shift); +} + + +/* + * DSRL[32] - + * + * 3 2 1 + * 10987654321098765432109876543210 + * 10o000 1100xxx0010 + * rt ----- + * rs ----- + * shift ----- + */ +std::string NMD::DSRL32(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("DSRL32 %s, %s, %s", rt, rs, shift); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DSRLV(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DSRLV %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DSUB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DSUB %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DSUBU(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("DSUBU %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DVPE(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + + return img::format("DVPE %s", rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::DVP(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + + return img::format("DVP %s", rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EHB(uint64 instruction) +{ + (void)instruction; + + return "EHB "; +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EI(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + + return img::format("EI %s", rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EMT(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + + return img::format("EMT %s", rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ERET(uint64 instruction) +{ + (void)instruction; + + return "ERET "; +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ERETNC(uint64 instruction) +{ + (void)instruction; + + return "ERETNC "; +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EVP(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + + return img::format("EVP %s", rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EVPE(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + + return img::format("EVPE %s", rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EXT(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); + uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string lsb = IMMEDIATE(copy(lsb_value)); + std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value)); + + return img::format("EXT %s, %s, %s, %s", rt, rs, lsb, msbd); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EXTD(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_10_9_8_7_6(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("EXTD %s, %s, %s, %s", rd, rs, rt, shift); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EXTD32(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_10_9_8_7_6(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("EXTD32 %s, %s, %s, %s", rd, rs, rt, shift); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EXTPDP(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 size_value = extract_size_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ac = AC(copy(ac_value)); + std::string size = IMMEDIATE(copy(size_value)); + + return img::format("EXTPDP %s, %s, %s", rt, ac, size); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EXTPDPV(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("EXTPDPV %s, %s, %s", rt, ac, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EXTP(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 size_value = extract_size_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ac = AC(copy(ac_value)); + std::string size = IMMEDIATE(copy(size_value)); + + return img::format("EXTP %s, %s, %s", rt, ac, size); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EXTPV(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("EXTPV %s, %s, %s", rt, ac, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EXTR_RS_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_20_19_18_17_16(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ac = AC(copy(ac_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("EXTR_RS.W %s, %s, %s", rt, ac, shift); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EXTR_R_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_20_19_18_17_16(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ac = AC(copy(ac_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("EXTR_R.W %s, %s, %s", rt, ac, shift); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EXTR_S_H(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_20_19_18_17_16(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ac = AC(copy(ac_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("EXTR_S.H %s, %s, %s", rt, ac, shift); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EXTR_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_20_19_18_17_16(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ac = AC(copy(ac_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("EXTR.W %s, %s, %s", rt, ac, shift); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EXTRV_RS_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("EXTRV_RS.W %s, %s, %s", rt, ac, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EXTRV_R_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("EXTRV_R.W %s, %s, %s", rt, ac, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EXTRV_S_H(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("EXTRV_S.H %s, %s, %s", rt, ac, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::EXTRV_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("EXTRV.W %s, %s, %s", rt, ac, rs); +} + + +/* + * EXTW - Extract Word + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 011111 + * rt ----- + * rs ----- + * rd ----- + * shift ----- + */ +std::string NMD::EXTW(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_10_9_8_7_6(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("EXTW %s, %s, %s, %s", rd, rs, rt, shift); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::FLOOR_L_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("FLOOR.L.D %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::FLOOR_L_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("FLOOR.L.S %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::FLOOR_W_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("FLOOR.W.D %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::FLOOR_W_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("FLOOR.W.S %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::FORK(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("FORK %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::HYPCALL(uint64 instruction) +{ + uint64 code_value = extract_code_17_to_0(instruction); + + std::string code = IMMEDIATE(copy(code_value)); + + return img::format("HYPCALL %s", code); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::HYPCALL_16_(uint64 instruction) +{ + uint64 code_value = extract_code_1_0(instruction); + + std::string code = IMMEDIATE(copy(code_value)); + + return img::format("HYPCALL %s", code); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::INS(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction); + uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value)); + std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value)); + /* !!!!!!!!!! - no conversion function */ + + return img::format("INS %s, %s, %s, %s", rt, rs, pos, size); + /* hand edited */ +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::INSV(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("INSV %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::IRET(uint64 instruction) +{ + (void)instruction; + + return "IRET "; +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::JALRC_16_(uint64 instruction) +{ + uint64 rt_value = extract_rt_9_8_7_6_5(instruction); + + std::string rt = GPR(copy(rt_value)); + + return img::format("JALRC $%d, %s", 31, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::JALRC_32_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("JALRC %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::JALRC_HB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("JALRC.HB %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::JRC(uint64 instruction) +{ + uint64 rt_value = extract_rt_9_8_7_6_5(instruction); + + std::string rt = GPR(copy(rt_value)); + + return img::format("JRC %s", rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LB_16_(uint64 instruction) +{ + uint64 u_value = extract_u_1_0(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + + return img::format("LB %s, %s(%s)", rt3, u, rs3); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LB_GP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_17_to_0(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("LB %s, %s($%d)", rt, u, 28); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LB_S9_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LB %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LB_U12_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LB %s, %s(%s)", rt, u, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LBE(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LBE %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LBU_16_(uint64 instruction) +{ + uint64 u_value = extract_u_1_0(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + + return img::format("LBU %s, %s(%s)", rt3, u, rs3); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LBU_GP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_17_to_0(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("LBU %s, %s($%d)", rt, u, 28); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LBU_S9_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LBU %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LBU_U12_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LBU %s, %s(%s)", rt, u, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LBUE(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LBUE %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LBUX(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LBUX %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LBX(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LBX %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LD_GP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extr_uil3il3bs18Fmsb20(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("LD %s, %s($%d)", rt, u, 28); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LD_S9_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LD %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LD_U12_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LD %s, %s(%s)", rt, u, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LDC1_GP_(uint64 instruction) +{ + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 u_value = extr_uil2il2bs16Fmsb17(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("LDC1 %s, %s($%d)", ft, u, 28); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LDC1_S9_(uint64 instruction) +{ + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LDC1 %s, %s(%s)", ft, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LDC1_U12_(uint64 instruction) +{ + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LDC1 %s, %s(%s)", ft, u, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LDC1XS(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ft_value = extract_ft_15_14_13_12_11(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LDC1XS %s, %s(%s)", ft, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LDC1X(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ft_value = extract_ft_15_14_13_12_11(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LDC1X %s, %s(%s)", ft, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LDC2(uint64 instruction) +{ + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 ct_value = extract_ct_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ct = CPR(copy(ct_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LDC2 %s, %s(%s)", ct, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LDM(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 count3_value = extract_count3_14_13_12(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value)); + + return img::format("LDM %s, %s(%s), %s", rt, s, rs, count3); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LDPC_48_(uint64 instruction) +{ + uint64 rt_value = extract_rt_41_40_39_38_37(instruction); + int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 6); + + return img::format("LDPC %s, %s", rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LDX(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LDX %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LDXS(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LDXS %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LH_16_(uint64 instruction) +{ + uint64 u_value = extr_uil1il1bs2Fmsb2(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + + return img::format("LH %s, %s(%s)", rt3, u, rs3); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LH_GP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extr_uil1il1bs17Fmsb17(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("LH %s, %s($%d)", rt, u, 28); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LH_S9_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LH %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LH_U12_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LH %s, %s(%s)", rt, u, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LHE(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LHE %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LHU_16_(uint64 instruction) +{ + uint64 u_value = extr_uil1il1bs2Fmsb2(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + + return img::format("LHU %s, %s(%s)", rt3, u, rs3); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LHU_GP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extr_uil1il1bs17Fmsb17(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("LHU %s, %s($%d)", rt, u, 28); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LHU_S9_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LHU %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LHU_U12_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LHU %s, %s(%s)", rt, u, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LHUE(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LHUE %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LHUX(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LHUX %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LHUXS(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LHUXS %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LHXS(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LHXS %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LHX(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LHX %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LI_16_(uint64 instruction) +{ + uint64 eu_value = extract_eu_6_5_4_3_2_1_0(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string eu = IMMEDIATE(encode_eu_from_s_li16(eu_value)); + + return img::format("LI %s, %s", rt3, eu); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LI_48_(uint64 instruction) +{ + uint64 rt_value = extract_rt_41_40_39_38_37(instruction); + int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + + return img::format("LI %s, %s", rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LL(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil2il2bs6_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LL %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LLD(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil3il3bs5_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LLD %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LLDP(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ru_value = extract_ru_7_6_5_4_3(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ru = GPR(copy(ru_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LLDP %s, %s, (%s)", rt, ru, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LLE(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil2il2bs6_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LLE %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LLWP(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ru_value = extract_ru_7_6_5_4_3(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ru = GPR(copy(ru_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LLWP %s, %s, (%s)", rt, ru, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LLWPE(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ru_value = extract_ru_7_6_5_4_3(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ru = GPR(copy(ru_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LLWPE %s, %s, (%s)", rt, ru, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LSA(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 u2_value = extract_u2_10_9(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + std::string u2 = IMMEDIATE(copy(u2_value)); + + return img::format("LSA %s, %s, %s, %s", rd, rs, rt, u2); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LUI(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il31bs1_il2il21bs10_il12il12bs9Tmsb31(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + + return img::format("LUI %s, %%hi(%s)", rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LW_16_(uint64 instruction) +{ + uint64 u_value = extr_uil0il2bs4Fmsb5(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + + return img::format("LW %s, %s(%s)", rt3, u, rs3); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LW_4X4_(uint64 instruction) +{ + uint64 rs4_value = extract_rs4_4_2_1_0(instruction); + uint64 rt4_value = extract_rt4_9_7_6_5(instruction); + uint64 u_value = extr_uil3il3bs1_il8il2bs1Fmsb3(instruction); + + std::string rt4 = GPR(encode_gpr4(rt4_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs4 = GPR(encode_gpr4(rs4_value)); + + return img::format("LW %s, %s(%s)", rt4, u, rs4); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LW_GP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extr_uil2il2bs19Fmsb20(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("LW %s, %s($%d)", rt, u, 28); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LW_GP16_(uint64 instruction) +{ + uint64 u_value = extr_uil0il2bs7Fmsb8(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("LW %s, %s($%d)", rt3, u, 28); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LW_S9_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LW %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LW_SP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_9_8_7_6_5(instruction); + uint64 u_value = extr_uil0il2bs5Fmsb6(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("LW %s, %s($%d)", rt, u, 29); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LW_U12_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LW %s, %s(%s)", rt, u, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWC1_GP_(uint64 instruction) +{ + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 u_value = extr_uil2il2bs16Fmsb17(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("LWC1 %s, %s($%d)", ft, u, 28); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWC1_S9_(uint64 instruction) +{ + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LWC1 %s, %s(%s)", ft, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWC1_U12_(uint64 instruction) +{ + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LWC1 %s, %s(%s)", ft, u, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWC1X(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ft_value = extract_ft_15_14_13_12_11(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LWC1X %s, %s(%s)", ft, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWC1XS(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ft_value = extract_ft_15_14_13_12_11(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LWC1XS %s, %s(%s)", ft, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWC2(uint64 instruction) +{ + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 ct_value = extract_ct_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ct = CPR(copy(ct_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LWC2 %s, %s(%s)", ct, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWE(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LWE %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWM(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 count3_value = extract_count3_14_13_12(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value)); + + return img::format("LWM %s, %s(%s), %s", rt, s, rs, count3); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWPC_48_(uint64 instruction) +{ + uint64 rt_value = extract_rt_41_40_39_38_37(instruction); + int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 6); + + return img::format("LWPC %s, %s", rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWU_GP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extr_uil2il2bs16Fmsb17(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("LWU %s, %s($%d)", rt, u, 28); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWU_S9_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LWU %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWU_U12_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("LWU %s, %s(%s)", rt, u, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWUX(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LWUX %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWUXS(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LWUXS %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWX(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LWX %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWXS_16_(uint64 instruction) +{ + uint64 rd3_value = extract_rd3_3_2_1(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rd3 = GPR(encode_gpr3(rd3_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + std::string rt3 = IMMEDIATE(encode_gpr3(rt3_value)); + + return img::format("LWXS %s, %s(%s)", rd3, rs3, rt3); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::LWXS_32_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("LWXS %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MADD_DSP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MADD %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MADDF_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("MADDF.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MADDF_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("MADDF.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MADDU_DSP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MADDU %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MAQ_S_W_PHL(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MAQ_S.W.PHL %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MAQ_S_W_PHR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MAQ_S.W.PHR %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MAQ_SA_W_PHL(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MAQ_SA.W.PHL %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MAQ_SA_W_PHR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MAQ_SA.W.PHR %s, %s, %s", ac, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MAX_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("MAX.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MAX_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("MAX.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MAXA_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("MAXA.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MAXA_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("MAXA.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MFC0(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = CPR(copy(c0s_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("MFC0 %s, %s, %s", rt, c0s, sel); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MFC1(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("MFC1 %s, %s", rt, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MFC2(uint64 instruction) +{ + uint64 cs_value = extract_cs_20_19_18_17_16(instruction); + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string cs = CPR(copy(cs_value)); + + return img::format("MFC2 %s, %s", rt, cs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MFGC0(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = CPR(copy(c0s_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("MFGC0 %s, %s, %s", rt, c0s, sel); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MFHC0(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = CPR(copy(c0s_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("MFHC0 %s, %s, %s", rt, c0s, sel); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MFHC1(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("MFHC1 %s, %s", rt, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MFHC2(uint64 instruction) +{ + uint64 cs_value = extract_cs_20_19_18_17_16(instruction); + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string cs = CPR(copy(cs_value)); + + return img::format("MFHC2 %s, %s", rt, cs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MFHGC0(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = CPR(copy(c0s_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("MFHGC0 %s, %s, %s", rt, c0s, sel); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MFHI_DSP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ac = AC(copy(ac_value)); + + return img::format("MFHI %s, %s", rt, ac); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MFHTR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + uint64 u_value = extract_u_10(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = IMMEDIATE(copy(c0s_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("MFHTR %s, %s, %s, %s", rt, c0s, u, sel); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MFLO_DSP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ac = AC(copy(ac_value)); + + return img::format("MFLO %s, %s", rt, ac); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MFTR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + uint64 u_value = extract_u_10(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = IMMEDIATE(copy(c0s_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("MFTR %s, %s, %s, %s", rt, c0s, u, sel); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MIN_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("MIN.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MIN_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("MIN.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MINA_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("MINA.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MINA_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("MINA.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MOD(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MOD %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MODSUB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MODSUB %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MODU(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MODU %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MOV_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("MOV.D %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MOV_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("MOV.S %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MOVE_BALC(uint64 instruction) +{ + uint64 rd1_value = extract_rdl_25_24(instruction); + int64 s_value = extr_sil0il21bs1_il1il1bs20Tmsb21(instruction); + uint64 rtz4_value = extract_rtz4_27_26_25_23_22_21(instruction); + + std::string rd1 = GPR(encode_rd1_from_rd(rd1_value)); + std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 4); + + return img::format("MOVE.BALC %s, %s, %s", rd1, rtz4, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MOVEP(uint64 instruction) +{ + uint64 rsz4_value = extract_rsz4_4_2_1_0(instruction); + uint64 rtz4_value = extract_rtz4_9_7_6_5(instruction); + uint64 rd2_value = extract_rd2_3_8(instruction); + + std::string rd2 = GPR(encode_rd2_reg1(rd2_value)); + std::string re2 = GPR(encode_rd2_reg2(rd2_value)); + /* !!!!!!!!!! - no conversion function */ + std::string rsz4 = GPR(encode_gpr4_zero(rsz4_value)); + std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value)); + + return img::format("MOVEP %s, %s, %s, %s", rd2, re2, rsz4, rtz4); + /* hand edited */ +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MOVEP_REV_(uint64 instruction) +{ + uint64 rs4_value = extract_rs4_4_2_1_0(instruction); + uint64 rt4_value = extract_rt4_9_7_6_5(instruction); + uint64 rd2_value = extract_rd2_3_8(instruction); + + std::string rs4 = GPR(encode_gpr4(rs4_value)); + std::string rt4 = GPR(encode_gpr4(rt4_value)); + std::string rd2 = GPR(encode_rd2_reg1(rd2_value)); + std::string rs2 = GPR(encode_rd2_reg2(rd2_value)); + /* !!!!!!!!!! - no conversion function */ + + return img::format("MOVEP %s, %s, %s, %s", rs4, rt4, rd2, rs2); + /* hand edited */ +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MOVE(uint64 instruction) +{ + uint64 rt_value = extract_rt_9_8_7_6_5(instruction); + uint64 rs_value = extract_rs_4_3_2_1_0(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("MOVE %s, %s", rt, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MOVN(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MOVN %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MOVZ(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MOVZ %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MSUB_DSP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MSUB %s, %s, %s", ac, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MSUBF_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("MSUBF.D %s, %s, %s", fd, fs, ft); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MSUBF_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("MSUBF.S %s, %s, %s", fd, fs, ft); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MSUBU_DSP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MSUBU %s, %s, %s", ac, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MTC0(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = CPR(copy(c0s_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("MTC0 %s, %s, %s", rt, c0s, sel); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MTC1(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("MTC1 %s, %s", rt, fs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MTC2(uint64 instruction) +{ + uint64 cs_value = extract_cs_20_19_18_17_16(instruction); + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string cs = CPR(copy(cs_value)); + + return img::format("MTC2 %s, %s", rt, cs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MTGC0(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = CPR(copy(c0s_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("MTGC0 %s, %s, %s", rt, c0s, sel); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MTHC0(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = CPR(copy(c0s_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("MTHC0 %s, %s, %s", rt, c0s, sel); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MTHC1(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("MTHC1 %s, %s", rt, fs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MTHC2(uint64 instruction) +{ + uint64 cs_value = extract_cs_20_19_18_17_16(instruction); + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string cs = CPR(copy(cs_value)); + + return img::format("MTHC2 %s, %s", rt, cs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MTHGC0(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = CPR(copy(c0s_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("MTHGC0 %s, %s, %s", rt, c0s, sel); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MTHI_DSP_(uint64 instruction) +{ + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string ac = AC(copy(ac_value)); + + return img::format("MTHI %s, %s", rs, ac); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MTHLIP(uint64 instruction) +{ + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string ac = AC(copy(ac_value)); + + return img::format("MTHLIP %s, %s", rs, ac); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MTHTR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + uint64 u_value = extract_u_10(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = IMMEDIATE(copy(c0s_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("MTHTR %s, %s, %s, %s", rt, c0s, u, sel); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MTLO_DSP_(uint64 instruction) +{ + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string ac = AC(copy(ac_value)); + + return img::format("MTLO %s, %s", rs, ac); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MTTR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_15_14_13_12_11(instruction); + uint64 u_value = extract_u_10(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string c0s = IMMEDIATE(copy(c0s_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("MTTR %s, %s, %s, %s", rt, c0s, u, sel); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MUH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MUH %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MUHU(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MUHU %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MUL_32_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MUL %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MUL_4X4_(uint64 instruction) +{ + uint64 rs4_value = extract_rs4_4_2_1_0(instruction); + uint64 rt4_value = extract_rt4_9_7_6_5(instruction); + + std::string rs4 = GPR(encode_gpr4(rs4_value)); + std::string rt4 = GPR(encode_gpr4(rt4_value)); + + return img::format("MUL %s, %s", rs4, rt4); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MUL_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("MUL.D %s, %s, %s", fd, fs, ft); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MUL_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MUL.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MUL_S_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MUL_S.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MUL_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("MUL.S %s, %s, %s", fd, fs, ft); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MULEQ_S_W_PHL(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MULEQ_S.W.PHL %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MULEQ_S_W_PHR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MULEQ_S.W.PHR %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MULEU_S_PH_QBL(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MULEU_S.PH.QBL %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MULEU_S_PH_QBR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MULEU_S.PH.QBR %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MULQ_RS_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MULQ_RS.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MULQ_RS_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MULQ_RS.W %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MULQ_S_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MULQ_S.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MULQ_S_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MULQ_S.W %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MULSA_W_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MULSA.W.PH %s, %s, %s", ac, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MULSAQ_S_W_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MULSAQ_S.W.PH %s, %s, %s", ac, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MULT_DSP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MULT %s, %s, %s", ac, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MULTU_DSP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ac = AC(copy(ac_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MULTU %s, %s, %s", ac, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::MULU(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("MULU %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::NEG_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("NEG.D %s, %s", ft, fs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::NEG_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("NEG.S %s, %s", ft, fs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::NOP_16_(uint64 instruction) +{ + (void)instruction; + + return "NOP "; +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::NOP_32_(uint64 instruction) +{ + (void)instruction; + + return "NOP "; +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::NOR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("NOR %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::NOT_16_(uint64 instruction) +{ + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + + return img::format("NOT %s, %s", rt3, rs3); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::OR_16_(uint64 instruction) +{ + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rs3 = GPR(encode_gpr3(rs3_value)); + std::string rt3 = GPR(encode_gpr3(rt3_value)); + + return img::format("OR %s, %s", rs3, rt3); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::OR_32_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("OR %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ORI(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("ORI %s, %s, %s", rt, rs, u); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PACKRL_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("PACKRL.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PAUSE(uint64 instruction) +{ + (void)instruction; + + return "PAUSE "; +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PICK_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("PICK.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PICK_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("PICK.QB %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECEQ_W_PHL(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("PRECEQ.W.PHL %s, %s", rt, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECEQ_W_PHR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("PRECEQ.W.PHR %s, %s", rt, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECEQU_PH_QBLA(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("PRECEQU.PH.QBLA %s, %s", rt, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECEQU_PH_QBL(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("PRECEQU.PH.QBL %s, %s", rt, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECEQU_PH_QBRA(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("PRECEQU.PH.QBRA %s, %s", rt, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECEQU_PH_QBR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("PRECEQU.PH.QBR %s, %s", rt, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECEU_PH_QBLA(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("PRECEU.PH.QBLA %s, %s", rt, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECEU_PH_QBL(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("PRECEU.PH.QBL %s, %s", rt, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECEU_PH_QBRA(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("PRECEU.PH.QBRA %s, %s", rt, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECEU_PH_QBR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("PRECEU.PH.QBR %s, %s", rt, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECR_QB_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("PRECR.QB.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECR_SRA_PH_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 sa_value = extract_sa_15_14_13_12_11(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string sa = IMMEDIATE(copy(sa_value)); + + return img::format("PRECR_SRA.PH.W %s, %s, %s", rt, rs, sa); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECR_SRA_R_PH_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 sa_value = extract_sa_15_14_13_12_11(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string sa = IMMEDIATE(copy(sa_value)); + + return img::format("PRECR_SRA_R.PH.W %s, %s, %s", rt, rs, sa); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECRQ_PH_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("PRECRQ.PH.W %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECRQ_QB_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("PRECRQ.QB.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECRQ_RS_PH_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("PRECRQ_RS.PH.W %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PRECRQU_S_QB_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("PRECRQU_S.QB.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PREF_S9_(uint64 instruction) +{ + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 hint_value = extract_hint_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string hint = IMMEDIATE(copy(hint_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("PREF %s, %s(%s)", hint, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PREF_U12_(uint64 instruction) +{ + uint64 hint_value = extract_hint_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string hint = IMMEDIATE(copy(hint_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("PREF %s, %s(%s)", hint, u, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PREFE(uint64 instruction) +{ + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 hint_value = extract_hint_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string hint = IMMEDIATE(copy(hint_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("PREFE %s, %s(%s)", hint, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::PREPEND(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 sa_value = extract_sa_15_14_13_12_11(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string sa = IMMEDIATE(copy(sa_value)); + + return img::format("PREPEND %s, %s, %s", rt, rs, sa); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::RADDU_W_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("RADDU.W.QB %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::RDDSP(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 mask_value = extract_mask_20_19_18_17_16_15_14(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string mask = IMMEDIATE(copy(mask_value)); + + return img::format("RDDSP %s, %s", rt, mask); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::RDHWR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 hs_value = extract_hs_20_19_18_17_16(instruction); + uint64 sel_value = extract_sel_13_12_11(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string hs = CPR(copy(hs_value)); + std::string sel = IMMEDIATE(copy(sel_value)); + + return img::format("RDHWR %s, %s, %s", rt, hs, sel); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::RDPGPR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("RDPGPR %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::RECIP_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("RECIP.D %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::RECIP_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("RECIP.S %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::REPL_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil11il0bs10Tmsb9(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + + return img::format("REPL.PH %s, %s", rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::REPL_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_20_19_18_17_16_15_14_13(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("REPL.QB %s, %s", rt, u); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::REPLV_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("REPLV.PH %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::REPLV_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("REPLV.QB %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::RESTORE_32_(uint64 instruction) +{ + uint64 count_value = extract_count_19_18_17_16(instruction); + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extr_uil3il3bs9Fmsb11(instruction); + uint64 gp_value = extract_gp_2(instruction); + + std::string u = IMMEDIATE(copy(u_value)); + return img::format("RESTORE %s%s", u, + save_restore_list(rt_value, count_value, gp_value)); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::RESTORE_JRC_16_(uint64 instruction) +{ + uint64 count_value = extract_count_3_2_1_0(instruction); + uint64 rt1_value = extract_rtl_11(instruction); + uint64 u_value = extr_uil4il4bs4Fmsb7(instruction); + + std::string u = IMMEDIATE(copy(u_value)); + return img::format("RESTORE.JRC %s%s", u, + save_restore_list(encode_rt1_from_rt(rt1_value), count_value, 0)); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::RESTORE_JRC_32_(uint64 instruction) +{ + uint64 count_value = extract_count_19_18_17_16(instruction); + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extr_uil3il3bs9Fmsb11(instruction); + uint64 gp_value = extract_gp_2(instruction); + + std::string u = IMMEDIATE(copy(u_value)); + return img::format("RESTORE.JRC %s%s", u, + save_restore_list(rt_value, count_value, gp_value)); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::RESTOREF(uint64 instruction) +{ + uint64 count_value = extract_count_19_18_17_16(instruction); + uint64 u_value = extr_uil3il3bs9Fmsb11(instruction); + + std::string u = IMMEDIATE(copy(u_value)); + std::string count = IMMEDIATE(copy(count_value)); + + return img::format("RESTOREF %s, %s", u, count); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::RINT_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("RINT.D %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::RINT_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("RINT.S %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ROTR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("ROTR %s, %s, %s", rt, rs, shift); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ROTRV(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("ROTRV %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ROTX(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_4_3_2_1_0(instruction); + uint64 shiftx_value = extr_shiftxil7il1bs4Fmsb4(instruction); + uint64 stripe_value = extract_stripe_6(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + std::string shiftx = IMMEDIATE(copy(shiftx_value)); + std::string stripe = IMMEDIATE(copy(stripe_value)); + + return img::format("ROTX %s, %s, %s, %s, %s", + rt, rs, shift, shiftx, stripe); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ROUND_L_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("ROUND.L.D %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ROUND_L_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("ROUND.L.S %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ROUND_W_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("ROUND.W.D %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::ROUND_W_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("ROUND.W.S %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::RSQRT_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("RSQRT.D %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 x1110000101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::RSQRT_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("RSQRT.S %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SAVE_16_(uint64 instruction) +{ + uint64 count_value = extract_count_3_2_1_0(instruction); + uint64 rt1_value = extract_rtl_11(instruction); + uint64 u_value = extr_uil4il4bs4Fmsb7(instruction); + + std::string u = IMMEDIATE(copy(u_value)); + return img::format("SAVE %s%s", u, + save_restore_list(encode_rt1_from_rt(rt1_value), count_value, 0)); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SAVE_32_(uint64 instruction) +{ + uint64 count_value = extract_count_19_18_17_16(instruction); + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extr_uil3il3bs9Fmsb11(instruction); + uint64 gp_value = extract_gp_2(instruction); + + std::string u = IMMEDIATE(copy(u_value)); + return img::format("SAVE %s%s", u, + save_restore_list(rt_value, count_value, gp_value)); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SAVEF(uint64 instruction) +{ + uint64 count_value = extract_count_19_18_17_16(instruction); + uint64 u_value = extr_uil3il3bs9Fmsb11(instruction); + + std::string u = IMMEDIATE(copy(u_value)); + std::string count = IMMEDIATE(copy(count_value)); + + return img::format("SAVEF %s, %s", u, count); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SB_16_(uint64 instruction) +{ + uint64 rtz3_value = extract_rtz3_9_8_7(instruction); + uint64 u_value = extract_u_1_0(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rtz3 = GPR(encode_gpr3_store(rtz3_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + + return img::format("SB %s, %s(%s)", rtz3, u, rs3); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SB_GP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_17_to_0(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("SB %s, %s($%d)", rt, u, 28); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SB_S9_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SB %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SB_U12_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SB %s, %s(%s)", rt, u, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SBE(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SBE %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SBX(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SBX %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SC(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil2il2bs6_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SC %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SCD(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil3il3bs5_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SCD %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SCDP(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ru_value = extract_ru_7_6_5_4_3(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ru = GPR(copy(ru_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SCDP %s, %s, (%s)", rt, ru, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SCE(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil2il2bs6_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SCE %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SCWP(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ru_value = extract_ru_7_6_5_4_3(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ru = GPR(copy(ru_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SCWP %s, %s, (%s)", rt, ru, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SCWPE(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ru_value = extract_ru_7_6_5_4_3(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string ru = GPR(copy(ru_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SCWPE %s, %s, (%s)", rt, ru, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SD_GP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extr_uil3il3bs18Fmsb20(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("SD %s, %s($%d)", rt, u, 28); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SD_S9_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SD %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SD_U12_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SD %s, %s(%s)", rt, u, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SDBBP_16_(uint64 instruction) +{ + uint64 code_value = extract_code_2_1_0(instruction); + + std::string code = IMMEDIATE(copy(code_value)); + + return img::format("SDBBP %s", code); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SDBBP_32_(uint64 instruction) +{ + uint64 code_value = extract_code_18_to_0(instruction); + + std::string code = IMMEDIATE(copy(code_value)); + + return img::format("SDBBP %s", code); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SDC1_GP_(uint64 instruction) +{ + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 u_value = extr_uil2il2bs16Fmsb17(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("SDC1 %s, %s($%d)", ft, u, 28); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SDC1_S9_(uint64 instruction) +{ + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SDC1 %s, %s(%s)", ft, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SDC1_U12_(uint64 instruction) +{ + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SDC1 %s, %s(%s)", ft, u, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SDC1X(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ft_value = extract_ft_15_14_13_12_11(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SDC1X %s, %s(%s)", ft, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SDC1XS(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ft_value = extract_ft_15_14_13_12_11(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SDC1XS %s, %s(%s)", ft, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SDC2(uint64 instruction) +{ + uint64 cs_value = extract_cs_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string cs = CPR(copy(cs_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SDC2 %s, %s(%s)", cs, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SDM(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 count3_value = extract_count3_14_13_12(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value)); + + return img::format("SDM %s, %s(%s), %s", rt, s, rs, count3); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SDPC_48_(uint64 instruction) +{ + uint64 rt_value = extract_rt_41_40_39_38_37(instruction); + int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 6); + + return img::format("SDPC %s, %s", rt, s); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SDXS(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SDXS %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SDX(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SDX %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SEB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SEB %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SEH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SEH %s, %s", rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SEL_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("SEL.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SEL_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("SEL.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SELEQZ_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("SELEQZ.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SELEQZ_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("SELEQZ.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SELNEZ_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("SELNEZ.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SELNEZ_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("SELNEZ.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SEQI(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("SEQI %s, %s, %s", rt, rs, u); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SH_16_(uint64 instruction) +{ + uint64 rtz3_value = extract_rtz3_9_8_7(instruction); + uint64 u_value = extr_uil1il1bs2Fmsb2(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rtz3 = GPR(encode_gpr3_store(rtz3_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + + return img::format("SH %s, %s(%s)", rtz3, u, rs3); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SH_GP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extr_uil1il1bs17Fmsb17(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("SH %s, %s($%d)", rt, u, 28); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SH_S9_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SH %s, %s(%s)", rt, s, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SH_U12_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SH %s, %s(%s)", rt, u, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHE(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SHE %s, %s(%s)", rt, s, rs); +} + + +/* + * SHILO ac, shift - Shift an Accumulator Value Leaving the Result in the Same + * Accumulator + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000xxxx xxxx0000011101 + * shift ------ + * ac -- + */ +std::string NMD::SHILO(uint64 instruction) +{ + int64 shift_value = extract_shift_21_20_19_18_17_16(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + + std::string shift = IMMEDIATE(copy(shift_value)); + std::string ac = AC(copy(ac_value)); + + return img::format("SHILO %s, %s", ac, shift); +} + + +/* + * SHILOV ac, rs - Variable Shift of Accumulator Value Leaving the Result in + * the Same Accumulator + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000xxxxx 01001001111111 + * rs ----- + * ac -- + */ +std::string NMD::SHILOV(uint64 instruction) +{ + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + uint64 ac_value = extract_ac_13_12(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string ac = AC(copy(ac_value)); + + return img::format("SHILOV %s, %s", ac, rs); +} + + +/* + * SHLL.PH rt, rs, sa - Shift Left Logical Vector Pair Halfwords + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 001110110101 + * rt ----- + * rs ----- + * sa ---- + */ +std::string NMD::SHLL_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + uint64 sa_value = extract_sa_15_14_13_12(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string sa = IMMEDIATE(copy(sa_value)); + + return img::format("SHLL.PH %s, %s, %s", rt, rs, sa); +} + + +/* + * SHLL.QB rt, rs, sa - Shift Left Logical Vector Quad Bytes + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 0100001111111 + * rt ----- + * rs ----- + * sa --- + */ +std::string NMD::SHLL_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + uint64 sa_value = extract_sa_15_14_13(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string sa = IMMEDIATE(copy(sa_value)); + + return img::format("SHLL.QB %s, %s, %s", rt, rs, sa); +} + + +/* + * SHLL_S.PH rt, rs, sa - Shift Left Logical Vector Pair Halfwords (saturated) + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 001110110101 + * rt ----- + * rs ----- + * sa ---- + */ +std::string NMD::SHLL_S_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + uint64 sa_value = extract_sa_15_14_13_12(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string sa = IMMEDIATE(copy(sa_value)); + + return img::format("SHLL_S.PH %s, %s, %s", rt, rs, sa); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHLL_S_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 sa_value = extract_sa_15_14_13_12_11(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string sa = IMMEDIATE(copy(sa_value)); + + return img::format("SHLL_S.W %s, %s, %s", rt, rs, sa); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHLLV_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SHLLV.PH %s, %s, %s", rd, rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHLLV_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SHLLV.QB %s, %s, %s", rd, rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHLLV_S_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SHLLV_S.PH %s, %s, %s", rd, rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHLLV_S_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SHLLV_S.W %s, %s, %s", rd, rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHRA_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 sa_value = extract_sa_15_14_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string sa = IMMEDIATE(copy(sa_value)); + + return img::format("SHRA.PH %s, %s, %s", rt, rs, sa); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHRA_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 sa_value = extract_sa_15_14_13(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string sa = IMMEDIATE(copy(sa_value)); + + return img::format("SHRA.QB %s, %s, %s", rt, rs, sa); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHRA_R_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 sa_value = extract_sa_15_14_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string sa = IMMEDIATE(copy(sa_value)); + + return img::format("SHRA_R.PH %s, %s, %s", rt, rs, sa); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHRA_R_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 sa_value = extract_sa_15_14_13(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string sa = IMMEDIATE(copy(sa_value)); + + return img::format("SHRA_R.QB %s, %s, %s", rt, rs, sa); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHRA_R_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 sa_value = extract_sa_15_14_13_12_11(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string sa = IMMEDIATE(copy(sa_value)); + + return img::format("SHRA_R.W %s, %s, %s", rt, rs, sa); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHRAV_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SHRAV.PH %s, %s, %s", rd, rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHRAV_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SHRAV.QB %s, %s, %s", rd, rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHRAV_R_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SHRAV_R.PH %s, %s, %s", rd, rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHRAV_R_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SHRAV_R.QB %s, %s, %s", rd, rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHRAV_R_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SHRAV_R.W %s, %s, %s", rd, rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHRL_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 sa_value = extract_sa_15_14_13_12(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string sa = IMMEDIATE(copy(sa_value)); + + return img::format("SHRL.PH %s, %s, %s", rt, rs, sa); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHRL_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 sa_value = extract_sa_15_14_13(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string sa = IMMEDIATE(copy(sa_value)); + + return img::format("SHRL.QB %s, %s, %s", rt, rs, sa); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHRLV_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SHRLV.PH %s, %s, %s", rd, rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHRLV_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SHRLV.QB %s, %s, %s", rd, rt, rs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHX(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SHX %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SHXS(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SHXS %s, %s(%s)", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SIGRIE(uint64 instruction) +{ + uint64 code_value = extract_code_18_to_0(instruction); + + std::string code = IMMEDIATE(copy(code_value)); + + return img::format("SIGRIE %s", code); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SLL_16_(uint64 instruction) +{ + uint64 shift3_value = extract_shift3_2_1_0(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + std::string shift3 = IMMEDIATE(encode_shift3_from_shift(shift3_value)); + + return img::format("SLL %s, %s, %s", rt3, rs3, shift3); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SLL_32_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("SLL %s, %s, %s", rt, rs, shift); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SLLV(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SLLV %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SLT(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SLT %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SLTI(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("SLTI %s, %s, %s", rt, rs, u); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SLTIU(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("SLTIU %s, %s, %s", rt, rs, u); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SLTU(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SLTU %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SOV(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SOV %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SPECIAL2(uint64 instruction) +{ + uint64 op_value = extract_op_25_to_3(instruction); + + std::string op = IMMEDIATE(copy(op_value)); + + return img::format("SPECIAL2 %s", op); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SQRT_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("SQRT.D %s, %s", ft, fs); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SQRT_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("SQRT.S %s, %s", ft, fs); +} + + +/* + * SRA rd, rt, sa - Shift Word Right Arithmetic + * + * 3 2 1 + * 10987654321098765432109876543210 + * 00000000000 000011 + * rt ----- + * rd ----- + * sa ----- + */ +std::string NMD::SRA(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + uint64 shift_value = extract_shift_4_3_2_1_0(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("SRA %s, %s, %s", rt, rs, shift); +} + + +/* + * SRAV rd, rt, rs - Shift Word Right Arithmetic Variable + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00000000111 + * rs ----- + * rt ----- + * rd ----- + */ +std::string NMD::SRAV(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SRAV %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00000000111 + * rs ----- + * rt ----- + * rd ----- + */ +std::string NMD::SRL_16_(uint64 instruction) +{ + uint64 shift3_value = extract_shift3_2_1_0(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rt3 = GPR(encode_gpr3(rt3_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + std::string shift3 = IMMEDIATE(encode_shift3_from_shift(shift3_value)); + + return img::format("SRL %s, %s, %s", rt3, rs3, shift3); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SRL_32_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 shift_value = extract_shift_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string shift = IMMEDIATE(copy(shift_value)); + + return img::format("SRL %s, %s, %s", rt, rs, shift); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SRLV(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SRLV %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SUB %s, %s, %s", rd, rs, rt); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUB_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("SUB.D %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUB_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 fd_value = extract_fd_10_9_8_7_6(instruction); + + std::string fd = FPR(copy(fd_value)); + std::string fs = FPR(copy(fs_value)); + std::string ft = FPR(copy(ft_value)); + + return img::format("SUB.S %s, %s, %s", fd, fs, ft); +} + + +/* + * + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUBQ_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SUBQ.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right + * to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUBQ_S_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SUBQ_S.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right + * to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUBQ_S_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SUBQ_S.W %s, %s, %s", rd, rs, rt); +} + + +/* + * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right + * to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUBQH_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SUBQH.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right + * to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUBQH_R_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SUBQH_R.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * SUBQH_R.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right + * to Halve Results (rounding) + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 11001001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUBQH_R_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SUBQH_R.W %s, %s, %s", rd, rs, rt); +} + + +/* + * SUBQH.W rd, rs, rt - Subtract Fractional Words And Shift Right to Halve + * Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUBQH_W(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SUBQH.W %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUBU_16_(uint64 instruction) +{ + uint64 rd3_value = extract_rd3_3_2_1(instruction); + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rd3 = GPR(encode_gpr3(rd3_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + std::string rt3 = GPR(encode_gpr3(rt3_value)); + + return img::format("SUBU %s, %s, %s", rd3, rs3, rt3); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUBU_32_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SUBU %s, %s, %s", rd, rs, rt); +} + + +/* + * SUBU.PH rd, rs, rt - Subtract Unsigned Integer Halfwords + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01100001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUBU_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SUBU.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * SUBU.QB rd, rs, rt - Subtract Unsigned Quad Byte Vector + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01011001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUBU_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SUBU.QB %s, %s, %s", rd, rs, rt); +} + + +/* + * SUBU_S.PH rd, rs, rt - Subtract Unsigned Integer Halfwords (saturating) + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 11100001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUBU_S_PH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SUBU_S.PH %s, %s, %s", rd, rs, rt); +} + + +/* + * SUBU_S.QB rd, rs, rt - Subtract Unsigned Quad Byte Vector (saturating) + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 11011001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUBU_S_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SUBU_S.QB %s, %s, %s", rd, rs, rt); +} + + +/* + * SUBUH.QB rd, rs, rt - Subtract Unsigned Bytes And Right Shift to Halve + * Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01101001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUBUH_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SUBUH.QB %s, %s, %s", rd, rs, rt); +} + + +/* + * SUBUH_R.QB rd, rs, rt - Subtract Unsigned Bytes And Right Shift to Halve + * Results (rounding) + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 11101001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SUBUH_R_QB(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SUBUH_R.QB %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SW_16_(uint64 instruction) +{ + uint64 rtz3_value = extract_rtz3_9_8_7(instruction); + uint64 u_value = extr_uil0il2bs4Fmsb5(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rtz3 = GPR(encode_gpr3_store(rtz3_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs3 = GPR(encode_gpr3(rs3_value)); + + return img::format("SW %s, %s(%s)", rtz3, u, rs3); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SW_4X4_(uint64 instruction) +{ + uint64 rs4_value = extract_rs4_4_2_1_0(instruction); + uint64 rtz4_value = extract_rtz4_9_7_6_5(instruction); + uint64 u_value = extr_uil3il3bs1_il8il2bs1Fmsb3(instruction); + + std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs4 = GPR(encode_gpr4(rs4_value)); + + return img::format("SW %s, %s(%s)", rtz4, u, rs4); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SW_GP16_(uint64 instruction) +{ + uint64 rtz3_value = extract_rtz3_9_8_7(instruction); + uint64 u_value = extr_uil0il2bs7Fmsb8(instruction); + + std::string rtz3 = GPR(encode_gpr3_store(rtz3_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("SW %s, %s($%d)", rtz3, u, 28); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SW_GP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extr_uil2il2bs19Fmsb20(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("SW %s, %s($%d)", rt, u, 28); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SW_S9_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SW %s, %s(%s)", rt, s, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SW_SP_(uint64 instruction) +{ + uint64 rt_value = extract_rt_9_8_7_6_5(instruction); + uint64 u_value = extr_uil0il2bs5Fmsb6(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("SW %s, %s($%d)", rt, u, 29); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SW_U12_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SW %s, %s(%s)", rt, u, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SWC1_GP_(uint64 instruction) +{ + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 u_value = extr_uil2il2bs16Fmsb17(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("SWC1 %s, %s($%d)", ft, u, 28); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SWC1_S9_(uint64 instruction) +{ + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SWC1 %s, %s(%s)", ft, s, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SWC1_U12_(uint64 instruction) +{ + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string u = IMMEDIATE(copy(u_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SWC1 %s, %s(%s)", ft, u, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SWC1X(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ft_value = extract_ft_15_14_13_12_11(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SWC1X %s, %s(%s)", ft, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SWC1XS(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 ft_value = extract_ft_15_14_13_12_11(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SWC1XS %s, %s(%s)", ft, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SWC2(uint64 instruction) +{ + uint64 cs_value = extract_cs_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string cs = CPR(copy(cs_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SWC2 %s, %s(%s)", cs, s, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SWE(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SWE %s, %s(%s)", rt, s, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SWM(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 count3_value = extract_count3_14_13_12(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value)); + + return img::format("SWM %s, %s(%s), %s", rt, s, rs, count3); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SWPC_48_(uint64 instruction) +{ + uint64 rt_value = extract_rt_41_40_39_38_37(instruction); + int64 s_value = extr_sil0il16bs16_il16il0bs16Tmsb31(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = ADDRESS(encode_s_from_address(s_value), 6); + + return img::format("SWPC %s, %s", rt, s); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SWX(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SWX %s, %s(%s)", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SWXS(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("SWXS %s, %s(%s)", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SYNC(uint64 instruction) +{ + uint64 stype_value = extract_stype_20_19_18_17_16(instruction); + + std::string stype = IMMEDIATE(copy(stype_value)); + + return img::format("SYNC %s", stype); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SYNCI(uint64 instruction) +{ + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SYNCI %s(%s)", s, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SYNCIE(uint64 instruction) +{ + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("SYNCIE %s(%s)", s, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::SYSCALL_16_(uint64 instruction) +{ + uint64 code_value = extract_code_1_0(instruction); + + std::string code = IMMEDIATE(copy(code_value)); + + return img::format("SYSCALL %s", code); +} + + +/* + * SYSCALL code - System Call. Cause a System Call Exception + * + * 3 2 1 + * 10987654321098765432109876543210 + * 00000000000010 + * code ------------------ + */ +std::string NMD::SYSCALL_32_(uint64 instruction) +{ + uint64 code_value = extract_code_17_to_0(instruction); + + std::string code = IMMEDIATE(copy(code_value)); + + return img::format("SYSCALL %s", code); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TEQ(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("TEQ %s, %s", rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TLBGINV(uint64 instruction) +{ + (void)instruction; + + return "TLBGINV "; +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TLBGINVF(uint64 instruction) +{ + (void)instruction; + + return "TLBGINVF "; +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TLBGP(uint64 instruction) +{ + (void)instruction; + + return "TLBGP "; +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TLBGR(uint64 instruction) +{ + (void)instruction; + + return "TLBGR "; +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TLBGWI(uint64 instruction) +{ + (void)instruction; + + return "TLBGWI "; +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TLBGWR(uint64 instruction) +{ + (void)instruction; + + return "TLBGWR "; +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TLBINV(uint64 instruction) +{ + (void)instruction; + + return "TLBINV "; +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TLBINVF(uint64 instruction) +{ + (void)instruction; + + return "TLBINVF "; +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TLBP(uint64 instruction) +{ + (void)instruction; + + return "TLBP "; +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TLBR(uint64 instruction) +{ + (void)instruction; + + return "TLBR "; +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TLBWI(uint64 instruction) +{ + (void)instruction; + + return "TLBWI "; +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TLBWR(uint64 instruction) +{ + (void)instruction; + + return "TLBWR "; +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TNE(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("TNE %s, %s", rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TRUNC_L_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("TRUNC.L.D %s, %s", ft, fs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TRUNC_L_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("TRUNC.L.S %s, %s", ft, fs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TRUNC_W_D(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("TRUNC.W.D %s, %s", ft, fs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::TRUNC_W_S(uint64 instruction) +{ + uint64 fs_value = extract_fs_15_14_13_12_11(instruction); + uint64 ft_value = extract_ft_20_19_18_17_16(instruction); + + std::string ft = FPR(copy(ft_value)); + std::string fs = FPR(copy(fs_value)); + + return img::format("TRUNC.W.S %s, %s", ft, fs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::UALDM(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 count3_value = extract_count3_14_13_12(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value)); + + return img::format("UALDM %s, %s(%s), %s", rt, s, rs, count3); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::UALH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("UALH %s, %s(%s)", rt, s, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::UALWM(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 count3_value = extract_count3_14_13_12(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value)); + + return img::format("UALWM %s, %s(%s), %s", rt, s, rs, count3); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::UASDM(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 count3_value = extract_count3_14_13_12(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value)); + + return img::format("UASDM %s, %s(%s), %s", rt, s, rs, count3); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::UASH(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("UASH %s, %s(%s)", rt, s, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::UASWM(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 count3_value = extract_count3_14_13_12(instruction); + int64 s_value = extr_sil0il0bs8_il15il8bs1Tmsb8(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string s = IMMEDIATE(copy(s_value)); + std::string rs = GPR(copy(rs_value)); + std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value)); + + return img::format("UASWM %s, %s(%s), %s", rt, s, rs, count3); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::UDI(uint64 instruction) +{ + uint64 op_value = extract_op_25_to_3(instruction); + + std::string op = IMMEDIATE(copy(op_value)); + + return img::format("UDI %s", op); +} + + +/* + * WAIT code - Enter Wait State + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 1100001101111111 + * code ---------- + */ +std::string NMD::WAIT(uint64 instruction) +{ + uint64 code_value = extract_code_25_24_23_22_21_20_19_18_17_16(instruction); + + std::string code = IMMEDIATE(copy(code_value)); + + return img::format("WAIT %s", code); +} + + +/* + * WRDSP rt, mask - Write Fields to DSPControl Register from a GPR + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 01011001111111 + * rt ----- + * mask ------- + */ +std::string NMD::WRDSP(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 mask_value = extract_mask_20_19_18_17_16_15_14(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string mask = IMMEDIATE(copy(mask_value)); + + return img::format("WRDSP %s, %s", rt, mask); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::WRPGPR(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("WRPGPR %s, %s", rt, rs); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::XOR_16_(uint64 instruction) +{ + uint64 rt3_value = extract_rt3_9_8_7(instruction); + uint64 rs3_value = extract_rs3_6_5_4(instruction); + + std::string rs3 = GPR(encode_gpr3(rs3_value)); + std::string rt3 = GPR(encode_gpr3(rt3_value)); + + return img::format("XOR %s, %s", rs3, rt3); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::XOR_32_(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rd_value = extract_rd_20_19_18_17_16(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rd = GPR(copy(rd_value)); + std::string rs = GPR(copy(rs_value)); + std::string rt = GPR(copy(rt_value)); + + return img::format("XOR %s, %s, %s", rd, rs, rt); +} + + +/* + * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + * rd ----- + */ +std::string NMD::XORI(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + std::string u = IMMEDIATE(copy(u_value)); + + return img::format("XORI %s, %s, %s", rt, rs, u); +} + + +/* + * YIELD rt, rs - + * + * 3 2 1 + * 10987654321098765432109876543210 + * 001000 00010001101 + * rt ----- + * rs ----- + */ +std::string NMD::YIELD(uint64 instruction) +{ + uint64 rt_value = extract_rt_25_24_23_22_21(instruction); + uint64 rs_value = extract_rs_20_19_18_17_16(instruction); + + std::string rt = GPR(copy(rt_value)); + std::string rs = GPR(copy(rs_value)); + + return img::format("YIELD %s, %s", rt, rs); +} + + + +NMD::Pool NMD::P_SYSCALL[2] = { + { instruction , 0 , 0 , 32, + 0xfffc0000, 0x00080000, &NMD::SYSCALL_32_ , 0, + 0x0 }, /* SYSCALL[32] */ + { instruction , 0 , 0 , 32, + 0xfffc0000, 0x000c0000, &NMD::HYPCALL , 0, + CP0_ | VZ_ }, /* HYPCALL */ +}; + + +NMD::Pool NMD::P_RI[4] = { + { instruction , 0 , 0 , 32, + 0xfff80000, 0x00000000, &NMD::SIGRIE , 0, + 0x0 }, /* SIGRIE */ + { pool , P_SYSCALL , 2 , 32, + 0xfff80000, 0x00080000, 0 , 0, + 0x0 }, /* P.SYSCALL */ + { instruction , 0 , 0 , 32, + 0xfff80000, 0x00100000, &NMD::BREAK_32_ , 0, + 0x0 }, /* BREAK[32] */ + { instruction , 0 , 0 , 32, + 0xfff80000, 0x00180000, &NMD::SDBBP_32_ , 0, + EJTAG_ }, /* SDBBP[32] */ +}; + + +NMD::Pool NMD::P_ADDIU[2] = { + { pool , P_RI , 4 , 32, + 0xffe00000, 0x00000000, 0 , 0, + 0x0 }, /* P.RI */ + { instruction , 0 , 0 , 32, + 0xfc000000, 0x00000000, &NMD::ADDIU_32_ , &NMD::ADDIU_32__cond , + 0x0 }, /* ADDIU[32] */ +}; + + +NMD::Pool NMD::P_TRAP[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000000, &NMD::TEQ , 0, + XMMS_ }, /* TEQ */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000400, &NMD::TNE , 0, + XMMS_ }, /* TNE */ +}; + + +NMD::Pool NMD::P_CMOVE[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000210, &NMD::MOVZ , 0, + 0x0 }, /* MOVZ */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000610, &NMD::MOVN , 0, + 0x0 }, /* MOVN */ +}; + + +NMD::Pool NMD::P_D_MT_VPE[2] = { + { instruction , 0 , 0 , 32, + 0xfc1f3fff, 0x20010ab0, &NMD::DMT , 0, + MT_ }, /* DMT */ + { instruction , 0 , 0 , 32, + 0xfc1f3fff, 0x20000ab0, &NMD::DVPE , 0, + MT_ }, /* DVPE */ +}; + + +NMD::Pool NMD::P_E_MT_VPE[2] = { + { instruction , 0 , 0 , 32, + 0xfc1f3fff, 0x20010eb0, &NMD::EMT , 0, + MT_ }, /* EMT */ + { instruction , 0 , 0 , 32, + 0xfc1f3fff, 0x20000eb0, &NMD::EVPE , 0, + MT_ }, /* EVPE */ +}; + + +NMD::Pool NMD::_P_MT_VPE[2] = { + { pool , P_D_MT_VPE , 2 , 32, + 0xfc003fff, 0x20000ab0, 0 , 0, + 0x0 }, /* P.D_MT_VPE */ + { pool , P_E_MT_VPE , 2 , 32, + 0xfc003fff, 0x20000eb0, 0 , 0, + 0x0 }, /* P.E_MT_VPE */ +}; + + +NMD::Pool NMD::P_MT_VPE[8] = { + { reserved_block , 0 , 0 , 32, + 0xfc003bff, 0x200002b0, 0 , 0, + 0x0 }, /* P.MT_VPE~*(0) */ + { pool , _P_MT_VPE , 2 , 32, + 0xfc003bff, 0x20000ab0, 0 , 0, + 0x0 }, /* _P.MT_VPE */ + { reserved_block , 0 , 0 , 32, + 0xfc003bff, 0x200012b0, 0 , 0, + 0x0 }, /* P.MT_VPE~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc003bff, 0x20001ab0, 0 , 0, + 0x0 }, /* P.MT_VPE~*(3) */ + { reserved_block , 0 , 0 , 32, + 0xfc003bff, 0x200022b0, 0 , 0, + 0x0 }, /* P.MT_VPE~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc003bff, 0x20002ab0, 0 , 0, + 0x0 }, /* P.MT_VPE~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc003bff, 0x200032b0, 0 , 0, + 0x0 }, /* P.MT_VPE~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc003bff, 0x20003ab0, 0 , 0, + 0x0 }, /* P.MT_VPE~*(7) */ +}; + + +NMD::Pool NMD::P_DVP[2] = { + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x20000390, &NMD::DVP , 0, + 0x0 }, /* DVP */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x20000790, &NMD::EVP , 0, + 0x0 }, /* EVP */ +}; + + +NMD::Pool NMD::P_SLTU[2] = { + { pool , P_DVP , 2 , 32, + 0xfc00fbff, 0x20000390, 0 , 0, + 0x0 }, /* P.DVP */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000390, &NMD::SLTU , &NMD::SLTU_cond , + 0x0 }, /* SLTU */ +}; + + +NMD::Pool NMD::_POOL32A0[128] = { + { pool , P_TRAP , 2 , 32, + 0xfc0003ff, 0x20000000, 0 , 0, + 0x0 }, /* P.TRAP */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000008, &NMD::SEB , 0, + XMMS_ }, /* SEB */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000010, &NMD::SLLV , 0, + 0x0 }, /* SLLV */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000018, &NMD::MUL_32_ , 0, + 0x0 }, /* MUL[32] */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000020, 0 , 0, + 0x0 }, /* _POOL32A0~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000028, 0 , 0, + 0x0 }, /* _POOL32A0~*(5) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000030, &NMD::MFC0 , 0, + 0x0 }, /* MFC0 */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000038, &NMD::MFHC0 , 0, + CP0_ | MVH_ }, /* MFHC0 */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000040, 0 , 0, + 0x0 }, /* _POOL32A0~*(8) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000048, &NMD::SEH , 0, + 0x0 }, /* SEH */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000050, &NMD::SRLV , 0, + 0x0 }, /* SRLV */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000058, &NMD::MUH , 0, + 0x0 }, /* MUH */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000060, 0 , 0, + 0x0 }, /* _POOL32A0~*(12) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000068, 0 , 0, + 0x0 }, /* _POOL32A0~*(13) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000070, &NMD::MTC0 , 0, + CP0_ }, /* MTC0 */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000078, &NMD::MTHC0 , 0, + CP0_ | MVH_ }, /* MTHC0 */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000080, 0 , 0, + 0x0 }, /* _POOL32A0~*(16) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000088, 0 , 0, + 0x0 }, /* _POOL32A0~*(17) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000090, &NMD::SRAV , 0, + 0x0 }, /* SRAV */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000098, &NMD::MULU , 0, + 0x0 }, /* MULU */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200000a0, 0 , 0, + 0x0 }, /* _POOL32A0~*(20) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200000a8, 0 , 0, + 0x0 }, /* _POOL32A0~*(21) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200000b0, &NMD::MFGC0 , 0, + CP0_ | VZ_ }, /* MFGC0 */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200000b8, &NMD::MFHGC0 , 0, + CP0_ | VZ_ | MVH_ }, /* MFHGC0 */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200000c0, 0 , 0, + 0x0 }, /* _POOL32A0~*(24) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200000c8, 0 , 0, + 0x0 }, /* _POOL32A0~*(25) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200000d0, &NMD::ROTRV , 0, + 0x0 }, /* ROTRV */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200000d8, &NMD::MUHU , 0, + 0x0 }, /* MUHU */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200000e0, 0 , 0, + 0x0 }, /* _POOL32A0~*(28) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200000e8, 0 , 0, + 0x0 }, /* _POOL32A0~*(29) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200000f0, &NMD::MTGC0 , 0, + CP0_ | VZ_ }, /* MTGC0 */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200000f8, &NMD::MTHGC0 , 0, + CP0_ | VZ_ | MVH_ }, /* MTHGC0 */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000100, 0 , 0, + 0x0 }, /* _POOL32A0~*(32) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000108, 0 , 0, + 0x0 }, /* _POOL32A0~*(33) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000110, &NMD::ADD , 0, + XMMS_ }, /* ADD */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000118, &NMD::DIV , 0, + 0x0 }, /* DIV */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000120, 0 , 0, + 0x0 }, /* _POOL32A0~*(36) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000128, 0 , 0, + 0x0 }, /* _POOL32A0~*(37) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000130, &NMD::DMFC0 , 0, + CP0_ | MIPS64_ }, /* DMFC0 */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000138, 0 , 0, + 0x0 }, /* _POOL32A0~*(39) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000140, 0 , 0, + 0x0 }, /* _POOL32A0~*(40) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000148, 0 , 0, + 0x0 }, /* _POOL32A0~*(41) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000150, &NMD::ADDU_32_ , 0, + 0x0 }, /* ADDU[32] */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000158, &NMD::MOD , 0, + 0x0 }, /* MOD */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000160, 0 , 0, + 0x0 }, /* _POOL32A0~*(44) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000168, 0 , 0, + 0x0 }, /* _POOL32A0~*(45) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000170, &NMD::DMTC0 , 0, + CP0_ | MIPS64_ }, /* DMTC0 */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000178, 0 , 0, + 0x0 }, /* _POOL32A0~*(47) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000180, 0 , 0, + 0x0 }, /* _POOL32A0~*(48) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000188, 0 , 0, + 0x0 }, /* _POOL32A0~*(49) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000190, &NMD::SUB , 0, + XMMS_ }, /* SUB */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000198, &NMD::DIVU , 0, + 0x0 }, /* DIVU */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200001a0, 0 , 0, + 0x0 }, /* _POOL32A0~*(52) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200001a8, 0 , 0, + 0x0 }, /* _POOL32A0~*(53) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200001b0, &NMD::DMFGC0 , 0, + CP0_ | MIPS64_ | VZ_}, /* DMFGC0 */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200001b8, 0 , 0, + 0x0 }, /* _POOL32A0~*(55) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200001c0, &NMD::RDHWR , 0, + XMMS_ }, /* RDHWR */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200001c8, 0 , 0, + 0x0 }, /* _POOL32A0~*(57) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200001d0, &NMD::SUBU_32_ , 0, + 0x0 }, /* SUBU[32] */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200001d8, &NMD::MODU , 0, + 0x0 }, /* MODU */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200001e0, 0 , 0, + 0x0 }, /* _POOL32A0~*(60) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200001e8, 0 , 0, + 0x0 }, /* _POOL32A0~*(61) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200001f0, &NMD::DMTGC0 , 0, + CP0_ | MIPS64_ | VZ_}, /* DMTGC0 */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200001f8, 0 , 0, + 0x0 }, /* _POOL32A0~*(63) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000200, 0 , 0, + 0x0 }, /* _POOL32A0~*(64) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000208, 0 , 0, + 0x0 }, /* _POOL32A0~*(65) */ + { pool , P_CMOVE , 2 , 32, + 0xfc0003ff, 0x20000210, 0 , 0, + 0x0 }, /* P.CMOVE */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000218, 0 , 0, + 0x0 }, /* _POOL32A0~*(67) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000220, 0 , 0, + 0x0 }, /* _POOL32A0~*(68) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000228, &NMD::FORK , 0, + MT_ }, /* FORK */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000230, &NMD::MFTR , 0, + MT_ }, /* MFTR */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000238, &NMD::MFHTR , 0, + MT_ }, /* MFHTR */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000240, 0 , 0, + 0x0 }, /* _POOL32A0~*(72) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000248, 0 , 0, + 0x0 }, /* _POOL32A0~*(73) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000250, &NMD::AND_32_ , 0, + 0x0 }, /* AND[32] */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000258, 0 , 0, + 0x0 }, /* _POOL32A0~*(75) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000260, 0 , 0, + 0x0 }, /* _POOL32A0~*(76) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000268, &NMD::YIELD , 0, + MT_ }, /* YIELD */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000270, &NMD::MTTR , 0, + MT_ }, /* MTTR */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000278, &NMD::MTHTR , 0, + MT_ }, /* MTHTR */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000280, 0 , 0, + 0x0 }, /* _POOL32A0~*(80) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000288, 0 , 0, + 0x0 }, /* _POOL32A0~*(81) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000290, &NMD::OR_32_ , 0, + 0x0 }, /* OR[32] */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000298, 0 , 0, + 0x0 }, /* _POOL32A0~*(83) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002a0, 0 , 0, + 0x0 }, /* _POOL32A0~*(84) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002a8, 0 , 0, + 0x0 }, /* _POOL32A0~*(85) */ + { pool , P_MT_VPE , 8 , 32, + 0xfc0003ff, 0x200002b0, 0 , 0, + 0x0 }, /* P.MT_VPE */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002b8, 0 , 0, + 0x0 }, /* _POOL32A0~*(87) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002c0, 0 , 0, + 0x0 }, /* _POOL32A0~*(88) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002c8, 0 , 0, + 0x0 }, /* _POOL32A0~*(89) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200002d0, &NMD::NOR , 0, + 0x0 }, /* NOR */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002d8, 0 , 0, + 0x0 }, /* _POOL32A0~*(91) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002e0, 0 , 0, + 0x0 }, /* _POOL32A0~*(92) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002e8, 0 , 0, + 0x0 }, /* _POOL32A0~*(93) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002f0, 0 , 0, + 0x0 }, /* _POOL32A0~*(94) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002f8, 0 , 0, + 0x0 }, /* _POOL32A0~*(95) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000300, 0 , 0, + 0x0 }, /* _POOL32A0~*(96) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000308, 0 , 0, + 0x0 }, /* _POOL32A0~*(97) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000310, &NMD::XOR_32_ , 0, + 0x0 }, /* XOR[32] */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000318, 0 , 0, + 0x0 }, /* _POOL32A0~*(99) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000320, 0 , 0, + 0x0 }, /* _POOL32A0~*(100) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000328, 0 , 0, + 0x0 }, /* _POOL32A0~*(101) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000330, 0 , 0, + 0x0 }, /* _POOL32A0~*(102) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000338, 0 , 0, + 0x0 }, /* _POOL32A0~*(103) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000340, 0 , 0, + 0x0 }, /* _POOL32A0~*(104) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000348, 0 , 0, + 0x0 }, /* _POOL32A0~*(105) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000350, &NMD::SLT , 0, + 0x0 }, /* SLT */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000358, 0 , 0, + 0x0 }, /* _POOL32A0~*(107) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000360, 0 , 0, + 0x0 }, /* _POOL32A0~*(108) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000368, 0 , 0, + 0x0 }, /* _POOL32A0~*(109) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000370, 0 , 0, + 0x0 }, /* _POOL32A0~*(110) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000378, 0 , 0, + 0x0 }, /* _POOL32A0~*(111) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000380, 0 , 0, + 0x0 }, /* _POOL32A0~*(112) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000388, 0 , 0, + 0x0 }, /* _POOL32A0~*(113) */ + { pool , P_SLTU , 2 , 32, + 0xfc0003ff, 0x20000390, 0 , 0, + 0x0 }, /* P.SLTU */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000398, 0 , 0, + 0x0 }, /* _POOL32A0~*(115) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003a0, 0 , 0, + 0x0 }, /* _POOL32A0~*(116) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003a8, 0 , 0, + 0x0 }, /* _POOL32A0~*(117) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003b0, 0 , 0, + 0x0 }, /* _POOL32A0~*(118) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003b8, 0 , 0, + 0x0 }, /* _POOL32A0~*(119) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003c0, 0 , 0, + 0x0 }, /* _POOL32A0~*(120) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003c8, 0 , 0, + 0x0 }, /* _POOL32A0~*(121) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200003d0, &NMD::SOV , 0, + 0x0 }, /* SOV */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003d8, 0 , 0, + 0x0 }, /* _POOL32A0~*(123) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003e0, 0 , 0, + 0x0 }, /* _POOL32A0~*(124) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003e8, 0 , 0, + 0x0 }, /* _POOL32A0~*(125) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003f0, 0 , 0, + 0x0 }, /* _POOL32A0~*(126) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003f8, 0 , 0, + 0x0 }, /* _POOL32A0~*(127) */ +}; + + +NMD::Pool NMD::ADDQ__S__PH[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000000d, &NMD::ADDQ_PH , 0, + DSP_ }, /* ADDQ.PH */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000040d, &NMD::ADDQ_S_PH , 0, + DSP_ }, /* ADDQ_S.PH */ +}; + + +NMD::Pool NMD::MUL__S__PH[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000002d, &NMD::MUL_PH , 0, + DSP_ }, /* MUL.PH */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000042d, &NMD::MUL_S_PH , 0, + DSP_ }, /* MUL_S.PH */ +}; + + +NMD::Pool NMD::ADDQH__R__PH[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000004d, &NMD::ADDQH_PH , 0, + DSP_ }, /* ADDQH.PH */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000044d, &NMD::ADDQH_R_PH , 0, + DSP_ }, /* ADDQH_R.PH */ +}; + + +NMD::Pool NMD::ADDQH__R__W[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000008d, &NMD::ADDQH_W , 0, + DSP_ }, /* ADDQH.W */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000048d, &NMD::ADDQH_R_W , 0, + DSP_ }, /* ADDQH_R.W */ +}; + + +NMD::Pool NMD::ADDU__S__QB[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x200000cd, &NMD::ADDU_QB , 0, + DSP_ }, /* ADDU.QB */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x200004cd, &NMD::ADDU_S_QB , 0, + DSP_ }, /* ADDU_S.QB */ +}; + + +NMD::Pool NMD::ADDU__S__PH[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000010d, &NMD::ADDU_PH , 0, + DSP_ }, /* ADDU.PH */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000050d, &NMD::ADDU_S_PH , 0, + DSP_ }, /* ADDU_S.PH */ +}; + + +NMD::Pool NMD::ADDUH__R__QB[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000014d, &NMD::ADDUH_QB , 0, + DSP_ }, /* ADDUH.QB */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000054d, &NMD::ADDUH_R_QB , 0, + DSP_ }, /* ADDUH_R.QB */ +}; + + +NMD::Pool NMD::SHRAV__R__PH[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000018d, &NMD::SHRAV_PH , 0, + DSP_ }, /* SHRAV.PH */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000058d, &NMD::SHRAV_R_PH , 0, + DSP_ }, /* SHRAV_R.PH */ +}; + + +NMD::Pool NMD::SHRAV__R__QB[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x200001cd, &NMD::SHRAV_QB , 0, + DSP_ }, /* SHRAV.QB */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x200005cd, &NMD::SHRAV_R_QB , 0, + DSP_ }, /* SHRAV_R.QB */ +}; + + +NMD::Pool NMD::SUBQ__S__PH[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000020d, &NMD::SUBQ_PH , 0, + DSP_ }, /* SUBQ.PH */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000060d, &NMD::SUBQ_S_PH , 0, + DSP_ }, /* SUBQ_S.PH */ +}; + + +NMD::Pool NMD::SUBQH__R__PH[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000024d, &NMD::SUBQH_PH , 0, + DSP_ }, /* SUBQH.PH */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000064d, &NMD::SUBQH_R_PH , 0, + DSP_ }, /* SUBQH_R.PH */ +}; + + +NMD::Pool NMD::SUBQH__R__W[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000028d, &NMD::SUBQH_W , 0, + DSP_ }, /* SUBQH.W */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000068d, &NMD::SUBQH_R_W , 0, + DSP_ }, /* SUBQH_R.W */ +}; + + +NMD::Pool NMD::SUBU__S__QB[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x200002cd, &NMD::SUBU_QB , 0, + DSP_ }, /* SUBU.QB */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x200006cd, &NMD::SUBU_S_QB , 0, + DSP_ }, /* SUBU_S.QB */ +}; + + +NMD::Pool NMD::SUBU__S__PH[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000030d, &NMD::SUBU_PH , 0, + DSP_ }, /* SUBU.PH */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000070d, &NMD::SUBU_S_PH , 0, + DSP_ }, /* SUBU_S.PH */ +}; + + +NMD::Pool NMD::SHRA__R__PH[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000335, &NMD::SHRA_PH , 0, + DSP_ }, /* SHRA.PH */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000735, &NMD::SHRA_R_PH , 0, + DSP_ }, /* SHRA_R.PH */ +}; + + +NMD::Pool NMD::SUBUH__R__QB[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000034d, &NMD::SUBUH_QB , 0, + DSP_ }, /* SUBUH.QB */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000074d, &NMD::SUBUH_R_QB , 0, + DSP_ }, /* SUBUH_R.QB */ +}; + + +NMD::Pool NMD::SHLLV__S__PH[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000038d, &NMD::SHLLV_PH , 0, + DSP_ }, /* SHLLV.PH */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x2000078d, &NMD::SHLLV_S_PH , 0, + DSP_ }, /* SHLLV_S.PH */ +}; + + +NMD::Pool NMD::SHLL__S__PH[4] = { + { instruction , 0 , 0 , 32, + 0xfc000fff, 0x200003b5, &NMD::SHLL_PH , 0, + DSP_ }, /* SHLL.PH */ + { reserved_block , 0 , 0 , 32, + 0xfc000fff, 0x200007b5, 0 , 0, + 0x0 }, /* SHLL[_S].PH~*(1) */ + { instruction , 0 , 0 , 32, + 0xfc000fff, 0x20000bb5, &NMD::SHLL_S_PH , 0, + DSP_ }, /* SHLL_S.PH */ + { reserved_block , 0 , 0 , 32, + 0xfc000fff, 0x20000fb5, 0 , 0, + 0x0 }, /* SHLL[_S].PH~*(3) */ +}; + + +NMD::Pool NMD::PRECR_SRA__R__PH_W[2] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x200003cd, &NMD::PRECR_SRA_PH_W , 0, + DSP_ }, /* PRECR_SRA.PH.W */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x200007cd, &NMD::PRECR_SRA_R_PH_W , 0, + DSP_ }, /* PRECR_SRA_R.PH.W */ +}; + + +NMD::Pool NMD::_POOL32A5[128] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000005, &NMD::CMP_EQ_PH , 0, + DSP_ }, /* CMP.EQ.PH */ + { pool , ADDQ__S__PH , 2 , 32, + 0xfc0003ff, 0x2000000d, 0 , 0, + 0x0 }, /* ADDQ[_S].PH */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000015, 0 , 0, + 0x0 }, /* _POOL32A5~*(2) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x2000001d, &NMD::SHILO , 0, + DSP_ }, /* SHILO */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000025, &NMD::MULEQ_S_W_PHL , 0, + DSP_ }, /* MULEQ_S.W.PHL */ + { pool , MUL__S__PH , 2 , 32, + 0xfc0003ff, 0x2000002d, 0 , 0, + 0x0 }, /* MUL[_S].PH */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000035, 0 , 0, + 0x0 }, /* _POOL32A5~*(6) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x2000003d, &NMD::REPL_PH , 0, + DSP_ }, /* REPL.PH */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000045, &NMD::CMP_LT_PH , 0, + DSP_ }, /* CMP.LT.PH */ + { pool , ADDQH__R__PH , 2 , 32, + 0xfc0003ff, 0x2000004d, 0 , 0, + 0x0 }, /* ADDQH[_R].PH */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000055, 0 , 0, + 0x0 }, /* _POOL32A5~*(10) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000005d, 0 , 0, + 0x0 }, /* _POOL32A5~*(11) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000065, &NMD::MULEQ_S_W_PHR , 0, + DSP_ }, /* MULEQ_S.W.PHR */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x2000006d, &NMD::PRECR_QB_PH , 0, + DSP_ }, /* PRECR.QB.PH */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000075, 0 , 0, + 0x0 }, /* _POOL32A5~*(14) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000007d, 0 , 0, + 0x0 }, /* _POOL32A5~*(15) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000085, &NMD::CMP_LE_PH , 0, + DSP_ }, /* CMP.LE.PH */ + { pool , ADDQH__R__W , 2 , 32, + 0xfc0003ff, 0x2000008d, 0 , 0, + 0x0 }, /* ADDQH[_R].W */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000095, &NMD::MULEU_S_PH_QBL , 0, + DSP_ }, /* MULEU_S.PH.QBL */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000009d, 0 , 0, + 0x0 }, /* _POOL32A5~*(19) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200000a5, 0 , 0, + 0x0 }, /* _POOL32A5~*(20) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200000ad, &NMD::PRECRQ_QB_PH , 0, + DSP_ }, /* PRECRQ.QB.PH */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200000b5, 0 , 0, + 0x0 }, /* _POOL32A5~*(22) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200000bd, 0 , 0, + 0x0 }, /* _POOL32A5~*(23) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200000c5, &NMD::CMPGU_EQ_QB , 0, + DSP_ }, /* CMPGU.EQ.QB */ + { pool , ADDU__S__QB , 2 , 32, + 0xfc0003ff, 0x200000cd, 0 , 0, + 0x0 }, /* ADDU[_S].QB */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200000d5, &NMD::MULEU_S_PH_QBR , 0, + DSP_ }, /* MULEU_S.PH.QBR */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200000dd, 0 , 0, + 0x0 }, /* _POOL32A5~*(27) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200000e5, 0 , 0, + 0x0 }, /* _POOL32A5~*(28) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200000ed, &NMD::PRECRQ_PH_W , 0, + DSP_ }, /* PRECRQ.PH.W */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200000f5, 0 , 0, + 0x0 }, /* _POOL32A5~*(30) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200000fd, 0 , 0, + 0x0 }, /* _POOL32A5~*(31) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000105, &NMD::CMPGU_LT_QB , 0, + DSP_ }, /* CMPGU.LT.QB */ + { pool , ADDU__S__PH , 2 , 32, + 0xfc0003ff, 0x2000010d, 0 , 0, + 0x0 }, /* ADDU[_S].PH */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000115, &NMD::MULQ_RS_PH , 0, + DSP_ }, /* MULQ_RS.PH */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000011d, 0 , 0, + 0x0 }, /* _POOL32A5~*(35) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000125, 0 , 0, + 0x0 }, /* _POOL32A5~*(36) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x2000012d, &NMD::PRECRQ_RS_PH_W , 0, + DSP_ }, /* PRECRQ_RS.PH.W */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000135, 0 , 0, + 0x0 }, /* _POOL32A5~*(38) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000013d, 0 , 0, + 0x0 }, /* _POOL32A5~*(39) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000145, &NMD::CMPGU_LE_QB , 0, + DSP_ }, /* CMPGU.LE.QB */ + { pool , ADDUH__R__QB , 2 , 32, + 0xfc0003ff, 0x2000014d, 0 , 0, + 0x0 }, /* ADDUH[_R].QB */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000155, &NMD::MULQ_S_PH , 0, + DSP_ }, /* MULQ_S.PH */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000015d, 0 , 0, + 0x0 }, /* _POOL32A5~*(43) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000165, 0 , 0, + 0x0 }, /* _POOL32A5~*(44) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x2000016d, &NMD::PRECRQU_S_QB_PH , 0, + DSP_ }, /* PRECRQU_S.QB.PH */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000175, 0 , 0, + 0x0 }, /* _POOL32A5~*(46) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000017d, 0 , 0, + 0x0 }, /* _POOL32A5~*(47) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000185, &NMD::CMPGDU_EQ_QB , 0, + DSP_ }, /* CMPGDU.EQ.QB */ + { pool , SHRAV__R__PH , 2 , 32, + 0xfc0003ff, 0x2000018d, 0 , 0, + 0x0 }, /* SHRAV[_R].PH */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000195, &NMD::MULQ_RS_W , 0, + DSP_ }, /* MULQ_RS.W */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000019d, 0 , 0, + 0x0 }, /* _POOL32A5~*(51) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200001a5, 0 , 0, + 0x0 }, /* _POOL32A5~*(52) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200001ad, &NMD::PACKRL_PH , 0, + DSP_ }, /* PACKRL.PH */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200001b5, 0 , 0, + 0x0 }, /* _POOL32A5~*(54) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200001bd, 0 , 0, + 0x0 }, /* _POOL32A5~*(55) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200001c5, &NMD::CMPGDU_LT_QB , 0, + DSP_ }, /* CMPGDU.LT.QB */ + { pool , SHRAV__R__QB , 2 , 32, + 0xfc0003ff, 0x200001cd, 0 , 0, + 0x0 }, /* SHRAV[_R].QB */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200001d5, &NMD::MULQ_S_W , 0, + DSP_ }, /* MULQ_S.W */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200001dd, 0 , 0, + 0x0 }, /* _POOL32A5~*(59) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200001e5, 0 , 0, + 0x0 }, /* _POOL32A5~*(60) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200001ed, &NMD::PICK_QB , 0, + DSP_ }, /* PICK.QB */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200001f5, 0 , 0, + 0x0 }, /* _POOL32A5~*(62) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200001fd, 0 , 0, + 0x0 }, /* _POOL32A5~*(63) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000205, &NMD::CMPGDU_LE_QB , 0, + DSP_ }, /* CMPGDU.LE.QB */ + { pool , SUBQ__S__PH , 2 , 32, + 0xfc0003ff, 0x2000020d, 0 , 0, + 0x0 }, /* SUBQ[_S].PH */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000215, &NMD::APPEND , 0, + DSP_ }, /* APPEND */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000021d, 0 , 0, + 0x0 }, /* _POOL32A5~*(67) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000225, 0 , 0, + 0x0 }, /* _POOL32A5~*(68) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x2000022d, &NMD::PICK_PH , 0, + DSP_ }, /* PICK.PH */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000235, 0 , 0, + 0x0 }, /* _POOL32A5~*(70) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000023d, 0 , 0, + 0x0 }, /* _POOL32A5~*(71) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000245, &NMD::CMPU_EQ_QB , 0, + DSP_ }, /* CMPU.EQ.QB */ + { pool , SUBQH__R__PH , 2 , 32, + 0xfc0003ff, 0x2000024d, 0 , 0, + 0x0 }, /* SUBQH[_R].PH */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000255, &NMD::PREPEND , 0, + DSP_ }, /* PREPEND */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000025d, 0 , 0, + 0x0 }, /* _POOL32A5~*(75) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000265, 0 , 0, + 0x0 }, /* _POOL32A5~*(76) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000026d, 0 , 0, + 0x0 }, /* _POOL32A5~*(77) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000275, 0 , 0, + 0x0 }, /* _POOL32A5~*(78) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000027d, 0 , 0, + 0x0 }, /* _POOL32A5~*(79) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000285, &NMD::CMPU_LT_QB , 0, + DSP_ }, /* CMPU.LT.QB */ + { pool , SUBQH__R__W , 2 , 32, + 0xfc0003ff, 0x2000028d, 0 , 0, + 0x0 }, /* SUBQH[_R].W */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000295, &NMD::MODSUB , 0, + DSP_ }, /* MODSUB */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000029d, 0 , 0, + 0x0 }, /* _POOL32A5~*(83) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002a5, 0 , 0, + 0x0 }, /* _POOL32A5~*(84) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002ad, 0 , 0, + 0x0 }, /* _POOL32A5~*(85) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002b5, 0 , 0, + 0x0 }, /* _POOL32A5~*(86) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002bd, 0 , 0, + 0x0 }, /* _POOL32A5~*(87) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200002c5, &NMD::CMPU_LE_QB , 0, + DSP_ }, /* CMPU.LE.QB */ + { pool , SUBU__S__QB , 2 , 32, + 0xfc0003ff, 0x200002cd, 0 , 0, + 0x0 }, /* SUBU[_S].QB */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200002d5, &NMD::SHRAV_R_W , 0, + DSP_ }, /* SHRAV_R.W */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002dd, 0 , 0, + 0x0 }, /* _POOL32A5~*(91) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002e5, 0 , 0, + 0x0 }, /* _POOL32A5~*(92) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002ed, 0 , 0, + 0x0 }, /* _POOL32A5~*(93) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200002f5, &NMD::SHRA_R_W , 0, + DSP_ }, /* SHRA_R.W */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200002fd, 0 , 0, + 0x0 }, /* _POOL32A5~*(95) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000305, &NMD::ADDQ_S_W , 0, + DSP_ }, /* ADDQ_S.W */ + { pool , SUBU__S__PH , 2 , 32, + 0xfc0003ff, 0x2000030d, 0 , 0, + 0x0 }, /* SUBU[_S].PH */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000315, &NMD::SHRLV_PH , 0, + DSP_ }, /* SHRLV.PH */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000031d, 0 , 0, + 0x0 }, /* _POOL32A5~*(99) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000325, 0 , 0, + 0x0 }, /* _POOL32A5~*(100) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000032d, 0 , 0, + 0x0 }, /* _POOL32A5~*(101) */ + { pool , SHRA__R__PH , 2 , 32, + 0xfc0003ff, 0x20000335, 0 , 0, + 0x0 }, /* SHRA[_R].PH */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000033d, 0 , 0, + 0x0 }, /* _POOL32A5~*(103) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000345, &NMD::SUBQ_S_W , 0, + DSP_ }, /* SUBQ_S.W */ + { pool , SUBUH__R__QB , 2 , 32, + 0xfc0003ff, 0x2000034d, 0 , 0, + 0x0 }, /* SUBUH[_R].QB */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000355, &NMD::SHRLV_QB , 0, + DSP_ }, /* SHRLV.QB */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000035d, 0 , 0, + 0x0 }, /* _POOL32A5~*(107) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000365, 0 , 0, + 0x0 }, /* _POOL32A5~*(108) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000036d, 0 , 0, + 0x0 }, /* _POOL32A5~*(109) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x20000375, 0 , 0, + 0x0 }, /* _POOL32A5~*(110) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000037d, 0 , 0, + 0x0 }, /* _POOL32A5~*(111) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000385, &NMD::ADDSC , 0, + DSP_ }, /* ADDSC */ + { pool , SHLLV__S__PH , 2 , 32, + 0xfc0003ff, 0x2000038d, 0 , 0, + 0x0 }, /* SHLLV[_S].PH */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x20000395, &NMD::SHLLV_QB , 0, + DSP_ }, /* SHLLV.QB */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x2000039d, 0 , 0, + 0x0 }, /* _POOL32A5~*(115) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003a5, 0 , 0, + 0x0 }, /* _POOL32A5~*(116) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003ad, 0 , 0, + 0x0 }, /* _POOL32A5~*(117) */ + { pool , SHLL__S__PH , 4 , 32, + 0xfc0003ff, 0x200003b5, 0 , 0, + 0x0 }, /* SHLL[_S].PH */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003bd, 0 , 0, + 0x0 }, /* _POOL32A5~*(119) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200003c5, &NMD::ADDWC , 0, + DSP_ }, /* ADDWC */ + { pool , PRECR_SRA__R__PH_W , 2 , 32, + 0xfc0003ff, 0x200003cd, 0 , 0, + 0x0 }, /* PRECR_SRA[_R].PH.W */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200003d5, &NMD::SHLLV_S_W , 0, + DSP_ }, /* SHLLV_S.W */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003dd, 0 , 0, + 0x0 }, /* _POOL32A5~*(123) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003e5, 0 , 0, + 0x0 }, /* _POOL32A5~*(124) */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003ed, 0 , 0, + 0x0 }, /* _POOL32A5~*(125) */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0x200003f5, &NMD::SHLL_S_W , 0, + DSP_ }, /* SHLL_S.W */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0x200003fd, 0 , 0, + 0x0 }, /* _POOL32A5~*(127) */ +}; + + +NMD::Pool NMD::PP_LSX[16] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000007, &NMD::LBX , 0, + 0x0 }, /* LBX */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000087, &NMD::SBX , 0, + XMMS_ }, /* SBX */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000107, &NMD::LBUX , 0, + 0x0 }, /* LBUX */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0x20000187, 0 , 0, + 0x0 }, /* PP.LSX~*(3) */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000207, &NMD::LHX , 0, + 0x0 }, /* LHX */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000287, &NMD::SHX , 0, + XMMS_ }, /* SHX */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000307, &NMD::LHUX , 0, + 0x0 }, /* LHUX */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000387, &NMD::LWUX , 0, + MIPS64_ }, /* LWUX */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000407, &NMD::LWX , 0, + 0x0 }, /* LWX */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000487, &NMD::SWX , 0, + XMMS_ }, /* SWX */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000507, &NMD::LWC1X , 0, + CP1_ }, /* LWC1X */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000587, &NMD::SWC1X , 0, + CP1_ }, /* SWC1X */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000607, &NMD::LDX , 0, + MIPS64_ }, /* LDX */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000687, &NMD::SDX , 0, + MIPS64_ }, /* SDX */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000707, &NMD::LDC1X , 0, + CP1_ }, /* LDC1X */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000787, &NMD::SDC1X , 0, + CP1_ }, /* SDC1X */ +}; + + +NMD::Pool NMD::PP_LSXS[16] = { + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0x20000047, 0 , 0, + 0x0 }, /* PP.LSXS~*(0) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0x200000c7, 0 , 0, + 0x0 }, /* PP.LSXS~*(1) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0x20000147, 0 , 0, + 0x0 }, /* PP.LSXS~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0x200001c7, 0 , 0, + 0x0 }, /* PP.LSXS~*(3) */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000247, &NMD::LHXS , 0, + 0x0 }, /* LHXS */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x200002c7, &NMD::SHXS , 0, + XMMS_ }, /* SHXS */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000347, &NMD::LHUXS , 0, + 0x0 }, /* LHUXS */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x200003c7, &NMD::LWUXS , 0, + MIPS64_ }, /* LWUXS */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000447, &NMD::LWXS_32_ , 0, + 0x0 }, /* LWXS[32] */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x200004c7, &NMD::SWXS , 0, + XMMS_ }, /* SWXS */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000547, &NMD::LWC1XS , 0, + CP1_ }, /* LWC1XS */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x200005c7, &NMD::SWC1XS , 0, + CP1_ }, /* SWC1XS */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000647, &NMD::LDXS , 0, + MIPS64_ }, /* LDXS */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x200006c7, &NMD::SDXS , 0, + MIPS64_ }, /* SDXS */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x20000747, &NMD::LDC1XS , 0, + CP1_ }, /* LDC1XS */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0x200007c7, &NMD::SDC1XS , 0, + CP1_ }, /* SDC1XS */ +}; + + +NMD::Pool NMD::P_LSX[2] = { + { pool , PP_LSX , 16 , 32, + 0xfc00007f, 0x20000007, 0 , 0, + 0x0 }, /* PP.LSX */ + { pool , PP_LSXS , 16 , 32, + 0xfc00007f, 0x20000047, 0 , 0, + 0x0 }, /* PP.LSXS */ +}; + + +NMD::Pool NMD::POOL32Axf_1_0[4] = { + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x2000007f, &NMD::MFHI_DSP_ , 0, + DSP_ }, /* MFHI[DSP] */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x2000107f, &NMD::MFLO_DSP_ , 0, + DSP_ }, /* MFLO[DSP] */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x2000207f, &NMD::MTHI_DSP_ , 0, + DSP_ }, /* MTHI[DSP] */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x2000307f, &NMD::MTLO_DSP_ , 0, + DSP_ }, /* MTLO[DSP] */ +}; + + +NMD::Pool NMD::POOL32Axf_1_1[4] = { + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x2000027f, &NMD::MTHLIP , 0, + DSP_ }, /* MTHLIP */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x2000127f, &NMD::SHILOV , 0, + DSP_ }, /* SHILOV */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0x2000227f, 0 , 0, + 0x0 }, /* POOL32Axf_1_1~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0x2000327f, 0 , 0, + 0x0 }, /* POOL32Axf_1_1~*(3) */ +}; + + +NMD::Pool NMD::POOL32Axf_1_3[4] = { + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x2000067f, &NMD::RDDSP , 0, + DSP_ }, /* RDDSP */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x2000167f, &NMD::WRDSP , 0, + DSP_ }, /* WRDSP */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x2000267f, &NMD::EXTP , 0, + DSP_ }, /* EXTP */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x2000367f, &NMD::EXTPDP , 0, + DSP_ }, /* EXTPDP */ +}; + + +NMD::Pool NMD::POOL32Axf_1_4[2] = { + { instruction , 0 , 0 , 32, + 0xfc001fff, 0x2000087f, &NMD::SHLL_QB , 0, + DSP_ }, /* SHLL.QB */ + { instruction , 0 , 0 , 32, + 0xfc001fff, 0x2000187f, &NMD::SHRL_QB , 0, + DSP_ }, /* SHRL.QB */ +}; + + +NMD::Pool NMD::MAQ_S_A__W_PHR[2] = { + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20000a7f, &NMD::MAQ_S_W_PHR , 0, + DSP_ }, /* MAQ_S.W.PHR */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20002a7f, &NMD::MAQ_SA_W_PHR , 0, + DSP_ }, /* MAQ_SA.W.PHR */ +}; + + +NMD::Pool NMD::MAQ_S_A__W_PHL[2] = { + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20001a7f, &NMD::MAQ_S_W_PHL , 0, + DSP_ }, /* MAQ_S.W.PHL */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20003a7f, &NMD::MAQ_SA_W_PHL , 0, + DSP_ }, /* MAQ_SA.W.PHL */ +}; + + +NMD::Pool NMD::POOL32Axf_1_5[2] = { + { pool , MAQ_S_A__W_PHR , 2 , 32, + 0xfc001fff, 0x20000a7f, 0 , 0, + 0x0 }, /* MAQ_S[A].W.PHR */ + { pool , MAQ_S_A__W_PHL , 2 , 32, + 0xfc001fff, 0x20001a7f, 0 , 0, + 0x0 }, /* MAQ_S[A].W.PHL */ +}; + + +NMD::Pool NMD::POOL32Axf_1_7[4] = { + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20000e7f, &NMD::EXTR_W , 0, + DSP_ }, /* EXTR.W */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20001e7f, &NMD::EXTR_R_W , 0, + DSP_ }, /* EXTR_R.W */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20002e7f, &NMD::EXTR_RS_W , 0, + DSP_ }, /* EXTR_RS.W */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20003e7f, &NMD::EXTR_S_H , 0, + DSP_ }, /* EXTR_S.H */ +}; + + +NMD::Pool NMD::POOL32Axf_1[8] = { + { pool , POOL32Axf_1_0 , 4 , 32, + 0xfc000fff, 0x2000007f, 0 , 0, + 0x0 }, /* POOL32Axf_1_0 */ + { pool , POOL32Axf_1_1 , 4 , 32, + 0xfc000fff, 0x2000027f, 0 , 0, + 0x0 }, /* POOL32Axf_1_1 */ + { reserved_block , 0 , 0 , 32, + 0xfc000fff, 0x2000047f, 0 , 0, + 0x0 }, /* POOL32Axf_1~*(2) */ + { pool , POOL32Axf_1_3 , 4 , 32, + 0xfc000fff, 0x2000067f, 0 , 0, + 0x0 }, /* POOL32Axf_1_3 */ + { pool , POOL32Axf_1_4 , 2 , 32, + 0xfc000fff, 0x2000087f, 0 , 0, + 0x0 }, /* POOL32Axf_1_4 */ + { pool , POOL32Axf_1_5 , 2 , 32, + 0xfc000fff, 0x20000a7f, 0 , 0, + 0x0 }, /* POOL32Axf_1_5 */ + { reserved_block , 0 , 0 , 32, + 0xfc000fff, 0x20000c7f, 0 , 0, + 0x0 }, /* POOL32Axf_1~*(6) */ + { pool , POOL32Axf_1_7 , 4 , 32, + 0xfc000fff, 0x20000e7f, 0 , 0, + 0x0 }, /* POOL32Axf_1_7 */ +}; + + +NMD::Pool NMD::POOL32Axf_2_DSP__0_7[8] = { + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200000bf, &NMD::DPA_W_PH , 0, + DSP_ }, /* DPA.W.PH */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200002bf, &NMD::DPAQ_S_W_PH , 0, + DSP_ }, /* DPAQ_S.W.PH */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200004bf, &NMD::DPS_W_PH , 0, + DSP_ }, /* DPS.W.PH */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200006bf, &NMD::DPSQ_S_W_PH , 0, + DSP_ }, /* DPSQ_S.W.PH */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0x200008bf, 0 , 0, + 0x0 }, /* POOL32Axf_2(DSP)_0_7~*(4) */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20000abf, &NMD::MADD_DSP_ , 0, + DSP_ }, /* MADD[DSP] */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20000cbf, &NMD::MULT_DSP_ , 0, + DSP_ }, /* MULT[DSP] */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20000ebf, &NMD::EXTRV_W , 0, + DSP_ }, /* EXTRV.W */ +}; + + +NMD::Pool NMD::POOL32Axf_2_DSP__8_15[8] = { + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200010bf, &NMD::DPAX_W_PH , 0, + DSP_ }, /* DPAX.W.PH */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200012bf, &NMD::DPAQ_SA_L_W , 0, + DSP_ }, /* DPAQ_SA.L.W */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200014bf, &NMD::DPSX_W_PH , 0, + DSP_ }, /* DPSX.W.PH */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200016bf, &NMD::DPSQ_SA_L_W , 0, + DSP_ }, /* DPSQ_SA.L.W */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0x200018bf, 0 , 0, + 0x0 }, /* POOL32Axf_2(DSP)_8_15~*(4) */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20001abf, &NMD::MADDU_DSP_ , 0, + DSP_ }, /* MADDU[DSP] */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20001cbf, &NMD::MULTU_DSP_ , 0, + DSP_ }, /* MULTU[DSP] */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20001ebf, &NMD::EXTRV_R_W , 0, + DSP_ }, /* EXTRV_R.W */ +}; + + +NMD::Pool NMD::POOL32Axf_2_DSP__16_23[8] = { + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200020bf, &NMD::DPAU_H_QBL , 0, + DSP_ }, /* DPAU.H.QBL */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200022bf, &NMD::DPAQX_S_W_PH , 0, + DSP_ }, /* DPAQX_S.W.PH */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200024bf, &NMD::DPSU_H_QBL , 0, + DSP_ }, /* DPSU.H.QBL */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200026bf, &NMD::DPSQX_S_W_PH , 0, + DSP_ }, /* DPSQX_S.W.PH */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200028bf, &NMD::EXTPV , 0, + DSP_ }, /* EXTPV */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20002abf, &NMD::MSUB_DSP_ , 0, + DSP_ }, /* MSUB[DSP] */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20002cbf, &NMD::MULSA_W_PH , 0, + DSP_ }, /* MULSA.W.PH */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20002ebf, &NMD::EXTRV_RS_W , 0, + DSP_ }, /* EXTRV_RS.W */ +}; + + +NMD::Pool NMD::POOL32Axf_2_DSP__24_31[8] = { + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200030bf, &NMD::DPAU_H_QBR , 0, + DSP_ }, /* DPAU.H.QBR */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200032bf, &NMD::DPAQX_SA_W_PH , 0, + DSP_ }, /* DPAQX_SA.W.PH */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200034bf, &NMD::DPSU_H_QBR , 0, + DSP_ }, /* DPSU.H.QBR */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200036bf, &NMD::DPSQX_SA_W_PH , 0, + DSP_ }, /* DPSQX_SA.W.PH */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x200038bf, &NMD::EXTPDPV , 0, + DSP_ }, /* EXTPDPV */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20003abf, &NMD::MSUBU_DSP_ , 0, + DSP_ }, /* MSUBU[DSP] */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20003cbf, &NMD::MULSAQ_S_W_PH , 0, + DSP_ }, /* MULSAQ_S.W.PH */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0x20003ebf, &NMD::EXTRV_S_H , 0, + DSP_ }, /* EXTRV_S.H */ +}; + + +NMD::Pool NMD::POOL32Axf_2[4] = { + { pool , POOL32Axf_2_DSP__0_7, 8 , 32, + 0xfc0031ff, 0x200000bf, 0 , 0, + 0x0 }, /* POOL32Axf_2(DSP)_0_7 */ + { pool , POOL32Axf_2_DSP__8_15, 8 , 32, + 0xfc0031ff, 0x200010bf, 0 , 0, + 0x0 }, /* POOL32Axf_2(DSP)_8_15 */ + { pool , POOL32Axf_2_DSP__16_23, 8 , 32, + 0xfc0031ff, 0x200020bf, 0 , 0, + 0x0 }, /* POOL32Axf_2(DSP)_16_23 */ + { pool , POOL32Axf_2_DSP__24_31, 8 , 32, + 0xfc0031ff, 0x200030bf, 0 , 0, + 0x0 }, /* POOL32Axf_2(DSP)_24_31 */ +}; + + +NMD::Pool NMD::POOL32Axf_4[128] = { + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000013f, &NMD::ABSQ_S_QB , 0, + DSP_ }, /* ABSQ_S.QB */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000033f, &NMD::REPLV_PH , 0, + DSP_ }, /* REPLV.PH */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000053f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000073f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(3) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000093f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20000b3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20000d3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20000f3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(7) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000113f, &NMD::ABSQ_S_PH , 0, + DSP_ }, /* ABSQ_S.PH */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000133f, &NMD::REPLV_QB , 0, + DSP_ }, /* REPLV.QB */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000153f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(10) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000173f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(11) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000193f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(12) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20001b3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(13) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20001d3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(14) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20001f3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(15) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000213f, &NMD::ABSQ_S_W , 0, + DSP_ }, /* ABSQ_S.W */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000233f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(17) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000253f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(18) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000273f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(19) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000293f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(20) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20002b3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(21) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20002d3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(22) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20002f3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(23) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000313f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(24) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000333f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(25) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000353f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(26) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000373f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(27) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000393f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(28) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20003b3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(29) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20003d3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(30) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20003f3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(31) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000413f, &NMD::INSV , 0, + DSP_ }, /* INSV */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000433f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(33) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000453f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(34) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000473f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(35) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000493f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(36) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x20004b3f, &NMD::CLO , 0, + XMMS_ }, /* CLO */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x20004d3f, &NMD::MFC2 , 0, + CP2_ }, /* MFC2 */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20004f3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(39) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000513f, &NMD::PRECEQ_W_PHL , 0, + DSP_ }, /* PRECEQ.W.PHL */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000533f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(41) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000553f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(42) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000573f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(43) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000593f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(44) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x20005b3f, &NMD::CLZ , 0, + XMMS_ }, /* CLZ */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x20005d3f, &NMD::MTC2 , 0, + CP2_ }, /* MTC2 */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20005f3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(47) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000613f, &NMD::PRECEQ_W_PHR , 0, + DSP_ }, /* PRECEQ.W.PHR */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000633f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(49) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000653f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(50) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000673f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(51) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000693f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(52) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20006b3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(53) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x20006d3f, &NMD::DMFC2 , 0, + CP2_ }, /* DMFC2 */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20006f3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(55) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000713f, &NMD::PRECEQU_PH_QBL , 0, + DSP_ }, /* PRECEQU.PH.QBL */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000733f, &NMD::PRECEQU_PH_QBLA , 0, + DSP_ }, /* PRECEQU.PH.QBLA */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000753f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(58) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000773f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(59) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000793f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(60) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20007b3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(61) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x20007d3f, &NMD::DMTC2 , 0, + CP2_ }, /* DMTC2 */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20007f3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(63) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000813f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(64) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000833f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(65) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000853f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(66) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000873f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(67) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000893f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(68) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20008b3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(69) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x20008d3f, &NMD::MFHC2 , 0, + CP2_ }, /* MFHC2 */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20008f3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(71) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000913f, &NMD::PRECEQU_PH_QBR , 0, + DSP_ }, /* PRECEQU.PH.QBR */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000933f, &NMD::PRECEQU_PH_QBRA , 0, + DSP_ }, /* PRECEQU.PH.QBRA */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000953f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(74) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000973f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(75) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000993f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(76) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20009b3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(77) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x20009d3f, &NMD::MTHC2 , 0, + CP2_ }, /* MTHC2 */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20009f3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(79) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000a13f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(80) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000a33f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(81) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000a53f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(82) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000a73f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(83) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000a93f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(84) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000ab3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(85) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000ad3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(86) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000af3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(87) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000b13f, &NMD::PRECEU_PH_QBL , 0, + DSP_ }, /* PRECEU.PH.QBL */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000b33f, &NMD::PRECEU_PH_QBLA , 0, + DSP_ }, /* PRECEU.PH.QBLA */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000b53f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(90) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000b73f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(91) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000b93f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(92) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000bb3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(93) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000bd3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(94) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000bf3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(95) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000c13f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(96) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000c33f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(97) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000c53f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(98) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000c73f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(99) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000c93f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(100) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000cb3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(101) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000cd3f, &NMD::CFC2 , 0, + CP2_ }, /* CFC2 */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000cf3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(103) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000d13f, &NMD::PRECEU_PH_QBR , 0, + DSP_ }, /* PRECEU.PH.QBR */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000d33f, &NMD::PRECEU_PH_QBRA , 0, + DSP_ }, /* PRECEU.PH.QBRA */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000d53f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(106) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000d73f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(107) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000d93f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(108) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000db3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(109) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000dd3f, &NMD::CTC2 , 0, + CP2_ }, /* CTC2 */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000df3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(111) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000e13f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(112) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000e33f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(113) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000e53f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(114) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000e73f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(115) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000e93f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(116) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000eb3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(117) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000ed3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(118) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000ef3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(119) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000f13f, &NMD::RADDU_W_QB , 0, + DSP_ }, /* RADDU.W.QB */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000f33f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(121) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000f53f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(122) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000f73f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(123) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000f93f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(124) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000fb3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(125) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000fd3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(126) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000ff3f, 0 , 0, + 0x0 }, /* POOL32Axf_4~*(127) */ +}; + + +NMD::Pool NMD::POOL32Axf_5_group0[32] = { + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000017f, &NMD::TLBGP , 0, + CP0_ | VZ_ | TLB_ }, /* TLBGP */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000037f, &NMD::TLBP , 0, + CP0_ | TLB_ }, /* TLBP */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000057f, &NMD::TLBGINV , 0, + CP0_ | VZ_ | TLB_ | TLBINV_}, /* TLBGINV */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000077f, &NMD::TLBINV , 0, + CP0_ | TLB_ | TLBINV_}, /* TLBINV */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000097f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20000b7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20000d7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20000f7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(7) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000117f, &NMD::TLBGR , 0, + CP0_ | VZ_ | TLB_ }, /* TLBGR */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000137f, &NMD::TLBR , 0, + CP0_ | TLB_ }, /* TLBR */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000157f, &NMD::TLBGINVF , 0, + CP0_ | VZ_ | TLB_ | TLBINV_}, /* TLBGINVF */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000177f, &NMD::TLBINVF , 0, + CP0_ | TLB_ | TLBINV_}, /* TLBINVF */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000197f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(12) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20001b7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(13) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20001d7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(14) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20001f7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(15) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000217f, &NMD::TLBGWI , 0, + CP0_ | VZ_ | TLB_ }, /* TLBGWI */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000237f, &NMD::TLBWI , 0, + CP0_ | TLB_ }, /* TLBWI */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000257f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(18) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000277f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(19) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000297f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(20) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20002b7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(21) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20002d7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(22) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20002f7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(23) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000317f, &NMD::TLBGWR , 0, + CP0_ | VZ_ | TLB_ }, /* TLBGWR */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000337f, &NMD::TLBWR , 0, + CP0_ | TLB_ }, /* TLBWR */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000357f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(26) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000377f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(27) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000397f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(28) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20003b7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(29) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20003d7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(30) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20003f7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0~*(31) */ +}; + + +NMD::Pool NMD::POOL32Axf_5_group1[32] = { + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000417f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(0) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000437f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(1) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000457f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(2) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000477f, &NMD::DI , 0, + 0x0 }, /* DI */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000497f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20004b7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20004d7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20004f7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(7) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000517f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(8) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000537f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(9) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000557f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(10) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000577f, &NMD::EI , 0, + 0x0 }, /* EI */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000597f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(12) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20005b7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(13) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20005d7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(14) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20005f7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(15) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000617f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(16) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000637f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(17) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000657f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(18) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000677f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(19) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000697f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(20) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20006b7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(21) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20006d7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(22) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20006f7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(23) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000717f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(24) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000737f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(25) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000757f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(26) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000777f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(27) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000797f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(28) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20007b7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(29) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20007d7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(30) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x20007f7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1~*(31) */ +}; + + +NMD::Pool NMD::ERETx[2] = { + { instruction , 0 , 0 , 32, + 0xfc01ffff, 0x2000f37f, &NMD::ERET , 0, + 0x0 }, /* ERET */ + { instruction , 0 , 0 , 32, + 0xfc01ffff, 0x2001f37f, &NMD::ERETNC , 0, + 0x0 }, /* ERETNC */ +}; + + +NMD::Pool NMD::POOL32Axf_5_group3[32] = { + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000c17f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(0) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000c37f, &NMD::WAIT , 0, + 0x0 }, /* WAIT */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000c57f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000c77f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(3) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000c97f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000cb7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000cd7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000cf7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(7) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000d17f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(8) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000d37f, &NMD::IRET , 0, + MCU_ }, /* IRET */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000d57f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(10) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000d77f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(11) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000d97f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(12) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000db7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(13) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000dd7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(14) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000df7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(15) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000e17f, &NMD::RDPGPR , 0, + CP0_ }, /* RDPGPR */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000e37f, &NMD::DERET , 0, + EJTAG_ }, /* DERET */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000e57f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(18) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000e77f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(19) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000e97f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(20) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000eb7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(21) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000ed7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(22) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000ef7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(23) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0x2000f17f, &NMD::WRPGPR , 0, + CP0_ }, /* WRPGPR */ + { pool , ERETx , 2 , 32, + 0xfc00ffff, 0x2000f37f, 0 , 0, + 0x0 }, /* ERETx */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000f57f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(26) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000f77f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(27) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000f97f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(28) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000fb7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(29) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000fd7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(30) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0x2000ff7f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3~*(31) */ +}; + + +NMD::Pool NMD::POOL32Axf_5[4] = { + { pool , POOL32Axf_5_group0 , 32 , 32, + 0xfc00c1ff, 0x2000017f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group0 */ + { pool , POOL32Axf_5_group1 , 32 , 32, + 0xfc00c1ff, 0x2000417f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group1 */ + { reserved_block , 0 , 0 , 32, + 0xfc00c1ff, 0x2000817f, 0 , 0, + 0x0 }, /* POOL32Axf_5~*(2) */ + { pool , POOL32Axf_5_group3 , 32 , 32, + 0xfc00c1ff, 0x2000c17f, 0 , 0, + 0x0 }, /* POOL32Axf_5_group3 */ +}; + + +NMD::Pool NMD::SHRA__R__QB[2] = { + { instruction , 0 , 0 , 32, + 0xfc001fff, 0x200001ff, &NMD::SHRA_QB , 0, + DSP_ }, /* SHRA.QB */ + { instruction , 0 , 0 , 32, + 0xfc001fff, 0x200011ff, &NMD::SHRA_R_QB , 0, + DSP_ }, /* SHRA_R.QB */ +}; + + +NMD::Pool NMD::POOL32Axf_7[8] = { + { pool , SHRA__R__QB , 2 , 32, + 0xfc000fff, 0x200001ff, 0 , 0, + 0x0 }, /* SHRA[_R].QB */ + { instruction , 0 , 0 , 32, + 0xfc000fff, 0x200003ff, &NMD::SHRL_PH , 0, + DSP_ }, /* SHRL.PH */ + { instruction , 0 , 0 , 32, + 0xfc000fff, 0x200005ff, &NMD::REPL_QB , 0, + DSP_ }, /* REPL.QB */ + { reserved_block , 0 , 0 , 32, + 0xfc000fff, 0x200007ff, 0 , 0, + 0x0 }, /* POOL32Axf_7~*(3) */ + { reserved_block , 0 , 0 , 32, + 0xfc000fff, 0x200009ff, 0 , 0, + 0x0 }, /* POOL32Axf_7~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc000fff, 0x20000bff, 0 , 0, + 0x0 }, /* POOL32Axf_7~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc000fff, 0x20000dff, 0 , 0, + 0x0 }, /* POOL32Axf_7~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc000fff, 0x20000fff, 0 , 0, + 0x0 }, /* POOL32Axf_7~*(7) */ +}; + + +NMD::Pool NMD::POOL32Axf[8] = { + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0x2000003f, 0 , 0, + 0x0 }, /* POOL32Axf~*(0) */ + { pool , POOL32Axf_1 , 8 , 32, + 0xfc0001ff, 0x2000007f, 0 , 0, + 0x0 }, /* POOL32Axf_1 */ + { pool , POOL32Axf_2 , 4 , 32, + 0xfc0001ff, 0x200000bf, 0 , 0, + 0x0 }, /* POOL32Axf_2 */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0x200000ff, 0 , 0, + 0x0 }, /* POOL32Axf~*(3) */ + { pool , POOL32Axf_4 , 128 , 32, + 0xfc0001ff, 0x2000013f, 0 , 0, + 0x0 }, /* POOL32Axf_4 */ + { pool , POOL32Axf_5 , 4 , 32, + 0xfc0001ff, 0x2000017f, 0 , 0, + 0x0 }, /* POOL32Axf_5 */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0x200001bf, 0 , 0, + 0x0 }, /* POOL32Axf~*(6) */ + { pool , POOL32Axf_7 , 8 , 32, + 0xfc0001ff, 0x200001ff, 0 , 0, + 0x0 }, /* POOL32Axf_7 */ +}; + + +NMD::Pool NMD::_POOL32A7[8] = { + { pool , P_LSX , 2 , 32, + 0xfc00003f, 0x20000007, 0 , 0, + 0x0 }, /* P.LSX */ + { instruction , 0 , 0 , 32, + 0xfc00003f, 0x2000000f, &NMD::LSA , 0, + 0x0 }, /* LSA */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0x20000017, 0 , 0, + 0x0 }, /* _POOL32A7~*(2) */ + { instruction , 0 , 0 , 32, + 0xfc00003f, 0x2000001f, &NMD::EXTW , 0, + 0x0 }, /* EXTW */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0x20000027, 0 , 0, + 0x0 }, /* _POOL32A7~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0x2000002f, 0 , 0, + 0x0 }, /* _POOL32A7~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0x20000037, 0 , 0, + 0x0 }, /* _POOL32A7~*(6) */ + { pool , POOL32Axf , 8 , 32, + 0xfc00003f, 0x2000003f, 0 , 0, + 0x0 }, /* POOL32Axf */ +}; + + +NMD::Pool NMD::P32A[8] = { + { pool , _POOL32A0 , 128 , 32, + 0xfc000007, 0x20000000, 0 , 0, + 0x0 }, /* _POOL32A0 */ + { instruction , 0 , 0 , 32, + 0xfc000007, 0x20000001, &NMD::SPECIAL2 , 0, + UDI_ }, /* SPECIAL2 */ + { instruction , 0 , 0 , 32, + 0xfc000007, 0x20000002, &NMD::COP2_1 , 0, + CP2_ }, /* COP2_1 */ + { instruction , 0 , 0 , 32, + 0xfc000007, 0x20000003, &NMD::UDI , 0, + UDI_ }, /* UDI */ + { reserved_block , 0 , 0 , 32, + 0xfc000007, 0x20000004, 0 , 0, + 0x0 }, /* P32A~*(4) */ + { pool , _POOL32A5 , 128 , 32, + 0xfc000007, 0x20000005, 0 , 0, + 0x0 }, /* _POOL32A5 */ + { reserved_block , 0 , 0 , 32, + 0xfc000007, 0x20000006, 0 , 0, + 0x0 }, /* P32A~*(6) */ + { pool , _POOL32A7 , 8 , 32, + 0xfc000007, 0x20000007, 0 , 0, + 0x0 }, /* _POOL32A7 */ +}; + + +NMD::Pool NMD::P_GP_D[2] = { + { instruction , 0 , 0 , 32, + 0xfc000007, 0x40000001, &NMD::LD_GP_ , 0, + MIPS64_ }, /* LD[GP] */ + { instruction , 0 , 0 , 32, + 0xfc000007, 0x40000005, &NMD::SD_GP_ , 0, + MIPS64_ }, /* SD[GP] */ +}; + + +NMD::Pool NMD::P_GP_W[4] = { + { instruction , 0 , 0 , 32, + 0xfc000003, 0x40000000, &NMD::ADDIU_GP_W_ , 0, + 0x0 }, /* ADDIU[GP.W] */ + { pool , P_GP_D , 2 , 32, + 0xfc000003, 0x40000001, 0 , 0, + 0x0 }, /* P.GP.D */ + { instruction , 0 , 0 , 32, + 0xfc000003, 0x40000002, &NMD::LW_GP_ , 0, + 0x0 }, /* LW[GP] */ + { instruction , 0 , 0 , 32, + 0xfc000003, 0x40000003, &NMD::SW_GP_ , 0, + 0x0 }, /* SW[GP] */ +}; + + +NMD::Pool NMD::POOL48I[32] = { + { instruction , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600000000000ull, &NMD::LI_48_ , 0, + XMMS_ }, /* LI[48] */ + { instruction , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600100000000ull, &NMD::ADDIU_48_ , 0, + XMMS_ }, /* ADDIU[48] */ + { instruction , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600200000000ull, &NMD::ADDIU_GP48_ , 0, + XMMS_ }, /* ADDIU[GP48] */ + { instruction , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600300000000ull, &NMD::ADDIUPC_48_ , 0, + XMMS_ }, /* ADDIUPC[48] */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600400000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(4) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600500000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(5) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600600000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(6) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600700000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(7) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600800000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(8) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600900000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(9) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600a00000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(10) */ + { instruction , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600b00000000ull, &NMD::LWPC_48_ , 0, + XMMS_ }, /* LWPC[48] */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600c00000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(12) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600d00000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(13) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600e00000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(14) */ + { instruction , 0 , 0 , 48, + 0xfc1f00000000ull, 0x600f00000000ull, &NMD::SWPC_48_ , 0, + XMMS_ }, /* SWPC[48] */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601000000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(16) */ + { instruction , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601100000000ull, &NMD::DADDIU_48_ , 0, + MIPS64_ }, /* DADDIU[48] */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601200000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(18) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601300000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(19) */ + { instruction , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601400000000ull, &NMD::DLUI_48_ , 0, + MIPS64_ }, /* DLUI[48] */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601500000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(21) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601600000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(22) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601700000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(23) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601800000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(24) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601900000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(25) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601a00000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(26) */ + { instruction , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601b00000000ull, &NMD::LDPC_48_ , 0, + MIPS64_ }, /* LDPC[48] */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601c00000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(28) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601d00000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(29) */ + { reserved_block , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601e00000000ull, 0 , 0, + 0x0 }, /* POOL48I~*(30) */ + { instruction , 0 , 0 , 48, + 0xfc1f00000000ull, 0x601f00000000ull, &NMD::SDPC_48_ , 0, + MIPS64_ }, /* SDPC[48] */ +}; + + +NMD::Pool NMD::PP_SR[4] = { + { instruction , 0 , 0 , 32, + 0xfc10f003, 0x80003000, &NMD::SAVE_32_ , 0, + 0x0 }, /* SAVE[32] */ + { reserved_block , 0 , 0 , 32, + 0xfc10f003, 0x80003001, 0 , 0, + 0x0 }, /* PP.SR~*(1) */ + { instruction , 0 , 0 , 32, + 0xfc10f003, 0x80003002, &NMD::RESTORE_32_ , 0, + 0x0 }, /* RESTORE[32] */ + { return_instruction , 0 , 0 , 32, + 0xfc10f003, 0x80003003, &NMD::RESTORE_JRC_32_ , 0, + 0x0 }, /* RESTORE.JRC[32] */ +}; + + +NMD::Pool NMD::P_SR_F[8] = { + { instruction , 0 , 0 , 32, + 0xfc10f007, 0x80103000, &NMD::SAVEF , 0, + CP1_ }, /* SAVEF */ + { instruction , 0 , 0 , 32, + 0xfc10f007, 0x80103001, &NMD::RESTOREF , 0, + CP1_ }, /* RESTOREF */ + { reserved_block , 0 , 0 , 32, + 0xfc10f007, 0x80103002, 0 , 0, + 0x0 }, /* P.SR.F~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc10f007, 0x80103003, 0 , 0, + 0x0 }, /* P.SR.F~*(3) */ + { reserved_block , 0 , 0 , 32, + 0xfc10f007, 0x80103004, 0 , 0, + 0x0 }, /* P.SR.F~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc10f007, 0x80103005, 0 , 0, + 0x0 }, /* P.SR.F~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc10f007, 0x80103006, 0 , 0, + 0x0 }, /* P.SR.F~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc10f007, 0x80103007, 0 , 0, + 0x0 }, /* P.SR.F~*(7) */ +}; + + +NMD::Pool NMD::P_SR[2] = { + { pool , PP_SR , 4 , 32, + 0xfc10f000, 0x80003000, 0 , 0, + 0x0 }, /* PP.SR */ + { pool , P_SR_F , 8 , 32, + 0xfc10f000, 0x80103000, 0 , 0, + 0x0 }, /* P.SR.F */ +}; + + +NMD::Pool NMD::P_SLL[5] = { + { instruction , 0 , 0 , 32, + 0xffe0f1ff, 0x8000c000, &NMD::NOP_32_ , 0, + 0x0 }, /* NOP[32] */ + { instruction , 0 , 0 , 32, + 0xffe0f1ff, 0x8000c003, &NMD::EHB , 0, + 0x0 }, /* EHB */ + { instruction , 0 , 0 , 32, + 0xffe0f1ff, 0x8000c005, &NMD::PAUSE , 0, + 0x0 }, /* PAUSE */ + { instruction , 0 , 0 , 32, + 0xffe0f1ff, 0x8000c006, &NMD::SYNC , 0, + 0x0 }, /* SYNC */ + { instruction , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c000, &NMD::SLL_32_ , 0, + 0x0 }, /* SLL[32] */ +}; + + +NMD::Pool NMD::P_SHIFT[16] = { + { pool , P_SLL , 5 , 32, + 0xfc00f1e0, 0x8000c000, 0 , 0, + 0x0 }, /* P.SLL */ + { reserved_block , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c020, 0 , 0, + 0x0 }, /* P.SHIFT~*(1) */ + { instruction , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c040, &NMD::SRL_32_ , 0, + 0x0 }, /* SRL[32] */ + { reserved_block , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c060, 0 , 0, + 0x0 }, /* P.SHIFT~*(3) */ + { instruction , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c080, &NMD::SRA , 0, + 0x0 }, /* SRA */ + { reserved_block , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c0a0, 0 , 0, + 0x0 }, /* P.SHIFT~*(5) */ + { instruction , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c0c0, &NMD::ROTR , 0, + 0x0 }, /* ROTR */ + { reserved_block , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c0e0, 0 , 0, + 0x0 }, /* P.SHIFT~*(7) */ + { instruction , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c100, &NMD::DSLL , 0, + MIPS64_ }, /* DSLL */ + { instruction , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c120, &NMD::DSLL32 , 0, + MIPS64_ }, /* DSLL32 */ + { instruction , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c140, &NMD::DSRL , 0, + MIPS64_ }, /* DSRL */ + { instruction , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c160, &NMD::DSRL32 , 0, + MIPS64_ }, /* DSRL32 */ + { instruction , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c180, &NMD::DSRA , 0, + MIPS64_ }, /* DSRA */ + { instruction , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c1a0, &NMD::DSRA32 , 0, + MIPS64_ }, /* DSRA32 */ + { instruction , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c1c0, &NMD::DROTR , 0, + MIPS64_ }, /* DROTR */ + { instruction , 0 , 0 , 32, + 0xfc00f1e0, 0x8000c1e0, &NMD::DROTR32 , 0, + MIPS64_ }, /* DROTR32 */ +}; + + +NMD::Pool NMD::P_ROTX[4] = { + { instruction , 0 , 0 , 32, + 0xfc00f820, 0x8000d000, &NMD::ROTX , 0, + XMMS_ }, /* ROTX */ + { reserved_block , 0 , 0 , 32, + 0xfc00f820, 0x8000d020, 0 , 0, + 0x0 }, /* P.ROTX~*(1) */ + { reserved_block , 0 , 0 , 32, + 0xfc00f820, 0x8000d800, 0 , 0, + 0x0 }, /* P.ROTX~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc00f820, 0x8000d820, 0 , 0, + 0x0 }, /* P.ROTX~*(3) */ +}; + + +NMD::Pool NMD::P_INS[4] = { + { instruction , 0 , 0 , 32, + 0xfc00f820, 0x8000e000, &NMD::INS , 0, + XMMS_ }, /* INS */ + { instruction , 0 , 0 , 32, + 0xfc00f820, 0x8000e020, &NMD::DINSU , 0, + MIPS64_ }, /* DINSU */ + { instruction , 0 , 0 , 32, + 0xfc00f820, 0x8000e800, &NMD::DINSM , 0, + MIPS64_ }, /* DINSM */ + { instruction , 0 , 0 , 32, + 0xfc00f820, 0x8000e820, &NMD::DINS , 0, + MIPS64_ }, /* DINS */ +}; + + +NMD::Pool NMD::P_EXT[4] = { + { instruction , 0 , 0 , 32, + 0xfc00f820, 0x8000f000, &NMD::EXT , 0, + XMMS_ }, /* EXT */ + { instruction , 0 , 0 , 32, + 0xfc00f820, 0x8000f020, &NMD::DEXTU , 0, + MIPS64_ }, /* DEXTU */ + { instruction , 0 , 0 , 32, + 0xfc00f820, 0x8000f800, &NMD::DEXTM , 0, + MIPS64_ }, /* DEXTM */ + { instruction , 0 , 0 , 32, + 0xfc00f820, 0x8000f820, &NMD::DEXT , 0, + MIPS64_ }, /* DEXT */ +}; + + +NMD::Pool NMD::P_U12[16] = { + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x80000000, &NMD::ORI , 0, + 0x0 }, /* ORI */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x80001000, &NMD::XORI , 0, + 0x0 }, /* XORI */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x80002000, &NMD::ANDI_32_ , 0, + 0x0 }, /* ANDI[32] */ + { pool , P_SR , 2 , 32, + 0xfc00f000, 0x80003000, 0 , 0, + 0x0 }, /* P.SR */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x80004000, &NMD::SLTI , 0, + 0x0 }, /* SLTI */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x80005000, &NMD::SLTIU , 0, + 0x0 }, /* SLTIU */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x80006000, &NMD::SEQI , 0, + 0x0 }, /* SEQI */ + { reserved_block , 0 , 0 , 32, + 0xfc00f000, 0x80007000, 0 , 0, + 0x0 }, /* P.U12~*(7) */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x80008000, &NMD::ADDIU_NEG_ , 0, + 0x0 }, /* ADDIU[NEG] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x80009000, &NMD::DADDIU_U12_ , 0, + MIPS64_ }, /* DADDIU[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x8000a000, &NMD::DADDIU_NEG_ , 0, + MIPS64_ }, /* DADDIU[NEG] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x8000b000, &NMD::DROTX , 0, + MIPS64_ }, /* DROTX */ + { pool , P_SHIFT , 16 , 32, + 0xfc00f000, 0x8000c000, 0 , 0, + 0x0 }, /* P.SHIFT */ + { pool , P_ROTX , 4 , 32, + 0xfc00f000, 0x8000d000, 0 , 0, + 0x0 }, /* P.ROTX */ + { pool , P_INS , 4 , 32, + 0xfc00f000, 0x8000e000, 0 , 0, + 0x0 }, /* P.INS */ + { pool , P_EXT , 4 , 32, + 0xfc00f000, 0x8000f000, 0 , 0, + 0x0 }, /* P.EXT */ +}; + + +NMD::Pool NMD::RINT_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa0000020, &NMD::RINT_S , 0, + CP1_ }, /* RINT.S */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa0000220, &NMD::RINT_D , 0, + CP1_ }, /* RINT.D */ +}; + + +NMD::Pool NMD::ADD_fmt0[2] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa0000030, &NMD::ADD_S , 0, + CP1_ }, /* ADD.S */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0xa0000230, 0 , 0, + CP1_ }, /* ADD.fmt0~*(1) */ +}; + + +NMD::Pool NMD::SELEQZ_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa0000038, &NMD::SELEQZ_S , 0, + CP1_ }, /* SELEQZ.S */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa0000238, &NMD::SELEQZ_D , 0, + CP1_ }, /* SELEQZ.D */ +}; + + +NMD::Pool NMD::CLASS_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa0000060, &NMD::CLASS_S , 0, + CP1_ }, /* CLASS.S */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa0000260, &NMD::CLASS_D , 0, + CP1_ }, /* CLASS.D */ +}; + + +NMD::Pool NMD::SUB_fmt0[2] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa0000070, &NMD::SUB_S , 0, + CP1_ }, /* SUB.S */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0xa0000270, 0 , 0, + CP1_ }, /* SUB.fmt0~*(1) */ +}; + + +NMD::Pool NMD::SELNEZ_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa0000078, &NMD::SELNEZ_S , 0, + CP1_ }, /* SELNEZ.S */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa0000278, &NMD::SELNEZ_D , 0, + CP1_ }, /* SELNEZ.D */ +}; + + +NMD::Pool NMD::MUL_fmt0[2] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa00000b0, &NMD::MUL_S , 0, + CP1_ }, /* MUL.S */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0xa00002b0, 0 , 0, + CP1_ }, /* MUL.fmt0~*(1) */ +}; + + +NMD::Pool NMD::SEL_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa00000b8, &NMD::SEL_S , 0, + CP1_ }, /* SEL.S */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa00002b8, &NMD::SEL_D , 0, + CP1_ }, /* SEL.D */ +}; + + +NMD::Pool NMD::DIV_fmt0[2] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa00000f0, &NMD::DIV_S , 0, + CP1_ }, /* DIV.S */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0xa00002f0, 0 , 0, + CP1_ }, /* DIV.fmt0~*(1) */ +}; + + +NMD::Pool NMD::ADD_fmt1[2] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa0000130, &NMD::ADD_D , 0, + CP1_ }, /* ADD.D */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0xa0000330, 0 , 0, + CP1_ }, /* ADD.fmt1~*(1) */ +}; + + +NMD::Pool NMD::SUB_fmt1[2] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa0000170, &NMD::SUB_D , 0, + CP1_ }, /* SUB.D */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0xa0000370, 0 , 0, + CP1_ }, /* SUB.fmt1~*(1) */ +}; + + +NMD::Pool NMD::MUL_fmt1[2] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa00001b0, &NMD::MUL_D , 0, + CP1_ }, /* MUL.D */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0xa00003b0, 0 , 0, + CP1_ }, /* MUL.fmt1~*(1) */ +}; + + +NMD::Pool NMD::MADDF_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa00001b8, &NMD::MADDF_S , 0, + CP1_ }, /* MADDF.S */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa00003b8, &NMD::MADDF_D , 0, + CP1_ }, /* MADDF.D */ +}; + + +NMD::Pool NMD::DIV_fmt1[2] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa00001f0, &NMD::DIV_D , 0, + CP1_ }, /* DIV.D */ + { reserved_block , 0 , 0 , 32, + 0xfc0003ff, 0xa00003f0, 0 , 0, + CP1_ }, /* DIV.fmt1~*(1) */ +}; + + +NMD::Pool NMD::MSUBF_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa00001f8, &NMD::MSUBF_S , 0, + CP1_ }, /* MSUBF.S */ + { instruction , 0 , 0 , 32, + 0xfc0003ff, 0xa00003f8, &NMD::MSUBF_D , 0, + CP1_ }, /* MSUBF.D */ +}; + + +NMD::Pool NMD::POOL32F_0[64] = { + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000000, 0 , 0, + CP1_ }, /* POOL32F_0~*(0) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000008, 0 , 0, + CP1_ }, /* POOL32F_0~*(1) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000010, 0 , 0, + CP1_ }, /* POOL32F_0~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000018, 0 , 0, + CP1_ }, /* POOL32F_0~*(3) */ + { pool , RINT_fmt , 2 , 32, + 0xfc0001ff, 0xa0000020, 0 , 0, + CP1_ }, /* RINT.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000028, 0 , 0, + CP1_ }, /* POOL32F_0~*(5) */ + { pool , ADD_fmt0 , 2 , 32, + 0xfc0001ff, 0xa0000030, 0 , 0, + CP1_ }, /* ADD.fmt0 */ + { pool , SELEQZ_fmt , 2 , 32, + 0xfc0001ff, 0xa0000038, 0 , 0, + CP1_ }, /* SELEQZ.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000040, 0 , 0, + CP1_ }, /* POOL32F_0~*(8) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000048, 0 , 0, + CP1_ }, /* POOL32F_0~*(9) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000050, 0 , 0, + CP1_ }, /* POOL32F_0~*(10) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000058, 0 , 0, + CP1_ }, /* POOL32F_0~*(11) */ + { pool , CLASS_fmt , 2 , 32, + 0xfc0001ff, 0xa0000060, 0 , 0, + CP1_ }, /* CLASS.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000068, 0 , 0, + CP1_ }, /* POOL32F_0~*(13) */ + { pool , SUB_fmt0 , 2 , 32, + 0xfc0001ff, 0xa0000070, 0 , 0, + CP1_ }, /* SUB.fmt0 */ + { pool , SELNEZ_fmt , 2 , 32, + 0xfc0001ff, 0xa0000078, 0 , 0, + CP1_ }, /* SELNEZ.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000080, 0 , 0, + CP1_ }, /* POOL32F_0~*(16) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000088, 0 , 0, + CP1_ }, /* POOL32F_0~*(17) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000090, 0 , 0, + CP1_ }, /* POOL32F_0~*(18) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000098, 0 , 0, + CP1_ }, /* POOL32F_0~*(19) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00000a0, 0 , 0, + CP1_ }, /* POOL32F_0~*(20) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00000a8, 0 , 0, + CP1_ }, /* POOL32F_0~*(21) */ + { pool , MUL_fmt0 , 2 , 32, + 0xfc0001ff, 0xa00000b0, 0 , 0, + CP1_ }, /* MUL.fmt0 */ + { pool , SEL_fmt , 2 , 32, + 0xfc0001ff, 0xa00000b8, 0 , 0, + CP1_ }, /* SEL.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00000c0, 0 , 0, + CP1_ }, /* POOL32F_0~*(24) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00000c8, 0 , 0, + CP1_ }, /* POOL32F_0~*(25) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00000d0, 0 , 0, + CP1_ }, /* POOL32F_0~*(26) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00000d8, 0 , 0, + CP1_ }, /* POOL32F_0~*(27) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00000e0, 0 , 0, + CP1_ }, /* POOL32F_0~*(28) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00000e8, 0 , 0, + CP1_ }, /* POOL32F_0~*(29) */ + { pool , DIV_fmt0 , 2 , 32, + 0xfc0001ff, 0xa00000f0, 0 , 0, + CP1_ }, /* DIV.fmt0 */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00000f8, 0 , 0, + CP1_ }, /* POOL32F_0~*(31) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000100, 0 , 0, + CP1_ }, /* POOL32F_0~*(32) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000108, 0 , 0, + CP1_ }, /* POOL32F_0~*(33) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000110, 0 , 0, + CP1_ }, /* POOL32F_0~*(34) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000118, 0 , 0, + CP1_ }, /* POOL32F_0~*(35) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000120, 0 , 0, + CP1_ }, /* POOL32F_0~*(36) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000128, 0 , 0, + CP1_ }, /* POOL32F_0~*(37) */ + { pool , ADD_fmt1 , 2 , 32, + 0xfc0001ff, 0xa0000130, 0 , 0, + CP1_ }, /* ADD.fmt1 */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000138, 0 , 0, + CP1_ }, /* POOL32F_0~*(39) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000140, 0 , 0, + CP1_ }, /* POOL32F_0~*(40) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000148, 0 , 0, + CP1_ }, /* POOL32F_0~*(41) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000150, 0 , 0, + CP1_ }, /* POOL32F_0~*(42) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000158, 0 , 0, + CP1_ }, /* POOL32F_0~*(43) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000160, 0 , 0, + CP1_ }, /* POOL32F_0~*(44) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000168, 0 , 0, + CP1_ }, /* POOL32F_0~*(45) */ + { pool , SUB_fmt1 , 2 , 32, + 0xfc0001ff, 0xa0000170, 0 , 0, + CP1_ }, /* SUB.fmt1 */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000178, 0 , 0, + CP1_ }, /* POOL32F_0~*(47) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000180, 0 , 0, + CP1_ }, /* POOL32F_0~*(48) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000188, 0 , 0, + CP1_ }, /* POOL32F_0~*(49) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000190, 0 , 0, + CP1_ }, /* POOL32F_0~*(50) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa0000198, 0 , 0, + CP1_ }, /* POOL32F_0~*(51) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00001a0, 0 , 0, + CP1_ }, /* POOL32F_0~*(52) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00001a8, 0 , 0, + CP1_ }, /* POOL32F_0~*(53) */ + { pool , MUL_fmt1 , 2 , 32, + 0xfc0001ff, 0xa00001b0, 0 , 0, + CP1_ }, /* MUL.fmt1 */ + { pool , MADDF_fmt , 2 , 32, + 0xfc0001ff, 0xa00001b8, 0 , 0, + CP1_ }, /* MADDF.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00001c0, 0 , 0, + CP1_ }, /* POOL32F_0~*(56) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00001c8, 0 , 0, + CP1_ }, /* POOL32F_0~*(57) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00001d0, 0 , 0, + CP1_ }, /* POOL32F_0~*(58) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00001d8, 0 , 0, + CP1_ }, /* POOL32F_0~*(59) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00001e0, 0 , 0, + CP1_ }, /* POOL32F_0~*(60) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xa00001e8, 0 , 0, + CP1_ }, /* POOL32F_0~*(61) */ + { pool , DIV_fmt1 , 2 , 32, + 0xfc0001ff, 0xa00001f0, 0 , 0, + CP1_ }, /* DIV.fmt1 */ + { pool , MSUBF_fmt , 2 , 32, + 0xfc0001ff, 0xa00001f8, 0 , 0, + CP1_ }, /* MSUBF.fmt */ +}; + + +NMD::Pool NMD::MIN_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc00023f, 0xa0000003, &NMD::MIN_S , 0, + CP1_ }, /* MIN.S */ + { instruction , 0 , 0 , 32, + 0xfc00023f, 0xa0000203, &NMD::MIN_D , 0, + CP1_ }, /* MIN.D */ +}; + + +NMD::Pool NMD::MAX_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc00023f, 0xa000000b, &NMD::MAX_S , 0, + CP1_ }, /* MAX.S */ + { instruction , 0 , 0 , 32, + 0xfc00023f, 0xa000020b, &NMD::MAX_D , 0, + CP1_ }, /* MAX.D */ +}; + + +NMD::Pool NMD::MINA_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc00023f, 0xa0000023, &NMD::MINA_S , 0, + CP1_ }, /* MINA.S */ + { instruction , 0 , 0 , 32, + 0xfc00023f, 0xa0000223, &NMD::MINA_D , 0, + CP1_ }, /* MINA.D */ +}; + + +NMD::Pool NMD::MAXA_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc00023f, 0xa000002b, &NMD::MAXA_S , 0, + CP1_ }, /* MAXA.S */ + { instruction , 0 , 0 , 32, + 0xfc00023f, 0xa000022b, &NMD::MAXA_D , 0, + CP1_ }, /* MAXA.D */ +}; + + +NMD::Pool NMD::CVT_L_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000013b, &NMD::CVT_L_S , 0, + CP1_ }, /* CVT.L.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000413b, &NMD::CVT_L_D , 0, + CP1_ }, /* CVT.L.D */ +}; + + +NMD::Pool NMD::RSQRT_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000023b, &NMD::RSQRT_S , 0, + CP1_ }, /* RSQRT.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000423b, &NMD::RSQRT_D , 0, + CP1_ }, /* RSQRT.D */ +}; + + +NMD::Pool NMD::FLOOR_L_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000033b, &NMD::FLOOR_L_S , 0, + CP1_ }, /* FLOOR.L.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000433b, &NMD::FLOOR_L_D , 0, + CP1_ }, /* FLOOR.L.D */ +}; + + +NMD::Pool NMD::CVT_W_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000093b, &NMD::CVT_W_S , 0, + CP1_ }, /* CVT.W.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000493b, &NMD::CVT_W_D , 0, + CP1_ }, /* CVT.W.D */ +}; + + +NMD::Pool NMD::SQRT_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa0000a3b, &NMD::SQRT_S , 0, + CP1_ }, /* SQRT.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa0004a3b, &NMD::SQRT_D , 0, + CP1_ }, /* SQRT.D */ +}; + + +NMD::Pool NMD::FLOOR_W_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa0000b3b, &NMD::FLOOR_W_S , 0, + CP1_ }, /* FLOOR.W.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa0004b3b, &NMD::FLOOR_W_D , 0, + CP1_ }, /* FLOOR.W.D */ +}; + + +NMD::Pool NMD::RECIP_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000123b, &NMD::RECIP_S , 0, + CP1_ }, /* RECIP.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000523b, &NMD::RECIP_D , 0, + CP1_ }, /* RECIP.D */ +}; + + +NMD::Pool NMD::CEIL_L_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000133b, &NMD::CEIL_L_S , 0, + CP1_ }, /* CEIL.L.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000533b, &NMD::CEIL_L_D , 0, + CP1_ }, /* CEIL.L.D */ +}; + + +NMD::Pool NMD::CEIL_W_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa0001b3b, &NMD::CEIL_W_S , 0, + CP1_ }, /* CEIL.W.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa0005b3b, &NMD::CEIL_W_D , 0, + CP1_ }, /* CEIL.W.D */ +}; + + +NMD::Pool NMD::TRUNC_L_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000233b, &NMD::TRUNC_L_S , 0, + CP1_ }, /* TRUNC.L.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000633b, &NMD::TRUNC_L_D , 0, + CP1_ }, /* TRUNC.L.D */ +}; + + +NMD::Pool NMD::TRUNC_W_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa0002b3b, &NMD::TRUNC_W_S , 0, + CP1_ }, /* TRUNC.W.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa0006b3b, &NMD::TRUNC_W_D , 0, + CP1_ }, /* TRUNC.W.D */ +}; + + +NMD::Pool NMD::ROUND_L_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000333b, &NMD::ROUND_L_S , 0, + CP1_ }, /* ROUND.L.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000733b, &NMD::ROUND_L_D , 0, + CP1_ }, /* ROUND.L.D */ +}; + + +NMD::Pool NMD::ROUND_W_fmt[2] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa0003b3b, &NMD::ROUND_W_S , 0, + CP1_ }, /* ROUND.W.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa0007b3b, &NMD::ROUND_W_D , 0, + CP1_ }, /* ROUND.W.D */ +}; + + +NMD::Pool NMD::POOL32Fxf_0[64] = { + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000003b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(0) */ + { pool , CVT_L_fmt , 2 , 32, + 0xfc003fff, 0xa000013b, 0 , 0, + CP1_ }, /* CVT.L.fmt */ + { pool , RSQRT_fmt , 2 , 32, + 0xfc003fff, 0xa000023b, 0 , 0, + CP1_ }, /* RSQRT.fmt */ + { pool , FLOOR_L_fmt , 2 , 32, + 0xfc003fff, 0xa000033b, 0 , 0, + CP1_ }, /* FLOOR.L.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000043b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000053b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000063b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000073b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(7) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000083b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(8) */ + { pool , CVT_W_fmt , 2 , 32, + 0xfc003fff, 0xa000093b, 0 , 0, + CP1_ }, /* CVT.W.fmt */ + { pool , SQRT_fmt , 2 , 32, + 0xfc003fff, 0xa0000a3b, 0 , 0, + CP1_ }, /* SQRT.fmt */ + { pool , FLOOR_W_fmt , 2 , 32, + 0xfc003fff, 0xa0000b3b, 0 , 0, + CP1_ }, /* FLOOR.W.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0000c3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(12) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0000d3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(13) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0000e3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(14) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0000f3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(15) */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0xa000103b, &NMD::CFC1 , 0, + CP1_ }, /* CFC1 */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000113b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(17) */ + { pool , RECIP_fmt , 2 , 32, + 0xfc003fff, 0xa000123b, 0 , 0, + CP1_ }, /* RECIP.fmt */ + { pool , CEIL_L_fmt , 2 , 32, + 0xfc003fff, 0xa000133b, 0 , 0, + CP1_ }, /* CEIL.L.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000143b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(20) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000153b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(21) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000163b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(22) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000173b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(23) */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0xa000183b, &NMD::CTC1 , 0, + CP1_ }, /* CTC1 */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000193b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(25) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0001a3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(26) */ + { pool , CEIL_W_fmt , 2 , 32, + 0xfc003fff, 0xa0001b3b, 0 , 0, + CP1_ }, /* CEIL.W.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0001c3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(28) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0001d3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(29) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0001e3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(30) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0001f3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(31) */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0xa000203b, &NMD::MFC1 , 0, + CP1_ }, /* MFC1 */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0xa000213b, &NMD::CVT_S_PL , 0, + CP1_ }, /* CVT.S.PL */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000223b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(34) */ + { pool , TRUNC_L_fmt , 2 , 32, + 0xfc003fff, 0xa000233b, 0 , 0, + CP1_ }, /* TRUNC.L.fmt */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0xa000243b, &NMD::DMFC1 , 0, + CP1_ | MIPS64_ }, /* DMFC1 */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000253b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(37) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000263b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(38) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000273b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(39) */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0xa000283b, &NMD::MTC1 , 0, + CP1_ }, /* MTC1 */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0xa000293b, &NMD::CVT_S_PU , 0, + CP1_ }, /* CVT.S.PU */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0002a3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(42) */ + { pool , TRUNC_W_fmt , 2 , 32, + 0xfc003fff, 0xa0002b3b, 0 , 0, + CP1_ }, /* TRUNC.W.fmt */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0xa0002c3b, &NMD::DMTC1 , 0, + CP1_ | MIPS64_ }, /* DMTC1 */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0002d3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(45) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0002e3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(46) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0002f3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(47) */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0xa000303b, &NMD::MFHC1 , 0, + CP1_ }, /* MFHC1 */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000313b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(49) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000323b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(50) */ + { pool , ROUND_L_fmt , 2 , 32, + 0xfc003fff, 0xa000333b, 0 , 0, + CP1_ }, /* ROUND.L.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000343b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(52) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000353b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(53) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000363b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(54) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000373b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(55) */ + { instruction , 0 , 0 , 32, + 0xfc003fff, 0xa000383b, &NMD::MTHC1 , 0, + CP1_ }, /* MTHC1 */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa000393b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(57) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0003a3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(58) */ + { pool , ROUND_W_fmt , 2 , 32, + 0xfc003fff, 0xa0003b3b, 0 , 0, + CP1_ }, /* ROUND.W.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0003c3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(60) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0003d3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(61) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0003e3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(62) */ + { reserved_block , 0 , 0 , 32, + 0xfc003fff, 0xa0003f3b, 0 , 0, + CP1_ }, /* POOL32Fxf_0~*(63) */ +}; + + +NMD::Pool NMD::MOV_fmt[4] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000007b, &NMD::MOV_S , 0, + CP1_ }, /* MOV.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000207b, &NMD::MOV_D , 0, + CP1_ }, /* MOV.D */ + { reserved_block , 0 , 0 , 32, + 0xfc007fff, 0xa000407b, 0 , 0, + CP1_ }, /* MOV.fmt~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc007fff, 0xa000607b, 0 , 0, + CP1_ }, /* MOV.fmt~*(3) */ +}; + + +NMD::Pool NMD::ABS_fmt[4] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000037b, &NMD::ABS_S , 0, + CP1_ }, /* ABS.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000237b, &NMD::ABS_D , 0, + CP1_ }, /* ABS.D */ + { reserved_block , 0 , 0 , 32, + 0xfc007fff, 0xa000437b, 0 , 0, + CP1_ }, /* ABS.fmt~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc007fff, 0xa000637b, 0 , 0, + CP1_ }, /* ABS.fmt~*(3) */ +}; + + +NMD::Pool NMD::NEG_fmt[4] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa0000b7b, &NMD::NEG_S , 0, + CP1_ }, /* NEG.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa0002b7b, &NMD::NEG_D , 0, + CP1_ }, /* NEG.D */ + { reserved_block , 0 , 0 , 32, + 0xfc007fff, 0xa0004b7b, 0 , 0, + CP1_ }, /* NEG.fmt~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc007fff, 0xa0006b7b, 0 , 0, + CP1_ }, /* NEG.fmt~*(3) */ +}; + + +NMD::Pool NMD::CVT_D_fmt[4] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000137b, &NMD::CVT_D_S , 0, + CP1_ }, /* CVT.D.S */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000337b, &NMD::CVT_D_W , 0, + CP1_ }, /* CVT.D.W */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa000537b, &NMD::CVT_D_L , 0, + CP1_ }, /* CVT.D.L */ + { reserved_block , 0 , 0 , 32, + 0xfc007fff, 0xa000737b, 0 , 0, + CP1_ }, /* CVT.D.fmt~*(3) */ +}; + + +NMD::Pool NMD::CVT_S_fmt[4] = { + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa0001b7b, &NMD::CVT_S_D , 0, + CP1_ }, /* CVT.S.D */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa0003b7b, &NMD::CVT_S_W , 0, + CP1_ }, /* CVT.S.W */ + { instruction , 0 , 0 , 32, + 0xfc007fff, 0xa0005b7b, &NMD::CVT_S_L , 0, + CP1_ }, /* CVT.S.L */ + { reserved_block , 0 , 0 , 32, + 0xfc007fff, 0xa0007b7b, 0 , 0, + CP1_ }, /* CVT.S.fmt~*(3) */ +}; + + +NMD::Pool NMD::POOL32Fxf_1[32] = { + { pool , MOV_fmt , 4 , 32, + 0xfc001fff, 0xa000007b, 0 , 0, + CP1_ }, /* MOV.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000017b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(1) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000027b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(2) */ + { pool , ABS_fmt , 4 , 32, + 0xfc001fff, 0xa000037b, 0 , 0, + CP1_ }, /* ABS.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000047b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000057b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000067b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000077b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(7) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000087b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(8) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000097b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(9) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa0000a7b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(10) */ + { pool , NEG_fmt , 4 , 32, + 0xfc001fff, 0xa0000b7b, 0 , 0, + CP1_ }, /* NEG.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa0000c7b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(12) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa0000d7b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(13) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa0000e7b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(14) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa0000f7b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(15) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000107b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(16) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000117b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(17) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000127b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(18) */ + { pool , CVT_D_fmt , 4 , 32, + 0xfc001fff, 0xa000137b, 0 , 0, + CP1_ }, /* CVT.D.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000147b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(20) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000157b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(21) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000167b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(22) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000177b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(23) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000187b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(24) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa000197b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(25) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa0001a7b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(26) */ + { pool , CVT_S_fmt , 4 , 32, + 0xfc001fff, 0xa0001b7b, 0 , 0, + CP1_ }, /* CVT.S.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa0001c7b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(28) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa0001d7b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(29) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa0001e7b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(30) */ + { reserved_block , 0 , 0 , 32, + 0xfc001fff, 0xa0001f7b, 0 , 0, + CP1_ }, /* POOL32Fxf_1~*(31) */ +}; + + +NMD::Pool NMD::POOL32Fxf[4] = { + { pool , POOL32Fxf_0 , 64 , 32, + 0xfc0000ff, 0xa000003b, 0 , 0, + CP1_ }, /* POOL32Fxf_0 */ + { pool , POOL32Fxf_1 , 32 , 32, + 0xfc0000ff, 0xa000007b, 0 , 0, + CP1_ }, /* POOL32Fxf_1 */ + { reserved_block , 0 , 0 , 32, + 0xfc0000ff, 0xa00000bb, 0 , 0, + CP1_ }, /* POOL32Fxf~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc0000ff, 0xa00000fb, 0 , 0, + CP1_ }, /* POOL32Fxf~*(3) */ +}; + + +NMD::Pool NMD::POOL32F_3[8] = { + { pool , MIN_fmt , 2 , 32, + 0xfc00003f, 0xa0000003, 0 , 0, + CP1_ }, /* MIN.fmt */ + { pool , MAX_fmt , 2 , 32, + 0xfc00003f, 0xa000000b, 0 , 0, + CP1_ }, /* MAX.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0xa0000013, 0 , 0, + CP1_ }, /* POOL32F_3~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0xa000001b, 0 , 0, + CP1_ }, /* POOL32F_3~*(3) */ + { pool , MINA_fmt , 2 , 32, + 0xfc00003f, 0xa0000023, 0 , 0, + CP1_ }, /* MINA.fmt */ + { pool , MAXA_fmt , 2 , 32, + 0xfc00003f, 0xa000002b, 0 , 0, + CP1_ }, /* MAXA.fmt */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0xa0000033, 0 , 0, + CP1_ }, /* POOL32F_3~*(6) */ + { pool , POOL32Fxf , 4 , 32, + 0xfc00003f, 0xa000003b, 0 , 0, + CP1_ }, /* POOL32Fxf */ +}; + + +NMD::Pool NMD::CMP_condn_S[32] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000005, &NMD::CMP_AF_S , 0, + CP1_ }, /* CMP.AF.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000045, &NMD::CMP_UN_S , 0, + CP1_ }, /* CMP.UN.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000085, &NMD::CMP_EQ_S , 0, + CP1_ }, /* CMP.EQ.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa00000c5, &NMD::CMP_UEQ_S , 0, + CP1_ }, /* CMP.UEQ.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000105, &NMD::CMP_LT_S , 0, + CP1_ }, /* CMP.LT.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000145, &NMD::CMP_ULT_S , 0, + CP1_ }, /* CMP.ULT.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000185, &NMD::CMP_LE_S , 0, + CP1_ }, /* CMP.LE.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa00001c5, &NMD::CMP_ULE_S , 0, + CP1_ }, /* CMP.ULE.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000205, &NMD::CMP_SAF_S , 0, + CP1_ }, /* CMP.SAF.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000245, &NMD::CMP_SUN_S , 0, + CP1_ }, /* CMP.SUN.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000285, &NMD::CMP_SEQ_S , 0, + CP1_ }, /* CMP.SEQ.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa00002c5, &NMD::CMP_SUEQ_S , 0, + CP1_ }, /* CMP.SUEQ.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000305, &NMD::CMP_SLT_S , 0, + CP1_ }, /* CMP.SLT.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000345, &NMD::CMP_SULT_S , 0, + CP1_ }, /* CMP.SULT.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000385, &NMD::CMP_SLE_S , 0, + CP1_ }, /* CMP.SLE.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa00003c5, &NMD::CMP_SULE_S , 0, + CP1_ }, /* CMP.SULE.S */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000405, 0 , 0, + CP1_ }, /* CMP.condn.S~*(16) */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000445, &NMD::CMP_OR_S , 0, + CP1_ }, /* CMP.OR.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000485, &NMD::CMP_UNE_S , 0, + CP1_ }, /* CMP.UNE.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa00004c5, &NMD::CMP_NE_S , 0, + CP1_ }, /* CMP.NE.S */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000505, 0 , 0, + CP1_ }, /* CMP.condn.S~*(20) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000545, 0 , 0, + CP1_ }, /* CMP.condn.S~*(21) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000585, 0 , 0, + CP1_ }, /* CMP.condn.S~*(22) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa00005c5, 0 , 0, + CP1_ }, /* CMP.condn.S~*(23) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000605, 0 , 0, + CP1_ }, /* CMP.condn.S~*(24) */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000645, &NMD::CMP_SOR_S , 0, + CP1_ }, /* CMP.SOR.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000685, &NMD::CMP_SUNE_S , 0, + CP1_ }, /* CMP.SUNE.S */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa00006c5, &NMD::CMP_SNE_S , 0, + CP1_ }, /* CMP.SNE.S */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000705, 0 , 0, + CP1_ }, /* CMP.condn.S~*(28) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000745, 0 , 0, + CP1_ }, /* CMP.condn.S~*(29) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000785, 0 , 0, + CP1_ }, /* CMP.condn.S~*(30) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa00007c5, 0 , 0, + CP1_ }, /* CMP.condn.S~*(31) */ +}; + + +NMD::Pool NMD::CMP_condn_D[32] = { + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000015, &NMD::CMP_AF_D , 0, + CP1_ }, /* CMP.AF.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000055, &NMD::CMP_UN_D , 0, + CP1_ }, /* CMP.UN.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000095, &NMD::CMP_EQ_D , 0, + CP1_ }, /* CMP.EQ.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa00000d5, &NMD::CMP_UEQ_D , 0, + CP1_ }, /* CMP.UEQ.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000115, &NMD::CMP_LT_D , 0, + CP1_ }, /* CMP.LT.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000155, &NMD::CMP_ULT_D , 0, + CP1_ }, /* CMP.ULT.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000195, &NMD::CMP_LE_D , 0, + CP1_ }, /* CMP.LE.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa00001d5, &NMD::CMP_ULE_D , 0, + CP1_ }, /* CMP.ULE.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000215, &NMD::CMP_SAF_D , 0, + CP1_ }, /* CMP.SAF.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000255, &NMD::CMP_SUN_D , 0, + CP1_ }, /* CMP.SUN.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000295, &NMD::CMP_SEQ_D , 0, + CP1_ }, /* CMP.SEQ.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa00002d5, &NMD::CMP_SUEQ_D , 0, + CP1_ }, /* CMP.SUEQ.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000315, &NMD::CMP_SLT_D , 0, + CP1_ }, /* CMP.SLT.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000355, &NMD::CMP_SULT_D , 0, + CP1_ }, /* CMP.SULT.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000395, &NMD::CMP_SLE_D , 0, + CP1_ }, /* CMP.SLE.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa00003d5, &NMD::CMP_SULE_D , 0, + CP1_ }, /* CMP.SULE.D */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000415, 0 , 0, + CP1_ }, /* CMP.condn.D~*(16) */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000455, &NMD::CMP_OR_D , 0, + CP1_ }, /* CMP.OR.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000495, &NMD::CMP_UNE_D , 0, + CP1_ }, /* CMP.UNE.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa00004d5, &NMD::CMP_NE_D , 0, + CP1_ }, /* CMP.NE.D */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000515, 0 , 0, + CP1_ }, /* CMP.condn.D~*(20) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000555, 0 , 0, + CP1_ }, /* CMP.condn.D~*(21) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000595, 0 , 0, + CP1_ }, /* CMP.condn.D~*(22) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa00005d5, 0 , 0, + CP1_ }, /* CMP.condn.D~*(23) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000615, 0 , 0, + CP1_ }, /* CMP.condn.D~*(24) */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000655, &NMD::CMP_SOR_D , 0, + CP1_ }, /* CMP.SOR.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa0000695, &NMD::CMP_SUNE_D , 0, + CP1_ }, /* CMP.SUNE.D */ + { instruction , 0 , 0 , 32, + 0xfc0007ff, 0xa00006d5, &NMD::CMP_SNE_D , 0, + CP1_ }, /* CMP.SNE.D */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000715, 0 , 0, + CP1_ }, /* CMP.condn.D~*(28) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000755, 0 , 0, + CP1_ }, /* CMP.condn.D~*(29) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa0000795, 0 , 0, + CP1_ }, /* CMP.condn.D~*(30) */ + { reserved_block , 0 , 0 , 32, + 0xfc0007ff, 0xa00007d5, 0 , 0, + CP1_ }, /* CMP.condn.D~*(31) */ +}; + + +NMD::Pool NMD::POOL32F_5[8] = { + { pool , CMP_condn_S , 32 , 32, + 0xfc00003f, 0xa0000005, 0 , 0, + CP1_ }, /* CMP.condn.S */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0xa000000d, 0 , 0, + CP1_ }, /* POOL32F_5~*(1) */ + { pool , CMP_condn_D , 32 , 32, + 0xfc00003f, 0xa0000015, 0 , 0, + CP1_ }, /* CMP.condn.D */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0xa000001d, 0 , 0, + CP1_ }, /* POOL32F_5~*(3) */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0xa0000025, 0 , 0, + CP1_ }, /* POOL32F_5~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0xa000002d, 0 , 0, + CP1_ }, /* POOL32F_5~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0xa0000035, 0 , 0, + CP1_ }, /* POOL32F_5~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0xa000003d, 0 , 0, + CP1_ }, /* POOL32F_5~*(7) */ +}; + + +NMD::Pool NMD::POOL32F[8] = { + { pool , POOL32F_0 , 64 , 32, + 0xfc000007, 0xa0000000, 0 , 0, + CP1_ }, /* POOL32F_0 */ + { reserved_block , 0 , 0 , 32, + 0xfc000007, 0xa0000001, 0 , 0, + CP1_ }, /* POOL32F~*(1) */ + { reserved_block , 0 , 0 , 32, + 0xfc000007, 0xa0000002, 0 , 0, + CP1_ }, /* POOL32F~*(2) */ + { pool , POOL32F_3 , 8 , 32, + 0xfc000007, 0xa0000003, 0 , 0, + CP1_ }, /* POOL32F_3 */ + { reserved_block , 0 , 0 , 32, + 0xfc000007, 0xa0000004, 0 , 0, + CP1_ }, /* POOL32F~*(4) */ + { pool , POOL32F_5 , 8 , 32, + 0xfc000007, 0xa0000005, 0 , 0, + CP1_ }, /* POOL32F_5 */ + { reserved_block , 0 , 0 , 32, + 0xfc000007, 0xa0000006, 0 , 0, + CP1_ }, /* POOL32F~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc000007, 0xa0000007, 0 , 0, + CP1_ }, /* POOL32F~*(7) */ +}; + + +NMD::Pool NMD::POOL32S_0[64] = { + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000000, 0 , 0, + 0x0 }, /* POOL32S_0~*(0) */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc0000008, &NMD::DLSA , 0, + MIPS64_ }, /* DLSA */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc0000010, &NMD::DSLLV , 0, + MIPS64_ }, /* DSLLV */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc0000018, &NMD::DMUL , 0, + MIPS64_ }, /* DMUL */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000020, 0 , 0, + 0x0 }, /* POOL32S_0~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000028, 0 , 0, + 0x0 }, /* POOL32S_0~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000030, 0 , 0, + 0x0 }, /* POOL32S_0~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000038, 0 , 0, + 0x0 }, /* POOL32S_0~*(7) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000040, 0 , 0, + 0x0 }, /* POOL32S_0~*(8) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000048, 0 , 0, + 0x0 }, /* POOL32S_0~*(9) */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc0000050, &NMD::DSRLV , 0, + MIPS64_ }, /* DSRLV */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc0000058, &NMD::DMUH , 0, + MIPS64_ }, /* DMUH */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000060, 0 , 0, + 0x0 }, /* POOL32S_0~*(12) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000068, 0 , 0, + 0x0 }, /* POOL32S_0~*(13) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000070, 0 , 0, + 0x0 }, /* POOL32S_0~*(14) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000078, 0 , 0, + 0x0 }, /* POOL32S_0~*(15) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000080, 0 , 0, + 0x0 }, /* POOL32S_0~*(16) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000088, 0 , 0, + 0x0 }, /* POOL32S_0~*(17) */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc0000090, &NMD::DSRAV , 0, + MIPS64_ }, /* DSRAV */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc0000098, &NMD::DMULU , 0, + MIPS64_ }, /* DMULU */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00000a0, 0 , 0, + 0x0 }, /* POOL32S_0~*(20) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00000a8, 0 , 0, + 0x0 }, /* POOL32S_0~*(21) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00000b0, 0 , 0, + 0x0 }, /* POOL32S_0~*(22) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00000b8, 0 , 0, + 0x0 }, /* POOL32S_0~*(23) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00000c0, 0 , 0, + 0x0 }, /* POOL32S_0~*(24) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00000c8, 0 , 0, + 0x0 }, /* POOL32S_0~*(25) */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc00000d0, &NMD::DROTRV , 0, + MIPS64_ }, /* DROTRV */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc00000d8, &NMD::DMUHU , 0, + MIPS64_ }, /* DMUHU */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00000e0, 0 , 0, + 0x0 }, /* POOL32S_0~*(28) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00000e8, 0 , 0, + 0x0 }, /* POOL32S_0~*(29) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00000f0, 0 , 0, + 0x0 }, /* POOL32S_0~*(30) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00000f8, 0 , 0, + 0x0 }, /* POOL32S_0~*(31) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000100, 0 , 0, + 0x0 }, /* POOL32S_0~*(32) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000108, 0 , 0, + 0x0 }, /* POOL32S_0~*(33) */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc0000110, &NMD::DADD , 0, + MIPS64_ }, /* DADD */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc0000118, &NMD::DDIV , 0, + MIPS64_ }, /* DDIV */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000120, 0 , 0, + 0x0 }, /* POOL32S_0~*(36) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000128, 0 , 0, + 0x0 }, /* POOL32S_0~*(37) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000130, 0 , 0, + 0x0 }, /* POOL32S_0~*(38) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000138, 0 , 0, + 0x0 }, /* POOL32S_0~*(39) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000140, 0 , 0, + 0x0 }, /* POOL32S_0~*(40) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000148, 0 , 0, + 0x0 }, /* POOL32S_0~*(41) */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc0000150, &NMD::DADDU , 0, + MIPS64_ }, /* DADDU */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc0000158, &NMD::DMOD , 0, + MIPS64_ }, /* DMOD */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000160, 0 , 0, + 0x0 }, /* POOL32S_0~*(44) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000168, 0 , 0, + 0x0 }, /* POOL32S_0~*(45) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000170, 0 , 0, + 0x0 }, /* POOL32S_0~*(46) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000178, 0 , 0, + 0x0 }, /* POOL32S_0~*(47) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000180, 0 , 0, + 0x0 }, /* POOL32S_0~*(48) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc0000188, 0 , 0, + 0x0 }, /* POOL32S_0~*(49) */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc0000190, &NMD::DSUB , 0, + MIPS64_ }, /* DSUB */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc0000198, &NMD::DDIVU , 0, + MIPS64_ }, /* DDIVU */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00001a0, 0 , 0, + 0x0 }, /* POOL32S_0~*(52) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00001a8, 0 , 0, + 0x0 }, /* POOL32S_0~*(53) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00001b0, 0 , 0, + 0x0 }, /* POOL32S_0~*(54) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00001b8, 0 , 0, + 0x0 }, /* POOL32S_0~*(55) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00001c0, 0 , 0, + 0x0 }, /* POOL32S_0~*(56) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00001c8, 0 , 0, + 0x0 }, /* POOL32S_0~*(57) */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc00001d0, &NMD::DSUBU , 0, + MIPS64_ }, /* DSUBU */ + { instruction , 0 , 0 , 32, + 0xfc0001ff, 0xc00001d8, &NMD::DMODU , 0, + MIPS64_ }, /* DMODU */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00001e0, 0 , 0, + 0x0 }, /* POOL32S_0~*(60) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00001e8, 0 , 0, + 0x0 }, /* POOL32S_0~*(61) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00001f0, 0 , 0, + 0x0 }, /* POOL32S_0~*(62) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00001f8, 0 , 0, + 0x0 }, /* POOL32S_0~*(63) */ +}; + + +NMD::Pool NMD::POOL32Sxf_4[128] = { + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000013c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(0) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000033c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(1) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000053c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000073c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(3) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000093c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0000b3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0000d3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0000f3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(7) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000113c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(8) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000133c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(9) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000153c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(10) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000173c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(11) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000193c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(12) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0001b3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(13) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0001d3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(14) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0001f3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(15) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000213c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(16) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000233c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(17) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000253c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(18) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000273c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(19) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000293c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(20) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0002b3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(21) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0002d3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(22) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0002f3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(23) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000313c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(24) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000333c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(25) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000353c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(26) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000373c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(27) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000393c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(28) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0003b3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(29) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0003d3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(30) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0003f3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(31) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000413c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(32) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000433c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(33) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000453c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(34) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000473c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(35) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000493c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(36) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0xc0004b3c, &NMD::DCLO , 0, + MIPS64_ }, /* DCLO */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0004d3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(38) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0004f3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(39) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000513c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(40) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000533c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(41) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000553c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(42) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000573c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(43) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000593c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(44) */ + { instruction , 0 , 0 , 32, + 0xfc00ffff, 0xc0005b3c, &NMD::DCLZ , 0, + MIPS64_ }, /* DCLZ */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0005d3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(46) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0005f3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(47) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000613c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(48) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000633c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(49) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000653c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(50) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000673c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(51) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000693c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(52) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0006b3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(53) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0006d3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(54) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0006f3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(55) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000713c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(56) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000733c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(57) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000753c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(58) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000773c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(59) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000793c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(60) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0007b3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(61) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0007d3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(62) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0007f3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(63) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000813c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(64) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000833c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(65) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000853c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(66) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000873c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(67) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000893c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(68) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0008b3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(69) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0008d3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(70) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0008f3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(71) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000913c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(72) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000933c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(73) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000953c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(74) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000973c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(75) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000993c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(76) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0009b3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(77) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0009d3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(78) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc0009f3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(79) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000a13c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(80) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000a33c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(81) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000a53c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(82) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000a73c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(83) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000a93c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(84) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000ab3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(85) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000ad3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(86) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000af3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(87) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000b13c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(88) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000b33c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(89) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000b53c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(90) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000b73c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(91) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000b93c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(92) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000bb3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(93) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000bd3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(94) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000bf3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(95) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000c13c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(96) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000c33c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(97) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000c53c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(98) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000c73c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(99) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000c93c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(100) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000cb3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(101) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000cd3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(102) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000cf3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(103) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000d13c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(104) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000d33c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(105) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000d53c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(106) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000d73c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(107) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000d93c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(108) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000db3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(109) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000dd3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(110) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000df3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(111) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000e13c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(112) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000e33c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(113) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000e53c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(114) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000e73c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(115) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000e93c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(116) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000eb3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(117) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000ed3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(118) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000ef3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(119) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000f13c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(120) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000f33c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(121) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000f53c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(122) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000f73c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(123) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000f93c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(124) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000fb3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(125) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000fd3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(126) */ + { reserved_block , 0 , 0 , 32, + 0xfc00ffff, 0xc000ff3c, 0 , 0, + 0x0 }, /* POOL32Sxf_4~*(127) */ +}; + + +NMD::Pool NMD::POOL32Sxf[8] = { + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc000003c, 0 , 0, + 0x0 }, /* POOL32Sxf~*(0) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc000007c, 0 , 0, + 0x0 }, /* POOL32Sxf~*(1) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00000bc, 0 , 0, + 0x0 }, /* POOL32Sxf~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00000fc, 0 , 0, + 0x0 }, /* POOL32Sxf~*(3) */ + { pool , POOL32Sxf_4 , 128 , 32, + 0xfc0001ff, 0xc000013c, 0 , 0, + 0x0 }, /* POOL32Sxf_4 */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc000017c, 0 , 0, + 0x0 }, /* POOL32Sxf~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00001bc, 0 , 0, + 0x0 }, /* POOL32Sxf~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc0001ff, 0xc00001fc, 0 , 0, + 0x0 }, /* POOL32Sxf~*(7) */ +}; + + +NMD::Pool NMD::POOL32S_4[8] = { + { instruction , 0 , 0 , 32, + 0xfc00003f, 0xc0000004, &NMD::EXTD , 0, + MIPS64_ }, /* EXTD */ + { instruction , 0 , 0 , 32, + 0xfc00003f, 0xc000000c, &NMD::EXTD32 , 0, + MIPS64_ }, /* EXTD32 */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0xc0000014, 0 , 0, + 0x0 }, /* POOL32S_4~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0xc000001c, 0 , 0, + 0x0 }, /* POOL32S_4~*(3) */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0xc0000024, 0 , 0, + 0x0 }, /* POOL32S_4~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0xc000002c, 0 , 0, + 0x0 }, /* POOL32S_4~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc00003f, 0xc0000034, 0 , 0, + 0x0 }, /* POOL32S_4~*(6) */ + { pool , POOL32Sxf , 8 , 32, + 0xfc00003f, 0xc000003c, 0 , 0, + 0x0 }, /* POOL32Sxf */ +}; + + +NMD::Pool NMD::POOL32S[8] = { + { pool , POOL32S_0 , 64 , 32, + 0xfc000007, 0xc0000000, 0 , 0, + 0x0 }, /* POOL32S_0 */ + { reserved_block , 0 , 0 , 32, + 0xfc000007, 0xc0000001, 0 , 0, + 0x0 }, /* POOL32S~*(1) */ + { reserved_block , 0 , 0 , 32, + 0xfc000007, 0xc0000002, 0 , 0, + 0x0 }, /* POOL32S~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc000007, 0xc0000003, 0 , 0, + 0x0 }, /* POOL32S~*(3) */ + { pool , POOL32S_4 , 8 , 32, + 0xfc000007, 0xc0000004, 0 , 0, + 0x0 }, /* POOL32S_4 */ + { reserved_block , 0 , 0 , 32, + 0xfc000007, 0xc0000005, 0 , 0, + 0x0 }, /* POOL32S~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc000007, 0xc0000006, 0 , 0, + 0x0 }, /* POOL32S~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc000007, 0xc0000007, 0 , 0, + 0x0 }, /* POOL32S~*(7) */ +}; + + +NMD::Pool NMD::P_LUI[2] = { + { instruction , 0 , 0 , 32, + 0xfc000002, 0xe0000000, &NMD::LUI , 0, + 0x0 }, /* LUI */ + { instruction , 0 , 0 , 32, + 0xfc000002, 0xe0000002, &NMD::ALUIPC , 0, + 0x0 }, /* ALUIPC */ +}; + + +NMD::Pool NMD::P_GP_LH[2] = { + { instruction , 0 , 0 , 32, + 0xfc1c0001, 0x44100000, &NMD::LH_GP_ , 0, + 0x0 }, /* LH[GP] */ + { instruction , 0 , 0 , 32, + 0xfc1c0001, 0x44100001, &NMD::LHU_GP_ , 0, + 0x0 }, /* LHU[GP] */ +}; + + +NMD::Pool NMD::P_GP_SH[2] = { + { instruction , 0 , 0 , 32, + 0xfc1c0001, 0x44140000, &NMD::SH_GP_ , 0, + 0x0 }, /* SH[GP] */ + { reserved_block , 0 , 0 , 32, + 0xfc1c0001, 0x44140001, 0 , 0, + 0x0 }, /* P.GP.SH~*(1) */ +}; + + +NMD::Pool NMD::P_GP_CP1[4] = { + { instruction , 0 , 0 , 32, + 0xfc1c0003, 0x44180000, &NMD::LWC1_GP_ , 0, + CP1_ }, /* LWC1[GP] */ + { instruction , 0 , 0 , 32, + 0xfc1c0003, 0x44180001, &NMD::SWC1_GP_ , 0, + CP1_ }, /* SWC1[GP] */ + { instruction , 0 , 0 , 32, + 0xfc1c0003, 0x44180002, &NMD::LDC1_GP_ , 0, + CP1_ }, /* LDC1[GP] */ + { instruction , 0 , 0 , 32, + 0xfc1c0003, 0x44180003, &NMD::SDC1_GP_ , 0, + CP1_ }, /* SDC1[GP] */ +}; + + +NMD::Pool NMD::P_GP_M64[4] = { + { instruction , 0 , 0 , 32, + 0xfc1c0003, 0x441c0000, &NMD::LWU_GP_ , 0, + MIPS64_ }, /* LWU[GP] */ + { reserved_block , 0 , 0 , 32, + 0xfc1c0003, 0x441c0001, 0 , 0, + 0x0 }, /* P.GP.M64~*(1) */ + { reserved_block , 0 , 0 , 32, + 0xfc1c0003, 0x441c0002, 0 , 0, + 0x0 }, /* P.GP.M64~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc1c0003, 0x441c0003, 0 , 0, + 0x0 }, /* P.GP.M64~*(3) */ +}; + + +NMD::Pool NMD::P_GP_BH[8] = { + { instruction , 0 , 0 , 32, + 0xfc1c0000, 0x44000000, &NMD::LB_GP_ , 0, + 0x0 }, /* LB[GP] */ + { instruction , 0 , 0 , 32, + 0xfc1c0000, 0x44040000, &NMD::SB_GP_ , 0, + 0x0 }, /* SB[GP] */ + { instruction , 0 , 0 , 32, + 0xfc1c0000, 0x44080000, &NMD::LBU_GP_ , 0, + 0x0 }, /* LBU[GP] */ + { instruction , 0 , 0 , 32, + 0xfc1c0000, 0x440c0000, &NMD::ADDIU_GP_B_ , 0, + 0x0 }, /* ADDIU[GP.B] */ + { pool , P_GP_LH , 2 , 32, + 0xfc1c0000, 0x44100000, 0 , 0, + 0x0 }, /* P.GP.LH */ + { pool , P_GP_SH , 2 , 32, + 0xfc1c0000, 0x44140000, 0 , 0, + 0x0 }, /* P.GP.SH */ + { pool , P_GP_CP1 , 4 , 32, + 0xfc1c0000, 0x44180000, 0 , 0, + 0x0 }, /* P.GP.CP1 */ + { pool , P_GP_M64 , 4 , 32, + 0xfc1c0000, 0x441c0000, 0 , 0, + 0x0 }, /* P.GP.M64 */ +}; + + +NMD::Pool NMD::P_LS_U12[16] = { + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x84000000, &NMD::LB_U12_ , 0, + 0x0 }, /* LB[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x84001000, &NMD::SB_U12_ , 0, + 0x0 }, /* SB[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x84002000, &NMD::LBU_U12_ , 0, + 0x0 }, /* LBU[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x84003000, &NMD::PREF_U12_ , 0, + 0x0 }, /* PREF[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x84004000, &NMD::LH_U12_ , 0, + 0x0 }, /* LH[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x84005000, &NMD::SH_U12_ , 0, + 0x0 }, /* SH[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x84006000, &NMD::LHU_U12_ , 0, + 0x0 }, /* LHU[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x84007000, &NMD::LWU_U12_ , 0, + MIPS64_ }, /* LWU[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x84008000, &NMD::LW_U12_ , 0, + 0x0 }, /* LW[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x84009000, &NMD::SW_U12_ , 0, + 0x0 }, /* SW[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x8400a000, &NMD::LWC1_U12_ , 0, + CP1_ }, /* LWC1[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x8400b000, &NMD::SWC1_U12_ , 0, + CP1_ }, /* SWC1[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x8400c000, &NMD::LD_U12_ , 0, + MIPS64_ }, /* LD[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x8400d000, &NMD::SD_U12_ , 0, + MIPS64_ }, /* SD[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x8400e000, &NMD::LDC1_U12_ , 0, + CP1_ }, /* LDC1[U12] */ + { instruction , 0 , 0 , 32, + 0xfc00f000, 0x8400f000, &NMD::SDC1_U12_ , 0, + CP1_ }, /* SDC1[U12] */ +}; + + +NMD::Pool NMD::P_PREF_S9_[2] = { + { instruction , 0 , 0 , 32, + 0xffe07f00, 0xa7e01800, &NMD::SYNCI , 0, + 0x0 }, /* SYNCI */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4001800, &NMD::PREF_S9_ , &NMD::PREF_S9__cond , + 0x0 }, /* PREF[S9] */ +}; + + +NMD::Pool NMD::P_LS_S0[16] = { + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4000000, &NMD::LB_S9_ , 0, + 0x0 }, /* LB[S9] */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4000800, &NMD::SB_S9_ , 0, + 0x0 }, /* SB[S9] */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4001000, &NMD::LBU_S9_ , 0, + 0x0 }, /* LBU[S9] */ + { pool , P_PREF_S9_ , 2 , 32, + 0xfc007f00, 0xa4001800, 0 , 0, + 0x0 }, /* P.PREF[S9] */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4002000, &NMD::LH_S9_ , 0, + 0x0 }, /* LH[S9] */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4002800, &NMD::SH_S9_ , 0, + 0x0 }, /* SH[S9] */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4003000, &NMD::LHU_S9_ , 0, + 0x0 }, /* LHU[S9] */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4003800, &NMD::LWU_S9_ , 0, + MIPS64_ }, /* LWU[S9] */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4004000, &NMD::LW_S9_ , 0, + 0x0 }, /* LW[S9] */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4004800, &NMD::SW_S9_ , 0, + 0x0 }, /* SW[S9] */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4005000, &NMD::LWC1_S9_ , 0, + CP1_ }, /* LWC1[S9] */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4005800, &NMD::SWC1_S9_ , 0, + CP1_ }, /* SWC1[S9] */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4006000, &NMD::LD_S9_ , 0, + MIPS64_ }, /* LD[S9] */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4006800, &NMD::SD_S9_ , 0, + MIPS64_ }, /* SD[S9] */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4007000, &NMD::LDC1_S9_ , 0, + CP1_ }, /* LDC1[S9] */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4007800, &NMD::SDC1_S9_ , 0, + CP1_ }, /* SDC1[S9] */ +}; + + +NMD::Pool NMD::ASET_ACLR[2] = { + { instruction , 0 , 0 , 32, + 0xfe007f00, 0xa4001100, &NMD::ASET , 0, + MCU_ }, /* ASET */ + { instruction , 0 , 0 , 32, + 0xfe007f00, 0xa6001100, &NMD::ACLR , 0, + MCU_ }, /* ACLR */ +}; + + +NMD::Pool NMD::P_LL[4] = { + { instruction , 0 , 0 , 32, + 0xfc007f03, 0xa4005100, &NMD::LL , 0, + 0x0 }, /* LL */ + { instruction , 0 , 0 , 32, + 0xfc007f03, 0xa4005101, &NMD::LLWP , 0, + XNP_ }, /* LLWP */ + { reserved_block , 0 , 0 , 32, + 0xfc007f03, 0xa4005102, 0 , 0, + 0x0 }, /* P.LL~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f03, 0xa4005103, 0 , 0, + 0x0 }, /* P.LL~*(3) */ +}; + + +NMD::Pool NMD::P_SC[4] = { + { instruction , 0 , 0 , 32, + 0xfc007f03, 0xa4005900, &NMD::SC , 0, + 0x0 }, /* SC */ + { instruction , 0 , 0 , 32, + 0xfc007f03, 0xa4005901, &NMD::SCWP , 0, + XNP_ }, /* SCWP */ + { reserved_block , 0 , 0 , 32, + 0xfc007f03, 0xa4005902, 0 , 0, + 0x0 }, /* P.SC~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f03, 0xa4005903, 0 , 0, + 0x0 }, /* P.SC~*(3) */ +}; + + +NMD::Pool NMD::P_LLD[8] = { + { instruction , 0 , 0 , 32, + 0xfc007f07, 0xa4007100, &NMD::LLD , 0, + MIPS64_ }, /* LLD */ + { instruction , 0 , 0 , 32, + 0xfc007f07, 0xa4007101, &NMD::LLDP , 0, + MIPS64_ }, /* LLDP */ + { reserved_block , 0 , 0 , 32, + 0xfc007f07, 0xa4007102, 0 , 0, + 0x0 }, /* P.LLD~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f07, 0xa4007103, 0 , 0, + 0x0 }, /* P.LLD~*(3) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f07, 0xa4007104, 0 , 0, + 0x0 }, /* P.LLD~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f07, 0xa4007105, 0 , 0, + 0x0 }, /* P.LLD~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f07, 0xa4007106, 0 , 0, + 0x0 }, /* P.LLD~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f07, 0xa4007107, 0 , 0, + 0x0 }, /* P.LLD~*(7) */ +}; + + +NMD::Pool NMD::P_SCD[8] = { + { instruction , 0 , 0 , 32, + 0xfc007f07, 0xa4007900, &NMD::SCD , 0, + MIPS64_ }, /* SCD */ + { instruction , 0 , 0 , 32, + 0xfc007f07, 0xa4007901, &NMD::SCDP , 0, + MIPS64_ }, /* SCDP */ + { reserved_block , 0 , 0 , 32, + 0xfc007f07, 0xa4007902, 0 , 0, + 0x0 }, /* P.SCD~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f07, 0xa4007903, 0 , 0, + 0x0 }, /* P.SCD~*(3) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f07, 0xa4007904, 0 , 0, + 0x0 }, /* P.SCD~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f07, 0xa4007905, 0 , 0, + 0x0 }, /* P.SCD~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f07, 0xa4007906, 0 , 0, + 0x0 }, /* P.SCD~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f07, 0xa4007907, 0 , 0, + 0x0 }, /* P.SCD~*(7) */ +}; + + +NMD::Pool NMD::P_LS_S1[16] = { + { reserved_block , 0 , 0 , 32, + 0xfc007f00, 0xa4000100, 0 , 0, + 0x0 }, /* P.LS.S1~*(0) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f00, 0xa4000900, 0 , 0, + 0x0 }, /* P.LS.S1~*(1) */ + { pool , ASET_ACLR , 2 , 32, + 0xfc007f00, 0xa4001100, 0 , 0, + 0x0 }, /* ASET_ACLR */ + { reserved_block , 0 , 0 , 32, + 0xfc007f00, 0xa4001900, 0 , 0, + 0x0 }, /* P.LS.S1~*(3) */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4002100, &NMD::UALH , 0, + XMMS_ }, /* UALH */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4002900, &NMD::UASH , 0, + XMMS_ }, /* UASH */ + { reserved_block , 0 , 0 , 32, + 0xfc007f00, 0xa4003100, 0 , 0, + 0x0 }, /* P.LS.S1~*(6) */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4003900, &NMD::CACHE , 0, + CP0_ }, /* CACHE */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4004100, &NMD::LWC2 , 0, + CP2_ }, /* LWC2 */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4004900, &NMD::SWC2 , 0, + CP2_ }, /* SWC2 */ + { pool , P_LL , 4 , 32, + 0xfc007f00, 0xa4005100, 0 , 0, + 0x0 }, /* P.LL */ + { pool , P_SC , 4 , 32, + 0xfc007f00, 0xa4005900, 0 , 0, + 0x0 }, /* P.SC */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4006100, &NMD::LDC2 , 0, + CP2_ }, /* LDC2 */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4006900, &NMD::SDC2 , 0, + CP2_ }, /* SDC2 */ + { pool , P_LLD , 8 , 32, + 0xfc007f00, 0xa4007100, 0 , 0, + 0x0 }, /* P.LLD */ + { pool , P_SCD , 8 , 32, + 0xfc007f00, 0xa4007900, 0 , 0, + 0x0 }, /* P.SCD */ +}; + + +NMD::Pool NMD::P_PREFE[2] = { + { instruction , 0 , 0 , 32, + 0xffe07f00, 0xa7e01a00, &NMD::SYNCIE , 0, + CP0_ | EVA_ }, /* SYNCIE */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4001a00, &NMD::PREFE , &NMD::PREFE_cond , + CP0_ | EVA_ }, /* PREFE */ +}; + + +NMD::Pool NMD::P_LLE[4] = { + { instruction , 0 , 0 , 32, + 0xfc007f03, 0xa4005200, &NMD::LLE , 0, + CP0_ | EVA_ }, /* LLE */ + { instruction , 0 , 0 , 32, + 0xfc007f03, 0xa4005201, &NMD::LLWPE , 0, + CP0_ | EVA_ }, /* LLWPE */ + { reserved_block , 0 , 0 , 32, + 0xfc007f03, 0xa4005202, 0 , 0, + 0x0 }, /* P.LLE~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f03, 0xa4005203, 0 , 0, + 0x0 }, /* P.LLE~*(3) */ +}; + + +NMD::Pool NMD::P_SCE[4] = { + { instruction , 0 , 0 , 32, + 0xfc007f03, 0xa4005a00, &NMD::SCE , 0, + CP0_ | EVA_ }, /* SCE */ + { instruction , 0 , 0 , 32, + 0xfc007f03, 0xa4005a01, &NMD::SCWPE , 0, + CP0_ | EVA_ }, /* SCWPE */ + { reserved_block , 0 , 0 , 32, + 0xfc007f03, 0xa4005a02, 0 , 0, + 0x0 }, /* P.SCE~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f03, 0xa4005a03, 0 , 0, + 0x0 }, /* P.SCE~*(3) */ +}; + + +NMD::Pool NMD::P_LS_E0[16] = { + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4000200, &NMD::LBE , 0, + CP0_ | EVA_ }, /* LBE */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4000a00, &NMD::SBE , 0, + CP0_ | EVA_ }, /* SBE */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4001200, &NMD::LBUE , 0, + CP0_ | EVA_ }, /* LBUE */ + { pool , P_PREFE , 2 , 32, + 0xfc007f00, 0xa4001a00, 0 , 0, + 0x0 }, /* P.PREFE */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4002200, &NMD::LHE , 0, + CP0_ | EVA_ }, /* LHE */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4002a00, &NMD::SHE , 0, + CP0_ | EVA_ }, /* SHE */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4003200, &NMD::LHUE , 0, + CP0_ | EVA_ }, /* LHUE */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4003a00, &NMD::CACHEE , 0, + CP0_ | EVA_ }, /* CACHEE */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4004200, &NMD::LWE , 0, + CP0_ | EVA_ }, /* LWE */ + { instruction , 0 , 0 , 32, + 0xfc007f00, 0xa4004a00, &NMD::SWE , 0, + CP0_ | EVA_ }, /* SWE */ + { pool , P_LLE , 4 , 32, + 0xfc007f00, 0xa4005200, 0 , 0, + 0x0 }, /* P.LLE */ + { pool , P_SCE , 4 , 32, + 0xfc007f00, 0xa4005a00, 0 , 0, + 0x0 }, /* P.SCE */ + { reserved_block , 0 , 0 , 32, + 0xfc007f00, 0xa4006200, 0 , 0, + 0x0 }, /* P.LS.E0~*(12) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f00, 0xa4006a00, 0 , 0, + 0x0 }, /* P.LS.E0~*(13) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f00, 0xa4007200, 0 , 0, + 0x0 }, /* P.LS.E0~*(14) */ + { reserved_block , 0 , 0 , 32, + 0xfc007f00, 0xa4007a00, 0 , 0, + 0x0 }, /* P.LS.E0~*(15) */ +}; + + +NMD::Pool NMD::P_LS_WM[2] = { + { instruction , 0 , 0 , 32, + 0xfc000f00, 0xa4000400, &NMD::LWM , 0, + XMMS_ }, /* LWM */ + { instruction , 0 , 0 , 32, + 0xfc000f00, 0xa4000c00, &NMD::SWM , 0, + XMMS_ }, /* SWM */ +}; + + +NMD::Pool NMD::P_LS_UAWM[2] = { + { instruction , 0 , 0 , 32, + 0xfc000f00, 0xa4000500, &NMD::UALWM , 0, + XMMS_ }, /* UALWM */ + { instruction , 0 , 0 , 32, + 0xfc000f00, 0xa4000d00, &NMD::UASWM , 0, + XMMS_ }, /* UASWM */ +}; + + +NMD::Pool NMD::P_LS_DM[2] = { + { instruction , 0 , 0 , 32, + 0xfc000f00, 0xa4000600, &NMD::LDM , 0, + MIPS64_ }, /* LDM */ + { instruction , 0 , 0 , 32, + 0xfc000f00, 0xa4000e00, &NMD::SDM , 0, + MIPS64_ }, /* SDM */ +}; + + +NMD::Pool NMD::P_LS_UADM[2] = { + { instruction , 0 , 0 , 32, + 0xfc000f00, 0xa4000700, &NMD::UALDM , 0, + MIPS64_ }, /* UALDM */ + { instruction , 0 , 0 , 32, + 0xfc000f00, 0xa4000f00, &NMD::UASDM , 0, + MIPS64_ }, /* UASDM */ +}; + + +NMD::Pool NMD::P_LS_S9[8] = { + { pool , P_LS_S0 , 16 , 32, + 0xfc000700, 0xa4000000, 0 , 0, + 0x0 }, /* P.LS.S0 */ + { pool , P_LS_S1 , 16 , 32, + 0xfc000700, 0xa4000100, 0 , 0, + 0x0 }, /* P.LS.S1 */ + { pool , P_LS_E0 , 16 , 32, + 0xfc000700, 0xa4000200, 0 , 0, + 0x0 }, /* P.LS.E0 */ + { reserved_block , 0 , 0 , 32, + 0xfc000700, 0xa4000300, 0 , 0, + 0x0 }, /* P.LS.S9~*(3) */ + { pool , P_LS_WM , 2 , 32, + 0xfc000700, 0xa4000400, 0 , 0, + 0x0 }, /* P.LS.WM */ + { pool , P_LS_UAWM , 2 , 32, + 0xfc000700, 0xa4000500, 0 , 0, + 0x0 }, /* P.LS.UAWM */ + { pool , P_LS_DM , 2 , 32, + 0xfc000700, 0xa4000600, 0 , 0, + 0x0 }, /* P.LS.DM */ + { pool , P_LS_UADM , 2 , 32, + 0xfc000700, 0xa4000700, 0 , 0, + 0x0 }, /* P.LS.UADM */ +}; + + +NMD::Pool NMD::P_BAL[2] = { + { branch_instruction , 0 , 0 , 32, + 0xfe000000, 0x28000000, &NMD::BC_32_ , 0, + 0x0 }, /* BC[32] */ + { call_instruction , 0 , 0 , 32, + 0xfe000000, 0x2a000000, &NMD::BALC_32_ , 0, + 0x0 }, /* BALC[32] */ +}; + + +NMD::Pool NMD::P_BALRSC[2] = { + { branch_instruction , 0 , 0 , 32, + 0xffe0f000, 0x48008000, &NMD::BRSC , 0, + 0x0 }, /* BRSC */ + { call_instruction , 0 , 0 , 32, + 0xfc00f000, 0x48008000, &NMD::BALRSC , &NMD::BALRSC_cond , + 0x0 }, /* BALRSC */ +}; + + +NMD::Pool NMD::P_J[16] = { + { call_instruction , 0 , 0 , 32, + 0xfc00f000, 0x48000000, &NMD::JALRC_32_ , 0, + 0x0 }, /* JALRC[32] */ + { call_instruction , 0 , 0 , 32, + 0xfc00f000, 0x48001000, &NMD::JALRC_HB , 0, + 0x0 }, /* JALRC.HB */ + { reserved_block , 0 , 0 , 32, + 0xfc00f000, 0x48002000, 0 , 0, + 0x0 }, /* P.J~*(2) */ + { reserved_block , 0 , 0 , 32, + 0xfc00f000, 0x48003000, 0 , 0, + 0x0 }, /* P.J~*(3) */ + { reserved_block , 0 , 0 , 32, + 0xfc00f000, 0x48004000, 0 , 0, + 0x0 }, /* P.J~*(4) */ + { reserved_block , 0 , 0 , 32, + 0xfc00f000, 0x48005000, 0 , 0, + 0x0 }, /* P.J~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc00f000, 0x48006000, 0 , 0, + 0x0 }, /* P.J~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc00f000, 0x48007000, 0 , 0, + 0x0 }, /* P.J~*(7) */ + { pool , P_BALRSC , 2 , 32, + 0xfc00f000, 0x48008000, 0 , 0, + 0x0 }, /* P.BALRSC */ + { reserved_block , 0 , 0 , 32, + 0xfc00f000, 0x48009000, 0 , 0, + 0x0 }, /* P.J~*(9) */ + { reserved_block , 0 , 0 , 32, + 0xfc00f000, 0x4800a000, 0 , 0, + 0x0 }, /* P.J~*(10) */ + { reserved_block , 0 , 0 , 32, + 0xfc00f000, 0x4800b000, 0 , 0, + 0x0 }, /* P.J~*(11) */ + { reserved_block , 0 , 0 , 32, + 0xfc00f000, 0x4800c000, 0 , 0, + 0x0 }, /* P.J~*(12) */ + { reserved_block , 0 , 0 , 32, + 0xfc00f000, 0x4800d000, 0 , 0, + 0x0 }, /* P.J~*(13) */ + { reserved_block , 0 , 0 , 32, + 0xfc00f000, 0x4800e000, 0 , 0, + 0x0 }, /* P.J~*(14) */ + { reserved_block , 0 , 0 , 32, + 0xfc00f000, 0x4800f000, 0 , 0, + 0x0 }, /* P.J~*(15) */ +}; + + +NMD::Pool NMD::P_BR3A[32] = { + { branch_instruction , 0 , 0 , 32, + 0xfc1fc000, 0x88004000, &NMD::BC1EQZC , 0, + CP1_ }, /* BC1EQZC */ + { branch_instruction , 0 , 0 , 32, + 0xfc1fc000, 0x88014000, &NMD::BC1NEZC , 0, + CP1_ }, /* BC1NEZC */ + { branch_instruction , 0 , 0 , 32, + 0xfc1fc000, 0x88024000, &NMD::BC2EQZC , 0, + CP2_ }, /* BC2EQZC */ + { branch_instruction , 0 , 0 , 32, + 0xfc1fc000, 0x88034000, &NMD::BC2NEZC , 0, + CP2_ }, /* BC2NEZC */ + { branch_instruction , 0 , 0 , 32, + 0xfc1fc000, 0x88044000, &NMD::BPOSGE32C , 0, + DSP_ }, /* BPOSGE32C */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x88054000, 0 , 0, + 0x0 }, /* P.BR3A~*(5) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x88064000, 0 , 0, + 0x0 }, /* P.BR3A~*(6) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x88074000, 0 , 0, + 0x0 }, /* P.BR3A~*(7) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x88084000, 0 , 0, + 0x0 }, /* P.BR3A~*(8) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x88094000, 0 , 0, + 0x0 }, /* P.BR3A~*(9) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x880a4000, 0 , 0, + 0x0 }, /* P.BR3A~*(10) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x880b4000, 0 , 0, + 0x0 }, /* P.BR3A~*(11) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x880c4000, 0 , 0, + 0x0 }, /* P.BR3A~*(12) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x880d4000, 0 , 0, + 0x0 }, /* P.BR3A~*(13) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x880e4000, 0 , 0, + 0x0 }, /* P.BR3A~*(14) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x880f4000, 0 , 0, + 0x0 }, /* P.BR3A~*(15) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x88104000, 0 , 0, + 0x0 }, /* P.BR3A~*(16) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x88114000, 0 , 0, + 0x0 }, /* P.BR3A~*(17) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x88124000, 0 , 0, + 0x0 }, /* P.BR3A~*(18) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x88134000, 0 , 0, + 0x0 }, /* P.BR3A~*(19) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x88144000, 0 , 0, + 0x0 }, /* P.BR3A~*(20) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x88154000, 0 , 0, + 0x0 }, /* P.BR3A~*(21) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x88164000, 0 , 0, + 0x0 }, /* P.BR3A~*(22) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x88174000, 0 , 0, + 0x0 }, /* P.BR3A~*(23) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x88184000, 0 , 0, + 0x0 }, /* P.BR3A~*(24) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x88194000, 0 , 0, + 0x0 }, /* P.BR3A~*(25) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x881a4000, 0 , 0, + 0x0 }, /* P.BR3A~*(26) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x881b4000, 0 , 0, + 0x0 }, /* P.BR3A~*(27) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x881c4000, 0 , 0, + 0x0 }, /* P.BR3A~*(28) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x881d4000, 0 , 0, + 0x0 }, /* P.BR3A~*(29) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x881e4000, 0 , 0, + 0x0 }, /* P.BR3A~*(30) */ + { reserved_block , 0 , 0 , 32, + 0xfc1fc000, 0x881f4000, 0 , 0, + 0x0 }, /* P.BR3A~*(31) */ +}; + + +NMD::Pool NMD::P_BR1[4] = { + { branch_instruction , 0 , 0 , 32, + 0xfc00c000, 0x88000000, &NMD::BEQC_32_ , 0, + 0x0 }, /* BEQC[32] */ + { pool , P_BR3A , 32 , 32, + 0xfc00c000, 0x88004000, 0 , 0, + 0x0 }, /* P.BR3A */ + { branch_instruction , 0 , 0 , 32, + 0xfc00c000, 0x88008000, &NMD::BGEC , 0, + 0x0 }, /* BGEC */ + { branch_instruction , 0 , 0 , 32, + 0xfc00c000, 0x8800c000, &NMD::BGEUC , 0, + 0x0 }, /* BGEUC */ +}; + + +NMD::Pool NMD::P_BR2[4] = { + { branch_instruction , 0 , 0 , 32, + 0xfc00c000, 0xa8000000, &NMD::BNEC_32_ , 0, + 0x0 }, /* BNEC[32] */ + { reserved_block , 0 , 0 , 32, + 0xfc00c000, 0xa8004000, 0 , 0, + 0x0 }, /* P.BR2~*(1) */ + { branch_instruction , 0 , 0 , 32, + 0xfc00c000, 0xa8008000, &NMD::BLTC , 0, + 0x0 }, /* BLTC */ + { branch_instruction , 0 , 0 , 32, + 0xfc00c000, 0xa800c000, &NMD::BLTUC , 0, + 0x0 }, /* BLTUC */ +}; + + +NMD::Pool NMD::P_BRI[8] = { + { branch_instruction , 0 , 0 , 32, + 0xfc1c0000, 0xc8000000, &NMD::BEQIC , 0, + 0x0 }, /* BEQIC */ + { branch_instruction , 0 , 0 , 32, + 0xfc1c0000, 0xc8040000, &NMD::BBEQZC , 0, + XMMS_ }, /* BBEQZC */ + { branch_instruction , 0 , 0 , 32, + 0xfc1c0000, 0xc8080000, &NMD::BGEIC , 0, + 0x0 }, /* BGEIC */ + { branch_instruction , 0 , 0 , 32, + 0xfc1c0000, 0xc80c0000, &NMD::BGEIUC , 0, + 0x0 }, /* BGEIUC */ + { branch_instruction , 0 , 0 , 32, + 0xfc1c0000, 0xc8100000, &NMD::BNEIC , 0, + 0x0 }, /* BNEIC */ + { branch_instruction , 0 , 0 , 32, + 0xfc1c0000, 0xc8140000, &NMD::BBNEZC , 0, + XMMS_ }, /* BBNEZC */ + { branch_instruction , 0 , 0 , 32, + 0xfc1c0000, 0xc8180000, &NMD::BLTIC , 0, + 0x0 }, /* BLTIC */ + { branch_instruction , 0 , 0 , 32, + 0xfc1c0000, 0xc81c0000, &NMD::BLTIUC , 0, + 0x0 }, /* BLTIUC */ +}; + + +NMD::Pool NMD::P32[32] = { + { pool , P_ADDIU , 2 , 32, + 0xfc000000, 0x00000000, 0 , 0, + 0x0 }, /* P.ADDIU */ + { pool , P32A , 8 , 32, + 0xfc000000, 0x20000000, 0 , 0, + 0x0 }, /* P32A */ + { pool , P_GP_W , 4 , 32, + 0xfc000000, 0x40000000, 0 , 0, + 0x0 }, /* P.GP.W */ + { pool , POOL48I , 32 , 48, + 0xfc0000000000ull, 0x600000000000ull, 0 , 0, + 0x0 }, /* POOL48I */ + { pool , P_U12 , 16 , 32, + 0xfc000000, 0x80000000, 0 , 0, + 0x0 }, /* P.U12 */ + { pool , POOL32F , 8 , 32, + 0xfc000000, 0xa0000000, 0 , 0, + CP1_ }, /* POOL32F */ + { pool , POOL32S , 8 , 32, + 0xfc000000, 0xc0000000, 0 , 0, + 0x0 }, /* POOL32S */ + { pool , P_LUI , 2 , 32, + 0xfc000000, 0xe0000000, 0 , 0, + 0x0 }, /* P.LUI */ + { instruction , 0 , 0 , 32, + 0xfc000000, 0x04000000, &NMD::ADDIUPC_32_ , 0, + 0x0 }, /* ADDIUPC[32] */ + { reserved_block , 0 , 0 , 32, + 0xfc000000, 0x24000000, 0 , 0, + 0x0 }, /* P32~*(5) */ + { pool , P_GP_BH , 8 , 32, + 0xfc000000, 0x44000000, 0 , 0, + 0x0 }, /* P.GP.BH */ + { reserved_block , 0 , 0 , 32, + 0xfc000000, 0x64000000, 0 , 0, + 0x0 }, /* P32~*(13) */ + { pool , P_LS_U12 , 16 , 32, + 0xfc000000, 0x84000000, 0 , 0, + 0x0 }, /* P.LS.U12 */ + { pool , P_LS_S9 , 8 , 32, + 0xfc000000, 0xa4000000, 0 , 0, + 0x0 }, /* P.LS.S9 */ + { reserved_block , 0 , 0 , 32, + 0xfc000000, 0xc4000000, 0 , 0, + 0x0 }, /* P32~*(25) */ + { reserved_block , 0 , 0 , 32, + 0xfc000000, 0xe4000000, 0 , 0, + 0x0 }, /* P32~*(29) */ + { call_instruction , 0 , 0 , 32, + 0xfc000000, 0x08000000, &NMD::MOVE_BALC , 0, + XMMS_ }, /* MOVE.BALC */ + { pool , P_BAL , 2 , 32, + 0xfc000000, 0x28000000, 0 , 0, + 0x0 }, /* P.BAL */ + { pool , P_J , 16 , 32, + 0xfc000000, 0x48000000, 0 , 0, + 0x0 }, /* P.J */ + { reserved_block , 0 , 0 , 32, + 0xfc000000, 0x68000000, 0 , 0, + 0x0 }, /* P32~*(14) */ + { pool , P_BR1 , 4 , 32, + 0xfc000000, 0x88000000, 0 , 0, + 0x0 }, /* P.BR1 */ + { pool , P_BR2 , 4 , 32, + 0xfc000000, 0xa8000000, 0 , 0, + 0x0 }, /* P.BR2 */ + { pool , P_BRI , 8 , 32, + 0xfc000000, 0xc8000000, 0 , 0, + 0x0 }, /* P.BRI */ + { reserved_block , 0 , 0 , 32, + 0xfc000000, 0xe8000000, 0 , 0, + 0x0 }, /* P32~*(30) */ + { reserved_block , 0 , 0 , 32, + 0xfc000000, 0x0c000000, 0 , 0, + 0x0 }, /* P32~*(3) */ + { reserved_block , 0 , 0 , 32, + 0xfc000000, 0x2c000000, 0 , 0, + 0x0 }, /* P32~*(7) */ + { reserved_block , 0 , 0 , 32, + 0xfc000000, 0x4c000000, 0 , 0, + 0x0 }, /* P32~*(11) */ + { reserved_block , 0 , 0 , 32, + 0xfc000000, 0x6c000000, 0 , 0, + 0x0 }, /* P32~*(15) */ + { reserved_block , 0 , 0 , 32, + 0xfc000000, 0x8c000000, 0 , 0, + 0x0 }, /* P32~*(19) */ + { reserved_block , 0 , 0 , 32, + 0xfc000000, 0xac000000, 0 , 0, + 0x0 }, /* P32~*(23) */ + { reserved_block , 0 , 0 , 32, + 0xfc000000, 0xcc000000, 0 , 0, + 0x0 }, /* P32~*(27) */ + { reserved_block , 0 , 0 , 32, + 0xfc000000, 0xec000000, 0 , 0, + 0x0 }, /* P32~*(31) */ +}; + + +NMD::Pool NMD::P16_SYSCALL[2] = { + { instruction , 0 , 0 , 16, + 0xfffc , 0x1008 , &NMD::SYSCALL_16_ , 0, + 0x0 }, /* SYSCALL[16] */ + { instruction , 0 , 0 , 16, + 0xfffc , 0x100c , &NMD::HYPCALL_16_ , 0, + CP0_ | VZ_ }, /* HYPCALL[16] */ +}; + + +NMD::Pool NMD::P16_RI[4] = { + { reserved_block , 0 , 0 , 16, + 0xfff8 , 0x1000 , 0 , 0, + 0x0 }, /* P16.RI~*(0) */ + { pool , P16_SYSCALL , 2 , 16, + 0xfff8 , 0x1008 , 0 , 0, + 0x0 }, /* P16.SYSCALL */ + { instruction , 0 , 0 , 16, + 0xfff8 , 0x1010 , &NMD::BREAK_16_ , 0, + 0x0 }, /* BREAK[16] */ + { instruction , 0 , 0 , 16, + 0xfff8 , 0x1018 , &NMD::SDBBP_16_ , 0, + EJTAG_ }, /* SDBBP[16] */ +}; + + +NMD::Pool NMD::P16_MV[2] = { + { pool , P16_RI , 4 , 16, + 0xffe0 , 0x1000 , 0 , 0, + 0x0 }, /* P16.RI */ + { instruction , 0 , 0 , 16, + 0xfc00 , 0x1000 , &NMD::MOVE , &NMD::MOVE_cond , + 0x0 }, /* MOVE */ +}; + + +NMD::Pool NMD::P16_SHIFT[2] = { + { instruction , 0 , 0 , 16, + 0xfc08 , 0x3000 , &NMD::SLL_16_ , 0, + 0x0 }, /* SLL[16] */ + { instruction , 0 , 0 , 16, + 0xfc08 , 0x3008 , &NMD::SRL_16_ , 0, + 0x0 }, /* SRL[16] */ +}; + + +NMD::Pool NMD::POOL16C_00[4] = { + { instruction , 0 , 0 , 16, + 0xfc0f , 0x5000 , &NMD::NOT_16_ , 0, + 0x0 }, /* NOT[16] */ + { instruction , 0 , 0 , 16, + 0xfc0f , 0x5004 , &NMD::XOR_16_ , 0, + 0x0 }, /* XOR[16] */ + { instruction , 0 , 0 , 16, + 0xfc0f , 0x5008 , &NMD::AND_16_ , 0, + 0x0 }, /* AND[16] */ + { instruction , 0 , 0 , 16, + 0xfc0f , 0x500c , &NMD::OR_16_ , 0, + 0x0 }, /* OR[16] */ +}; + + +NMD::Pool NMD::POOL16C_0[2] = { + { pool , POOL16C_00 , 4 , 16, + 0xfc03 , 0x5000 , 0 , 0, + 0x0 }, /* POOL16C_00 */ + { reserved_block , 0 , 0 , 16, + 0xfc03 , 0x5002 , 0 , 0, + 0x0 }, /* POOL16C_0~*(1) */ +}; + + +NMD::Pool NMD::P16C[2] = { + { pool , POOL16C_0 , 2 , 16, + 0xfc01 , 0x5000 , 0 , 0, + 0x0 }, /* POOL16C_0 */ + { instruction , 0 , 0 , 16, + 0xfc01 , 0x5001 , &NMD::LWXS_16_ , 0, + 0x0 }, /* LWXS[16] */ +}; + + +NMD::Pool NMD::P16_A1[2] = { + { reserved_block , 0 , 0 , 16, + 0xfc40 , 0x7000 , 0 , 0, + 0x0 }, /* P16.A1~*(0) */ + { instruction , 0 , 0 , 16, + 0xfc40 , 0x7040 , &NMD::ADDIU_R1_SP_ , 0, + 0x0 }, /* ADDIU[R1.SP] */ +}; + + +NMD::Pool NMD::P_ADDIU_RS5_[2] = { + { instruction , 0 , 0 , 16, + 0xffe8 , 0x9008 , &NMD::NOP_16_ , 0, + 0x0 }, /* NOP[16] */ + { instruction , 0 , 0 , 16, + 0xfc08 , 0x9008 , &NMD::ADDIU_RS5_ , &NMD::ADDIU_RS5__cond , + 0x0 }, /* ADDIU[RS5] */ +}; + + +NMD::Pool NMD::P16_A2[2] = { + { instruction , 0 , 0 , 16, + 0xfc08 , 0x9000 , &NMD::ADDIU_R2_ , 0, + 0x0 }, /* ADDIU[R2] */ + { pool , P_ADDIU_RS5_ , 2 , 16, + 0xfc08 , 0x9008 , 0 , 0, + 0x0 }, /* P.ADDIU[RS5] */ +}; + + +NMD::Pool NMD::P16_ADDU[2] = { + { instruction , 0 , 0 , 16, + 0xfc01 , 0xb000 , &NMD::ADDU_16_ , 0, + 0x0 }, /* ADDU[16] */ + { instruction , 0 , 0 , 16, + 0xfc01 , 0xb001 , &NMD::SUBU_16_ , 0, + 0x0 }, /* SUBU[16] */ +}; + + +NMD::Pool NMD::P16_JRC[2] = { + { branch_instruction , 0 , 0 , 16, + 0xfc1f , 0xd800 , &NMD::JRC , 0, + 0x0 }, /* JRC */ + { call_instruction , 0 , 0 , 16, + 0xfc1f , 0xd810 , &NMD::JALRC_16_ , 0, + 0x0 }, /* JALRC[16] */ +}; + + +NMD::Pool NMD::P16_BR1[2] = { + { branch_instruction , 0 , 0 , 16, + 0xfc00 , 0xd800 , &NMD::BEQC_16_ , &NMD::BEQC_16__cond , + XMMS_ }, /* BEQC[16] */ + { branch_instruction , 0 , 0 , 16, + 0xfc00 , 0xd800 , &NMD::BNEC_16_ , &NMD::BNEC_16__cond , + XMMS_ }, /* BNEC[16] */ +}; + + +NMD::Pool NMD::P16_BR[2] = { + { pool , P16_JRC , 2 , 16, + 0xfc0f , 0xd800 , 0 , 0, + 0x0 }, /* P16.JRC */ + { pool , P16_BR1 , 2 , 16, + 0xfc00 , 0xd800 , 0 , &NMD::P16_BR1_cond , + 0x0 }, /* P16.BR1 */ +}; + + +NMD::Pool NMD::P16_SR[2] = { + { instruction , 0 , 0 , 16, + 0xfd00 , 0x1c00 , &NMD::SAVE_16_ , 0, + 0x0 }, /* SAVE[16] */ + { return_instruction , 0 , 0 , 16, + 0xfd00 , 0x1d00 , &NMD::RESTORE_JRC_16_ , 0, + 0x0 }, /* RESTORE.JRC[16] */ +}; + + +NMD::Pool NMD::P16_4X4[4] = { + { instruction , 0 , 0 , 16, + 0xfd08 , 0x3c00 , &NMD::ADDU_4X4_ , 0, + XMMS_ }, /* ADDU[4X4] */ + { instruction , 0 , 0 , 16, + 0xfd08 , 0x3c08 , &NMD::MUL_4X4_ , 0, + XMMS_ }, /* MUL[4X4] */ + { reserved_block , 0 , 0 , 16, + 0xfd08 , 0x3d00 , 0 , 0, + 0x0 }, /* P16.4X4~*(2) */ + { reserved_block , 0 , 0 , 16, + 0xfd08 , 0x3d08 , 0 , 0, + 0x0 }, /* P16.4X4~*(3) */ +}; + + +NMD::Pool NMD::P16_LB[4] = { + { instruction , 0 , 0 , 16, + 0xfc0c , 0x5c00 , &NMD::LB_16_ , 0, + 0x0 }, /* LB[16] */ + { instruction , 0 , 0 , 16, + 0xfc0c , 0x5c04 , &NMD::SB_16_ , 0, + 0x0 }, /* SB[16] */ + { instruction , 0 , 0 , 16, + 0xfc0c , 0x5c08 , &NMD::LBU_16_ , 0, + 0x0 }, /* LBU[16] */ + { reserved_block , 0 , 0 , 16, + 0xfc0c , 0x5c0c , 0 , 0, + 0x0 }, /* P16.LB~*(3) */ +}; + + +NMD::Pool NMD::P16_LH[4] = { + { instruction , 0 , 0 , 16, + 0xfc09 , 0x7c00 , &NMD::LH_16_ , 0, + 0x0 }, /* LH[16] */ + { instruction , 0 , 0 , 16, + 0xfc09 , 0x7c01 , &NMD::SH_16_ , 0, + 0x0 }, /* SH[16] */ + { instruction , 0 , 0 , 16, + 0xfc09 , 0x7c08 , &NMD::LHU_16_ , 0, + 0x0 }, /* LHU[16] */ + { reserved_block , 0 , 0 , 16, + 0xfc09 , 0x7c09 , 0 , 0, + 0x0 }, /* P16.LH~*(3) */ +}; + + +NMD::Pool NMD::P16[32] = { + { pool , P16_MV , 2 , 16, + 0xfc00 , 0x1000 , 0 , 0, + 0x0 }, /* P16.MV */ + { pool , P16_SHIFT , 2 , 16, + 0xfc00 , 0x3000 , 0 , 0, + 0x0 }, /* P16.SHIFT */ + { pool , P16C , 2 , 16, + 0xfc00 , 0x5000 , 0 , 0, + 0x0 }, /* P16C */ + { pool , P16_A1 , 2 , 16, + 0xfc00 , 0x7000 , 0 , 0, + 0x0 }, /* P16.A1 */ + { pool , P16_A2 , 2 , 16, + 0xfc00 , 0x9000 , 0 , 0, + 0x0 }, /* P16.A2 */ + { pool , P16_ADDU , 2 , 16, + 0xfc00 , 0xb000 , 0 , 0, + 0x0 }, /* P16.ADDU */ + { instruction , 0 , 0 , 16, + 0xfc00 , 0xd000 , &NMD::LI_16_ , 0, + 0x0 }, /* LI[16] */ + { instruction , 0 , 0 , 16, + 0xfc00 , 0xf000 , &NMD::ANDI_16_ , 0, + 0x0 }, /* ANDI[16] */ + { instruction , 0 , 0 , 16, + 0xfc00 , 0x1400 , &NMD::LW_16_ , 0, + 0x0 }, /* LW[16] */ + { instruction , 0 , 0 , 16, + 0xfc00 , 0x3400 , &NMD::LW_SP_ , 0, + 0x0 }, /* LW[SP] */ + { instruction , 0 , 0 , 16, + 0xfc00 , 0x5400 , &NMD::LW_GP16_ , 0, + 0x0 }, /* LW[GP16] */ + { instruction , 0 , 0 , 16, + 0xfc00 , 0x7400 , &NMD::LW_4X4_ , 0, + XMMS_ }, /* LW[4X4] */ + { instruction , 0 , 0 , 16, + 0xfc00 , 0x9400 , &NMD::SW_16_ , 0, + 0x0 }, /* SW[16] */ + { instruction , 0 , 0 , 16, + 0xfc00 , 0xb400 , &NMD::SW_SP_ , 0, + 0x0 }, /* SW[SP] */ + { instruction , 0 , 0 , 16, + 0xfc00 , 0xd400 , &NMD::SW_GP16_ , 0, + 0x0 }, /* SW[GP16] */ + { instruction , 0 , 0 , 16, + 0xfc00 , 0xf400 , &NMD::SW_4X4_ , 0, + XMMS_ }, /* SW[4X4] */ + { branch_instruction , 0 , 0 , 16, + 0xfc00 , 0x1800 , &NMD::BC_16_ , 0, + 0x0 }, /* BC[16] */ + { call_instruction , 0 , 0 , 16, + 0xfc00 , 0x3800 , &NMD::BALC_16_ , 0, + 0x0 }, /* BALC[16] */ + { reserved_block , 0 , 0 , 16, + 0xfc00 , 0x5800 , 0 , 0, + 0x0 }, /* P16~*(10) */ + { reserved_block , 0 , 0 , 16, + 0xfc00 , 0x7800 , 0 , 0, + 0x0 }, /* P16~*(14) */ + { branch_instruction , 0 , 0 , 16, + 0xfc00 , 0x9800 , &NMD::BEQZC_16_ , 0, + 0x0 }, /* BEQZC[16] */ + { branch_instruction , 0 , 0 , 16, + 0xfc00 , 0xb800 , &NMD::BNEZC_16_ , 0, + 0x0 }, /* BNEZC[16] */ + { pool , P16_BR , 2 , 16, + 0xfc00 , 0xd800 , 0 , 0, + 0x0 }, /* P16.BR */ + { reserved_block , 0 , 0 , 16, + 0xfc00 , 0xf800 , 0 , 0, + 0x0 }, /* P16~*(30) */ + { pool , P16_SR , 2 , 16, + 0xfc00 , 0x1c00 , 0 , 0, + 0x0 }, /* P16.SR */ + { pool , P16_4X4 , 4 , 16, + 0xfc00 , 0x3c00 , 0 , 0, + 0x0 }, /* P16.4X4 */ + { pool , P16_LB , 4 , 16, + 0xfc00 , 0x5c00 , 0 , 0, + 0x0 }, /* P16.LB */ + { pool , P16_LH , 4 , 16, + 0xfc00 , 0x7c00 , 0 , 0, + 0x0 }, /* P16.LH */ + { reserved_block , 0 , 0 , 16, + 0xfc00 , 0x9c00 , 0 , 0, + 0x0 }, /* P16~*(19) */ + { instruction , 0 , 0 , 16, + 0xfc00 , 0xbc00 , &NMD::MOVEP , 0, + XMMS_ }, /* MOVEP */ + { reserved_block , 0 , 0 , 16, + 0xfc00 , 0xdc00 , 0 , 0, + 0x0 }, /* P16~*(27) */ + { instruction , 0 , 0 , 16, + 0xfc00 , 0xfc00 , &NMD::MOVEP_REV_ , 0, + XMMS_ }, /* MOVEP[REV] */ +}; + + +NMD::Pool NMD::MAJOR[2] = { + { pool , P32 , 32 , 32, + 0x10000000, 0x00000000, 0 , 0, + 0x0 }, /* P32 */ + { pool , P16 , 32 , 16, + 0x1000 , 0x1000 , 0 , 0, + 0x0 }, /* P16 */ +}; diff --git a/disas/nanomips.h b/disas/nanomips.h new file mode 100644 index 0000000000..84cc9a6dfc --- /dev/null +++ b/disas/nanomips.h @@ -0,0 +1,1099 @@ +/* + * Header file for nanoMIPS disassembler component of QEMU + * + * Copyright (C) 2018 Wave Computing + * Copyright (C) 2018 Matthew Fortune <matthew.fortune@mips.com> + * Copyright (C) 2018 Aleksandar Markovic <aleksandar.markovic@wavecomp.com> + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <https://www.gnu.org/licenses/>. + */ + +#ifndef NANOMIPS_DISASSEMBLER_H +#define NANOMIPS_DISASSEMBLER_H + +#include <string> + +typedef unsigned short uint16; +typedef unsigned int uint32; +typedef long long int64; +typedef unsigned long long uint64; + +namespace img +{ + typedef unsigned long long address; +} + + +class NMD +{ +public: + + enum TABLE_ENTRY_TYPE { + instruction, + call_instruction, + branch_instruction, + return_instruction, + reserved_block, + pool, + }; + + enum TABLE_ATTRIBUTE_TYPE { + MIPS64_ = 0x00000001, + XNP_ = 0x00000002, + XMMS_ = 0x00000004, + EVA_ = 0x00000008, + DSP_ = 0x00000010, + MT_ = 0x00000020, + EJTAG_ = 0x00000040, + TLBINV_ = 0x00000080, + CP0_ = 0x00000100, + CP1_ = 0x00000200, + CP2_ = 0x00000400, + UDI_ = 0x00000800, + MCU_ = 0x00001000, + VZ_ = 0x00002000, + TLB_ = 0x00004000, + MVH_ = 0x00008000, + ALL_ATTRIBUTES = 0xffffffffull, + }; + + + NMD(img::address pc, TABLE_ATTRIBUTE_TYPE requested_instruction_categories) + : m_pc(pc) + , m_requested_instruction_categories(requested_instruction_categories) + { + } + + int Disassemble(const uint16 *data, std::string & dis, + TABLE_ENTRY_TYPE & type); + +private: + + img::address m_pc; + TABLE_ATTRIBUTE_TYPE m_requested_instruction_categories; + + typedef std::string(NMD:: *disassembly_function)(uint64 instruction); + typedef bool(NMD:: *conditional_function)(uint64 instruction); + + struct Pool { + TABLE_ENTRY_TYPE type; + struct Pool *next_table; + int next_table_size; + int instructions_size; + uint64 mask; + uint64 value; + disassembly_function disassembly; + conditional_function condition; + uint64 attributes; + }; + + uint64 extract_op_code_value(const uint16 *data, int size); + int Disassemble(const uint16 *data, std::string & dis, + TABLE_ENTRY_TYPE & type, const Pool *table, int table_size); + + uint64 renumber_registers(uint64 index, uint64 *register_list, + size_t register_list_size); + uint64 encode_gpr3(uint64 d); + uint64 encode_gpr3_store(uint64 d); + uint64 encode_rd1_from_rd(uint64 d); + uint64 encode_gpr4_zero(uint64 d); + uint64 encode_gpr4(uint64 d); + uint64 encode_rd2_reg1(uint64 d); + uint64 encode_rd2_reg2(uint64 d); + + uint64 copy(uint64 d); + int64 copy(int64 d); + int64 neg_copy(uint64 d); + int64 neg_copy(int64 d); + uint64 encode_rs3_and_check_rs3_ge_rt3(uint64 d); + uint64 encode_rs3_and_check_rs3_lt_rt3(uint64 d); + uint64 encode_s_from_address(uint64 d); + uint64 encode_u_from_address(uint64 d); + uint64 encode_s_from_s_hi(uint64 d); + uint64 encode_count3_from_count(uint64 d); + uint64 encode_shift3_from_shift(uint64 d); + int64 encode_eu_from_s_li16(uint64 d); + uint64 encode_msbd_from_size(uint64 d); + uint64 encode_eu_from_u_andi16(uint64 d); + + uint64 encode_msbd_from_pos_and_size(uint64 d); + + uint64 encode_rt1_from_rt(uint64 d); + uint64 encode_lsb_from_pos_and_size(uint64 d); + + std::string save_restore_list(uint64 rt, uint64 count, uint64 gp); + + std::string GPR(uint64 reg); + std::string FPR(uint64 reg); + std::string AC(uint64 reg); + std::string IMMEDIATE(uint64 value); + std::string IMMEDIATE(int64 value); + std::string CPR(uint64 reg); + std::string ADDRESS(uint64 value, int instruction_size); + + int64 extract_s_4_2_1_0(uint64 instruction); + int64 extr_sil0il0bs8_il15il8bs1Tmsb8(uint64 instruction); + int64 extr_sil0il10bs1_il1il1bs9Tmsb10(uint64 instruction); + int64 extr_sil0il11bs1_il1il1bs10Tmsb11(uint64 instruction); + int64 extr_sil0il14bs1_il1il1bs13Tmsb14(uint64 instruction); + int64 extr_sil0il16bs16_il16il0bs16Tmsb31(uint64 instruction); + int64 extr_sil0il21bs1_il1il1bs20Tmsb21(uint64 instruction); + int64 extr_sil0il25bs1_il1il1bs24Tmsb25(uint64 instruction); + int64 extr_sil0il31bs1_il2il21bs10_il12il12bs9Tmsb31(uint64 instruction); + int64 extr_sil0il7bs1_il1il1bs6Tmsb7(uint64 instruction); + int64 extr_sil11il0bs10Tmsb9(uint64 instruction); + int64 extract_shift_21_20_19_18_17_16(uint64 instruction); + int64 extr_sil2il2bs6_il15il8bs1Tmsb8(uint64 instruction); + int64 extr_sil3il3bs5_il15il8bs1Tmsb8(uint64 instruction); + + uint64 extract_ac_13_12(uint64 instruction); + uint64 extract_bit_16_15_14_13_12_11(uint64 instruction); + uint64 extract_bit_23_22_21(uint64 instruction); + uint64 extract_c0s_20_19_18_17_16(uint64 instruction); + uint64 extract_code_17_to_0(uint64 instruction); + uint64 extract_code_18_to_0(uint64 instruction); + uint64 extract_code_1_0(uint64 instruction); + uint64 extract_code_2_1_0(uint64 instruction); + uint64 extract_code_25_24_23_22_21_20_19_18_17_16(uint64 instruction); + uint64 extract_cofun_25_24_23(uint64 instruction); + uint64 extract_count3_14_13_12(uint64 instruction); + uint64 extract_count_3_2_1_0(uint64 instruction); + uint64 extract_count_19_18_17_16(uint64 instruction); + uint64 extract_cs_20_19_18_17_16(uint64 instruction); + uint64 extract_cs_25_24_23_22_21(uint64 instruction); + uint64 extract_ct_25_24_23_22_21(uint64 instruction); + uint64 extract_eu_3_2_1_0(uint64 instruction); + uint64 extract_eu_6_5_4_3_2_1_0(uint64 instruction); + uint64 extract_fd_10_9_8_7_6(uint64 instruction); + uint64 extract_fs_15_14_13_12_11(uint64 instruction); + uint64 extract_ft_15_14_13_12_11(uint64 instruction); + uint64 extract_ft_20_19_18_17_16(uint64 instruction); + uint64 extract_gp_2(uint64 instruction); + uint64 extract_hint_25_24_23_22_21(uint64 instruction); + uint64 extract_hs_20_19_18_17_16(uint64 instruction); + uint64 extract_lsb_4_3_2_1_0(uint64 instruction); + uint64 extract_mask_20_19_18_17_16_15_14(uint64 instruction); + uint64 extract_msbt_10_9_8_7_6(uint64 instruction); + uint64 extract_op_25_24_23_22_21(uint64 instruction); + uint64 extract_op_25_to_3(uint64 instruction); + uint64 extract_rdl_25_24(uint64 instruction); + uint64 extract_rd2_3_8(uint64 instruction); + uint64 extract_rd3_3_2_1(uint64 instruction); + uint64 extract_rd_20_19_18_17_16(uint64 instruction); + uint64 extract_rs3_6_5_4(uint64 instruction); + uint64 extract_rs4_4_2_1_0(uint64 instruction); + uint64 extract_rs_4_3_2_1_0(uint64 instruction); + uint64 extract_rs_20_19_18_17_16(uint64 instruction); + uint64 extract_rsz4_4_2_1_0(uint64 instruction); + uint64 extract_rtl_11(uint64 instruction); + uint64 extract_rt3_9_8_7(uint64 instruction); + uint64 extract_rt4_9_7_6_5(uint64 instruction); + uint64 extract_rt_25_24_23_22_21(uint64 instruction); + uint64 extract_rt_41_40_39_38_37(uint64 instruction); + uint64 extract_rt_9_8_7_6_5(uint64 instruction); + uint64 extract_rtz3_9_8_7(uint64 instruction); + uint64 extract_rtz4_27_26_25_23_22_21(uint64 instruction); + uint64 extract_rtz4_9_7_6_5(uint64 instruction); + uint64 extract_ru_7_6_5_4_3(uint64 instruction); + uint64 extract_sa_15_14_13_12_11(uint64 instruction); + uint64 extract_sa_15_14_13_12(uint64 instruction); + uint64 extract_sa_15_14_13(uint64 instruction); + uint64 extract_sel_13_12_11(uint64 instruction); + uint64 extract_sel_15_14_13_12_11(uint64 instruction); + uint64 extract_shift3_2_1_0(uint64 instruction); + uint64 extract_shift_4_3_2_1_0(uint64 instruction); + uint64 extract_shift_5_4_3_2_1_0(uint64 instruction); + uint64 extract_shift_20_19_18_17_16(uint64 instruction); + uint64 extract_shift_10_9_8_7_6(uint64 instruction); + uint64 extract_shiftx_11_10_9_8_7_6(uint64 instruction); + uint64 extr_shiftxil7il1bs4Fmsb4(uint64 instruction); + uint64 extract_size_20_19_18_17_16(uint64 instruction); + uint64 extract_stripe_6(uint64 instruction); + uint64 extract_stype_20_19_18_17_16(uint64 instruction); + uint64 extract_u2_10_9(uint64 instruction); + uint64 extract_u_11_10_9_8_7_6_5_4_3_2_1_0(uint64 instruction); + uint64 extract_u_15_to_0(uint64 instruction); + uint64 extract_u_17_to_0(uint64 instruction); + uint64 extract_u_1_0(uint64 instruction); + uint64 extr_uil0il1bs4Fmsb4(uint64 instruction); + uint64 extr_uil0il2bs3Fmsb4(uint64 instruction); + uint64 extr_uil0il2bs4Fmsb5(uint64 instruction); + uint64 extr_uil0il2bs5Fmsb6(uint64 instruction); + uint64 extr_uil0il2bs6Fmsb7(uint64 instruction); + uint64 extr_uil0il2bs7Fmsb8(uint64 instruction); + uint64 extr_uil0il32bs32Fmsb63(uint64 instruction); + uint64 extract_u_10(uint64 instruction); + uint64 extract_u_17_16_15_14_13_12_11(uint64 instruction); + uint64 extract_u_20_19_18_17_16_15_14_13(uint64 instruction); + uint64 extr_uil1il1bs17Fmsb17(uint64 instruction); + uint64 extr_uil1il1bs2Fmsb2(uint64 instruction); + uint64 extr_uil2il2bs16Fmsb17(uint64 instruction); + uint64 extr_uil2il2bs19Fmsb20(uint64 instruction); + uint64 extr_uil3il3bs18Fmsb20(uint64 instruction); + uint64 extr_uil3il3bs1_il8il2bs1Fmsb3(uint64 instruction); + uint64 extr_uil3il3bs9Fmsb11(uint64 instruction); + uint64 extr_uil4il4bs4Fmsb7(uint64 instruction); + uint64 extr_xil0il0bs12Fmsb11(uint64 instruction); + uint64 extr_xil0il0bs3_il4il0bs1Fmsb2(uint64 instruction); + uint64 extr_xil10il0bs1Fmsb0(uint64 instruction); + uint64 extr_xil10il0bs1_il11il0bs5Fmsb4(uint64 instruction); + uint64 extr_xil10il0bs1_il14il0bs2Fmsb1(uint64 instruction); + uint64 extr_xil10il0bs4_il22il0bs4Fmsb3(uint64 instruction); + uint64 extr_xil10il0bs6Fmsb5(uint64 instruction); + uint64 extr_xil11il0bs1Fmsb0(uint64 instruction); + uint64 extr_xil11il0bs5Fmsb4(uint64 instruction); + uint64 extr_xil12il0bs1Fmsb0(uint64 instruction); + uint64 extr_xil14il0bs1_il15il0bs1Fmsb0(uint64 instruction); + uint64 extr_xil14il0bs2Fmsb1(uint64 instruction); + uint64 extr_xil15il0bs1Fmsb0(uint64 instruction); + uint64 extr_xil16il0bs10Fmsb9(uint64 instruction); + uint64 extr_xil16il0bs5Fmsb4(uint64 instruction); + uint64 extr_xil17il0bs1Fmsb0(uint64 instruction); + uint64 extr_xil17il0bs9Fmsb8(uint64 instruction); + uint64 extr_xil21il0bs5Fmsb4(uint64 instruction); + uint64 extr_xil24il0bs1Fmsb0(uint64 instruction); + uint64 extr_xil2il0bs1_il15il0bs1Fmsb0(uint64 instruction); + uint64 extr_xil6il0bs3Fmsb2(uint64 instruction); + uint64 extr_xil6il0bs3_il10il0bs1Fmsb2(uint64 instruction); + uint64 extr_xil9il0bs2Fmsb1(uint64 instruction); + uint64 extr_xil9il0bs3Fmsb2(uint64 instruction); + uint64 extr_xil9il0bs3_il16il0bs5Fmsb4(uint64 instruction); + + bool ADDIU_32__cond(uint64 instruction); + bool ADDIU_RS5__cond(uint64 instruction); + bool BALRSC_cond(uint64 instruction); + bool BEQC_16__cond(uint64 instruction); + bool BNEC_16__cond(uint64 instruction); + bool MOVE_cond(uint64 instruction); + bool P16_BR1_cond(uint64 instruction); + bool PREF_S9__cond(uint64 instruction); + bool PREFE_cond(uint64 instruction); + bool SLTU_cond(uint64 instruction); + + std::string ABS_D(uint64 instruction); + std::string ABS_S(uint64 instruction); + std::string ABSQ_S_PH(uint64 instruction); + std::string ABSQ_S_QB(uint64 instruction); + std::string ABSQ_S_W(uint64 instruction); + std::string ACLR(uint64 instruction); + std::string ADD(uint64 instruction); + std::string ADD_D(uint64 instruction); + std::string ADD_S(uint64 instruction); + std::string ADDIU_32_(uint64 instruction); + std::string ADDIU_48_(uint64 instruction); + std::string ADDIU_GP48_(uint64 instruction); + std::string ADDIU_GP_B_(uint64 instruction); + std::string ADDIU_GP_W_(uint64 instruction); + std::string ADDIU_NEG_(uint64 instruction); + std::string ADDIU_R1_SP_(uint64 instruction); + std::string ADDIU_R2_(uint64 instruction); + std::string ADDIU_RS5_(uint64 instruction); + std::string ADDIUPC_32_(uint64 instruction); + std::string ADDIUPC_48_(uint64 instruction); + std::string ADDQ_PH(uint64 instruction); + std::string ADDQ_S_PH(uint64 instruction); + std::string ADDQ_S_W(uint64 instruction); + std::string ADDQH_PH(uint64 instruction); + std::string ADDQH_R_PH(uint64 instruction); + std::string ADDQH_R_W(uint64 instruction); + std::string ADDQH_W(uint64 instruction); + std::string ADDSC(uint64 instruction); + std::string ADDU_16_(uint64 instruction); + std::string ADDU_32_(uint64 instruction); + std::string ADDU_4X4_(uint64 instruction); + std::string ADDU_PH(uint64 instruction); + std::string ADDU_QB(uint64 instruction); + std::string ADDU_S_PH(uint64 instruction); + std::string ADDU_S_QB(uint64 instruction); + std::string ADDUH_QB(uint64 instruction); + std::string ADDUH_R_QB(uint64 instruction); + std::string ADDWC(uint64 instruction); + std::string ALUIPC(uint64 instruction); + std::string AND_16_(uint64 instruction); + std::string AND_32_(uint64 instruction); + std::string ANDI_16_(uint64 instruction); + std::string ANDI_32_(uint64 instruction); + std::string APPEND(uint64 instruction); + std::string ASET(uint64 instruction); + std::string BALC_16_(uint64 instruction); + std::string BALC_32_(uint64 instruction); + std::string BALRSC(uint64 instruction); + std::string BBEQZC(uint64 instruction); + std::string BBNEZC(uint64 instruction); + std::string BC_16_(uint64 instruction); + std::string BC_32_(uint64 instruction); + std::string BC1EQZC(uint64 instruction); + std::string BC1NEZC(uint64 instruction); + std::string BC2EQZC(uint64 instruction); + std::string BC2NEZC(uint64 instruction); + std::string BEQC_16_(uint64 instruction); + std::string BEQC_32_(uint64 instruction); + std::string BEQIC(uint64 instruction); + std::string BEQZC_16_(uint64 instruction); + std::string BGEC(uint64 instruction); + std::string BGEIC(uint64 instruction); + std::string BGEIUC(uint64 instruction); + std::string BGEUC(uint64 instruction); + std::string BLTC(uint64 instruction); + std::string BLTIC(uint64 instruction); + std::string BLTIUC(uint64 instruction); + std::string BLTUC(uint64 instruction); + std::string BNEC_16_(uint64 instruction); + std::string BNEC_32_(uint64 instruction); + std::string BNEIC(uint64 instruction); + std::string BNEZC_16_(uint64 instruction); + std::string BPOSGE32C(uint64 instruction); + std::string BREAK_16_(uint64 instruction); + std::string BREAK_32_(uint64 instruction); + std::string BRSC(uint64 instruction); + std::string CACHE(uint64 instruction); + std::string CACHEE(uint64 instruction); + std::string CEIL_L_D(uint64 instruction); + std::string CEIL_L_S(uint64 instruction); + std::string CEIL_W_D(uint64 instruction); + std::string CEIL_W_S(uint64 instruction); + std::string CFC1(uint64 instruction); + std::string CFC2(uint64 instruction); + std::string CLASS_D(uint64 instruction); + std::string CLASS_S(uint64 instruction); + std::string CLO(uint64 instruction); + std::string CLZ(uint64 instruction); + std::string CMP_AF_D(uint64 instruction); + std::string CMP_AF_S(uint64 instruction); + std::string CMP_EQ_D(uint64 instruction); + std::string CMP_EQ_PH(uint64 instruction); + std::string CMP_EQ_S(uint64 instruction); + std::string CMP_LE_D(uint64 instruction); + std::string CMP_LE_PH(uint64 instruction); + std::string CMP_LE_S(uint64 instruction); + std::string CMP_LT_D(uint64 instruction); + std::string CMP_LT_PH(uint64 instruction); + std::string CMP_LT_S(uint64 instruction); + std::string CMP_NE_D(uint64 instruction); + std::string CMP_NE_S(uint64 instruction); + std::string CMP_OR_D(uint64 instruction); + std::string CMP_OR_S(uint64 instruction); + std::string CMP_SAF_D(uint64 instruction); + std::string CMP_SAF_S(uint64 instruction); + std::string CMP_SEQ_D(uint64 instruction); + std::string CMP_SEQ_S(uint64 instruction); + std::string CMP_SLE_D(uint64 instruction); + std::string CMP_SLE_S(uint64 instruction); + std::string CMP_SLT_D(uint64 instruction); + std::string CMP_SLT_S(uint64 instruction); + std::string CMP_SNE_D(uint64 instruction); + std::string CMP_SNE_S(uint64 instruction); + std::string CMP_SOR_D(uint64 instruction); + std::string CMP_SOR_S(uint64 instruction); + std::string CMP_SUEQ_D(uint64 instruction); + std::string CMP_SUEQ_S(uint64 instruction); + std::string CMP_SULE_D(uint64 instruction); + std::string CMP_SULE_S(uint64 instruction); + std::string CMP_SULT_D(uint64 instruction); + std::string CMP_SULT_S(uint64 instruction); + std::string CMP_SUN_D(uint64 instruction); + std::string CMP_SUN_S(uint64 instruction); + std::string CMP_SUNE_D(uint64 instruction); + std::string CMP_SUNE_S(uint64 instruction); + std::string CMP_UEQ_D(uint64 instruction); + std::string CMP_UEQ_S(uint64 instruction); + std::string CMP_ULE_D(uint64 instruction); + std::string CMP_ULE_S(uint64 instruction); + std::string CMP_ULT_D(uint64 instruction); + std::string CMP_ULT_S(uint64 instruction); + std::string CMP_UN_D(uint64 instruction); + std::string CMP_UN_S(uint64 instruction); + std::string CMP_UNE_D(uint64 instruction); + std::string CMP_UNE_S(uint64 instruction); + std::string CMPGDU_EQ_QB(uint64 instruction); + std::string CMPGDU_LE_QB(uint64 instruction); + std::string CMPGDU_LT_QB(uint64 instruction); + std::string CMPGU_EQ_QB(uint64 instruction); + std::string CMPGU_LE_QB(uint64 instruction); + std::string CMPGU_LT_QB(uint64 instruction); + std::string CMPU_EQ_QB(uint64 instruction); + std::string CMPU_LE_QB(uint64 instruction); + std::string CMPU_LT_QB(uint64 instruction); + std::string COP2_1(uint64 instruction); + std::string CTC1(uint64 instruction); + std::string CTC2(uint64 instruction); + std::string CVT_D_L(uint64 instruction); + std::string CVT_D_S(uint64 instruction); + std::string CVT_D_W(uint64 instruction); + std::string CVT_L_D(uint64 instruction); + std::string CVT_L_S(uint64 instruction); + std::string CVT_S_D(uint64 instruction); + std::string CVT_S_L(uint64 instruction); + std::string CVT_S_PL(uint64 instruction); + std::string CVT_S_PU(uint64 instruction); + std::string CVT_S_W(uint64 instruction); + std::string CVT_W_D(uint64 instruction); + std::string CVT_W_S(uint64 instruction); + std::string DADDIU_48_(uint64 instruction); + std::string DADDIU_NEG_(uint64 instruction); + std::string DADDIU_U12_(uint64 instruction); + std::string DADD(uint64 instruction); + std::string DADDU(uint64 instruction); + std::string DCLO(uint64 instruction); + std::string DCLZ(uint64 instruction); + std::string DDIV(uint64 instruction); + std::string DDIVU(uint64 instruction); + std::string DERET(uint64 instruction); + std::string DEXTM(uint64 instruction); + std::string DEXT(uint64 instruction); + std::string DEXTU(uint64 instruction); + std::string DINSM(uint64 instruction); + std::string DINS(uint64 instruction); + std::string DINSU(uint64 instruction); + std::string DI(uint64 instruction); + std::string DIV(uint64 instruction); + std::string DIV_D(uint64 instruction); + std::string DIV_S(uint64 instruction); + std::string DIVU(uint64 instruction); + std::string DLSA(uint64 instruction); + std::string DLUI_48_(uint64 instruction); + std::string DMFC0(uint64 instruction); + std::string DMFC1(uint64 instruction); + std::string DMFC2(uint64 instruction); + std::string DMFGC0(uint64 instruction); + std::string DMOD(uint64 instruction); + std::string DMODU(uint64 instruction); + std::string DMTC0(uint64 instruction); + std::string DMTC1(uint64 instruction); + std::string DMTC2(uint64 instruction); + std::string DMTGC0(uint64 instruction); + std::string DMT(uint64 instruction); + std::string DMUH(uint64 instruction); + std::string DMUHU(uint64 instruction); + std::string DMUL(uint64 instruction); + std::string DMULU(uint64 instruction); + std::string DPAQ_S_W_PH(uint64 instruction); + std::string DPAQ_SA_L_W(uint64 instruction); + std::string DPAQX_S_W_PH(uint64 instruction); + std::string DPAQX_SA_W_PH(uint64 instruction); + std::string DPAU_H_QBL(uint64 instruction); + std::string DPAU_H_QBR(uint64 instruction); + std::string DPA_W_PH(uint64 instruction); + std::string DPAX_W_PH(uint64 instruction); + std::string DPS_W_PH(uint64 instruction); + std::string DPSQ_SA_L_W(uint64 instruction); + std::string DPSQ_S_W_PH(uint64 instruction); + std::string DPSQX_SA_W_PH(uint64 instruction); + std::string DPSQX_S_W_PH(uint64 instruction); + std::string DPSU_H_QBL(uint64 instruction); + std::string DPSU_H_QBR(uint64 instruction); + std::string DPSX_W_PH(uint64 instruction); + std::string DROTR(uint64 instruction); + std::string DROTR32(uint64 instruction); + std::string DROTRV(uint64 instruction); + std::string DROTX(uint64 instruction); + std::string DSLL(uint64 instruction); + std::string DSLL32(uint64 instruction); + std::string DSLLV(uint64 instruction); + std::string DSRA(uint64 instruction); + std::string DSRA32(uint64 instruction); + std::string DSRAV(uint64 instruction); + std::string DSRL32(uint64 instruction); + std::string DSRL(uint64 instruction); + std::string DSRLV(uint64 instruction); + std::string DSUB(uint64 instruction); + std::string DSUBU(uint64 instruction); + std::string DVP(uint64 instruction); + std::string DVPE(uint64 instruction); + std::string EHB(uint64 instruction); + std::string EI(uint64 instruction); + std::string EMT(uint64 instruction); + std::string ERET(uint64 instruction); + std::string ERETNC(uint64 instruction); + std::string EVP(uint64 instruction); + std::string EVPE(uint64 instruction); + std::string EXT(uint64 instruction); + std::string EXTD(uint64 instruction); + std::string EXTD32(uint64 instruction); + std::string EXTP(uint64 instruction); + std::string EXTPDP(uint64 instruction); + std::string EXTPDPV(uint64 instruction); + std::string EXTPV(uint64 instruction); + std::string EXTR_RS_W(uint64 instruction); + std::string EXTR_R_W(uint64 instruction); + std::string EXTR_S_H(uint64 instruction); + std::string EXTR_W(uint64 instruction); + std::string EXTRV_R_W(uint64 instruction); + std::string EXTRV_RS_W(uint64 instruction); + std::string EXTRV_S_H(uint64 instruction); + std::string EXTRV_W(uint64 instruction); + std::string EXTW(uint64 instruction); + std::string FLOOR_L_D(uint64 instruction); + std::string FLOOR_L_S(uint64 instruction); + std::string FLOOR_W_D(uint64 instruction); + std::string FLOOR_W_S(uint64 instruction); + std::string FORK(uint64 instruction); + std::string HYPCALL(uint64 instruction); + std::string HYPCALL_16_(uint64 instruction); + std::string INS(uint64 instruction); + std::string INSV(uint64 instruction); + std::string IRET(uint64 instruction); + std::string JALRC_16_(uint64 instruction); + std::string JALRC_32_(uint64 instruction); + std::string JALRC_HB(uint64 instruction); + std::string JRC(uint64 instruction); + std::string LB_16_(uint64 instruction); + std::string LB_GP_(uint64 instruction); + std::string LB_S9_(uint64 instruction); + std::string LB_U12_(uint64 instruction); + std::string LBE(uint64 instruction); + std::string LBU_16_(uint64 instruction); + std::string LBU_GP_(uint64 instruction); + std::string LBU_S9_(uint64 instruction); + std::string LBU_U12_(uint64 instruction); + std::string LBUE(uint64 instruction); + std::string LBUX(uint64 instruction); + std::string LBX(uint64 instruction); + std::string LD_GP_(uint64 instruction); + std::string LD_S9_(uint64 instruction); + std::string LD_U12_(uint64 instruction); + std::string LDC1_GP_(uint64 instruction); + std::string LDC1_S9_(uint64 instruction); + std::string LDC1_U12_(uint64 instruction); + std::string LDC1X(uint64 instruction); + std::string LDC1XS(uint64 instruction); + std::string LDC2(uint64 instruction); + std::string LDM(uint64 instruction); + std::string LDPC_48_(uint64 instruction); + std::string LDX(uint64 instruction); + std::string LDXS(uint64 instruction); + std::string LH_16_(uint64 instruction); + std::string LH_GP_(uint64 instruction); + std::string LH_S9_(uint64 instruction); + std::string LH_U12_(uint64 instruction); + std::string LHE(uint64 instruction); + std::string LHU_16_(uint64 instruction); + std::string LHU_GP_(uint64 instruction); + std::string LHU_S9_(uint64 instruction); + std::string LHU_U12_(uint64 instruction); + std::string LHUE(uint64 instruction); + std::string LHUX(uint64 instruction); + std::string LHUXS(uint64 instruction); + std::string LHX(uint64 instruction); + std::string LHXS(uint64 instruction); + std::string LI_16_(uint64 instruction); + std::string LI_48_(uint64 instruction); + std::string LL(uint64 instruction); + std::string LLD(uint64 instruction); + std::string LLDP(uint64 instruction); + std::string LLE(uint64 instruction); + std::string LLWP(uint64 instruction); + std::string LLWPE(uint64 instruction); + std::string LSA(uint64 instruction); + std::string LUI(uint64 instruction); + std::string LW_16_(uint64 instruction); + std::string LW_4X4_(uint64 instruction); + std::string LWC1_GP_(uint64 instruction); + std::string LWC1_S9_(uint64 instruction); + std::string LWC1_U12_(uint64 instruction); + std::string LWC1X(uint64 instruction); + std::string LWC1XS(uint64 instruction); + std::string LWC2(uint64 instruction); + std::string LWE(uint64 instruction); + std::string LW_GP_(uint64 instruction); + std::string LW_GP16_(uint64 instruction); + std::string LWM(uint64 instruction); + std::string LWPC_48_(uint64 instruction); + std::string LW_S9_(uint64 instruction); + std::string LW_SP_(uint64 instruction); + std::string LW_U12_(uint64 instruction); + std::string LWU_GP_(uint64 instruction); + std::string LWU_S9_(uint64 instruction); + std::string LWU_U12_(uint64 instruction); + std::string LWUX(uint64 instruction); + std::string LWUXS(uint64 instruction); + std::string LWX(uint64 instruction); + std::string LWXS_16_(uint64 instruction); + std::string LWXS_32_(uint64 instruction); + std::string MADD_DSP_(uint64 instruction); + std::string MADDF_D(uint64 instruction); + std::string MADDF_S(uint64 instruction); + std::string MADDU_DSP_(uint64 instruction); + std::string MAQ_S_W_PHL(uint64 instruction); + std::string MAQ_S_W_PHR(uint64 instruction); + std::string MAQ_SA_W_PHL(uint64 instruction); + std::string MAQ_SA_W_PHR(uint64 instruction); + std::string MAX_D(uint64 instruction); + std::string MAX_S(uint64 instruction); + std::string MAXA_D(uint64 instruction); + std::string MAXA_S(uint64 instruction); + std::string MFC0(uint64 instruction); + std::string MFC1(uint64 instruction); + std::string MFC2(uint64 instruction); + std::string MFGC0(uint64 instruction); + std::string MFHC0(uint64 instruction); + std::string MFHC1(uint64 instruction); + std::string MFHC2(uint64 instruction); + std::string MFHGC0(uint64 instruction); + std::string MFHI_DSP_(uint64 instruction); + std::string MFHTR(uint64 instruction); + std::string MFLO_DSP_(uint64 instruction); + std::string MFTR(uint64 instruction); + std::string MIN_D(uint64 instruction); + std::string MIN_S(uint64 instruction); + std::string MINA_D(uint64 instruction); + std::string MINA_S(uint64 instruction); + std::string MOD(uint64 instruction); + std::string MODSUB(uint64 instruction); + std::string MODU(uint64 instruction); + std::string MOV_D(uint64 instruction); + std::string MOV_S(uint64 instruction); + std::string MOVE_BALC(uint64 instruction); + std::string MOVEP(uint64 instruction); + std::string MOVEP_REV_(uint64 instruction); + std::string MOVE(uint64 instruction); + std::string MOVN(uint64 instruction); + std::string MOVZ(uint64 instruction); + std::string MSUB_DSP_(uint64 instruction); + std::string MSUBF_D(uint64 instruction); + std::string MSUBF_S(uint64 instruction); + std::string MSUBU_DSP_(uint64 instruction); + std::string MTC0(uint64 instruction); + std::string MTC1(uint64 instruction); + std::string MTC2(uint64 instruction); + std::string MTGC0(uint64 instruction); + std::string MTHC0(uint64 instruction); + std::string MTHC1(uint64 instruction); + std::string MTHC2(uint64 instruction); + std::string MTHGC0(uint64 instruction); + std::string MTHI_DSP_(uint64 instruction); + std::string MTHLIP(uint64 instruction); + std::string MTHTR(uint64 instruction); + std::string MTLO_DSP_(uint64 instruction); + std::string MTTR(uint64 instruction); + std::string MUH(uint64 instruction); + std::string MUHU(uint64 instruction); + std::string MUL_32_(uint64 instruction); + std::string MUL_4X4_(uint64 instruction); + std::string MUL_D(uint64 instruction); + std::string MUL_PH(uint64 instruction); + std::string MUL_S(uint64 instruction); + std::string MUL_S_PH(uint64 instruction); + std::string MULEQ_S_W_PHL(uint64 instruction); + std::string MULEQ_S_W_PHR(uint64 instruction); + std::string MULEU_S_PH_QBL(uint64 instruction); + std::string MULEU_S_PH_QBR(uint64 instruction); + std::string MULQ_RS_PH(uint64 instruction); + std::string MULQ_RS_W(uint64 instruction); + std::string MULQ_S_PH(uint64 instruction); + std::string MULQ_S_W(uint64 instruction); + std::string MULSA_W_PH(uint64 instruction); + std::string MULSAQ_S_W_PH(uint64 instruction); + std::string MULT_DSP_(uint64 instruction); + std::string MULTU_DSP_(uint64 instruction); + std::string MULU(uint64 instruction); + std::string NEG_D(uint64 instruction); + std::string NEG_S(uint64 instruction); + std::string NOP_16_(uint64 instruction); + std::string NOP_32_(uint64 instruction); + std::string NOR(uint64 instruction); + std::string NOT_16_(uint64 instruction); + std::string OR_16_(uint64 instruction); + std::string OR_32_(uint64 instruction); + std::string ORI(uint64 instruction); + std::string PACKRL_PH(uint64 instruction); + std::string PAUSE(uint64 instruction); + std::string PICK_PH(uint64 instruction); + std::string PICK_QB(uint64 instruction); + std::string PRECEQ_W_PHL(uint64 instruction); + std::string PRECEQ_W_PHR(uint64 instruction); + std::string PRECEQU_PH_QBL(uint64 instruction); + std::string PRECEQU_PH_QBLA(uint64 instruction); + std::string PRECEQU_PH_QBR(uint64 instruction); + std::string PRECEQU_PH_QBRA(uint64 instruction); + std::string PRECEU_PH_QBL(uint64 instruction); + std::string PRECEU_PH_QBLA(uint64 instruction); + std::string PRECEU_PH_QBR(uint64 instruction); + std::string PRECEU_PH_QBRA(uint64 instruction); + std::string PRECR_QB_PH(uint64 instruction); + std::string PRECR_SRA_PH_W(uint64 instruction); + std::string PRECR_SRA_R_PH_W(uint64 instruction); + std::string PRECRQ_PH_W(uint64 instruction); + std::string PRECRQ_QB_PH(uint64 instruction); + std::string PRECRQ_RS_PH_W(uint64 instruction); + std::string PRECRQU_S_QB_PH(uint64 instruction); + std::string PREF_S9_(uint64 instruction); + std::string PREF_U12_(uint64 instruction); + std::string PREFE(uint64 instruction); + std::string PREPEND(uint64 instruction); + std::string RADDU_W_QB(uint64 instruction); + std::string RDDSP(uint64 instruction); + std::string RDHWR(uint64 instruction); + std::string RDPGPR(uint64 instruction); + std::string RECIP_D(uint64 instruction); + std::string RECIP_S(uint64 instruction); + std::string REPL_PH(uint64 instruction); + std::string REPL_QB(uint64 instruction); + std::string REPLV_PH(uint64 instruction); + std::string REPLV_QB(uint64 instruction); + std::string RESTORE_32_(uint64 instruction); + std::string RESTORE_JRC_16_(uint64 instruction); + std::string RESTORE_JRC_32_(uint64 instruction); + std::string RESTOREF(uint64 instruction); + std::string RINT_D(uint64 instruction); + std::string RINT_S(uint64 instruction); + std::string ROTR(uint64 instruction); + std::string ROTRV(uint64 instruction); + std::string ROTX(uint64 instruction); + std::string ROUND_L_D(uint64 instruction); + std::string ROUND_L_S(uint64 instruction); + std::string ROUND_W_D(uint64 instruction); + std::string ROUND_W_S(uint64 instruction); + std::string RSQRT_D(uint64 instruction); + std::string RSQRT_S(uint64 instruction); + std::string SAVE_16_(uint64 instruction); + std::string SAVE_32_(uint64 instruction); + std::string SAVEF(uint64 instruction); + std::string SB_16_(uint64 instruction); + std::string SB_GP_(uint64 instruction); + std::string SB_S9_(uint64 instruction); + std::string SB_U12_(uint64 instruction); + std::string SBE(uint64 instruction); + std::string SBX(uint64 instruction); + std::string SC(uint64 instruction); + std::string SCD(uint64 instruction); + std::string SCDP(uint64 instruction); + std::string SCE(uint64 instruction); + std::string SCWP(uint64 instruction); + std::string SCWPE(uint64 instruction); + std::string SD_GP_(uint64 instruction); + std::string SD_S9_(uint64 instruction); + std::string SD_U12_(uint64 instruction); + std::string SDBBP_16_(uint64 instruction); + std::string SDBBP_32_(uint64 instruction); + std::string SDC1_GP_(uint64 instruction); + std::string SDC1_S9_(uint64 instruction); + std::string SDC1_U12_(uint64 instruction); + std::string SDC1X(uint64 instruction); + std::string SDC1XS(uint64 instruction); + std::string SDC2(uint64 instruction); + std::string SDM(uint64 instruction); + std::string SDPC_48_(uint64 instruction); + std::string SDX(uint64 instruction); + std::string SDXS(uint64 instruction); + std::string SEB(uint64 instruction); + std::string SEH(uint64 instruction); + std::string SEL_D(uint64 instruction); + std::string SEL_S(uint64 instruction); + std::string SELEQZ_D(uint64 instruction); + std::string SELEQZ_S(uint64 instruction); + std::string SELNEZ_D(uint64 instruction); + std::string SELNEZ_S(uint64 instruction); + std::string SEQI(uint64 instruction); + std::string SH_16_(uint64 instruction); + std::string SH_GP_(uint64 instruction); + std::string SH_S9_(uint64 instruction); + std::string SH_U12_(uint64 instruction); + std::string SHE(uint64 instruction); + std::string SHILO(uint64 instruction); + std::string SHILOV(uint64 instruction); + std::string SHLL_PH(uint64 instruction); + std::string SHLL_QB(uint64 instruction); + std::string SHLL_S_PH(uint64 instruction); + std::string SHLL_S_W(uint64 instruction); + std::string SHLLV_PH(uint64 instruction); + std::string SHLLV_QB(uint64 instruction); + std::string SHLLV_S_PH(uint64 instruction); + std::string SHLLV_S_W(uint64 instruction); + std::string SHRA_PH(uint64 instruction); + std::string SHRA_QB(uint64 instruction); + std::string SHRA_R_PH(uint64 instruction); + std::string SHRA_R_QB(uint64 instruction); + std::string SHRA_R_W(uint64 instruction); + std::string SHRAV_PH(uint64 instruction); + std::string SHRAV_QB(uint64 instruction); + std::string SHRAV_R_PH(uint64 instruction); + std::string SHRAV_R_QB(uint64 instruction); + std::string SHRAV_R_W(uint64 instruction); + std::string SHRL_PH(uint64 instruction); + std::string SHRL_QB(uint64 instruction); + std::string SHRLV_PH(uint64 instruction); + std::string SHRLV_QB(uint64 instruction); + std::string SHX(uint64 instruction); + std::string SHXS(uint64 instruction); + std::string SIGRIE(uint64 instruction); + std::string SLL_16_(uint64 instruction); + std::string SLL_32_(uint64 instruction); + std::string SLLV(uint64 instruction); + std::string SLT(uint64 instruction); + std::string SLTI(uint64 instruction); + std::string SLTIU(uint64 instruction); + std::string SLTU(uint64 instruction); + std::string SOV(uint64 instruction); + std::string SPECIAL2(uint64 instruction); + std::string SQRT_D(uint64 instruction); + std::string SQRT_S(uint64 instruction); + std::string SRA(uint64 instruction); + std::string SRAV(uint64 instruction); + std::string SRL_16_(uint64 instruction); + std::string SRL_32_(uint64 instruction); + std::string SRLV(uint64 instruction); + std::string SUB(uint64 instruction); + std::string SUB_D(uint64 instruction); + std::string SUB_S(uint64 instruction); + std::string SUBQ_PH(uint64 instruction); + std::string SUBQ_S_PH(uint64 instruction); + std::string SUBQ_S_W(uint64 instruction); + std::string SUBQH_PH(uint64 instruction); + std::string SUBQH_R_PH(uint64 instruction); + std::string SUBQH_R_W(uint64 instruction); + std::string SUBQH_W(uint64 instruction); + std::string SUBU_16_(uint64 instruction); + std::string SUBU_32_(uint64 instruction); + std::string SUBU_PH(uint64 instruction); + std::string SUBU_QB(uint64 instruction); + std::string SUBU_S_PH(uint64 instruction); + std::string SUBU_S_QB(uint64 instruction); + std::string SUBUH_QB(uint64 instruction); + std::string SUBUH_R_QB(uint64 instruction); + std::string SW_16_(uint64 instruction); + std::string SW_4X4_(uint64 instruction); + std::string SW_GP16_(uint64 instruction); + std::string SW_GP_(uint64 instruction); + std::string SW_S9_(uint64 instruction); + std::string SW_SP_(uint64 instruction); + std::string SW_U12_(uint64 instruction); + std::string SWC1_GP_(uint64 instruction); + std::string SWC1_S9_(uint64 instruction); + std::string SWC1_U12_(uint64 instruction); + std::string SWC1X(uint64 instruction); + std::string SWC1XS(uint64 instruction); + std::string SWC2(uint64 instruction); + std::string SWE(uint64 instruction); + std::string SWM(uint64 instruction); + std::string SWPC_48_(uint64 instruction); + std::string SWX(uint64 instruction); + std::string SWXS(uint64 instruction); + std::string SYNC(uint64 instruction); + std::string SYNCI(uint64 instruction); + std::string SYNCIE(uint64 instruction); + std::string SYSCALL_16_(uint64 instruction); + std::string SYSCALL_32_(uint64 instruction); + std::string TEQ(uint64 instruction); + std::string TLBGINV(uint64 instruction); + std::string TLBGINVF(uint64 instruction); + std::string TLBGP(uint64 instruction); + std::string TLBGR(uint64 instruction); + std::string TLBGWI(uint64 instruction); + std::string TLBGWR(uint64 instruction); + std::string TLBINV(uint64 instruction); + std::string TLBINVF(uint64 instruction); + std::string TLBP(uint64 instruction); + std::string TLBR(uint64 instruction); + std::string TLBWI(uint64 instruction); + std::string TLBWR(uint64 instruction); + std::string TNE(uint64 instruction); + std::string TRUNC_L_D(uint64 instruction); + std::string TRUNC_L_S(uint64 instruction); + std::string TRUNC_W_D(uint64 instruction); + std::string TRUNC_W_S(uint64 instruction); + std::string UALDM(uint64 instruction); + std::string UALH(uint64 instruction); + std::string UALWM(uint64 instruction); + std::string UASDM(uint64 instruction); + std::string UASH(uint64 instruction); + std::string UASWM(uint64 instruction); + std::string UDI(uint64 instruction); + std::string WAIT(uint64 instruction); + std::string WRDSP(uint64 instruction); + std::string WRPGPR(uint64 instruction); + std::string XOR_16_(uint64 instruction); + std::string XOR_32_(uint64 instruction); + std::string XORI(uint64 instruction); + std::string YIELD(uint64 instruction); + + static Pool P_SYSCALL[2]; + static Pool P_RI[4]; + static Pool P_ADDIU[2]; + static Pool P_TRAP[2]; + static Pool P_CMOVE[2]; + static Pool P_D_MT_VPE[2]; + static Pool P_E_MT_VPE[2]; + static Pool _P_MT_VPE[2]; + static Pool P_MT_VPE[8]; + static Pool P_DVP[2]; + static Pool P_SLTU[2]; + static Pool _POOL32A0[128]; + static Pool ADDQ__S__PH[2]; + static Pool MUL__S__PH[2]; + static Pool ADDQH__R__PH[2]; + static Pool ADDQH__R__W[2]; + static Pool ADDU__S__QB[2]; + static Pool ADDU__S__PH[2]; + static Pool ADDUH__R__QB[2]; + static Pool SHRAV__R__PH[2]; + static Pool SHRAV__R__QB[2]; + static Pool SUBQ__S__PH[2]; + static Pool SUBQH__R__PH[2]; + static Pool SUBQH__R__W[2]; + static Pool SUBU__S__QB[2]; + static Pool SUBU__S__PH[2]; + static Pool SHRA__R__PH[2]; + static Pool SUBUH__R__QB[2]; + static Pool SHLLV__S__PH[2]; + static Pool SHLL__S__PH[4]; + static Pool PRECR_SRA__R__PH_W[2]; + static Pool _POOL32A5[128]; + static Pool PP_LSX[16]; + static Pool PP_LSXS[16]; + static Pool P_LSX[2]; + static Pool POOL32Axf_1_0[4]; + static Pool POOL32Axf_1_1[4]; + static Pool POOL32Axf_1_3[4]; + static Pool POOL32Axf_1_4[2]; + static Pool MAQ_S_A__W_PHR[2]; + static Pool MAQ_S_A__W_PHL[2]; + static Pool POOL32Axf_1_5[2]; + static Pool POOL32Axf_1_7[4]; + static Pool POOL32Axf_1[8]; + static Pool POOL32Axf_2_DSP__0_7[8]; + static Pool POOL32Axf_2_DSP__8_15[8]; + static Pool POOL32Axf_2_DSP__16_23[8]; + static Pool POOL32Axf_2_DSP__24_31[8]; + static Pool POOL32Axf_2[4]; + static Pool POOL32Axf_4[128]; + static Pool POOL32Axf_5_group0[32]; + static Pool POOL32Axf_5_group1[32]; + static Pool ERETx[2]; + static Pool POOL32Axf_5_group3[32]; + static Pool POOL32Axf_5[4]; + static Pool SHRA__R__QB[2]; + static Pool POOL32Axf_7[8]; + static Pool POOL32Axf[8]; + static Pool _POOL32A7[8]; + static Pool P32A[8]; + static Pool P_GP_D[2]; + static Pool P_GP_W[4]; + static Pool POOL48I[32]; + static Pool PP_SR[4]; + static Pool P_SR_F[8]; + static Pool P_SR[2]; + static Pool P_SLL[5]; + static Pool P_SHIFT[16]; + static Pool P_ROTX[4]; + static Pool P_INS[4]; + static Pool P_EXT[4]; + static Pool P_U12[16]; + static Pool RINT_fmt[2]; + static Pool ADD_fmt0[2]; + static Pool SELEQZ_fmt[2]; + static Pool CLASS_fmt[2]; + static Pool SUB_fmt0[2]; + static Pool SELNEZ_fmt[2]; + static Pool MUL_fmt0[2]; + static Pool SEL_fmt[2]; + static Pool DIV_fmt0[2]; + static Pool ADD_fmt1[2]; + static Pool SUB_fmt1[2]; + static Pool MUL_fmt1[2]; + static Pool MADDF_fmt[2]; + static Pool DIV_fmt1[2]; + static Pool MSUBF_fmt[2]; + static Pool POOL32F_0[64]; + static Pool MIN_fmt[2]; + static Pool MAX_fmt[2]; + static Pool MINA_fmt[2]; + static Pool MAXA_fmt[2]; + static Pool CVT_L_fmt[2]; + static Pool RSQRT_fmt[2]; + static Pool FLOOR_L_fmt[2]; + static Pool CVT_W_fmt[2]; + static Pool SQRT_fmt[2]; + static Pool FLOOR_W_fmt[2]; + static Pool RECIP_fmt[2]; + static Pool CEIL_L_fmt[2]; + static Pool CEIL_W_fmt[2]; + static Pool TRUNC_L_fmt[2]; + static Pool TRUNC_W_fmt[2]; + static Pool ROUND_L_fmt[2]; + static Pool ROUND_W_fmt[2]; + static Pool POOL32Fxf_0[64]; + static Pool MOV_fmt[4]; + static Pool ABS_fmt[4]; + static Pool NEG_fmt[4]; + static Pool CVT_D_fmt[4]; + static Pool CVT_S_fmt[4]; + static Pool POOL32Fxf_1[32]; + static Pool POOL32Fxf[4]; + static Pool POOL32F_3[8]; + static Pool CMP_condn_S[32]; + static Pool CMP_condn_D[32]; + static Pool POOL32F_5[8]; + static Pool POOL32F[8]; + static Pool POOL32S_0[64]; + static Pool POOL32Sxf_4[128]; + static Pool POOL32Sxf[8]; + static Pool POOL32S_4[8]; + static Pool POOL32S[8]; + static Pool P_LUI[2]; + static Pool P_GP_LH[2]; + static Pool P_GP_SH[2]; + static Pool P_GP_CP1[4]; + static Pool P_GP_M64[4]; + static Pool P_GP_BH[8]; + static Pool P_LS_U12[16]; + static Pool P_PREF_S9_[2]; + static Pool P_LS_S0[16]; + static Pool ASET_ACLR[2]; + static Pool P_LL[4]; + static Pool P_SC[4]; + static Pool P_LLD[8]; + static Pool P_SCD[8]; + static Pool P_LS_S1[16]; + static Pool P_PREFE[2]; + static Pool P_LLE[4]; + static Pool P_SCE[4]; + static Pool P_LS_E0[16]; + static Pool P_LS_WM[2]; + static Pool P_LS_UAWM[2]; + static Pool P_LS_DM[2]; + static Pool P_LS_UADM[2]; + static Pool P_LS_S9[8]; + static Pool P_BAL[2]; + static Pool P_BALRSC[2]; + static Pool P_J[16]; + static Pool P_BR3A[32]; + static Pool P_BR1[4]; + static Pool P_BR2[4]; + static Pool P_BRI[8]; + static Pool P32[32]; + static Pool P16_SYSCALL[2]; + static Pool P16_RI[4]; + static Pool P16_MV[2]; + static Pool P16_SHIFT[2]; + static Pool POOL16C_00[4]; + static Pool POOL16C_0[2]; + static Pool P16C[2]; + static Pool P16_A1[2]; + static Pool P_ADDIU_RS5_[2]; + static Pool P16_A2[2]; + static Pool P16_ADDU[2]; + static Pool P16_JRC[2]; + static Pool P16_BR1[2]; + static Pool P16_BR[2]; + static Pool P16_SR[2]; + static Pool P16_4X4[4]; + static Pool P16_LB[4]; + static Pool P16_LH[4]; + static Pool P16[32]; + static Pool MAJOR[2]; + +}; + +#endif diff --git a/docs/nvdimm.txt b/docs/nvdimm.txt index 5f158a6170..7231c2d78f 100644 --- a/docs/nvdimm.txt +++ b/docs/nvdimm.txt @@ -49,8 +49,9 @@ Multiple vNVDIMM devices can be created if multiple pairs of "-object" and "-device" are provided. For above command line options, if the guest OS has the proper NVDIMM -driver, it should be able to detect a NVDIMM device which is in the -persistent memory mode and whose size is $NVDIMM_SIZE. +driver (e.g. "CONFIG_ACPI_NFIT=y" under Linux), it should be able to +detect a NVDIMM device which is in the persistent memory mode and whose +size is $NVDIMM_SIZE. Note: diff --git a/hw/Makefile.objs b/hw/Makefile.objs index 30722ccf98..39d882af6f 100644 --- a/hw/Makefile.objs +++ b/hw/Makefile.objs @@ -34,7 +34,7 @@ devices-dirs-$(CONFIG_SOFTMMU) += vfio/ devices-dirs-$(CONFIG_SOFTMMU) += virtio/ devices-dirs-$(CONFIG_SOFTMMU) += watchdog/ devices-dirs-$(CONFIG_SOFTMMU) += xen/ -devices-dirs-$(CONFIG_MEM_HOTPLUG) += mem/ +devices-dirs-$(CONFIG_MEM_DEVICE) += mem/ devices-dirs-$(CONFIG_SOFTMMU) += smbios/ devices-dirs-y += core/ common-obj-y += $(devices-dirs-y) diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index d74b5b55e1..8004afe45b 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -932,23 +932,10 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, return b; } -static int typhoon_pcihost_init(SysBusDevice *dev) -{ - return 0; -} - -static void typhoon_pcihost_class_init(ObjectClass *klass, void *data) -{ - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); - - k->init = typhoon_pcihost_init; -} - static const TypeInfo typhoon_pcihost_info = { .name = TYPE_TYPHOON_PCI_HOST_BRIDGE, .parent = TYPE_PCI_HOST_BRIDGE, .instance_size = sizeof(TyphoonState), - .class_init = typhoon_pcihost_class_init, }; static void typhoon_iommu_memory_region_class_init(ObjectClass *klass, diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index c807010e83..9648b3af44 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1693,9 +1693,10 @@ static void musicpal_init(MachineState *machine) } wm8750_dev = i2c_create_slave(i2c, TYPE_WM8750, MP_WM_ADDR); - dev = qdev_create(NULL, "mv88w8618_audio"); + dev = qdev_create(NULL, TYPE_MV88W8618_AUDIO); s = SYS_BUS_DEVICE(dev); - qdev_prop_set_ptr(dev, "wm8750", wm8750_dev); + object_property_set_link(OBJECT(dev), OBJECT(wm8750_dev), + TYPE_WM8750, NULL); qdev_init_nofail(dev); sysbus_mmio_map(s, 0, MP_AUDIO_BASE); sysbus_connect_irq(s, 0, pic[MP_AUDIO_IRQ]); diff --git a/hw/audio/ac97.c b/hw/audio/ac97.c index 337402e9c6..d799533aa9 100644 --- a/hw/audio/ac97.c +++ b/hw/audio/ac97.c @@ -123,6 +123,10 @@ enum { #define MUTE_SHIFT 15 +#define TYPE_AC97 "AC97" +#define AC97(obj) \ + OBJECT_CHECK(AC97LinkState, (obj), TYPE_AC97) + #define REC_MASK 7 enum { REC_MIC = 0, @@ -1340,7 +1344,7 @@ static void ac97_on_reset (DeviceState *dev) static void ac97_realize(PCIDevice *dev, Error **errp) { - AC97LinkState *s = DO_UPCAST (AC97LinkState, dev, dev); + AC97LinkState *s = AC97(dev); uint8_t *c = s->dev.config; /* TODO: no need to override */ @@ -1389,7 +1393,7 @@ static void ac97_realize(PCIDevice *dev, Error **errp) static void ac97_exit(PCIDevice *dev) { - AC97LinkState *s = DO_UPCAST(AC97LinkState, dev, dev); + AC97LinkState *s = AC97(dev); AUD_close_in(&s->card, s->voice_pi); AUD_close_out(&s->card, s->voice_po); @@ -1399,7 +1403,7 @@ static void ac97_exit(PCIDevice *dev) static int ac97_init (PCIBus *bus) { - pci_create_simple (bus, -1, "AC97"); + pci_create_simple(bus, -1, TYPE_AC97); return 0; } @@ -1427,7 +1431,7 @@ static void ac97_class_init (ObjectClass *klass, void *data) } static const TypeInfo ac97_info = { - .name = "AC97", + .name = TYPE_AC97, .parent = TYPE_PCI_DEVICE, .instance_size = sizeof (AC97LinkState), .class_init = ac97_class_init, diff --git a/hw/audio/marvell_88w8618.c b/hw/audio/marvell_88w8618.c index e546892d3c..6600ab4851 100644 --- a/hw/audio/marvell_88w8618.c +++ b/hw/audio/marvell_88w8618.c @@ -15,6 +15,7 @@ #include "hw/i2c/i2c.h" #include "hw/audio/wm8750.h" #include "audio/audio.h" +#include "qapi/error.h" #define MP_AUDIO_SIZE 0x00001000 @@ -38,7 +39,6 @@ #define MP_AUDIO_CLOCK_24MHZ (1 << 9) #define MP_AUDIO_MONO (1 << 14) -#define TYPE_MV88W8618_AUDIO "mv88w8618_audio" #define MV88W8618_AUDIO(obj) \ OBJECT_CHECK(mv88w8618_audio_state, (obj), TYPE_MV88W8618_AUDIO) @@ -252,6 +252,11 @@ static void mv88w8618_audio_init(Object *obj) memory_region_init_io(&s->iomem, obj, &mv88w8618_audio_ops, s, "audio", MP_AUDIO_SIZE); sysbus_init_mmio(dev, &s->iomem); + + object_property_add_link(OBJECT(dev), "wm8750", TYPE_WM8750, + (Object **) &s->wm, + qdev_prop_allow_set_link_before_realize, + 0, &error_abort); } static void mv88w8618_audio_realize(DeviceState *dev, Error **errp) @@ -279,11 +284,6 @@ static const VMStateDescription mv88w8618_audio_vmsd = { } }; -static Property mv88w8618_audio_properties[] = { - DEFINE_PROP_PTR("wm8750", mv88w8618_audio_state, wm), - {/* end of list */}, -}; - static void mv88w8618_audio_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); @@ -291,8 +291,6 @@ static void mv88w8618_audio_class_init(ObjectClass *klass, void *data) dc->realize = mv88w8618_audio_realize; dc->reset = mv88w8618_audio_reset; dc->vmsd = &mv88w8618_audio_vmsd; - dc->props = mv88w8618_audio_properties; - /* Reason: pointer property "wm8750" */ dc->user_creatable = false; } diff --git a/hw/core/machine.c b/hw/core/machine.c index 1987557833..da50ad6de7 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -636,7 +636,7 @@ static void machine_class_init(ObjectClass *oc, void *data) machine_get_memory_encryption, machine_set_memory_encryption, &error_abort); object_class_property_set_description(oc, "memory-encryption", - "Set memory encyption object to use", &error_abort); + "Set memory encryption object to use", &error_abort); } static void machine_class_base_init(ObjectClass *oc, void *data) diff --git a/hw/display/qxl.c b/hw/display/qxl.c index f608abc769..9087db5dee 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -848,7 +848,7 @@ static int interface_get_cursor_command(QXLInstance *sin, struct QXLCommandExt * qxl->guest_primary.commands++; qxl_track_command(qxl, ext); qxl_log_command(qxl, "csr", ext); - if (qxl->id == 0) { + if (qxl->have_vga) { qxl_render_cursor(qxl, ext); } trace_qxl_ring_cursor_get(qxl->id, qxl_mode_to_string(qxl->mode)); @@ -1255,7 +1255,7 @@ static void qxl_soft_reset(PCIQXLDevice *d) d->current_async = QXL_UNDEFINED_IO; qemu_mutex_unlock(&d->async_lock); - if (d->id == 0) { + if (d->have_vga) { qxl_enter_vga_mode(d); } else { d->mode = QXL_MODE_UNDEFINED; @@ -2139,7 +2139,7 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp) memory_region_init_io(&qxl->io_bar, OBJECT(qxl), &qxl_io_ops, qxl, "qxl-ioports", io_size); - if (qxl->id == 0) { + if (qxl->have_vga) { vga_dirty_log_start(&qxl->vga); } memory_region_set_flush_coalesced(&qxl->io_bar); @@ -2171,7 +2171,7 @@ static void qxl_realize_common(PCIQXLDevice *qxl, Error **errp) /* print pci bar details */ dprint(qxl, 1, "ram/%s: %" PRId64 " MB [region 0]\n", - qxl->id == 0 ? "pri" : "sec", qxl->vga.vram_size / MiB); + qxl->have_vga ? "pri" : "sec", qxl->vga.vram_size / MiB); dprint(qxl, 1, "vram/32: %" PRIx64 " MB [region 1]\n", qxl->vram32_size / MiB); dprint(qxl, 1, "vram/64: %" PRIx64 " MB %s\n", @@ -2199,7 +2199,6 @@ static void qxl_realize_primary(PCIDevice *dev, Error **errp) VGACommonState *vga = &qxl->vga; Error *local_err = NULL; - qxl->id = 0; qxl_init_ramsize(qxl); vga->vbe_size = qxl->vgamem_size; vga->vram_size_mb = qxl->vga.vram_size / MiB; @@ -2210,8 +2209,15 @@ static void qxl_realize_primary(PCIDevice *dev, Error **errp) vga, "vga"); portio_list_set_flush_coalesced(&qxl->vga_port_list); portio_list_add(&qxl->vga_port_list, pci_address_space_io(dev), 0x3b0); + qxl->have_vga = true; vga->con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl); + qxl->id = qemu_console_get_index(vga->con); /* == channel_id */ + if (qxl->id != 0) { + error_setg(errp, "primary qxl-vga device must be console 0 " + "(first display device on the command line)"); + return; + } qxl_realize_common(qxl, &local_err); if (local_err) { @@ -2226,15 +2232,14 @@ static void qxl_realize_primary(PCIDevice *dev, Error **errp) static void qxl_realize_secondary(PCIDevice *dev, Error **errp) { - static int device_id = 1; PCIQXLDevice *qxl = PCI_QXL(dev); - qxl->id = device_id++; qxl_init_ramsize(qxl); memory_region_init_ram(&qxl->vga.vram, OBJECT(dev), "qxl.vgavram", qxl->vga.vram_size, &error_fatal); qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram); qxl->vga.con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl); + qxl->id = qemu_console_get_index(qxl->vga.con); /* == channel_id */ qxl_realize_common(qxl, errp); } diff --git a/hw/display/qxl.h b/hw/display/qxl.h index dd9c0522b7..6f9d1f21fa 100644 --- a/hw/display/qxl.h +++ b/hw/display/qxl.h @@ -34,6 +34,7 @@ typedef struct PCIQXLDevice { PortioList vga_port_list; SimpleSpiceDisplay ssd; int id; + bool have_vga; uint32_t debug; uint32_t guestdebug; uint32_t cmdlog; diff --git a/hw/hppa/dino.c b/hw/hppa/dino.c index 564b938e3a..31e09942b5 100644 --- a/hw/hppa/dino.c +++ b/hw/hppa/dino.c @@ -488,17 +488,10 @@ PCIBus *dino_init(MemoryRegion *addr_space, return b; } -static int dino_pcihost_init(SysBusDevice *dev) -{ - return 0; -} - static void dino_pcihost_class_init(ObjectClass *klass, void *data) { - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - k->init = dino_pcihost_init; dc->vmsd = &vmstate_dino; } diff --git a/hw/i386/pc.c b/hw/i386/pc.c index eab8572f2a..f095725dba 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1704,7 +1704,7 @@ static void pc_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, return; } - pc_dimm_pre_plug(dev, MACHINE(hotplug_dev), + pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), pcmc->enforce_aligned_dimm ? NULL : &legacy_align, errp); } @@ -1716,7 +1716,7 @@ static void pc_memory_plug(HotplugHandler *hotplug_dev, PCMachineState *pcms = PC_MACHINE(hotplug_dev); bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); - pc_dimm_plug(dev, MACHINE(pcms), &local_err); + pc_dimm_plug(PC_DIMM(dev), MACHINE(pcms), &local_err); if (local_err) { goto out; } @@ -1776,7 +1776,7 @@ static void pc_memory_unplug(HotplugHandler *hotplug_dev, goto out; } - pc_dimm_unplug(dev, MACHINE(pcms)); + pc_dimm_unplug(PC_DIMM(dev), MACHINE(pcms)); object_unparent(OBJECT(dev)); out: diff --git a/hw/mem/Makefile.objs b/hw/mem/Makefile.objs index 10be4df2a2..3e2f7c5ca2 100644 --- a/hw/mem/Makefile.objs +++ b/hw/mem/Makefile.objs @@ -1,3 +1,3 @@ -common-obj-$(CONFIG_MEM_HOTPLUG) += pc-dimm.o -common-obj-$(CONFIG_MEM_HOTPLUG) += memory-device.o +common-obj-$(CONFIG_DIMM) += pc-dimm.o +common-obj-$(CONFIG_MEM_DEVICE) += memory-device.o common-obj-$(CONFIG_NVDIMM) += nvdimm.o diff --git a/hw/mem/memory-device.c b/hw/mem/memory-device.c index 6de4f70bb4..7de1ccd497 100644 --- a/hw/mem/memory-device.c +++ b/hw/mem/memory-device.c @@ -17,6 +17,7 @@ #include "qemu/range.h" #include "hw/virtio/vhost.h" #include "sysemu/kvm.h" +#include "trace.h" static gint memory_device_addr_sort(gconstpointer a, gconstpointer b) { @@ -57,10 +58,9 @@ static int memory_device_used_region_size(Object *obj, void *opaque) if (object_dynamic_cast(obj, TYPE_MEMORY_DEVICE)) { const DeviceState *dev = DEVICE(obj); const MemoryDeviceState *md = MEMORY_DEVICE(obj); - const MemoryDeviceClass *mdc = MEMORY_DEVICE_GET_CLASS(obj); if (dev->realized) { - *size += mdc->get_region_size(md); + *size += memory_device_get_region_size(md, &error_abort); } } @@ -87,16 +87,17 @@ static void memory_device_check_addable(MachineState *ms, uint64_t size, memory_device_used_region_size(OBJECT(ms), &used_region_size); if (used_region_size + size > ms->maxram_size - ms->ram_size) { error_setg(errp, "not enough space, currently 0x%" PRIx64 - " in use of total hot pluggable 0x" RAM_ADDR_FMT, + " in use of total space for memory devices 0x" RAM_ADDR_FMT, used_region_size, ms->maxram_size - ms->ram_size); return; } } -uint64_t memory_device_get_free_addr(MachineState *ms, const uint64_t *hint, - uint64_t align, uint64_t size, - Error **errp) +static uint64_t memory_device_get_free_addr(MachineState *ms, + const uint64_t *hint, + uint64_t align, uint64_t size, + Error **errp) { uint64_t address_space_start, address_space_end; GSList *list = NULL, *item; @@ -120,7 +121,7 @@ uint64_t memory_device_get_free_addr(MachineState *ms, const uint64_t *hint, /* address_space_start indicates the maximum alignment we expect */ if (QEMU_ALIGN_UP(address_space_start, align) != address_space_start) { - error_setg(errp, "the alignment (0%" PRIx64 ") is not supported", + error_setg(errp, "the alignment (0x%" PRIx64 ") is not supported", align); return 0; } @@ -145,11 +146,12 @@ uint64_t memory_device_get_free_addr(MachineState *ms, const uint64_t *hint, if (hint) { new_addr = *hint; if (new_addr < address_space_start) { - error_setg(errp, "can't add memory [0x%" PRIx64 ":0x%" PRIx64 - "] at 0x%" PRIx64, new_addr, size, address_space_start); + error_setg(errp, "can't add memory device [0x%" PRIx64 ":0x%" PRIx64 + "] before 0x%" PRIx64, new_addr, size, + address_space_start); return 0; } else if ((new_addr + size) > address_space_end) { - error_setg(errp, "can't add memory [0x%" PRIx64 ":0x%" PRIx64 + error_setg(errp, "can't add memory device [0x%" PRIx64 ":0x%" PRIx64 "] beyond 0x%" PRIx64, new_addr, size, address_space_end); return 0; @@ -166,15 +168,13 @@ uint64_t memory_device_get_free_addr(MachineState *ms, const uint64_t *hint, uint64_t md_size, md_addr; md_addr = mdc->get_addr(md); - md_size = mdc->get_region_size(md); - if (*errp) { - goto out; - } + md_size = memory_device_get_region_size(md, &error_abort); if (ranges_overlap(md_addr, md_size, new_addr, size)) { if (hint) { const DeviceState *d = DEVICE(md); - error_setg(errp, "address range conflicts with '%s'", d->id); + error_setg(errp, "address range conflicts with memory device" + " id='%s'", d->id ? d->id : "(unnamed)"); goto out; } new_addr = QEMU_ALIGN_UP(md_addr + md_size, align); @@ -232,7 +232,7 @@ static int memory_device_plugged_size(Object *obj, void *opaque) const MemoryDeviceClass *mdc = MEMORY_DEVICE_GET_CLASS(obj); if (dev->realized) { - *size += mdc->get_plugged_size(md); + *size += mdc->get_plugged_size(md, &error_abort); } } @@ -249,22 +249,83 @@ uint64_t get_plugged_memory_size(void) return size; } -void memory_device_plug_region(MachineState *ms, MemoryRegion *mr, - uint64_t addr) +void memory_device_pre_plug(MemoryDeviceState *md, MachineState *ms, + const uint64_t *legacy_align, Error **errp) +{ + const MemoryDeviceClass *mdc = MEMORY_DEVICE_GET_CLASS(md); + Error *local_err = NULL; + uint64_t addr, align; + MemoryRegion *mr; + + mr = mdc->get_memory_region(md, &local_err); + if (local_err) { + goto out; + } + + align = legacy_align ? *legacy_align : memory_region_get_alignment(mr); + addr = mdc->get_addr(md); + addr = memory_device_get_free_addr(ms, !addr ? NULL : &addr, align, + memory_region_size(mr), &local_err); + if (local_err) { + goto out; + } + mdc->set_addr(md, addr, &local_err); + if (!local_err) { + trace_memory_device_pre_plug(DEVICE(md)->id ? DEVICE(md)->id : "", + addr); + } +out: + error_propagate(errp, local_err); +} + +void memory_device_plug(MemoryDeviceState *md, MachineState *ms) { - /* we expect a previous call to memory_device_get_free_addr() */ + const MemoryDeviceClass *mdc = MEMORY_DEVICE_GET_CLASS(md); + const uint64_t addr = mdc->get_addr(md); + MemoryRegion *mr; + + /* + * We expect that a previous call to memory_device_pre_plug() succeeded, so + * it can't fail at this point. + */ + mr = mdc->get_memory_region(md, &error_abort); g_assert(ms->device_memory); memory_region_add_subregion(&ms->device_memory->mr, addr - ms->device_memory->base, mr); + trace_memory_device_plug(DEVICE(md)->id ? DEVICE(md)->id : "", addr); } -void memory_device_unplug_region(MachineState *ms, MemoryRegion *mr) +void memory_device_unplug(MemoryDeviceState *md, MachineState *ms) { - /* we expect a previous call to memory_device_get_free_addr() */ + const MemoryDeviceClass *mdc = MEMORY_DEVICE_GET_CLASS(md); + MemoryRegion *mr; + + /* + * We expect that a previous call to memory_device_pre_plug() succeeded, so + * it can't fail at this point. + */ + mr = mdc->get_memory_region(md, &error_abort); g_assert(ms->device_memory); memory_region_del_subregion(&ms->device_memory->mr, mr); + trace_memory_device_unplug(DEVICE(md)->id ? DEVICE(md)->id : "", + mdc->get_addr(md)); +} + +uint64_t memory_device_get_region_size(const MemoryDeviceState *md, + Error **errp) +{ + const MemoryDeviceClass *mdc = MEMORY_DEVICE_GET_CLASS(md); + MemoryRegion *mr; + + /* dropping const here is fine as we don't touch the memory region */ + mr = mdc->get_memory_region((MemoryDeviceState *)md, errp); + if (!mr) { + return 0; + } + + return memory_region_size(mr); } static const TypeInfo memory_device_info = { diff --git a/hw/mem/nvdimm.c b/hw/mem/nvdimm.c index 1c6674c4ed..49324f3fae 100644 --- a/hw/mem/nvdimm.c +++ b/hw/mem/nvdimm.c @@ -27,6 +27,7 @@ #include "qapi/error.h" #include "qapi/visitor.h" #include "hw/mem/nvdimm.h" +#include "hw/mem/memory-device.h" static void nvdimm_get_label_size(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) @@ -118,9 +119,10 @@ static void nvdimm_prepare_memory_region(NVDIMMDevice *nvdimm, Error **errp) nvdimm->nvdimm_mr->align = align; } -static MemoryRegion *nvdimm_get_memory_region(PCDIMMDevice *dimm, Error **errp) +static MemoryRegion *nvdimm_md_get_memory_region(MemoryDeviceState *md, + Error **errp) { - NVDIMMDevice *nvdimm = NVDIMM(dimm); + NVDIMMDevice *nvdimm = NVDIMM(md); Error *local_err = NULL; if (!nvdimm->nvdimm_mr) { @@ -190,11 +192,12 @@ static Property nvdimm_properties[] = { static void nvdimm_class_init(ObjectClass *oc, void *data) { PCDIMMDeviceClass *ddc = PC_DIMM_CLASS(oc); + MemoryDeviceClass *mdc = MEMORY_DEVICE_CLASS(oc); NVDIMMClass *nvc = NVDIMM_CLASS(oc); DeviceClass *dc = DEVICE_CLASS(oc); ddc->realize = nvdimm_realize; - ddc->get_memory_region = nvdimm_get_memory_region; + mdc->get_memory_region = nvdimm_md_get_memory_region; dc->props = nvdimm_properties; nvc->read_label_data = nvdimm_read_label_data; diff --git a/hw/mem/pc-dimm.c b/hw/mem/pc-dimm.c index fb6bcaedc4..0c9b9e8292 100644 --- a/hw/mem/pc-dimm.c +++ b/hw/mem/pc-dimm.c @@ -29,72 +29,47 @@ static int pc_dimm_get_free_slot(const int *hint, int max_slots, Error **errp); -void pc_dimm_pre_plug(DeviceState *dev, MachineState *machine, +void pc_dimm_pre_plug(PCDIMMDevice *dimm, MachineState *machine, const uint64_t *legacy_align, Error **errp) { - PCDIMMDevice *dimm = PC_DIMM(dev); - PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm); Error *local_err = NULL; - MemoryRegion *mr; - uint64_t addr, align; int slot; - slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP, + slot = object_property_get_int(OBJECT(dimm), PC_DIMM_SLOT_PROP, &error_abort); slot = pc_dimm_get_free_slot(slot == PC_DIMM_UNASSIGNED_SLOT ? NULL : &slot, machine->ram_slots, &local_err); if (local_err) { goto out; } - object_property_set_int(OBJECT(dev), slot, PC_DIMM_SLOT_PROP, &error_abort); + object_property_set_int(OBJECT(dimm), slot, PC_DIMM_SLOT_PROP, + &error_abort); trace_mhp_pc_dimm_assigned_slot(slot); - mr = ddc->get_memory_region(dimm, &local_err); - if (local_err) { - goto out; - } - - align = legacy_align ? *legacy_align : memory_region_get_alignment(mr); - addr = object_property_get_uint(OBJECT(dev), PC_DIMM_ADDR_PROP, - &error_abort); - addr = memory_device_get_free_addr(machine, !addr ? NULL : &addr, align, - memory_region_size(mr), &local_err); - if (local_err) { - goto out; - } - trace_mhp_pc_dimm_assigned_address(addr); - object_property_set_uint(OBJECT(dev), addr, PC_DIMM_ADDR_PROP, - &error_abort); + memory_device_pre_plug(MEMORY_DEVICE(dimm), machine, legacy_align, + &local_err); out: error_propagate(errp, local_err); } -void pc_dimm_plug(DeviceState *dev, MachineState *machine, Error **errp) +void pc_dimm_plug(PCDIMMDevice *dimm, MachineState *machine, Error **errp) { - PCDIMMDevice *dimm = PC_DIMM(dev); PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm); MemoryRegion *vmstate_mr = ddc->get_vmstate_memory_region(dimm, &error_abort); - MemoryRegion *mr = ddc->get_memory_region(dimm, &error_abort); - uint64_t addr; - - addr = object_property_get_uint(OBJECT(dev), PC_DIMM_ADDR_PROP, - &error_abort); - memory_device_plug_region(machine, mr, addr); - vmstate_register_ram(vmstate_mr, dev); + memory_device_plug(MEMORY_DEVICE(dimm), machine); + vmstate_register_ram(vmstate_mr, DEVICE(dimm)); } -void pc_dimm_unplug(DeviceState *dev, MachineState *machine) +void pc_dimm_unplug(PCDIMMDevice *dimm, MachineState *machine) { - PCDIMMDevice *dimm = PC_DIMM(dev); PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm); MemoryRegion *vmstate_mr = ddc->get_vmstate_memory_region(dimm, &error_abort); - MemoryRegion *mr = ddc->get_memory_region(dimm, &error_abort); - memory_device_unplug_region(machine, mr); - vmstate_unregister_ram(vmstate_mr, dev); + memory_device_unplug(MEMORY_DEVICE(dimm), machine); + vmstate_unregister_ram(vmstate_mr, DEVICE(dimm)); } static int pc_dimm_slot2bitmap(Object *obj, void *opaque) @@ -163,16 +138,14 @@ static Property pc_dimm_properties[] = { static void pc_dimm_get_size(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { + Error *local_err = NULL; uint64_t value; - MemoryRegion *mr; - PCDIMMDevice *dimm = PC_DIMM(obj); - PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(obj); - mr = ddc->get_memory_region(dimm, errp); - if (!mr) { + value = memory_device_get_region_size(MEMORY_DEVICE(obj), &local_err); + if (local_err) { + error_propagate(errp, local_err); return; } - value = memory_region_size(mr); visit_type_uint64(v, name, &value, errp); } @@ -236,19 +209,16 @@ static uint64_t pc_dimm_md_get_addr(const MemoryDeviceState *md) return dimm->addr; } -static uint64_t pc_dimm_md_get_region_size(const MemoryDeviceState *md) +static void pc_dimm_md_set_addr(MemoryDeviceState *md, uint64_t addr, + Error **errp) { - /* dropping const here is fine as we don't touch the memory region */ - PCDIMMDevice *dimm = PC_DIMM(md); - const PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(md); - MemoryRegion *mr; - - mr = ddc->get_memory_region(dimm, &error_abort); - if (!mr) { - return 0; - } + object_property_set_uint(OBJECT(md), addr, PC_DIMM_ADDR_PROP, errp); +} - return memory_region_size(mr); +static MemoryRegion *pc_dimm_md_get_memory_region(MemoryDeviceState *md, + Error **errp) +{ + return pc_dimm_get_memory_region(PC_DIMM(md), errp); } static void pc_dimm_md_fill_device_info(const MemoryDeviceState *md, @@ -292,13 +262,13 @@ static void pc_dimm_class_init(ObjectClass *oc, void *data) dc->props = pc_dimm_properties; dc->desc = "DIMM memory module"; - ddc->get_memory_region = pc_dimm_get_memory_region; ddc->get_vmstate_memory_region = pc_dimm_get_memory_region; mdc->get_addr = pc_dimm_md_get_addr; + mdc->set_addr = pc_dimm_md_set_addr; /* for a dimm plugged_size == region_size */ - mdc->get_plugged_size = pc_dimm_md_get_region_size; - mdc->get_region_size = pc_dimm_md_get_region_size; + mdc->get_plugged_size = memory_device_get_region_size; + mdc->get_memory_region = pc_dimm_md_get_memory_region; mdc->fill_device_info = pc_dimm_md_fill_device_info; } diff --git a/hw/mem/trace-events b/hw/mem/trace-events index e150dcc497..0f2f278ff2 100644 --- a/hw/mem/trace-events +++ b/hw/mem/trace-events @@ -2,4 +2,7 @@ # hw/mem/pc-dimm.c mhp_pc_dimm_assigned_slot(int slot) "%d" -mhp_pc_dimm_assigned_address(uint64_t addr) "0x%"PRIx64 +# hw/mem/memory-device.c +memory_device_pre_plug(const char *id, uint64_t addr) "id=%s addr=0x%"PRIx64 +memory_device_plug(const char *id, uint64_t addr) "id=%s addr=0x%"PRIx64 +memory_device_unplug(const char *id, uint64_t addr) "id=%s addr=0x%"PRIx64 diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 24ad0ad024..1cd8aac658 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -992,9 +992,9 @@ static void gt64120_pci_set_irq(void *opaque, int irq_num, int level) } -static void gt64120_reset(void *opaque) +static void gt64120_reset(DeviceState *dev) { - GT64120State *s = opaque; + GT64120State *s = GT64120_PCI_HOST_BRIDGE(dev); /* FIXME: Malta specific hw assumptions ahead */ @@ -1184,16 +1184,6 @@ PCIBus *gt64120_register(qemu_irq *pic) return phb->bus; } -static int gt64120_init(SysBusDevice *dev) -{ - GT64120State *s; - - s = GT64120_PCI_HOST_BRIDGE(dev); - - qemu_register_reset(gt64120_reset, s); - return 0; -} - static void gt64120_pci_realize(PCIDevice *d, Error **errp) { /* FIXME: Malta specific hw assumptions ahead */ @@ -1241,9 +1231,9 @@ static const TypeInfo gt64120_pci_info = { static void gt64120_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass); - sdc->init = gt64120_init; + set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); + dc->reset = gt64120_reset; dc->vmsd = &vmstate_gt64120; } diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 29b90bacf3..c1cf0fe12e 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1422,23 +1422,10 @@ void mips_malta_init(MachineState *machine) pci_vga_init(pci_bus); } -static int mips_malta_sysbus_device_init(SysBusDevice *sysbusdev) -{ - return 0; -} - -static void mips_malta_class_init(ObjectClass *klass, void *data) -{ - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); - - k->init = mips_malta_sysbus_device_init; -} - static const TypeInfo mips_malta_device = { .name = TYPE_MIPS_MALTA, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(MaltaState), - .class_init = mips_malta_class_init, }; static void mips_malta_machine_init(MachineClass *mc) diff --git a/hw/net/etraxfs_eth.c b/hw/net/etraxfs_eth.c index a6932432b1..36855804db 100644 --- a/hw/net/etraxfs_eth.c +++ b/hw/net/etraxfs_eth.c @@ -23,6 +23,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "hw/sysbus.h" #include "net/net.h" #include "hw/cris/etraxfs.h" @@ -126,7 +127,7 @@ tdk_write(struct qemu_phy *phy, unsigned int req, unsigned int data) } static void -tdk_init(struct qemu_phy *phy) +tdk_reset(struct qemu_phy *phy) { phy->regs[0] = 0x3100; /* PHY Id. */ @@ -135,9 +136,6 @@ tdk_init(struct qemu_phy *phy) /* Autonegotiation advertisement reg. */ phy->regs[4] = 0x01E1; phy->link = 1; - - phy->read = tdk_read; - phy->write = tdk_write; } struct qemu_mdio @@ -584,14 +582,35 @@ static NetClientInfo net_etraxfs_info = { .link_status_changed = eth_set_link, }; -static int fs_eth_init(SysBusDevice *sbd) +static void etraxfs_eth_reset(DeviceState *dev) +{ + ETRAXFSEthState *s = ETRAX_FS_ETH(dev); + + memset(s->regs, 0, sizeof(s->regs)); + memset(s->macaddr, 0, sizeof(s->macaddr)); + s->duplex_mismatch = 0; + + s->mdio_bus.mdc = 0; + s->mdio_bus.mdio = 0; + s->mdio_bus.state = 0; + s->mdio_bus.drive = 0; + s->mdio_bus.cnt = 0; + s->mdio_bus.addr = 0; + s->mdio_bus.opc = 0; + s->mdio_bus.req = 0; + s->mdio_bus.data = 0; + + tdk_reset(&s->phy); +} + +static void etraxfs_eth_realize(DeviceState *dev, Error **errp) { - DeviceState *dev = DEVICE(sbd); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); ETRAXFSEthState *s = ETRAX_FS_ETH(dev); if (!s->dma_out || !s->dma_in) { - error_report("Unconnected ETRAX-FS Ethernet MAC"); - return -1; + error_setg(errp, "Unconnected ETRAX-FS Ethernet MAC"); + return; } s->dma_out->client.push = eth_tx_push; @@ -608,10 +627,9 @@ static int fs_eth_init(SysBusDevice *sbd) object_get_typename(OBJECT(s)), dev->id, s); qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a); - - tdk_init(&s->phy); + s->phy.read = tdk_read; + s->phy.write = tdk_write; mdio_attach(&s->mdio_bus, &s->phy, s->phyaddr); - return 0; } static Property etraxfs_eth_properties[] = { @@ -625,9 +643,9 @@ static Property etraxfs_eth_properties[] = { static void etraxfs_eth_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); - k->init = fs_eth_init; + dc->realize = etraxfs_eth_realize; + dc->reset = etraxfs_eth_reset; dc->props = etraxfs_eth_properties; /* Reason: pointer properties "dma_out", "dma_in" */ dc->user_creatable = false; diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c index b9032dac59..a6269d9463 100644 --- a/hw/net/lan9118.c +++ b/hw/net/lan9118.c @@ -1320,9 +1320,9 @@ static NetClientInfo net_lan9118_info = { .link_status_changed = lan9118_set_link, }; -static int lan9118_init1(SysBusDevice *sbd) +static void lan9118_realize(DeviceState *dev, Error **errp) { - DeviceState *dev = DEVICE(sbd); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); lan9118_state *s = LAN9118(dev); QEMUBH *bh; int i; @@ -1349,8 +1349,6 @@ static int lan9118_init1(SysBusDevice *sbd) s->timer = ptimer_init(bh, PTIMER_POLICY_DEFAULT); ptimer_set_freq(s->timer, 10000); ptimer_set_limit(s->timer, 0xffff, 1); - - return 0; } static Property lan9118_properties[] = { @@ -1362,12 +1360,11 @@ static Property lan9118_properties[] = { static void lan9118_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); - k->init = lan9118_init1; dc->reset = lan9118_reset; dc->props = lan9118_properties; dc->vmsd = &vmstate_lan9118; + dc->realize = lan9118_realize; } static const TypeInfo lan9118_info = { diff --git a/hw/net/lance.c b/hw/net/lance.c index a08d5ac6a8..f987b2fd18 100644 --- a/hw/net/lance.c +++ b/hw/net/lance.c @@ -97,9 +97,9 @@ static const VMStateDescription vmstate_lance = { } }; -static int lance_init(SysBusDevice *sbd) +static void lance_realize(DeviceState *dev, Error **errp) { - DeviceState *dev = DEVICE(sbd); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); SysBusPCNetState *d = SYSBUS_PCNET(dev); PCNetState *s = &d->state; @@ -115,7 +115,6 @@ static int lance_init(SysBusDevice *sbd) s->phys_mem_read = ledma_memory_read; s->phys_mem_write = ledma_memory_write; pcnet_common_init(dev, s, &net_lance_info); - return 0; } static void lance_reset(DeviceState *dev) @@ -144,9 +143,8 @@ static Property lance_properties[] = { static void lance_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); - k->init = lance_init; + dc->realize = lance_realize; set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); dc->fw_name = "ethernet"; dc->reset = lance_reset; diff --git a/hw/net/milkymist-minimac2.c b/hw/net/milkymist-minimac2.c index 664ac34f25..85c9fc0b65 100644 --- a/hw/net/milkymist-minimac2.c +++ b/hw/net/milkymist-minimac2.c @@ -457,9 +457,9 @@ static NetClientInfo net_milkymist_minimac2_info = { .receive = minimac2_rx, }; -static int milkymist_minimac2_init(SysBusDevice *sbd) +static void milkymist_minimac2_realize(DeviceState *dev, Error **errp) { - DeviceState *dev = DEVICE(sbd); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); MilkymistMinimac2State *s = MILKYMIST_MINIMAC2(dev); size_t buffers_size = TARGET_PAGE_ALIGN(3 * MINIMAC2_BUFFER_SIZE); @@ -484,8 +484,6 @@ static int milkymist_minimac2_init(SysBusDevice *sbd) s->nic = qemu_new_nic(&net_milkymist_minimac2_info, &s->conf, object_get_typename(OBJECT(dev)), dev->id, s); qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a); - - return 0; } static const VMStateDescription vmstate_milkymist_minimac2_mdio = { @@ -526,9 +524,8 @@ static Property milkymist_minimac2_properties[] = { static void milkymist_minimac2_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); - k->init = milkymist_minimac2_init; + dc->realize = milkymist_minimac2_realize; dc->reset = milkymist_minimac2_reset; dc->vmsd = &vmstate_milkymist_minimac2; dc->props = milkymist_minimac2_properties; diff --git a/hw/net/mipsnet.c b/hw/net/mipsnet.c index 5a63df7ccb..03b3104278 100644 --- a/hw/net/mipsnet.c +++ b/hw/net/mipsnet.c @@ -236,9 +236,9 @@ static const MemoryRegionOps mipsnet_ioport_ops = { .impl.max_access_size = 4, }; -static int mipsnet_sysbus_init(SysBusDevice *sbd) +static void mipsnet_realize(DeviceState *dev, Error **errp) { - DeviceState *dev = DEVICE(sbd); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); MIPSnetState *s = MIPS_NET(dev); memory_region_init_io(&s->io, OBJECT(dev), &mipsnet_ioport_ops, s, @@ -249,8 +249,6 @@ static int mipsnet_sysbus_init(SysBusDevice *sbd) s->nic = qemu_new_nic(&net_mipsnet_info, &s->conf, object_get_typename(OBJECT(dev)), dev->id, s); qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a); - - return 0; } static void mipsnet_sysbus_reset(DeviceState *dev) @@ -267,9 +265,8 @@ static Property mipsnet_properties[] = { static void mipsnet_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); - k->init = mipsnet_sysbus_init; + dc->realize = mipsnet_realize; set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); dc->desc = "MIPS Simulator network device"; dc->reset = mipsnet_sysbus_reset; diff --git a/hw/net/opencores_eth.c b/hw/net/opencores_eth.c index d42b79c08c..d6f54f8d82 100644 --- a/hw/net/opencores_eth.c +++ b/hw/net/opencores_eth.c @@ -715,9 +715,9 @@ static const MemoryRegionOps open_eth_desc_ops = { .write = open_eth_desc_write, }; -static int sysbus_open_eth_init(SysBusDevice *sbd) +static void sysbus_open_eth_realize(DeviceState *dev, Error **errp) { - DeviceState *dev = DEVICE(sbd); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); OpenEthState *s = OPEN_ETH(dev); memory_region_init_io(&s->reg_io, OBJECT(dev), &open_eth_reg_ops, s, @@ -732,7 +732,6 @@ static int sysbus_open_eth_init(SysBusDevice *sbd) s->nic = qemu_new_nic(&net_open_eth_info, &s->conf, object_get_typename(OBJECT(s)), dev->id, s); - return 0; } static void qdev_open_eth_reset(DeviceState *dev) @@ -750,9 +749,8 @@ static Property open_eth_properties[] = { static void open_eth_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); - k->init = sysbus_open_eth_init; + dc->realize = sysbus_open_eth_realize; set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); dc->desc = "Opencores 10/100 Mbit Ethernet"; dc->reset = qdev_open_eth_reset; diff --git a/hw/net/smc91c111.c b/hw/net/smc91c111.c index d2fd2040e8..99da2d9297 100644 --- a/hw/net/smc91c111.c +++ b/hw/net/smc91c111.c @@ -766,9 +766,9 @@ static NetClientInfo net_smc91c111_info = { .receive = smc91c111_receive, }; -static int smc91c111_init1(SysBusDevice *sbd) +static void smc91c111_realize(DeviceState *dev, Error **errp) { - DeviceState *dev = DEVICE(sbd); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); smc91c111_state *s = SMC91C111(dev); memory_region_init_io(&s->mmio, OBJECT(s), &smc91c111_mem_ops, s, @@ -780,7 +780,6 @@ static int smc91c111_init1(SysBusDevice *sbd) object_get_typename(OBJECT(dev)), dev->id, s); qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a); /* ??? Save/restore. */ - return 0; } static Property smc91c111_properties[] = { @@ -791,9 +790,8 @@ static Property smc91c111_properties[] = { static void smc91c111_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); - k->init = smc91c111_init1; + dc->realize = smc91c111_realize; dc->reset = smc91c111_reset; dc->vmsd = &vmstate_smc91c111; dc->props = smc91c111_properties; diff --git a/hw/net/stellaris_enet.c b/hw/net/stellaris_enet.c index 165562d788..b3375ebb45 100644 --- a/hw/net/stellaris_enet.c +++ b/hw/net/stellaris_enet.c @@ -457,8 +457,10 @@ static const MemoryRegionOps stellaris_enet_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -static void stellaris_enet_reset(stellaris_enet_state *s) +static void stellaris_enet_reset(DeviceState *dev) { + stellaris_enet_state *s = STELLARIS_ENET(dev); + s->mdv = 0x80; s->rctl = SE_RCTL_BADCRC; s->im = SE_INT_PHY | SE_INT_MD | SE_INT_RXER | SE_INT_FOV | SE_INT_TXEMP @@ -473,9 +475,9 @@ static NetClientInfo net_stellaris_enet_info = { .receive = stellaris_enet_receive, }; -static int stellaris_enet_init(SysBusDevice *sbd) +static void stellaris_enet_realize(DeviceState *dev, Error **errp) { - DeviceState *dev = DEVICE(sbd); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); stellaris_enet_state *s = STELLARIS_ENET(dev); memory_region_init_io(&s->mmio, OBJECT(s), &stellaris_enet_ops, s, @@ -487,9 +489,6 @@ static int stellaris_enet_init(SysBusDevice *sbd) s->nic = qemu_new_nic(&net_stellaris_enet_info, &s->conf, object_get_typename(OBJECT(dev)), dev->id, s); qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a); - - stellaris_enet_reset(s); - return 0; } static Property stellaris_enet_properties[] = { @@ -500,9 +499,9 @@ static Property stellaris_enet_properties[] = { static void stellaris_enet_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); - k->init = stellaris_enet_init; + dc->realize = stellaris_enet_realize; + dc->reset = stellaris_enet_reset; dc->props = stellaris_enet_properties; dc->vmsd = &vmstate_stellaris_enet; } diff --git a/hw/net/xgmac.c b/hw/net/xgmac.c index fa001563d3..63f5a62ebf 100644 --- a/hw/net/xgmac.c +++ b/hw/net/xgmac.c @@ -374,9 +374,9 @@ static NetClientInfo net_xgmac_enet_info = { .receive = eth_rx, }; -static int xgmac_enet_init(SysBusDevice *sbd) +static void xgmac_enet_realize(DeviceState *dev, Error **errp) { - DeviceState *dev = DEVICE(sbd); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); XgmacState *s = XGMAC(dev); memory_region_init_io(&s->iomem, OBJECT(s), &enet_mem_ops, s, @@ -397,8 +397,6 @@ static int xgmac_enet_init(SysBusDevice *sbd) (s->conf.macaddr.a[2] << 16) | (s->conf.macaddr.a[1] << 8) | s->conf.macaddr.a[0]; - - return 0; } static Property xgmac_properties[] = { @@ -408,10 +406,9 @@ static Property xgmac_properties[] = { static void xgmac_enet_class_init(ObjectClass *klass, void *data) { - SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); - sbc->init = xgmac_enet_init; + dc->realize = xgmac_enet_realize; dc->vmsd = &vmstate_xgmac; dc->props = xgmac_properties; } diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index 9868e2eccc..9f33582706 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -595,7 +595,7 @@ static const VMStateDescription vmstate_bonito = { } }; -static int bonito_pcihost_initfn(SysBusDevice *dev) +static void bonito_pcihost_realize(DeviceState *dev, Error **errp) { PCIHostState *phb = PCI_HOST_BRIDGE(dev); @@ -603,8 +603,6 @@ static int bonito_pcihost_initfn(SysBusDevice *dev) pci_bonito_set_irq, pci_bonito_map_irq, dev, get_system_memory(), get_system_io(), 0x28, 32, TYPE_PCI_BUS); - - return 0; } static void bonito_realize(PCIDevice *dev, Error **errp) @@ -684,7 +682,6 @@ PCIBus *bonito_init(qemu_irq *pic) pcihost->pic = pic; qdev_init_nofail(dev); - /* set the pcihost pointer before bonito_initfn is called */ d = pci_create(phb->bus, PCI_DEVFN(0, 0), TYPE_PCI_BONITO); s = PCI_BONITO(d); s->pcihost = pcihost; @@ -726,9 +723,9 @@ static const TypeInfo bonito_info = { static void bonito_pcihost_class_init(ObjectClass *klass, void *data) { - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); - k->init = bonito_pcihost_initfn; + dc->realize = bonito_pcihost_realize; } static const TypeInfo bonito_pcihost_info = { diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 98868d893a..c08130facb 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3128,14 +3128,12 @@ static void spapr_memory_plug(HotplugHandler *hotplug_dev, DeviceState *dev, Error *local_err = NULL; sPAPRMachineState *ms = SPAPR_MACHINE(hotplug_dev); PCDIMMDevice *dimm = PC_DIMM(dev); - PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm); - MemoryRegion *mr = ddc->get_memory_region(dimm, &error_abort); uint64_t size, addr; uint32_t node; - size = memory_region_size(mr); + size = memory_device_get_region_size(MEMORY_DEVICE(dev), &error_abort); - pc_dimm_plug(dev, MACHINE(ms), &local_err); + pc_dimm_plug(dimm, MACHINE(ms), &local_err); if (local_err) { goto out; } @@ -3158,7 +3156,7 @@ static void spapr_memory_plug(HotplugHandler *hotplug_dev, DeviceState *dev, return; out_unplug: - pc_dimm_unplug(dev, MACHINE(ms)); + pc_dimm_unplug(dimm, MACHINE(ms)); out: error_propagate(errp, local_err); } @@ -3169,9 +3167,7 @@ static void spapr_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, const sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(hotplug_dev); sPAPRMachineState *spapr = SPAPR_MACHINE(hotplug_dev); PCDIMMDevice *dimm = PC_DIMM(dev); - PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm); Error *local_err = NULL; - MemoryRegion *mr; uint64_t size; Object *memdev; hwaddr pagesize; @@ -3181,11 +3177,11 @@ static void spapr_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, return; } - mr = ddc->get_memory_region(dimm, errp); - if (!mr) { + size = memory_device_get_region_size(MEMORY_DEVICE(dimm), &local_err); + if (local_err) { + error_propagate(errp, local_err); return; } - size = memory_region_size(mr); if (size % SPAPR_MEMORY_BLOCK_SIZE) { error_setg(errp, "Hotplugged memory size must be a multiple of " @@ -3202,7 +3198,7 @@ static void spapr_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, return; } - pc_dimm_pre_plug(dev, MACHINE(hotplug_dev), NULL, errp); + pc_dimm_pre_plug(dimm, MACHINE(hotplug_dev), NULL, errp); } struct sPAPRDIMMState { @@ -3257,9 +3253,8 @@ static sPAPRDIMMState *spapr_recover_pending_dimm_state(sPAPRMachineState *ms, PCDIMMDevice *dimm) { sPAPRDRConnector *drc; - PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm); - MemoryRegion *mr = ddc->get_memory_region(dimm, &error_abort); - uint64_t size = memory_region_size(mr); + uint64_t size = memory_device_get_region_size(MEMORY_DEVICE(dimm), + &error_abort); uint32_t nr_lmbs = size / SPAPR_MEMORY_BLOCK_SIZE; uint32_t avail_lmbs = 0; uint64_t addr_start, addr; @@ -3314,7 +3309,7 @@ static void spapr_memory_unplug(HotplugHandler *hotplug_dev, DeviceState *dev) sPAPRMachineState *spapr = SPAPR_MACHINE(hotplug_dev); sPAPRDIMMState *ds = spapr_pending_dimm_unplugs_find(spapr, PC_DIMM(dev)); - pc_dimm_unplug(dev, MACHINE(hotplug_dev)); + pc_dimm_unplug(PC_DIMM(dev), MACHINE(hotplug_dev)); object_unparent(OBJECT(dev)); spapr_pending_dimm_unplugs_remove(spapr, ds); } @@ -3325,14 +3320,12 @@ static void spapr_memory_unplug_request(HotplugHandler *hotplug_dev, sPAPRMachineState *spapr = SPAPR_MACHINE(hotplug_dev); Error *local_err = NULL; PCDIMMDevice *dimm = PC_DIMM(dev); - PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm); - MemoryRegion *mr = ddc->get_memory_region(dimm, &error_abort); uint32_t nr_lmbs; uint64_t size, addr_start, addr; int i; sPAPRDRConnector *drc; - size = memory_region_size(mr); + size = memory_device_get_region_size(MEMORY_DEVICE(dimm), &error_abort); nr_lmbs = size / SPAPR_MEMORY_BLOCK_SIZE; addr_start = object_property_get_uint(OBJECT(dimm), PC_DIMM_ADDR_PROP, diff --git a/hw/sh4/sh_pci.c b/hw/sh4/sh_pci.c index 4ec2e35500..379d0685ed 100644 --- a/hw/sh4/sh_pci.c +++ b/hw/sh4/sh_pci.c @@ -120,16 +120,15 @@ static void sh_pci_set_irq(void *opaque, int irq_num, int level) qemu_set_irq(pic[irq_num], level); } -static int sh_pci_device_init(SysBusDevice *dev) +static void sh_pci_device_realize(DeviceState *dev, Error **errp) { - PCIHostState *phb; - SHPCIState *s; + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + SHPCIState *s = SH_PCI_HOST_BRIDGE(dev); + PCIHostState *phb = PCI_HOST_BRIDGE(s); int i; - s = SH_PCI_HOST_BRIDGE(dev); - phb = PCI_HOST_BRIDGE(s); for (i = 0; i < 4; i++) { - sysbus_init_irq(dev, &s->irq[i]); + sysbus_init_irq(sbd, &s->irq[i]); } phb->bus = pci_register_root_bus(DEVICE(dev), "pci", sh_pci_set_irq, sh_pci_map_irq, @@ -143,13 +142,12 @@ static int sh_pci_device_init(SysBusDevice *dev) &s->memconfig_p4, 0, 0x224); memory_region_init_alias(&s->isa, OBJECT(s), "sh_pci.isa", get_system_io(), 0, 0x40000); - sysbus_init_mmio(dev, &s->memconfig_p4); - sysbus_init_mmio(dev, &s->memconfig_a7); + sysbus_init_mmio(sbd, &s->memconfig_p4); + sysbus_init_mmio(sbd, &s->memconfig_a7); s->iobr = 0xfe240000; memory_region_add_subregion(get_system_memory(), s->iobr, &s->isa); s->dev = pci_create_simple(phb->bus, PCI_DEVFN(0, 0), "sh_pci_host"); - return 0; } static void sh_pci_host_realize(PCIDevice *d, Error **errp) @@ -187,9 +185,9 @@ static const TypeInfo sh_pci_host_info = { static void sh_pci_device_class_init(ObjectClass *klass, void *data) { - SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); - sdc->init = sh_pci_device_init; + dc->realize = sh_pci_device_realize; } static const TypeInfo sh_pci_device_info = { diff --git a/hw/sparc64/niagara.c b/hw/sparc64/niagara.c index 4fa8cb2904..f8a856f611 100644 --- a/hw/sparc64/niagara.c +++ b/hw/sparc64/niagara.c @@ -29,7 +29,7 @@ #include "hw/hw.h" #include "hw/boards.h" #include "hw/char/serial.h" -#include "hw/empty_slot.h" +#include "hw/misc/unimp.h" #include "hw/loader.h" #include "hw/sparc/sparc64.h" #include "hw/timer/sun4v-rtc.h" @@ -161,7 +161,7 @@ static void niagara_init(MachineState *machine) serial_mm_init(sysmem, NIAGARA_UART_BASE, 0, NULL, 115200, serial_hd(0), DEVICE_BIG_ENDIAN); } - empty_slot_init(NIAGARA_IOBBASE, NIAGARA_IOBSIZE); + create_unimplemented_device("sun4v-iob", NIAGARA_IOBBASE, NIAGARA_IOBSIZE); sun4v_rtc_init(NIAGARA_RTC_BASE); } diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c index 83585bc8b2..3dae303d5b 100644 --- a/hw/ssi/xilinx_spi.c +++ b/hw/ssi/xilinx_spi.c @@ -319,9 +319,9 @@ static const MemoryRegionOps spi_ops = { } }; -static int xilinx_spi_init(SysBusDevice *sbd) +static void xilinx_spi_realize(DeviceState *dev, Error **errp) { - DeviceState *dev = DEVICE(sbd); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); XilinxSPI *s = XILINX_SPI(dev); int i; @@ -344,8 +344,6 @@ static int xilinx_spi_init(SysBusDevice *sbd) fifo8_create(&s->tx_fifo, FIFO_CAPACITY); fifo8_create(&s->rx_fifo, FIFO_CAPACITY); - - return 0; } static const VMStateDescription vmstate_xilinx_spi = { @@ -368,9 +366,8 @@ static Property xilinx_spi_properties[] = { static void xilinx_spi_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); - k->init = xilinx_spi_init; + dc->realize = xilinx_spi_realize; dc->reset = xlx_spi_reset; dc->props = xilinx_spi_properties; dc->vmsd = &vmstate_xilinx_spi; diff --git a/hw/timer/sun4v-rtc.c b/hw/timer/sun4v-rtc.c index 310523225f..4e7f6a1eff 100644 --- a/hw/timer/sun4v-rtc.c +++ b/hw/timer/sun4v-rtc.c @@ -14,15 +14,8 @@ #include "hw/sysbus.h" #include "qemu/timer.h" #include "hw/timer/sun4v-rtc.h" +#include "trace.h" -//#define DEBUG_SUN4V_RTC - -#ifdef DEBUG_SUN4V_RTC -#define DPRINTF(fmt, ...) \ - do { printf("sun4v_rtc: " fmt , ## __VA_ARGS__); } while (0) -#else -#define DPRINTF(fmt, ...) do {} while (0) -#endif #define TYPE_SUN4V_RTC "sun4v_rtc" #define SUN4V_RTC(obj) OBJECT_CHECK(Sun4vRtc, (obj), TYPE_SUN4V_RTC) @@ -41,14 +34,14 @@ static uint64_t sun4v_rtc_read(void *opaque, hwaddr addr, /* accessing the high 32 bits */ val >>= 32; } - DPRINTF("read from " TARGET_FMT_plx " val %lx\n", addr, val); + trace_sun4v_rtc_read(addr, val); return val; } static void sun4v_rtc_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { - DPRINTF("write 0x%x to " TARGET_FMT_plx "\n", (unsigned)val, addr); + trace_sun4v_rtc_read(addr, val); } static const MemoryRegionOps sun4v_rtc_ops = { @@ -70,21 +63,21 @@ void sun4v_rtc_init(hwaddr addr) sysbus_mmio_map(s, 0, addr); } -static int sun4v_rtc_init1(SysBusDevice *dev) +static void sun4v_rtc_realize(DeviceState *dev, Error **errp) { + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); Sun4vRtc *s = SUN4V_RTC(dev); memory_region_init_io(&s->iomem, OBJECT(s), &sun4v_rtc_ops, s, "sun4v-rtc", 0x08ULL); - sysbus_init_mmio(dev, &s->iomem); - return 0; + sysbus_init_mmio(sbd, &s->iomem); } static void sun4v_rtc_class_init(ObjectClass *klass, void *data) { - SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); + DeviceClass *dc = DEVICE_CLASS(klass); - k->init = sun4v_rtc_init1; + dc->realize = sun4v_rtc_realize; } static const TypeInfo sun4v_rtc_info = { diff --git a/hw/timer/trace-events b/hw/timer/trace-events index fa4213df5b..75bd3b1042 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -56,7 +56,7 @@ systick_timer_tick(void) "systick reload" systick_read(uint64_t addr, uint32_t value, unsigned size) "systick read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" systick_write(uint64_t addr, uint32_t value, unsigned size) "systick write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" -# hw/char/cmsdk_apb_timer.c +# hw/timer/cmsdk_apb_timer.c cmsdk_apb_timer_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB timer read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" cmsdk_apb_timer_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB timer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" cmsdk_apb_timer_reset(void) "CMSDK APB timer: reset" @@ -66,5 +66,9 @@ cmsdk_apb_dualtimer_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK A cmsdk_apb_dualtimer_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB dualtimer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" cmsdk_apb_dualtimer_reset(void) "CMSDK APB dualtimer: reset" +# hw/timer/sun4v-rtc.c +sun4v_rtc_read(uint64_t addr, uint64_t value) "read: addr 0x%" PRIx64 " value 0x%" PRIx64 +sun4v_rtc_write(uint64_t addr, uint64_t value) "write: addr 0x%" PRIx64 " value 0x%" PRIx64 + # hw/timer/xlnx-zynqmp-rtc.c xlnx_zynqmp_rtc_gettime(int year, int month, int day, int hour, int min, int sec) "Get time from host: %d-%d-%d %2d:%02d:%02d" diff --git a/hw/usb/ccid-card-emulated.c b/hw/usb/ccid-card-emulated.c index 5c8b3c9907..25976ed84f 100644 --- a/hw/usb/ccid-card-emulated.c +++ b/hw/usb/ccid-card-emulated.c @@ -409,6 +409,12 @@ static int init_event_notifier(EmulatedState *card, Error **errp) return 0; } +static void clean_event_notifier(EmulatedState *card) +{ + event_notifier_set_handler(&card->notifier, NULL); + event_notifier_cleanup(&card->notifier); +} + #define CERTIFICATES_DEFAULT_DB "/etc/pki/nssdb" #define CERTIFICATES_ARGS_TEMPLATE\ "db=\"%s\" use_hw=no soft=(,Virtual Reader,CAC,,%s,%s,%s)" @@ -493,7 +499,7 @@ static void emulated_realize(CCIDCardState *base, Error **errp) card->reader = NULL; card->quit_apdu_thread = 0; if (init_event_notifier(card, errp) < 0) { - return; + goto out1; } card->backend = 0; @@ -507,7 +513,7 @@ static void emulated_realize(CCIDCardState *base, Error **errp) for (ptable = backend_enum_table; ptable->name != NULL; ++ptable) { error_append_hint(errp, "%s\n", ptable->name); } - return; + goto out2; } /* TODO: a passthru backened that works on local machine. third card type?*/ @@ -517,31 +523,39 @@ static void emulated_realize(CCIDCardState *base, Error **errp) } else { error_setg(errp, "%s: you must provide all three certs for" " certificates backend", TYPE_EMULATED_CCID); - return; + goto out2; } } else { if (card->backend != BACKEND_NSS_EMULATED) { error_setg(errp, "%s: bad backend specified. The options are:%s" " (default), %s.", TYPE_EMULATED_CCID, BACKEND_NSS_EMULATED_NAME, BACKEND_CERTIFICATES_NAME); - return; + goto out2; } if (card->cert1 != NULL || card->cert2 != NULL || card->cert3 != NULL) { error_setg(errp, "%s: unexpected cert parameters to nss emulated " "backend", TYPE_EMULATED_CCID); - return; + goto out2; } /* default to mirroring the local hardware readers */ ret = wrap_vcard_emul_init(NULL); } if (ret != VCARD_EMUL_OK) { error_setg(errp, "%s: failed to initialize vcard", TYPE_EMULATED_CCID); - return; + goto out2; } qemu_thread_create(&card->event_thread_id, "ccid/event", event_thread, card, QEMU_THREAD_JOINABLE); qemu_thread_create(&card->apdu_thread_id, "ccid/apdu", handle_apdu_thread, card, QEMU_THREAD_JOINABLE); + +out2: + clean_event_notifier(card); +out1: + qemu_cond_destroy(&card->handle_apdu_cond); + qemu_mutex_destroy(&card->handle_apdu_mutex); + qemu_mutex_destroy(&card->vreader_mutex); + qemu_mutex_destroy(&card->event_list_mutex); } static void emulated_unrealize(CCIDCardState *base, Error **errp) @@ -556,6 +570,7 @@ static void emulated_unrealize(CCIDCardState *base, Error **errp) qemu_cond_signal(&card->handle_apdu_cond); qemu_thread_join(&card->apdu_thread_id); + clean_event_notifier(card); /* threads exited, can destroy all condvars/mutexes */ qemu_cond_destroy(&card->handle_apdu_cond); qemu_mutex_destroy(&card->handle_apdu_mutex); diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index 66656a1133..c34cf5b73a 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -57,7 +57,7 @@ typedef struct { qemu_irq irq; MemoryRegion mem; AddressSpace *as; - int num_ports; + uint32_t num_ports; const char *name; QEMUTimer *eof_timer; @@ -1850,7 +1850,7 @@ static USBBusOps ohci_bus_ops = { }; static void usb_ohci_init(OHCIState *ohci, DeviceState *dev, - int num_ports, dma_addr_t localmem_base, + uint32_t num_ports, dma_addr_t localmem_base, char *masterbus, uint32_t firstport, AddressSpace *as, Error **errp) { @@ -1860,7 +1860,7 @@ static void usb_ohci_init(OHCIState *ohci, DeviceState *dev, ohci->as = as; if (num_ports > OHCI_MAX_PORTS) { - error_setg(errp, "OHCI num-ports=%d is too big (limit is %d ports)", + error_setg(errp, "OHCI num-ports=%u is too big (limit is %u ports)", num_ports, OHCI_MAX_PORTS); return; } diff --git a/include/block/block_int.h b/include/block/block_int.h index 92ecbd866e..f605622216 100644 --- a/include/block/block_int.h +++ b/include/block/block_int.h @@ -1155,7 +1155,7 @@ bool blk_dev_is_medium_locked(BlockBackend *blk); void bdrv_set_dirty(BlockDriverState *bs, int64_t offset, int64_t bytes); void bdrv_clear_dirty_bitmap(BdrvDirtyBitmap *bitmap, HBitmap **out); -void bdrv_undo_clear_dirty_bitmap(BdrvDirtyBitmap *bitmap, HBitmap *in); +void bdrv_restore_dirty_bitmap(BdrvDirtyBitmap *bitmap, HBitmap *backup); void bdrv_inc_in_flight(BlockDriverState *bs); void bdrv_dec_in_flight(BlockDriverState *bs); diff --git a/include/block/dirty-bitmap.h b/include/block/dirty-bitmap.h index 259bd27c40..8f38a3dec1 100644 --- a/include/block/dirty-bitmap.h +++ b/include/block/dirty-bitmap.h @@ -26,7 +26,6 @@ BdrvDirtyBitmap *bdrv_find_dirty_bitmap(BlockDriverState *bs, const char *name); void bdrv_release_dirty_bitmap(BlockDriverState *bs, BdrvDirtyBitmap *bitmap); void bdrv_release_named_dirty_bitmaps(BlockDriverState *bs); -void bdrv_release_persistent_dirty_bitmaps(BlockDriverState *bs); void bdrv_remove_persistent_dirty_bitmap(BlockDriverState *bs, const char *name, Error **errp); @@ -71,7 +70,8 @@ void bdrv_dirty_bitmap_set_persistance(BdrvDirtyBitmap *bitmap, bool persistent); void bdrv_dirty_bitmap_set_qmp_locked(BdrvDirtyBitmap *bitmap, bool qmp_locked); void bdrv_merge_dirty_bitmap(BdrvDirtyBitmap *dest, const BdrvDirtyBitmap *src, - Error **errp); + HBitmap **backup, Error **errp); +void bdrv_dirty_bitmap_set_migration(BdrvDirtyBitmap *bitmap, bool migration); /* Functions that require manual locking. */ void bdrv_dirty_bitmap_lock(BdrvDirtyBitmap *bitmap); @@ -94,6 +94,7 @@ bool bdrv_has_readonly_bitmaps(BlockDriverState *bs); bool bdrv_dirty_bitmap_get_autoload(const BdrvDirtyBitmap *bitmap); bool bdrv_dirty_bitmap_get_persistance(BdrvDirtyBitmap *bitmap); bool bdrv_dirty_bitmap_qmp_locked(BdrvDirtyBitmap *bitmap); +bool bdrv_dirty_bitmap_user_locked(BdrvDirtyBitmap *bitmap); bool bdrv_has_changed_persistent_bitmaps(BlockDriverState *bs); BdrvDirtyBitmap *bdrv_dirty_bitmap_next(BlockDriverState *bs, BdrvDirtyBitmap *bitmap); diff --git a/include/disas/bfd.h b/include/disas/bfd.h index 1f69a6e9d3..41b61c85f9 100644 --- a/include/disas/bfd.h +++ b/include/disas/bfd.h @@ -387,6 +387,7 @@ typedef int (*disassembler_ftype) (bfd_vma, disassemble_info *); int print_insn_tci(bfd_vma, disassemble_info*); int print_insn_big_mips (bfd_vma, disassemble_info*); int print_insn_little_mips (bfd_vma, disassemble_info*); +int print_insn_nanomips (bfd_vma, disassemble_info*); int print_insn_i386 (bfd_vma, disassemble_info*); int print_insn_m68k (bfd_vma, disassemble_info*); int print_insn_z8001 (bfd_vma, disassemble_info*); diff --git a/include/elf.h b/include/elf.h index 5f45f9b997..c151164b63 100644 --- a/include/elf.h +++ b/include/elf.h @@ -87,6 +87,8 @@ typedef int64_t Elf64_Sxword; #define EF_MIPS_MACH_LS3A 0x00a20000 /* ST Microelectronics Loongson 3A */ #define EF_MIPS_MACH 0x00ff0000 /* EF_MIPS_MACH_xxx selection mask */ +#define MIPS_ABI_FP_UNKNOWN (-1) /* Unknown FP ABI (internal) */ + #define MIPS_ABI_FP_ANY 0x0 /* FP ABI doesn't matter */ #define MIPS_ABI_FP_DOUBLE 0x1 /* -mdouble-float */ #define MIPS_ABI_FP_SINGLE 0x2 /* -msingle-float */ diff --git a/include/exec/poison.h b/include/exec/poison.h index 97d3b56640..32d53789f8 100644 --- a/include/exec/poison.h +++ b/include/exec/poison.h @@ -75,6 +75,7 @@ #pragma GCC poison CONFIG_M68K_DIS #pragma GCC poison CONFIG_MICROBLAZE_DIS #pragma GCC poison CONFIG_MIPS_DIS +#pragma GCC poison CONFIG_NANOMIPS_DIS #pragma GCC poison CONFIG_MOXIE_DIS #pragma GCC poison CONFIG_NIOS2_DIS #pragma GCC poison CONFIG_PPC_DIS diff --git a/include/hw/audio/wm8750.h b/include/hw/audio/wm8750.h index 84e7a119bb..e12cb886d1 100644 --- a/include/hw/audio/wm8750.h +++ b/include/hw/audio/wm8750.h @@ -17,6 +17,7 @@ #include "hw/hw.h" #define TYPE_WM8750 "wm8750" +#define TYPE_MV88W8618_AUDIO "mv88w8618_audio" typedef void data_req_cb(void *opaque, int free_out, int free_in); diff --git a/include/hw/mem/memory-device.h b/include/hw/mem/memory-device.h index 2853b084b5..e904e194d5 100644 --- a/include/hw/mem/memory-device.h +++ b/include/hw/mem/memory-device.h @@ -29,23 +29,81 @@ typedef struct MemoryDeviceState { Object parent_obj; } MemoryDeviceState; +/** + * MemoryDeviceClass: + * + * All memory devices need to implement TYPE_MEMORY_DEVICE as an interface. + * + * A memory device is a device that owns a memory region which is + * mapped into guest physical address space at a certain address. The + * address in guest physical memory can either be specified explicitly + * or get assigned automatically. + * + * Conceptually, memory devices only span one memory region. If multiple + * successive memory regions are used, a covering memory region has to + * be provided. Scattered memory regions are not supported for single + * devices. + */ typedef struct MemoryDeviceClass { + /* private */ InterfaceClass parent_class; + /* + * Return the address of the memory device in guest physical memory. + * + * Called when (un)plugging a memory device or when iterating over + * all memory devices mapped into guest physical address space. + * + * If "0" is returned, no address has been specified by the user and + * no address has been assigned to this memory device yet. + */ uint64_t (*get_addr)(const MemoryDeviceState *md); - uint64_t (*get_plugged_size)(const MemoryDeviceState *md); - uint64_t (*get_region_size)(const MemoryDeviceState *md); + + /* + * Set the address of the memory device in guest physical memory. + * + * Called when plugging the memory device to configure the determined + * address in guest physical memory. + */ + void (*set_addr)(MemoryDeviceState *md, uint64_t addr, Error **errp); + + /* + * Return the amount of memory provided by the memory device currently + * usable ("plugged") by the VM. + * + * Called when calculating the total amount of ram available to the + * VM (e.g. to report memory stats to the user). + * + * This is helpful for devices that dynamically manage the amount of + * memory accessible by the guest via the reserved memory region. For + * most devices, this corresponds to the size of the memory region. + */ + uint64_t (*get_plugged_size)(const MemoryDeviceState *md, Error **errp); + + /* + * Return the memory region of the memory device. + * + * Called when (un)plugging the memory device, to (un)map the + * memory region in guest physical memory, but also to detect the + * required alignment during address assignment or when the size of the + * memory region is required. + */ + MemoryRegion *(*get_memory_region)(MemoryDeviceState *md, Error **errp); + + /* + * Translate the memory device into #MemoryDeviceInfo. + */ void (*fill_device_info)(const MemoryDeviceState *md, MemoryDeviceInfo *info); } MemoryDeviceClass; MemoryDeviceInfoList *qmp_memory_device_list(void); uint64_t get_plugged_memory_size(void); -uint64_t memory_device_get_free_addr(MachineState *ms, const uint64_t *hint, - uint64_t align, uint64_t size, - Error **errp); -void memory_device_plug_region(MachineState *ms, MemoryRegion *mr, - uint64_t addr); -void memory_device_unplug_region(MachineState *ms, MemoryRegion *mr); +void memory_device_pre_plug(MemoryDeviceState *md, MachineState *ms, + const uint64_t *legacy_align, Error **errp); +void memory_device_plug(MemoryDeviceState *md, MachineState *ms); +void memory_device_unplug(MemoryDeviceState *md, MachineState *ms); +uint64_t memory_device_get_region_size(const MemoryDeviceState *md, + Error **errp); #endif diff --git a/include/hw/mem/pc-dimm.h b/include/hw/mem/pc-dimm.h index b382eb4303..01436b9f50 100644 --- a/include/hw/mem/pc-dimm.h +++ b/include/hw/mem/pc-dimm.h @@ -61,9 +61,6 @@ typedef struct PCDIMMDevice { * PCDIMMDeviceClass: * @realize: called after common dimm is realized so that the dimm based * devices get the chance to do specified operations. - * @get_memory_region: returns #MemoryRegion associated with @dimm which - * is directly mapped into the physical address space of guest. Will not - * fail after the device was realized. * @get_vmstate_memory_region: returns #MemoryRegion which indicates the * memory of @dimm should be kept during live migration. Will not fail * after the device was realized. @@ -74,13 +71,12 @@ typedef struct PCDIMMDeviceClass { /* public */ void (*realize)(PCDIMMDevice *dimm, Error **errp); - MemoryRegion *(*get_memory_region)(PCDIMMDevice *dimm, Error **errp); MemoryRegion *(*get_vmstate_memory_region)(PCDIMMDevice *dimm, Error **errp); } PCDIMMDeviceClass; -void pc_dimm_pre_plug(DeviceState *dev, MachineState *machine, +void pc_dimm_pre_plug(PCDIMMDevice *dimm, MachineState *machine, const uint64_t *legacy_align, Error **errp); -void pc_dimm_plug(DeviceState *dev, MachineState *machine, Error **errp); -void pc_dimm_unplug(DeviceState *dev, MachineState *machine); +void pc_dimm_plug(PCDIMMDevice *dimm, MachineState *machine, Error **errp); +void pc_dimm_unplug(PCDIMMDevice *dimm, MachineState *machine); #endif diff --git a/include/qemu/hbitmap.h b/include/qemu/hbitmap.h index ddca52c48e..a7cb780592 100644 --- a/include/qemu/hbitmap.h +++ b/include/qemu/hbitmap.h @@ -73,16 +73,23 @@ void hbitmap_truncate(HBitmap *hb, uint64_t size); /** * hbitmap_merge: - * @a: The bitmap to store the result in. - * @b: The bitmap to merge into @a. - * @return true if the merge was successful, - * false if it was not attempted. - * - * Merge two bitmaps together. - * A := A (BITOR) B. - * B is left unmodified. + * + * Store result of merging @a and @b into @result. + * @result is allowed to be equal to @a or @b. + * + * Return true if the merge was successful, + * false if it was not attempted. + */ +bool hbitmap_merge(const HBitmap *a, const HBitmap *b, HBitmap *result); + +/** + * hbitmap_can_merge: + * + * hbitmap_can_merge(a, b) && hbitmap_can_merge(a, result) is sufficient and + * necessary for hbitmap_merge will not fail. + * */ -bool hbitmap_merge(HBitmap *a, const HBitmap *b); +bool hbitmap_can_merge(const HBitmap *a, const HBitmap *b); /** * hbitmap_empty: diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 055f6a95ab..5bccd2e243 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1517,11 +1517,25 @@ static void bswap_sym(struct elf_sym *sym) bswaptls(&sym->st_size); bswap16s(&sym->st_shndx); } + +#ifdef TARGET_MIPS +static void bswap_mips_abiflags(Mips_elf_abiflags_v0 *abiflags) +{ + bswap16s(&abiflags->version); + bswap32s(&abiflags->ases); + bswap32s(&abiflags->isa_ext); + bswap32s(&abiflags->flags1); + bswap32s(&abiflags->flags2); +} +#endif #else static inline void bswap_ehdr(struct elfhdr *ehdr) { } static inline void bswap_phdr(struct elf_phdr *phdr, int phnum) { } static inline void bswap_shdr(struct elf_shdr *shdr, int shnum) { } static inline void bswap_sym(struct elf_sym *sym) { } +#ifdef TARGET_MIPS +static inline void bswap_mips_abiflags(Mips_elf_abiflags_v0 *abiflags) { } +#endif #endif #ifdef USE_ELF_CORE_DUMP @@ -2364,6 +2378,26 @@ static void load_elf_image(const char *image_name, int image_fd, goto exit_errmsg; } *pinterp_name = interp_name; +#ifdef TARGET_MIPS + } else if (eppnt->p_type == PT_MIPS_ABIFLAGS) { + Mips_elf_abiflags_v0 abiflags; + if (eppnt->p_filesz < sizeof(Mips_elf_abiflags_v0)) { + errmsg = "Invalid PT_MIPS_ABIFLAGS entry"; + goto exit_errmsg; + } + if (eppnt->p_offset + eppnt->p_filesz <= BPRM_BUF_SIZE) { + memcpy(&abiflags, bprm_buf + eppnt->p_offset, + sizeof(Mips_elf_abiflags_v0)); + } else { + retval = pread(image_fd, &abiflags, sizeof(Mips_elf_abiflags_v0), + eppnt->p_offset); + if (retval != sizeof(Mips_elf_abiflags_v0)) { + goto exit_perror; + } + } + bswap_mips_abiflags(&abiflags); + info->fp_abi = abiflags.fp_abi; +#endif } } @@ -2675,6 +2709,9 @@ int load_elf_binary(struct linux_binprm *bprm, struct image_info *info) target_mmap(0, qemu_host_page_size, PROT_READ | PROT_EXEC, MAP_FIXED | MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); } +#ifdef TARGET_MIPS + info->interp_fp_abi = interp_info.fp_abi; +#endif } bprm->p = create_elf_tables(bprm->p, bprm->argc, bprm->envc, &elf_ex, diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c index c9c20cf8b7..97e495747f 100644 --- a/linux-user/mips/cpu_loop.c +++ b/linux-user/mips/cpu_loop.c @@ -740,6 +740,34 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) struct image_info *info = ts->info; int i; + struct mode_req { + bool single; + bool soft; + bool fr1; + bool frdefault; + bool fre; + }; + + static const struct mode_req fpu_reqs[] = { + [MIPS_ABI_FP_ANY] = { true, true, true, true, true }, + [MIPS_ABI_FP_DOUBLE] = { false, false, false, true, true }, + [MIPS_ABI_FP_SINGLE] = { true, false, false, false, false }, + [MIPS_ABI_FP_SOFT] = { false, true, false, false, false }, + [MIPS_ABI_FP_OLD_64] = { false, false, false, false, false }, + [MIPS_ABI_FP_XX] = { false, false, true, true, true }, + [MIPS_ABI_FP_64] = { false, false, true, false, false }, + [MIPS_ABI_FP_64A] = { false, false, true, false, true } + }; + + /* + * Mode requirements when .MIPS.abiflags is not present in the ELF. + * Not present means that everything is acceptable except FR1. + */ + static struct mode_req none_req = { true, true, false, true, true }; + + struct mode_req prog_req; + struct mode_req interp_req; + for(i = 0; i < 32; i++) { env->active_tc.gpr[i] = regs->regs[i]; } @@ -747,6 +775,53 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs) if (regs->cp0_epc & 1) { env->hflags |= MIPS_HFLAG_M16; } + +#ifdef TARGET_ABI_MIPSO32 +# define MAX_FP_ABI MIPS_ABI_FP_64A +#else +# define MAX_FP_ABI MIPS_ABI_FP_SOFT +#endif + if ((info->fp_abi > MAX_FP_ABI && info->fp_abi != MIPS_ABI_FP_UNKNOWN) + || (info->interp_fp_abi > MAX_FP_ABI && + info->interp_fp_abi != MIPS_ABI_FP_UNKNOWN)) { + fprintf(stderr, "qemu: Unexpected FPU mode\n"); + exit(1); + } + + prog_req = (info->fp_abi == MIPS_ABI_FP_UNKNOWN) ? none_req + : fpu_reqs[info->fp_abi]; + interp_req = (info->interp_fp_abi == MIPS_ABI_FP_UNKNOWN) ? none_req + : fpu_reqs[info->interp_fp_abi]; + + prog_req.single &= interp_req.single; + prog_req.soft &= interp_req.soft; + prog_req.fr1 &= interp_req.fr1; + prog_req.frdefault &= interp_req.frdefault; + prog_req.fre &= interp_req.fre; + + bool cpu_has_mips_r2_r6 = env->insn_flags & ISA_MIPS32R2 || + env->insn_flags & ISA_MIPS64R2 || + env->insn_flags & ISA_MIPS32R6 || + env->insn_flags & ISA_MIPS64R6; + + if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1) { + env->CP0_Config5 |= (1 << CP0C5_FRE); + if (env->active_fpu.fcr0 & (1 << FCR0_FREP)) { + env->hflags |= MIPS_HFLAG_FRE; + } + } else if ((prog_req.fr1 && prog_req.frdefault) || + (prog_req.single && !prog_req.frdefault)) { + if ((env->active_fpu.fcr0 & (1 << FCR0_F64) + && cpu_has_mips_r2_r6) || prog_req.fr1) { + env->CP0_Status |= (1 << CP0St_FR); + env->hflags |= MIPS_HFLAG_F64; + } + } else if (!prog_req.fre && !prog_req.frdefault && + !prog_req.fr1 && !prog_req.single && !prog_req.soft) { + fprintf(stderr, "qemu: Can't find a matching FPU mode\n"); + exit(1); + } + if (env->insn_flags & ISA_NANOMIPS32) { return; } diff --git a/linux-user/mips/target_syscall.h b/linux-user/mips/target_syscall.h index 33177af113..d5509a34a7 100644 --- a/linux-user/mips/target_syscall.h +++ b/linux-user/mips/target_syscall.h @@ -247,5 +247,7 @@ static inline abi_ulong target_shmlba(CPUMIPSState *env) /* MIPS-specific prctl() options */ #define TARGET_PR_SET_FP_MODE 45 #define TARGET_PR_GET_FP_MODE 46 +#define TARGET_PR_FP_MODE_FR (1 << 0) +#define TARGET_PR_FP_MODE_FRE (1 << 1) #endif /* MIPS_TARGET_SYSCALL_H */ diff --git a/linux-user/mips64/target_syscall.h b/linux-user/mips64/target_syscall.h index c1160e69f8..8ccc46822c 100644 --- a/linux-user/mips64/target_syscall.h +++ b/linux-user/mips64/target_syscall.h @@ -244,5 +244,7 @@ static inline abi_ulong target_shmlba(CPUMIPSState *env) /* MIPS-specific prctl() options */ #define TARGET_PR_SET_FP_MODE 45 #define TARGET_PR_GET_FP_MODE 46 +#define TARGET_PR_FP_MODE_FR (1 << 0) +#define TARGET_PR_FP_MODE_FRE (1 << 1) #endif /* MIPS64_TARGET_SYSCALL_H */ diff --git a/linux-user/qemu.h b/linux-user/qemu.h index dde3f26f5a..dd5771ce0c 100644 --- a/linux-user/qemu.h +++ b/linux-user/qemu.h @@ -61,6 +61,10 @@ struct image_info { abi_ulong interpreter_loadmap_addr; abi_ulong interpreter_pt_dynamic_addr; struct image_info *other_info; +#ifdef TARGET_MIPS + int fp_abi; + int interp_fp_abi; +#endif }; #ifdef TARGET_I386 diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 15b03e17b9..810a58b704 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -9529,11 +9529,65 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1, #endif #ifdef TARGET_MIPS case TARGET_PR_GET_FP_MODE: - /* TODO: Implement TARGET_PR_SET_FP_MODE handling.*/ - return -TARGET_EINVAL; + { + CPUMIPSState *env = ((CPUMIPSState *)cpu_env); + ret = 0; + if (env->CP0_Status & (1 << CP0St_FR)) { + ret |= TARGET_PR_FP_MODE_FR; + } + if (env->CP0_Config5 & (1 << CP0C5_FRE)) { + ret |= TARGET_PR_FP_MODE_FRE; + } + return ret; + } case TARGET_PR_SET_FP_MODE: - /* TODO: Implement TARGET_PR_GET_FP_MODE handling.*/ - return -TARGET_EINVAL; + { + CPUMIPSState *env = ((CPUMIPSState *)cpu_env); + bool old_fr = env->CP0_Status & (1 << CP0St_FR); + bool new_fr = arg2 & TARGET_PR_FP_MODE_FR; + bool new_fre = arg2 & TARGET_PR_FP_MODE_FRE; + + if (new_fr && !(env->active_fpu.fcr0 & (1 << FCR0_F64))) { + /* FR1 is not supported */ + return -TARGET_EOPNOTSUPP; + } + if (!new_fr && (env->active_fpu.fcr0 & (1 << FCR0_F64)) + && !(env->CP0_Status_rw_bitmask & (1 << CP0St_FR))) { + /* cannot set FR=0 */ + return -TARGET_EOPNOTSUPP; + } + if (new_fre && !(env->active_fpu.fcr0 & (1 << FCR0_FREP))) { + /* Cannot set FRE=1 */ + return -TARGET_EOPNOTSUPP; + } + + int i; + fpr_t *fpr = env->active_fpu.fpr; + for (i = 0; i < 32 ; i += 2) { + if (!old_fr && new_fr) { + fpr[i].w[!FP_ENDIAN_IDX] = fpr[i + 1].w[FP_ENDIAN_IDX]; + } else if (old_fr && !new_fr) { + fpr[i + 1].w[FP_ENDIAN_IDX] = fpr[i].w[!FP_ENDIAN_IDX]; + } + } + + if (new_fr) { + env->CP0_Status |= (1 << CP0St_FR); + env->hflags |= MIPS_HFLAG_F64; + } else { + env->CP0_Status &= ~(1 << CP0St_FR); + } + if (new_fre) { + env->CP0_Config5 |= (1 << CP0C5_FRE); + if (env->active_fpu.fcr0 & (1 << FCR0_FREP)) { + env->hflags |= MIPS_HFLAG_FRE; + } + } else { + env->CP0_Config5 &= ~(1 << CP0C5_FRE); + } + + return 0; + } #endif /* MIPS */ #ifdef TARGET_AARCH64 case TARGET_PR_SVE_SET_VL: diff --git a/migration/block-dirty-bitmap.c b/migration/block-dirty-bitmap.c index 477826330c..5e90f44c2f 100644 --- a/migration/block-dirty-bitmap.c +++ b/migration/block-dirty-bitmap.c @@ -301,14 +301,14 @@ static int init_dirty_bitmap_migration(void) goto fail; } - if (bdrv_dirty_bitmap_frozen(bitmap)) { - error_report("Can't migrate frozen dirty bitmap: '%s", + if (bdrv_dirty_bitmap_user_locked(bitmap)) { + error_report("Can't migrate a bitmap that is in use by another operation: '%s'", bdrv_dirty_bitmap_name(bitmap)); goto fail; } - if (bdrv_dirty_bitmap_qmp_locked(bitmap)) { - error_report("Can't migrate locked dirty bitmap: '%s", + if (bdrv_dirty_bitmap_readonly(bitmap)) { + error_report("Can't migrate read-only dirty bitmap: '%s", bdrv_dirty_bitmap_name(bitmap)); goto fail; } @@ -335,9 +335,9 @@ static int init_dirty_bitmap_migration(void) } } - /* unset persistance here, to not roll back it */ + /* unset migration flags here, to not roll back it */ QSIMPLEQ_FOREACH(dbms, &dirty_bitmap_mig_state.dbms_list, entry) { - bdrv_dirty_bitmap_set_persistance(dbms->bitmap, false); + bdrv_dirty_bitmap_set_migration(dbms->bitmap, true); } if (QSIMPLEQ_EMPTY(&dirty_bitmap_mig_state.dbms_list)) { diff --git a/nbd/server.c b/nbd/server.c index a1eda0114f..4e8f5ae51b 100644 --- a/nbd/server.c +++ b/nbd/server.c @@ -2456,8 +2456,8 @@ void nbd_export_bitmap(NBDExport *exp, const char *bitmap, return; } - if (bdrv_dirty_bitmap_qmp_locked(bm)) { - error_setg(errp, "Bitmap '%s' is locked", bitmap); + if (bdrv_dirty_bitmap_user_locked(bm)) { + error_setg(errp, "Bitmap '%s' is in use", bitmap); return; } diff --git a/qapi/block-core.json b/qapi/block-core.json index cfb37f8c1d..0fc1590c1b 100644 --- a/qapi/block-core.json +++ b/qapi/block-core.json @@ -1316,6 +1316,10 @@ # @speed: the maximum speed, in bytes per second. The default is 0, # for unlimited. # +# @bitmap: the name of dirty bitmap if sync is "incremental". +# Must be present if sync is "incremental", must NOT be present +# otherwise. (Since 3.1) +# # @compress: true to compress data, if the target format supports it. # (default: false) (since 2.8) # @@ -1348,7 +1352,8 @@ ## { 'struct': 'BlockdevBackup', 'data': { '*job-id': 'str', 'device': 'str', 'target': 'str', - 'sync': 'MirrorSyncMode', '*speed': 'int', '*compress': 'bool', + 'sync': 'MirrorSyncMode', '*speed': 'int', + '*bitmap': 'str', '*compress': 'bool', '*on-source-error': 'BlockdevOnError', '*on-target-error': 'BlockdevOnError', '*auto-finalize': 'bool', '*auto-dismiss': 'bool' } } diff --git a/qapi/misc.json b/qapi/misc.json index c85c6c8ca3..6c1c5c0a37 100644 --- a/qapi/misc.json +++ b/qapi/misc.json @@ -2066,7 +2066,7 @@ # # @plugged-memory: size of memory that can be hot-unplugged. This field # is omitted if target doesn't support memory hotplug -# (i.e. CONFIG_MEM_HOTPLUG not defined on build time). +# (i.e. CONFIG_MEM_DEVICE not defined at build time). # # Since: 2.11.0 ## diff --git a/qapi/transaction.json b/qapi/transaction.json index d7e4274550..5875cdb16c 100644 --- a/qapi/transaction.json +++ b/qapi/transaction.json @@ -48,6 +48,7 @@ # - @block-dirty-bitmap-clear: since 2.5 # - @x-block-dirty-bitmap-enable: since 3.0 # - @x-block-dirty-bitmap-disable: since 3.0 +# - @x-block-dirty-bitmap-merge: since 3.1 # - @blockdev-backup: since 2.3 # - @blockdev-snapshot: since 2.5 # - @blockdev-snapshot-internal-sync: since 1.7 @@ -63,6 +64,7 @@ 'block-dirty-bitmap-clear': 'BlockDirtyBitmap', 'x-block-dirty-bitmap-enable': 'BlockDirtyBitmap', 'x-block-dirty-bitmap-disable': 'BlockDirtyBitmap', + 'x-block-dirty-bitmap-merge': 'BlockDirtyBitmapMerge', 'blockdev-backup': 'BlockdevBackup', 'blockdev-snapshot': 'BlockdevSnapshot', 'blockdev-snapshot-internal-sync': 'BlockdevSnapshotInternal', diff --git a/qemu-deprecated.texi b/qemu-deprecated.texi index 11b870c5c1..5d2d7a3588 100644 --- a/qemu-deprecated.texi +++ b/qemu-deprecated.texi @@ -86,6 +86,18 @@ for these file types is 'host_cdrom' or 'host_device' as appropriate. The @option{name} parameter of the @option{-net} option is a synonym for the @option{id} parameter, which should now be used instead. +@subsection -smp (invalid topologies) (since 3.1) + +CPU topology properties should describe whole machine topology including +possible CPUs. + +However, historically it was possible to start QEMU with an incorrect topology +where @math{@var{n} <= @var{sockets} * @var{cores} * @var{threads} < @var{maxcpus}}, +which could lead to an incorrect topology enumeration by the guest. +Support for invalid topologies will be removed, the user must ensure +topologies described with -smp include all possible cpus, i.e. + @math{@var{sockets} * @var{cores} * @var{threads} = @var{maxcpus}}. + @section QEMU Machine Protocol (QMP) commands @subsection block-dirty-bitmap-add "autoload" parameter (since 2.12.0) diff --git a/scripts/qemu.py b/scripts/qemu.py index b0b2f12ce6..fd4249f7a8 100644 --- a/scripts/qemu.py +++ b/scripts/qemu.py @@ -26,6 +26,12 @@ import tempfile LOG = logging.getLogger(__name__) +def kvm_available(target_arch=None): + if target_arch and target_arch != os.uname()[4]: + return False + return os.access("/dev/kvm", os.R_OK | os.W_OK) + + #: Maps machine types to the preferred console device types CONSOLE_DEV_TYPES = { r'^clipper$': 'isa-serial', diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 497706b669..e217fb3e36 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -113,11 +113,20 @@ static void mips_cpu_reset(CPUState *s) } static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) { + MIPSCPU *cpu = MIPS_CPU(s); + CPUMIPSState *env = &cpu->env; + + if (!(env->insn_flags & ISA_NANOMIPS32)) { #ifdef TARGET_WORDS_BIGENDIAN - info->print_insn = print_insn_big_mips; + info->print_insn = print_insn_big_mips; #else - info->print_insn = print_insn_little_mips; + info->print_insn = print_insn_little_mips; #endif + } else { +#if defined(CONFIG_NANOMIPS_DIS) + info->print_insn = print_insn_nanomips; +#endif + } } static void mips_cpu_realizefn(DeviceState *dev, Error **errp) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index e48be4b334..03c03fd8c6 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -170,6 +170,16 @@ struct TCState { MSACSR_FS_MASK) float_status msa_fp_status; + +#define NUMBER_OF_MXU_REGISTERS 16 + target_ulong mxu_gpr[NUMBER_OF_MXU_REGISTERS - 1]; + target_ulong mxu_cr; +#define MXU_CR_LC 31 +#define MXU_CR_RC 30 +#define MXU_CR_BIAS 2 +#define MXU_CR_RD_EN 1 +#define MXU_CR_MXU_EN 0 + }; typedef struct CPUMIPSState CPUMIPSState; diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h index 5177618615..dbdb4b2b2d 100644 --- a/target/mips/mips-defs.h +++ b/target/mips/mips-defs.h @@ -69,6 +69,7 @@ * bits 56-63: vendor-specific ASEs */ #define ASE_MMI 0x0100000000000000ULL +#define ASE_MXU 0x0200000000000000ULL /* MIPS CPU defines. */ #define CPU_MIPS1 (ISA_MIPS1) diff --git a/target/mips/translate.c b/target/mips/translate.c index c44a751be9..60320cbe69 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -1410,25 +1410,89 @@ enum { * MXU unit contains 17 registers called X0-X16. X0 is always zero, and X16 is * the control register. * - * The notation used in MXU assembler mnemonics: + * The notation used in MXU assembler mnemonics + * -------------------------------------------- + * + * Registers: * * XRa, XRb, XRc, XRd - MXU registers * Rb, Rc, Rd, Rs, Rt - general purpose MIPS registers - * s12 - a subfield of an instruction code - * strd2 - a subfield of an instruction code - * eptn2 - a subfield of an instruction code - * eptn3 - a subfield of an instruction code - * optn2 - a subfield of an instruction code - * optn3 - a subfield of an instruction code - * sft4 - a subfield of an instruction code + * + * Subfields: + * + * aptn1 - 1-bit accumulate add/subtract pattern + * aptn2 - 2-bit accumulate add/subtract pattern + * eptn2 - 2-bit execute add/subtract pattern + * optn2 - 2-bit operand pattern + * optn3 - 3-bit operand pattern + * sft4 - 4-bit shift amount + * strd2 - 2-bit stride amount + * + * Prefixes: + * + * <Operation parallel level><Operand size> + * S 32 + * D 16 + * Q 8 + * + * Suffixes: + * + * E - Expand results + * F - Fixed point multiplication + * L - Low part result + * R - Doing rounding + * V - Variable instead of immediate + * W - Combine above L and V + * + * Operations: + * + * ADD - Add or subtract + * ADDC - Add with carry-in + * ACC - Accumulate + * ASUM - Sum together then accumulate (add or subtract) + * ASUMC - Sum together then accumulate (add or subtract) with carry-in + * AVG - Average between 2 operands + * ABD - Absolute difference + * ALN - Align data + * AND - Logical bitwise 'and' operation + * CPS - Copy sign + * EXTR - Extract bits + * I2M - Move from GPR register to MXU register + * LDD - Load data from memory to XRF + * LDI - Load data from memory to XRF (and increase the address base) + * LUI - Load unsigned immediate + * MUL - Multiply + * MULU - Unsigned multiply + * MADD - 64-bit operand add 32x32 product + * MSUB - 64-bit operand subtract 32x32 product + * MAC - Multiply and accumulate (add or subtract) + * MAD - Multiply and add or subtract + * MAX - Maximum between 2 operands + * MIN - Minimum between 2 operands + * M2I - Move from MXU register to GPR register + * MOVZ - Move if zero + * MOVN - Move if non-zero + * NOR - Logical bitwise 'nor' operation + * OR - Logical bitwise 'or' operation + * STD - Store data from XRF to memory + * SDI - Store data from XRF to memory (and increase the address base) + * SLT - Set of less than comparison + * SAD - Sum of absolute differences + * SLL - Logical shift left + * SLR - Logical shift right + * SAR - Arithmetic shift right + * SAT - Saturation + * SFL - Shuffle + * SCOP - Calculate x’s scope (-1, means x<0; 0, means x==0; 1, means x>0) + * XOR - Logical bitwise 'exclusive or' operation * * Load/Store instructions Multiplication instructions * ----------------------- --------------------------- * * S32LDD XRa, Rb, s12 S32MADD XRa, XRd, Rs, Rt * S32STD XRa, Rb, s12 S32MADDU XRa, XRd, Rs, Rt - * S32LDDV XRa, Rb, rc, strd2 S32SUB XRa, XRd, Rs, Rt - * S32STDV XRa, Rb, rc, strd2 S32SUBU XRa, XRd, Rs, Rt + * S32LDDV XRa, Rb, rc, strd2 S32MSUB XRa, XRd, Rs, Rt + * S32STDV XRa, Rb, rc, strd2 S32MSUBU XRa, XRd, Rs, Rt * S32LDI XRa, Rb, s12 S32MUL XRa, XRd, Rs, Rt * S32SDI XRa, Rb, s12 S32MULU XRa, XRd, Rs, Rt * S32LDIV XRa, Rb, rc, strd2 D16MUL XRa, XRb, XRc, XRd, optn2 @@ -1486,7 +1550,7 @@ enum { * S32OR XRa, XRb, XRc D32SARW XRa, XRb, XRc, Rb * Q16SLL XRa, XRb, XRc, XRd, sft4 * Q16SLR XRa, XRb, XRc, XRd, sft4 - * Miscelaneous instructions Q16SAR XRa, XRb, XRc, XRd, sft4 + * Miscellaneous instructions Q16SAR XRa, XRb, XRc, XRd, sft4 * ------------------------- Q16SLLV XRa, XRb, Rb * Q16SLRV XRa, XRb, Rb * S32SFL XRa, XRb, XRc, XRd, optn2 Q16SARV XRa, XRb, Rb @@ -1504,7 +1568,8 @@ enum { * * ┌─ 000000 ─ OPC_MXU_S32MADD * ├─ 000001 ─ OPC_MXU_S32MADDU - * ├─ 000010 ─ <not assigned> + * ├─ 000010 ─ <not assigned> (non-MXU OPC_MUL) + * │ * │ 20..18 * ├─ 000011 ─ OPC_MXU__POOL00 ─┬─ 000 ─ OPC_MXU_S32MAX * │ ├─ 001 ─ OPC_MXU_S32MIN @@ -1536,73 +1601,67 @@ enum { * ├─ 001010 ─ OPC_MXU_D16MAC * ├─ 001011 ─ OPC_MXU_D16MACF * ├─ 001100 ─ OPC_MXU_D16MADL - * │ 25..24 - * ├─ 001101 ─ OPC_MXU__POOL04 ─┬─ 00 ─ OPC_MXU_S16MAD - * │ └─ 01 ─ OPC_MXU_S16MAD_1 + * ├─ 001101 ─ OPC_MXU_S16MAD * ├─ 001110 ─ OPC_MXU_Q16ADD - * ├─ 001111 ─ OPC_MXU_D16MACE - * │ 23 - * ├─ 010000 ─ OPC_MXU__POOL05 ─┬─ 0 ─ OPC_MXU_S32LDD - * │ └─ 1 ─ OPC_MXU_S32LDDR + * ├─ 001111 ─ OPC_MXU_D16MACE 23 + * │ ┌─ 0 ─ OPC_MXU_S32LDD + * ├─ 010000 ─ OPC_MXU__POOL04 ─┴─ 1 ─ OPC_MXU_S32LDDR * │ * │ 23 - * ├─ 010001 ─ OPC_MXU__POOL06 ─┬─ 0 ─ OPC_MXU_S32STD + * ├─ 010001 ─ OPC_MXU__POOL05 ─┬─ 0 ─ OPC_MXU_S32STD * │ └─ 1 ─ OPC_MXU_S32STDR * │ * │ 13..10 - * ├─ 010010 ─ OPC_MXU__POOL07 ─┬─ 0000 ─ OPC_MXU_S32LDDV + * ├─ 010010 ─ OPC_MXU__POOL06 ─┬─ 0000 ─ OPC_MXU_S32LDDV * │ └─ 0001 ─ OPC_MXU_S32LDDVR * │ * │ 13..10 - * ├─ 010011 ─ OPC_MXU__POOL08 ─┬─ 0000 ─ OPC_MXU_S32STDV + * ├─ 010011 ─ OPC_MXU__POOL07 ─┬─ 0000 ─ OPC_MXU_S32STDV * │ └─ 0001 ─ OPC_MXU_S32STDVR * │ * │ 23 - * ├─ 010100 ─ OPC_MXU__POOL09 ─┬─ 0 ─ OPC_MXU_S32LDI + * ├─ 010100 ─ OPC_MXU__POOL08 ─┬─ 0 ─ OPC_MXU_S32LDI * │ └─ 1 ─ OPC_MXU_S32LDIR * │ * │ 23 - * ├─ 010101 ─ OPC_MXU__POOL10 ─┬─ 0 ─ OPC_MXU_S32SDI + * ├─ 010101 ─ OPC_MXU__POOL09 ─┬─ 0 ─ OPC_MXU_S32SDI * │ └─ 1 ─ OPC_MXU_S32SDIR * │ * │ 13..10 - * ├─ 010110 ─ OPC_MXU__POOL11 ─┬─ 0000 ─ OPC_MXU_S32LDIV + * ├─ 010110 ─ OPC_MXU__POOL10 ─┬─ 0000 ─ OPC_MXU_S32LDIV * │ └─ 0001 ─ OPC_MXU_S32LDIVR * │ * │ 13..10 - * ├─ 010111 ─ OPC_MXU__POOL12 ─┬─ 0000 ─ OPC_MXU_S32SDIV + * ├─ 010111 ─ OPC_MXU__POOL11 ─┬─ 0000 ─ OPC_MXU_S32SDIV * │ └─ 0001 ─ OPC_MXU_S32SDIVR * ├─ 011000 ─ OPC_MXU_D32ADD * │ 23..22 - * MXU ├─ 011001 ─ OPC_MXU__POOL13 ─┬─ 00 ─ OPC_MXU_D32ACC + * MXU ├─ 011001 ─ OPC_MXU__POOL12 ─┬─ 00 ─ OPC_MXU_D32ACC * opcodes ─┤ ├─ 01 ─ OPC_MXU_D32ACCM * │ └─ 10 ─ OPC_MXU_D32ASUM * ├─ 011010 ─ <not assigned> * │ 23..22 - * ├─ 011011 ─ OPC_MXU__POOL14 ─┬─ 00 ─ OPC_MXU_Q16ACC + * ├─ 011011 ─ OPC_MXU__POOL13 ─┬─ 00 ─ OPC_MXU_Q16ACC * │ ├─ 01 ─ OPC_MXU_Q16ACCM * │ └─ 10 ─ OPC_MXU_Q16ASUM * │ * │ 23..22 - * ├─ 011100 ─ OPC_MXU__POOL15 ─┬─ 00 ─ OPC_MXU_Q8ADDE + * ├─ 011100 ─ OPC_MXU__POOL14 ─┬─ 00 ─ OPC_MXU_Q8ADDE * │ ├─ 01 ─ OPC_MXU_D8SUM * ├─ 011101 ─ OPC_MXU_Q8ACCE └─ 10 ─ OPC_MXU_D8SUMC * ├─ 011110 ─ <not assigned> * ├─ 011111 ─ <not assigned> - * ├─ 100000 ─ <not assigned> - * ├─ 100001 ─ <not assigned> + * ├─ 100000 ─ <not assigned> (overlaps with CLZ) + * ├─ 100001 ─ <not assigned> (overlaps with CLO) * ├─ 100010 ─ OPC_MXU_S8LDD - * ├─ 100011 ─ OPC_MXU_S8STD - * ├─ 100100 ─ OPC_MXU_S8LDI - * ├─ 100101 ─ OPC_MXU_S8SDI - * │ 15..14 - * ├─ 100110 ─ OPC_MXU__POOL16 ─┬─ 00 ─ OPC_MXU_S32MUL - * │ ├─ 00 ─ OPC_MXU_S32MULU + * ├─ 100011 ─ OPC_MXU_S8STD 15..14 + * ├─ 100100 ─ OPC_MXU_S8LDI ┌─ 00 ─ OPC_MXU_S32MUL + * ├─ 100101 ─ OPC_MXU_S8SDI ├─ 00 ─ OPC_MXU_S32MULU * │ ├─ 00 ─ OPC_MXU_S32EXTR - * │ └─ 00 ─ OPC_MXU_S32EXTRV + * ├─ 100110 ─ OPC_MXU__POOL15 ─┴─ 00 ─ OPC_MXU_S32EXTRV * │ * │ 20..18 - * ├─ 100111 ─ OPC_MXU__POOL17 ─┬─ 000 ─ OPC_MXU_D32SARW + * ├─ 100111 ─ OPC_MXU__POOL16 ─┬─ 000 ─ OPC_MXU_D32SARW * │ ├─ 001 ─ OPC_MXU_S32ALN * ├─ 101000 ─ OPC_MXU_LXB ├─ 010 ─ OPC_MXU_S32ALNI * ├─ 101001 ─ <not assigned> ├─ 011 ─ OPC_MXU_S32NOR @@ -1610,33 +1669,24 @@ enum { * ├─ 101011 ─ OPC_MXU_S16STD ├─ 101 ─ OPC_MXU_S32OR * ├─ 101100 ─ OPC_MXU_S16LDI ├─ 110 ─ OPC_MXU_S32XOR * ├─ 101101 ─ OPC_MXU_S16SDI └─ 111 ─ OPC_MXU_S32LUI - * ├─ 101000 ─ <not assigned> - * ├─ 101001 ─ <not assigned> - * ├─ 101010 ─ <not assigned> - * ├─ 101011 ─ <not assigned> - * ├─ 101100 ─ <not assigned> - * ├─ 101101 ─ <not assigned> * ├─ 101110 ─ OPC_MXU_S32M2I * ├─ 101111 ─ OPC_MXU_S32I2M * ├─ 110000 ─ OPC_MXU_D32SLL - * ├─ 110001 ─ OPC_MXU_D32SLR - * ├─ 110010 ─ OPC_MXU_D32SARL - * ├─ 110011 ─ OPC_MXU_D32SAR - * ├─ 110100 ─ OPC_MXU_Q16SLL - * ├─ 110101 ─ OPC_MXU_Q16SLR 20..18 - * ├─ 110110 ─ OPC_MXU__POOL18 ─┬─ 000 ─ OPC_MXU_D32SLLV - * │ ├─ 001 ─ OPC_MXU_D32SLRV - * │ ├─ 010 ─ OPC_MXU_D32SARV - * │ ├─ 011 ─ OPC_MXU_Q16SLLV + * ├─ 110001 ─ OPC_MXU_D32SLR 20..18 + * ├─ 110010 ─ OPC_MXU_D32SARL ┌─ 000 ─ OPC_MXU_D32SLLV + * ├─ 110011 ─ OPC_MXU_D32SAR ├─ 001 ─ OPC_MXU_D32SLRV + * ├─ 110100 ─ OPC_MXU_Q16SLL ├─ 010 ─ OPC_MXU_D32SARV + * ├─ 110101 ─ OPC_MXU_Q16SLR ├─ 011 ─ OPC_MXU_Q16SLLV * │ ├─ 100 ─ OPC_MXU_Q16SLRV - * │ └─ 101 ─ OPC_MXU_Q16SARV + * ├─ 110110 ─ OPC_MXU__POOL17 ─┴─ 101 ─ OPC_MXU_Q16SARV + * │ * ├─ 110111 ─ OPC_MXU_Q16SAR * │ 23..22 - * ├─ 111000 ─ OPC_MXU__POOL19 ─┬─ 00 ─ OPC_MXU_Q8MUL + * ├─ 111000 ─ OPC_MXU__POOL18 ─┬─ 00 ─ OPC_MXU_Q8MUL * │ └─ 01 ─ OPC_MXU_Q8MULSU * │ * │ 20..18 - * ├─ 111001 ─ OPC_MXU__POOL20 ─┬─ 000 ─ OPC_MXU_Q8MOVZ + * ├─ 111001 ─ OPC_MXU__POOL19 ─┬─ 000 ─ OPC_MXU_Q8MOVZ * │ ├─ 001 ─ OPC_MXU_Q8MOVN * │ ├─ 010 ─ OPC_MXU_D16MOVZ * │ ├─ 011 ─ OPC_MXU_D16MOVN @@ -1644,13 +1694,13 @@ enum { * │ └─ 101 ─ OPC_MXU_S32MOV * │ * │ 23..22 - * ├─ 111010 ─ OPC_MXU__POOL21 ─┬─ 00 ─ OPC_MXU_Q8MAC + * ├─ 111010 ─ OPC_MXU__POOL20 ─┬─ 00 ─ OPC_MXU_Q8MAC * │ └─ 10 ─ OPC_MXU_Q8MACSU * ├─ 111011 ─ OPC_MXU_Q16SCOP * ├─ 111100 ─ OPC_MXU_Q8MADL * ├─ 111101 ─ OPC_MXU_S32SFL * ├─ 111110 ─ OPC_MXU_Q8SAD - * └─ 111111 ─ <not assigned> + * └─ 111111 ─ <not assigned> (overlaps with SDBBP) * * * Compiled after: @@ -1662,7 +1712,7 @@ enum { enum { OPC_MXU_S32MADD = 0x00, OPC_MXU_S32MADDU = 0x01, - /* not assigned 0x02 */ + OPC__MXU_MUL = 0x02, OPC_MXU__POOL00 = 0x03, OPC_MXU_S32MSUB = 0x04, OPC_MXU_S32MSUBU = 0x05, @@ -1673,22 +1723,22 @@ enum { OPC_MXU_D16MAC = 0x0A, OPC_MXU_D16MACF = 0x0B, OPC_MXU_D16MADL = 0x0C, - OPC_MXU__POOL04 = 0x0D, + OPC_MXU_S16MAD = 0x0D, OPC_MXU_Q16ADD = 0x0E, OPC_MXU_D16MACE = 0x0F, - OPC_MXU__POOL05 = 0x10, - OPC_MXU__POOL06 = 0x11, - OPC_MXU__POOL07 = 0x12, - OPC_MXU__POOL08 = 0x13, - OPC_MXU__POOL09 = 0x14, - OPC_MXU__POOL10 = 0x15, - OPC_MXU__POOL11 = 0x16, - OPC_MXU__POOL12 = 0x17, + OPC_MXU__POOL04 = 0x10, + OPC_MXU__POOL05 = 0x11, + OPC_MXU__POOL06 = 0x12, + OPC_MXU__POOL07 = 0x13, + OPC_MXU__POOL08 = 0x14, + OPC_MXU__POOL09 = 0x15, + OPC_MXU__POOL10 = 0x16, + OPC_MXU__POOL11 = 0x17, OPC_MXU_D32ADD = 0x18, - OPC_MXU__POOL13 = 0x19, + OPC_MXU__POOL12 = 0x19, /* not assigned 0x1A */ - OPC_MXU__POOL14 = 0x1B, - OPC_MXU__POOL15 = 0x1C, + OPC_MXU__POOL13 = 0x1B, + OPC_MXU__POOL14 = 0x1C, OPC_MXU_Q8ACCE = 0x1D, /* not assigned 0x1E */ /* not assigned 0x1F */ @@ -1698,8 +1748,8 @@ enum { OPC_MXU_S8STD = 0x23, OPC_MXU_S8LDI = 0x24, OPC_MXU_S8SDI = 0x25, - OPC_MXU__POOL16 = 0x26, - OPC_MXU__POOL17 = 0x27, + OPC_MXU__POOL15 = 0x26, + OPC_MXU__POOL16 = 0x27, OPC_MXU_LXB = 0x28, /* not assigned 0x29 */ OPC_MXU_S16LDD = 0x2A, @@ -1714,11 +1764,11 @@ enum { OPC_MXU_D32SAR = 0x33, OPC_MXU_Q16SLL = 0x34, OPC_MXU_Q16SLR = 0x35, - OPC_MXU__POOL18 = 0x36, + OPC_MXU__POOL17 = 0x36, OPC_MXU_Q16SAR = 0x37, - OPC_MXU__POOL19 = 0x38, - OPC_MXU__POOL20 = 0x39, - OPC_MXU__POOL21 = 0x3A, + OPC_MXU__POOL18 = 0x38, + OPC_MXU__POOL19 = 0x39, + OPC_MXU__POOL20 = 0x3A, OPC_MXU_Q16SCOP = 0x3B, OPC_MXU_Q8MADL = 0x3C, OPC_MXU_S32SFL = 0x3D, @@ -1776,20 +1826,12 @@ enum { * MXU pool 04 */ enum { - OPC_MXU_S16MAD = 0x00, - OPC_MXU_S16MAD_1 = 0x01, -}; - -/* - * MXU pool 05 - */ -enum { OPC_MXU_S32LDD = 0x00, OPC_MXU_S32LDDR = 0x01, }; /* - * MXU pool 06 + * MXU pool 05 */ enum { OPC_MXU_S32STD = 0x00, @@ -1797,7 +1839,7 @@ enum { }; /* - * MXU pool 07 + * MXU pool 06 */ enum { OPC_MXU_S32LDDV = 0x00, @@ -1805,7 +1847,7 @@ enum { }; /* - * MXU pool 08 + * MXU pool 07 */ enum { OPC_MXU_S32STDV = 0x00, @@ -1813,7 +1855,7 @@ enum { }; /* - * MXU pool 09 + * MXU pool 08 */ enum { OPC_MXU_S32LDI = 0x00, @@ -1821,7 +1863,7 @@ enum { }; /* - * MXU pool 10 + * MXU pool 09 */ enum { OPC_MXU_S32SDI = 0x00, @@ -1829,7 +1871,7 @@ enum { }; /* - * MXU pool 11 + * MXU pool 10 */ enum { OPC_MXU_S32LDIV = 0x00, @@ -1837,7 +1879,7 @@ enum { }; /* - * MXU pool 12 + * MXU pool 11 */ enum { OPC_MXU_S32SDIV = 0x00, @@ -1845,7 +1887,7 @@ enum { }; /* - * MXU pool 13 + * MXU pool 12 */ enum { OPC_MXU_D32ACC = 0x00, @@ -1854,7 +1896,7 @@ enum { }; /* - * MXU pool 14 + * MXU pool 13 */ enum { OPC_MXU_Q16ACC = 0x00, @@ -1863,7 +1905,7 @@ enum { }; /* - * MXU pool 15 + * MXU pool 14 */ enum { OPC_MXU_Q8ADDE = 0x00, @@ -1872,7 +1914,7 @@ enum { }; /* - * MXU pool 16 + * MXU pool 15 */ enum { OPC_MXU_S32MUL = 0x00, @@ -1882,7 +1924,7 @@ enum { }; /* - * MXU pool 17 + * MXU pool 16 */ enum { OPC_MXU_D32SARW = 0x00, @@ -1896,7 +1938,7 @@ enum { }; /* - * MXU pool 18 + * MXU pool 17 */ enum { OPC_MXU_D32SLLV = 0x00, @@ -1908,7 +1950,7 @@ enum { }; /* - * MXU pool 19 + * MXU pool 18 */ enum { OPC_MXU_Q8MUL = 0x00, @@ -1916,7 +1958,7 @@ enum { }; /* - * MXU pool 20 + * MXU pool 19 */ enum { OPC_MXU_Q8MOVZ = 0x00, @@ -1928,7 +1970,7 @@ enum { }; /* - * MXU pool 21 + * MXU pool 20 */ enum { OPC_MXU_Q8MAC = 0x00, @@ -2379,6 +2421,10 @@ static TCGv_i32 fpu_fcr0, fpu_fcr31; static TCGv_i64 fpu_f64[32]; static TCGv_i64 msa_wr_d[64]; +/* MXU registers */ +static TCGv mxu_gpr[NUMBER_OF_MXU_REGISTERS - 1]; +static TCGv mxu_CR; + #include "exec/gen-icount.h" #define gen_helper_0e0i(name, arg) do { \ @@ -2501,6 +2547,11 @@ static const char * const msaregnames[] = { "w30.d0", "w30.d1", "w31.d0", "w31.d1", }; +static const char * const mxuregnames[] = { + "XR1", "XR2", "XR3", "XR4", "XR5", "XR6", "XR7", "XR8", + "XR9", "XR10", "XR11", "XR12", "XR13", "XR14", "XR15", "MXU_CR", +}; + #define LOG_DISAS(...) \ do { \ if (MIPS_DEBUG_DISAS) { \ @@ -2582,6 +2633,36 @@ static inline void gen_store_srsgpr (int from, int to) } } +/* MXU General purpose registers moves. */ +static inline void gen_load_mxu_gpr(TCGv t, unsigned int reg) +{ + if (reg == 0) { + tcg_gen_movi_tl(t, 0); + } else if (reg <= 15) { + tcg_gen_mov_tl(t, mxu_gpr[reg - 1]); + } +} + +static inline void gen_store_mxu_gpr(TCGv t, unsigned int reg) +{ + if (reg > 0 && reg <= 15) { + tcg_gen_mov_tl(mxu_gpr[reg - 1], t); + } +} + +/* MXU control register moves. */ +static inline void gen_load_mxu_cr(TCGv t) +{ + tcg_gen_mov_tl(t, mxu_CR); +} + +static inline void gen_store_mxu_cr(TCGv t) +{ + /* TODO: Add handling of RW rules for MXU_CR. */ + tcg_gen_mov_tl(mxu_CR, t); +} + + /* Tests */ static inline void gen_save_pc(target_ulong pc) { @@ -2989,6 +3070,35 @@ static inline void check_nms(DisasContext *ctx) } } +/* + * This code generates a "reserved instruction" exception if the + * Config5 NMS bit is set, and Config1 DL, Config1 IL, Config2 SL, + * Config2 TL, and Config5 L2C are unset. + */ +static inline void check_nms_dl_il_sl_tl_l2c(DisasContext *ctx) +{ + if (unlikely(ctx->CP0_Config5 & (1 << CP0C5_NMS)) && + !(ctx->CP0_Config1 & (1 << CP0C1_DL)) && + !(ctx->CP0_Config1 & (1 << CP0C1_IL)) && + !(ctx->CP0_Config2 & (1 << CP0C2_SL)) && + !(ctx->CP0_Config2 & (1 << CP0C2_TL)) && + !(ctx->CP0_Config5 & (1 << CP0C5_L2C))) + { + generate_exception_end(ctx, EXCP_RI); + } +} + +/* + * This code generates a "reserved instruction" exception if the + * Config5 EVA bit is NOT set. + */ +static inline void check_eva(DisasContext *ctx) +{ + if (unlikely(!(ctx->CP0_Config5 & (1 << CP0C5_EVA)))) { + generate_exception_end(ctx, EXCP_RI); + } +} + /* Define small wrappers for gen_load_fpr* so that we have a uniform calling interface for 32 and 64-bit FPRs. No sense in changing @@ -17475,6 +17585,16 @@ enum { NM_SOV = 0x7a, }; +/* CRC32 instruction pool */ +enum { + NM_CRC32B = 0x00, + NM_CRC32H = 0x01, + NM_CRC32W = 0x02, + NM_CRC32CB = 0x04, + NM_CRC32CH = 0x05, + NM_CRC32CW = 0x06, +}; + /* POOL32A5 instruction pool */ enum { NM_CMP_EQ_PH = 0x00, @@ -21208,6 +21328,107 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx) break; } break; + case NM_P_LS_E0: + switch (extract32(ctx->opcode, 11, 4)) { + case NM_LBE: + check_eva(ctx); + check_cp0_enabled(ctx); + gen_ld(ctx, OPC_LBE, rt, rs, s); + break; + case NM_SBE: + check_eva(ctx); + check_cp0_enabled(ctx); + gen_st(ctx, OPC_SBE, rt, rs, s); + break; + case NM_LBUE: + check_eva(ctx); + check_cp0_enabled(ctx); + gen_ld(ctx, OPC_LBUE, rt, rs, s); + break; + case NM_P_PREFE: + if (rt == 31) { + /* case NM_SYNCIE */ + check_eva(ctx); + check_cp0_enabled(ctx); + /* Break the TB to be able to sync copied instructions + immediately */ + ctx->base.is_jmp = DISAS_STOP; + } else { + /* case NM_PREFE */ + check_eva(ctx); + check_cp0_enabled(ctx); + /* Treat as NOP. */ + } + break; + case NM_LHE: + check_eva(ctx); + check_cp0_enabled(ctx); + gen_ld(ctx, OPC_LHE, rt, rs, s); + break; + case NM_SHE: + check_eva(ctx); + check_cp0_enabled(ctx); + gen_st(ctx, OPC_SHE, rt, rs, s); + break; + case NM_LHUE: + check_eva(ctx); + check_cp0_enabled(ctx); + gen_ld(ctx, OPC_LHUE, rt, rs, s); + break; + case NM_CACHEE: + check_nms_dl_il_sl_tl_l2c(ctx); + gen_cache_operation(ctx, rt, rs, s); + break; + case NM_LWE: + check_eva(ctx); + check_cp0_enabled(ctx); + gen_ld(ctx, OPC_LWE, rt, rs, s); + break; + case NM_SWE: + check_eva(ctx); + check_cp0_enabled(ctx); + gen_st(ctx, OPC_SWE, rt, rs, s); + break; + case NM_P_LLE: + switch (extract32(ctx->opcode, 2, 2)) { + case NM_LLE: + check_xnp(ctx); + check_eva(ctx); + check_cp0_enabled(ctx); + gen_ld(ctx, OPC_LLE, rt, rs, s); + break; + case NM_LLWPE: + check_xnp(ctx); + check_eva(ctx); + check_cp0_enabled(ctx); + gen_llwp(ctx, rs, 0, rt, extract32(ctx->opcode, 3, 5)); + break; + default: + generate_exception_end(ctx, EXCP_RI); + break; + } + break; + case NM_P_SCE: + switch (extract32(ctx->opcode, 2, 2)) { + case NM_SCE: + check_xnp(ctx); + check_eva(ctx); + check_cp0_enabled(ctx); + gen_st_cond(ctx, OPC_SCE, rt, rs, s); + break; + case NM_SCWPE: + check_xnp(ctx); + check_eva(ctx); + check_cp0_enabled(ctx); + gen_scwp(ctx, rs, 0, rt, extract32(ctx->opcode, 3, 5)); + break; + default: + generate_exception_end(ctx, EXCP_RI); + break; + } + break; + } + break; case NM_P_LS_WM: case NM_P_LS_UAWM: check_nms(ctx); @@ -23851,6 +24072,1578 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx) } } + +/* MXU accumulate add/subtract 1-bit pattern 'aptn1' */ +#define MXU_APTN1_A 0 +#define MXU_APTN1_S 1 + +/* MXU accumulate add/subtract 2-bit pattern 'aptn2' */ +#define MXU_APTN2_AA 0 +#define MXU_APTN2_AS 1 +#define MXU_APTN2_SA 2 +#define MXU_APTN2_SS 3 + +/* MXU execute add/subtract 2-bit pattern 'eptn2' */ +#define MXU_EPTN2_AA 0 +#define MXU_EPTN2_AS 1 +#define MXU_EPTN2_SA 2 +#define MXU_EPTN2_SS 3 + +/* MXU operand getting pattern 'optn2' */ +#define MXU_OPTN2_WW 0 +#define MXU_OPTN2_LW 1 +#define MXU_OPTN2_HW 2 +#define MXU_OPTN2_XW 3 + +/* MXU operand getting pattern 'optn3' */ +#define MXU_OPTN3_PTN0 0 +#define MXU_OPTN3_PTN1 1 +#define MXU_OPTN3_PTN2 2 +#define MXU_OPTN3_PTN3 3 +#define MXU_OPTN3_PTN4 4 +#define MXU_OPTN3_PTN5 5 +#define MXU_OPTN3_PTN6 6 +#define MXU_OPTN3_PTN7 7 + + +/* + * S32I2M XRa, rb - Register move from GRF to XRF + */ +static void gen_mxu_s32i2m(DisasContext *ctx) +{ + TCGv t0; + uint32_t XRa, Rb; + + t0 = tcg_temp_new(); + + XRa = extract32(ctx->opcode, 6, 5); + Rb = extract32(ctx->opcode, 16, 5); + + gen_load_gpr(t0, Rb); + if (XRa <= 15) { + gen_store_mxu_gpr(t0, XRa); + } else if (XRa == 16) { + gen_store_mxu_cr(t0); + } + + tcg_temp_free(t0); +} + +/* + * S32M2I XRa, rb - Register move from XRF to GRF + */ +static void gen_mxu_s32m2i(DisasContext *ctx) +{ + TCGv t0; + uint32_t XRa, Rb; + + t0 = tcg_temp_new(); + + XRa = extract32(ctx->opcode, 6, 5); + Rb = extract32(ctx->opcode, 16, 5); + + if (XRa <= 15) { + gen_load_mxu_gpr(t0, XRa); + } else if (XRa == 16) { + gen_load_mxu_cr(t0); + } + + gen_store_gpr(t0, Rb); + + tcg_temp_free(t0); +} + +/* + * S8LDD XRa, Rb, s8, optn3 - Load a byte from memory to XRF + */ +static void gen_mxu_s8ldd(DisasContext *ctx) +{ + TCGv t0, t1; + uint32_t XRa, Rb, s8, optn3; + + t0 = tcg_temp_new(); + t1 = tcg_temp_new(); + + XRa = extract32(ctx->opcode, 6, 4); + s8 = extract32(ctx->opcode, 10, 8); + optn3 = extract32(ctx->opcode, 18, 3); + Rb = extract32(ctx->opcode, 21, 5); + + gen_load_gpr(t0, Rb); + tcg_gen_addi_tl(t0, t0, (int8_t)s8); + + switch (optn3) { + /* XRa[7:0] = tmp8 */ + case MXU_OPTN3_PTN0: + tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_UB); + gen_load_mxu_gpr(t0, XRa); + tcg_gen_deposit_tl(t0, t0, t1, 0, 8); + break; + /* XRa[15:8] = tmp8 */ + case MXU_OPTN3_PTN1: + tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_UB); + gen_load_mxu_gpr(t0, XRa); + tcg_gen_deposit_tl(t0, t0, t1, 8, 8); + break; + /* XRa[23:16] = tmp8 */ + case MXU_OPTN3_PTN2: + tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_UB); + gen_load_mxu_gpr(t0, XRa); + tcg_gen_deposit_tl(t0, t0, t1, 16, 8); + break; + /* XRa[31:24] = tmp8 */ + case MXU_OPTN3_PTN3: + tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_UB); + gen_load_mxu_gpr(t0, XRa); + tcg_gen_deposit_tl(t0, t0, t1, 24, 8); + break; + /* XRa = {8'b0, tmp8, 8'b0, tmp8} */ + case MXU_OPTN3_PTN4: + tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_UB); + tcg_gen_deposit_tl(t0, t1, t1, 16, 16); + break; + /* XRa = {tmp8, 8'b0, tmp8, 8'b0} */ + case MXU_OPTN3_PTN5: + tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_UB); + tcg_gen_shli_tl(t1, t1, 8); + tcg_gen_deposit_tl(t0, t1, t1, 16, 16); + break; + /* XRa = {{8{sign of tmp8}}, tmp8, {8{sign of tmp8}}, tmp8} */ + case MXU_OPTN3_PTN6: + tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_SB); + tcg_gen_mov_tl(t0, t1); + tcg_gen_andi_tl(t0, t0, 0xFF00FFFF); + tcg_gen_shli_tl(t1, t1, 16); + tcg_gen_or_tl(t0, t0, t1); + break; + /* XRa = {tmp8, tmp8, tmp8, tmp8} */ + case MXU_OPTN3_PTN7: + tcg_gen_qemu_ld_tl(t1, t0, ctx->mem_idx, MO_UB); + tcg_gen_deposit_tl(t1, t1, t1, 8, 8); + tcg_gen_deposit_tl(t0, t1, t1, 16, 16); + break; + } + + gen_store_mxu_gpr(t0, XRa); + + tcg_temp_free(t0); + tcg_temp_free(t1); +} + +/* + * D16MUL XRa, XRb, XRc, XRd, optn2 - Signed 16 bit pattern multiplication + */ +static void gen_mxu_d16mul(DisasContext *ctx) +{ + TCGv t0, t1, t2, t3; + uint32_t XRa, XRb, XRc, XRd, optn2; + + t0 = tcg_temp_new(); + t1 = tcg_temp_new(); + t2 = tcg_temp_new(); + t3 = tcg_temp_new(); + + XRa = extract32(ctx->opcode, 6, 4); + XRb = extract32(ctx->opcode, 10, 4); + XRc = extract32(ctx->opcode, 14, 4); + XRd = extract32(ctx->opcode, 18, 4); + optn2 = extract32(ctx->opcode, 22, 2); + + gen_load_mxu_gpr(t1, XRb); + tcg_gen_sextract_tl(t0, t1, 0, 16); + tcg_gen_sextract_tl(t1, t1, 16, 16); + gen_load_mxu_gpr(t3, XRc); + tcg_gen_sextract_tl(t2, t3, 0, 16); + tcg_gen_sextract_tl(t3, t3, 16, 16); + + switch (optn2) { + case MXU_OPTN2_WW: /* XRB.H*XRC.H == lop, XRB.L*XRC.L == rop */ + tcg_gen_mul_tl(t3, t1, t3); + tcg_gen_mul_tl(t2, t0, t2); + break; + case MXU_OPTN2_LW: /* XRB.L*XRC.H == lop, XRB.L*XRC.L == rop */ + tcg_gen_mul_tl(t3, t0, t3); + tcg_gen_mul_tl(t2, t0, t2); + break; + case MXU_OPTN2_HW: /* XRB.H*XRC.H == lop, XRB.H*XRC.L == rop */ + tcg_gen_mul_tl(t3, t1, t3); + tcg_gen_mul_tl(t2, t1, t2); + break; + case MXU_OPTN2_XW: /* XRB.L*XRC.H == lop, XRB.H*XRC.L == rop */ + tcg_gen_mul_tl(t3, t0, t3); + tcg_gen_mul_tl(t2, t1, t2); + break; + } + gen_store_mxu_gpr(t3, XRa); + gen_store_mxu_gpr(t2, XRd); + + tcg_temp_free(t0); + tcg_temp_free(t1); + tcg_temp_free(t2); + tcg_temp_free(t3); +} + +/* + * D16MAC XRa, XRb, XRc, XRd, aptn2, optn2 - Signed 16 bit pattern multiply + * and accumulate + */ +static void gen_mxu_d16mac(DisasContext *ctx) +{ + TCGv t0, t1, t2, t3; + uint32_t XRa, XRb, XRc, XRd, optn2, aptn2; + + t0 = tcg_temp_new(); + t1 = tcg_temp_new(); + t2 = tcg_temp_new(); + t3 = tcg_temp_new(); + + XRa = extract32(ctx->opcode, 6, 4); + XRb = extract32(ctx->opcode, 10, 4); + XRc = extract32(ctx->opcode, 14, 4); + XRd = extract32(ctx->opcode, 18, 4); + optn2 = extract32(ctx->opcode, 22, 2); + aptn2 = extract32(ctx->opcode, 24, 2); + + gen_load_mxu_gpr(t1, XRb); + tcg_gen_sextract_tl(t0, t1, 0, 16); + tcg_gen_sextract_tl(t1, t1, 16, 16); + + gen_load_mxu_gpr(t3, XRc); + tcg_gen_sextract_tl(t2, t3, 0, 16); + tcg_gen_sextract_tl(t3, t3, 16, 16); + + switch (optn2) { + case MXU_OPTN2_WW: /* XRB.H*XRC.H == lop, XRB.L*XRC.L == rop */ + tcg_gen_mul_tl(t3, t1, t3); + tcg_gen_mul_tl(t2, t0, t2); + break; + case MXU_OPTN2_LW: /* XRB.L*XRC.H == lop, XRB.L*XRC.L == rop */ + tcg_gen_mul_tl(t3, t0, t3); + tcg_gen_mul_tl(t2, t0, t2); + break; + case MXU_OPTN2_HW: /* XRB.H*XRC.H == lop, XRB.H*XRC.L == rop */ + tcg_gen_mul_tl(t3, t1, t3); + tcg_gen_mul_tl(t2, t1, t2); + break; + case MXU_OPTN2_XW: /* XRB.L*XRC.H == lop, XRB.H*XRC.L == rop */ + tcg_gen_mul_tl(t3, t0, t3); + tcg_gen_mul_tl(t2, t1, t2); + break; + } + gen_load_mxu_gpr(t0, XRa); + gen_load_mxu_gpr(t1, XRd); + + switch (aptn2) { + case MXU_APTN2_AA: + tcg_gen_add_tl(t3, t0, t3); + tcg_gen_add_tl(t2, t1, t2); + break; + case MXU_APTN2_AS: + tcg_gen_add_tl(t3, t0, t3); + tcg_gen_sub_tl(t2, t1, t2); + break; + case MXU_APTN2_SA: + tcg_gen_sub_tl(t3, t0, t3); + tcg_gen_add_tl(t2, t1, t2); + break; + case MXU_APTN2_SS: + tcg_gen_sub_tl(t3, t0, t3); + tcg_gen_sub_tl(t2, t1, t2); + break; + } + gen_store_mxu_gpr(t3, XRa); + gen_store_mxu_gpr(t2, XRd); + + tcg_temp_free(t0); + tcg_temp_free(t1); + tcg_temp_free(t2); + tcg_temp_free(t3); +} + +/* + * Q8MUL XRa, XRb, XRc, XRd - Parallel unsigned 8 bit pattern multiply + * Q8MULSU XRa, XRb, XRc, XRd - Parallel signed 8 bit pattern multiply + */ +static void gen_mxu_q8mul_q8mulsu(DisasContext *ctx) +{ + TCGv t0, t1, t2, t3, t4, t5, t6, t7; + uint32_t XRa, XRb, XRc, XRd, sel; + + t0 = tcg_temp_new(); + t1 = tcg_temp_new(); + t2 = tcg_temp_new(); + t3 = tcg_temp_new(); + t4 = tcg_temp_new(); + t5 = tcg_temp_new(); + t6 = tcg_temp_new(); + t7 = tcg_temp_new(); + + XRa = extract32(ctx->opcode, 6, 4); + XRb = extract32(ctx->opcode, 10, 4); + XRc = extract32(ctx->opcode, 14, 4); + XRd = extract32(ctx->opcode, 18, 4); + sel = extract32(ctx->opcode, 22, 2); + + gen_load_mxu_gpr(t3, XRb); + gen_load_mxu_gpr(t7, XRc); + + if (sel == 0x2) { + /* Q8MULSU */ + tcg_gen_ext8s_tl(t0, t3); + tcg_gen_shri_tl(t3, t3, 8); + tcg_gen_ext8s_tl(t1, t3); + tcg_gen_shri_tl(t3, t3, 8); + tcg_gen_ext8s_tl(t2, t3); + tcg_gen_shri_tl(t3, t3, 8); + tcg_gen_ext8s_tl(t3, t3); + } else { + /* Q8MUL */ + tcg_gen_ext8u_tl(t0, t3); + tcg_gen_shri_tl(t3, t3, 8); + tcg_gen_ext8u_tl(t1, t3); + tcg_gen_shri_tl(t3, t3, 8); + tcg_gen_ext8u_tl(t2, t3); + tcg_gen_shri_tl(t3, t3, 8); + tcg_gen_ext8u_tl(t3, t3); + } + + tcg_gen_ext8u_tl(t4, t7); + tcg_gen_shri_tl(t7, t7, 8); + tcg_gen_ext8u_tl(t5, t7); + tcg_gen_shri_tl(t7, t7, 8); + tcg_gen_ext8u_tl(t6, t7); + tcg_gen_shri_tl(t7, t7, 8); + tcg_gen_ext8u_tl(t7, t7); + + tcg_gen_mul_tl(t0, t0, t4); + tcg_gen_mul_tl(t1, t1, t5); + tcg_gen_mul_tl(t2, t2, t6); + tcg_gen_mul_tl(t3, t3, t7); + + tcg_gen_andi_tl(t0, t0, 0xFFFF); + tcg_gen_andi_tl(t1, t1, 0xFFFF); + tcg_gen_andi_tl(t2, t2, 0xFFFF); + tcg_gen_andi_tl(t3, t3, 0xFFFF); + + tcg_gen_shli_tl(t1, t1, 16); + tcg_gen_shli_tl(t3, t3, 16); + + tcg_gen_or_tl(t0, t0, t1); + tcg_gen_or_tl(t1, t2, t3); + + gen_store_mxu_gpr(t0, XRd); + gen_store_mxu_gpr(t1, XRa); + + tcg_temp_free(t0); + tcg_temp_free(t1); + tcg_temp_free(t2); + tcg_temp_free(t3); + tcg_temp_free(t4); + tcg_temp_free(t5); + tcg_temp_free(t6); + tcg_temp_free(t7); +} + +/* + * S32LDD XRa, Rb, S12 - Load a word from memory to XRF + * S32LDDR XRa, Rb, S12 - Load a word from memory to XRF, reversed byte seq. + */ +static void gen_mxu_s32ldd_s32lddr(DisasContext *ctx) +{ + TCGv t0, t1; + uint32_t XRa, Rb, s12, sel; + + t0 = tcg_temp_new(); + t1 = tcg_temp_new(); + + XRa = extract32(ctx->opcode, 6, 4); + s12 = extract32(ctx->opcode, 10, 10); + sel = extract32(ctx->opcode, 20, 1); + Rb = extract32(ctx->opcode, 21, 5); + + gen_load_gpr(t0, Rb); + + tcg_gen_movi_tl(t1, s12); + tcg_gen_shli_tl(t1, t1, 2); + if (s12 & 0x200) { + tcg_gen_ori_tl(t1, t1, 0xFFFFF000); + } + tcg_gen_add_tl(t1, t0, t1); + tcg_gen_qemu_ld_tl(t1, t1, ctx->mem_idx, MO_SL); + + if (sel == 1) { + /* S32LDDR */ + tcg_gen_bswap32_tl(t1, t1); + } + gen_store_mxu_gpr(t1, XRa); + + tcg_temp_free(t0); + tcg_temp_free(t1); +} + + +/* + * Decoding engine for MXU + * ======================= + */ + +/* + * + * Decode MXU pool00 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+-----+-------+-------+-------+-----------+ + * | SPECIAL2 |0 0 0 0 0|x x x| XRc | XRb | XRa |MXU__POOL00| + * +-----------+---------+-----+-------+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool00(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 18, 3); + + switch (opcode) { + case OPC_MXU_S32MAX: + /* TODO: Implement emulation of S32MAX instruction. */ + MIPS_INVAL("OPC_MXU_S32MAX"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32MIN: + /* TODO: Implement emulation of S32MIN instruction. */ + MIPS_INVAL("OPC_MXU_S32MIN"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D16MAX: + /* TODO: Implement emulation of D16MAX instruction. */ + MIPS_INVAL("OPC_MXU_D16MAX"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D16MIN: + /* TODO: Implement emulation of D16MIN instruction. */ + MIPS_INVAL("OPC_MXU_D16MIN"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q8MAX: + /* TODO: Implement emulation of Q8MAX instruction. */ + MIPS_INVAL("OPC_MXU_Q8MAX"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q8MIN: + /* TODO: Implement emulation of Q8MIN instruction. */ + MIPS_INVAL("OPC_MXU_Q8MIN"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q8SLT: + /* TODO: Implement emulation of Q8SLT instruction. */ + MIPS_INVAL("OPC_MXU_Q8SLT"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q8SLTU: + /* TODO: Implement emulation of Q8SLTU instruction. */ + MIPS_INVAL("OPC_MXU_Q8SLTU"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool01 + * + * S32SLT, D16SLT, D16AVG, D16AVGR, Q8AVG, Q8AVGR: + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+-----+-------+-------+-------+-----------+ + * | SPECIAL2 |0 0 0 0 0|x x x| XRc | XRb | XRa |MXU__POOL01| + * +-----------+---------+-----+-------+-------+-------+-----------+ + * + * Q8ADD: + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---+-----+-----+-------+-------+-------+-----------+ + * | SPECIAL2 |en2|0 0 0|x x x| XRc | XRb | XRa |MXU__POOL01| + * +-----------+---+-----+-----+-------+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool01(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 18, 3); + + switch (opcode) { + case OPC_MXU_S32SLT: + /* TODO: Implement emulation of S32SLT instruction. */ + MIPS_INVAL("OPC_MXU_S32SLT"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D16SLT: + /* TODO: Implement emulation of D16SLT instruction. */ + MIPS_INVAL("OPC_MXU_D16SLT"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D16AVG: + /* TODO: Implement emulation of D16AVG instruction. */ + MIPS_INVAL("OPC_MXU_D16AVG"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D16AVGR: + /* TODO: Implement emulation of D16AVGR instruction. */ + MIPS_INVAL("OPC_MXU_D16AVGR"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q8AVG: + /* TODO: Implement emulation of Q8AVG instruction. */ + MIPS_INVAL("OPC_MXU_Q8AVG"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q8AVGR: + /* TODO: Implement emulation of Q8AVGR instruction. */ + MIPS_INVAL("OPC_MXU_Q8AVGR"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q8ADD: + /* TODO: Implement emulation of Q8ADD instruction. */ + MIPS_INVAL("OPC_MXU_Q8ADD"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool02 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+-----+-------+-------+-------+-----------+ + * | SPECIAL2 |0 0 0 0 0|x x x| XRc | XRb | XRa |MXU__POOL02| + * +-----------+---------+-----+-------+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool02(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 18, 3); + + switch (opcode) { + case OPC_MXU_S32CPS: + /* TODO: Implement emulation of S32CPS instruction. */ + MIPS_INVAL("OPC_MXU_S32CPS"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D16CPS: + /* TODO: Implement emulation of D16CPS instruction. */ + MIPS_INVAL("OPC_MXU_D16CPS"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q8ABD: + /* TODO: Implement emulation of Q8ABD instruction. */ + MIPS_INVAL("OPC_MXU_Q8ABD"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q16SAT: + /* TODO: Implement emulation of Q16SAT instruction. */ + MIPS_INVAL("OPC_MXU_Q16SAT"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool03 + * + * D16MULF: + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * | SPECIAL2 |x x|on2|0 0 0 0| XRc | XRb | XRa |MXU__POOL03| + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * + * D16MULE: + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * | SPECIAL2 |x x|on2| Xd | XRc | XRb | XRa |MXU__POOL03| + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool03(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 24, 2); + + switch (opcode) { + case OPC_MXU_D16MULF: + /* TODO: Implement emulation of D16MULF instruction. */ + MIPS_INVAL("OPC_MXU_D16MULF"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D16MULE: + /* TODO: Implement emulation of D16MULE instruction. */ + MIPS_INVAL("OPC_MXU_D16MULE"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool04 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+-+-------------------+-------+-----------+ + * | SPECIAL2 | rb |x| s12 | XRa |MXU__POOL04| + * +-----------+---------+-+-------------------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool04(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 20, 1); + + switch (opcode) { + case OPC_MXU_S32LDD: + case OPC_MXU_S32LDDR: + gen_mxu_s32ldd_s32lddr(ctx); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool05 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+-+-------------------+-------+-----------+ + * | SPECIAL2 | rb |x| s12 | XRa |MXU__POOL05| + * +-----------+---------+-+-------------------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool05(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 20, 1); + + switch (opcode) { + case OPC_MXU_S32STD: + /* TODO: Implement emulation of S32STD instruction. */ + MIPS_INVAL("OPC_MXU_S32STD"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32STDR: + /* TODO: Implement emulation of S32STDR instruction. */ + MIPS_INVAL("OPC_MXU_S32STDR"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool06 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+---------+---+-------+-------+-----------+ + * | SPECIAL2 | rb | rc |st2|x x x x| XRa |MXU__POOL06| + * +-----------+---------+---------+---+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool06(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 10, 4); + + switch (opcode) { + case OPC_MXU_S32LDDV: + /* TODO: Implement emulation of S32LDDV instruction. */ + MIPS_INVAL("OPC_MXU_S32LDDV"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32LDDVR: + /* TODO: Implement emulation of S32LDDVR instruction. */ + MIPS_INVAL("OPC_MXU_S32LDDVR"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool07 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+---------+---+-------+-------+-----------+ + * | SPECIAL2 | rb | rc |st2|x x x x| XRa |MXU__POOL07| + * +-----------+---------+---------+---+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool07(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 10, 4); + + switch (opcode) { + case OPC_MXU_S32STDV: + /* TODO: Implement emulation of S32TDV instruction. */ + MIPS_INVAL("OPC_MXU_S32TDV"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32STDVR: + /* TODO: Implement emulation of S32TDVR instruction. */ + MIPS_INVAL("OPC_MXU_S32TDVR"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool08 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+-+-------------------+-------+-----------+ + * | SPECIAL2 | rb |x| s12 | XRa |MXU__POOL08| + * +-----------+---------+-+-------------------+-------+-----------+ + * +*/ +static void decode_opc_mxu__pool08(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 20, 1); + + switch (opcode) { + case OPC_MXU_S32LDI: + /* TODO: Implement emulation of S32LDI instruction. */ + MIPS_INVAL("OPC_MXU_S32LDI"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32LDIR: + /* TODO: Implement emulation of S32LDIR instruction. */ + MIPS_INVAL("OPC_MXU_S32LDIR"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool09 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+-+-------------------+-------+-----------+ + * | SPECIAL2 | rb |x| s12 | XRa |MXU__POOL09| + * +-----------+---------+-+-------------------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool09(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 5, 0); + + switch (opcode) { + case OPC_MXU_S32SDI: + /* TODO: Implement emulation of S32SDI instruction. */ + MIPS_INVAL("OPC_MXU_S32SDI"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32SDIR: + /* TODO: Implement emulation of S32SDIR instruction. */ + MIPS_INVAL("OPC_MXU_S32SDIR"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool10 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+---------+---+-------+-------+-----------+ + * | SPECIAL2 | rb | rc |st2|x x x x| XRa |MXU__POOL10| + * +-----------+---------+---------+---+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool10(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 5, 0); + + switch (opcode) { + case OPC_MXU_S32LDIV: + /* TODO: Implement emulation of S32LDIV instruction. */ + MIPS_INVAL("OPC_MXU_S32LDIV"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32LDIVR: + /* TODO: Implement emulation of S32LDIVR instruction. */ + MIPS_INVAL("OPC_MXU_S32LDIVR"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool11 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+---------+---+-------+-------+-----------+ + * | SPECIAL2 | rb | rc |st2|x x x x| XRa |MXU__POOL11| + * +-----------+---------+---------+---+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool11(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 10, 4); + + switch (opcode) { + case OPC_MXU_S32SDIV: + /* TODO: Implement emulation of S32SDIV instruction. */ + MIPS_INVAL("OPC_MXU_S32SDIV"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32SDIVR: + /* TODO: Implement emulation of S32SDIVR instruction. */ + MIPS_INVAL("OPC_MXU_S32SDIVR"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool12 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * | SPECIAL2 |an2|x x| Xd | XRc | XRb | XRa |MXU__POOL12| + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool12(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 22, 2); + + switch (opcode) { + case OPC_MXU_D32ACC: + /* TODO: Implement emulation of D32ACC instruction. */ + MIPS_INVAL("OPC_MXU_D32ACC"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D32ACCM: + /* TODO: Implement emulation of D32ACCM instruction. */ + MIPS_INVAL("OPC_MXU_D32ACCM"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D32ASUM: + /* TODO: Implement emulation of D32ASUM instruction. */ + MIPS_INVAL("OPC_MXU_D32ASUM"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool13 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * | SPECIAL2 |en2|x x|0 0 0 0| XRc | XRb | XRa |MXU__POOL13| + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool13(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 22, 2); + + switch (opcode) { + case OPC_MXU_Q16ACC: + /* TODO: Implement emulation of Q16ACC instruction. */ + MIPS_INVAL("OPC_MXU_Q16ACC"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q16ACCM: + /* TODO: Implement emulation of Q16ACCM instruction. */ + MIPS_INVAL("OPC_MXU_Q16ACCM"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q16ASUM: + /* TODO: Implement emulation of Q16ASUM instruction. */ + MIPS_INVAL("OPC_MXU_Q16ASUM"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool14 + * + * Q8ADDE, Q8ACCE: + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * | SPECIAL2 |0 0|x x| XRd | XRc | XRb | XRa |MXU__POOL14| + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * + * D8SUM, D8SUMC: + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * | SPECIAL2 |en2|x x|0 0 0 0| XRc | XRb | XRa |MXU__POOL14| + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool14(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 22, 2); + + switch (opcode) { + case OPC_MXU_Q8ADDE: + /* TODO: Implement emulation of Q8ADDE instruction. */ + MIPS_INVAL("OPC_MXU_Q8ADDE"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D8SUM: + /* TODO: Implement emulation of D8SUM instruction. */ + MIPS_INVAL("OPC_MXU_D8SUM"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D8SUMC: + /* TODO: Implement emulation of D8SUMC instruction. */ + MIPS_INVAL("OPC_MXU_D8SUMC"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool15 + * + * S32MUL, S32MULU, S32EXTRV: + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+---------+---+-------+-------+-----------+ + * | SPECIAL2 | rs | rt |x x| XRd | XRa |MXU__POOL15| + * +-----------+---------+---------+---+-------+-------+-----------+ + * + * S32EXTR: + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+---------+---+-------+-------+-----------+ + * | SPECIAL2 | rb | sft5 |x x| XRd | XRa |MXU__POOL15| + * +-----------+---------+---------+---+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool15(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 14, 2); + + switch (opcode) { + case OPC_MXU_S32MUL: + /* TODO: Implement emulation of S32MUL instruction. */ + MIPS_INVAL("OPC_MXU_S32MUL"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32MULU: + /* TODO: Implement emulation of S32MULU instruction. */ + MIPS_INVAL("OPC_MXU_S32MULU"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32EXTR: + /* TODO: Implement emulation of S32EXTR instruction. */ + MIPS_INVAL("OPC_MXU_S32EXTR"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32EXTRV: + /* TODO: Implement emulation of S32EXTRV instruction. */ + MIPS_INVAL("OPC_MXU_S32EXTRV"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool16 + * + * D32SARW: + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+-----+-------+-------+-------+-----------+ + * | SPECIAL2 | rb |x x x| XRc | XRb | XRa |MXU__POOL16| + * +-----------+---------+-----+-------+-------+-------+-----------+ + * + * S32ALN: + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+-----+-------+-------+-------+-----------+ + * | SPECIAL2 | rs |x x x| XRc | XRb | XRa |MXU__POOL16| + * +-----------+---------+-----+-------+-------+-------+-----------+ + * + * S32ALNI: + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+-----+---+-----+-------+-------+-------+-----------+ + * | SPECIAL2 | s3 |0 0|x x x| XRc | XRb | XRa |MXU__POOL16| + * +-----------+-----+---+-----+-------+-------+-------+-----------+ + * + * S32NOR, S32AND, S32OR, S32XOR: + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+-----+-------+-------+-------+-----------+ + * | SPECIAL2 |0 0 0 0 0|x x x| XRc | XRb | XRa |MXU__POOL16| + * +-----------+---------+-----+-------+-------+-------+-----------+ + * + * S32LUI: + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+-----+---+-----+-------+---------------+-----------+ + * | SPECIAL2 |optn3|0 0|x x x| XRc | s8 |MXU__POOL16| + * +-----------+-----+---+-----+-------+---------------+-----------+ + * + */ +static void decode_opc_mxu__pool16(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 18, 3); + + switch (opcode) { + case OPC_MXU_D32SARW: + /* TODO: Implement emulation of D32SARW instruction. */ + MIPS_INVAL("OPC_MXU_D32SARW"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32ALN: + /* TODO: Implement emulation of S32ALN instruction. */ + MIPS_INVAL("OPC_MXU_S32ALN"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32ALNI: + /* TODO: Implement emulation of S32ALNI instruction. */ + MIPS_INVAL("OPC_MXU_S32ALNI"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32NOR: + /* TODO: Implement emulation of S32NOR instruction. */ + MIPS_INVAL("OPC_MXU_S32NOR"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32AND: + /* TODO: Implement emulation of S32AND instruction. */ + MIPS_INVAL("OPC_MXU_S32AND"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32OR: + /* TODO: Implement emulation of S32OR instruction. */ + MIPS_INVAL("OPC_MXU_S32OR"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32XOR: + /* TODO: Implement emulation of S32XOR instruction. */ + MIPS_INVAL("OPC_MXU_S32XOR"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32LUI: + /* TODO: Implement emulation of S32LUI instruction. */ + MIPS_INVAL("OPC_MXU_S32LUI"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool17 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+-----+-------+-------+-------+-----------+ + * | SPECIAL2 | rb |x x x| XRd | XRa |0 0 0 0|MXU__POOL17| + * +-----------+---------+-----+-------+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool17(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 18, 3); + + switch (opcode) { + case OPC_MXU_D32SLLV: + /* TODO: Implement emulation of D32SLLV instruction. */ + MIPS_INVAL("OPC_MXU_D32SLLV"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D32SLRV: + /* TODO: Implement emulation of D32SLRV instruction. */ + MIPS_INVAL("OPC_MXU_D32SLRV"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D32SARV: + /* TODO: Implement emulation of D32SARV instruction. */ + MIPS_INVAL("OPC_MXU_D32SARV"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q16SLLV: + /* TODO: Implement emulation of Q16SLLV instruction. */ + MIPS_INVAL("OPC_MXU_Q16SLLV"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q16SLRV: + /* TODO: Implement emulation of Q16SLRV instruction. */ + MIPS_INVAL("OPC_MXU_Q16SLRV"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q16SARV: + /* TODO: Implement emulation of Q16SARV instruction. */ + MIPS_INVAL("OPC_MXU_Q16SARV"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool18 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * | SPECIAL2 |0 0|x x| XRd | XRc | XRb | XRa |MXU__POOL18| + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool18(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 22, 2); + + switch (opcode) { + case OPC_MXU_Q8MUL: + case OPC_MXU_Q8MULSU: + gen_mxu_q8mul_q8mulsu(ctx); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool19 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------+-----+-------+-------+-------+-----------+ + * | SPECIAL2 |0 0 0 0 0|x x x| XRc | XRb | XRa |MXU__POOL19| + * +-----------+---------+-----+-------+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool19(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 18, 3); + + switch (opcode) { + case OPC_MXU_Q8MOVZ: + /* TODO: Implement emulation of Q8MOVZ instruction. */ + MIPS_INVAL("OPC_MXU_Q8MOVZ"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q8MOVN: + /* TODO: Implement emulation of Q8MOVN instruction. */ + MIPS_INVAL("OPC_MXU_Q8MOVN"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D16MOVZ: + /* TODO: Implement emulation of D16MOVZ instruction. */ + MIPS_INVAL("OPC_MXU_D16MOVZ"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D16MOVN: + /* TODO: Implement emulation of D16MOVN instruction. */ + MIPS_INVAL("OPC_MXU_D16MOVN"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32MOVZ: + /* TODO: Implement emulation of S32MOVZ instruction. */ + MIPS_INVAL("OPC_MXU_S32MOVZ"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32MOVN: + /* TODO: Implement emulation of S32MOVN instruction. */ + MIPS_INVAL("OPC_MXU_S32MOVN"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + +/* + * + * Decode MXU pool20 + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * | SPECIAL2 |an2|x x| XRd | XRc | XRb | XRa |MXU__POOL20| + * +-----------+---+---+-------+-------+-------+-------+-----------+ + * + */ +static void decode_opc_mxu__pool20(CPUMIPSState *env, DisasContext *ctx) +{ + uint32_t opcode = extract32(ctx->opcode, 22, 2); + + switch (opcode) { + case OPC_MXU_Q8MAC: + /* TODO: Implement emulation of Q8MAC instruction. */ + MIPS_INVAL("OPC_MXU_Q8MAC"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q8MACSU: + /* TODO: Implement emulation of Q8MACSU instruction. */ + MIPS_INVAL("OPC_MXU_Q8MACSU"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + break; + } +} + + +/* + * Main MXU decoding function + * + * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 + * +-----------+---------------------------------------+-----------+ + * | SPECIAL2 | |x x x x x x| + * +-----------+---------------------------------------+-----------+ + * + */ +static void decode_opc_mxu(CPUMIPSState *env, DisasContext *ctx) +{ + /* + * TODO: Investigate necessity of including handling of + * CLZ, CLO, SDBB in this function, as they belong to + * SPECIAL2 opcode space for regular pre-R6 MIPS ISAs. + */ + uint32_t opcode = extract32(ctx->opcode, 0, 6); + + if (opcode == OPC__MXU_MUL) { + uint32_t rs, rt, rd, op1; + + rs = extract32(ctx->opcode, 21, 5); + rt = extract32(ctx->opcode, 16, 5); + rd = extract32(ctx->opcode, 11, 5); + op1 = MASK_SPECIAL2(ctx->opcode); + + gen_arith(ctx, op1, rd, rs, rt); + + return; + } + + if (opcode == OPC_MXU_S32M2I) { + gen_mxu_s32m2i(ctx); + return; + } + + if (opcode == OPC_MXU_S32I2M) { + gen_mxu_s32i2m(ctx); + return; + } + + { + TCGv t_mxu_cr = tcg_temp_new(); + TCGLabel *l_exit = gen_new_label(); + + gen_load_mxu_cr(t_mxu_cr); + tcg_gen_andi_tl(t_mxu_cr, t_mxu_cr, MXU_CR_MXU_EN); + tcg_gen_brcondi_tl(TCG_COND_NE, t_mxu_cr, MXU_CR_MXU_EN, l_exit); + + switch (opcode) { + case OPC_MXU_S32MADD: + /* TODO: Implement emulation of S32MADD instruction. */ + MIPS_INVAL("OPC_MXU_S32MADD"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32MADDU: + /* TODO: Implement emulation of S32MADDU instruction. */ + MIPS_INVAL("OPC_MXU_S32MADDU"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU__POOL00: + decode_opc_mxu__pool00(env, ctx); + break; + case OPC_MXU_S32MSUB: + /* TODO: Implement emulation of S32MSUB instruction. */ + MIPS_INVAL("OPC_MXU_S32MSUB"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32MSUBU: + /* TODO: Implement emulation of S32MSUBU instruction. */ + MIPS_INVAL("OPC_MXU_S32MSUBU"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU__POOL01: + decode_opc_mxu__pool01(env, ctx); + break; + case OPC_MXU__POOL02: + decode_opc_mxu__pool02(env, ctx); + break; + case OPC_MXU_D16MUL: + gen_mxu_d16mul(ctx); + break; + case OPC_MXU__POOL03: + decode_opc_mxu__pool03(env, ctx); + break; + case OPC_MXU_D16MAC: + gen_mxu_d16mac(ctx); + break; + case OPC_MXU_D16MACF: + /* TODO: Implement emulation of D16MACF instruction. */ + MIPS_INVAL("OPC_MXU_D16MACF"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D16MADL: + /* TODO: Implement emulation of D16MADL instruction. */ + MIPS_INVAL("OPC_MXU_D16MADL"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S16MAD: + /* TODO: Implement emulation of S16MAD instruction. */ + MIPS_INVAL("OPC_MXU_S16MAD"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q16ADD: + /* TODO: Implement emulation of Q16ADD instruction. */ + MIPS_INVAL("OPC_MXU_Q16ADD"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D16MACE: + /* TODO: Implement emulation of D16MACE instruction. */ + MIPS_INVAL("OPC_MXU_D16MACE"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU__POOL04: + decode_opc_mxu__pool04(env, ctx); + break; + case OPC_MXU__POOL05: + decode_opc_mxu__pool05(env, ctx); + break; + case OPC_MXU__POOL06: + decode_opc_mxu__pool06(env, ctx); + break; + case OPC_MXU__POOL07: + decode_opc_mxu__pool07(env, ctx); + break; + case OPC_MXU__POOL08: + decode_opc_mxu__pool08(env, ctx); + break; + case OPC_MXU__POOL09: + decode_opc_mxu__pool09(env, ctx); + break; + case OPC_MXU__POOL10: + decode_opc_mxu__pool10(env, ctx); + break; + case OPC_MXU__POOL11: + decode_opc_mxu__pool11(env, ctx); + break; + case OPC_MXU_D32ADD: + /* TODO: Implement emulation of D32ADD instruction. */ + MIPS_INVAL("OPC_MXU_D32ADD"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU__POOL12: + decode_opc_mxu__pool12(env, ctx); + break; + case OPC_MXU__POOL13: + decode_opc_mxu__pool13(env, ctx); + break; + case OPC_MXU__POOL14: + decode_opc_mxu__pool14(env, ctx); + break; + case OPC_MXU_Q8ACCE: + /* TODO: Implement emulation of Q8ACCE instruction. */ + MIPS_INVAL("OPC_MXU_Q8ACCE"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S8LDD: + gen_mxu_s8ldd(ctx); + break; + case OPC_MXU_S8STD: + /* TODO: Implement emulation of S8STD instruction. */ + MIPS_INVAL("OPC_MXU_S8STD"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S8LDI: + /* TODO: Implement emulation of S8LDI instruction. */ + MIPS_INVAL("OPC_MXU_S8LDI"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S8SDI: + /* TODO: Implement emulation of S8SDI instruction. */ + MIPS_INVAL("OPC_MXU_S8SDI"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU__POOL15: + decode_opc_mxu__pool15(env, ctx); + break; + case OPC_MXU__POOL16: + decode_opc_mxu__pool16(env, ctx); + break; + case OPC_MXU_LXB: + /* TODO: Implement emulation of LXB instruction. */ + MIPS_INVAL("OPC_MXU_LXB"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S16LDD: + /* TODO: Implement emulation of S16LDD instruction. */ + MIPS_INVAL("OPC_MXU_S16LDD"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S16STD: + /* TODO: Implement emulation of S16STD instruction. */ + MIPS_INVAL("OPC_MXU_S16STD"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S16LDI: + /* TODO: Implement emulation of S16LDI instruction. */ + MIPS_INVAL("OPC_MXU_S16LDI"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S16SDI: + /* TODO: Implement emulation of S16SDI instruction. */ + MIPS_INVAL("OPC_MXU_S16SDI"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D32SLL: + /* TODO: Implement emulation of D32SLL instruction. */ + MIPS_INVAL("OPC_MXU_D32SLL"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D32SLR: + /* TODO: Implement emulation of D32SLR instruction. */ + MIPS_INVAL("OPC_MXU_D32SLR"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D32SARL: + /* TODO: Implement emulation of D32SARL instruction. */ + MIPS_INVAL("OPC_MXU_D32SARL"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_D32SAR: + /* TODO: Implement emulation of D32SAR instruction. */ + MIPS_INVAL("OPC_MXU_D32SAR"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q16SLL: + /* TODO: Implement emulation of Q16SLL instruction. */ + MIPS_INVAL("OPC_MXU_Q16SLL"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q16SLR: + /* TODO: Implement emulation of Q16SLR instruction. */ + MIPS_INVAL("OPC_MXU_Q16SLR"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU__POOL17: + decode_opc_mxu__pool17(env, ctx); + break; + case OPC_MXU_Q16SAR: + /* TODO: Implement emulation of Q16SAR instruction. */ + MIPS_INVAL("OPC_MXU_Q16SAR"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU__POOL18: + decode_opc_mxu__pool18(env, ctx); + break; + case OPC_MXU__POOL19: + decode_opc_mxu__pool19(env, ctx); + break; + case OPC_MXU__POOL20: + decode_opc_mxu__pool20(env, ctx); + break; + case OPC_MXU_Q16SCOP: + /* TODO: Implement emulation of Q16SCOP instruction. */ + MIPS_INVAL("OPC_MXU_Q16SCOP"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q8MADL: + /* TODO: Implement emulation of Q8MADL instruction. */ + MIPS_INVAL("OPC_MXU_Q8MADL"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_S32SFL: + /* TODO: Implement emulation of S32SFL instruction. */ + MIPS_INVAL("OPC_MXU_S32SFL"); + generate_exception_end(ctx, EXCP_RI); + break; + case OPC_MXU_Q8SAD: + /* TODO: Implement emulation of Q8SAD instruction. */ + MIPS_INVAL("OPC_MXU_Q8SAD"); + generate_exception_end(ctx, EXCP_RI); + break; + default: + MIPS_INVAL("decode_opc_mxu"); + generate_exception_end(ctx, EXCP_RI); + } + + gen_set_label(l_exit); + tcg_temp_free(t_mxu_cr); + } +} + + static void decode_opc_special2_legacy(CPUMIPSState *env, DisasContext *ctx) { int rs, rt, rd; @@ -26094,6 +27887,8 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx) case OPC_SPECIAL2: if ((ctx->insn_flags & INSN_R5900) && (ctx->insn_flags & ASE_MMI)) { decode_tx79_mmi(env, ctx); + } else if (ctx->insn_flags & ASE_MXU) { + decode_opc_mxu(env, ctx); } else { decode_opc_special2_legacy(env, ctx); } @@ -27091,6 +28886,17 @@ void mips_tcg_init(void) fpu_fcr31 = tcg_global_mem_new_i32(cpu_env, offsetof(CPUMIPSState, active_fpu.fcr31), "fcr31"); + + for (i = 0; i < NUMBER_OF_MXU_REGISTERS - 1; i++) { + mxu_gpr[i] = tcg_global_mem_new(cpu_env, + offsetof(CPUMIPSState, + active_tc.mxu_gpr[i]), + mxuregnames[i]); + } + + mxu_CR = tcg_global_mem_new(cpu_env, + offsetof(CPUMIPSState, active_tc.mxu_cr), + mxuregnames[NUMBER_OF_MXU_REGISTERS - 1]); } #include "translate_init.inc.c" diff --git a/tests/cpu-plug-test.c b/tests/cpu-plug-test.c index 3e93c8e096..f4a677d238 100644 --- a/tests/cpu-plug-test.c +++ b/tests/cpu-plug-test.c @@ -32,12 +32,12 @@ static void test_plug_with_cpu_add(gconstpointer data) unsigned int i; args = g_strdup_printf("-machine %s -cpu %s " - "-smp sockets=%u,cores=%u,threads=%u,maxcpus=%u", + "-smp 1,sockets=%u,cores=%u,threads=%u,maxcpus=%u", s->machine, s->cpu_model, s->sockets, s->cores, s->threads, s->maxcpus); qtest_start(args); - for (i = s->sockets * s->cores * s->threads; i < s->maxcpus; i++) { + for (i = 1; i < s->maxcpus; i++) { response = qmp("{ 'execute': 'cpu-add'," " 'arguments': { 'id': %d } }", i); g_assert(response); @@ -56,7 +56,7 @@ static void test_plug_without_cpu_add(gconstpointer data) QDict *response; args = g_strdup_printf("-machine %s -cpu %s " - "-smp sockets=%u,cores=%u,threads=%u,maxcpus=%u", + "-smp 1,sockets=%u,cores=%u,threads=%u,maxcpus=%u", s->machine, s->cpu_model, s->sockets, s->cores, s->threads, s->maxcpus); qtest_start(args); @@ -79,12 +79,12 @@ static void test_plug_with_device_add_x86(gconstpointer data) unsigned int s, c, t; args = g_strdup_printf("-machine %s -cpu %s " - "-smp sockets=%u,cores=%u,threads=%u,maxcpus=%u", + "-smp 1,sockets=%u,cores=%u,threads=%u,maxcpus=%u", td->machine, td->cpu_model, td->sockets, td->cores, td->threads, td->maxcpus); qtest_start(args); - for (s = td->sockets; s < td->maxcpus / td->cores / td->threads; s++) { + for (s = 1; s < td->sockets; s++) { for (c = 0; c < td->cores; c++) { for (t = 0; t < td->threads; t++) { char *id = g_strdup_printf("id-%i-%i-%i", s, c, t); @@ -113,7 +113,7 @@ static void test_plug_with_device_add_coreid(gconstpointer data) td->sockets, td->cores, td->threads, td->maxcpus); qtest_start(args); - for (c = td->cores; c < td->maxcpus / td->sockets / td->threads; c++) { + for (c = 1; c < td->cores; c++) { char *id = g_strdup_printf("id-%i", c); qtest_qmp_device_add(td->device_model, id, "{'core-id':%u}", c); g_free(id); @@ -148,7 +148,7 @@ static void add_pc_test_case(const char *mname) data->sockets = 1; data->cores = 3; data->threads = 2; - data->maxcpus = data->sockets * data->cores * data->threads * 2; + data->maxcpus = data->sockets * data->cores * data->threads; if (g_str_has_suffix(mname, "-1.4") || (strcmp(mname, "pc-1.3") == 0) || (strcmp(mname, "pc-1.2") == 0) || @@ -203,7 +203,7 @@ static void add_pseries_test_case(const char *mname) data->sockets = 2; data->cores = 3; data->threads = 1; - data->maxcpus = data->sockets * data->cores * data->threads * 2; + data->maxcpus = data->sockets * data->cores * data->threads; path = g_strdup_printf("cpu-plug/%s/device-add/%ux%ux%u&maxcpus=%u", mname, data->sockets, data->cores, @@ -229,7 +229,7 @@ static void add_s390x_test_case(const char *mname) data->sockets = 1; data->cores = 3; data->threads = 1; - data->maxcpus = data->sockets * data->cores * data->threads * 2; + data->maxcpus = data->sockets * data->cores * data->threads; data2 = g_memdup(data, sizeof(PlugTestData)); data2->machine = g_strdup(data->machine); diff --git a/tests/docker/test-mingw b/tests/docker/test-mingw index 7cca7e16a6..b078f22879 100755 --- a/tests/docker/test-mingw +++ b/tests/docker/test-mingw @@ -28,8 +28,7 @@ for prefix in x86_64-w64-mingw32- i686-w64-mingw32-; do --enable-vnc \ --enable-bzip2 \ --enable-guest-agent \ - --with-sdlabi=2.0 \ - --with-gtkabi=3.0 + --with-sdlabi=2.0 install_qemu make clean diff --git a/tests/qemu-iotests/169 b/tests/qemu-iotests/169 index f243db9955..69850c4c67 100755 --- a/tests/qemu-iotests/169 +++ b/tests/qemu-iotests/169 @@ -24,6 +24,7 @@ import time import itertools import operator import new +import re from iotests import qemu_img @@ -58,7 +59,6 @@ class TestDirtyBitmapMigration(iotests.QMPTestCase): 'granularity': granularity} if persistent: params['persistent'] = True - params['autoload'] = True result = vm.qmp('block-dirty-bitmap-add', **params) self.assert_qmp(result, 'return', {}); @@ -77,6 +77,58 @@ class TestDirtyBitmapMigration(iotests.QMPTestCase): self.assert_qmp(result, 'error/desc', "Dirty bitmap 'bitmap0' not found"); + def do_test_migration_resume_source(self, persistent, migrate_bitmaps): + granularity = 512 + + # regions = ((start, count), ...) + regions = ((0, 0x10000), + (0xf0000, 0x10000), + (0xa0201, 0x1000)) + + mig_caps = [{'capability': 'events', 'state': True}] + if migrate_bitmaps: + mig_caps.append({'capability': 'dirty-bitmaps', 'state': True}) + + result = self.vm_a.qmp('migrate-set-capabilities', + capabilities=mig_caps) + self.assert_qmp(result, 'return', {}) + + self.add_bitmap(self.vm_a, granularity, persistent) + for r in regions: + self.vm_a.hmp_qemu_io('drive0', 'write %d %d' % r) + sha256 = self.get_bitmap_hash(self.vm_a) + + result = self.vm_a.qmp('migrate', uri=mig_cmd) + while True: + event = self.vm_a.event_wait('MIGRATION') + if event['data']['status'] == 'completed': + break + + # test that bitmap is still here + removed = (not migrate_bitmaps) and persistent + self.check_bitmap(self.vm_a, False if removed else sha256) + + self.vm_a.qmp('cont') + + # test that bitmap is still here after invalidation + self.check_bitmap(self.vm_a, sha256) + + # shutdown and check that invalidation didn't fail + self.vm_a.shutdown() + + # catch 'Could not reopen qcow2 layer: Bitmap already exists' + # possible error + log = self.vm_a.get_log() + log = re.sub(r'^\[I \d+\.\d+\] OPENED\n', '', log) + log = re.sub(r'^(wrote .* bytes at offset .*\n.*KiB.*ops.*sec.*\n){3}', + '', log) + log = re.sub(r'\[I \+\d+\.\d+\] CLOSED\n?$', '', log) + self.assertEqual(log, '') + + # test that bitmap is still persistent + self.vm_a.launch() + self.check_bitmap(self.vm_a, sha256 if persistent else False) + def do_test_migration(self, persistent, migrate_bitmaps, online, shared_storage): granularity = 512 @@ -134,6 +186,14 @@ class TestDirtyBitmapMigration(iotests.QMPTestCase): if should_migrate: self.vm_b.shutdown() + + # catch 'Could not reopen qcow2 layer: Bitmap already exists' + # possible error + log = self.vm_b.get_log() + log = re.sub(r'^\[I \d+\.\d+\] OPENED\n', '', log) + log = re.sub(r'\[I \+\d+\.\d+\] CLOSED\n?$', '', log) + self.assertEqual(log, '') + # recreate vm_b, as we don't want -incoming option (this will lead # to "cat" process left alive after test finish) self.vm_b = iotests.VM(path_suffix='b') @@ -144,7 +204,7 @@ class TestDirtyBitmapMigration(iotests.QMPTestCase): def inject_test_case(klass, name, method, *args, **kwargs): mc = operator.methodcaller(method, *args, **kwargs) - setattr(klass, 'test_' + name, new.instancemethod(mc, None, klass)) + setattr(klass, 'test_' + method + name, new.instancemethod(mc, None, klass)) for cmb in list(itertools.product((True, False), repeat=4)): name = ('_' if cmb[0] else '_not_') + 'persistent_' @@ -155,6 +215,12 @@ for cmb in list(itertools.product((True, False), repeat=4)): inject_test_case(TestDirtyBitmapMigration, name, 'do_test_migration', *list(cmb)) +for cmb in list(itertools.product((True, False), repeat=2)): + name = ('_' if cmb[0] else '_not_') + 'persistent_' + name += ('_' if cmb[1] else '_not_') + 'migbitmap' + + inject_test_case(TestDirtyBitmapMigration, name, + 'do_test_migration_resume_source', *list(cmb)) if __name__ == '__main__': iotests.main(supported_fmts=['qcow2']) diff --git a/tests/qemu-iotests/169.out b/tests/qemu-iotests/169.out index b6f257674e..3a89159833 100644 --- a/tests/qemu-iotests/169.out +++ b/tests/qemu-iotests/169.out @@ -1,5 +1,5 @@ -................ +.................... ---------------------------------------------------------------------- -Ran 16 tests +Ran 20 tests OK diff --git a/tests/vm/basevm.py b/tests/vm/basevm.py index cafbc6b3a5..5caf77d6b8 100755 --- a/tests/vm/basevm.py +++ b/tests/vm/basevm.py @@ -18,7 +18,7 @@ import logging import time import datetime sys.path.append(os.path.join(os.path.dirname(__file__), "..", "..", "scripts")) -from qemu import QEMUMachine +from qemu import QEMUMachine, kvm_available import subprocess import hashlib import optparse @@ -42,6 +42,8 @@ class BaseVM(object): BUILD_SCRIPT = "" # The guest name, to be overridden by subclasses name = "#base" + # The guest architecture, to be overridden by subclasses + arch = "#arch" def __init__(self, debug=False, vcpus=None): self._guest = None self._tmpdir = os.path.realpath(tempfile.mkdtemp(prefix="vm-test-", @@ -70,9 +72,9 @@ class BaseVM(object): "-device", "virtio-net-pci,netdev=vnet", "-vnc", "127.0.0.1:0,to=20", "-serial", "file:%s" % os.path.join(self._tmpdir, "serial.out")] - if vcpus: + if vcpus and vcpus > 1: self._args += ["-smp", str(vcpus)] - if os.access("/dev/kvm", os.R_OK | os.W_OK): + if kvm_available(self.arch): self._args += ["-enable-kvm"] else: logging.info("KVM not available, not using -enable-kvm") @@ -151,7 +153,7 @@ class BaseVM(object): "-device", "virtio-blk,drive=drive0,bootindex=0"] args += self._data_args + extra_args logging.debug("QEMU args: %s", " ".join(args)) - qemu_bin = os.environ.get("QEMU", "qemu-system-x86_64") + qemu_bin = os.environ.get("QEMU", "qemu-system-" + self.arch) guest = QEMUMachine(binary=qemu_bin, args=args) try: guest.launch() @@ -177,11 +179,14 @@ class BaseVM(object): def wait_ssh(self, seconds=300): starttime = datetime.datetime.now() + endtime = starttime + datetime.timedelta(seconds=seconds) guest_up = False - while (datetime.datetime.now() - starttime).total_seconds() < seconds: + while datetime.datetime.now() < endtime: if self.ssh("exit 0") == 0: guest_up = True break + seconds = (endtime - datetime.datetime.now()).total_seconds() + logging.debug("%ds before timeout", seconds) time.sleep(1) if not guest_up: raise Exception("Timeout while waiting for guest ssh") @@ -195,7 +200,14 @@ class BaseVM(object): def qmp(self, *args, **kwargs): return self._guest.qmp(*args, **kwargs) -def parse_args(vm_name): +def parse_args(vmcls): + + def get_default_jobs(): + if kvm_available(vmcls.arch): + return multiprocessing.cpu_count() / 2 + else: + return 1 + parser = optparse.OptionParser( description="VM test utility. Exit codes: " "0 = success, " @@ -204,11 +216,11 @@ def parse_args(vm_name): "3 = test command failed") parser.add_option("--debug", "-D", action="store_true", help="enable debug output") - parser.add_option("--image", "-i", default="%s.img" % vm_name, + parser.add_option("--image", "-i", default="%s.img" % vmcls.name, help="image file name") parser.add_option("--force", "-f", action="store_true", help="force build image even if image exists") - parser.add_option("--jobs", type=int, default=multiprocessing.cpu_count() / 2, + parser.add_option("--jobs", type=int, default=get_default_jobs(), help="number of virtual CPUs") parser.add_option("--verbose", "-V", action="store_true", help="Pass V=1 to builds within the guest") @@ -225,7 +237,7 @@ def parse_args(vm_name): def main(vmcls): try: - args, argv = parse_args(vmcls.name) + args, argv = parse_args(vmcls) if not argv and not args.build_qemu and not args.build_image: print("Nothing to do?") return 1 diff --git a/tests/vm/centos b/tests/vm/centos index afd560c564..daa2dbca03 100755 --- a/tests/vm/centos +++ b/tests/vm/centos @@ -19,6 +19,7 @@ import time class CentosVM(basevm.BaseVM): name = "centos" + arch = "x86_64" BUILD_SCRIPT = """ set -e; cd $(mktemp -d); diff --git a/tests/vm/freebsd b/tests/vm/freebsd index b6983127d0..19a3729172 100755 --- a/tests/vm/freebsd +++ b/tests/vm/freebsd @@ -18,6 +18,7 @@ import basevm class FreeBSDVM(basevm.BaseVM): name = "freebsd" + arch = "x86_64" BUILD_SCRIPT = """ set -e; rm -rf /var/tmp/qemu-test.* diff --git a/tests/vm/netbsd b/tests/vm/netbsd index a4e25820d5..fac6a7ce51 100755 --- a/tests/vm/netbsd +++ b/tests/vm/netbsd @@ -18,6 +18,7 @@ import basevm class NetBSDVM(basevm.BaseVM): name = "netbsd" + arch = "x86_64" BUILD_SCRIPT = """ set -e; rm -rf /var/tmp/qemu-test.* diff --git a/tests/vm/openbsd b/tests/vm/openbsd index 52500ee52b..cfe0572c59 100755 --- a/tests/vm/openbsd +++ b/tests/vm/openbsd @@ -18,6 +18,7 @@ import basevm class OpenBSDVM(basevm.BaseVM): name = "openbsd" + arch = "x86_64" BUILD_SCRIPT = """ set -e; rm -rf /var/tmp/qemu-test.* diff --git a/tests/vm/ubuntu.i386 b/tests/vm/ubuntu.i386 index 3f6ed48b74..1b7e1ab8f0 100755 --- a/tests/vm/ubuntu.i386 +++ b/tests/vm/ubuntu.i386 @@ -19,6 +19,7 @@ import time class UbuntuX86VM(basevm.BaseVM): name = "ubuntu.i386" + arch = "i386" BUILD_SCRIPT = """ set -e; cd $(mktemp -d); diff --git a/ui/sdl2.c b/ui/sdl2.c index 2696b95c79..a10b6e3a08 100644 --- a/ui/sdl2.c +++ b/ui/sdl2.c @@ -786,6 +786,9 @@ static void sdl2_display_init(DisplayState *ds, DisplayOptions *o) SDL_GetError()); exit(1); } +#ifdef SDL_HINT_VIDEO_X11_NET_WM_BYPASS_COMPOSITOR /* only available since SDL 2.0.8 */ + SDL_SetHint(SDL_HINT_VIDEO_X11_NET_WM_BYPASS_COMPOSITOR, "0"); +#endif SDL_SetHint(SDL_HINT_GRAB_KEYBOARD, "1"); memset(&info, 0, sizeof(info)); SDL_VERSION(&info.version); diff --git a/ui/spice-display.c b/ui/spice-display.c index 2f8adb6b9f..52f8cb5ae1 100644 --- a/ui/spice-display.c +++ b/ui/spice-display.c @@ -674,10 +674,28 @@ static int interface_client_monitors_config(QXLInstance *sin, memset(&info, 0, sizeof(info)); - head = qemu_console_get_head(ssd->dcl.con); - if (mc->num_of_monitors > head) { - info.width = mc->monitors[head].width; - info.height = mc->monitors[head].height; + if (mc->num_of_monitors == 1) { + /* + * New spice-server version which filters the list of monitors + * to only include those that belong to our display channel. + * + * single-head configuration (where filtering doesn't matter) + * takes this code path too. + */ + info.width = mc->monitors[0].width; + info.height = mc->monitors[0].height; + } else { + /* + * Old spice-server which gives us all monitors, so we have to + * figure ourself which entry we need. Array index is the + * channel_id, which is the qemu console index, see + * qemu_spice_add_display_interface(). + */ + head = qemu_console_get_index(ssd->dcl.con); + if (mc->num_of_monitors > head) { + info.width = mc->monitors[head].width; + info.height = mc->monitors[head].height; + } } trace_qemu_spice_ui_info(ssd->qxl.id, info.width, info.height); diff --git a/util/aio-posix.c b/util/aio-posix.c index 621b3025d8..51c41ed3c9 100644 --- a/util/aio-posix.c +++ b/util/aio-posix.c @@ -40,7 +40,7 @@ struct AioHandler #ifdef CONFIG_EPOLL_CREATE1 -/* The fd number threashold to switch to epoll */ +/* The fd number threshold to switch to epoll */ #define EPOLL_ENABLE_THRESHOLD 64 static void aio_epoll_disable(AioContext *ctx) diff --git a/util/hbitmap.c b/util/hbitmap.c index bcd304041a..8d402c59d9 100644 --- a/util/hbitmap.c +++ b/util/hbitmap.c @@ -723,6 +723,10 @@ void hbitmap_truncate(HBitmap *hb, uint64_t size) } } +bool hbitmap_can_merge(const HBitmap *a, const HBitmap *b) +{ + return (a->size == b->size) && (a->granularity == b->granularity); +} /** * Given HBitmaps A and B, let A := A (BITOR) B. @@ -731,14 +735,15 @@ void hbitmap_truncate(HBitmap *hb, uint64_t size) * @return true if the merge was successful, * false if it was not attempted. */ -bool hbitmap_merge(HBitmap *a, const HBitmap *b) +bool hbitmap_merge(const HBitmap *a, const HBitmap *b, HBitmap *result) { int i; uint64_t j; - if ((a->size != b->size) || (a->granularity != b->granularity)) { + if (!hbitmap_can_merge(a, b) || !hbitmap_can_merge(a, result)) { return false; } + assert(hbitmap_can_merge(b, result)); if (hbitmap_count(b) == 0) { return true; @@ -750,10 +755,13 @@ bool hbitmap_merge(HBitmap *a, const HBitmap *b) */ for (i = HBITMAP_LEVELS - 1; i >= 0; i--) { for (j = 0; j < a->sizes[i]; j++) { - a->levels[i][j] |= b->levels[i][j]; + result->levels[i][j] = a->levels[i][j] | b->levels[i][j]; } } + /* Recompute the dirty count */ + result->count = hb_count_between(result, 0, result->size - 1); + return true; } diff --git a/vl.c b/vl.c index b2a405f80f..1fcacc5caa 100644 --- a/vl.c +++ b/vl.c @@ -1230,11 +1230,14 @@ static void smp_parse(QemuOpts *opts) /* compute missing values, prefer sockets over cores over threads */ if (cpus == 0 || sockets == 0) { - sockets = sockets > 0 ? sockets : 1; cores = cores > 0 ? cores : 1; threads = threads > 0 ? threads : 1; if (cpus == 0) { + sockets = sockets > 0 ? sockets : 1; cpus = cores * threads * sockets; + } else { + max_cpus = qemu_opt_get_number(opts, "maxcpus", cpus); + sockets = max_cpus / (cores * threads); } } else if (cores == 0) { threads = threads > 0 ? threads : 1; @@ -1266,6 +1269,13 @@ static void smp_parse(QemuOpts *opts) exit(1); } + if (sockets * cores * threads != max_cpus) { + warn_report("Invalid CPU topology deprecated: " + "sockets (%u) * cores (%u) * threads (%u) " + "!= maxcpus (%u)", + sockets, cores, threads, max_cpus); + } + smp_cpus = cpus; smp_cores = cores; smp_threads = threads; |