diff options
35 files changed, 433 insertions, 446 deletions
diff --git a/include/exec/gen-icount.h b/include/exec/gen-icount.h index 6e5b01239b..05d89d358f 100644 --- a/include/exec/gen-icount.h +++ b/include/exec/gen-icount.h @@ -6,8 +6,8 @@ /* Helpers for instruction counting code generation. */ static TCGArg *icount_arg; -static int icount_label; -static int exitreq_label; +static TCGLabel *icount_label; +static TCGLabel *exitreq_label; static inline void gen_tb_start(TranslationBlock *tb) { diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 9c77d46bda..efeeb050cc 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -388,7 +388,7 @@ static ExitStatus gen_store_conditional(DisasContext *ctx, int ra, int rb, /* ??? In system mode we are never multi-threaded, so CAS can be implemented via a non-atomic load-compare-store sequence. */ { - int lab_fail, lab_done; + TCGLabel *lab_fail, *lab_done; TCGv val; lab_fail = gen_new_label(); @@ -465,7 +465,7 @@ static ExitStatus gen_bcond_internal(DisasContext *ctx, TCGCond cond, TCGv cmp, int32_t disp) { uint64_t dest = ctx->pc + (disp << 2); - int lab_true = gen_new_label(); + TCGLabel *lab_true = gen_new_label(); if (use_goto_tb(ctx, dest)) { tcg_gen_brcondi_i64(cond, cmp, 0, lab_true); diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 34b489f2ec..0b192a1f5b 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -1096,7 +1096,7 @@ static void disas_comp_b_imm(DisasContext *s, uint32_t insn) { unsigned int sf, op, rt; uint64_t addr; - int label_match; + TCGLabel *label_match; TCGv_i64 tcg_cmp; sf = extract32(insn, 31, 1); @@ -1125,7 +1125,7 @@ static void disas_test_b_imm(DisasContext *s, uint32_t insn) { unsigned int bit_pos, op, rt; uint64_t addr; - int label_match; + TCGLabel *label_match; TCGv_i64 tcg_cmp; bit_pos = (extract32(insn, 31, 1) << 5) | extract32(insn, 19, 5); @@ -1164,7 +1164,7 @@ static void disas_cond_b_imm(DisasContext *s, uint32_t insn) if (cond < 0x0e) { /* genuinely conditional branches */ - int label_match = gen_new_label(); + TCGLabel *label_match = gen_new_label(); arm_gen_test_cc(cond, label_match); gen_goto_tb(s, 0, s->pc); gen_set_label(label_match); @@ -1711,8 +1711,8 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2, * } * env->exclusive_addr = -1; */ - int fail_label = gen_new_label(); - int done_label = gen_new_label(); + TCGLabel *fail_label = gen_new_label(); + TCGLabel *done_label = gen_new_label(); TCGv_i64 addr = tcg_temp_local_new_i64(); TCGv_i64 tmp; @@ -3537,7 +3537,7 @@ static void disas_adc_sbc(DisasContext *s, uint32_t insn) static void disas_cc(DisasContext *s, uint32_t insn) { unsigned int sf, op, y, cond, rn, nzcv, is_imm; - int label_continue = -1; + TCGLabel *label_continue = NULL; TCGv_i64 tcg_tmp, tcg_y, tcg_rn; if (!extract32(insn, 29, 1)) { @@ -3557,7 +3557,7 @@ static void disas_cc(DisasContext *s, uint32_t insn) nzcv = extract32(insn, 0, 4); if (cond < 0x0e) { /* not always */ - int label_match = gen_new_label(); + TCGLabel *label_match = gen_new_label(); label_continue = gen_new_label(); arm_gen_test_cc(cond, label_match); /* nomatch: */ @@ -3630,8 +3630,8 @@ static void disas_cond_select(DisasContext *s, uint32_t insn) /* OPTME: we could use movcond here, at the cost of duplicating * a lot of the arm_gen_test_cc() logic. */ - int label_match = gen_new_label(); - int label_continue = gen_new_label(); + TCGLabel *label_match = gen_new_label(); + TCGLabel *label_continue = gen_new_label(); arm_gen_test_cc(cond, label_match); /* nomatch: */ @@ -4104,7 +4104,7 @@ static void disas_fp_ccomp(DisasContext *s, uint32_t insn) { unsigned int mos, type, rm, cond, rn, op, nzcv; TCGv_i64 tcg_flags; - int label_continue = -1; + TCGLabel *label_continue = NULL; mos = extract32(insn, 29, 3); type = extract32(insn, 22, 2); /* 0 = single, 1 = double */ @@ -4124,7 +4124,7 @@ static void disas_fp_ccomp(DisasContext *s, uint32_t insn) } if (cond < 0x0e) { /* not always */ - int label_match = gen_new_label(); + TCGLabel *label_match = gen_new_label(); label_continue = gen_new_label(); arm_gen_test_cc(cond, label_match); /* nomatch: */ @@ -4165,7 +4165,7 @@ static void gen_mov_fp2fp(DisasContext *s, int type, int dst, int src) static void disas_fp_csel(DisasContext *s, uint32_t insn) { unsigned int mos, type, rm, cond, rn, rd; - int label_continue = -1; + TCGLabel *label_continue = NULL; mos = extract32(insn, 29, 3); type = extract32(insn, 22, 2); /* 0 = single, 1 = double */ @@ -4184,7 +4184,7 @@ static void disas_fp_csel(DisasContext *s, uint32_t insn) } if (cond < 0x0e) { /* not always */ - int label_match = gen_new_label(); + TCGLabel *label_match = gen_new_label(); label_continue = gen_new_label(); arm_gen_test_cc(cond, label_match); /* nomatch: */ diff --git a/target-arm/translate.c b/target-arm/translate.c index 36868ed05f..381d89624f 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -736,10 +736,10 @@ static void gen_thumb2_parallel_addsub(int op1, int op2, TCGv_i32 a, TCGv_i32 b) * generate a conditional branch based on ARM condition code cc. * This is common between ARM and Aarch64 targets. */ -void arm_gen_test_cc(int cc, int label) +void arm_gen_test_cc(int cc, TCGLabel *label) { TCGv_i32 tmp; - int inv; + TCGLabel *inv; switch (cc) { case 0: /* eq: Z */ @@ -7440,8 +7440,8 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2, { TCGv_i32 tmp; TCGv_i64 val64, extaddr; - int done_label; - int fail_label; + TCGLabel *done_label; + TCGLabel *fail_label; /* if (env->exclusive_addr == addr && env->exclusive_val == [addr]) { [addr] = {Rt}; diff --git a/target-arm/translate.h b/target-arm/translate.h index a1eb5b5347..9829576ab0 100644 --- a/target-arm/translate.h +++ b/target-arm/translate.h @@ -9,7 +9,7 @@ typedef struct DisasContext { /* Nonzero if this instruction has been conditionally skipped. */ int condjmp; /* The label that will be jumped to when the instruction is skipped. */ - int condlabel; + TCGLabel *condlabel; /* Thumb-2 conditional execution bits. */ int condexec_mask; int condexec_cond; @@ -119,6 +119,6 @@ static inline void aarch64_cpu_dump_state(CPUState *cs, FILE *f, } #endif -void arm_gen_test_cc(int cc, int label); +void arm_gen_test_cc(int cc, TCGLabel *label); #endif /* TARGET_ARM_TRANSLATE_H */ diff --git a/target-cris/translate.c b/target-cris/translate.c index 47abcefaae..687c88be28 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -311,9 +311,7 @@ static void t_gen_asr(TCGv d, TCGv a, TCGv b) static void t_gen_cris_dstep(TCGv d, TCGv a, TCGv b) { - int l1; - - l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); /* * d <<= 1 @@ -509,9 +507,7 @@ static inline void t_gen_swapr(TCGv d, TCGv s) static void t_gen_cc_jmp(TCGv pc_true, TCGv pc_false) { - int l1; - - l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); /* Conditional jmp. */ tcg_gen_mov_tl(env_pc, pc_false); @@ -774,8 +770,7 @@ static void cris_alu_op_exec(DisasContext *dc, int op, break; case CC_OP_BOUND: { - int l1; - l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); tcg_gen_mov_tl(dst, a); tcg_gen_brcond_tl(TCG_COND_LEU, a, b, l1); tcg_gen_mov_tl(dst, b); @@ -1488,10 +1483,8 @@ static int dec_scc_r(CPUCRISState *env, DisasContext *dc) cc_name(cond), dc->op1); if (cond != CC_A) { - int l1; - + TCGLabel *l1 = gen_new_label(); gen_tst_cc(dc, cpu_R[dc->op1], cond); - l1 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_R[dc->op1], 0, l1); tcg_gen_movi_tl(cpu_R[dc->op1], 1); gen_set_label(l1); @@ -3040,9 +3033,7 @@ static unsigned int crisv32_decoder(CPUCRISState *env, DisasContext *dc) #if !defined(CONFIG_USER_ONLY) /* Single-stepping ? */ if (dc->tb_flags & S_FLAG) { - int l1; - - l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_NE, cpu_PR[PR_SPC], dc->pc, l1); /* We treat SPC as a break with an odd trap vector. */ cris_evaluate_flags(dc); @@ -3256,9 +3247,7 @@ gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb, } if (dc->jmp == JMP_DIRECT_CC) { - int l1; - - l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); cris_evaluate_flags(dc); /* Conditional jmp. */ diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c index efb3639a06..b742c4cd01 100644 --- a/target-cris/translate_v10.c +++ b/target-cris/translate_v10.c @@ -65,7 +65,7 @@ static inline void cris_illegal_insn(DisasContext *dc) static void gen_store_v10_conditional(DisasContext *dc, TCGv addr, TCGv val, unsigned int size, int mem_index) { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); TCGv taddr = tcg_temp_local_new(); TCGv tval = tcg_temp_local_new(); TCGv t1 = tcg_temp_local_new(); @@ -537,10 +537,8 @@ static void dec10_reg_scc(DisasContext *dc) if (cond != CC_A) { - int l1; - + TCGLabel *l1 = gen_new_label(); gen_tst_cc (dc, cpu_R[dc->src], cond); - l1 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_R[dc->src], 0, l1); tcg_gen_movi_tl(cpu_R[dc->src], 1); gen_set_label(l1); diff --git a/target-i386/translate.c b/target-i386/translate.c index 094cec059c..305ce5077c 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -613,14 +613,14 @@ static void gen_exts(TCGMemOp ot, TCGv reg) gen_ext_tl(reg, reg, ot, true); } -static inline void gen_op_jnz_ecx(TCGMemOp size, int label1) +static inline void gen_op_jnz_ecx(TCGMemOp size, TCGLabel *label1) { tcg_gen_mov_tl(cpu_tmp0, cpu_regs[R_ECX]); gen_extu(size, cpu_tmp0); tcg_gen_brcondi_tl(TCG_COND_NE, cpu_tmp0, 0, label1); } -static inline void gen_op_jz_ecx(TCGMemOp size, int label1) +static inline void gen_op_jz_ecx(TCGMemOp size, TCGLabel *label1) { tcg_gen_mov_tl(cpu_tmp0, cpu_regs[R_ECX]); gen_extu(size, cpu_tmp0); @@ -1078,7 +1078,7 @@ static inline void gen_compute_eflags_c(DisasContext *s, TCGv reg) /* generate a conditional jump to label 'l1' according to jump opcode value 'b'. In the fast case, T0 is guaranted not to be used. */ -static inline void gen_jcc1_noeob(DisasContext *s, int b, int l1) +static inline void gen_jcc1_noeob(DisasContext *s, int b, TCGLabel *l1) { CCPrepare cc = gen_prepare_cc(s, b, cpu_T[0]); @@ -1096,7 +1096,7 @@ static inline void gen_jcc1_noeob(DisasContext *s, int b, int l1) /* Generate a conditional jump to label 'l1' according to jump opcode value 'b'. In the fast case, T0 is guaranted not to be used. A translation block must end soon. */ -static inline void gen_jcc1(DisasContext *s, int b, int l1) +static inline void gen_jcc1(DisasContext *s, int b, TCGLabel *l1) { CCPrepare cc = gen_prepare_cc(s, b, cpu_T[0]); @@ -1115,12 +1115,10 @@ static inline void gen_jcc1(DisasContext *s, int b, int l1) /* XXX: does not work with gdbstub "ice" single step - not a serious problem */ -static int gen_jz_ecx_string(DisasContext *s, target_ulong next_eip) +static TCGLabel *gen_jz_ecx_string(DisasContext *s, target_ulong next_eip) { - int l1, l2; - - l1 = gen_new_label(); - l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); gen_op_jnz_ecx(s->aflag, l1); gen_set_label(l2); gen_jmp_tb(s, next_eip, 1); @@ -1213,7 +1211,7 @@ static inline void gen_outs(DisasContext *s, TCGMemOp ot) static inline void gen_repz_ ## op(DisasContext *s, TCGMemOp ot, \ target_ulong cur_eip, target_ulong next_eip) \ { \ - int l2;\ + TCGLabel *l2; \ gen_update_cc_op(s); \ l2 = gen_jz_ecx_string(s, next_eip); \ gen_ ## op(s, ot); \ @@ -1231,7 +1229,7 @@ static inline void gen_repz_ ## op(DisasContext *s, TCGMemOp ot, \ target_ulong next_eip, \ int nz) \ { \ - int l2;\ + TCGLabel *l2; \ gen_update_cc_op(s); \ l2 = gen_jz_ecx_string(s, next_eip); \ gen_ ## op(s, ot); \ @@ -2227,7 +2225,7 @@ static inline void gen_goto_tb(DisasContext *s, int tb_num, target_ulong eip) static inline void gen_jcc(DisasContext *s, int b, target_ulong val, target_ulong next_eip) { - int l1, l2; + TCGLabel *l1, *l2; if (s->jmp_opt) { l1 = gen_new_label(); @@ -5152,7 +5150,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, case 0x1b0: case 0x1b1: /* cmpxchg Ev, Gv */ { - int label1, label2; + TCGLabel *label1, *label2; TCGv t0, t1, t2, a0; ot = mo_b_d(b, dflag); @@ -6196,7 +6194,8 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, case 0x10 ... 0x13: /* fcmovxx */ case 0x18 ... 0x1b: { - int op1, l1; + int op1; + TCGLabel *l1; static const uint8_t fcmov_cc[8] = { (JCC_B << 1), (JCC_Z << 1), @@ -7017,7 +7016,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, case 0xe2: /* loop */ case 0xe3: /* jecxz */ { - int l1, l2, l3; + TCGLabel *l1, *l2, *l3; tval = (int8_t)insn_get(env, s, MO_8); next_eip = s->pc - s->cs_base; @@ -7515,7 +7514,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, } else #endif { - int label1; + TCGLabel *label1; TCGv t0, t1, t2, a0; if (!s->pe || s->vm86) @@ -7564,7 +7563,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, case 0x102: /* lar */ case 0x103: /* lsl */ { - int label1; + TCGLabel *label1; TCGv t0; if (!s->pe || s->vm86) goto illegal_op; diff --git a/target-lm32/translate.c b/target-lm32/translate.c index 9d087b938d..81a204f5cf 100644 --- a/target-lm32/translate.c +++ b/target-lm32/translate.c @@ -219,7 +219,7 @@ static void dec_b(DisasContext *dc) /* restore IE.IE in case of an eret */ if (dc->r0 == R_EA) { TCGv t0 = tcg_temp_new(); - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); tcg_gen_andi_tl(t0, cpu_ie, IE_EIE); tcg_gen_ori_tl(cpu_ie, cpu_ie, IE_IE); tcg_gen_brcondi_tl(TCG_COND_EQ, t0, IE_EIE, l1); @@ -228,7 +228,7 @@ static void dec_b(DisasContext *dc) tcg_temp_free(t0); } else if (dc->r0 == R_BA) { TCGv t0 = tcg_temp_new(); - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); tcg_gen_andi_tl(t0, cpu_ie, IE_BIE); tcg_gen_ori_tl(cpu_ie, cpu_ie, IE_IE); tcg_gen_brcondi_tl(TCG_COND_EQ, t0, IE_BIE, l1); @@ -252,9 +252,7 @@ static void dec_bi(DisasContext *dc) static inline void gen_cond_branch(DisasContext *dc, int cond) { - int l1; - - l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); tcg_gen_brcond_tl(cond, cpu_R[dc->r0], cpu_R[dc->r1], l1); gen_goto_tb(dc, 0, dc->pc + 4); gen_set_label(l1); @@ -428,7 +426,7 @@ static void dec_cmpne(DisasContext *dc) static void dec_divu(DisasContext *dc) { - int l1; + TCGLabel *l1; LOG_DIS("divu r%d, r%d, r%d\n", dc->r2, dc->r0, dc->r1); @@ -508,7 +506,7 @@ static void dec_lw(DisasContext *dc) static void dec_modu(DisasContext *dc) { - int l1; + TCGLabel *l1; LOG_DIS("modu r%d, r%d, %d\n", dc->r2, dc->r0, dc->r1); @@ -769,8 +767,8 @@ static void dec_sr(DisasContext *dc) } tcg_gen_sari_tl(cpu_R[dc->r1], cpu_R[dc->r0], dc->imm5); } else { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); TCGv t0 = tcg_temp_local_new(); tcg_gen_andi_tl(t0, cpu_R[dc->r1], 0x1f); @@ -805,8 +803,8 @@ static void dec_sru(DisasContext *dc) } tcg_gen_shri_tl(cpu_R[dc->r1], cpu_R[dc->r0], dc->imm5); } else { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); TCGv t0 = tcg_temp_local_new(); tcg_gen_andi_tl(t0, cpu_R[dc->r1], 0x1f); diff --git a/target-m68k/translate.c b/target-m68k/translate.c index a39b49515d..4959b970ea 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -679,7 +679,7 @@ static TCGv gen_ea(CPUM68KState *env, DisasContext *s, uint16_t insn, } /* This generates a conditional branch, clobbering all temporaries. */ -static void gen_jmpcc(DisasContext *s, int cond, int l1) +static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1) { TCGv tmp; @@ -784,7 +784,7 @@ static void gen_jmpcc(DisasContext *s, int cond, int l1) DISAS_INSN(scc) { - int l1; + TCGLabel *l1; int cond; TCGv reg; @@ -1658,7 +1658,7 @@ DISAS_INSN(branch) int32_t offset; uint32_t base; int op; - int l1; + TCGLabel *l1; base = s->pc; op = (insn >> 8) & 0xf; @@ -2395,7 +2395,7 @@ DISAS_INSN(fbcc) uint32_t offset; uint32_t addr; TCGv flag; - int l1; + TCGLabel *l1; addr = s->pc; offset = cpu_ldsw_code(env, s->pc); diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 5ff3833010..4068946f40 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -313,7 +313,7 @@ static void dec_sub(DisasContext *dc) static void dec_pattern(DisasContext *dc) { unsigned int mode; - int l1; + TCGLabel *l1; if ((dc->tb_flags & MSR_EE_FLAG) && (dc->cpu->env.pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK) @@ -1038,7 +1038,7 @@ static void dec_load(DisasContext *dc) static void dec_store(DisasContext *dc) { TCGv t, *addr, swx_addr; - int swx_skip = 0; + TCGLabel *swx_skip = NULL; unsigned int size, rev = 0, ex = 0; TCGMemOp mop; @@ -1192,9 +1192,7 @@ static inline void eval_cc(DisasContext *dc, unsigned int cc, static void eval_cond_jmp(DisasContext *dc, TCGv pc_true, TCGv pc_false) { - int l1; - - l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); /* Conditional jmp. */ tcg_gen_mov_tl(cpu_SR[SR_PC], pc_false); tcg_gen_brcondi_tl(TCG_COND_EQ, env_btaken, 0, l1); @@ -1773,10 +1771,8 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb, gen_goto_tb(dc, 0, dc->jmp_pc); dc->is_jmp = DISAS_TB_JUMP; } else if (dc->jmp == JMP_DIRECT_CC) { - int l1; - + TCGLabel *l1 = gen_new_label(); t_sync_flags(dc); - l1 = gen_new_label(); /* Conditional jmp. */ tcg_gen_brcondi_tl(TCG_COND_NE, env_btaken, 0, l1); gen_goto_tb(dc, 1, dc->pc); diff --git a/target-mips/translate.c b/target-mips/translate.c index ca51149872..9059bfd9f1 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -1998,8 +1998,8 @@ OP_LD_ATOMIC(lld,ld64); static inline void op_st_##insn(TCGv arg1, TCGv arg2, int rt, DisasContext *ctx) \ { \ TCGv t0 = tcg_temp_new(); \ - int l1 = gen_new_label(); \ - int l2 = gen_new_label(); \ + TCGLabel *l1 = gen_new_label(); \ + TCGLabel *l2 = gen_new_label(); \ \ tcg_gen_andi_tl(t0, arg2, almask); \ tcg_gen_brcondi_tl(TCG_COND_EQ, t0, 0, l1); \ @@ -2428,7 +2428,7 @@ static void gen_arith_imm(DisasContext *ctx, uint32_t opc, TCGv t0 = tcg_temp_local_new(); TCGv t1 = tcg_temp_new(); TCGv t2 = tcg_temp_new(); - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); gen_load_gpr(t1, rs); tcg_gen_addi_tl(t0, t1, uimm); @@ -2464,7 +2464,7 @@ static void gen_arith_imm(DisasContext *ctx, uint32_t opc, TCGv t0 = tcg_temp_local_new(); TCGv t1 = tcg_temp_new(); TCGv t2 = tcg_temp_new(); - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); gen_load_gpr(t1, rs); tcg_gen_addi_tl(t0, t1, uimm); @@ -2694,7 +2694,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc, TCGv t0 = tcg_temp_local_new(); TCGv t1 = tcg_temp_new(); TCGv t2 = tcg_temp_new(); - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); gen_load_gpr(t1, rs); gen_load_gpr(t2, rt); @@ -2732,7 +2732,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc, TCGv t0 = tcg_temp_local_new(); TCGv t1 = tcg_temp_new(); TCGv t2 = tcg_temp_new(); - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); gen_load_gpr(t1, rs); gen_load_gpr(t2, rt); @@ -2772,7 +2772,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc, TCGv t0 = tcg_temp_local_new(); TCGv t1 = tcg_temp_new(); TCGv t2 = tcg_temp_new(); - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); gen_load_gpr(t1, rs); gen_load_gpr(t2, rt); @@ -2808,7 +2808,7 @@ static void gen_arith(DisasContext *ctx, uint32_t opc, TCGv t0 = tcg_temp_local_new(); TCGv t1 = tcg_temp_new(); TCGv t2 = tcg_temp_new(); - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); gen_load_gpr(t1, rs); gen_load_gpr(t2, rt); @@ -3846,9 +3846,9 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc, case OPC_DIV_G_2E: case OPC_DIV_G_2F: { - int l1 = gen_new_label(); - int l2 = gen_new_label(); - int l3 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); + TCGLabel *l3 = gen_new_label(); tcg_gen_ext32s_tl(t0, t0); tcg_gen_ext32s_tl(t1, t1); tcg_gen_brcondi_tl(TCG_COND_NE, t1, 0, l1); @@ -3869,8 +3869,8 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc, case OPC_DIVU_G_2E: case OPC_DIVU_G_2F: { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); tcg_gen_ext32u_tl(t0, t0); tcg_gen_ext32u_tl(t1, t1); tcg_gen_brcondi_tl(TCG_COND_NE, t1, 0, l1); @@ -3886,9 +3886,9 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc, case OPC_MOD_G_2E: case OPC_MOD_G_2F: { - int l1 = gen_new_label(); - int l2 = gen_new_label(); - int l3 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); + TCGLabel *l3 = gen_new_label(); tcg_gen_ext32u_tl(t0, t0); tcg_gen_ext32u_tl(t1, t1); tcg_gen_brcondi_tl(TCG_COND_EQ, t1, 0, l1); @@ -3907,8 +3907,8 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc, case OPC_MODU_G_2E: case OPC_MODU_G_2F: { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); tcg_gen_ext32u_tl(t0, t0); tcg_gen_ext32u_tl(t1, t1); tcg_gen_brcondi_tl(TCG_COND_NE, t1, 0, l1); @@ -3935,9 +3935,9 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc, case OPC_DDIV_G_2E: case OPC_DDIV_G_2F: { - int l1 = gen_new_label(); - int l2 = gen_new_label(); - int l3 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); + TCGLabel *l3 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_NE, t1, 0, l1); tcg_gen_movi_tl(cpu_gpr[rd], 0); tcg_gen_br(l3); @@ -3955,8 +3955,8 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc, case OPC_DDIVU_G_2E: case OPC_DDIVU_G_2F: { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_NE, t1, 0, l1); tcg_gen_movi_tl(cpu_gpr[rd], 0); tcg_gen_br(l2); @@ -3969,9 +3969,9 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc, case OPC_DMOD_G_2E: case OPC_DMOD_G_2F: { - int l1 = gen_new_label(); - int l2 = gen_new_label(); - int l3 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); + TCGLabel *l3 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_EQ, t1, 0, l1); tcg_gen_brcondi_tl(TCG_COND_NE, t0, -1LL << 63, l2); tcg_gen_brcondi_tl(TCG_COND_NE, t1, -1LL, l2); @@ -3987,8 +3987,8 @@ static void gen_loongson_integer(DisasContext *ctx, uint32_t opc, case OPC_DMODU_G_2E: case OPC_DMODU_G_2F: { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_NE, t1, 0, l1); tcg_gen_movi_tl(cpu_gpr[rd], 0); tcg_gen_br(l2); @@ -4204,7 +4204,7 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt) case OPC_DADD_CP2: { TCGv_i64 t2 = tcg_temp_new_i64(); - int lab = gen_new_label(); + TCGLabel *lab = gen_new_label(); tcg_gen_mov_i64(t2, t0); tcg_gen_add_i64(t0, t1, t2); @@ -4227,7 +4227,7 @@ static void gen_loongson_multimedia(DisasContext *ctx, int rd, int rs, int rt) case OPC_DSUB_CP2: { TCGv_i64 t2 = tcg_temp_new_i64(); - int lab = gen_new_label(); + TCGLabel *lab = gen_new_label(); tcg_gen_mov_i64(t2, t0); tcg_gen_sub_i64(t0, t1, t2); @@ -4338,7 +4338,7 @@ static void gen_trap (DisasContext *ctx, uint32_t opc, break; } } else { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); switch (opc) { case OPC_TEQ: @@ -8430,7 +8430,7 @@ static void gen_cp1 (DisasContext *ctx, uint32_t opc, int rt, int fs) static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf) { - int l1; + TCGLabel *l1; TCGCond cond; TCGv_i32 t0; @@ -8461,7 +8461,7 @@ static inline void gen_movcf_s (int fs, int fd, int cc, int tf) { int cond; TCGv_i32 t0 = tcg_temp_new_i32(); - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); if (tf) cond = TCG_COND_EQ; @@ -8481,7 +8481,7 @@ static inline void gen_movcf_d (DisasContext *ctx, int fs, int fd, int cc, int t int cond; TCGv_i32 t0 = tcg_temp_new_i32(); TCGv_i64 fp0; - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); if (tf) cond = TCG_COND_EQ; @@ -8503,8 +8503,8 @@ static inline void gen_movcf_ps(DisasContext *ctx, int fs, int fd, { int cond; TCGv_i32 t0 = tcg_temp_new_i32(); - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); if (tf) cond = TCG_COND_EQ; @@ -8869,7 +8869,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, case OPC_MOVZ_S: check_insn_opc_removed(ctx, ISA_MIPS32R6); { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); TCGv_i32 fp0; if (ft != 0) { @@ -8886,7 +8886,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, case OPC_MOVN_S: check_insn_opc_removed(ctx, ISA_MIPS32R6); { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); TCGv_i32 fp0; if (ft != 0) { @@ -9414,7 +9414,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, case OPC_MOVZ_D: check_insn_opc_removed(ctx, ISA_MIPS32R6); { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); TCGv_i64 fp0; if (ft != 0) { @@ -9431,7 +9431,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, case OPC_MOVN_D: check_insn_opc_removed(ctx, ISA_MIPS32R6); { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); TCGv_i64 fp0; if (ft != 0) { @@ -9852,7 +9852,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, case OPC_MOVZ_PS: check_cp1_64bitmode(ctx); { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); TCGv_i64 fp0; if (ft != 0) @@ -9868,7 +9868,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1, case OPC_MOVN_PS: check_cp1_64bitmode(ctx); { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); TCGv_i64 fp0; if (ft != 0) { @@ -10212,8 +10212,8 @@ static void gen_flt3_arith (DisasContext *ctx, uint32_t opc, TCGv t0 = tcg_temp_local_new(); TCGv_i32 fp = tcg_temp_new_i32(); TCGv_i32 fph = tcg_temp_new_i32(); - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); gen_load_gpr(t0, fr); tcg_gen_andi_tl(t0, t0, 0x7); @@ -10562,7 +10562,7 @@ static void gen_branch(DisasContext *ctx, int insn_bytes) /* Conditional branch */ MIPS_DEBUG("conditional branch"); { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_NE, bcond, 0, l1); gen_goto_tb(ctx, 1, ctx->pc + insn_bytes); @@ -15998,7 +15998,7 @@ static void gen_compute_compact_branch(DisasContext *ctx, uint32_t opc, gen_branch(ctx, 4); } else { /* Conditional compact branch */ - int fs = gen_new_label(); + TCGLabel *fs = gen_new_label(); save_cpu_state(ctx, 0); switch (opc) { @@ -18443,7 +18443,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx) /* Handle blikely not taken case */ if ((ctx->hflags & MIPS_HFLAG_BMASK_BASE) == MIPS_HFLAG_BL) { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); MIPS_DEBUG("blikely condition (" TARGET_FMT_lx ")", ctx->pc + 4); tcg_gen_brcondi_tl(TCG_COND_NE, bcond, 0, l1); diff --git a/target-moxie/translate.c b/target-moxie/translate.c index c416eca44b..e3e9139061 100644 --- a/target-moxie/translate.c +++ b/target-moxie/translate.c @@ -169,7 +169,7 @@ static int decode_opc(MoxieCPU *cpu, DisasContext *ctx) #define BRANCH(cond) \ do { \ - int l1 = gen_new_label(); \ + TCGLabel *l1 = gen_new_label(); \ tcg_gen_brcond_i32(cond, cc_a, cc_b, l1); \ gen_goto_tb(env, ctx, 1, ctx->pc+2); \ gen_set_label(l1); \ diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index 6ef447b77b..dc76789785 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -118,9 +118,7 @@ void openrisc_translate_init(void) /* Writeback SR_F translation space to execution space. */ static inline void wb_SR_F(void) { - int label; - - label = gen_new_label(); + TCGLabel *label = gen_new_label(); tcg_gen_andi_tl(cpu_sr, cpu_sr, ~SR_F); tcg_gen_brcondi_tl(TCG_COND_EQ, env_btaken, 0, label); tcg_gen_ori_tl(cpu_sr, cpu_sr, SR_F); @@ -226,7 +224,7 @@ static void gen_jump(DisasContext *dc, uint32_t imm, uint32_t reg, uint32_t op0) case 0x03: /* l.bnf */ case 0x04: /* l.bf */ { - int lab = gen_new_label(); + TCGLabel *lab = gen_new_label(); TCGv sr_f = tcg_temp_new(); tcg_gen_movi_tl(jmp_pc, dc->pc+8); tcg_gen_andi_tl(sr_f, cpu_sr, SR_F); @@ -272,7 +270,7 @@ static void dec_calc(DisasContext *dc, uint32_t insn) case 0x00: /* l.add */ LOG_DIS("l.add r%d, r%d, r%d\n", rd, ra, rb); { - int lab = gen_new_label(); + TCGLabel *lab = gen_new_label(); TCGv_i64 ta = tcg_temp_new_i64(); TCGv_i64 tb = tcg_temp_new_i64(); TCGv_i64 td = tcg_temp_local_new_i64(); @@ -311,7 +309,7 @@ static void dec_calc(DisasContext *dc, uint32_t insn) case 0x00: LOG_DIS("l.addc r%d, r%d, r%d\n", rd, ra, rb); { - int lab = gen_new_label(); + TCGLabel *lab = gen_new_label(); TCGv_i64 ta = tcg_temp_new_i64(); TCGv_i64 tb = tcg_temp_new_i64(); TCGv_i64 tcy = tcg_temp_local_new_i64(); @@ -358,7 +356,7 @@ static void dec_calc(DisasContext *dc, uint32_t insn) case 0x00: LOG_DIS("l.sub r%d, r%d, r%d\n", rd, ra, rb); { - int lab = gen_new_label(); + TCGLabel *lab = gen_new_label(); TCGv_i64 ta = tcg_temp_new_i64(); TCGv_i64 tb = tcg_temp_new_i64(); TCGv_i64 td = tcg_temp_local_new_i64(); @@ -450,10 +448,10 @@ static void dec_calc(DisasContext *dc, uint32_t insn) case 0x03: /* l.div */ LOG_DIS("l.div r%d, r%d, r%d\n", rd, ra, rb); { - int lab0 = gen_new_label(); - int lab1 = gen_new_label(); - int lab2 = gen_new_label(); - int lab3 = gen_new_label(); + TCGLabel *lab0 = gen_new_label(); + TCGLabel *lab1 = gen_new_label(); + TCGLabel *lab2 = gen_new_label(); + TCGLabel *lab3 = gen_new_label(); TCGv_i32 sr_ove = tcg_temp_local_new_i32(); if (rb == 0) { tcg_gen_ori_tl(cpu_sr, cpu_sr, (SR_OV | SR_CY)); @@ -492,9 +490,9 @@ static void dec_calc(DisasContext *dc, uint32_t insn) case 0x03: /* l.divu */ LOG_DIS("l.divu r%d, r%d, r%d\n", rd, ra, rb); { - int lab0 = gen_new_label(); - int lab1 = gen_new_label(); - int lab2 = gen_new_label(); + TCGLabel *lab0 = gen_new_label(); + TCGLabel *lab1 = gen_new_label(); + TCGLabel *lab2 = gen_new_label(); TCGv_i32 sr_ove = tcg_temp_local_new_i32(); if (rb == 0) { tcg_gen_ori_tl(cpu_sr, cpu_sr, (SR_OV | SR_CY)); @@ -533,7 +531,7 @@ static void dec_calc(DisasContext *dc, uint32_t insn) TCGv_i64 trb = tcg_temp_local_new_i64(); TCGv_i64 high = tcg_temp_new_i64(); TCGv_i32 sr_ove = tcg_temp_local_new_i32(); - int lab = gen_new_label(); + TCGLabel *lab = gen_new_label(); /* Calculate each result. */ tcg_gen_extu_i32_i64(tra, cpu_R[ra]); tcg_gen_extu_i32_i64(trb, cpu_R[rb]); @@ -568,7 +566,7 @@ static void dec_calc(DisasContext *dc, uint32_t insn) case 0x00: /* l.cmov */ LOG_DIS("l.cmov r%d, r%d, r%d\n", rd, ra, rb); { - int lab = gen_new_label(); + TCGLabel *lab = gen_new_label(); TCGv res = tcg_temp_local_new(); TCGv sr_f = tcg_temp_new(); tcg_gen_andi_tl(sr_f, cpu_sr, SR_F); @@ -893,7 +891,7 @@ static void dec_misc(DisasContext *dc, uint32_t insn) if (I16 == 0) { tcg_gen_mov_tl(cpu_R[rd], cpu_R[ra]); } else { - int lab = gen_new_label(); + TCGLabel *lab = gen_new_label(); TCGv_i64 ta = tcg_temp_new_i64(); TCGv_i64 td = tcg_temp_local_new_i64(); TCGv_i32 res = tcg_temp_local_new_i32(); @@ -923,7 +921,7 @@ static void dec_misc(DisasContext *dc, uint32_t insn) case 0x28: /* l.addic */ LOG_DIS("l.addic r%d, r%d, %d\n", rd, ra, I16); { - int lab = gen_new_label(); + TCGLabel *lab = gen_new_label(); TCGv_i64 ta = tcg_temp_new_i64(); TCGv_i64 td = tcg_temp_local_new_i64(); TCGv_i64 tcy = tcg_temp_local_new_i64(); diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 2a78e99d83..8f255ea5c2 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -753,7 +753,7 @@ static void gen_cmpli(DisasContext *ctx) /* isel (PowerPC 2.03 specification) */ static void gen_isel(DisasContext *ctx) { - int l1, l2; + TCGLabel *l1, *l2; uint32_t bi = rC(ctx->opcode); uint32_t mask; TCGv_i32 t0; @@ -944,8 +944,8 @@ static void gen_addis(DisasContext *ctx) static inline void gen_op_arith_divw(DisasContext *ctx, TCGv ret, TCGv arg1, TCGv arg2, int sign, int compute_ov) { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); TCGv_i32 t0 = tcg_temp_local_new_i32(); TCGv_i32 t1 = tcg_temp_local_new_i32(); @@ -953,7 +953,7 @@ static inline void gen_op_arith_divw(DisasContext *ctx, TCGv ret, TCGv arg1, tcg_gen_trunc_tl_i32(t1, arg2); tcg_gen_brcondi_i32(TCG_COND_EQ, t1, 0, l1); if (sign) { - int l3 = gen_new_label(); + TCGLabel *l3 = gen_new_label(); tcg_gen_brcondi_i32(TCG_COND_NE, t1, -1, l3); tcg_gen_brcondi_i32(TCG_COND_EQ, t0, INT32_MIN, l1); gen_set_label(l3); @@ -1019,12 +1019,12 @@ GEN_DIVE(divweo, divwe, 1); static inline void gen_op_arith_divd(DisasContext *ctx, TCGv ret, TCGv arg1, TCGv arg2, int sign, int compute_ov) { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); tcg_gen_brcondi_i64(TCG_COND_EQ, arg2, 0, l1); if (sign) { - int l3 = gen_new_label(); + TCGLabel *l3 = gen_new_label(); tcg_gen_brcondi_i64(TCG_COND_NE, arg2, -1, l3); tcg_gen_brcondi_i64(TCG_COND_EQ, arg1, INT64_MIN, l1); gen_set_label(l3); @@ -2715,7 +2715,7 @@ static inline void gen_addr_add(DisasContext *ctx, TCGv ret, TCGv arg1, static inline void gen_check_align(DisasContext *ctx, TCGv EA, int mask) { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); TCGv t0 = tcg_temp_new(); TCGv_i32 t1, t2; /* NIP cannot be restored if the memory exception comes from an helper */ @@ -3348,7 +3348,7 @@ static void gen_conditional_store(DisasContext *ctx, TCGv EA, static void gen_conditional_store(DisasContext *ctx, TCGv EA, int reg, int size) { - int l1; + TCGLabel *l1; tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so); l1 = gen_new_label(); @@ -3879,7 +3879,7 @@ static void gen_b(DisasContext *ctx) static inline void gen_bcond(DisasContext *ctx, int type) { uint32_t bo = BO(ctx->opcode); - int l1; + TCGLabel *l1; TCGv target; ctx->exception = POWERPC_EXCP_BRANCH; @@ -4922,8 +4922,8 @@ static void gen_ecowx(DisasContext *ctx) /* abs - abs. */ static void gen_abs(DisasContext *ctx) { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_GE, cpu_gpr[rA(ctx->opcode)], 0, l1); tcg_gen_neg_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); tcg_gen_br(l2); @@ -4937,9 +4937,9 @@ static void gen_abs(DisasContext *ctx) /* abso - abso. */ static void gen_abso(DisasContext *ctx) { - int l1 = gen_new_label(); - int l2 = gen_new_label(); - int l3 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); + TCGLabel *l3 = gen_new_label(); /* Start with XER OV disabled, the most likely case */ tcg_gen_movi_tl(cpu_ov, 0); tcg_gen_brcondi_tl(TCG_COND_GE, cpu_gpr[rA(ctx->opcode)], 0, l2); @@ -5005,8 +5005,8 @@ static void gen_divso(DisasContext *ctx) /* doz - doz. */ static void gen_doz(DisasContext *ctx) { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); tcg_gen_brcond_tl(TCG_COND_GE, cpu_gpr[rB(ctx->opcode)], cpu_gpr[rA(ctx->opcode)], l1); tcg_gen_sub_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rB(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); tcg_gen_br(l2); @@ -5020,8 +5020,8 @@ static void gen_doz(DisasContext *ctx) /* dozo - dozo. */ static void gen_dozo(DisasContext *ctx) { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); TCGv t0 = tcg_temp_new(); TCGv t1 = tcg_temp_new(); TCGv t2 = tcg_temp_new(); @@ -5051,8 +5051,8 @@ static void gen_dozo(DisasContext *ctx) static void gen_dozi(DisasContext *ctx) { target_long simm = SIMM(ctx->opcode); - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_LT, cpu_gpr[rA(ctx->opcode)], simm, l1); tcg_gen_subfi_tl(cpu_gpr[rD(ctx->opcode)], simm, cpu_gpr[rA(ctx->opcode)]); tcg_gen_br(l2); @@ -5088,7 +5088,7 @@ static void gen_lscbx(DisasContext *ctx) /* maskg - maskg. */ static void gen_maskg(DisasContext *ctx) { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); TCGv t0 = tcg_temp_new(); TCGv t1 = tcg_temp_new(); TCGv t2 = tcg_temp_new(); @@ -5148,7 +5148,7 @@ static void gen_mul(DisasContext *ctx) /* mulo - mulo. */ static void gen_mulo(DisasContext *ctx) { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); TCGv_i64 t0 = tcg_temp_new_i64(); TCGv_i64 t1 = tcg_temp_new_i64(); TCGv t2 = tcg_temp_new(); @@ -5176,8 +5176,8 @@ static void gen_mulo(DisasContext *ctx) /* nabs - nabs. */ static void gen_nabs(DisasContext *ctx) { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_GT, cpu_gpr[rA(ctx->opcode)], 0, l1); tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); tcg_gen_br(l2); @@ -5191,8 +5191,8 @@ static void gen_nabs(DisasContext *ctx) /* nabso - nabso. */ static void gen_nabso(DisasContext *ctx) { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_GT, cpu_gpr[rA(ctx->opcode)], 0, l1); tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); tcg_gen_br(l2); @@ -5317,8 +5317,8 @@ static void gen_slliq(DisasContext *ctx) /* sllq - sllq. */ static void gen_sllq(DisasContext *ctx) { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); TCGv t0 = tcg_temp_local_new(); TCGv t1 = tcg_temp_local_new(); TCGv t2 = tcg_temp_local_new(); @@ -5346,7 +5346,7 @@ static void gen_sllq(DisasContext *ctx) /* slq - slq. */ static void gen_slq(DisasContext *ctx) { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); TCGv t0 = tcg_temp_new(); TCGv t1 = tcg_temp_new(); tcg_gen_andi_tl(t1, cpu_gpr[rB(ctx->opcode)], 0x1F); @@ -5370,7 +5370,7 @@ static void gen_slq(DisasContext *ctx) static void gen_sraiq(DisasContext *ctx) { int sh = SH(ctx->opcode); - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); TCGv t0 = tcg_temp_new(); TCGv t1 = tcg_temp_new(); tcg_gen_shri_tl(t0, cpu_gpr[rS(ctx->opcode)], sh); @@ -5392,8 +5392,8 @@ static void gen_sraiq(DisasContext *ctx) /* sraq - sraq. */ static void gen_sraq(DisasContext *ctx) { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); TCGv t0 = tcg_temp_new(); TCGv t1 = tcg_temp_local_new(); TCGv t2 = tcg_temp_local_new(); @@ -5515,8 +5515,8 @@ static void gen_srliq(DisasContext *ctx) /* srlq */ static void gen_srlq(DisasContext *ctx) { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); TCGv t0 = tcg_temp_local_new(); TCGv t1 = tcg_temp_local_new(); TCGv t2 = tcg_temp_local_new(); @@ -5545,7 +5545,7 @@ static void gen_srlq(DisasContext *ctx) /* srq */ static void gen_srq(DisasContext *ctx) { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); TCGv t0 = tcg_temp_new(); TCGv t1 = tcg_temp_new(); tcg_gen_andi_tl(t1, cpu_gpr[rB(ctx->opcode)], 0x1F); @@ -5979,7 +5979,7 @@ static inline void gen_405_mulladd_insn(DisasContext *ctx, int opc2, int opc3, if (opc3 & 0x12) { /* Check overflow and/or saturate */ - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); if (opc3 & 0x10) { /* Start with XER OV disabled, the most likely case */ @@ -6394,7 +6394,7 @@ static void gen_tlbsx_40x(DisasContext *ctx) gen_helper_4xx_tlbsx(cpu_gpr[rD(ctx->opcode)], cpu_env, t0); tcg_temp_free(t0); if (Rc(ctx->opcode)) { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so); tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[rD(ctx->opcode)], -1, l1); tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], 0x02); @@ -6475,7 +6475,7 @@ static void gen_tlbsx_440(DisasContext *ctx) gen_helper_440_tlbsx(cpu_gpr[rD(ctx->opcode)], cpu_env, t0); tcg_temp_free(t0); if (Rc(ctx->opcode)) { - int l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); tcg_gen_trunc_tl_i32(cpu_crf[0], cpu_so); tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr[rD(ctx->opcode)], -1, l1); tcg_gen_ori_i32(cpu_crf[0], cpu_crf[0], 0x02); @@ -8576,8 +8576,8 @@ static inline void gen_##name(DisasContext *ctx) \ static inline void gen_op_evabs(TCGv_i32 ret, TCGv_i32 arg1) { - int l1 = gen_new_label(); - int l2 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); tcg_gen_brcondi_i32(TCG_COND_GE, arg1, 0, l1); tcg_gen_neg_i32(ret, arg1); @@ -8626,12 +8626,10 @@ static inline void gen_##name(DisasContext *ctx) \ static inline void gen_op_evsrwu(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) { - TCGv_i32 t0; - int l1, l2; + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); + TCGv_i32 t0 = tcg_temp_local_new_i32(); - l1 = gen_new_label(); - l2 = gen_new_label(); - t0 = tcg_temp_local_new_i32(); /* No error here: 6 bits are used */ tcg_gen_andi_i32(t0, arg2, 0x3F); tcg_gen_brcondi_i32(TCG_COND_GE, t0, 32, l1); @@ -8645,12 +8643,10 @@ static inline void gen_op_evsrwu(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) GEN_SPEOP_ARITH2(evsrwu, gen_op_evsrwu); static inline void gen_op_evsrws(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) { - TCGv_i32 t0; - int l1, l2; + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); + TCGv_i32 t0 = tcg_temp_local_new_i32(); - l1 = gen_new_label(); - l2 = gen_new_label(); - t0 = tcg_temp_local_new_i32(); /* No error here: 6 bits are used */ tcg_gen_andi_i32(t0, arg2, 0x3F); tcg_gen_brcondi_i32(TCG_COND_GE, t0, 32, l1); @@ -8664,12 +8660,10 @@ static inline void gen_op_evsrws(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) GEN_SPEOP_ARITH2(evsrws, gen_op_evsrws); static inline void gen_op_evslw(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) { - TCGv_i32 t0; - int l1, l2; + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); + TCGv_i32 t0 = tcg_temp_local_new_i32(); - l1 = gen_new_label(); - l2 = gen_new_label(); - t0 = tcg_temp_local_new_i32(); /* No error here: 6 bits are used */ tcg_gen_andi_i32(t0, arg2, 0x3F); tcg_gen_brcondi_i32(TCG_COND_GE, t0, 32, l1); @@ -8737,10 +8731,10 @@ static inline void gen_##name(DisasContext *ctx) \ gen_exception(ctx, POWERPC_EXCP_SPEU); \ return; \ } \ - int l1 = gen_new_label(); \ - int l2 = gen_new_label(); \ - int l3 = gen_new_label(); \ - int l4 = gen_new_label(); \ + TCGLabel *l1 = gen_new_label(); \ + TCGLabel *l2 = gen_new_label(); \ + TCGLabel *l3 = gen_new_label(); \ + TCGLabel *l4 = gen_new_label(); \ \ tcg_gen_ext32s_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]); \ tcg_gen_ext32s_tl(cpu_gpr[rB(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]); \ @@ -8830,11 +8824,12 @@ static inline void gen_evsplatfi(DisasContext *ctx) static inline void gen_evsel(DisasContext *ctx) { - int l1 = gen_new_label(); - int l2 = gen_new_label(); - int l3 = gen_new_label(); - int l4 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); + TCGLabel *l2 = gen_new_label(); + TCGLabel *l3 = gen_new_label(); + TCGLabel *l4 = gen_new_label(); TCGv_i32 t0 = tcg_temp_local_new_i32(); + tcg_gen_andi_i32(t0, cpu_crf[ctx->opcode & 0x07], 1 << 3); tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 0, l1); tcg_gen_mov_tl(cpu_gprh[rD(ctx->opcode)], cpu_gprh[rA(ctx->opcode)]); diff --git a/target-s390x/translate.c b/target-s390x/translate.c index c73ea61b16..4f82edde5b 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -1177,7 +1177,7 @@ static ExitStatus help_branch(DisasContext *s, DisasCompare *c, { ExitStatus ret; uint64_t dest = s->pc + 2 * imm; - int lab; + TCGLabel *lab; /* Take care of the special cases first. */ if (c->cond == TCG_COND_NEVER) { @@ -1953,7 +1953,7 @@ static ExitStatus op_cvd(DisasContext *s, DisasOps *o) static ExitStatus op_ct(DisasContext *s, DisasOps *o) { int m3 = get_field(s->fields, m3); - int lab = gen_new_label(); + TCGLabel *lab = gen_new_label(); TCGv_i32 t; TCGCond c; @@ -3077,7 +3077,8 @@ static ExitStatus op_soc(DisasContext *s, DisasOps *o) { DisasCompare c; TCGv_i64 a; - int lab, r1; + TCGLabel *lab; + int r1; disas_jcc(s, &c, get_field(s->fields, m3)); diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 4c95ac7a83..41aa928321 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -211,7 +211,7 @@ static void gen_jump(DisasContext * ctx) static inline void gen_branch_slot(uint32_t delayed_pc, int t) { TCGv sr; - int label = gen_new_label(); + TCGLabel *label = gen_new_label(); tcg_gen_movi_i32(cpu_delayed_pc, delayed_pc); sr = tcg_temp_new(); tcg_gen_andi_i32(sr, cpu_sr, SR_T); @@ -224,7 +224,7 @@ static inline void gen_branch_slot(uint32_t delayed_pc, int t) static void gen_conditional_jump(DisasContext * ctx, target_ulong ift, target_ulong ifnott) { - int l1; + TCGLabel *l1; TCGv sr; l1 = gen_new_label(); @@ -239,7 +239,7 @@ static void gen_conditional_jump(DisasContext * ctx, /* Delayed conditional jump (bt or bf) */ static void gen_delayed_conditional_jump(DisasContext * ctx) { - int l1; + TCGLabel *l1; TCGv ds; l1 = gen_new_label(); @@ -850,10 +850,10 @@ static void _decode_opc(DisasContext * ctx) return; case 0x400c: /* shad Rm,Rn */ { - int label1 = gen_new_label(); - int label2 = gen_new_label(); - int label3 = gen_new_label(); - int label4 = gen_new_label(); + TCGLabel *label1 = gen_new_label(); + TCGLabel *label2 = gen_new_label(); + TCGLabel *label3 = gen_new_label(); + TCGLabel *label4 = gen_new_label(); TCGv shift; tcg_gen_brcondi_i32(TCG_COND_LT, REG(B7_4), 0, label1); /* Rm positive, shift to the left */ @@ -885,9 +885,9 @@ static void _decode_opc(DisasContext * ctx) return; case 0x400d: /* shld Rm,Rn */ { - int label1 = gen_new_label(); - int label2 = gen_new_label(); - int label3 = gen_new_label(); + TCGLabel *label1 = gen_new_label(); + TCGLabel *label2 = gen_new_label(); + TCGLabel *label3 = gen_new_label(); TCGv shift; tcg_gen_brcondi_i32(TCG_COND_LT, REG(B7_4), 0, label1); /* Rm positive, shift to the left */ @@ -1554,7 +1554,7 @@ static void _decode_opc(DisasContext * ctx) 0 -> LDST */ if (ctx->features & SH_FEATURE_SH4A) { - int label = gen_new_label(); + TCGLabel *label = gen_new_label(); tcg_gen_andi_i32(cpu_sr, cpu_sr, ~SR_T); tcg_gen_or_i32(cpu_sr, cpu_sr, cpu_ldst); tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_ldst, 0, label); diff --git a/target-sparc/translate.c b/target-sparc/translate.c index bd53950078..3708c0148e 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -945,9 +945,7 @@ static inline void gen_op_eval_fbo(TCGv dst, TCGv src, static inline void gen_branch2(DisasContext *dc, target_ulong pc1, target_ulong pc2, TCGv r_cond) { - int l1; - - l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1); @@ -960,9 +958,7 @@ static inline void gen_branch2(DisasContext *dc, target_ulong pc1, static inline void gen_branch_a(DisasContext *dc, target_ulong pc1, target_ulong pc2, TCGv r_cond) { - int l1; - - l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1); @@ -2605,7 +2601,8 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn) if (xop == 0x3a) { /* generate trap */ int cond = GET_FIELD(insn, 3, 6); TCGv_i32 trap; - int l1 = -1, mask; + TCGLabel *l1 = NULL; + int mask; if (cond == 0) { /* Trap never. */ diff --git a/target-tricore/translate.c b/target-tricore/translate.c index f720cd7fc5..27777be9c1 100644 --- a/target-tricore/translate.c +++ b/target-tricore/translate.c @@ -2491,8 +2491,7 @@ static inline void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest) static inline void gen_branch_cond(DisasContext *ctx, TCGCond cond, TCGv r1, TCGv r2, int16_t address) { - int jumpLabel; - jumpLabel = gen_new_label(); + TCGLabel *jumpLabel = gen_new_label(); tcg_gen_brcond_tl(cond, r1, r2, jumpLabel); gen_goto_tb(ctx, 1, ctx->next_pc); @@ -2511,8 +2510,7 @@ static inline void gen_branch_condi(DisasContext *ctx, TCGCond cond, TCGv r1, static void gen_loop(DisasContext *ctx, int r1, int32_t offset) { - int l1; - l1 = gen_new_label(); + TCGLabel *l1 = gen_new_label(); tcg_gen_subi_tl(cpu_gpr_a[r1], cpu_gpr_a[r1], 1); tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_gpr_a[r1], -1, l1); diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c index db453ef95c..9efcff5faf 100644 --- a/target-unicore32/translate.c +++ b/target-unicore32/translate.c @@ -33,7 +33,7 @@ typedef struct DisasContext { /* Nonzero if this instruction has been conditionally skipped. */ int condjmp; /* The label that will be jumped to when the instruction is skipped. */ - int condlabel; + TCGLabel *condlabel; struct TranslationBlock *tb; int singlestep_enabled; #ifndef CONFIG_USER_ONLY @@ -419,11 +419,11 @@ static inline void gen_uc32_shift_reg(TCGv var, int shiftop, dead_tmp(shift); } -static void gen_test_cc(int cc, int label) +static void gen_test_cc(int cc, TCGLabel *label) { TCGv tmp; TCGv tmp2; - int inv; + TCGLabel *inv; switch (cc) { case 0: /* eq: Z */ diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index f112e2ac44..6e5096c426 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -456,7 +456,7 @@ static bool gen_check_loop_end(DisasContext *dc, int slot) if (option_enabled(dc, XTENSA_OPTION_LOOP) && !(dc->tb->flags & XTENSA_TBFLAG_EXCM) && dc->next_pc == dc->lend) { - int label = gen_new_label(); + TCGLabel *label = gen_new_label(); gen_advance_ccount(dc); tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_SR[LCOUNT], 0, label); @@ -479,7 +479,7 @@ static void gen_jumpi_check_loop_end(DisasContext *dc, int slot) static void gen_brcond(DisasContext *dc, TCGCond cond, TCGv_i32 t0, TCGv_i32 t1, uint32_t offset) { - int label = gen_new_label(); + TCGLabel *label = gen_new_label(); gen_advance_ccount(dc); tcg_gen_brcond_i32(cond, t0, t1, label); @@ -808,7 +808,7 @@ static void gen_load_store_alignment(DisasContext *dc, int shift, tcg_gen_andi_i32(addr, addr, ~0 << shift); } else if (option_enabled(dc, XTENSA_OPTION_HW_ALIGNMENT) && no_hw_alignment) { - int label = gen_new_label(); + TCGLabel *label = gen_new_label(); TCGv_i32 tmp = tcg_temp_new_i32(); tcg_gen_andi_i32(tmp, addr, ~(~0 << shift)); tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label); @@ -1642,7 +1642,7 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) if (OP2 >= 12) { HAS_OPTION(XTENSA_OPTION_32_BIT_IDIV); - int label = gen_new_label(); + TCGLabel *label = gen_new_label(); tcg_gen_brcondi_i32(TCG_COND_NE, cpu_R[RRR_T], 0, label); gen_exception_cause(dc, INTEGER_DIVIDE_BY_ZERO_CAUSE); gen_set_label(label); @@ -1714,8 +1714,8 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) case 13: /*QUOSi*/ case 15: /*REMSi*/ { - int label1 = gen_new_label(); - int label2 = gen_new_label(); + TCGLabel *label1 = gen_new_label(); + TCGLabel *label2 = gen_new_label(); tcg_gen_brcondi_i32(TCG_COND_NE, cpu_R[RRR_S], 0x80000000, label1); @@ -2468,7 +2468,7 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) case 14: /*S32C1Iy*/ HAS_OPTION(XTENSA_OPTION_CONDITIONAL_STORE); if (gen_window_check2(dc, RRI8_S, RRI8_T)) { - int label = gen_new_label(); + TCGLabel *label = gen_new_label(); TCGv_i32 tmp = tcg_temp_local_new_i32(); TCGv_i32 addr = tcg_temp_local_new_i32(); TCGv_i32 tpc; @@ -2746,7 +2746,7 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) tcg_temp_free(tmp); if (BRI8_R > 8) { - int label = gen_new_label(); + TCGLabel *label = gen_new_label(); tcg_gen_brcondi_i32( BRI8_R == 9 ? TCG_COND_NE : TCG_COND_GT, cpu_R[RRI8_S], 0, label); @@ -3087,7 +3087,7 @@ void gen_intermediate_code_internal(XtensaCPU *cpu, } if (dc.icount) { - int label = gen_new_label(); + TCGLabel *label = gen_new_label(); tcg_gen_addi_i32(dc.next_icount, cpu_SR[ICOUNT], 1); tcg_gen_brcondi_i32(TCG_COND_NE, dc.next_icount, 0, label); diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c index 987c0bd4db..87dc2451cc 100644 --- a/tcg/aarch64/tcg-target.c +++ b/tcg/aarch64/tcg-target.c @@ -837,12 +837,10 @@ void aarch64_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr) flush_icache_range(jmp_addr, jmp_addr + 4); } -static inline void tcg_out_goto_label(TCGContext *s, int label_index) +static inline void tcg_out_goto_label(TCGContext *s, TCGLabel *l) { - TCGLabel *l = &s->labels[label_index]; - if (!l->has_value) { - tcg_out_reloc(s, s->code_ptr, R_AARCH64_JUMP26, label_index, 0); + tcg_out_reloc(s, s->code_ptr, R_AARCH64_JUMP26, l, 0); tcg_out_goto_noaddr(s); } else { tcg_out_goto(s, l->u.value_ptr); @@ -850,9 +848,8 @@ static inline void tcg_out_goto_label(TCGContext *s, int label_index) } static void tcg_out_brcond(TCGContext *s, TCGMemOp ext, TCGCond c, TCGArg a, - TCGArg b, bool b_const, int label) + TCGArg b, bool b_const, TCGLabel *l) { - TCGLabel *l = &s->labels[label]; intptr_t offset; bool need_cmp; @@ -864,7 +861,7 @@ static void tcg_out_brcond(TCGContext *s, TCGMemOp ext, TCGCond c, TCGArg a, } if (!l->has_value) { - tcg_out_reloc(s, s->code_ptr, R_AARCH64_CONDBR19, label, 0); + tcg_out_reloc(s, s->code_ptr, R_AARCH64_CONDBR19, l, 0); offset = tcg_in32(s) >> 5; } else { offset = l->u.value_ptr - s->code_ptr; @@ -1272,7 +1269,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_br: - tcg_out_goto_label(s, a0); + tcg_out_goto_label(s, arg_label(a0)); break; case INDEX_op_ld8u_i32: @@ -1495,7 +1492,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, a1 = (int32_t)a1; /* FALLTHRU */ case INDEX_op_brcond_i64: - tcg_out_brcond(s, ext, a2, a0, a1, const_args[1], args[3]); + tcg_out_brcond(s, ext, a2, a0, a1, const_args[1], arg_label(args[3])); break; case INDEX_op_setcond_i32: diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index e40301c78b..01e6fbf3d8 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -1038,14 +1038,12 @@ static void tcg_out_call(TCGContext *s, tcg_insn_unit *addr) } } -static inline void tcg_out_goto_label(TCGContext *s, int cond, int label_index) +static inline void tcg_out_goto_label(TCGContext *s, int cond, TCGLabel *l) { - TCGLabel *l = &s->labels[label_index]; - if (l->has_value) { tcg_out_goto(s, cond, l->u.value_ptr); } else { - tcg_out_reloc(s, s->code_ptr, R_ARM_PC24, label_index, 0); + tcg_out_reloc(s, s->code_ptr, R_ARM_PC24, l, 0); tcg_out_b_noaddr(s, cond); } } @@ -1657,7 +1655,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, s->tb_next_offset[args[0]] = tcg_current_code_size(s); break; case INDEX_op_br: - tcg_out_goto_label(s, COND_AL, args[0]); + tcg_out_goto_label(s, COND_AL, arg_label(args[0])); break; case INDEX_op_ld8u_i32: @@ -1821,7 +1819,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_brcond_i32: tcg_out_dat_rIN(s, COND_AL, ARITH_CMP, ARITH_CMN, 0, args[0], args[1], const_args[1]); - tcg_out_goto_label(s, tcg_cond_to_arm_cond[args[2]], args[3]); + tcg_out_goto_label(s, tcg_cond_to_arm_cond[args[2]], + arg_label(args[3])); break; case INDEX_op_brcond2_i32: /* The resulting conditions are: @@ -1836,7 +1835,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, args[1], args[3], const_args[3]); tcg_out_dat_rIN(s, COND_EQ, ARITH_CMP, ARITH_CMN, 0, args[0], args[2], const_args[2]); - tcg_out_goto_label(s, tcg_cond_to_arm_cond[args[4]], args[5]); + tcg_out_goto_label(s, tcg_cond_to_arm_cond[args[4]], + arg_label(args[5])); break; case INDEX_op_setcond_i32: tcg_out_dat_rIN(s, COND_AL, ARITH_CMP, ARITH_CMN, 0, diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index 4133dcf1a9..ab63823ee3 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -853,10 +853,9 @@ static void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val) } /* Use SMALL != 0 to force a short forward branch. */ -static void tcg_out_jxx(TCGContext *s, int opc, int label_index, int small) +static void tcg_out_jxx(TCGContext *s, int opc, TCGLabel *l, int small) { int32_t val, val1; - TCGLabel *l = &s->labels[label_index]; if (l->has_value) { val = tcg_pcrel_diff(s, l->u.value_ptr); @@ -886,7 +885,7 @@ static void tcg_out_jxx(TCGContext *s, int opc, int label_index, int small) } else { tcg_out8(s, OPC_JCC_short + opc); } - tcg_out_reloc(s, s->code_ptr, R_386_PC8, label_index, -1); + tcg_out_reloc(s, s->code_ptr, R_386_PC8, l, -1); s->code_ptr += 1; } else { if (opc == -1) { @@ -894,7 +893,7 @@ static void tcg_out_jxx(TCGContext *s, int opc, int label_index, int small) } else { tcg_out_opc(s, OPC_JCC_long + opc, 0, 0, 0); } - tcg_out_reloc(s, s->code_ptr, R_386_PC32, label_index, -4); + tcg_out_reloc(s, s->code_ptr, R_386_PC32, l, -4); s->code_ptr += 4; } } @@ -916,19 +915,19 @@ static void tcg_out_cmp(TCGContext *s, TCGArg arg1, TCGArg arg2, static void tcg_out_brcond32(TCGContext *s, TCGCond cond, TCGArg arg1, TCGArg arg2, int const_arg2, - int label_index, int small) + TCGLabel *label, int small) { tcg_out_cmp(s, arg1, arg2, const_arg2, 0); - tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index, small); + tcg_out_jxx(s, tcg_cond_to_jcc[cond], label, small); } #if TCG_TARGET_REG_BITS == 64 static void tcg_out_brcond64(TCGContext *s, TCGCond cond, TCGArg arg1, TCGArg arg2, int const_arg2, - int label_index, int small) + TCGLabel *label, int small) { tcg_out_cmp(s, arg1, arg2, const_arg2, P_REXW); - tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index, small); + tcg_out_jxx(s, tcg_cond_to_jcc[cond], label, small); } #else /* XXX: we implement it at the target level to avoid having to @@ -936,76 +935,77 @@ static void tcg_out_brcond64(TCGContext *s, TCGCond cond, static void tcg_out_brcond2(TCGContext *s, const TCGArg *args, const int *const_args, int small) { - int label_next; - label_next = gen_new_label(); + TCGLabel *label_next = gen_new_label(); + TCGLabel *label_this = arg_label(args[5]); + switch(args[4]) { case TCG_COND_EQ: tcg_out_brcond32(s, TCG_COND_NE, args[0], args[2], const_args[2], label_next, 1); tcg_out_brcond32(s, TCG_COND_EQ, args[1], args[3], const_args[3], - args[5], small); + label_this, small); break; case TCG_COND_NE: tcg_out_brcond32(s, TCG_COND_NE, args[0], args[2], const_args[2], - args[5], small); + label_this, small); tcg_out_brcond32(s, TCG_COND_NE, args[1], args[3], const_args[3], - args[5], small); + label_this, small); break; case TCG_COND_LT: tcg_out_brcond32(s, TCG_COND_LT, args[1], args[3], const_args[3], - args[5], small); + label_this, small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_LTU, args[0], args[2], const_args[2], - args[5], small); + label_this, small); break; case TCG_COND_LE: tcg_out_brcond32(s, TCG_COND_LT, args[1], args[3], const_args[3], - args[5], small); + label_this, small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_LEU, args[0], args[2], const_args[2], - args[5], small); + label_this, small); break; case TCG_COND_GT: tcg_out_brcond32(s, TCG_COND_GT, args[1], args[3], const_args[3], - args[5], small); + label_this, small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_GTU, args[0], args[2], const_args[2], - args[5], small); + label_this, small); break; case TCG_COND_GE: tcg_out_brcond32(s, TCG_COND_GT, args[1], args[3], const_args[3], - args[5], small); + label_this, small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_GEU, args[0], args[2], const_args[2], - args[5], small); + label_this, small); break; case TCG_COND_LTU: tcg_out_brcond32(s, TCG_COND_LTU, args[1], args[3], const_args[3], - args[5], small); + label_this, small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_LTU, args[0], args[2], const_args[2], - args[5], small); + label_this, small); break; case TCG_COND_LEU: tcg_out_brcond32(s, TCG_COND_LTU, args[1], args[3], const_args[3], - args[5], small); + label_this, small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_LEU, args[0], args[2], const_args[2], - args[5], small); + label_this, small); break; case TCG_COND_GTU: tcg_out_brcond32(s, TCG_COND_GTU, args[1], args[3], const_args[3], - args[5], small); + label_this, small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_GTU, args[0], args[2], const_args[2], - args[5], small); + label_this, small); break; case TCG_COND_GEU: tcg_out_brcond32(s, TCG_COND_GTU, args[1], args[3], const_args[3], - args[5], small); + label_this, small); tcg_out_jxx(s, JCC_JNE, label_next, 1); tcg_out_brcond32(s, TCG_COND_GEU, args[0], args[2], const_args[2], - args[5], small); + label_this, small); break; default: tcg_abort(); @@ -1035,7 +1035,7 @@ static void tcg_out_setcond2(TCGContext *s, const TCGArg *args, const int *const_args) { TCGArg new_args[6]; - int label_true, label_over; + TCGLabel *label_true, *label_over; memcpy(new_args, args+1, 5*sizeof(TCGArg)); @@ -1047,7 +1047,7 @@ static void tcg_out_setcond2(TCGContext *s, const TCGArg *args, label_true = gen_new_label(); label_over = gen_new_label(); - new_args[5] = label_true; + new_args[5] = label_arg(label_true); tcg_out_brcond2(s, new_args, const_args+1, 1); tcg_out_movi(s, TCG_TYPE_I32, args[0], 0); @@ -1065,7 +1065,7 @@ static void tcg_out_setcond2(TCGContext *s, const TCGArg *args, label_over = gen_new_label(); new_args[4] = tcg_invert_cond(new_args[4]); - new_args[5] = label_over; + new_args[5] = label_arg(label_over); tcg_out_brcond2(s, new_args, const_args+1, 1); tgen_arithi(s, ARITH_ADD, args[0], 1, 0); @@ -1082,7 +1082,7 @@ static void tcg_out_movcond32(TCGContext *s, TCGCond cond, TCGArg dest, if (have_cmov) { tcg_out_modrm(s, OPC_CMOVCC | tcg_cond_to_jcc[cond], dest, v1); } else { - int over = gen_new_label(); + TCGLabel *over = gen_new_label(); tcg_out_jxx(s, tcg_cond_to_jcc[tcg_invert_cond(cond)], over, 1); tcg_out_mov(s, TCG_TYPE_I32, dest, v1); tcg_out_label(s, over, s->code_ptr); @@ -1748,7 +1748,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, s->tb_next_offset[args[0]] = tcg_current_code_size(s); break; case INDEX_op_br: - tcg_out_jxx(s, JCC_JMP, args[0], 0); + tcg_out_jxx(s, JCC_JMP, arg_label(args[0]), 0); break; OP_32_64(ld8u): /* Note that we can ignore REXW for the zero-extend to 64-bit. */ @@ -1909,7 +1909,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_brcond_i32: tcg_out_brcond32(s, args[2], args[0], args[1], const_args[1], - args[3], 0); + arg_label(args[3]), 0); break; case INDEX_op_setcond_i32: tcg_out_setcond32(s, args[3], args[0], args[1], @@ -2017,7 +2017,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_brcond_i64: tcg_out_brcond64(s, args[2], args[0], args[1], const_args[1], - args[3], 0); + arg_label(args[3]), 0); break; case INDEX_op_setcond_i64: tcg_out_setcond64(s, args[3], args[0], args[1], diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c index 6bc9924641..25f207db91 100644 --- a/tcg/ia64/tcg-target.c +++ b/tcg/ia64/tcg-target.c @@ -827,9 +827,8 @@ static inline void tcg_out_movi(TCGContext *s, TCGType type, tcg_opc_x2 (TCG_REG_P0, OPC_MOVL_X2, reg, arg)); } -static void tcg_out_br(TCGContext *s, int label_index) +static void tcg_out_br(TCGContext *s, TCGLabel *l) { - TCGLabel *l = &s->labels[label_index]; uint64_t imm; /* We pay attention here to not modify the branch target by reading @@ -839,7 +838,7 @@ static void tcg_out_br(TCGContext *s, int label_index) imm = l->u.value_ptr - s->code_ptr; } else { imm = get_reloc_pcrel21b_slot2(s->code_ptr); - tcg_out_reloc(s, s->code_ptr, R_IA64_PCREL21B, label_index, 0); + tcg_out_reloc(s, s->code_ptr, R_IA64_PCREL21B, l, 0); } tcg_out_bundle(s, mmB, @@ -1424,9 +1423,8 @@ static inline uint64_t tcg_opc_cmp_a(int qp, TCGCond cond, TCGArg arg1, } static inline void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1, - TCGReg arg2, int label_index, int cmp4) + TCGReg arg2, TCGLabel *l, int cmp4) { - TCGLabel *l = &s->labels[label_index]; uint64_t imm; /* We pay attention here to not modify the branch target by reading @@ -1436,7 +1434,7 @@ static inline void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1, imm = l->u.value_ptr - s->code_ptr; } else { imm = get_reloc_pcrel21b_slot2(s->code_ptr); - tcg_out_reloc(s, s->code_ptr, R_IA64_PCREL21B, label_index, 0); + tcg_out_reloc(s, s->code_ptr, R_IA64_PCREL21B, l, 0); } tcg_out_bundle(s, miB, @@ -1550,34 +1548,33 @@ static inline void tcg_out_qemu_tlb(TCGContext *s, TCGReg addr_reg, bswap2); } -#define TCG_MAX_QEMU_LDST 640 - typedef struct TCGLabelQemuLdst { bool is_ld; TCGMemOp size; tcg_insn_unit *label_ptr; /* label pointers to be updated */ + struct TCGLabelQemuLdst *next; } TCGLabelQemuLdst; typedef struct TCGBackendData { - int nb_ldst_labels; - TCGLabelQemuLdst ldst_labels[TCG_MAX_QEMU_LDST]; + TCGLabelQemuLdst *labels; } TCGBackendData; static inline void tcg_out_tb_init(TCGContext *s) { - s->be->nb_ldst_labels = 0; + s->be->labels = NULL; } static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGMemOp opc, tcg_insn_unit *label_ptr) { TCGBackendData *be = s->be; - TCGLabelQemuLdst *l = &be->ldst_labels[be->nb_ldst_labels++]; + TCGLabelQemuLdst *l = tcg_malloc(sizeof(*l)); - assert(be->nb_ldst_labels <= TCG_MAX_QEMU_LDST); l->is_ld = is_ld; l->size = opc & MO_SIZE; l->label_ptr = label_ptr; + l->next = be->labels; + be->labels = l; } static void tcg_out_tb_finalize(TCGContext *s) @@ -1593,11 +1590,9 @@ static void tcg_out_tb_finalize(TCGContext *s) helper_le_ldq_mmu, }; tcg_insn_unit *thunks[8] = { }; - TCGBackendData *be = s->be; - size_t i, n = be->nb_ldst_labels; + TCGLabelQemuLdst *l; - for (i = 0; i < n; i++) { - TCGLabelQemuLdst *l = &be->ldst_labels[i]; + for (l = s->be->labels; l != NULL; l = l->next) { long x = l->is_ld * 4 + l->size; tcg_insn_unit *dest = thunks[x]; @@ -1993,7 +1988,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out_exit_tb(s, args[0]); break; case INDEX_op_br: - tcg_out_br(s, args[0]); + tcg_out_br(s, arg_label(args[0])); break; case INDEX_op_goto_tb: tcg_out_goto_tb(s, args[0]); @@ -2175,10 +2170,10 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_brcond_i32: - tcg_out_brcond(s, args[2], args[0], args[1], args[3], 1); + tcg_out_brcond(s, args[2], args[0], args[1], arg_label(args[3]), 1); break; case INDEX_op_brcond_i64: - tcg_out_brcond(s, args[2], args[0], args[1], args[3], 0); + tcg_out_brcond(s, args[2], args[0], args[1], arg_label(args[3]), 0); break; case INDEX_op_setcond_i32: tcg_out_setcond(s, args[3], args[0], args[1], args[2], 1); diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c index b7f4d67483..5414b8312c 100644 --- a/tcg/mips/tcg-target.c +++ b/tcg/mips/tcg-target.c @@ -635,7 +635,7 @@ static void tcg_out_setcond(TCGContext *s, TCGCond cond, TCGReg ret, } static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1, - TCGReg arg2, int label_index) + TCGReg arg2, TCGLabel *l) { static const MIPSInsn b_zero[16] = { [TCG_COND_LT] = OPC_BLTZ, @@ -644,7 +644,6 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1, [TCG_COND_GE] = OPC_BGEZ, }; - TCGLabel *l; MIPSInsn s_opc = OPC_SLTU; MIPSInsn b_opc; int cmp_map; @@ -692,11 +691,10 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1, } tcg_out_opc_br(s, b_opc, arg1, arg2); - l = &s->labels[label_index]; if (l->has_value) { reloc_pc16(s->code_ptr - 1, l->u.value_ptr); } else { - tcg_out_reloc(s, s->code_ptr - 1, R_MIPS_PC16, label_index, 0); + tcg_out_reloc(s, s->code_ptr - 1, R_MIPS_PC16, l, 0); } tcg_out_nop(s); } @@ -765,7 +763,7 @@ static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret, } static void tcg_out_brcond2(TCGContext *s, TCGCond cond, TCGReg al, TCGReg ah, - TCGReg bl, TCGReg bh, int label_index) + TCGReg bl, TCGReg bh, TCGLabel *l) { TCGCond b_cond = TCG_COND_NE; TCGReg tmp = TCG_TMP1; @@ -790,7 +788,7 @@ static void tcg_out_brcond2(TCGContext *s, TCGCond cond, TCGReg al, TCGReg ah, break; } - tcg_out_brcond(s, b_cond, tmp, TCG_REG_ZERO, label_index); + tcg_out_brcond(s, b_cond, tmp, TCG_REG_ZERO, l); } static void tcg_out_movcond(TCGContext *s, TCGCond cond, TCGReg ret, @@ -1367,7 +1365,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, s->tb_next_offset[a0] = tcg_current_code_size(s); break; case INDEX_op_br: - tcg_out_brcond(s, TCG_COND_EQ, TCG_REG_ZERO, TCG_REG_ZERO, a0); + tcg_out_brcond(s, TCG_COND_EQ, TCG_REG_ZERO, TCG_REG_ZERO, + arg_label(a0)); break; case INDEX_op_ld8u_i32: @@ -1527,10 +1526,10 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_brcond_i32: - tcg_out_brcond(s, a2, a0, a1, args[3]); + tcg_out_brcond(s, a2, a0, a1, arg_label(args[3])); break; case INDEX_op_brcond2_i32: - tcg_out_brcond2(s, args[4], a0, a1, a2, args[3], args[5]); + tcg_out_brcond2(s, args[4], a0, a1, a2, args[3], arg_label(args[5])); break; case INDEX_op_movcond_i32: diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index 203027eb3e..36fd314c5b 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -1100,24 +1100,22 @@ static void tcg_out_setcond(TCGContext *s, TCGType type, TCGCond cond, } } -static void tcg_out_bc(TCGContext *s, int bc, int label_index) +static void tcg_out_bc(TCGContext *s, int bc, TCGLabel *l) { - TCGLabel *l = &s->labels[label_index]; - if (l->has_value) { tcg_out32(s, bc | reloc_pc14_val(s->code_ptr, l->u.value_ptr)); } else { - tcg_out_reloc(s, s->code_ptr, R_PPC_REL14, label_index, 0); + tcg_out_reloc(s, s->code_ptr, R_PPC_REL14, l, 0); tcg_out_bc_noaddr(s, bc); } } static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGArg arg1, TCGArg arg2, int const_arg2, - int label_index, TCGType type) + TCGLabel *l, TCGType type) { tcg_out_cmp(s, cond, arg1, arg2, const_arg2, 7, type); - tcg_out_bc(s, tcg_to_bc[cond], label_index); + tcg_out_bc(s, tcg_to_bc[cond], l); } static void tcg_out_movcond(TCGContext *s, TCGType type, TCGCond cond, @@ -1242,7 +1240,7 @@ static void tcg_out_brcond2 (TCGContext *s, const TCGArg *args, const int *const_args) { tcg_out_cmp2(s, args, const_args); - tcg_out_bc(s, BC | BI(7, CR_EQ) | BO_COND_TRUE, args[5]); + tcg_out_bc(s, BC | BI(7, CR_EQ) | BO_COND_TRUE, arg_label(args[5])); } void ppc_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr) @@ -1866,12 +1864,12 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, break; case INDEX_op_br: { - TCGLabel *l = &s->labels[args[0]]; + TCGLabel *l = arg_label(args[0]); if (l->has_value) { tcg_out_b(s, 0, l->u.value_ptr); } else { - tcg_out_reloc(s, s->code_ptr, R_PPC_REL24, args[0], 0); + tcg_out_reloc(s, s->code_ptr, R_PPC_REL24, l, 0); tcg_out_b_noaddr(s, B); } } @@ -2079,11 +2077,11 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, case INDEX_op_brcond_i32: tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], - args[3], TCG_TYPE_I32); + arg_label(args[3]), TCG_TYPE_I32); break; case INDEX_op_brcond_i64: tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], - args[3], TCG_TYPE_I64); + arg_label(args[3]), TCG_TYPE_I64); break; case INDEX_op_brcond2_i32: tcg_out_brcond2(s, args, const_args); diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c index 63e9c82cb3..be984f5780 100644 --- a/tcg/s390/tcg-target.c +++ b/tcg/s390/tcg-target.c @@ -1274,26 +1274,24 @@ static void tgen_gotoi(TCGContext *s, int cc, tcg_insn_unit *dest) } } -static void tgen_branch(TCGContext *s, int cc, int labelno) +static void tgen_branch(TCGContext *s, int cc, TCGLabel *l) { - TCGLabel* l = &s->labels[labelno]; if (l->has_value) { tgen_gotoi(s, cc, l->u.value_ptr); } else if (USE_LONG_BRANCHES) { tcg_out16(s, RIL_BRCL | (cc << 4)); - tcg_out_reloc(s, s->code_ptr, R_390_PC32DBL, labelno, -2); + tcg_out_reloc(s, s->code_ptr, R_390_PC32DBL, l, -2); s->code_ptr += 2; } else { tcg_out16(s, RI_BRC | (cc << 4)); - tcg_out_reloc(s, s->code_ptr, R_390_PC16DBL, labelno, -2); + tcg_out_reloc(s, s->code_ptr, R_390_PC16DBL, l, -2); s->code_ptr += 1; } } static void tgen_compare_branch(TCGContext *s, S390Opcode opc, int cc, - TCGReg r1, TCGReg r2, int labelno) + TCGReg r1, TCGReg r2, TCGLabel *l) { - TCGLabel* l = &s->labels[labelno]; intptr_t off; if (l->has_value) { @@ -1301,7 +1299,7 @@ static void tgen_compare_branch(TCGContext *s, S390Opcode opc, int cc, } else { /* We need to keep the offset unchanged for retranslation. */ off = s->code_ptr[1]; - tcg_out_reloc(s, s->code_ptr + 1, R_390_PC16DBL, labelno, -2); + tcg_out_reloc(s, s->code_ptr + 1, R_390_PC16DBL, l, -2); } tcg_out16(s, (opc & 0xff00) | (r1 << 4) | r2); @@ -1310,9 +1308,8 @@ static void tgen_compare_branch(TCGContext *s, S390Opcode opc, int cc, } static void tgen_compare_imm_branch(TCGContext *s, S390Opcode opc, int cc, - TCGReg r1, int i2, int labelno) + TCGReg r1, int i2, TCGLabel *l) { - TCGLabel* l = &s->labels[labelno]; tcg_target_long off; if (l->has_value) { @@ -1320,7 +1317,7 @@ static void tgen_compare_imm_branch(TCGContext *s, S390Opcode opc, int cc, } else { /* We need to keep the offset unchanged for retranslation. */ off = s->code_ptr[1]; - tcg_out_reloc(s, s->code_ptr + 1, R_390_PC16DBL, labelno, -2); + tcg_out_reloc(s, s->code_ptr + 1, R_390_PC16DBL, l, -2); } tcg_out16(s, (opc & 0xff00) | (r1 << 4) | cc); @@ -1329,7 +1326,7 @@ static void tgen_compare_imm_branch(TCGContext *s, S390Opcode opc, int cc, } static void tgen_brcond(TCGContext *s, TCGType type, TCGCond c, - TCGReg r1, TCGArg c2, int c2const, int labelno) + TCGReg r1, TCGArg c2, int c2const, TCGLabel *l) { int cc; @@ -1344,7 +1341,7 @@ static void tgen_brcond(TCGContext *s, TCGType type, TCGCond c, opc = (type == TCG_TYPE_I32 ? (is_unsigned ? RIE_CLRJ : RIE_CRJ) : (is_unsigned ? RIE_CLGRJ : RIE_CGRJ)); - tgen_compare_branch(s, opc, cc, r1, c2, labelno); + tgen_compare_branch(s, opc, cc, r1, c2, l); return; } @@ -1370,13 +1367,13 @@ static void tgen_brcond(TCGContext *s, TCGType type, TCGCond c, } } if (in_range) { - tgen_compare_imm_branch(s, opc, cc, r1, c2, labelno); + tgen_compare_imm_branch(s, opc, cc, r1, c2, l); return; } } cc = tgen_cmp(s, type, c, r1, c2, c2const); - tgen_branch(s, cc, labelno); + tgen_branch(s, cc, l); } static void tcg_out_call(TCGContext *s, tcg_insn_unit *dest) @@ -1904,12 +1901,12 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_br: - tgen_branch(s, S390_CC_ALWAYS, args[0]); + tgen_branch(s, S390_CC_ALWAYS, arg_label(args[0])); break; case INDEX_op_brcond_i32: tgen_brcond(s, TCG_TYPE_I32, args[2], args[0], - args[1], const_args[1], args[3]); + args[1], const_args[1], arg_label(args[3])); break; case INDEX_op_setcond_i32: tgen_setcond(s, TCG_TYPE_I32, args[3], args[0], args[1], @@ -2126,7 +2123,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_brcond_i64: tgen_brcond(s, TCG_TYPE_I64, args[2], args[0], - args[1], const_args[1], args[3]); + args[1], const_args[1], arg_label(args[3])); break; case INDEX_op_setcond_i64: tgen_setcond(s, TCG_TYPE_I64, args[3], args[0], args[1], diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 0c4b028580..f9b616ffae 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -569,9 +569,8 @@ static void tcg_out_bpcc0(TCGContext *s, int scond, int flags, int off19) tcg_out32(s, INSN_OP(0) | INSN_OP2(1) | INSN_COND(scond) | flags | off19); } -static void tcg_out_bpcc(TCGContext *s, int scond, int flags, int label) +static void tcg_out_bpcc(TCGContext *s, int scond, int flags, TCGLabel *l) { - TCGLabel *l = &s->labels[label]; int off19; if (l->has_value) { @@ -579,7 +578,7 @@ static void tcg_out_bpcc(TCGContext *s, int scond, int flags, int label) } else { /* Make sure to preserve destinations during retranslation. */ off19 = *s->code_ptr & INSN_OFF19(-1); - tcg_out_reloc(s, s->code_ptr, R_SPARC_WDISP19, label, 0); + tcg_out_reloc(s, s->code_ptr, R_SPARC_WDISP19, l, 0); } tcg_out_bpcc0(s, scond, flags, off19); } @@ -590,10 +589,10 @@ static void tcg_out_cmp(TCGContext *s, TCGReg c1, int32_t c2, int c2const) } static void tcg_out_brcond_i32(TCGContext *s, TCGCond cond, TCGReg arg1, - int32_t arg2, int const_arg2, int label) + int32_t arg2, int const_arg2, TCGLabel *l) { tcg_out_cmp(s, arg1, arg2, const_arg2); - tcg_out_bpcc(s, tcg_cond_to_bcond[cond], BPCC_ICC | BPCC_PT, label); + tcg_out_bpcc(s, tcg_cond_to_bcond[cond], BPCC_ICC | BPCC_PT, l); tcg_out_nop(s); } @@ -614,11 +613,10 @@ static void tcg_out_movcond_i32(TCGContext *s, TCGCond cond, TCGReg ret, } static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGReg arg1, - int32_t arg2, int const_arg2, int label) + int32_t arg2, int const_arg2, TCGLabel *l) { /* For 64-bit signed comparisons vs zero, we can avoid the compare. */ if (arg2 == 0 && !is_unsigned_cond(cond)) { - TCGLabel *l = &s->labels[label]; int off16; if (l->has_value) { @@ -626,13 +624,13 @@ static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGReg arg1, } else { /* Make sure to preserve destinations during retranslation. */ off16 = *s->code_ptr & INSN_OFF16(-1); - tcg_out_reloc(s, s->code_ptr, R_SPARC_WDISP16, label, 0); + tcg_out_reloc(s, s->code_ptr, R_SPARC_WDISP16, l, 0); } tcg_out32(s, INSN_OP(0) | INSN_OP2(3) | BPR_PT | INSN_RS1(arg1) | INSN_COND(tcg_cond_to_rcond[cond]) | off16); } else { tcg_out_cmp(s, arg1, arg2, const_arg2); - tcg_out_bpcc(s, tcg_cond_to_bcond[cond], BPCC_XCC | BPCC_PT, label); + tcg_out_bpcc(s, tcg_cond_to_bcond[cond], BPCC_XCC | BPCC_PT, l); } tcg_out_nop(s); } @@ -1243,7 +1241,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, s->tb_next_offset[a0] = tcg_current_code_size(s); break; case INDEX_op_br: - tcg_out_bpcc(s, COND_A, BPCC_PT, a0); + tcg_out_bpcc(s, COND_A, BPCC_PT, arg_label(a0)); tcg_out_nop(s); break; @@ -1329,7 +1327,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_brcond_i32: - tcg_out_brcond_i32(s, a2, a0, a1, const_args[1], args[3]); + tcg_out_brcond_i32(s, a2, a0, a1, const_args[1], arg_label(args[3])); break; case INDEX_op_setcond_i32: tcg_out_setcond_i32(s, args[3], a0, a1, a2, c2); @@ -1420,7 +1418,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, break; case INDEX_op_brcond_i64: - tcg_out_brcond_i64(s, a2, a0, a1, const_args[1], args[3]); + tcg_out_brcond_i64(s, a2, a0, a1, const_args[1], arg_label(args[3])); break; case INDEX_op_setcond_i64: tcg_out_setcond_i64(s, args[3], a0, a1, a2, c2); diff --git a/tcg/tcg-be-ldst.h b/tcg/tcg-be-ldst.h index 429cba24d4..4a45102975 100644 --- a/tcg/tcg-be-ldst.h +++ b/tcg/tcg-be-ldst.h @@ -21,7 +21,6 @@ */ #ifdef CONFIG_SOFTMMU -#define TCG_MAX_QEMU_LDST 640 typedef struct TCGLabelQemuLdst { bool is_ld; /* qemu_ld: true, qemu_st: false */ @@ -34,11 +33,11 @@ typedef struct TCGLabelQemuLdst { int mem_index; /* soft MMU memory index */ tcg_insn_unit *raddr; /* gen code addr of the next IR of qemu_ld/st IR */ tcg_insn_unit *label_ptr[2]; /* label pointers to be updated */ + struct TCGLabelQemuLdst *next; } TCGLabelQemuLdst; typedef struct TCGBackendData { - int nb_ldst_labels; - TCGLabelQemuLdst ldst_labels[TCG_MAX_QEMU_LDST]; + TCGLabelQemuLdst *labels; } TCGBackendData; @@ -48,7 +47,7 @@ typedef struct TCGBackendData { static inline void tcg_out_tb_init(TCGContext *s) { - s->be->nb_ldst_labels = 0; + s->be->labels = NULL; } /* @@ -60,15 +59,14 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l); static void tcg_out_tb_finalize(TCGContext *s) { - TCGLabelQemuLdst *lb = s->be->ldst_labels; - int i, n = s->be->nb_ldst_labels; + TCGLabelQemuLdst *lb; /* qemu_ld/st slow paths */ - for (i = 0; i < n; i++) { - if (lb[i].is_ld) { - tcg_out_qemu_ld_slow_path(s, lb + i); + for (lb = s->be->labels; lb != NULL; lb = lb->next) { + if (lb->is_ld) { + tcg_out_qemu_ld_slow_path(s, lb); } else { - tcg_out_qemu_st_slow_path(s, lb + i); + tcg_out_qemu_st_slow_path(s, lb); } } } @@ -80,11 +78,11 @@ static void tcg_out_tb_finalize(TCGContext *s) static inline TCGLabelQemuLdst *new_ldst_label(TCGContext *s) { TCGBackendData *be = s->be; - int n = be->nb_ldst_labels; + TCGLabelQemuLdst *l = tcg_malloc(sizeof(*l)); - assert(n < TCG_MAX_QEMU_LDST); - be->nb_ldst_labels = n + 1; - return &be->ldst_labels[n]; + l->next = be->labels; + be->labels = l; + return l; } #else #include "tcg-be-null.h" diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index afa351dc70..f7a2767cbe 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -275,20 +275,24 @@ void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2) } } -void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, int label) +void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *l) { if (cond == TCG_COND_ALWAYS) { - tcg_gen_br(label); + tcg_gen_br(l); } else if (cond != TCG_COND_NEVER) { - tcg_gen_op4ii_i32(INDEX_op_brcond_i32, arg1, arg2, cond, label); + tcg_gen_op4ii_i32(INDEX_op_brcond_i32, arg1, arg2, cond, label_arg(l)); } } -void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, int label) +void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *l) { - TCGv_i32 t0 = tcg_const_i32(arg2); - tcg_gen_brcond_i32(cond, arg1, t0, label); - tcg_temp_free_i32(t0); + if (cond == TCG_COND_ALWAYS) { + tcg_gen_br(l); + } else if (cond != TCG_COND_NEVER) { + TCGv_i32 t0 = tcg_const_i32(arg2); + tcg_gen_brcond_i32(cond, arg1, t0, l); + tcg_temp_free_i32(t0); + } } void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret, @@ -546,7 +550,11 @@ void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2, void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1, TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2) { - if (TCG_TARGET_HAS_movcond_i32) { + if (cond == TCG_COND_ALWAYS) { + tcg_gen_mov_i32(ret, v1); + } else if (cond == TCG_COND_NEVER) { + tcg_gen_mov_i32(ret, v2); + } else if (TCG_TARGET_HAS_movcond_i32) { tcg_gen_op6i_i32(INDEX_op_movcond_i32, ret, c1, c2, v1, v2, cond); } else { TCGv_i32 t0 = tcg_temp_new_i32(); @@ -1084,28 +1092,29 @@ void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2) } } -void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, int label) +void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *l) { if (cond == TCG_COND_ALWAYS) { - tcg_gen_br(label); + tcg_gen_br(l); } else if (cond != TCG_COND_NEVER) { if (TCG_TARGET_REG_BITS == 32) { tcg_gen_op6ii_i32(INDEX_op_brcond2_i32, TCGV_LOW(arg1), TCGV_HIGH(arg1), TCGV_LOW(arg2), - TCGV_HIGH(arg2), cond, label); + TCGV_HIGH(arg2), cond, label_arg(l)); } else { - tcg_gen_op4ii_i64(INDEX_op_brcond_i64, arg1, arg2, cond, label); + tcg_gen_op4ii_i64(INDEX_op_brcond_i64, arg1, arg2, cond, + label_arg(l)); } } } -void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, int label) +void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *l) { if (cond == TCG_COND_ALWAYS) { - tcg_gen_br(label); + tcg_gen_br(l); } else if (cond != TCG_COND_NEVER) { TCGv_i64 t0 = tcg_const_i64(arg2); - tcg_gen_brcond_i64(cond, arg1, t0, label); + tcg_gen_brcond_i64(cond, arg1, t0, l); tcg_temp_free_i64(t0); } } @@ -1589,7 +1598,11 @@ void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2, void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1, TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2) { - if (TCG_TARGET_REG_BITS == 32) { + if (cond == TCG_COND_ALWAYS) { + tcg_gen_mov_i64(ret, v1); + } else if (cond == TCG_COND_NEVER) { + tcg_gen_mov_i64(ret, v2); + } else if (TCG_TARGET_REG_BITS == 32) { TCGv_i32 t0 = tcg_temp_new_i32(); TCGv_i32 t1 = tcg_temp_new_i32(); tcg_gen_op6i_i32(INDEX_op_setcond2_i32, t0, diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index 96adf9af6a..d1d763f6ff 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -251,19 +251,16 @@ static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2, /* Generic ops. */ -int gen_new_label(void); - -static inline void gen_set_label(int n) +static inline void gen_set_label(TCGLabel *l) { - tcg_gen_op1(&tcg_ctx, INDEX_op_set_label, n); + tcg_gen_op1(&tcg_ctx, INDEX_op_set_label, label_arg(l)); } -static inline void tcg_gen_br(int label) +static inline void tcg_gen_br(TCGLabel *l) { - tcg_gen_op1(&tcg_ctx, INDEX_op_br, label); + tcg_gen_op1(&tcg_ctx, INDEX_op_br, label_arg(l)); } - /* Helper calls. */ /* 32 bit ops */ @@ -293,8 +290,8 @@ void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2); void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2, unsigned int ofs, unsigned int len); -void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, int label); -void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, int label); +void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *); +void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *); void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2); void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret, @@ -469,8 +466,8 @@ void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2); void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2, unsigned int ofs, unsigned int len); -void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, int label); -void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, int label); +void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *); +void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *); void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2); void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret, diff --git a/tcg/tcg.c b/tcg/tcg.c index 3841e9951c..f1558b75c4 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -208,12 +208,10 @@ static __attribute__((unused)) inline void tcg_patch64(tcg_insn_unit *p, /* label relocation processing */ static void tcg_out_reloc(TCGContext *s, tcg_insn_unit *code_ptr, int type, - int label_index, intptr_t addend) + TCGLabel *l, intptr_t addend) { - TCGLabel *l; TCGRelocation *r; - l = &s->labels[label_index]; if (l->has_value) { /* FIXME: This may break relocations on RISC targets that modify instruction fields in place. The caller may not have @@ -230,9 +228,8 @@ static void tcg_out_reloc(TCGContext *s, tcg_insn_unit *code_ptr, int type, } } -static void tcg_out_label(TCGContext *s, int label_index, tcg_insn_unit *ptr) +static void tcg_out_label(TCGContext *s, TCGLabel *l, tcg_insn_unit *ptr) { - TCGLabel *l = &s->labels[label_index]; intptr_t value = (intptr_t)ptr; TCGRelocation *r; @@ -246,19 +243,16 @@ static void tcg_out_label(TCGContext *s, int label_index, tcg_insn_unit *ptr) l->u.value_ptr = ptr; } -int gen_new_label(void) +TCGLabel *gen_new_label(void) { TCGContext *s = &tcg_ctx; - int idx; - TCGLabel *l; + TCGLabel *l = tcg_malloc(sizeof(TCGLabel)); - if (s->nb_labels >= TCG_MAX_LABELS) - tcg_abort(); - idx = s->nb_labels++; - l = &s->labels[idx]; - l->has_value = 0; - l->u.first_reloc = NULL; - return idx; + *l = (TCGLabel){ + .id = s->nb_labels++ + }; + + return l; } #include "tcg-target.c" @@ -1088,11 +1082,20 @@ void tcg_dump_ops(TCGContext *s) i = 0; break; } - for (; i < nb_cargs; i++) { - if (k != 0) { - qemu_log(","); - } - qemu_log("$0x%" TCG_PRIlx, args[k++]); + switch (c) { + case INDEX_op_set_label: + case INDEX_op_br: + case INDEX_op_brcond_i32: + case INDEX_op_brcond_i64: + case INDEX_op_brcond2_i32: + qemu_log("%s$L%d", k ? "," : "", arg_label(args[k])->id); + i++, k++; + break; + default: + break; + } + for (; i < nb_cargs; i++, k++) { + qemu_log("%s$0x%" TCG_PRIlx, k ? "," : "", args[k]); } } qemu_log("\n"); @@ -2332,7 +2335,7 @@ static inline int tcg_gen_code_common(TCGContext *s, break; case INDEX_op_set_label: tcg_reg_alloc_bb_end(s, s->reserved_regs); - tcg_out_label(s, args[0], s->code_ptr); + tcg_out_label(s, arg_label(args[0]), s->code_ptr); break; case INDEX_op_call: tcg_reg_alloc_call(s, op->callo, op->calli, args, diff --git a/tcg/tcg.h b/tcg/tcg.h index f941965d53..add7f7524d 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -167,7 +167,8 @@ typedef struct TCGRelocation { } TCGRelocation; typedef struct TCGLabel { - int has_value; + unsigned has_value : 1; + unsigned id : 31; union { uintptr_t value; tcg_insn_unit *value_ptr; @@ -183,8 +184,6 @@ typedef struct TCGPool { #define TCG_POOL_CHUNK_SIZE 32768 -#define TCG_MAX_LABELS 512 - #define TCG_MAX_TEMPS 512 /* when the size of the arguments of a called function is smaller than @@ -556,8 +555,6 @@ struct TCGContext { target_ulong gen_opc_pc[OPC_BUF_SIZE]; uint16_t gen_opc_icount[OPC_BUF_SIZE]; uint8_t gen_opc_instr_start[OPC_BUF_SIZE]; - - TCGLabel labels[TCG_MAX_LABELS]; }; extern TCGContext tcg_ctx; @@ -755,6 +752,33 @@ TCGv_i64 tcg_const_i64(int64_t val); TCGv_i32 tcg_const_local_i32(int32_t val); TCGv_i64 tcg_const_local_i64(int64_t val); +TCGLabel *gen_new_label(void); + +/** + * label_arg + * @l: label + * + * Encode a label for storage in the TCG opcode stream. + */ + +static inline TCGArg label_arg(TCGLabel *l) +{ + return (uintptr_t)l; +} + +/** + * arg_label + * @i: value + * + * The opposite of label_arg. Retrieve a label from the + * encoding of the TCG opcode stream. + */ + +static inline TCGLabel *arg_label(TCGArg i) +{ + return (TCGLabel *)(uintptr_t)i; +} + /** * tcg_ptr_byte_diff * @a, @b: addresses to be differenced diff --git a/tcg/tci/tcg-target.c b/tcg/tci/tcg-target.c index 03a7b46958..fb2339dcdf 100644 --- a/tcg/tci/tcg-target.c +++ b/tcg/tci/tcg-target.c @@ -460,14 +460,13 @@ static void tcg_out_ri64(TCGContext *s, int const_arg, TCGArg arg) #endif /* Write label. */ -static void tci_out_label(TCGContext *s, TCGArg arg) +static void tci_out_label(TCGContext *s, TCGLabel *label) { - TCGLabel *label = &s->labels[arg]; if (label->has_value) { tcg_out_i(s, label->u.value); assert(label->u.value); } else { - tcg_out_reloc(s, s->code_ptr, sizeof(tcg_target_ulong), arg, 0); + tcg_out_reloc(s, s->code_ptr, sizeof(tcg_target_ulong), label, 0); s->code_ptr += sizeof(tcg_target_ulong); } } @@ -565,7 +564,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, s->tb_next_offset[args[0]] = tcg_current_code_size(s); break; case INDEX_op_br: - tci_out_label(s, args[0]); + tci_out_label(s, arg_label(args[0])); break; case INDEX_op_setcond_i32: tcg_out_r(s, args[0]); @@ -689,7 +688,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, tcg_out_r(s, args[0]); tcg_out_ri64(s, const_args[1], args[1]); tcg_out8(s, args[2]); /* condition */ - tci_out_label(s, args[3]); + tci_out_label(s, arg_label(args[3])); break; case INDEX_op_bswap16_i64: /* Optional (TCG_TARGET_HAS_bswap16_i64). */ case INDEX_op_bswap32_i64: /* Optional (TCG_TARGET_HAS_bswap32_i64). */ @@ -742,7 +741,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, tcg_out_ri32(s, const_args[2], args[2]); tcg_out_ri32(s, const_args[3], args[3]); tcg_out8(s, args[4]); /* condition */ - tci_out_label(s, args[5]); + tci_out_label(s, arg_label(args[5])); break; case INDEX_op_mulu2_i32: tcg_out_r(s, args[0]); @@ -755,7 +754,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, tcg_out_r(s, args[0]); tcg_out_ri32(s, const_args[1], args[1]); tcg_out8(s, args[2]); /* condition */ - tci_out_label(s, args[3]); + tci_out_label(s, arg_label(args[3])); break; case INDEX_op_qemu_ld_i32: tcg_out_r(s, *args++); |