diff options
| -rw-r--r-- | target/riscv/cpu.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 208faffbbf..f61ed7cf60 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -135,7 +135,10 @@ const RISCVIsaExtData isa_edata_arr[] = { ISA_EXT_DATA_ENTRY(zvkng, PRIV_VERSION_1_12_0, ext_zvkng), ISA_EXT_DATA_ENTRY(zvknha, PRIV_VERSION_1_12_0, ext_zvknha), ISA_EXT_DATA_ENTRY(zvknhb, PRIV_VERSION_1_12_0, ext_zvknhb), + ISA_EXT_DATA_ENTRY(zvks, PRIV_VERSION_1_12_0, ext_zvks), + ISA_EXT_DATA_ENTRY(zvksc, PRIV_VERSION_1_12_0, ext_zvksc), ISA_EXT_DATA_ENTRY(zvksed, PRIV_VERSION_1_12_0, ext_zvksed), + ISA_EXT_DATA_ENTRY(zvksg, PRIV_VERSION_1_12_0, ext_zvksg), ISA_EXT_DATA_ENTRY(zvksh, PRIV_VERSION_1_12_0, ext_zvksh), ISA_EXT_DATA_ENTRY(zvkt, PRIV_VERSION_1_12_0, ext_zvkt), ISA_EXT_DATA_ENTRY(zhinx, PRIV_VERSION_1_12_0, ext_zhinx), @@ -1400,6 +1403,9 @@ const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = { MULTI_EXT_CFG_BOOL("x-zvkn", ext_zvkn, false), MULTI_EXT_CFG_BOOL("x-zvknc", ext_zvknc, false), MULTI_EXT_CFG_BOOL("x-zvkng", ext_zvkng, false), + MULTI_EXT_CFG_BOOL("x-zvks", ext_zvks, false), + MULTI_EXT_CFG_BOOL("x-zvksc", ext_zvksc, false), + MULTI_EXT_CFG_BOOL("x-zvksg", ext_zvksg, false), DEFINE_PROP_END_OF_LIST(), }; |