diff options
| -rw-r--r-- | hw/ppc/spapr.c | 1 | ||||
| -rw-r--r-- | hw/ppc/spapr_hcall.c | 6 |
2 files changed, 2 insertions, 5 deletions
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 785c41d205..167b1216ba 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2837,6 +2837,7 @@ static void spapr_machine_init(MachineState *machine) if ((!kvm_enabled() || kvmppc_has_cap_mmu_radix()) && ppc_type_check_compat(machine->cpu_type, CPU_POWERPC_LOGICAL_3_00, 0, spapr->max_compat_pvr)) { + spapr_ovec_set(spapr->ov5, OV5_MMU_RADIX_300); /* KVM and TCG always allow GTSE with radix... */ spapr_ovec_set(spapr->ov5, OV5_MMU_RADIX_GTSE); } diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index e8ee447537..fb4fdd4a0c 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -1739,9 +1739,7 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu, exit(EXIT_FAILURE); } - /* The radix/hash bit in byte 24 requires special handling: */ guest_radix = spapr_ovec_test(ov5_guest, OV5_MMU_RADIX_300); - spapr_ovec_clear(ov5_guest, OV5_MMU_RADIX_300); guest_xive = spapr_ovec_test(ov5_guest, OV5_XIVE_EXPLOIT); @@ -1786,14 +1784,12 @@ static target_ulong h_client_architecture_support(PowerPCCPU *cpu, /* full range of negotiated ov5 capabilities */ spapr_ovec_intersect(spapr->ov5_cas, spapr->ov5, ov5_guest); spapr_ovec_cleanup(ov5_guest); - /* Now that processing is finished, set the radix/hash bit for the - * guest if it requested a valid mode; otherwise terminate the boot. */ + if (guest_radix) { if (kvm_enabled() && !kvmppc_has_cap_mmu_radix()) { error_report("Guest requested unavailable MMU mode (radix)."); exit(EXIT_FAILURE); } - spapr_ovec_set(spapr->ov5_cas, OV5_MMU_RADIX_300); } else { if (kvm_enabled() && kvmppc_has_cap_mmu_radix() && !kvmppc_has_cap_mmu_hash_v3()) { |